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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * S390 low-level entry points. |
3 | * | |
a53c8fab | 4 | * Copyright IBM Corp. 1999, 2012 |
1da177e4 | 5 | * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), |
25d83cbf HC |
6 | * Hartmut Penner (hp@de.ibm.com), |
7 | * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), | |
77fa2245 | 8 | * Heiko Carstens <heiko.carstens@de.ibm.com> |
1da177e4 LT |
9 | */ |
10 | ||
2bc89b5e | 11 | #include <linux/init.h> |
144d634a | 12 | #include <linux/linkage.h> |
eb608fb3 | 13 | #include <asm/processor.h> |
1da177e4 | 14 | #include <asm/cache.h> |
1da177e4 LT |
15 | #include <asm/errno.h> |
16 | #include <asm/ptrace.h> | |
17 | #include <asm/thread_info.h> | |
0013a854 | 18 | #include <asm/asm-offsets.h> |
1da177e4 LT |
19 | #include <asm/unistd.h> |
20 | #include <asm/page.h> | |
eb546195 | 21 | #include <asm/sigp.h> |
1f44a225 | 22 | #include <asm/irq.h> |
9977e886 | 23 | #include <asm/vx-insn.h> |
83abeffb HB |
24 | #include <asm/setup.h> |
25 | #include <asm/nmi.h> | |
1da177e4 | 26 | |
c5328901 MS |
27 | __PT_R0 = __PT_GPRS |
28 | __PT_R1 = __PT_GPRS + 8 | |
29 | __PT_R2 = __PT_GPRS + 16 | |
30 | __PT_R3 = __PT_GPRS + 24 | |
31 | __PT_R4 = __PT_GPRS + 32 | |
32 | __PT_R5 = __PT_GPRS + 40 | |
33 | __PT_R6 = __PT_GPRS + 48 | |
34 | __PT_R7 = __PT_GPRS + 56 | |
35 | __PT_R8 = __PT_GPRS + 64 | |
36 | __PT_R9 = __PT_GPRS + 72 | |
37 | __PT_R10 = __PT_GPRS + 80 | |
38 | __PT_R11 = __PT_GPRS + 88 | |
39 | __PT_R12 = __PT_GPRS + 96 | |
40 | __PT_R13 = __PT_GPRS + 104 | |
41 | __PT_R14 = __PT_GPRS + 112 | |
42 | __PT_R15 = __PT_GPRS + 120 | |
1da177e4 LT |
43 | |
44 | STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER | |
45 | STACK_SIZE = 1 << STACK_SHIFT | |
dc7ee00d | 46 | STACK_INIT = STACK_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE |
1da177e4 | 47 | |
2a0a5b22 JW |
48 | _TIF_WORK = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \ |
49 | _TIF_UPROBE) | |
d3a73acb MS |
50 | _TIF_TRACE = (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | _TIF_SECCOMP | \ |
51 | _TIF_SYSCALL_TRACEPOINT) | |
9977e886 | 52 | _CIF_WORK = (_CIF_MCCK_PENDING | _CIF_ASCE | _CIF_FPU) |
d3a73acb | 53 | _PIF_WORK = (_PIF_PER_TRAP) |
1da177e4 | 54 | |
9977e886 | 55 | #define BASED(name) name-cleanup_critical(%r13) |
1da177e4 | 56 | |
1f194a4c | 57 | .macro TRACE_IRQS_ON |
c5328901 | 58 | #ifdef CONFIG_TRACE_IRQFLAGS |
6a2df3a8 MS |
59 | basr %r2,%r0 |
60 | brasl %r14,trace_hardirqs_on_caller | |
c5328901 | 61 | #endif |
1f194a4c HC |
62 | .endm |
63 | ||
64 | .macro TRACE_IRQS_OFF | |
c5328901 | 65 | #ifdef CONFIG_TRACE_IRQFLAGS |
6a2df3a8 MS |
66 | basr %r2,%r0 |
67 | brasl %r14,trace_hardirqs_off_caller | |
411788ea | 68 | #endif |
c5328901 | 69 | .endm |
411788ea | 70 | |
411788ea | 71 | .macro LOCKDEP_SYS_EXIT |
c5328901 MS |
72 | #ifdef CONFIG_LOCKDEP |
73 | tm __PT_PSW+1(%r11),0x01 # returning to user ? | |
74 | jz .+10 | |
411788ea | 75 | brasl %r14,lockdep_sys_exit |
1f194a4c | 76 | #endif |
1da177e4 | 77 | .endm |
1da177e4 | 78 | |
c5328901 | 79 | .macro CHECK_STACK stacksize,savearea |
63b12246 | 80 | #ifdef CONFIG_CHECK_STACK |
c5328901 MS |
81 | tml %r15,\stacksize - CONFIG_STACK_GUARD |
82 | lghi %r14,\savearea | |
83 | jz stack_overflow | |
63b12246 | 84 | #endif |
63b12246 MS |
85 | .endm |
86 | ||
2acb94f4 | 87 | .macro SWITCH_ASYNC savearea,timer |
c5328901 MS |
88 | tmhh %r8,0x0001 # interrupting from user ? |
89 | jnz 1f | |
90 | lgr %r14,%r9 | |
91 | slg %r14,BASED(.Lcritical_start) | |
92 | clg %r14,BASED(.Lcritical_length) | |
1da177e4 | 93 | jhe 0f |
c5328901 | 94 | lghi %r11,\savearea # inside critical section, do cleanup |
1da177e4 | 95 | brasl %r14,cleanup_critical |
c5328901 | 96 | tmhh %r8,0x0001 # retest problem state after cleanup |
1da177e4 | 97 | jnz 1f |
2acb94f4 | 98 | 0: lg %r14,__LC_ASYNC_STACK # are we already on the async stack? |
1da177e4 | 99 | slgr %r14,%r15 |
2acb94f4 | 100 | srag %r14,%r14,STACK_SHIFT |
a359bb11 | 101 | jnz 2f |
2acb94f4 | 102 | CHECK_STACK 1<<STACK_SHIFT,\savearea |
dc7ee00d | 103 | aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE) |
a359bb11 MS |
104 | j 3f |
105 | 1: LAST_BREAK %r14 | |
106 | UPDATE_VTIME %r14,%r15,\timer | |
2acb94f4 | 107 | 2: lg %r15,__LC_ASYNC_STACK # load async stack |
a359bb11 | 108 | 3: la %r11,STACK_FRAME_OVERHEAD(%r15) |
25d83cbf | 109 | .endm |
1da177e4 | 110 | |
a359bb11 MS |
111 | .macro UPDATE_VTIME w1,w2,enter_timer |
112 | lg \w1,__LC_EXIT_TIMER | |
113 | lg \w2,__LC_LAST_UPDATE_TIMER | |
114 | slg \w1,\enter_timer | |
115 | slg \w2,__LC_EXIT_TIMER | |
116 | alg \w1,__LC_USER_TIMER | |
117 | alg \w2,__LC_SYSTEM_TIMER | |
118 | stg \w1,__LC_USER_TIMER | |
119 | stg \w2,__LC_SYSTEM_TIMER | |
c5328901 | 120 | mvc __LC_LAST_UPDATE_TIMER(8),\enter_timer |
1da177e4 LT |
121 | .endm |
122 | ||
c5328901 MS |
123 | .macro LAST_BREAK scratch |
124 | srag \scratch,%r10,23 | |
125 | jz .+10 | |
126 | stg %r10,__TI_last_break(%r12) | |
86f2552b MS |
127 | .endm |
128 | ||
1e54622e | 129 | .macro REENABLE_IRQS |
c5328901 MS |
130 | stg %r8,__LC_RETURN_PSW |
131 | ni __LC_RETURN_PSW,0xbf | |
132 | ssm __LC_RETURN_PSW | |
1e54622e MS |
133 | .endm |
134 | ||
473e66ba | 135 | .macro STCK savearea |
d652d596 | 136 | #ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES |
473e66ba HC |
137 | .insn s,0xb27c0000,\savearea # store clock fast |
138 | #else | |
139 | .insn s,0xb2050000,\savearea # store clock | |
140 | #endif | |
141 | .endm | |
142 | ||
83abeffb HB |
143 | /* |
144 | * The TSTMSK macro generates a test-under-mask instruction by | |
145 | * calculating the memory offset for the specified mask value. | |
146 | * Mask value can be any constant. The macro shifts the mask | |
147 | * value to calculate the memory offset for the test-under-mask | |
148 | * instruction. | |
149 | */ | |
150 | .macro TSTMSK addr, mask, size=8, bytepos=0 | |
151 | .if (\bytepos < \size) && (\mask >> 8) | |
152 | .if (\mask & 0xff) | |
153 | .error "Mask exceeds byte boundary" | |
154 | .endif | |
155 | TSTMSK \addr, "(\mask >> 8)", \size, "(\bytepos + 1)" | |
156 | .exitm | |
157 | .endif | |
158 | .ifeq \mask | |
159 | .error "Mask must not be zero" | |
160 | .endif | |
161 | off = \size - \bytepos - 1 | |
162 | tm off+\addr, \mask | |
163 | .endm | |
164 | ||
860dba45 MS |
165 | .section .kprobes.text, "ax" |
166 | ||
1da177e4 LT |
167 | /* |
168 | * Scheduler resume function, called by switch_to | |
169 | * gpr2 = (task_struct *) prev | |
170 | * gpr3 = (task_struct *) next | |
171 | * Returns: | |
172 | * gpr2 = prev | |
173 | */ | |
144d634a | 174 | ENTRY(__switch_to) |
eda0c6d6 | 175 | stmg %r6,%r15,__SF_GPRS(%r15) # store gprs of prev task |
3827ec3d MS |
176 | lgr %r1,%r2 |
177 | aghi %r1,__TASK_thread # thread_struct of prev task | |
178 | lg %r4,__TASK_thread_info(%r2) # get thread_info of prev | |
179 | lg %r5,__TASK_thread_info(%r3) # get thread_info of next | |
180 | stg %r15,__THREAD_ksp(%r1) # store kernel stack of prev | |
181 | lgr %r1,%r3 | |
182 | aghi %r1,__TASK_thread # thread_struct of next task | |
eda0c6d6 | 183 | lgr %r15,%r5 |
dc7ee00d | 184 | aghi %r15,STACK_INIT # end of kernel stack of next |
eda0c6d6 MS |
185 | stg %r3,__LC_CURRENT # store task struct of next |
186 | stg %r5,__LC_THREAD_INFO # store thread info of next | |
187 | stg %r15,__LC_KERNEL_STACK # store end of kernel stack | |
3827ec3d | 188 | lg %r15,__THREAD_ksp(%r1) # load kernel stack of next |
eda0c6d6 | 189 | lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4 |
e22cf8ca | 190 | mvc __LC_CURRENT_PID(4,%r0),__TASK_pid(%r3) # store pid of next |
d3a73acb | 191 | lmg %r6,%r15,__SF_GPRS(%r15) # load gprs of next task |
e22cf8ca CB |
192 | TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP |
193 | bzr %r14 | |
194 | .insn s,0xb2800000,__LC_LPP # set program parameter | |
1da177e4 LT |
195 | br %r14 |
196 | ||
86ed42f4 | 197 | .L__critical_start: |
d0fc4107 MS |
198 | |
199 | #if IS_ENABLED(CONFIG_KVM) | |
200 | /* | |
201 | * sie64a calling convention: | |
202 | * %r2 pointer to sie control block | |
203 | * %r3 guest register save area | |
204 | */ | |
205 | ENTRY(sie64a) | |
206 | stmg %r6,%r14,__SF_GPRS(%r15) # save kernel registers | |
207 | stg %r2,__SF_EMPTY(%r15) # save control block pointer | |
208 | stg %r3,__SF_EMPTY+8(%r15) # save guest register save area | |
e22cf8ca | 209 | xc __SF_EMPTY+16(8,%r15),__SF_EMPTY+16(%r15) # reason code = 0 |
83abeffb | 210 | TSTMSK __LC_CPU_FLAGS,_CIF_FPU # load guest fp/vx registers ? |
d0fc4107 | 211 | jno .Lsie_load_guest_gprs |
d0fc4107 MS |
212 | brasl %r14,load_fpu_regs # load guest fp/vx regs |
213 | .Lsie_load_guest_gprs: | |
214 | lmg %r0,%r13,0(%r3) # load guest gprs 0-13 | |
215 | lg %r14,__LC_GMAP # get gmap pointer | |
216 | ltgr %r14,%r14 | |
217 | jz .Lsie_gmap | |
218 | lctlg %c1,%c1,__GMAP_ASCE(%r14) # load primary asce | |
219 | .Lsie_gmap: | |
220 | lg %r14,__SF_EMPTY(%r15) # get control block pointer | |
221 | oi __SIE_PROG0C+3(%r14),1 # we are going into SIE now | |
222 | tm __SIE_PROG20+3(%r14),3 # last exit... | |
223 | jnz .Lsie_skip | |
83abeffb | 224 | TSTMSK __LC_CPU_FLAGS,_CIF_FPU |
d0fc4107 | 225 | jo .Lsie_skip # exit if fp/vx regs changed |
d0fc4107 | 226 | sie 0(%r14) |
d0fc4107 MS |
227 | .Lsie_skip: |
228 | ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE | |
229 | lctlg %c1,%c1,__LC_USER_ASCE # load primary asce | |
230 | .Lsie_done: | |
231 | # some program checks are suppressing. C code (e.g. do_protection_exception) | |
232 | # will rewind the PSW by the ILC, which is 4 bytes in case of SIE. Other | |
233 | # instructions between sie64a and .Lsie_done should not cause program | |
234 | # interrupts. So lets use a nop (47 00 00 00) as a landing pad. | |
235 | # See also .Lcleanup_sie | |
236 | .Lrewind_pad: | |
237 | nop 0 | |
238 | .globl sie_exit | |
239 | sie_exit: | |
240 | lg %r14,__SF_EMPTY+8(%r15) # load guest register save area | |
241 | stmg %r0,%r13,0(%r14) # save guest gprs 0-13 | |
242 | lmg %r6,%r14,__SF_GPRS(%r15) # restore kernel registers | |
e22cf8ca | 243 | lg %r2,__SF_EMPTY+16(%r15) # return exit reason code |
d0fc4107 MS |
244 | br %r14 |
245 | .Lsie_fault: | |
246 | lghi %r14,-EFAULT | |
e22cf8ca | 247 | stg %r14,__SF_EMPTY+16(%r15) # set exit reason code |
d0fc4107 MS |
248 | j sie_exit |
249 | ||
250 | EX_TABLE(.Lrewind_pad,.Lsie_fault) | |
251 | EX_TABLE(sie_exit,.Lsie_fault) | |
252 | #endif | |
253 | ||
1da177e4 LT |
254 | /* |
255 | * SVC interrupt handler routine. System calls are synchronous events and | |
256 | * are executed with interrupts enabled. | |
257 | */ | |
258 | ||
144d634a | 259 | ENTRY(system_call) |
c185b783 | 260 | stpt __LC_SYNC_ENTER_TIMER |
86ed42f4 | 261 | .Lsysc_stmg: |
c5328901 MS |
262 | stmg %r8,%r15,__LC_SAVE_AREA_SYNC |
263 | lg %r10,__LC_LAST_BREAK | |
264 | lg %r12,__LC_THREAD_INFO | |
d3a73acb | 265 | lghi %r14,_PIF_SYSCALL |
86ed42f4 | 266 | .Lsysc_per: |
c5328901 | 267 | lg %r15,__LC_KERNEL_STACK |
c5328901 | 268 | la %r11,STACK_FRAME_OVERHEAD(%r15) # pointer to pt_regs |
c5328901 | 269 | LAST_BREAK %r13 |
a359bb11 MS |
270 | .Lsysc_vtime: |
271 | UPDATE_VTIME %r10,%r13,__LC_SYNC_ENTER_TIMER | |
c5328901 MS |
272 | stmg %r0,%r7,__PT_R0(%r11) |
273 | mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC | |
274 | mvc __PT_PSW(16,%r11),__LC_SVC_OLD_PSW | |
aa33c8cb | 275 | mvc __PT_INT_CODE(4,%r11),__LC_SVC_ILC |
d3a73acb | 276 | stg %r14,__PT_FLAGS(%r11) |
86ed42f4 | 277 | .Lsysc_do_svc: |
61649881 | 278 | lg %r10,__TI_sysc_table(%r12) # address of system call table |
aa33c8cb | 279 | llgh %r8,__PT_INT_CODE+2(%r11) |
c5328901 | 280 | slag %r8,%r8,2 # shift and test for svc 0 |
86ed42f4 | 281 | jnz .Lsysc_nr_ok |
1da177e4 | 282 | # svc 0: system call number in %r1 |
c5328901 | 283 | llgfr %r1,%r1 # clear high word in r1 |
86f2552b | 284 | cghi %r1,NR_syscalls |
86ed42f4 | 285 | jnl .Lsysc_nr_ok |
aa33c8cb | 286 | sth %r1,__PT_INT_CODE+2(%r11) |
c5328901 | 287 | slag %r8,%r1,2 |
86ed42f4 | 288 | .Lsysc_nr_ok: |
c5328901 MS |
289 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) |
290 | stg %r2,__PT_ORIG_GPR2(%r11) | |
291 | stg %r7,STACK_FRAME_OVERHEAD(%r15) | |
292 | lgf %r9,0(%r8,%r10) # get system call add. | |
83abeffb | 293 | TSTMSK __TI_flags(%r12),_TIF_TRACE |
86ed42f4 | 294 | jnz .Lsysc_tracesys |
c5328901 MS |
295 | basr %r14,%r9 # call sys_xxxx |
296 | stg %r2,__PT_R2(%r11) # store return value | |
1da177e4 | 297 | |
86ed42f4 | 298 | .Lsysc_return: |
6a2df3a8 | 299 | LOCKDEP_SYS_EXIT |
86ed42f4 | 300 | .Lsysc_tif: |
83abeffb | 301 | TSTMSK __PT_FLAGS(%r11),_PIF_WORK |
86ed42f4 | 302 | jnz .Lsysc_work |
83abeffb | 303 | TSTMSK __TI_flags(%r12),_TIF_WORK |
86ed42f4 | 304 | jnz .Lsysc_work # check for work |
83abeffb | 305 | TSTMSK __LC_CPU_FLAGS,_CIF_WORK |
86ed42f4 MS |
306 | jnz .Lsysc_work |
307 | .Lsysc_restore: | |
c5328901 MS |
308 | lg %r14,__LC_VDSO_PER_CPU |
309 | lmg %r0,%r10,__PT_R0(%r11) | |
310 | mvc __LC_RETURN_PSW(16),__PT_PSW(%r11) | |
311 | stpt __LC_EXIT_TIMER | |
312 | mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER | |
313 | lmg %r11,%r15,__PT_R11(%r11) | |
314 | lpswe __LC_RETURN_PSW | |
86ed42f4 | 315 | .Lsysc_done: |
411788ea | 316 | |
43d399d2 MS |
317 | # |
318 | # One of the work bits is on. Find out which one. | |
319 | # | |
86ed42f4 | 320 | .Lsysc_work: |
83abeffb | 321 | TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING |
86ed42f4 | 322 | jo .Lsysc_mcck_pending |
83abeffb | 323 | TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED |
86ed42f4 | 324 | jo .Lsysc_reschedule |
2a0a5b22 | 325 | #ifdef CONFIG_UPROBES |
83abeffb | 326 | TSTMSK __TI_flags(%r12),_TIF_UPROBE |
86ed42f4 | 327 | jo .Lsysc_uprobe_notify |
2a0a5b22 | 328 | #endif |
83abeffb | 329 | TSTMSK __PT_FLAGS(%r11),_PIF_PER_TRAP |
86ed42f4 | 330 | jo .Lsysc_singlestep |
83abeffb | 331 | TSTMSK __TI_flags(%r12),_TIF_SIGPENDING |
86ed42f4 | 332 | jo .Lsysc_sigpending |
83abeffb | 333 | TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME |
86ed42f4 | 334 | jo .Lsysc_notify_resume |
83abeffb | 335 | TSTMSK __LC_CPU_FLAGS,_CIF_FPU |
9977e886 | 336 | jo .Lsysc_vxrs |
83abeffb | 337 | TSTMSK __LC_CPU_FLAGS,_CIF_ASCE |
86ed42f4 MS |
338 | jo .Lsysc_uaccess |
339 | j .Lsysc_return # beware of critical section cleanup | |
1da177e4 LT |
340 | |
341 | # | |
342 | # _TIF_NEED_RESCHED is set, call schedule | |
25d83cbf | 343 | # |
86ed42f4 MS |
344 | .Lsysc_reschedule: |
345 | larl %r14,.Lsysc_return | |
c5328901 | 346 | jg schedule |
1da177e4 | 347 | |
77fa2245 | 348 | # |
d3a73acb | 349 | # _CIF_MCCK_PENDING is set, call handler |
77fa2245 | 350 | # |
86ed42f4 MS |
351 | .Lsysc_mcck_pending: |
352 | larl %r14,.Lsysc_return | |
25d83cbf | 353 | jg s390_handle_mcck # TIF bit will be cleared by handler |
77fa2245 | 354 | |
457f2180 | 355 | # |
d3a73acb | 356 | # _CIF_ASCE is set, load user space asce |
457f2180 | 357 | # |
86ed42f4 | 358 | .Lsysc_uaccess: |
d3a73acb | 359 | ni __LC_CPU_FLAGS+7,255-_CIF_ASCE |
457f2180 | 360 | lctlg %c1,%c1,__LC_USER_ASCE # load primary asce |
86ed42f4 | 361 | j .Lsysc_return |
457f2180 | 362 | |
9977e886 HB |
363 | # |
364 | # CIF_FPU is set, restore floating-point controls and floating-point registers. | |
365 | # | |
366 | .Lsysc_vxrs: | |
367 | larl %r14,.Lsysc_return | |
368 | jg load_fpu_regs | |
369 | ||
1da177e4 | 370 | # |
02a029b3 | 371 | # _TIF_SIGPENDING is set, call do_signal |
1da177e4 | 372 | # |
86ed42f4 | 373 | .Lsysc_sigpending: |
c5328901 MS |
374 | lgr %r2,%r11 # pass pointer to pt_regs |
375 | brasl %r14,do_signal | |
83abeffb | 376 | TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL |
86ed42f4 | 377 | jno .Lsysc_return |
c5328901 | 378 | lmg %r2,%r7,__PT_R2(%r11) # load svc arguments |
dbbfe487 | 379 | lg %r10,__TI_sysc_table(%r12) # address of system call table |
c5328901 | 380 | lghi %r8,0 # svc 0 returns -ENOSYS |
450e47da | 381 | llgh %r1,__PT_INT_CODE+2(%r11) # load new svc number |
b6ef5bb3 | 382 | cghi %r1,NR_syscalls |
86ed42f4 | 383 | jnl .Lsysc_nr_ok # invalid svc number -> do svc 0 |
c5328901 | 384 | slag %r8,%r1,2 |
86ed42f4 | 385 | j .Lsysc_nr_ok # restart svc |
1da177e4 | 386 | |
753c4dd6 MS |
387 | # |
388 | # _TIF_NOTIFY_RESUME is set, call do_notify_resume | |
389 | # | |
86ed42f4 | 390 | .Lsysc_notify_resume: |
c5328901 | 391 | lgr %r2,%r11 # pass pointer to pt_regs |
86ed42f4 | 392 | larl %r14,.Lsysc_return |
c5328901 | 393 | jg do_notify_resume |
753c4dd6 | 394 | |
2a0a5b22 JW |
395 | # |
396 | # _TIF_UPROBE is set, call uprobe_notify_resume | |
397 | # | |
398 | #ifdef CONFIG_UPROBES | |
86ed42f4 | 399 | .Lsysc_uprobe_notify: |
2a0a5b22 | 400 | lgr %r2,%r11 # pass pointer to pt_regs |
86ed42f4 | 401 | larl %r14,.Lsysc_return |
2a0a5b22 JW |
402 | jg uprobe_notify_resume |
403 | #endif | |
404 | ||
1da177e4 | 405 | # |
d3a73acb | 406 | # _PIF_PER_TRAP is set, call do_per_trap |
1da177e4 | 407 | # |
86ed42f4 | 408 | .Lsysc_singlestep: |
d3a73acb | 409 | ni __PT_FLAGS+7(%r11),255-_PIF_PER_TRAP |
c5328901 | 410 | lgr %r2,%r11 # pass pointer to pt_regs |
86ed42f4 | 411 | larl %r14,.Lsysc_return |
5e9a2692 | 412 | jg do_per_trap |
1da177e4 | 413 | |
1da177e4 | 414 | # |
753c4dd6 MS |
415 | # call tracehook_report_syscall_entry/tracehook_report_syscall_exit before |
416 | # and after the system call | |
1da177e4 | 417 | # |
86ed42f4 | 418 | .Lsysc_tracesys: |
c5328901 | 419 | lgr %r2,%r11 # pass pointer to pt_regs |
1da177e4 | 420 | la %r3,0 |
aa33c8cb | 421 | llgh %r0,__PT_INT_CODE+2(%r11) |
c5328901 | 422 | stg %r0,__PT_R2(%r11) |
753c4dd6 | 423 | brasl %r14,do_syscall_trace_enter |
1da177e4 | 424 | lghi %r0,NR_syscalls |
753c4dd6 | 425 | clgr %r0,%r2 |
86ed42f4 | 426 | jnh .Lsysc_tracenogo |
c5328901 MS |
427 | sllg %r8,%r2,2 |
428 | lgf %r9,0(%r8,%r10) | |
86ed42f4 | 429 | .Lsysc_tracego: |
c5328901 MS |
430 | lmg %r3,%r7,__PT_R3(%r11) |
431 | stg %r7,STACK_FRAME_OVERHEAD(%r15) | |
432 | lg %r2,__PT_ORIG_GPR2(%r11) | |
433 | basr %r14,%r9 # call sys_xxx | |
434 | stg %r2,__PT_R2(%r11) # store return value | |
86ed42f4 | 435 | .Lsysc_tracenogo: |
83abeffb | 436 | TSTMSK __TI_flags(%r12),_TIF_TRACE |
86ed42f4 | 437 | jz .Lsysc_return |
c5328901 | 438 | lgr %r2,%r11 # pass pointer to pt_regs |
86ed42f4 | 439 | larl %r14,.Lsysc_return |
753c4dd6 | 440 | jg do_syscall_trace_exit |
1da177e4 LT |
441 | |
442 | # | |
443 | # a new process exits the kernel with ret_from_fork | |
444 | # | |
144d634a | 445 | ENTRY(ret_from_fork) |
c5328901 MS |
446 | la %r11,STACK_FRAME_OVERHEAD(%r15) |
447 | lg %r12,__LC_THREAD_INFO | |
37fe5d41 AV |
448 | brasl %r14,schedule_tail |
449 | TRACE_IRQS_ON | |
450 | ssm __LC_SVC_NEW_PSW # reenable interrupts | |
30dcb099 | 451 | tm __PT_PSW+1(%r11),0x01 # forking a kernel thread ? |
86ed42f4 | 452 | jne .Lsysc_tracenogo |
30dcb099 AV |
453 | # it's a kernel thread |
454 | lmg %r9,%r10,__PT_R9(%r11) # load gprs | |
37fe5d41 AV |
455 | ENTRY(kernel_thread_starter) |
456 | la %r2,0(%r10) | |
457 | basr %r14,%r9 | |
86ed42f4 | 458 | j .Lsysc_tracenogo |
1da177e4 LT |
459 | |
460 | /* | |
461 | * Program check handler routine | |
462 | */ | |
463 | ||
144d634a | 464 | ENTRY(pgm_check_handler) |
c185b783 | 465 | stpt __LC_SYNC_ENTER_TIMER |
c5328901 MS |
466 | stmg %r8,%r15,__LC_SAVE_AREA_SYNC |
467 | lg %r10,__LC_LAST_BREAK | |
468 | lg %r12,__LC_THREAD_INFO | |
9977e886 | 469 | larl %r13,cleanup_critical |
c5328901 | 470 | lmg %r8,%r9,__LC_PGM_OLD_PSW |
c5328901 | 471 | tmhh %r8,0x0001 # test problem state bit |
d0fc4107 MS |
472 | jnz 2f # -> fault in user space |
473 | #if IS_ENABLED(CONFIG_KVM) | |
474 | # cleanup critical section for sie64a | |
475 | lgr %r14,%r9 | |
476 | slg %r14,BASED(.Lsie_critical_start) | |
477 | clg %r14,BASED(.Lsie_critical_length) | |
478 | jhe 0f | |
479 | brasl %r14,.Lcleanup_sie | |
480 | #endif | |
481 | 0: tmhh %r8,0x4000 # PER bit set in old PSW ? | |
482 | jnz 1f # -> enabled, can't be a double fault | |
c5328901 | 483 | tm __LC_PGM_ILC+3,0x80 # check for per exception |
86ed42f4 | 484 | jnz .Lpgm_svcper # -> single stepped svc |
d0fc4107 | 485 | 1: CHECK_STACK STACK_SIZE,__LC_SAVE_AREA_SYNC |
dc7ee00d | 486 | aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE) |
d0fc4107 | 487 | j 3f |
a359bb11 MS |
488 | 2: LAST_BREAK %r14 |
489 | UPDATE_VTIME %r14,%r15,__LC_SYNC_ENTER_TIMER | |
c5328901 | 490 | lg %r15,__LC_KERNEL_STACK |
d35339a4 | 491 | lg %r14,__TI_task(%r12) |
3827ec3d | 492 | aghi %r14,__TASK_thread # pointer to thread_struct |
d35339a4 MS |
493 | lghi %r13,__LC_PGM_TDB |
494 | tm __LC_PGM_ILC+2,0x02 # check for transaction abort | |
d0fc4107 | 495 | jz 3f |
d35339a4 | 496 | mvc __THREAD_trap_tdb(256,%r14),0(%r13) |
d0fc4107 | 497 | 3: la %r11,STACK_FRAME_OVERHEAD(%r15) |
c5328901 MS |
498 | stmg %r0,%r7,__PT_R0(%r11) |
499 | mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC | |
500 | stmg %r8,%r9,__PT_PSW(%r11) | |
aa33c8cb MS |
501 | mvc __PT_INT_CODE(4,%r11),__LC_PGM_ILC |
502 | mvc __PT_INT_PARM_LONG(8,%r11),__LC_TRANS_EXC_CODE | |
d3a73acb | 503 | xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) |
c5328901 MS |
504 | stg %r10,__PT_ARGS(%r11) |
505 | tm __LC_PGM_ILC+3,0x80 # check for per exception | |
d0fc4107 | 506 | jz 4f |
c5328901 | 507 | tmhh %r8,0x0001 # kernel per event ? |
86ed42f4 | 508 | jz .Lpgm_kprobe |
d3a73acb | 509 | oi __PT_FLAGS+7(%r11),_PIF_PER_TRAP |
d35339a4 | 510 | mvc __THREAD_per_address(8,%r14),__LC_PER_ADDRESS |
21ee7ffd JF |
511 | mvc __THREAD_per_cause(2,%r14),__LC_PER_CODE |
512 | mvc __THREAD_per_paid(1,%r14),__LC_PER_ACCESS_ID | |
d0fc4107 | 513 | 4: REENABLE_IRQS |
c5328901 | 514 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) |
f5cdac27 | 515 | larl %r1,pgm_check_table |
aa33c8cb MS |
516 | llgh %r10,__PT_INT_CODE+2(%r11) |
517 | nill %r10,0x007f | |
b01a37a7 | 518 | sll %r10,2 |
a359bb11 | 519 | je .Lpgm_return |
b01a37a7 | 520 | lgf %r1,0(%r10,%r1) # load address of handler routine |
c5328901 | 521 | lgr %r2,%r11 # pass pointer to pt_regs |
f5cdac27 | 522 | basr %r14,%r1 # branch to interrupt-handler |
a359bb11 MS |
523 | .Lpgm_return: |
524 | LOCKDEP_SYS_EXIT | |
525 | tm __PT_PSW+1(%r11),0x01 # returning to user ? | |
526 | jno .Lsysc_restore | |
527 | j .Lsysc_tif | |
1da177e4 LT |
528 | |
529 | # | |
c5328901 | 530 | # PER event in supervisor state, must be kprobes |
1da177e4 | 531 | # |
86ed42f4 | 532 | .Lpgm_kprobe: |
c5328901 MS |
533 | REENABLE_IRQS |
534 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) | |
535 | lgr %r2,%r11 # pass pointer to pt_regs | |
536 | brasl %r14,do_per_trap | |
a359bb11 | 537 | j .Lpgm_return |
1da177e4 | 538 | |
4ba069b8 | 539 | # |
c5328901 | 540 | # single stepped system call |
4ba069b8 | 541 | # |
86ed42f4 | 542 | .Lpgm_svcper: |
c5328901 | 543 | mvc __LC_RETURN_PSW(8),__LC_SVC_NEW_PSW |
86ed42f4 | 544 | larl %r14,.Lsysc_per |
c5328901 | 545 | stg %r14,__LC_RETURN_PSW+8 |
d3a73acb | 546 | lghi %r14,_PIF_SYSCALL | _PIF_PER_TRAP |
86ed42f4 | 547 | lpswe __LC_RETURN_PSW # branch to .Lsysc_per and enable irqs |
4ba069b8 | 548 | |
1da177e4 LT |
549 | /* |
550 | * IO interrupt handler routine | |
551 | */ | |
144d634a | 552 | ENTRY(io_int_handler) |
473e66ba | 553 | STCK __LC_INT_CLOCK |
9cfb9b3c | 554 | stpt __LC_ASYNC_ENTER_TIMER |
c5328901 MS |
555 | stmg %r8,%r15,__LC_SAVE_AREA_ASYNC |
556 | lg %r10,__LC_LAST_BREAK | |
557 | lg %r12,__LC_THREAD_INFO | |
9977e886 | 558 | larl %r13,cleanup_critical |
c5328901 | 559 | lmg %r8,%r9,__LC_IO_OLD_PSW |
2acb94f4 | 560 | SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER |
c5328901 MS |
561 | stmg %r0,%r7,__PT_R0(%r11) |
562 | mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC | |
563 | stmg %r8,%r9,__PT_PSW(%r11) | |
48f6b00c | 564 | mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID |
d3a73acb | 565 | xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) |
db7e007f HC |
566 | TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ |
567 | jo .Lio_restore | |
1f194a4c | 568 | TRACE_IRQS_OFF |
c5328901 | 569 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) |
86ed42f4 | 570 | .Lio_loop: |
c5328901 | 571 | lgr %r2,%r11 # pass pointer to pt_regs |
1f44a225 MS |
572 | lghi %r3,IO_INTERRUPT |
573 | tm __PT_INT_CODE+8(%r11),0x80 # adapter interrupt ? | |
86ed42f4 | 574 | jz .Lio_call |
1f44a225 | 575 | lghi %r3,THIN_INTERRUPT |
86ed42f4 | 576 | .Lio_call: |
c5328901 | 577 | brasl %r14,do_IRQ |
83abeffb | 578 | TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPAR |
86ed42f4 | 579 | jz .Lio_return |
48f6b00c | 580 | tpi 0 |
86ed42f4 | 581 | jz .Lio_return |
48f6b00c | 582 | mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID |
86ed42f4 MS |
583 | j .Lio_loop |
584 | .Lio_return: | |
6a2df3a8 MS |
585 | LOCKDEP_SYS_EXIT |
586 | TRACE_IRQS_ON | |
86ed42f4 | 587 | .Lio_tif: |
83abeffb | 588 | TSTMSK __TI_flags(%r12),_TIF_WORK |
86ed42f4 | 589 | jnz .Lio_work # there is work to do (signals etc.) |
83abeffb | 590 | TSTMSK __LC_CPU_FLAGS,_CIF_WORK |
86ed42f4 MS |
591 | jnz .Lio_work |
592 | .Lio_restore: | |
c5328901 MS |
593 | lg %r14,__LC_VDSO_PER_CPU |
594 | lmg %r0,%r10,__PT_R0(%r11) | |
595 | mvc __LC_RETURN_PSW(16),__PT_PSW(%r11) | |
c5328901 MS |
596 | stpt __LC_EXIT_TIMER |
597 | mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER | |
598 | lmg %r11,%r15,__PT_R11(%r11) | |
599 | lpswe __LC_RETURN_PSW | |
86ed42f4 | 600 | .Lio_done: |
1da177e4 | 601 | |
2688905e | 602 | # |
43d399d2 | 603 | # There is work todo, find out in which context we have been interrupted: |
d3a73acb | 604 | # 1) if we return to user space we can do all _TIF_WORK work |
43d399d2 MS |
605 | # 2) if we return to kernel code and kvm is enabled check if we need to |
606 | # modify the psw to leave SIE | |
607 | # 3) if we return to kernel code and preemptive scheduling is enabled check | |
608 | # the preemption counter and if it is zero call preempt_schedule_irq | |
609 | # Before any work can be done, a switch to the kernel stack is required. | |
2688905e | 610 | # |
86ed42f4 | 611 | .Lio_work: |
c5328901 | 612 | tm __PT_PSW+1(%r11),0x01 # returning to user ? |
86ed42f4 | 613 | jo .Lio_work_user # yes -> do resched & signal |
43d399d2 | 614 | #ifdef CONFIG_PREEMPT |
2688905e | 615 | # check for preemptive scheduling |
86f2552b | 616 | icm %r0,15,__TI_precount(%r12) |
86ed42f4 | 617 | jnz .Lio_restore # preemption is disabled |
83abeffb | 618 | TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED |
86ed42f4 | 619 | jno .Lio_restore |
1da177e4 | 620 | # switch to kernel stack |
c5328901 MS |
621 | lg %r1,__PT_R15(%r11) |
622 | aghi %r1,-(STACK_FRAME_OVERHEAD + __PT_SIZE) | |
623 | mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11) | |
624 | xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) | |
625 | la %r11,STACK_FRAME_OVERHEAD(%r1) | |
1da177e4 | 626 | lgr %r15,%r1 |
86ed42f4 | 627 | # TRACE_IRQS_ON already done at .Lio_return, call |
6a2df3a8 MS |
628 | # TRACE_IRQS_OFF to keep things symmetrical |
629 | TRACE_IRQS_OFF | |
630 | brasl %r14,preempt_schedule_irq | |
86ed42f4 | 631 | j .Lio_return |
6a2df3a8 | 632 | #else |
86ed42f4 | 633 | j .Lio_restore |
6a2df3a8 | 634 | #endif |
1da177e4 | 635 | |
43d399d2 MS |
636 | # |
637 | # Need to do work before returning to userspace, switch to kernel stack | |
638 | # | |
86ed42f4 | 639 | .Lio_work_user: |
1da177e4 | 640 | lg %r1,__LC_KERNEL_STACK |
c5328901 MS |
641 | mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11) |
642 | xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) | |
643 | la %r11,STACK_FRAME_OVERHEAD(%r1) | |
1da177e4 | 644 | lgr %r15,%r1 |
43d399d2 | 645 | |
1da177e4 LT |
646 | # |
647 | # One of the work bits is on. Find out which one. | |
1da177e4 | 648 | # |
86ed42f4 | 649 | .Lio_work_tif: |
83abeffb | 650 | TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING |
86ed42f4 | 651 | jo .Lio_mcck_pending |
83abeffb | 652 | TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED |
86ed42f4 | 653 | jo .Lio_reschedule |
83abeffb | 654 | TSTMSK __TI_flags(%r12),_TIF_SIGPENDING |
86ed42f4 | 655 | jo .Lio_sigpending |
83abeffb | 656 | TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME |
86ed42f4 | 657 | jo .Lio_notify_resume |
83abeffb | 658 | TSTMSK __LC_CPU_FLAGS,_CIF_FPU |
9977e886 | 659 | jo .Lio_vxrs |
83abeffb | 660 | TSTMSK __LC_CPU_FLAGS,_CIF_ASCE |
86ed42f4 MS |
661 | jo .Lio_uaccess |
662 | j .Lio_return # beware of critical section cleanup | |
0eaeafa1 | 663 | |
77fa2245 | 664 | # |
d3a73acb | 665 | # _CIF_MCCK_PENDING is set, call handler |
77fa2245 | 666 | # |
86ed42f4 MS |
667 | .Lio_mcck_pending: |
668 | # TRACE_IRQS_ON already done at .Lio_return | |
b771aeac | 669 | brasl %r14,s390_handle_mcck # TIF bit will be cleared by handler |
6a2df3a8 | 670 | TRACE_IRQS_OFF |
86ed42f4 | 671 | j .Lio_return |
77fa2245 | 672 | |
457f2180 | 673 | # |
d3a73acb | 674 | # _CIF_ASCE is set, load user space asce |
457f2180 | 675 | # |
86ed42f4 | 676 | .Lio_uaccess: |
d3a73acb | 677 | ni __LC_CPU_FLAGS+7,255-_CIF_ASCE |
457f2180 | 678 | lctlg %c1,%c1,__LC_USER_ASCE # load primary asce |
86ed42f4 | 679 | j .Lio_return |
457f2180 | 680 | |
9977e886 HB |
681 | # |
682 | # CIF_FPU is set, restore floating-point controls and floating-point registers. | |
683 | # | |
684 | .Lio_vxrs: | |
685 | larl %r14,.Lio_return | |
686 | jg load_fpu_regs | |
687 | ||
1da177e4 LT |
688 | # |
689 | # _TIF_NEED_RESCHED is set, call schedule | |
25d83cbf | 690 | # |
86ed42f4 MS |
691 | .Lio_reschedule: |
692 | # TRACE_IRQS_ON already done at .Lio_return | |
c5328901 | 693 | ssm __LC_SVC_NEW_PSW # reenable interrupts |
25d83cbf | 694 | brasl %r14,schedule # call scheduler |
c5328901 | 695 | ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts |
411788ea | 696 | TRACE_IRQS_OFF |
86ed42f4 | 697 | j .Lio_return |
1da177e4 LT |
698 | |
699 | # | |
02a029b3 | 700 | # _TIF_SIGPENDING or is set, call do_signal |
1da177e4 | 701 | # |
86ed42f4 MS |
702 | .Lio_sigpending: |
703 | # TRACE_IRQS_ON already done at .Lio_return | |
c5328901 MS |
704 | ssm __LC_SVC_NEW_PSW # reenable interrupts |
705 | lgr %r2,%r11 # pass pointer to pt_regs | |
706 | brasl %r14,do_signal | |
707 | ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts | |
411788ea | 708 | TRACE_IRQS_OFF |
86ed42f4 | 709 | j .Lio_return |
1da177e4 | 710 | |
753c4dd6 MS |
711 | # |
712 | # _TIF_NOTIFY_RESUME or is set, call do_notify_resume | |
713 | # | |
86ed42f4 MS |
714 | .Lio_notify_resume: |
715 | # TRACE_IRQS_ON already done at .Lio_return | |
c5328901 MS |
716 | ssm __LC_SVC_NEW_PSW # reenable interrupts |
717 | lgr %r2,%r11 # pass pointer to pt_regs | |
718 | brasl %r14,do_notify_resume | |
719 | ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts | |
753c4dd6 | 720 | TRACE_IRQS_OFF |
86ed42f4 | 721 | j .Lio_return |
753c4dd6 | 722 | |
1da177e4 LT |
723 | /* |
724 | * External interrupt handler routine | |
725 | */ | |
144d634a | 726 | ENTRY(ext_int_handler) |
473e66ba | 727 | STCK __LC_INT_CLOCK |
9cfb9b3c | 728 | stpt __LC_ASYNC_ENTER_TIMER |
c5328901 MS |
729 | stmg %r8,%r15,__LC_SAVE_AREA_ASYNC |
730 | lg %r10,__LC_LAST_BREAK | |
731 | lg %r12,__LC_THREAD_INFO | |
9977e886 | 732 | larl %r13,cleanup_critical |
c5328901 | 733 | lmg %r8,%r9,__LC_EXT_OLD_PSW |
2acb94f4 | 734 | SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER |
c5328901 MS |
735 | stmg %r0,%r7,__PT_R0(%r11) |
736 | mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC | |
737 | stmg %r8,%r9,__PT_PSW(%r11) | |
48f6b00c MS |
738 | lghi %r1,__LC_EXT_PARAMS2 |
739 | mvc __PT_INT_CODE(4,%r11),__LC_EXT_CPU_ADDR | |
740 | mvc __PT_INT_PARM(4,%r11),__LC_EXT_PARAMS | |
741 | mvc __PT_INT_PARM_LONG(8,%r11),0(%r1) | |
d3a73acb | 742 | xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) |
db7e007f HC |
743 | TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ |
744 | jo .Lio_restore | |
1f194a4c | 745 | TRACE_IRQS_OFF |
0de9db37 | 746 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) |
c5328901 | 747 | lgr %r2,%r11 # pass pointer to pt_regs |
1f44a225 MS |
748 | lghi %r3,EXT_INTERRUPT |
749 | brasl %r14,do_IRQ | |
86ed42f4 | 750 | j .Lio_return |
1da177e4 | 751 | |
4c1051e3 | 752 | /* |
86ed42f4 | 753 | * Load idle PSW. The second "half" of this function is in .Lcleanup_idle. |
4c1051e3 MS |
754 | */ |
755 | ENTRY(psw_idle) | |
27f6b416 | 756 | stg %r3,__SF_EMPTY(%r15) |
86ed42f4 | 757 | larl %r1,.Lpsw_idle_lpsw+4 |
4c1051e3 | 758 | stg %r1,__SF_EMPTY+8(%r15) |
72d38b19 MS |
759 | #ifdef CONFIG_SMP |
760 | larl %r1,smp_cpu_mtid | |
761 | llgf %r1,0(%r1) | |
762 | ltgr %r1,%r1 | |
763 | jz .Lpsw_idle_stcctm | |
764 | .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+16(%r15) | |
765 | .Lpsw_idle_stcctm: | |
766 | #endif | |
419123f9 | 767 | oi __LC_CPU_FLAGS+7,_CIF_ENABLED_WAIT |
27f6b416 MS |
768 | STCK __CLOCK_IDLE_ENTER(%r2) |
769 | stpt __TIMER_IDLE_ENTER(%r2) | |
86ed42f4 | 770 | .Lpsw_idle_lpsw: |
4c1051e3 MS |
771 | lpswe __SF_EMPTY(%r15) |
772 | br %r14 | |
86ed42f4 | 773 | .Lpsw_idle_end: |
4c1051e3 | 774 | |
b5510d9b HB |
775 | /* |
776 | * Store floating-point controls and floating-point or vector register | |
777 | * depending whether the vector facility is available. A critical section | |
778 | * cleanup assures that the registers are stored even if interrupted for | |
779 | * some other work. The CIF_FPU flag is set to trigger a lazy restore | |
780 | * of the register contents at return from io or a system call. | |
9977e886 HB |
781 | */ |
782 | ENTRY(save_fpu_regs) | |
d0164ee2 HB |
783 | lg %r2,__LC_CURRENT |
784 | aghi %r2,__TASK_thread | |
83abeffb | 785 | TSTMSK __LC_CPU_FLAGS,_CIF_FPU |
9977e886 | 786 | bor %r14 |
d0164ee2 | 787 | stfpc __THREAD_FPU_fpc(%r2) |
9977e886 | 788 | .Lsave_fpu_regs_fpc_end: |
d0164ee2 | 789 | lg %r3,__THREAD_FPU_regs(%r2) |
83abeffb | 790 | TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX |
9977e886 HB |
791 | jz .Lsave_fpu_regs_fp # no -> store FP regs |
792 | .Lsave_fpu_regs_vx_low: | |
793 | VSTM %v0,%v15,0,%r3 # vstm 0,15,0(3) | |
794 | .Lsave_fpu_regs_vx_high: | |
795 | VSTM %v16,%v31,256,%r3 # vstm 16,31,256(3) | |
796 | j .Lsave_fpu_regs_done # -> set CIF_FPU flag | |
797 | .Lsave_fpu_regs_fp: | |
798 | std 0,0(%r3) | |
799 | std 1,8(%r3) | |
800 | std 2,16(%r3) | |
801 | std 3,24(%r3) | |
802 | std 4,32(%r3) | |
803 | std 5,40(%r3) | |
804 | std 6,48(%r3) | |
805 | std 7,56(%r3) | |
806 | std 8,64(%r3) | |
807 | std 9,72(%r3) | |
808 | std 10,80(%r3) | |
809 | std 11,88(%r3) | |
810 | std 12,96(%r3) | |
811 | std 13,104(%r3) | |
812 | std 14,112(%r3) | |
813 | std 15,120(%r3) | |
814 | .Lsave_fpu_regs_done: | |
815 | oi __LC_CPU_FLAGS+7,_CIF_FPU | |
816 | br %r14 | |
817 | .Lsave_fpu_regs_end: | |
818 | ||
b5510d9b HB |
819 | /* |
820 | * Load floating-point controls and floating-point or vector registers. | |
821 | * A critical section cleanup assures that the register contents are | |
822 | * loaded even if interrupted for some other work. | |
9977e886 HB |
823 | * |
824 | * There are special calling conventions to fit into sysc and io return work: | |
9977e886 HB |
825 | * %r15: <kernel stack> |
826 | * The function requires: | |
b5510d9b | 827 | * %r4 |
9977e886 HB |
828 | */ |
829 | load_fpu_regs: | |
d0164ee2 HB |
830 | lg %r4,__LC_CURRENT |
831 | aghi %r4,__TASK_thread | |
83abeffb | 832 | TSTMSK __LC_CPU_FLAGS,_CIF_FPU |
9977e886 | 833 | bnor %r14 |
d0164ee2 | 834 | lfpc __THREAD_FPU_fpc(%r4) |
83abeffb | 835 | TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX |
d0164ee2 | 836 | lg %r4,__THREAD_FPU_regs(%r4) # %r4 <- reg save area |
b5510d9b | 837 | jz .Lload_fpu_regs_fp # -> no VX, load FP regs |
9977e886 HB |
838 | .Lload_fpu_regs_vx: |
839 | VLM %v0,%v15,0,%r4 | |
840 | .Lload_fpu_regs_vx_high: | |
841 | VLM %v16,%v31,256,%r4 | |
842 | j .Lload_fpu_regs_done | |
9977e886 HB |
843 | .Lload_fpu_regs_fp: |
844 | ld 0,0(%r4) | |
845 | ld 1,8(%r4) | |
846 | ld 2,16(%r4) | |
847 | ld 3,24(%r4) | |
848 | ld 4,32(%r4) | |
849 | ld 5,40(%r4) | |
850 | ld 6,48(%r4) | |
851 | ld 7,56(%r4) | |
852 | ld 8,64(%r4) | |
853 | ld 9,72(%r4) | |
854 | ld 10,80(%r4) | |
855 | ld 11,88(%r4) | |
856 | ld 12,96(%r4) | |
857 | ld 13,104(%r4) | |
858 | ld 14,112(%r4) | |
859 | ld 15,120(%r4) | |
860 | .Lload_fpu_regs_done: | |
861 | ni __LC_CPU_FLAGS+7,255-_CIF_FPU | |
862 | br %r14 | |
863 | .Lload_fpu_regs_end: | |
864 | ||
86ed42f4 | 865 | .L__critical_end: |
ae6aa2ea | 866 | |
1da177e4 LT |
867 | /* |
868 | * Machine check handler routines | |
869 | */ | |
144d634a | 870 | ENTRY(mcck_int_handler) |
473e66ba | 871 | STCK __LC_MCCK_CLOCK |
77fa2245 HC |
872 | la %r1,4095 # revalidate r1 |
873 | spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer | |
25d83cbf | 874 | lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs |
c5328901 MS |
875 | lg %r10,__LC_LAST_BREAK |
876 | lg %r12,__LC_THREAD_INFO | |
9977e886 | 877 | larl %r13,cleanup_critical |
c5328901 | 878 | lmg %r8,%r9,__LC_MCK_OLD_PSW |
83abeffb | 879 | TSTMSK __LC_MCCK_CODE,MCCK_CODE_SYSTEM_DAMAGE |
86ed42f4 | 880 | jo .Lmcck_panic # yes -> rest of mcck code invalid |
c5328901 MS |
881 | lghi %r14,__LC_CPU_TIMER_SAVE_AREA |
882 | mvc __LC_MCCK_ENTER_TIMER(8),0(%r14) | |
83abeffb | 883 | TSTMSK __LC_MCCK_CODE,MCCK_CODE_CPU_TIMER_VALID |
c5328901 | 884 | jo 3f |
63b12246 MS |
885 | la %r14,__LC_SYNC_ENTER_TIMER |
886 | clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER | |
887 | jl 0f | |
888 | la %r14,__LC_ASYNC_ENTER_TIMER | |
889 | 0: clc 0(8,%r14),__LC_EXIT_TIMER | |
c5328901 | 890 | jl 1f |
63b12246 | 891 | la %r14,__LC_EXIT_TIMER |
c5328901 MS |
892 | 1: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER |
893 | jl 2f | |
63b12246 | 894 | la %r14,__LC_LAST_UPDATE_TIMER |
c5328901 | 895 | 2: spt 0(%r14) |
6377981f | 896 | mvc __LC_MCCK_ENTER_TIMER(8),0(%r14) |
83abeffb | 897 | 3: TSTMSK __LC_MCCK_CODE,(MCCK_CODE_PSW_MWP_VALID|MCCK_CODE_PSW_IA_VALID) |
86ed42f4 | 898 | jno .Lmcck_panic # no -> skip cleanup critical |
2acb94f4 | 899 | SWITCH_ASYNC __LC_GPREGS_SAVE_AREA+64,__LC_MCCK_ENTER_TIMER |
86ed42f4 | 900 | .Lmcck_skip: |
6551fbdf MS |
901 | lghi %r14,__LC_GPREGS_SAVE_AREA+64 |
902 | stmg %r0,%r7,__PT_R0(%r11) | |
903 | mvc __PT_R8(64,%r11),0(%r14) | |
c5328901 | 904 | stmg %r8,%r9,__PT_PSW(%r11) |
d3a73acb | 905 | xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11) |
c5328901 MS |
906 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) |
907 | lgr %r2,%r11 # pass pointer to pt_regs | |
77fa2245 | 908 | brasl %r14,s390_do_machine_check |
c5328901 | 909 | tm __PT_PSW+1(%r11),0x01 # returning to user ? |
86ed42f4 | 910 | jno .Lmcck_return |
77fa2245 | 911 | lg %r1,__LC_KERNEL_STACK # switch to kernel stack |
c5328901 MS |
912 | mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11) |
913 | xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) | |
914 | la %r11,STACK_FRAME_OVERHEAD(%r1) | |
77fa2245 | 915 | lgr %r15,%r1 |
c5328901 | 916 | ssm __LC_PGM_NEW_PSW # turn dat on, keep irqs off |
83abeffb | 917 | TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING |
86ed42f4 | 918 | jno .Lmcck_return |
1f194a4c | 919 | TRACE_IRQS_OFF |
77fa2245 | 920 | brasl %r14,s390_handle_mcck |
1f194a4c | 921 | TRACE_IRQS_ON |
86ed42f4 | 922 | .Lmcck_return: |
c5328901 MS |
923 | lg %r14,__LC_VDSO_PER_CPU |
924 | lmg %r0,%r10,__PT_R0(%r11) | |
925 | mvc __LC_RETURN_MCCK_PSW(16),__PT_PSW(%r11) # move return PSW | |
63b12246 MS |
926 | tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ? |
927 | jno 0f | |
928 | stpt __LC_EXIT_TIMER | |
c5328901 MS |
929 | mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER |
930 | 0: lmg %r11,%r15,__PT_R11(%r11) | |
931 | lpswe __LC_RETURN_MCCK_PSW | |
932 | ||
86ed42f4 | 933 | .Lmcck_panic: |
c5328901 | 934 | lg %r15,__LC_PANIC_STACK |
2acb94f4 | 935 | aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE) |
86ed42f4 | 936 | j .Lmcck_skip |
1da177e4 | 937 | |
7dd6b334 MH |
938 | # |
939 | # PSW restart interrupt handler | |
940 | # | |
8b646bd7 | 941 | ENTRY(restart_int_handler) |
e22cf8ca CB |
942 | TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP |
943 | jz 0f | |
944 | .insn s,0xb2800000,__LC_LPP | |
945 | 0: stg %r15,__LC_SAVE_AREA_RESTART | |
8b646bd7 | 946 | lg %r15,__LC_RESTART_STACK |
c5328901 | 947 | aghi %r15,-__PT_SIZE # create pt_regs on stack |
8b646bd7 | 948 | xc 0(__PT_SIZE,%r15),0(%r15) |
c5328901 MS |
949 | stmg %r0,%r14,__PT_R0(%r15) |
950 | mvc __PT_R15(8,%r15),__LC_SAVE_AREA_RESTART | |
951 | mvc __PT_PSW(16,%r15),__LC_RST_OLD_PSW # store restart old psw | |
8b646bd7 MS |
952 | aghi %r15,-STACK_FRAME_OVERHEAD # create stack frame on stack |
953 | xc 0(STACK_FRAME_OVERHEAD,%r15),0(%r15) | |
fbe76568 HC |
954 | lg %r1,__LC_RESTART_FN # load fn, parm & source cpu |
955 | lg %r2,__LC_RESTART_DATA | |
956 | lg %r3,__LC_RESTART_SOURCE | |
8b646bd7 MS |
957 | ltgr %r3,%r3 # test source cpu address |
958 | jm 1f # negative -> skip source stop | |
eb546195 | 959 | 0: sigp %r4,%r3,SIGP_SENSE # sigp sense to source cpu |
8b646bd7 MS |
960 | brc 10,0b # wait for status stored |
961 | 1: basr %r14,%r1 # call function | |
962 | stap __SF_EMPTY(%r15) # store cpu address | |
963 | llgh %r3,__SF_EMPTY(%r15) | |
eb546195 | 964 | 2: sigp %r4,%r3,SIGP_STOP # sigp stop to current cpu |
8b646bd7 MS |
965 | brc 2,2b |
966 | 3: j 3b | |
7dd6b334 | 967 | |
860dba45 MS |
968 | .section .kprobes.text, "ax" |
969 | ||
1da177e4 LT |
970 | #ifdef CONFIG_CHECK_STACK |
971 | /* | |
972 | * The synchronous or the asynchronous stack overflowed. We are dead. | |
973 | * No need to properly save the registers, we are going to panic anyway. | |
974 | * Setup a pt_regs so that show_trace can provide a good call trace. | |
975 | */ | |
976 | stack_overflow: | |
dc7ee00d MS |
977 | lg %r15,__LC_PANIC_STACK # change to panic stack |
978 | la %r11,STACK_FRAME_OVERHEAD(%r15) | |
c5328901 MS |
979 | stmg %r0,%r7,__PT_R0(%r11) |
980 | stmg %r8,%r9,__PT_PSW(%r11) | |
981 | mvc __PT_R8(64,%r11),0(%r14) | |
982 | stg %r10,__PT_ORIG_GPR2(%r11) # store last break to orig_gpr2 | |
c5328901 MS |
983 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) |
984 | lgr %r2,%r11 # pass pointer to pt_regs | |
1da177e4 LT |
985 | jg kernel_stack_overflow |
986 | #endif | |
987 | ||
1da177e4 | 988 | cleanup_critical: |
d0fc4107 MS |
989 | #if IS_ENABLED(CONFIG_KVM) |
990 | clg %r9,BASED(.Lcleanup_table_sie) # .Lsie_gmap | |
991 | jl 0f | |
992 | clg %r9,BASED(.Lcleanup_table_sie+8)# .Lsie_done | |
993 | jl .Lcleanup_sie | |
994 | #endif | |
86ed42f4 | 995 | clg %r9,BASED(.Lcleanup_table) # system_call |
1da177e4 | 996 | jl 0f |
86ed42f4 MS |
997 | clg %r9,BASED(.Lcleanup_table+8) # .Lsysc_do_svc |
998 | jl .Lcleanup_system_call | |
999 | clg %r9,BASED(.Lcleanup_table+16) # .Lsysc_tif | |
1da177e4 | 1000 | jl 0f |
86ed42f4 MS |
1001 | clg %r9,BASED(.Lcleanup_table+24) # .Lsysc_restore |
1002 | jl .Lcleanup_sysc_tif | |
1003 | clg %r9,BASED(.Lcleanup_table+32) # .Lsysc_done | |
1004 | jl .Lcleanup_sysc_restore | |
1005 | clg %r9,BASED(.Lcleanup_table+40) # .Lio_tif | |
63b12246 | 1006 | jl 0f |
86ed42f4 MS |
1007 | clg %r9,BASED(.Lcleanup_table+48) # .Lio_restore |
1008 | jl .Lcleanup_io_tif | |
1009 | clg %r9,BASED(.Lcleanup_table+56) # .Lio_done | |
1010 | jl .Lcleanup_io_restore | |
1011 | clg %r9,BASED(.Lcleanup_table+64) # psw_idle | |
4c1051e3 | 1012 | jl 0f |
86ed42f4 MS |
1013 | clg %r9,BASED(.Lcleanup_table+72) # .Lpsw_idle_end |
1014 | jl .Lcleanup_idle | |
9977e886 HB |
1015 | clg %r9,BASED(.Lcleanup_table+80) # save_fpu_regs |
1016 | jl 0f | |
1017 | clg %r9,BASED(.Lcleanup_table+88) # .Lsave_fpu_regs_end | |
1018 | jl .Lcleanup_save_fpu_regs | |
1019 | clg %r9,BASED(.Lcleanup_table+96) # load_fpu_regs | |
1020 | jl 0f | |
1021 | clg %r9,BASED(.Lcleanup_table+104) # .Lload_fpu_regs_end | |
1022 | jl .Lcleanup_load_fpu_regs | |
c5328901 MS |
1023 | 0: br %r14 |
1024 | ||
d0fc4107 MS |
1025 | .align 8 |
1026 | .Lcleanup_table: | |
1027 | .quad system_call | |
1028 | .quad .Lsysc_do_svc | |
1029 | .quad .Lsysc_tif | |
1030 | .quad .Lsysc_restore | |
1031 | .quad .Lsysc_done | |
1032 | .quad .Lio_tif | |
1033 | .quad .Lio_restore | |
1034 | .quad .Lio_done | |
1035 | .quad psw_idle | |
1036 | .quad .Lpsw_idle_end | |
1037 | .quad save_fpu_regs | |
1038 | .quad .Lsave_fpu_regs_end | |
1039 | .quad load_fpu_regs | |
1040 | .quad .Lload_fpu_regs_end | |
d0fc4107 MS |
1041 | |
1042 | #if IS_ENABLED(CONFIG_KVM) | |
1043 | .Lcleanup_table_sie: | |
1044 | .quad .Lsie_gmap | |
1045 | .quad .Lsie_done | |
1046 | ||
1047 | .Lcleanup_sie: | |
1048 | lg %r9,__SF_EMPTY(%r15) # get control block pointer | |
e22cf8ca | 1049 | ni __SIE_PROG0C+3(%r9),0xfe # no longer in SIE |
d0fc4107 MS |
1050 | lctlg %c1,%c1,__LC_USER_ASCE # load primary asce |
1051 | larl %r9,sie_exit # skip forward to sie_exit | |
1052 | br %r14 | |
1053 | #endif | |
1da177e4 | 1054 | |
86ed42f4 | 1055 | .Lcleanup_system_call: |
c5328901 | 1056 | # check if stpt has been executed |
86ed42f4 | 1057 | clg %r9,BASED(.Lcleanup_system_call_insn) |
1da177e4 LT |
1058 | jh 0f |
1059 | mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER | |
c5328901 | 1060 | cghi %r11,__LC_SAVE_AREA_ASYNC |
6377981f | 1061 | je 0f |
c5328901 MS |
1062 | mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER |
1063 | 0: # check if stmg has been executed | |
86ed42f4 | 1064 | clg %r9,BASED(.Lcleanup_system_call_insn+8) |
1da177e4 | 1065 | jh 0f |
c5328901 MS |
1066 | mvc __LC_SAVE_AREA_SYNC(64),0(%r11) |
1067 | 0: # check if base register setup + TIF bit load has been done | |
86ed42f4 | 1068 | clg %r9,BASED(.Lcleanup_system_call_insn+16) |
c5328901 MS |
1069 | jhe 0f |
1070 | # set up saved registers r10 and r12 | |
1071 | stg %r10,16(%r11) # r10 last break | |
1072 | stg %r12,32(%r11) # r12 thread-info pointer | |
1073 | 0: # check if the user time update has been done | |
86ed42f4 | 1074 | clg %r9,BASED(.Lcleanup_system_call_insn+24) |
c5328901 MS |
1075 | jh 0f |
1076 | lg %r15,__LC_EXIT_TIMER | |
1077 | slg %r15,__LC_SYNC_ENTER_TIMER | |
1078 | alg %r15,__LC_USER_TIMER | |
1079 | stg %r15,__LC_USER_TIMER | |
1080 | 0: # check if the system time update has been done | |
86ed42f4 | 1081 | clg %r9,BASED(.Lcleanup_system_call_insn+32) |
c5328901 MS |
1082 | jh 0f |
1083 | lg %r15,__LC_LAST_UPDATE_TIMER | |
1084 | slg %r15,__LC_EXIT_TIMER | |
1085 | alg %r15,__LC_SYSTEM_TIMER | |
1086 | stg %r15,__LC_SYSTEM_TIMER | |
1087 | 0: # update accounting time stamp | |
1da177e4 | 1088 | mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER |
c5328901 MS |
1089 | # do LAST_BREAK |
1090 | lg %r9,16(%r11) | |
1091 | srag %r9,%r9,23 | |
86f2552b | 1092 | jz 0f |
c5328901 MS |
1093 | mvc __TI_last_break(8,%r12),16(%r11) |
1094 | 0: # set up saved register r11 | |
1095 | lg %r15,__LC_KERNEL_STACK | |
dc7ee00d MS |
1096 | la %r9,STACK_FRAME_OVERHEAD(%r15) |
1097 | stg %r9,24(%r11) # r11 pt_regs pointer | |
c5328901 | 1098 | # fill pt_regs |
dc7ee00d MS |
1099 | mvc __PT_R8(64,%r9),__LC_SAVE_AREA_SYNC |
1100 | stmg %r0,%r7,__PT_R0(%r9) | |
1101 | mvc __PT_PSW(16,%r9),__LC_SVC_OLD_PSW | |
1102 | mvc __PT_INT_CODE(4,%r9),__LC_SVC_ILC | |
d3a73acb MS |
1103 | xc __PT_FLAGS(8,%r9),__PT_FLAGS(%r9) |
1104 | mvi __PT_FLAGS+7(%r9),_PIF_SYSCALL | |
c5328901 | 1105 | # setup saved register r15 |
c5328901 MS |
1106 | stg %r15,56(%r11) # r15 stack pointer |
1107 | # set new psw address and exit | |
86ed42f4 | 1108 | larl %r9,.Lsysc_do_svc |
1da177e4 | 1109 | br %r14 |
86ed42f4 | 1110 | .Lcleanup_system_call_insn: |
25d83cbf | 1111 | .quad system_call |
86ed42f4 MS |
1112 | .quad .Lsysc_stmg |
1113 | .quad .Lsysc_per | |
a359bb11 | 1114 | .quad .Lsysc_vtime+36 |
86ed42f4 | 1115 | .quad .Lsysc_vtime+42 |
1da177e4 | 1116 | |
86ed42f4 MS |
1117 | .Lcleanup_sysc_tif: |
1118 | larl %r9,.Lsysc_tif | |
1da177e4 LT |
1119 | br %r14 |
1120 | ||
86ed42f4 MS |
1121 | .Lcleanup_sysc_restore: |
1122 | clg %r9,BASED(.Lcleanup_sysc_restore_insn) | |
6377981f | 1123 | je 0f |
c5328901 MS |
1124 | lg %r9,24(%r11) # get saved pointer to pt_regs |
1125 | mvc __LC_RETURN_PSW(16),__PT_PSW(%r9) | |
1126 | mvc 0(64,%r11),__PT_R8(%r9) | |
1127 | lmg %r0,%r7,__PT_R0(%r9) | |
1128 | 0: lmg %r8,%r9,__LC_RETURN_PSW | |
1da177e4 | 1129 | br %r14 |
86ed42f4 MS |
1130 | .Lcleanup_sysc_restore_insn: |
1131 | .quad .Lsysc_done - 4 | |
1da177e4 | 1132 | |
86ed42f4 MS |
1133 | .Lcleanup_io_tif: |
1134 | larl %r9,.Lio_tif | |
176b1803 MS |
1135 | br %r14 |
1136 | ||
86ed42f4 MS |
1137 | .Lcleanup_io_restore: |
1138 | clg %r9,BASED(.Lcleanup_io_restore_insn) | |
c5328901 MS |
1139 | je 0f |
1140 | lg %r9,24(%r11) # get saved r11 pointer to pt_regs | |
1141 | mvc __LC_RETURN_PSW(16),__PT_PSW(%r9) | |
c5328901 MS |
1142 | mvc 0(64,%r11),__PT_R8(%r9) |
1143 | lmg %r0,%r7,__PT_R0(%r9) | |
1144 | 0: lmg %r8,%r9,__LC_RETURN_PSW | |
ae6aa2ea | 1145 | br %r14 |
86ed42f4 MS |
1146 | .Lcleanup_io_restore_insn: |
1147 | .quad .Lio_done - 4 | |
ae6aa2ea | 1148 | |
86ed42f4 | 1149 | .Lcleanup_idle: |
419123f9 | 1150 | ni __LC_CPU_FLAGS+7,255-_CIF_ENABLED_WAIT |
4c1051e3 | 1151 | # copy interrupt clock & cpu timer |
27f6b416 MS |
1152 | mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_INT_CLOCK |
1153 | mvc __TIMER_IDLE_EXIT(8,%r2),__LC_ASYNC_ENTER_TIMER | |
4c1051e3 MS |
1154 | cghi %r11,__LC_SAVE_AREA_ASYNC |
1155 | je 0f | |
27f6b416 MS |
1156 | mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_MCCK_CLOCK |
1157 | mvc __TIMER_IDLE_EXIT(8,%r2),__LC_MCCK_ENTER_TIMER | |
4c1051e3 | 1158 | 0: # check if stck & stpt have been executed |
86ed42f4 | 1159 | clg %r9,BASED(.Lcleanup_idle_insn) |
4c1051e3 | 1160 | jhe 1f |
27f6b416 MS |
1161 | mvc __CLOCK_IDLE_ENTER(8,%r2),__CLOCK_IDLE_EXIT(%r2) |
1162 | mvc __TIMER_IDLE_ENTER(8,%r2),__TIMER_IDLE_EXIT(%r2) | |
72d38b19 MS |
1163 | 1: # calculate idle cycles |
1164 | #ifdef CONFIG_SMP | |
1165 | clg %r9,BASED(.Lcleanup_idle_insn) | |
1166 | jl 3f | |
1167 | larl %r1,smp_cpu_mtid | |
1168 | llgf %r1,0(%r1) | |
1169 | ltgr %r1,%r1 | |
1170 | jz 3f | |
1171 | .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+80(%r15) | |
1172 | larl %r3,mt_cycles | |
1173 | ag %r3,__LC_PERCPU_OFFSET | |
1174 | la %r4,__SF_EMPTY+16(%r15) | |
1175 | 2: lg %r0,0(%r3) | |
1176 | slg %r0,0(%r4) | |
1177 | alg %r0,64(%r4) | |
1178 | stg %r0,0(%r3) | |
1179 | la %r3,8(%r3) | |
1180 | la %r4,8(%r4) | |
1181 | brct %r1,2b | |
1182 | #endif | |
1183 | 3: # account system time going idle | |
4c1051e3 | 1184 | lg %r9,__LC_STEAL_TIMER |
27f6b416 | 1185 | alg %r9,__CLOCK_IDLE_ENTER(%r2) |
4c1051e3 MS |
1186 | slg %r9,__LC_LAST_UPDATE_CLOCK |
1187 | stg %r9,__LC_STEAL_TIMER | |
27f6b416 | 1188 | mvc __LC_LAST_UPDATE_CLOCK(8),__CLOCK_IDLE_EXIT(%r2) |
4c1051e3 MS |
1189 | lg %r9,__LC_SYSTEM_TIMER |
1190 | alg %r9,__LC_LAST_UPDATE_TIMER | |
27f6b416 | 1191 | slg %r9,__TIMER_IDLE_ENTER(%r2) |
4c1051e3 | 1192 | stg %r9,__LC_SYSTEM_TIMER |
27f6b416 | 1193 | mvc __LC_LAST_UPDATE_TIMER(8),__TIMER_IDLE_EXIT(%r2) |
4c1051e3 | 1194 | # prepare return psw |
0587d409 | 1195 | nihh %r8,0xfcfd # clear irq & wait state bits |
4c1051e3 MS |
1196 | lg %r9,48(%r11) # return from psw_idle |
1197 | br %r14 | |
86ed42f4 MS |
1198 | .Lcleanup_idle_insn: |
1199 | .quad .Lpsw_idle_lpsw | |
4c1051e3 | 1200 | |
9977e886 | 1201 | .Lcleanup_save_fpu_regs: |
83abeffb | 1202 | TSTMSK __LC_CPU_FLAGS,_CIF_FPU |
9977e886 HB |
1203 | bor %r14 |
1204 | clg %r9,BASED(.Lcleanup_save_fpu_regs_done) | |
1205 | jhe 5f | |
1206 | clg %r9,BASED(.Lcleanup_save_fpu_regs_fp) | |
1207 | jhe 4f | |
1208 | clg %r9,BASED(.Lcleanup_save_fpu_regs_vx_high) | |
1209 | jhe 3f | |
1210 | clg %r9,BASED(.Lcleanup_save_fpu_regs_vx_low) | |
1211 | jhe 2f | |
1212 | clg %r9,BASED(.Lcleanup_save_fpu_fpc_end) | |
1213 | jhe 1f | |
d0164ee2 | 1214 | lg %r2,__LC_CURRENT |
9380cf5a | 1215 | aghi %r2,__TASK_thread |
9977e886 | 1216 | 0: # Store floating-point controls |
d0164ee2 | 1217 | stfpc __THREAD_FPU_fpc(%r2) |
9977e886 | 1218 | 1: # Load register save area and check if VX is active |
d0164ee2 | 1219 | lg %r3,__THREAD_FPU_regs(%r2) |
83abeffb | 1220 | TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX |
9977e886 HB |
1221 | jz 4f # no VX -> store FP regs |
1222 | 2: # Store vector registers (V0-V15) | |
1223 | VSTM %v0,%v15,0,%r3 # vstm 0,15,0(3) | |
1224 | 3: # Store vector registers (V16-V31) | |
1225 | VSTM %v16,%v31,256,%r3 # vstm 16,31,256(3) | |
1226 | j 5f # -> done, set CIF_FPU flag | |
1227 | 4: # Store floating-point registers | |
1228 | std 0,0(%r3) | |
1229 | std 1,8(%r3) | |
1230 | std 2,16(%r3) | |
1231 | std 3,24(%r3) | |
1232 | std 4,32(%r3) | |
1233 | std 5,40(%r3) | |
1234 | std 6,48(%r3) | |
1235 | std 7,56(%r3) | |
1236 | std 8,64(%r3) | |
1237 | std 9,72(%r3) | |
1238 | std 10,80(%r3) | |
1239 | std 11,88(%r3) | |
1240 | std 12,96(%r3) | |
1241 | std 13,104(%r3) | |
1242 | std 14,112(%r3) | |
1243 | std 15,120(%r3) | |
1244 | 5: # Set CIF_FPU flag | |
1245 | oi __LC_CPU_FLAGS+7,_CIF_FPU | |
1246 | lg %r9,48(%r11) # return from save_fpu_regs | |
1247 | br %r14 | |
1248 | .Lcleanup_save_fpu_fpc_end: | |
1249 | .quad .Lsave_fpu_regs_fpc_end | |
1250 | .Lcleanup_save_fpu_regs_vx_low: | |
1251 | .quad .Lsave_fpu_regs_vx_low | |
1252 | .Lcleanup_save_fpu_regs_vx_high: | |
1253 | .quad .Lsave_fpu_regs_vx_high | |
1254 | .Lcleanup_save_fpu_regs_fp: | |
1255 | .quad .Lsave_fpu_regs_fp | |
1256 | .Lcleanup_save_fpu_regs_done: | |
1257 | .quad .Lsave_fpu_regs_done | |
1258 | ||
1259 | .Lcleanup_load_fpu_regs: | |
83abeffb | 1260 | TSTMSK __LC_CPU_FLAGS,_CIF_FPU |
9977e886 HB |
1261 | bnor %r14 |
1262 | clg %r9,BASED(.Lcleanup_load_fpu_regs_done) | |
1263 | jhe 1f | |
1264 | clg %r9,BASED(.Lcleanup_load_fpu_regs_fp) | |
1265 | jhe 2f | |
9977e886 | 1266 | clg %r9,BASED(.Lcleanup_load_fpu_regs_vx_high) |
b5510d9b | 1267 | jhe 3f |
9977e886 | 1268 | clg %r9,BASED(.Lcleanup_load_fpu_regs_vx) |
b5510d9b | 1269 | jhe 4f |
d0164ee2 | 1270 | lg %r4,__LC_CURRENT |
9380cf5a | 1271 | aghi %r4,__TASK_thread |
d0164ee2 | 1272 | lfpc __THREAD_FPU_fpc(%r4) |
83abeffb | 1273 | TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX |
d0164ee2 | 1274 | lg %r4,__THREAD_FPU_regs(%r4) # %r4 <- reg save area |
b5510d9b HB |
1275 | jz 2f # -> no VX, load FP regs |
1276 | 4: # Load V0 ..V15 registers | |
9977e886 | 1277 | VLM %v0,%v15,0,%r4 |
b5510d9b | 1278 | 3: # Load V16..V31 registers |
9977e886 HB |
1279 | VLM %v16,%v31,256,%r4 |
1280 | j 1f | |
9977e886 HB |
1281 | 2: # Load floating-point registers |
1282 | ld 0,0(%r4) | |
1283 | ld 1,8(%r4) | |
1284 | ld 2,16(%r4) | |
1285 | ld 3,24(%r4) | |
1286 | ld 4,32(%r4) | |
1287 | ld 5,40(%r4) | |
1288 | ld 6,48(%r4) | |
1289 | ld 7,56(%r4) | |
1290 | ld 8,64(%r4) | |
1291 | ld 9,72(%r4) | |
1292 | ld 10,80(%r4) | |
1293 | ld 11,88(%r4) | |
1294 | ld 12,96(%r4) | |
1295 | ld 13,104(%r4) | |
1296 | ld 14,112(%r4) | |
1297 | ld 15,120(%r4) | |
1298 | 1: # Clear CIF_FPU bit | |
1299 | ni __LC_CPU_FLAGS+7,255-_CIF_FPU | |
1300 | lg %r9,48(%r11) # return from load_fpu_regs | |
1301 | br %r14 | |
9977e886 HB |
1302 | .Lcleanup_load_fpu_regs_vx: |
1303 | .quad .Lload_fpu_regs_vx | |
1304 | .Lcleanup_load_fpu_regs_vx_high: | |
1305 | .quad .Lload_fpu_regs_vx_high | |
9977e886 HB |
1306 | .Lcleanup_load_fpu_regs_fp: |
1307 | .quad .Lload_fpu_regs_fp | |
1308 | .Lcleanup_load_fpu_regs_done: | |
1309 | .quad .Lload_fpu_regs_done | |
1310 | ||
1da177e4 LT |
1311 | /* |
1312 | * Integer constants | |
1313 | */ | |
c5328901 | 1314 | .align 8 |
1da177e4 | 1315 | .Lcritical_start: |
86ed42f4 | 1316 | .quad .L__critical_start |
c5328901 | 1317 | .Lcritical_length: |
86ed42f4 | 1318 | .quad .L__critical_end - .L__critical_start |
61aa4884 | 1319 | #if IS_ENABLED(CONFIG_KVM) |
d0fc4107 | 1320 | .Lsie_critical_start: |
86ed42f4 | 1321 | .quad .Lsie_gmap |
7c470539 | 1322 | .Lsie_critical_length: |
86ed42f4 | 1323 | .quad .Lsie_done - .Lsie_gmap |
603d1a50 MS |
1324 | #endif |
1325 | ||
a876cb3f HC |
1326 | .section .rodata, "a" |
1327 | #define SYSCALL(esame,emu) .long esame | |
9bf1226b | 1328 | .globl sys_call_table |
1da177e4 LT |
1329 | sys_call_table: |
1330 | #include "syscalls.S" | |
1331 | #undef SYSCALL | |
1332 | ||
347a8dc3 | 1333 | #ifdef CONFIG_COMPAT |
1da177e4 | 1334 | |
a876cb3f | 1335 | #define SYSCALL(esame,emu) .long emu |
61649881 | 1336 | .globl sys_call_table_emu |
1da177e4 LT |
1337 | sys_call_table_emu: |
1338 | #include "syscalls.S" | |
1339 | #undef SYSCALL | |
1340 | #endif |