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1da177e4 1/*
8b646bd7 2 * SMP related functions
1da177e4 3 *
a53c8fab 4 * Copyright IBM Corp. 1999, 2012
8b646bd7
MS
5 * Author(s): Denis Joseph Barrow,
6 * Martin Schwidefsky <schwidefsky@de.ibm.com>,
7 * Heiko Carstens <heiko.carstens@de.ibm.com>,
1da177e4 8 *
39ce010d 9 * based on other smp stuff by
1da177e4
LT
10 * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net>
11 * (c) 1998 Ingo Molnar
12 *
8b646bd7
MS
13 * The code outside of smp.c uses logical cpu numbers, only smp.c does
14 * the translation of logical to physical cpu ids. All new code that
15 * operates on physical cpu numbers needs to go into smp.c.
1da177e4
LT
16 */
17
395d31d4
MS
18#define KMSG_COMPONENT "cpu"
19#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
20
f230886b 21#include <linux/workqueue.h>
1da177e4
LT
22#include <linux/module.h>
23#include <linux/init.h>
1da177e4 24#include <linux/mm.h>
4e950f6f 25#include <linux/err.h>
1da177e4
LT
26#include <linux/spinlock.h>
27#include <linux/kernel_stat.h>
1da177e4 28#include <linux/delay.h>
1da177e4 29#include <linux/interrupt.h>
3324e60a 30#include <linux/irqflags.h>
1da177e4 31#include <linux/cpu.h>
5a0e3ad6 32#include <linux/slab.h>
60a0c68d 33#include <linux/crash_dump.h>
cbb870c8 34#include <asm/asm-offsets.h>
1e3cab2f
HC
35#include <asm/switch_to.h>
36#include <asm/facility.h>
46b05d26 37#include <asm/ipl.h>
2b67fc46 38#include <asm/setup.h>
1da177e4 39#include <asm/irq.h>
1da177e4 40#include <asm/tlbflush.h>
27f6b416 41#include <asm/vtimer.h>
411ed322 42#include <asm/lowcore.h>
08d07968 43#include <asm/sclp.h>
c742b31c 44#include <asm/vdso.h>
3ab121ab 45#include <asm/debug.h>
4857d4bb 46#include <asm/os_info.h>
a9ae32c3 47#include <asm/sigp.h>
b5f87f15 48#include <asm/idle.h>
a806170e 49#include "entry.h"
1da177e4 50
8b646bd7
MS
51enum {
52 ec_schedule = 0,
8b646bd7
MS
53 ec_call_function_single,
54 ec_stop_cpu,
55};
08d07968 56
8b646bd7 57enum {
08d07968
HC
58 CPU_STATE_STANDBY,
59 CPU_STATE_CONFIGURED,
60};
61
8b646bd7 62struct pcpu {
96619fc1 63 struct cpu *cpu;
8b646bd7
MS
64 struct _lowcore *lowcore; /* lowcore page(s) for the cpu */
65 unsigned long async_stack; /* async stack for the cpu */
66 unsigned long panic_stack; /* panic stack for the cpu */
67 unsigned long ec_mask; /* bit mask for ec_xxx functions */
68 int state; /* physical cpu state */
50ab9a9a 69 int polarization; /* physical polarization */
8b646bd7
MS
70 u16 address; /* physical cpu address */
71};
72
73static u8 boot_cpu_type;
74static u16 boot_cpu_address;
75static struct pcpu pcpu_devices[NR_CPUS];
76
50ab9a9a
HC
77/*
78 * The smp_cpu_state_mutex must be held when changing the state or polarization
79 * member of a pcpu data structure within the pcpu_devices arreay.
80 */
dbd70fb4 81DEFINE_MUTEX(smp_cpu_state_mutex);
08d07968 82
8b646bd7
MS
83/*
84 * Signal processor helper functions.
85 */
8b646bd7 86static inline int __pcpu_sigp_relax(u16 addr, u8 order, u32 parm, u32 *status)
5c0b912e 87{
8b646bd7 88 int cc;
5c0b912e 89
8b646bd7 90 while (1) {
c5e3acd6 91 cc = __pcpu_sigp(addr, order, parm, NULL);
a9ae32c3 92 if (cc != SIGP_CC_BUSY)
8b646bd7
MS
93 return cc;
94 cpu_relax();
5c0b912e 95 }
5c0b912e
HC
96}
97
8b646bd7 98static int pcpu_sigp_retry(struct pcpu *pcpu, u8 order, u32 parm)
a93b8ec1 99{
8b646bd7
MS
100 int cc, retry;
101
102 for (retry = 0; ; retry++) {
c5e3acd6 103 cc = __pcpu_sigp(pcpu->address, order, parm, NULL);
a9ae32c3 104 if (cc != SIGP_CC_BUSY)
8b646bd7
MS
105 break;
106 if (retry >= 3)
107 udelay(10);
108 }
109 return cc;
110}
111
112static inline int pcpu_stopped(struct pcpu *pcpu)
113{
41459d36 114 u32 uninitialized_var(status);
c5e3acd6 115
a9ae32c3 116 if (__pcpu_sigp(pcpu->address, SIGP_SENSE,
c5e3acd6 117 0, &status) != SIGP_CC_STATUS_STORED)
8b646bd7 118 return 0;
c5e3acd6 119 return !!(status & (SIGP_STATUS_CHECK_STOP|SIGP_STATUS_STOPPED));
8b646bd7
MS
120}
121
122static inline int pcpu_running(struct pcpu *pcpu)
a93b8ec1 123{
a9ae32c3 124 if (__pcpu_sigp(pcpu->address, SIGP_SENSE_RUNNING,
c5e3acd6 125 0, NULL) != SIGP_CC_STATUS_STORED)
8b646bd7 126 return 1;
524b24ad
HC
127 /* Status stored condition code is equivalent to cpu not running. */
128 return 0;
a93b8ec1
HC
129}
130
1943f53c 131/*
8b646bd7 132 * Find struct pcpu by cpu address.
1943f53c 133 */
8b646bd7 134static struct pcpu *pcpu_find_address(const struct cpumask *mask, int address)
1943f53c
MH
135{
136 int cpu;
137
8b646bd7
MS
138 for_each_cpu(cpu, mask)
139 if (pcpu_devices[cpu].address == address)
140 return pcpu_devices + cpu;
141 return NULL;
142}
143
144static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit)
145{
146 int order;
147
dea24190
HC
148 if (test_and_set_bit(ec_bit, &pcpu->ec_mask))
149 return;
150 order = pcpu_running(pcpu) ? SIGP_EXTERNAL_CALL : SIGP_EMERGENCY_SIGNAL;
8b646bd7
MS
151 pcpu_sigp_retry(pcpu, order, 0);
152}
153
e2741f17 154static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu)
8b646bd7
MS
155{
156 struct _lowcore *lc;
157
158 if (pcpu != &pcpu_devices[0]) {
159 pcpu->lowcore = (struct _lowcore *)
160 __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
161 pcpu->async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
162 pcpu->panic_stack = __get_free_page(GFP_KERNEL);
163 if (!pcpu->lowcore || !pcpu->panic_stack || !pcpu->async_stack)
164 goto out;
1943f53c 165 }
8b646bd7
MS
166 lc = pcpu->lowcore;
167 memcpy(lc, &S390_lowcore, 512);
168 memset((char *) lc + 512, 0, sizeof(*lc) - 512);
dc7ee00d
MS
169 lc->async_stack = pcpu->async_stack + ASYNC_SIZE
170 - STACK_FRAME_OVERHEAD - sizeof(struct pt_regs);
171 lc->panic_stack = pcpu->panic_stack + PAGE_SIZE
172 - STACK_FRAME_OVERHEAD - sizeof(struct pt_regs);
8b646bd7 173 lc->cpu_nr = cpu;
6c8cd5bb 174 lc->spinlock_lockval = arch_spin_lockval(cpu);
8b646bd7
MS
175#ifndef CONFIG_64BIT
176 if (MACHINE_HAS_IEEE) {
177 lc->extended_save_area_addr = get_zeroed_page(GFP_KERNEL);
178 if (!lc->extended_save_area_addr)
179 goto out;
180 }
181#else
80703617
MS
182 if (MACHINE_HAS_VX)
183 lc->vector_save_area_addr =
184 (unsigned long) &lc->vector_save_area;
8b646bd7
MS
185 if (vdso_alloc_per_cpu(lc))
186 goto out;
187#endif
188 lowcore_ptr[cpu] = lc;
a9ae32c3 189 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, (u32)(unsigned long) lc);
8b646bd7
MS
190 return 0;
191out:
192 if (pcpu != &pcpu_devices[0]) {
193 free_page(pcpu->panic_stack);
194 free_pages(pcpu->async_stack, ASYNC_ORDER);
195 free_pages((unsigned long) pcpu->lowcore, LC_ORDER);
196 }
197 return -ENOMEM;
1943f53c
MH
198}
199
9d0f46af
HC
200#ifdef CONFIG_HOTPLUG_CPU
201
8b646bd7 202static void pcpu_free_lowcore(struct pcpu *pcpu)
2c2df118 203{
a9ae32c3 204 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, 0);
8b646bd7
MS
205 lowcore_ptr[pcpu - pcpu_devices] = NULL;
206#ifndef CONFIG_64BIT
207 if (MACHINE_HAS_IEEE) {
208 struct _lowcore *lc = pcpu->lowcore;
209
210 free_page((unsigned long) lc->extended_save_area_addr);
211 lc->extended_save_area_addr = 0;
212 }
213#else
214 vdso_free_per_cpu(pcpu->lowcore);
215#endif
216 if (pcpu != &pcpu_devices[0]) {
217 free_page(pcpu->panic_stack);
218 free_pages(pcpu->async_stack, ASYNC_ORDER);
219 free_pages((unsigned long) pcpu->lowcore, LC_ORDER);
220 }
221}
222
9d0f46af
HC
223#endif /* CONFIG_HOTPLUG_CPU */
224
8b646bd7
MS
225static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu)
226{
227 struct _lowcore *lc = pcpu->lowcore;
228
1b948d6c
MS
229 if (MACHINE_HAS_TLB_LC)
230 cpumask_set_cpu(cpu, &init_mm.context.cpu_attach_mask);
231 cpumask_set_cpu(cpu, mm_cpumask(&init_mm));
8b646bd7
MS
232 atomic_inc(&init_mm.context.attach_count);
233 lc->cpu_nr = cpu;
6c8cd5bb 234 lc->spinlock_lockval = arch_spin_lockval(cpu);
8b646bd7
MS
235 lc->percpu_offset = __per_cpu_offset[cpu];
236 lc->kernel_asce = S390_lowcore.kernel_asce;
237 lc->machine_flags = S390_lowcore.machine_flags;
238 lc->ftrace_func = S390_lowcore.ftrace_func;
239 lc->user_timer = lc->system_timer = lc->steal_timer = 0;
240 __ctl_store(lc->cregs_save_area, 0, 15);
241 save_access_regs((unsigned int *) lc->access_regs_save_area);
242 memcpy(lc->stfle_fac_list, S390_lowcore.stfle_fac_list,
243 MAX_FACILITY_BIT/8);
244}
245
246static void pcpu_attach_task(struct pcpu *pcpu, struct task_struct *tsk)
247{
248 struct _lowcore *lc = pcpu->lowcore;
249 struct thread_info *ti = task_thread_info(tsk);
250
dc7ee00d
MS
251 lc->kernel_stack = (unsigned long) task_stack_page(tsk)
252 + THREAD_SIZE - STACK_FRAME_OVERHEAD - sizeof(struct pt_regs);
8b646bd7
MS
253 lc->thread_info = (unsigned long) task_thread_info(tsk);
254 lc->current_task = (unsigned long) tsk;
255 lc->user_timer = ti->user_timer;
256 lc->system_timer = ti->system_timer;
257 lc->steal_timer = 0;
258}
259
260static void pcpu_start_fn(struct pcpu *pcpu, void (*func)(void *), void *data)
261{
262 struct _lowcore *lc = pcpu->lowcore;
263
264 lc->restart_stack = lc->kernel_stack;
265 lc->restart_fn = (unsigned long) func;
266 lc->restart_data = (unsigned long) data;
267 lc->restart_source = -1UL;
a9ae32c3 268 pcpu_sigp_retry(pcpu, SIGP_RESTART, 0);
8b646bd7
MS
269}
270
271/*
272 * Call function via PSW restart on pcpu and stop the current cpu.
273 */
274static void pcpu_delegate(struct pcpu *pcpu, void (*func)(void *),
275 void *data, unsigned long stack)
276{
061da3df 277 struct _lowcore *lc = lowcore_ptr[pcpu - pcpu_devices];
fbe76568 278 unsigned long source_cpu = stap();
8b646bd7 279
e258d719 280 __load_psw_mask(PSW_KERNEL_BITS);
fbe76568 281 if (pcpu->address == source_cpu)
8b646bd7
MS
282 func(data); /* should not return */
283 /* Stop target cpu (if func returns this stops the current cpu). */
a9ae32c3 284 pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
8b646bd7 285 /* Restart func on the target cpu and stop the current cpu. */
fbe76568
HC
286 mem_assign_absolute(lc->restart_stack, stack);
287 mem_assign_absolute(lc->restart_fn, (unsigned long) func);
288 mem_assign_absolute(lc->restart_data, (unsigned long) data);
289 mem_assign_absolute(lc->restart_source, source_cpu);
8b646bd7 290 asm volatile(
eb546195 291 "0: sigp 0,%0,%2 # sigp restart to target cpu\n"
8b646bd7 292 " brc 2,0b # busy, try again\n"
eb546195 293 "1: sigp 0,%1,%3 # sigp stop to current cpu\n"
8b646bd7 294 " brc 2,1b # busy, try again\n"
fbe76568 295 : : "d" (pcpu->address), "d" (source_cpu),
eb546195
HC
296 "K" (SIGP_RESTART), "K" (SIGP_STOP)
297 : "0", "1", "cc");
8b646bd7
MS
298 for (;;) ;
299}
300
301/*
302 * Call function on an online CPU.
303 */
304void smp_call_online_cpu(void (*func)(void *), void *data)
305{
306 struct pcpu *pcpu;
307
308 /* Use the current cpu if it is online. */
309 pcpu = pcpu_find_address(cpu_online_mask, stap());
310 if (!pcpu)
311 /* Use the first online cpu. */
312 pcpu = pcpu_devices + cpumask_first(cpu_online_mask);
313 pcpu_delegate(pcpu, func, data, (unsigned long) restart_stack);
314}
315
316/*
317 * Call function on the ipl CPU.
318 */
319void smp_call_ipl_cpu(void (*func)(void *), void *data)
320{
c6da39f2
MH
321 pcpu_delegate(&pcpu_devices[0], func, data,
322 pcpu_devices->panic_stack + PAGE_SIZE);
8b646bd7
MS
323}
324
325int smp_find_processor_id(u16 address)
326{
327 int cpu;
328
329 for_each_present_cpu(cpu)
330 if (pcpu_devices[cpu].address == address)
331 return cpu;
332 return -1;
2c2df118
HC
333}
334
8b646bd7 335int smp_vcpu_scheduled(int cpu)
85ac7ca5 336{
8b646bd7
MS
337 return pcpu_running(pcpu_devices + cpu);
338}
339
8b646bd7 340void smp_yield_cpu(int cpu)
85ac7ca5 341{
8b646bd7
MS
342 if (MACHINE_HAS_DIAG9C)
343 asm volatile("diag %0,0,0x9c"
344 : : "d" (pcpu_devices[cpu].address));
345 else if (MACHINE_HAS_DIAG44)
346 asm volatile("diag 0,0,0x44");
347}
348
349/*
350 * Send cpus emergency shutdown signal. This gives the cpus the
351 * opportunity to complete outstanding interrupts.
352 */
63df41d6 353static void smp_emergency_stop(cpumask_t *cpumask)
8b646bd7
MS
354{
355 u64 end;
356 int cpu;
357
1aae0560 358 end = get_tod_clock() + (1000000UL << 12);
8b646bd7
MS
359 for_each_cpu(cpu, cpumask) {
360 struct pcpu *pcpu = pcpu_devices + cpu;
361 set_bit(ec_stop_cpu, &pcpu->ec_mask);
a9ae32c3
HC
362 while (__pcpu_sigp(pcpu->address, SIGP_EMERGENCY_SIGNAL,
363 0, NULL) == SIGP_CC_BUSY &&
1aae0560 364 get_tod_clock() < end)
8b646bd7
MS
365 cpu_relax();
366 }
1aae0560 367 while (get_tod_clock() < end) {
8b646bd7
MS
368 for_each_cpu(cpu, cpumask)
369 if (pcpu_stopped(pcpu_devices + cpu))
370 cpumask_clear_cpu(cpu, cpumask);
371 if (cpumask_empty(cpumask))
372 break;
85ac7ca5 373 cpu_relax();
8b646bd7 374 }
85ac7ca5
MS
375}
376
8b646bd7
MS
377/*
378 * Stop all cpus but the current one.
379 */
677d7623 380void smp_send_stop(void)
1da177e4 381{
85ac7ca5
MS
382 cpumask_t cpumask;
383 int cpu;
1da177e4 384
677d7623 385 /* Disable all interrupts/machine checks */
e258d719 386 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
3324e60a 387 trace_hardirqs_off();
1da177e4 388
3ab121ab 389 debug_set_critical();
85ac7ca5
MS
390 cpumask_copy(&cpumask, cpu_online_mask);
391 cpumask_clear_cpu(smp_processor_id(), &cpumask);
392
8b646bd7
MS
393 if (oops_in_progress)
394 smp_emergency_stop(&cpumask);
1da177e4 395
85ac7ca5
MS
396 /* stop all processors */
397 for_each_cpu(cpu, &cpumask) {
8b646bd7 398 struct pcpu *pcpu = pcpu_devices + cpu;
a9ae32c3 399 pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
8b646bd7 400 while (!pcpu_stopped(pcpu))
c6b5b847
HC
401 cpu_relax();
402 }
403}
404
1da177e4
LT
405/*
406 * This is the main routine where commands issued by other
407 * cpus are handled.
408 */
9acf73b7 409static void smp_handle_ext_call(void)
1da177e4 410{
39ce010d 411 unsigned long bits;
1da177e4 412
9acf73b7
HC
413 /* handle bit signal external calls */
414 bits = xchg(&pcpu_devices[smp_processor_id()].ec_mask, 0);
85ac7ca5
MS
415 if (test_bit(ec_stop_cpu, &bits))
416 smp_stop_cpu();
184748cc
PZ
417 if (test_bit(ec_schedule, &bits))
418 scheduler_ipi();
ca9fc75a
HC
419 if (test_bit(ec_call_function_single, &bits))
420 generic_smp_call_function_single_interrupt();
9acf73b7 421}
85ac7ca5 422
9acf73b7
HC
423static void do_ext_call_interrupt(struct ext_code ext_code,
424 unsigned int param32, unsigned long param64)
425{
426 inc_irq_stat(ext_code.code == 0x1202 ? IRQEXT_EXC : IRQEXT_EMS);
427 smp_handle_ext_call();
1da177e4
LT
428}
429
630cd046 430void arch_send_call_function_ipi_mask(const struct cpumask *mask)
ca9fc75a
HC
431{
432 int cpu;
433
630cd046 434 for_each_cpu(cpu, mask)
b6ed49e0 435 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
ca9fc75a
HC
436}
437
438void arch_send_call_function_single_ipi(int cpu)
439{
8b646bd7 440 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
ca9fc75a
HC
441}
442
347a8dc3 443#ifndef CONFIG_64BIT
1da177e4
LT
444/*
445 * this function sends a 'purge tlb' signal to another CPU.
446 */
a806170e 447static void smp_ptlb_callback(void *info)
1da177e4 448{
ba8a9229 449 __tlb_flush_local();
1da177e4
LT
450}
451
452void smp_ptlb_all(void)
453{
15c8b6c1 454 on_each_cpu(smp_ptlb_callback, NULL, 1);
1da177e4
LT
455}
456EXPORT_SYMBOL(smp_ptlb_all);
347a8dc3 457#endif /* ! CONFIG_64BIT */
1da177e4
LT
458
459/*
460 * this function sends a 'reschedule' IPI to another CPU.
461 * it goes straight through and wastes no time serializing
462 * anything. Worst case is that we lose a reschedule ...
463 */
464void smp_send_reschedule(int cpu)
465{
8b646bd7 466 pcpu_ec_call(pcpu_devices + cpu, ec_schedule);
1da177e4
LT
467}
468
469/*
470 * parameter area for the set/clear control bit callbacks
471 */
94c12cc7 472struct ec_creg_mask_parms {
8b646bd7
MS
473 unsigned long orval;
474 unsigned long andval;
475 int cr;
94c12cc7 476};
1da177e4
LT
477
478/*
479 * callback for setting/clearing control bits
480 */
39ce010d
HC
481static void smp_ctl_bit_callback(void *info)
482{
94c12cc7 483 struct ec_creg_mask_parms *pp = info;
1da177e4 484 unsigned long cregs[16];
39ce010d 485
94c12cc7 486 __ctl_store(cregs, 0, 15);
8b646bd7 487 cregs[pp->cr] = (cregs[pp->cr] & pp->andval) | pp->orval;
94c12cc7 488 __ctl_load(cregs, 0, 15);
1da177e4
LT
489}
490
491/*
492 * Set a bit in a control register of all cpus
493 */
94c12cc7
MS
494void smp_ctl_set_bit(int cr, int bit)
495{
8b646bd7 496 struct ec_creg_mask_parms parms = { 1UL << bit, -1UL, cr };
1da177e4 497
15c8b6c1 498 on_each_cpu(smp_ctl_bit_callback, &parms, 1);
1da177e4 499}
39ce010d 500EXPORT_SYMBOL(smp_ctl_set_bit);
1da177e4
LT
501
502/*
503 * Clear a bit in a control register of all cpus
504 */
94c12cc7
MS
505void smp_ctl_clear_bit(int cr, int bit)
506{
8b646bd7 507 struct ec_creg_mask_parms parms = { 0, ~(1UL << bit), cr };
1da177e4 508
15c8b6c1 509 on_each_cpu(smp_ctl_bit_callback, &parms, 1);
1da177e4 510}
39ce010d 511EXPORT_SYMBOL(smp_ctl_clear_bit);
1da177e4 512
bf28a597 513#ifdef CONFIG_CRASH_DUMP
411ed322 514
8b646bd7 515static void __init smp_get_save_area(int cpu, u16 address)
411ed322 516{
8b646bd7
MS
517 void *lc = pcpu_devices[0].lowcore;
518 struct save_area *save_area;
519
60a0c68d 520 if (is_kdump_kernel())
411ed322 521 return;
8b646bd7
MS
522 if (!OLDMEM_BASE && (address == boot_cpu_address ||
523 ipl_info.type != IPL_TYPE_FCP_DUMP))
524 return;
58952942 525 save_area = dump_save_area_create(cpu);
8b646bd7
MS
526 if (!save_area)
527 panic("could not allocate memory for save area\n");
8b646bd7
MS
528 if (address == boot_cpu_address) {
529 /* Copy the registers of the boot cpu. */
530 copy_oldmem_page(1, (void *) save_area, sizeof(*save_area),
531 SAVE_AREA_BASE - PAGE_SIZE, 0);
532 return;
533 }
8b646bd7 534 /* Get the registers of a non-boot cpu. */
a9ae32c3 535 __pcpu_sigp_relax(address, SIGP_STOP_AND_STORE_STATUS, 0, NULL);
8b646bd7 536 memcpy_real(save_area, lc + SAVE_AREA_BASE, sizeof(*save_area));
411ed322
MH
537}
538
8b646bd7 539int smp_store_status(int cpu)
08d07968 540{
8b646bd7 541 struct pcpu *pcpu;
08d07968 542
8b646bd7 543 pcpu = pcpu_devices + cpu;
a9ae32c3
HC
544 if (__pcpu_sigp_relax(pcpu->address, SIGP_STOP_AND_STORE_STATUS,
545 0, NULL) != SIGP_CC_ORDER_CODE_ACCEPTED)
8b646bd7 546 return -EIO;
08d07968
HC
547 return 0;
548}
549
bf28a597 550#else /* CONFIG_CRASH_DUMP */
08d07968 551
8b646bd7 552static inline void smp_get_save_area(int cpu, u16 address) { }
08d07968 553
bf28a597 554#endif /* CONFIG_CRASH_DUMP */
08d07968 555
50ab9a9a
HC
556void smp_cpu_set_polarization(int cpu, int val)
557{
558 pcpu_devices[cpu].polarization = val;
559}
560
561int smp_cpu_get_polarization(int cpu)
562{
563 return pcpu_devices[cpu].polarization;
564}
565
8b646bd7 566static struct sclp_cpu_info *smp_get_cpu_info(void)
08d07968 567{
8b646bd7 568 static int use_sigp_detection;
08d07968 569 struct sclp_cpu_info *info;
8b646bd7
MS
570 int address;
571
572 info = kzalloc(sizeof(*info), GFP_KERNEL);
573 if (info && (use_sigp_detection || sclp_get_cpu_info(info))) {
574 use_sigp_detection = 1;
575 for (address = 0; address <= MAX_CPU_ADDRESS; address++) {
a9ae32c3
HC
576 if (__pcpu_sigp_relax(address, SIGP_SENSE, 0, NULL) ==
577 SIGP_CC_NOT_OPERATIONAL)
8b646bd7
MS
578 continue;
579 info->cpu[info->configured].address = address;
580 info->configured++;
581 }
582 info->combined = info->configured;
08d07968 583 }
8b646bd7 584 return info;
08d07968
HC
585}
586
e2741f17 587static int smp_add_present_cpu(int cpu);
8b646bd7 588
e2741f17 589static int __smp_rescan_cpus(struct sclp_cpu_info *info, int sysfs_add)
08d07968 590{
8b646bd7 591 struct pcpu *pcpu;
08d07968 592 cpumask_t avail;
8b646bd7 593 int cpu, nr, i;
08d07968 594
8b646bd7 595 nr = 0;
0f1959f5 596 cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask);
8b646bd7
MS
597 cpu = cpumask_first(&avail);
598 for (i = 0; (i < info->combined) && (cpu < nr_cpu_ids); i++) {
599 if (info->has_cpu_type && info->cpu[i].type != boot_cpu_type)
600 continue;
601 if (pcpu_find_address(cpu_present_mask, info->cpu[i].address))
602 continue;
603 pcpu = pcpu_devices + cpu;
604 pcpu->address = info->cpu[i].address;
a4eeea4e 605 pcpu->state = (i >= info->configured) ?
8b646bd7 606 CPU_STATE_STANDBY : CPU_STATE_CONFIGURED;
50ab9a9a 607 smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN);
8b646bd7
MS
608 set_cpu_present(cpu, true);
609 if (sysfs_add && smp_add_present_cpu(cpu) != 0)
610 set_cpu_present(cpu, false);
611 else
612 nr++;
613 cpu = cpumask_next(cpu, &avail);
614 }
615 return nr;
1da177e4
LT
616}
617
48483b32
HC
618static void __init smp_detect_cpus(void)
619{
620 unsigned int cpu, c_cpus, s_cpus;
621 struct sclp_cpu_info *info;
48483b32 622
8b646bd7 623 info = smp_get_cpu_info();
48483b32
HC
624 if (!info)
625 panic("smp_detect_cpus failed to allocate memory\n");
48483b32
HC
626 if (info->has_cpu_type) {
627 for (cpu = 0; cpu < info->combined; cpu++) {
8b646bd7
MS
628 if (info->cpu[cpu].address != boot_cpu_address)
629 continue;
630 /* The boot cpu dictates the cpu type. */
631 boot_cpu_type = info->cpu[cpu].type;
632 break;
48483b32
HC
633 }
634 }
8b646bd7 635 c_cpus = s_cpus = 0;
48483b32 636 for (cpu = 0; cpu < info->combined; cpu++) {
8b646bd7 637 if (info->has_cpu_type && info->cpu[cpu].type != boot_cpu_type)
48483b32 638 continue;
8b646bd7
MS
639 if (cpu < info->configured) {
640 smp_get_save_area(c_cpus, info->cpu[cpu].address);
641 c_cpus++;
642 } else
48483b32 643 s_cpus++;
48483b32 644 }
395d31d4 645 pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus);
9d40d2e3 646 get_online_cpus();
8b646bd7 647 __smp_rescan_cpus(info, 0);
9d40d2e3 648 put_online_cpus();
8b646bd7 649 kfree(info);
48483b32
HC
650}
651
1da177e4 652/*
39ce010d 653 * Activate a secondary processor.
1da177e4 654 */
e2741f17 655static void smp_start_secondary(void *cpuvoid)
1da177e4 656{
1aae0560 657 S390_lowcore.last_update_clock = get_tod_clock();
8b646bd7
MS
658 S390_lowcore.restart_stack = (unsigned long) restart_stack;
659 S390_lowcore.restart_fn = (unsigned long) do_restart;
660 S390_lowcore.restart_data = 0;
661 S390_lowcore.restart_source = -1UL;
662 restore_access_regs(S390_lowcore.access_regs_save_area);
663 __ctl_load(S390_lowcore.cregs_save_area, 0, 15);
e258d719 664 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
39ce010d 665 cpu_init();
5bfb5d69 666 preempt_disable();
39ce010d 667 init_cpu_timer();
b5f87f15 668 vtime_init();
29b08d2b 669 pfault_init();
e545a614 670 notify_cpu_starting(smp_processor_id());
0f1959f5 671 set_cpu_online(smp_processor_id(), true);
93f3b2ee 672 inc_irq_stat(CPU_RST);
1da177e4 673 local_irq_enable();
52c00659 674 cpu_startup_entry(CPUHP_ONLINE);
1da177e4
LT
675}
676
1da177e4 677/* Upping and downing of CPUs */
e2741f17 678int __cpu_up(unsigned int cpu, struct task_struct *tidle)
1da177e4 679{
8b646bd7
MS
680 struct pcpu *pcpu;
681 int rc;
1da177e4 682
8b646bd7
MS
683 pcpu = pcpu_devices + cpu;
684 if (pcpu->state != CPU_STATE_CONFIGURED)
08d07968 685 return -EIO;
a9ae32c3
HC
686 if (pcpu_sigp_retry(pcpu, SIGP_INITIAL_CPU_RESET, 0) !=
687 SIGP_CC_ORDER_CODE_ACCEPTED)
08d07968 688 return -EIO;
e80e7813 689
8b646bd7
MS
690 rc = pcpu_alloc_lowcore(pcpu, cpu);
691 if (rc)
692 return rc;
693 pcpu_prepare_secondary(pcpu, cpu);
e80e7813 694 pcpu_attach_task(pcpu, tidle);
8b646bd7 695 pcpu_start_fn(pcpu, smp_start_secondary, NULL);
1da177e4
LT
696 while (!cpu_online(cpu))
697 cpu_relax();
698 return 0;
699}
700
d80512f8 701static unsigned int setup_possible_cpus __initdata;
255acee7 702
d80512f8
HC
703static int __init _setup_possible_cpus(char *s)
704{
705 get_option(&s, &setup_possible_cpus);
37a33026
HC
706 return 0;
707}
d80512f8 708early_param("possible_cpus", _setup_possible_cpus);
37a33026 709
48483b32
HC
710#ifdef CONFIG_HOTPLUG_CPU
711
39ce010d 712int __cpu_disable(void)
1da177e4 713{
8b646bd7 714 unsigned long cregs[16];
1da177e4 715
9acf73b7
HC
716 /* Handle possible pending IPIs */
717 smp_handle_ext_call();
8b646bd7
MS
718 set_cpu_online(smp_processor_id(), false);
719 /* Disable pseudo page faults on this cpu. */
29b08d2b 720 pfault_fini();
8b646bd7
MS
721 /* Disable interrupt sources via control register. */
722 __ctl_store(cregs, 0, 15);
723 cregs[0] &= ~0x0000ee70UL; /* disable all external interrupts */
724 cregs[6] &= ~0xff000000UL; /* disable all I/O interrupts */
725 cregs[14] &= ~0x1f000000UL; /* disable most machine checks */
726 __ctl_load(cregs, 0, 15);
fe0f4976 727 clear_cpu_flag(CIF_NOHZ_DELAY);
1da177e4
LT
728 return 0;
729}
730
39ce010d 731void __cpu_die(unsigned int cpu)
1da177e4 732{
8b646bd7
MS
733 struct pcpu *pcpu;
734
1da177e4 735 /* Wait until target cpu is down */
8b646bd7
MS
736 pcpu = pcpu_devices + cpu;
737 while (!pcpu_stopped(pcpu))
1da177e4 738 cpu_relax();
8b646bd7 739 pcpu_free_lowcore(pcpu);
050eef36 740 atomic_dec(&init_mm.context.attach_count);
1b948d6c
MS
741 cpumask_clear_cpu(cpu, mm_cpumask(&init_mm));
742 if (MACHINE_HAS_TLB_LC)
743 cpumask_clear_cpu(cpu, &init_mm.context.cpu_attach_mask);
1da177e4
LT
744}
745
b456d94a 746void __noreturn cpu_die(void)
1da177e4
LT
747{
748 idle_task_exit();
a9ae32c3 749 pcpu_sigp_retry(pcpu_devices + smp_processor_id(), SIGP_STOP, 0);
8b646bd7 750 for (;;) ;
1da177e4
LT
751}
752
255acee7
HC
753#endif /* CONFIG_HOTPLUG_CPU */
754
d80512f8
HC
755void __init smp_fill_possible_mask(void)
756{
cf813db0 757 unsigned int possible, sclp, cpu;
d80512f8 758
cf813db0
HC
759 sclp = sclp_get_max_cpu() ?: nr_cpu_ids;
760 possible = setup_possible_cpus ?: nr_cpu_ids;
761 possible = min(possible, sclp);
d80512f8
HC
762 for (cpu = 0; cpu < possible && cpu < nr_cpu_ids; cpu++)
763 set_cpu_possible(cpu, true);
764}
765
1da177e4
LT
766void __init smp_prepare_cpus(unsigned int max_cpus)
767{
39ce010d 768 /* request the 0x1201 emergency signal external interrupt */
1dad093b 769 if (register_external_irq(EXT_IRQ_EMERGENCY_SIG, do_ext_call_interrupt))
39ce010d 770 panic("Couldn't request external interrupt 0x1201");
d98e19cc 771 /* request the 0x1202 external call external interrupt */
1dad093b 772 if (register_external_irq(EXT_IRQ_EXTERNAL_CALL, do_ext_call_interrupt))
d98e19cc 773 panic("Couldn't request external interrupt 0x1202");
8b646bd7 774 smp_detect_cpus();
1da177e4
LT
775}
776
ea1f4eec 777void __init smp_prepare_boot_cpu(void)
1da177e4 778{
8b646bd7
MS
779 struct pcpu *pcpu = pcpu_devices;
780
781 boot_cpu_address = stap();
8b646bd7
MS
782 pcpu->state = CPU_STATE_CONFIGURED;
783 pcpu->address = boot_cpu_address;
784 pcpu->lowcore = (struct _lowcore *)(unsigned long) store_prefix();
dc7ee00d
MS
785 pcpu->async_stack = S390_lowcore.async_stack - ASYNC_SIZE
786 + STACK_FRAME_OVERHEAD + sizeof(struct pt_regs);
787 pcpu->panic_stack = S390_lowcore.panic_stack - PAGE_SIZE
788 + STACK_FRAME_OVERHEAD + sizeof(struct pt_regs);
1da177e4 789 S390_lowcore.percpu_offset = __per_cpu_offset[0];
50ab9a9a 790 smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN);
8b646bd7
MS
791 set_cpu_present(0, true);
792 set_cpu_online(0, true);
1da177e4
LT
793}
794
ea1f4eec 795void __init smp_cpus_done(unsigned int max_cpus)
1da177e4 796{
1da177e4
LT
797}
798
02beaccc
HC
799void __init smp_setup_processor_id(void)
800{
801 S390_lowcore.cpu_nr = 0;
6c8cd5bb 802 S390_lowcore.spinlock_lockval = arch_spin_lockval(0);
02beaccc
HC
803}
804
1da177e4
LT
805/*
806 * the frequency of the profiling timer can be changed
807 * by writing a multiplier value into /proc/profile.
808 *
809 * usually you want to run this on all CPUs ;)
810 */
811int setup_profiling_timer(unsigned int multiplier)
812{
39ce010d 813 return 0;
1da177e4
LT
814}
815
08d07968 816#ifdef CONFIG_HOTPLUG_CPU
8a25a2fd 817static ssize_t cpu_configure_show(struct device *dev,
8b646bd7 818 struct device_attribute *attr, char *buf)
08d07968
HC
819{
820 ssize_t count;
821
822 mutex_lock(&smp_cpu_state_mutex);
8b646bd7 823 count = sprintf(buf, "%d\n", pcpu_devices[dev->id].state);
08d07968
HC
824 mutex_unlock(&smp_cpu_state_mutex);
825 return count;
826}
827
8a25a2fd 828static ssize_t cpu_configure_store(struct device *dev,
8b646bd7
MS
829 struct device_attribute *attr,
830 const char *buf, size_t count)
08d07968 831{
8b646bd7
MS
832 struct pcpu *pcpu;
833 int cpu, val, rc;
08d07968
HC
834 char delim;
835
836 if (sscanf(buf, "%d %c", &val, &delim) != 1)
837 return -EINVAL;
838 if (val != 0 && val != 1)
839 return -EINVAL;
9d40d2e3 840 get_online_cpus();
0b18d318 841 mutex_lock(&smp_cpu_state_mutex);
08d07968 842 rc = -EBUSY;
2c2df118 843 /* disallow configuration changes of online cpus and cpu 0 */
8b646bd7 844 cpu = dev->id;
2c2df118 845 if (cpu_online(cpu) || cpu == 0)
08d07968 846 goto out;
8b646bd7 847 pcpu = pcpu_devices + cpu;
08d07968
HC
848 rc = 0;
849 switch (val) {
850 case 0:
8b646bd7
MS
851 if (pcpu->state != CPU_STATE_CONFIGURED)
852 break;
853 rc = sclp_cpu_deconfigure(pcpu->address);
854 if (rc)
855 break;
856 pcpu->state = CPU_STATE_STANDBY;
50ab9a9a 857 smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN);
8b646bd7 858 topology_expect_change();
08d07968
HC
859 break;
860 case 1:
8b646bd7
MS
861 if (pcpu->state != CPU_STATE_STANDBY)
862 break;
863 rc = sclp_cpu_configure(pcpu->address);
864 if (rc)
865 break;
866 pcpu->state = CPU_STATE_CONFIGURED;
50ab9a9a 867 smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN);
8b646bd7 868 topology_expect_change();
08d07968
HC
869 break;
870 default:
871 break;
872 }
873out:
08d07968 874 mutex_unlock(&smp_cpu_state_mutex);
0b18d318 875 put_online_cpus();
08d07968
HC
876 return rc ? rc : count;
877}
8a25a2fd 878static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store);
08d07968
HC
879#endif /* CONFIG_HOTPLUG_CPU */
880
8a25a2fd
KS
881static ssize_t show_cpu_address(struct device *dev,
882 struct device_attribute *attr, char *buf)
08d07968 883{
8b646bd7 884 return sprintf(buf, "%d\n", pcpu_devices[dev->id].address);
08d07968 885}
8a25a2fd 886static DEVICE_ATTR(address, 0444, show_cpu_address, NULL);
08d07968 887
08d07968
HC
888static struct attribute *cpu_common_attrs[] = {
889#ifdef CONFIG_HOTPLUG_CPU
8a25a2fd 890 &dev_attr_configure.attr,
08d07968 891#endif
8a25a2fd 892 &dev_attr_address.attr,
08d07968
HC
893 NULL,
894};
895
896static struct attribute_group cpu_common_attr_group = {
897 .attrs = cpu_common_attrs,
898};
1da177e4 899
08d07968 900static struct attribute *cpu_online_attrs[] = {
8a25a2fd
KS
901 &dev_attr_idle_count.attr,
902 &dev_attr_idle_time_us.attr,
fae8b22d
HC
903 NULL,
904};
905
08d07968
HC
906static struct attribute_group cpu_online_attr_group = {
907 .attrs = cpu_online_attrs,
fae8b22d
HC
908};
909
e2741f17
PG
910static int smp_cpu_notify(struct notifier_block *self, unsigned long action,
911 void *hcpu)
2fc2d1e9
HC
912{
913 unsigned int cpu = (unsigned int)(long)hcpu;
96619fc1 914 struct cpu *c = pcpu_devices[cpu].cpu;
8a25a2fd 915 struct device *s = &c->dev;
d882ba69 916 int err = 0;
2fc2d1e9 917
1c725922 918 switch (action & ~CPU_TASKS_FROZEN) {
2fc2d1e9 919 case CPU_ONLINE:
d882ba69 920 err = sysfs_create_group(&s->kobj, &cpu_online_attr_group);
2fc2d1e9
HC
921 break;
922 case CPU_DEAD:
08d07968 923 sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
2fc2d1e9
HC
924 break;
925 }
d882ba69 926 return notifier_from_errno(err);
2fc2d1e9
HC
927}
928
e2741f17 929static int smp_add_present_cpu(int cpu)
08d07968 930{
96619fc1
HC
931 struct device *s;
932 struct cpu *c;
08d07968
HC
933 int rc;
934
96619fc1
HC
935 c = kzalloc(sizeof(*c), GFP_KERNEL);
936 if (!c)
937 return -ENOMEM;
938 pcpu_devices[cpu].cpu = c;
939 s = &c->dev;
08d07968
HC
940 c->hotpluggable = 1;
941 rc = register_cpu(c, cpu);
942 if (rc)
943 goto out;
944 rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group);
945 if (rc)
946 goto out_cpu;
83a24e32
HC
947 if (cpu_online(cpu)) {
948 rc = sysfs_create_group(&s->kobj, &cpu_online_attr_group);
949 if (rc)
950 goto out_online;
951 }
952 rc = topology_cpu_init(c);
953 if (rc)
954 goto out_topology;
955 return 0;
956
957out_topology:
958 if (cpu_online(cpu))
959 sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
960out_online:
08d07968
HC
961 sysfs_remove_group(&s->kobj, &cpu_common_attr_group);
962out_cpu:
963#ifdef CONFIG_HOTPLUG_CPU
964 unregister_cpu(c);
965#endif
966out:
967 return rc;
968}
969
970#ifdef CONFIG_HOTPLUG_CPU
1e489518 971
67060d9c 972int __ref smp_rescan_cpus(void)
08d07968 973{
8b646bd7
MS
974 struct sclp_cpu_info *info;
975 int nr;
08d07968 976
8b646bd7
MS
977 info = smp_get_cpu_info();
978 if (!info)
979 return -ENOMEM;
9d40d2e3 980 get_online_cpus();
0b18d318 981 mutex_lock(&smp_cpu_state_mutex);
8b646bd7 982 nr = __smp_rescan_cpus(info, 1);
08d07968 983 mutex_unlock(&smp_cpu_state_mutex);
0b18d318 984 put_online_cpus();
8b646bd7
MS
985 kfree(info);
986 if (nr)
c10fde0d 987 topology_schedule_update();
8b646bd7 988 return 0;
1e489518
HC
989}
990
8a25a2fd
KS
991static ssize_t __ref rescan_store(struct device *dev,
992 struct device_attribute *attr,
c9be0a36 993 const char *buf,
1e489518
HC
994 size_t count)
995{
996 int rc;
997
998 rc = smp_rescan_cpus();
08d07968
HC
999 return rc ? rc : count;
1000}
8a25a2fd 1001static DEVICE_ATTR(rescan, 0200, NULL, rescan_store);
08d07968
HC
1002#endif /* CONFIG_HOTPLUG_CPU */
1003
83a24e32 1004static int __init s390_smp_init(void)
1da177e4 1005{
f4edbcd5 1006 int cpu, rc = 0;
2fc2d1e9 1007
08d07968 1008#ifdef CONFIG_HOTPLUG_CPU
8a25a2fd 1009 rc = device_create_file(cpu_subsys.dev_root, &dev_attr_rescan);
08d07968
HC
1010 if (rc)
1011 return rc;
1012#endif
f4edbcd5 1013 cpu_notifier_register_begin();
08d07968
HC
1014 for_each_present_cpu(cpu) {
1015 rc = smp_add_present_cpu(cpu);
fae8b22d 1016 if (rc)
f4edbcd5 1017 goto out;
1da177e4 1018 }
f4edbcd5
SB
1019
1020 __hotcpu_notifier(smp_cpu_notify, 0);
1021
1022out:
1023 cpu_notifier_register_done();
1024 return rc;
1da177e4 1025}
83a24e32 1026subsys_initcall(s390_smp_init);