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Commit | Line | Data |
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dbd70fb4 | 1 | /* |
dbd70fb4 HC |
2 | * Copyright IBM Corp. 2007 |
3 | * Author(s): Heiko Carstens <heiko.carstens@de.ibm.com> | |
4 | */ | |
5 | ||
395d31d4 MS |
6 | #define KMSG_COMPONENT "cpu" |
7 | #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt | |
8 | ||
dbd70fb4 HC |
9 | #include <linux/kernel.h> |
10 | #include <linux/mm.h> | |
11 | #include <linux/init.h> | |
12 | #include <linux/device.h> | |
13 | #include <linux/bootmem.h> | |
14 | #include <linux/sched.h> | |
15 | #include <linux/workqueue.h> | |
16 | #include <linux/cpu.h> | |
17 | #include <linux/smp.h> | |
f414f5f1 | 18 | #include <linux/cpuset.h> |
dbd70fb4 | 19 | #include <asm/delay.h> |
dbd70fb4 | 20 | |
c10fde0d HC |
21 | #define PTF_HORIZONTAL (0UL) |
22 | #define PTF_VERTICAL (1UL) | |
23 | #define PTF_CHECK (2UL) | |
dbd70fb4 | 24 | |
4cb14bc8 HC |
25 | struct mask_info { |
26 | struct mask_info *next; | |
10d38589 | 27 | unsigned char id; |
dbd70fb4 HC |
28 | cpumask_t mask; |
29 | }; | |
30 | ||
c9af3fa9 | 31 | static int topology_enabled = 1; |
dbd70fb4 | 32 | static void topology_work_fn(struct work_struct *work); |
c30f91b6 | 33 | static struct sysinfo_15_1_x *tl_info; |
dbd70fb4 HC |
34 | static struct timer_list topology_timer; |
35 | static void set_topology_timer(void); | |
36 | static DECLARE_WORK(topology_work, topology_work_fn); | |
74af2831 HC |
37 | /* topology_lock protects the core linked list */ |
38 | static DEFINE_SPINLOCK(topology_lock); | |
dbd70fb4 | 39 | |
4cb14bc8 | 40 | static struct mask_info core_info; |
d00aa4e7 | 41 | cpumask_t cpu_core_map[NR_CPUS]; |
10d38589 | 42 | unsigned char cpu_core_id[NR_CPUS]; |
d00aa4e7 | 43 | |
4cb14bc8 HC |
44 | #ifdef CONFIG_SCHED_BOOK |
45 | static struct mask_info book_info; | |
46 | cpumask_t cpu_book_map[NR_CPUS]; | |
47 | unsigned char cpu_book_id[NR_CPUS]; | |
48 | #endif | |
49 | ||
50 | static cpumask_t cpu_group_map(struct mask_info *info, unsigned int cpu) | |
dbd70fb4 | 51 | { |
dbd70fb4 HC |
52 | cpumask_t mask; |
53 | ||
0f1959f5 | 54 | cpumask_clear(&mask); |
0b52783d HC |
55 | if (!topology_enabled || !MACHINE_HAS_TOPOLOGY) { |
56 | cpumask_copy(&mask, cpumask_of(cpu)); | |
57 | return mask; | |
58 | } | |
4cb14bc8 | 59 | while (info) { |
0f1959f5 | 60 | if (cpumask_test_cpu(cpu, &info->mask)) { |
4cb14bc8 | 61 | mask = info->mask; |
dbd70fb4 HC |
62 | break; |
63 | } | |
4cb14bc8 | 64 | info = info->next; |
dbd70fb4 | 65 | } |
0f1959f5 KM |
66 | if (cpumask_empty(&mask)) |
67 | cpumask_copy(&mask, cpumask_of(cpu)); | |
dbd70fb4 HC |
68 | return mask; |
69 | } | |
70 | ||
c30f91b6 HC |
71 | static void add_cpus_to_mask(struct topology_cpu *tl_cpu, |
72 | struct mask_info *book, struct mask_info *core) | |
dbd70fb4 HC |
73 | { |
74 | unsigned int cpu; | |
75 | ||
c30f91b6 HC |
76 | for (cpu = find_first_bit(&tl_cpu->mask[0], TOPOLOGY_CPU_BITS); |
77 | cpu < TOPOLOGY_CPU_BITS; | |
78 | cpu = find_next_bit(&tl_cpu->mask[0], TOPOLOGY_CPU_BITS, cpu + 1)) | |
dbd70fb4 HC |
79 | { |
80 | unsigned int rcpu, lcpu; | |
81 | ||
c30f91b6 | 82 | rcpu = TOPOLOGY_CPU_BITS - 1 - cpu + tl_cpu->origin; |
dbd70fb4 | 83 | for_each_present_cpu(lcpu) { |
4cb14bc8 HC |
84 | if (cpu_logical_map(lcpu) != rcpu) |
85 | continue; | |
86 | #ifdef CONFIG_SCHED_BOOK | |
0f1959f5 | 87 | cpumask_set_cpu(lcpu, &book->mask); |
4cb14bc8 HC |
88 | cpu_book_id[lcpu] = book->id; |
89 | #endif | |
0f1959f5 | 90 | cpumask_set_cpu(lcpu, &core->mask); |
4cb14bc8 HC |
91 | cpu_core_id[lcpu] = core->id; |
92 | smp_cpu_polarization[lcpu] = tl_cpu->pp; | |
dbd70fb4 HC |
93 | } |
94 | } | |
95 | } | |
96 | ||
4cb14bc8 | 97 | static void clear_masks(void) |
dbd70fb4 | 98 | { |
4cb14bc8 | 99 | struct mask_info *info; |
dbd70fb4 | 100 | |
4cb14bc8 HC |
101 | info = &core_info; |
102 | while (info) { | |
0f1959f5 | 103 | cpumask_clear(&info->mask); |
4cb14bc8 HC |
104 | info = info->next; |
105 | } | |
106 | #ifdef CONFIG_SCHED_BOOK | |
107 | info = &book_info; | |
108 | while (info) { | |
0f1959f5 | 109 | cpumask_clear(&info->mask); |
4cb14bc8 | 110 | info = info->next; |
dbd70fb4 | 111 | } |
4cb14bc8 | 112 | #endif |
dbd70fb4 HC |
113 | } |
114 | ||
c30f91b6 | 115 | static union topology_entry *next_tle(union topology_entry *tle) |
dbd70fb4 | 116 | { |
c30f91b6 HC |
117 | if (!tle->nl) |
118 | return (union topology_entry *)((struct topology_cpu *)tle + 1); | |
119 | return (union topology_entry *)((struct topology_container *)tle + 1); | |
dbd70fb4 HC |
120 | } |
121 | ||
c30f91b6 | 122 | static void tl_to_cores(struct sysinfo_15_1_x *info) |
dbd70fb4 | 123 | { |
4cb14bc8 HC |
124 | #ifdef CONFIG_SCHED_BOOK |
125 | struct mask_info *book = &book_info; | |
126 | #else | |
127 | struct mask_info *book = NULL; | |
128 | #endif | |
129 | struct mask_info *core = &core_info; | |
c30f91b6 | 130 | union topology_entry *tle, *end; |
4cb14bc8 | 131 | |
dbd70fb4 | 132 | |
74af2831 | 133 | spin_lock_irq(&topology_lock); |
4cb14bc8 | 134 | clear_masks(); |
c10fde0d | 135 | tle = info->tle; |
c30f91b6 | 136 | end = (union topology_entry *)((unsigned long)info + info->length); |
dbd70fb4 HC |
137 | while (tle < end) { |
138 | switch (tle->nl) { | |
4cb14bc8 | 139 | #ifdef CONFIG_SCHED_BOOK |
dbd70fb4 | 140 | case 2: |
4cb14bc8 HC |
141 | book = book->next; |
142 | book->id = tle->container.id; | |
dbd70fb4 | 143 | break; |
4cb14bc8 | 144 | #endif |
dbd70fb4 HC |
145 | case 1: |
146 | core = core->next; | |
10d38589 | 147 | core->id = tle->container.id; |
dbd70fb4 HC |
148 | break; |
149 | case 0: | |
4cb14bc8 | 150 | add_cpus_to_mask(&tle->cpu, book, core); |
dbd70fb4 HC |
151 | break; |
152 | default: | |
4cb14bc8 | 153 | clear_masks(); |
d7015c12 | 154 | goto out; |
dbd70fb4 HC |
155 | } |
156 | tle = next_tle(tle); | |
157 | } | |
d7015c12 | 158 | out: |
74af2831 | 159 | spin_unlock_irq(&topology_lock); |
dbd70fb4 HC |
160 | } |
161 | ||
c10fde0d HC |
162 | static void topology_update_polarization_simple(void) |
163 | { | |
164 | int cpu; | |
165 | ||
166 | mutex_lock(&smp_cpu_state_mutex); | |
5439050f | 167 | for_each_possible_cpu(cpu) |
c10fde0d HC |
168 | smp_cpu_polarization[cpu] = POLARIZATION_HRZ; |
169 | mutex_unlock(&smp_cpu_state_mutex); | |
170 | } | |
171 | ||
172 | static int ptf(unsigned long fc) | |
dbd70fb4 HC |
173 | { |
174 | int rc; | |
175 | ||
176 | asm volatile( | |
177 | " .insn rre,0xb9a20000,%1,%1\n" | |
178 | " ipm %0\n" | |
179 | " srl %0,28\n" | |
180 | : "=d" (rc) | |
c10fde0d HC |
181 | : "d" (fc) : "cc"); |
182 | return rc; | |
183 | } | |
184 | ||
185 | int topology_set_cpu_management(int fc) | |
186 | { | |
187 | int cpu; | |
188 | int rc; | |
189 | ||
9186d7a9 | 190 | if (!MACHINE_HAS_TOPOLOGY) |
c10fde0d HC |
191 | return -EOPNOTSUPP; |
192 | if (fc) | |
193 | rc = ptf(PTF_VERTICAL); | |
194 | else | |
195 | rc = ptf(PTF_HORIZONTAL); | |
196 | if (rc) | |
197 | return -EBUSY; | |
5439050f | 198 | for_each_possible_cpu(cpu) |
c10fde0d | 199 | smp_cpu_polarization[cpu] = POLARIZATION_UNKNWN; |
dbd70fb4 HC |
200 | return rc; |
201 | } | |
202 | ||
d00aa4e7 HC |
203 | static void update_cpu_core_map(void) |
204 | { | |
4cb14bc8 | 205 | unsigned long flags; |
d00aa4e7 HC |
206 | int cpu; |
207 | ||
4cb14bc8 HC |
208 | spin_lock_irqsave(&topology_lock, flags); |
209 | for_each_possible_cpu(cpu) { | |
210 | cpu_core_map[cpu] = cpu_group_map(&core_info, cpu); | |
211 | #ifdef CONFIG_SCHED_BOOK | |
212 | cpu_book_map[cpu] = cpu_group_map(&book_info, cpu); | |
213 | #endif | |
214 | } | |
215 | spin_unlock_irqrestore(&topology_lock, flags); | |
216 | } | |
217 | ||
96f4a70d | 218 | void store_topology(struct sysinfo_15_1_x *info) |
4cb14bc8 HC |
219 | { |
220 | #ifdef CONFIG_SCHED_BOOK | |
221 | int rc; | |
222 | ||
223 | rc = stsi(info, 15, 1, 3); | |
224 | if (rc != -ENOSYS) | |
225 | return; | |
226 | #endif | |
227 | stsi(info, 15, 1, 2); | |
d00aa4e7 HC |
228 | } |
229 | ||
ee79d1bd | 230 | int arch_update_cpu_topology(void) |
dbd70fb4 | 231 | { |
c30f91b6 | 232 | struct sysinfo_15_1_x *info = tl_info; |
dbd70fb4 HC |
233 | struct sys_device *sysdev; |
234 | int cpu; | |
235 | ||
9186d7a9 | 236 | if (!MACHINE_HAS_TOPOLOGY) { |
d00aa4e7 | 237 | update_cpu_core_map(); |
c10fde0d | 238 | topology_update_polarization_simple(); |
ee79d1bd | 239 | return 0; |
c10fde0d | 240 | } |
4cb14bc8 | 241 | store_topology(info); |
dbd70fb4 | 242 | tl_to_cores(info); |
d00aa4e7 | 243 | update_cpu_core_map(); |
dbd70fb4 HC |
244 | for_each_online_cpu(cpu) { |
245 | sysdev = get_cpu_sysdev(cpu); | |
246 | kobject_uevent(&sysdev->kobj, KOBJ_CHANGE); | |
247 | } | |
ee79d1bd | 248 | return 1; |
dbd70fb4 HC |
249 | } |
250 | ||
fd781fa2 HC |
251 | static void topology_work_fn(struct work_struct *work) |
252 | { | |
f414f5f1 | 253 | rebuild_sched_domains(); |
dbd70fb4 HC |
254 | } |
255 | ||
c10fde0d HC |
256 | void topology_schedule_update(void) |
257 | { | |
258 | schedule_work(&topology_work); | |
259 | } | |
260 | ||
dbd70fb4 HC |
261 | static void topology_timer_fn(unsigned long ignored) |
262 | { | |
c10fde0d HC |
263 | if (ptf(PTF_CHECK)) |
264 | topology_schedule_update(); | |
dbd70fb4 HC |
265 | set_topology_timer(); |
266 | } | |
267 | ||
268 | static void set_topology_timer(void) | |
269 | { | |
270 | topology_timer.function = topology_timer_fn; | |
271 | topology_timer.data = 0; | |
272 | topology_timer.expires = jiffies + 60 * HZ; | |
273 | add_timer(&topology_timer); | |
274 | } | |
275 | ||
2b1a61f0 | 276 | static int __init early_parse_topology(char *p) |
dbd70fb4 | 277 | { |
c9af3fa9 | 278 | if (strncmp(p, "off", 3)) |
2b1a61f0 | 279 | return 0; |
c9af3fa9 | 280 | topology_enabled = 0; |
2b1a61f0 | 281 | return 0; |
dbd70fb4 | 282 | } |
2b1a61f0 | 283 | early_param("topology", early_parse_topology); |
dbd70fb4 HC |
284 | |
285 | static int __init init_topology_update(void) | |
286 | { | |
287 | int rc; | |
288 | ||
d00aa4e7 | 289 | rc = 0; |
9186d7a9 | 290 | if (!MACHINE_HAS_TOPOLOGY) { |
c10fde0d | 291 | topology_update_polarization_simple(); |
d00aa4e7 | 292 | goto out; |
c10fde0d HC |
293 | } |
294 | init_timer_deferrable(&topology_timer); | |
349f1b67 | 295 | set_topology_timer(); |
d00aa4e7 HC |
296 | out: |
297 | update_cpu_core_map(); | |
298 | return rc; | |
dbd70fb4 HC |
299 | } |
300 | __initcall(init_topology_update); | |
301 | ||
caa04f69 SO |
302 | static void __init alloc_masks(struct sysinfo_15_1_x *info, |
303 | struct mask_info *mask, int offset) | |
4cb14bc8 HC |
304 | { |
305 | int i, nr_masks; | |
306 | ||
c30f91b6 | 307 | nr_masks = info->mag[TOPOLOGY_NR_MAG - offset]; |
4cb14bc8 | 308 | for (i = 0; i < info->mnest - offset; i++) |
c30f91b6 | 309 | nr_masks *= info->mag[TOPOLOGY_NR_MAG - offset - 1 - i]; |
4cb14bc8 HC |
310 | nr_masks = max(nr_masks, 1); |
311 | for (i = 0; i < nr_masks; i++) { | |
312 | mask->next = alloc_bootmem(sizeof(struct mask_info)); | |
313 | mask = mask->next; | |
314 | } | |
315 | } | |
316 | ||
dbd70fb4 HC |
317 | void __init s390_init_cpu_topology(void) |
318 | { | |
c30f91b6 | 319 | struct sysinfo_15_1_x *info; |
dbd70fb4 HC |
320 | int i; |
321 | ||
9186d7a9 | 322 | if (!MACHINE_HAS_TOPOLOGY) |
dbd70fb4 | 323 | return; |
dbd70fb4 | 324 | tl_info = alloc_bootmem_pages(PAGE_SIZE); |
dbd70fb4 | 325 | info = tl_info; |
4cb14bc8 | 326 | store_topology(info); |
395d31d4 | 327 | pr_info("The CPU configuration topology of the machine is:"); |
c30f91b6 | 328 | for (i = 0; i < TOPOLOGY_NR_MAG; i++) |
dbd70fb4 HC |
329 | printk(" %d", info->mag[i]); |
330 | printk(" / %d\n", info->mnest); | |
4cb14bc8 HC |
331 | alloc_masks(info, &core_info, 2); |
332 | #ifdef CONFIG_SCHED_BOOK | |
333 | alloc_masks(info, &book_info, 3); | |
334 | #endif | |
dbd70fb4 | 335 | } |