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KVM: s390: force bp isolation for VSIE
[mirror_ubuntu-jammy-kernel.git] / arch / s390 / kvm / priv.c
CommitLineData
d809aa23 1// SPDX-License-Identifier: GPL-2.0
453423dc 2/*
a53c8fab 3 * handling privileged instructions
453423dc 4 *
a37cb07a 5 * Copyright IBM Corp. 2008, 2018
453423dc 6 *
453423dc
CB		 7 * Author(s): Carsten Otte <cotte@de.ibm.com>
8 * Christian Borntraeger <borntraeger@de.ibm.com>
9 */
10
11#include <linux/kvm.h>
5a0e3ad6 12#include <linux/gfp.h>
453423dc 13#include <linux/errno.h>
b13b5dc7 14#include <linux/compat.h>
589ee628
IM		 15#include <linux/mm_types.h>
16
7c959e82 17#include <asm/asm-offsets.h>
e769ece3 18#include <asm/facility.h>
453423dc
CB		 19#include <asm/current.h>
20#include <asm/debug.h>
21#include <asm/ebcdic.h>
22#include <asm/sysinfo.h>
69d0d3a3 23#include <asm/pgtable.h>
190df4a2 24#include <asm/page-states.h>
69d0d3a3 25#include <asm/pgalloc.h>
1e133ab2 26#include <asm/gmap.h>
69d0d3a3 27#include <asm/io.h>
48a3e950
CH		 28#include <asm/ptrace.h>
29#include <asm/compat.h>
a7e19ab5 30#include <asm/sclp.h>
453423dc
CB		 31#include "gaccess.h"
32#include "kvm-s390.h"
5786fffa 33#include "trace.h"
453423dc 34
80cd8763
FZ		 35static int handle_ri(struct kvm_vcpu *vcpu)
36{
a37cb07a
CB		 37 vcpu->stat.instruction_ri++;
38
80cd8763 39 if (test_kvm_facility(vcpu->kvm, 64)) {
4d5f2c04 40 VCPU_EVENT(vcpu, 3, "%s", "ENABLE: RI (lazy)");
0c9d8683 41 vcpu->arch.sie_block->ecb3 |= ECB3_RI;
80cd8763
FZ		 42 kvm_s390_retry_instr(vcpu);
43 return 0;
44 } else
45 return kvm_s390_inject_program_int(vcpu, PGM_OPERATION);
46}
47
48int kvm_s390_handle_aa(struct kvm_vcpu *vcpu)
49{
50 if ((vcpu->arch.sie_block->ipa & 0xf) <= 4)
51 return handle_ri(vcpu);
52 else
53 return -EOPNOTSUPP;
54}
55
4e0b1ab7
FZ		 56static int handle_gs(struct kvm_vcpu *vcpu)
57{
a37cb07a
CB		 58 vcpu->stat.instruction_gs++;
59
4e0b1ab7
FZ		 60 if (test_kvm_facility(vcpu->kvm, 133)) {
61 VCPU_EVENT(vcpu, 3, "%s", "ENABLE: GS (lazy)");
62 preempt_disable();
63 __ctl_set_bit(2, 4);
64 current->thread.gs_cb = (struct gs_cb *)&vcpu->run->s.regs.gscb;
65 restore_gs_cb(current->thread.gs_cb);
66 preempt_enable();
67 vcpu->arch.sie_block->ecb |= ECB_GS;
68 vcpu->arch.sie_block->ecd |= ECD_HOSTREGMGMT;
69 vcpu->arch.gs_enabled = 1;
70 kvm_s390_retry_instr(vcpu);
71 return 0;
72 } else
73 return kvm_s390_inject_program_int(vcpu, PGM_OPERATION);
74}
75
76int kvm_s390_handle_e3(struct kvm_vcpu *vcpu)
77{
78 int code = vcpu->arch.sie_block->ipb & 0xff;
79
80 if (code == 0x49 || code == 0x4d)
81 return handle_gs(vcpu);
82 else
83 return -EOPNOTSUPP;
84}
6a3f95a6
TH		 85/* Handle SCK (SET CLOCK) interception */
86static int handle_set_clock(struct kvm_vcpu *vcpu)
87{
25ed1675 88 int rc;
27f67f87 89 u8 ar;
25ed1675 90 u64 op2, val;
6a3f95a6 91
a37cb07a
CB		 92 vcpu->stat.instruction_sck++;
93
6a3f95a6
TH		 94 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
95 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
96
8ae04b8f 97 op2 = kvm_s390_get_base_disp_s(vcpu, &ar);
6a3f95a6
TH		 98 if (op2 & 7) /* Operand must be on a doubleword boundary */
99 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
8ae04b8f 100 rc = read_guest(vcpu, op2, ar, &val, sizeof(val));
0e7a3f94
HC		 101 if (rc)
102 return kvm_s390_inject_prog_cond(vcpu, rc);
6a3f95a6 103
7cbde76b 104 VCPU_EVENT(vcpu, 3, "SCK: setting guest TOD to 0x%llx", val);
25ed1675 105 kvm_s390_set_tod_clock(vcpu->kvm, val);
6a3f95a6
TH		 106
107 kvm_s390_set_psw_cc(vcpu, 0);
108 return 0;
109}
110
453423dc
CB		 111static int handle_set_prefix(struct kvm_vcpu *vcpu)
112{
453423dc 113 u64 operand2;
665170cb
HC		 114 u32 address;
115 int rc;
27f67f87 116 u8 ar;
453423dc
CB		 117
118 vcpu->stat.instruction_spx++;
119
5087dfa6
TH		 120 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
121 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
122
8ae04b8f 123 operand2 = kvm_s390_get_base_disp_s(vcpu, &ar);
453423dc
CB		 124
125 /* must be word boundary */
db4a29cb
HC		 126 if (operand2 & 3)
127 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
453423dc
CB		 128
129 /* get the value */
8ae04b8f 130 rc = read_guest(vcpu, operand2, ar, &address, sizeof(address));
665170cb
HC		 131 if (rc)
132 return kvm_s390_inject_prog_cond(vcpu, rc);
133
134 address &= 0x7fffe000u;
135
136 /*
137 * Make sure the new value is valid memory. We only need to check the
138 * first page, since address is 8k aligned and memory pieces are always
139 * at least 1MB aligned and have at least a size of 1MB.
140 */
141 if (kvm_is_error_gpa(vcpu->kvm, address))
db4a29cb 142 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
453423dc 143
8d26cf7b 144 kvm_s390_set_prefix(vcpu, address);
5786fffa 145 trace_kvm_s390_handle_prefix(vcpu, 1, address);
453423dc
CB		 146 return 0;
147}
148
149static int handle_store_prefix(struct kvm_vcpu *vcpu)
150{
453423dc
CB		 151 u64 operand2;
152 u32 address;
f748f4a7 153 int rc;
27f67f87 154 u8 ar;
453423dc
CB		 155
156 vcpu->stat.instruction_stpx++;
b1c571a5 157
5087dfa6
TH		 158 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
159 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
160
8ae04b8f 161 operand2 = kvm_s390_get_base_disp_s(vcpu, &ar);
453423dc
CB		 162
163 /* must be word boundary */
db4a29cb
HC		 164 if (operand2 & 3)
165 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
453423dc 166
fda902cb 167 address = kvm_s390_get_prefix(vcpu);
453423dc
CB		 168
169 /* get the value */
8ae04b8f 170 rc = write_guest(vcpu, operand2, ar, &address, sizeof(address));
f748f4a7
HC		 171 if (rc)
172 return kvm_s390_inject_prog_cond(vcpu, rc);
453423dc 173
7cbde76b 174 VCPU_EVENT(vcpu, 3, "STPX: storing prefix 0x%x into 0x%llx", address, operand2);
5786fffa 175 trace_kvm_s390_handle_prefix(vcpu, 0, address);
453423dc
CB		 176 return 0;
177}
178
179static int handle_store_cpu_address(struct kvm_vcpu *vcpu)
180{
8b96de0e
HC		 181 u16 vcpu_id = vcpu->vcpu_id;
182 u64 ga;
183 int rc;
27f67f87 184 u8 ar;
453423dc
CB		 185
186 vcpu->stat.instruction_stap++;
b1c571a5 187
5087dfa6
TH		 188 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
189 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
190
8ae04b8f 191 ga = kvm_s390_get_base_disp_s(vcpu, &ar);
453423dc 192
8b96de0e 193 if (ga & 1)
db4a29cb 194 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
453423dc 195
8ae04b8f 196 rc = write_guest(vcpu, ga, ar, &vcpu_id, sizeof(vcpu_id));
8b96de0e
HC		 197 if (rc)
198 return kvm_s390_inject_prog_cond(vcpu, rc);
453423dc 199
7cbde76b 200 VCPU_EVENT(vcpu, 3, "STAP: storing cpu address (%u) to 0x%llx", vcpu_id, ga);
8b96de0e 201 trace_kvm_s390_handle_stap(vcpu, ga);
453423dc
CB		 202 return 0;
203}
204
730cd632 205int kvm_s390_skey_check_enable(struct kvm_vcpu *vcpu)
693ffc08 206{
3ac8e380 207 int rc = 0;
730cd632 208 struct kvm_s390_sie_block *sie_block = vcpu->arch.sie_block;
11ddcd41
DH		 209
210 trace_kvm_s390_skey_related_inst(vcpu);
730cd632 211 if (!(sie_block->ictl & (ICTL_ISKE | ICTL_SSKE | ICTL_RRBE)) &&
8d5fb0dc 212 !kvm_s390_test_cpuflags(vcpu, CPUSTAT_KSS))
3ac8e380 213 return rc;
693ffc08 214
3ac8e380 215 rc = s390_enable_skey();
11ddcd41 216 VCPU_EVENT(vcpu, 3, "enabling storage keys for guest: %d", rc);
730cd632 217 if (!rc) {
8d5fb0dc 218 if (kvm_s390_test_cpuflags(vcpu, CPUSTAT_KSS))
9daecfc6 219 kvm_s390_clear_cpuflags(vcpu, CPUSTAT_KSS);
730cd632
FA		 220 else
221 sie_block->ictl &= ~(ICTL_ISKE | ICTL_SSKE |
222 ICTL_RRBE);
223 }
3ac8e380 224 return rc;
693ffc08
DD		 225}
226
a7e19ab5 227static int try_handle_skey(struct kvm_vcpu *vcpu)
453423dc 228{
11ddcd41 229 int rc;
693ffc08 230
730cd632 231 rc = kvm_s390_skey_check_enable(vcpu);
3ac8e380
DD		 232 if (rc)
233 return rc;
a7e19ab5
DH		 234 if (sclp.has_skey) {
235 /* with storage-key facility, SIE interprets it for us */
236 kvm_s390_retry_instr(vcpu);
237 VCPU_EVENT(vcpu, 4, "%s", "retrying storage key operation");
238 return -EAGAIN;
239 }
a7e19ab5
DH		 240 return 0;
241}
5087dfa6 242
a7e19ab5
DH		 243static int handle_iske(struct kvm_vcpu *vcpu)
244{
245 unsigned long addr;
246 unsigned char key;
247 int reg1, reg2;
248 int rc;
249
a37cb07a
CB		 250 vcpu->stat.instruction_iske++;
251
ca76ec9c
JF		 252 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
253 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
254
a7e19ab5
DH		 255 rc = try_handle_skey(vcpu);
256 if (rc)
257 return rc != -EAGAIN ? rc : 0;
258
259 kvm_s390_get_regs_rre(vcpu, &reg1, &reg2);
260
261 addr = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK;
262 addr = kvm_s390_logical_to_effective(vcpu, addr);
263 addr = kvm_s390_real_to_abs(vcpu, addr);
264 addr = gfn_to_hva(vcpu->kvm, gpa_to_gfn(addr));
265 if (kvm_is_error_hva(addr))
266 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
267
268 down_read(&current->mm->mmap_sem);
269 rc = get_guest_storage_key(current->mm, addr, &key);
270 up_read(&current->mm->mmap_sem);
271 if (rc)
272 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
273 vcpu->run->s.regs.gprs[reg1] &= ~0xff;
274 vcpu->run->s.regs.gprs[reg1] |= key;
275 return 0;
276}
277
278static int handle_rrbe(struct kvm_vcpu *vcpu)
279{
280 unsigned long addr;
281 int reg1, reg2;
282 int rc;
283
a37cb07a
CB		 284 vcpu->stat.instruction_rrbe++;
285
ca76ec9c
JF		 286 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
287 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
288
a7e19ab5
DH		 289 rc = try_handle_skey(vcpu);
290 if (rc)
291 return rc != -EAGAIN ? rc : 0;
292
293 kvm_s390_get_regs_rre(vcpu, &reg1, &reg2);
294
295 addr = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK;
296 addr = kvm_s390_logical_to_effective(vcpu, addr);
297 addr = kvm_s390_real_to_abs(vcpu, addr);
298 addr = gfn_to_hva(vcpu->kvm, gpa_to_gfn(addr));
299 if (kvm_is_error_hva(addr))
300 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
301
302 down_read(&current->mm->mmap_sem);
303 rc = reset_guest_reference_bit(current->mm, addr);
304 up_read(&current->mm->mmap_sem);
305 if (rc < 0)
306 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
307
308 kvm_s390_set_psw_cc(vcpu, rc);
309 return 0;
310}
311
312#define SSKE_NQ 0x8
313#define SSKE_MR 0x4
314#define SSKE_MC 0x2
315#define SSKE_MB 0x1
316static int handle_sske(struct kvm_vcpu *vcpu)
317{
318 unsigned char m3 = vcpu->arch.sie_block->ipb >> 28;
319 unsigned long start, end;
320 unsigned char key, oldkey;
321 int reg1, reg2;
322 int rc;
323
a37cb07a
CB		 324 vcpu->stat.instruction_sske++;
325
ca76ec9c
JF		 326 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
327 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
328
a7e19ab5
DH		 329 rc = try_handle_skey(vcpu);
330 if (rc)
331 return rc != -EAGAIN ? rc : 0;
332
333 if (!test_kvm_facility(vcpu->kvm, 8))
334 m3 &= ~SSKE_MB;
335 if (!test_kvm_facility(vcpu->kvm, 10))
336 m3 &= ~(SSKE_MC | SSKE_MR);
337 if (!test_kvm_facility(vcpu->kvm, 14))
338 m3 &= ~SSKE_NQ;
339
340 kvm_s390_get_regs_rre(vcpu, &reg1, &reg2);
341
342 key = vcpu->run->s.regs.gprs[reg1] & 0xfe;
343 start = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK;
344 start = kvm_s390_logical_to_effective(vcpu, start);
345 if (m3 & SSKE_MB) {
346 /* start already designates an absolute address */
58cdf5eb 347 end = (start + _SEGMENT_SIZE) & ~(_SEGMENT_SIZE - 1);
a7e19ab5
DH		 348 } else {
349 start = kvm_s390_real_to_abs(vcpu, start);
350 end = start + PAGE_SIZE;
351 }
352
353 while (start != end) {
354 unsigned long addr = gfn_to_hva(vcpu->kvm, gpa_to_gfn(start));
355
356 if (kvm_is_error_hva(addr))
357 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
358
359 down_read(&current->mm->mmap_sem);
360 rc = cond_set_guest_storage_key(current->mm, addr, key, &oldkey,
361 m3 & SSKE_NQ, m3 & SSKE_MR,
362 m3 & SSKE_MC);
363 up_read(&current->mm->mmap_sem);
364 if (rc < 0)
365 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
366 start += PAGE_SIZE;
0b925159 367 }
a7e19ab5
DH		 368
369 if (m3 & (SSKE_MC | SSKE_MR)) {
370 if (m3 & SSKE_MB) {
371 /* skey in reg1 is unpredictable */
372 kvm_s390_set_psw_cc(vcpu, 3);
373 } else {
374 kvm_s390_set_psw_cc(vcpu, rc);
375 vcpu->run->s.regs.gprs[reg1] &= ~0xff00UL;
376 vcpu->run->s.regs.gprs[reg1] |= (u64) oldkey << 8;
377 }
378 }
379 if (m3 & SSKE_MB) {
8bb3fdd6 380 if (psw_bits(vcpu->arch.sie_block->gpsw).eaba == PSW_BITS_AMODE_64BIT)
a7e19ab5
DH		 381 vcpu->run->s.regs.gprs[reg2] &= ~PAGE_MASK;
382 else
383 vcpu->run->s.regs.gprs[reg2] &= ~0xfffff000UL;
384 end = kvm_s390_logical_to_effective(vcpu, end);
385 vcpu->run->s.regs.gprs[reg2] |= end;
386 }
453423dc
CB		 387 return 0;
388}
389
8a242234
HC		 390static int handle_ipte_interlock(struct kvm_vcpu *vcpu)
391{
8a242234 392 vcpu->stat.instruction_ipte_interlock++;
a7525982 393 if (psw_bits(vcpu->arch.sie_block->gpsw).pstate)
8a242234
HC		 394 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
395 wait_event(vcpu->kvm->arch.ipte_wq, !ipte_lock_held(vcpu));
0e8bc06a 396 kvm_s390_retry_instr(vcpu);
8a242234
HC		 397 VCPU_EVENT(vcpu, 4, "%s", "retrying ipte interlock operation");
398 return 0;
399}
400
aca84241
TH		 401static int handle_test_block(struct kvm_vcpu *vcpu)
402{
aca84241
TH		 403 gpa_t addr;
404 int reg2;
405
a37cb07a
CB		 406 vcpu->stat.instruction_tb++;
407
aca84241
TH		 408 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
409 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
410
411 kvm_s390_get_regs_rre(vcpu, NULL, &reg2);
412 addr = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK;
e45efa28 413 addr = kvm_s390_logical_to_effective(vcpu, addr);
dd9e5b7b 414 if (kvm_s390_check_low_addr_prot_real(vcpu, addr))
e45efa28 415 return kvm_s390_inject_prog_irq(vcpu, &vcpu->arch.pgm);
aca84241
TH		 416 addr = kvm_s390_real_to_abs(vcpu, addr);
417
ef23e779 418 if (kvm_is_error_gpa(vcpu->kvm, addr))
aca84241
TH		 419 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
420 /*
421 * We don't expect errors on modern systems, and do not care
422 * about storage keys (yet), so let's just clear the page.
423 */
ef23e779 424 if (kvm_clear_guest(vcpu->kvm, addr, PAGE_SIZE))
aca84241
TH		 425 return -EFAULT;
426 kvm_s390_set_psw_cc(vcpu, 0);
427 vcpu->run->s.regs.gprs[0] = 0;
428 return 0;
429}
430
fa6b7fe9 431static int handle_tpi(struct kvm_vcpu *vcpu)
453423dc 432{
fa6b7fe9 433 struct kvm_s390_interrupt_info *inti;
4799b557
HC		 434 unsigned long len;
435 u32 tpi_data[3];
261520dc 436 int rc;
7c959e82 437 u64 addr;
27f67f87 438 u8 ar;
fa6b7fe9 439
a37cb07a
CB		 440 vcpu->stat.instruction_tpi++;
441
8ae04b8f 442 addr = kvm_s390_get_base_disp_s(vcpu, &ar);
db4a29cb
HC		 443 if (addr & 3)
444 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
261520dc 445
f092669e 446 inti = kvm_s390_get_io_int(vcpu->kvm, vcpu->arch.sie_block->gcr[6], 0);
261520dc
DH		 447 if (!inti) {
448 kvm_s390_set_psw_cc(vcpu, 0);
449 return 0;
450 }
451
4799b557
HC		 452 tpi_data[0] = inti->io.subchannel_id << 16 | inti->io.subchannel_nr;
453 tpi_data[1] = inti->io.io_int_parm;
454 tpi_data[2] = inti->io.io_int_word;
7c959e82
HC		 455 if (addr) {
456 /*
457 * Store the two-word I/O interruption code into the
458 * provided area.
459 */
4799b557 460 len = sizeof(tpi_data) - 4;
8ae04b8f 461 rc = write_guest(vcpu, addr, ar, &tpi_data, len);
261520dc
DH		 462 if (rc) {
463 rc = kvm_s390_inject_prog_cond(vcpu, rc);
464 goto reinject_interrupt;
465 }
7c959e82
HC		 466 } else {
467 /*
468 * Store the three-word I/O interruption code into
469 * the appropriate lowcore area.
470 */
4799b557 471 len = sizeof(tpi_data);
261520dc
DH		 472 if (write_guest_lc(vcpu, __LC_SUBCHANNEL_ID, &tpi_data, len)) {
473 /* failed writes to the low core are not recoverable */
4799b557 474 rc = -EFAULT;
261520dc
DH		 475 goto reinject_interrupt;
476 }
7c959e82 477 }
261520dc
DH		 478
479 /* irq was successfully handed to the guest */
480 kfree(inti);
481 kvm_s390_set_psw_cc(vcpu, 1);
482 return 0;
483reinject_interrupt:
2f32d4ea
CH		 484 /*
485 * If we encounter a problem storing the interruption code, the
486 * instruction is suppressed from the guest's view: reinject the
487 * interrupt.
488 */
15462e37
DH		 489 if (kvm_s390_reinject_io_int(vcpu->kvm, inti)) {
490 kfree(inti);
491 rc = -EFAULT;
492 }
261520dc 493 /* don't set the cc, a pgm irq was injected or we drop to user space */
4799b557 494 return rc ? -EFAULT : 0;
453423dc
CB		 495}
496
fa6b7fe9
CH		 497static int handle_tsch(struct kvm_vcpu *vcpu)
498{
6d3da241
JF		 499 struct kvm_s390_interrupt_info *inti = NULL;
500 const u64 isc_mask = 0xffUL << 24; /* all iscs set */
fa6b7fe9 501
a37cb07a
CB		 502 vcpu->stat.instruction_tsch++;
503
6d3da241
JF		 504 /* a valid schid has at least one bit set */
505 if (vcpu->run->s.regs.gprs[1])
506 inti = kvm_s390_get_io_int(vcpu->kvm, isc_mask,
507 vcpu->run->s.regs.gprs[1]);
fa6b7fe9
CH		 508
509 /*
510 * Prepare exit to userspace.
511 * We indicate whether we dequeued a pending I/O interrupt
512 * so that userspace can re-inject it if the instruction gets
513 * a program check. While this may re-order the pending I/O
514 * interrupts, this is no problem since the priority is kept
515 * intact.
516 */
517 vcpu->run->exit_reason = KVM_EXIT_S390_TSCH;
518 vcpu->run->s390_tsch.dequeued = !!inti;
519 if (inti) {
520 vcpu->run->s390_tsch.subchannel_id = inti->io.subchannel_id;
521 vcpu->run->s390_tsch.subchannel_nr = inti->io.subchannel_nr;
522 vcpu->run->s390_tsch.io_int_parm = inti->io.io_int_parm;
523 vcpu->run->s390_tsch.io_int_word = inti->io.io_int_word;
524 }
525 vcpu->run->s390_tsch.ipb = vcpu->arch.sie_block->ipb;
526 kfree(inti);
527 return -EREMOTE;
528}
529
530static int handle_io_inst(struct kvm_vcpu *vcpu)
531{
532 VCPU_EVENT(vcpu, 4, "%s", "I/O instruction");
533
5087dfa6
TH		 534 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
535 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
536
fa6b7fe9
CH		 537 if (vcpu->kvm->arch.css_support) {
538 /*
539 * Most I/O instructions will be handled by userspace.
540 * Exceptions are tpi and the interrupt portion of tsch.
541 */
542 if (vcpu->arch.sie_block->ipa == 0xb236)
543 return handle_tpi(vcpu);
544 if (vcpu->arch.sie_block->ipa == 0xb235)
545 return handle_tsch(vcpu);
546 /* Handle in userspace. */
a37cb07a 547 vcpu->stat.instruction_io_other++;
fa6b7fe9
CH		 548 return -EOPNOTSUPP;
549 } else {
550 /*
b4a96015 551 * Set condition code 3 to stop the guest from issuing channel
fa6b7fe9
CH		 552 * I/O instructions.
553 */
ea828ebf 554 kvm_s390_set_psw_cc(vcpu, 3);
fa6b7fe9
CH		 555 return 0;
556 }
557}
558
453423dc
CB		 559static int handle_stfl(struct kvm_vcpu *vcpu)
560{
453423dc 561 int rc;
9d8d5786 562 unsigned int fac;
453423dc
CB		 563
564 vcpu->stat.instruction_stfl++;
5087dfa6
TH		 565
566 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
567 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
568
9d8d5786
MM		 569 /*
570 * We need to shift the lower 32 facility bits (bit 0-31) from a u64
571 * into a u32 memory representation. They will remain bits 0-31.
572 */
c54f0d6a 573 fac = *vcpu->kvm->arch.model.fac_list >> 32;
c667aeac 574 rc = write_guest_lc(vcpu, offsetof(struct lowcore, stfl_fac_list),
9d8d5786 575 &fac, sizeof(fac));
dc5008b9 576 if (rc)
0f9701c6 577 return rc;
7cbde76b 578 VCPU_EVENT(vcpu, 3, "STFL: store facility list 0x%x", fac);
9d8d5786 579 trace_kvm_s390_handle_stfl(vcpu, fac);
453423dc
CB		 580 return 0;
581}
582
48a3e950
CH		 583#define PSW_MASK_ADDR_MODE (PSW_MASK_EA | PSW_MASK_BA)
584#define PSW_MASK_UNASSIGNED 0xb80800fe7fffffffUL
d21683ea 585#define PSW_ADDR_24 0x0000000000ffffffUL
48a3e950
CH		 586#define PSW_ADDR_31 0x000000007fffffffUL
587
a3fb577e
TH		 588int is_valid_psw(psw_t *psw)
589{
3736b874
HC		 590 if (psw->mask & PSW_MASK_UNASSIGNED)
591 return 0;
592 if ((psw->mask & PSW_MASK_ADDR_MODE) == PSW_MASK_BA) {
593 if (psw->addr & ~PSW_ADDR_31)
594 return 0;
595 }
596 if (!(psw->mask & PSW_MASK_ADDR_MODE) && (psw->addr & ~PSW_ADDR_24))
597 return 0;
598 if ((psw->mask & PSW_MASK_ADDR_MODE) == PSW_MASK_EA)
599 return 0;
a3fb577e
TH		 600 if (psw->addr & 1)
601 return 0;
3736b874
HC		 602 return 1;
603}
604
48a3e950
CH		 605int kvm_s390_handle_lpsw(struct kvm_vcpu *vcpu)
606{
3736b874 607 psw_t *gpsw = &vcpu->arch.sie_block->gpsw;
48a3e950 608 psw_compat_t new_psw;
3736b874 609 u64 addr;
2d8bcaed 610 int rc;
27f67f87 611 u8 ar;
48a3e950 612
a37cb07a
CB		 613 vcpu->stat.instruction_lpsw++;
614
3736b874 615 if (gpsw->mask & PSW_MASK_PSTATE)
208dd756
TH		 616 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
617
8ae04b8f 618 addr = kvm_s390_get_base_disp_s(vcpu, &ar);
6fd0fcc9
HC		 619 if (addr & 7)
620 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
2d8bcaed 621
8ae04b8f 622 rc = read_guest(vcpu, addr, ar, &new_psw, sizeof(new_psw));
2d8bcaed
HC		 623 if (rc)
624 return kvm_s390_inject_prog_cond(vcpu, rc);
6fd0fcc9
HC		 625 if (!(new_psw.mask & PSW32_MASK_BASE))
626 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
3736b874
HC		 627 gpsw->mask = (new_psw.mask & ~PSW32_MASK_BASE) << 32;
628 gpsw->mask |= new_psw.addr & PSW32_ADDR_AMODE;
629 gpsw->addr = new_psw.addr & ~PSW32_ADDR_AMODE;
630 if (!is_valid_psw(gpsw))
6fd0fcc9 631 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
48a3e950
CH		 632 return 0;
633}
634
635static int handle_lpswe(struct kvm_vcpu *vcpu)
636{
48a3e950 637 psw_t new_psw;
3736b874 638 u64 addr;
2d8bcaed 639 int rc;
27f67f87 640 u8 ar;
48a3e950 641
a37cb07a
CB		 642 vcpu->stat.instruction_lpswe++;
643
5087dfa6
TH		 644 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
645 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
646
8ae04b8f 647 addr = kvm_s390_get_base_disp_s(vcpu, &ar);
6fd0fcc9
HC		 648 if (addr & 7)
649 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
8ae04b8f 650 rc = read_guest(vcpu, addr, ar, &new_psw, sizeof(new_psw));
2d8bcaed
HC		 651 if (rc)
652 return kvm_s390_inject_prog_cond(vcpu, rc);
3736b874
HC		 653 vcpu->arch.sie_block->gpsw = new_psw;
654 if (!is_valid_psw(&vcpu->arch.sie_block->gpsw))
6fd0fcc9 655 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
48a3e950
CH		 656 return 0;
657}
658
453423dc
CB		 659static int handle_stidp(struct kvm_vcpu *vcpu)
660{
9bb0ec09 661 u64 stidp_data = vcpu->kvm->arch.model.cpuid;
453423dc 662 u64 operand2;
7d777d78 663 int rc;
27f67f87 664 u8 ar;
453423dc
CB		 665
666 vcpu->stat.instruction_stidp++;
b1c571a5 667
5087dfa6
TH		 668 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
669 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
670
8ae04b8f 671 operand2 = kvm_s390_get_base_disp_s(vcpu, &ar);
453423dc 672
db4a29cb
HC		 673 if (operand2 & 7)
674 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
453423dc 675
8ae04b8f 676 rc = write_guest(vcpu, operand2, ar, &stidp_data, sizeof(stidp_data));
7d777d78
HC		 677 if (rc)
678 return kvm_s390_inject_prog_cond(vcpu, rc);
453423dc 679
7cbde76b 680 VCPU_EVENT(vcpu, 3, "STIDP: store cpu id 0x%llx", stidp_data);
453423dc
CB		 681 return 0;
682}
683
684static void handle_stsi_3_2_2(struct kvm_vcpu *vcpu, struct sysinfo_3_2_2 *mem)
685{
453423dc
CB		 686 int cpus = 0;
687 int n;
688
ff520a63 689 cpus = atomic_read(&vcpu->kvm->online_vcpus);
453423dc
CB		 690
691 /* deal with other level 3 hypervisors */
caf757c6 692 if (stsi(mem, 3, 2, 2))
453423dc
CB		 693 mem->count = 0;
694 if (mem->count < 8)
695 mem->count++;
696 for (n = mem->count - 1; n > 0 ; n--)
697 memcpy(&mem->vm[n], &mem->vm[n - 1], sizeof(mem->vm[0]));
698
b75f4c9a 699 memset(&mem->vm[0], 0, sizeof(mem->vm[0]));
453423dc
CB		 700 mem->vm[0].cpus_total = cpus;
701 mem->vm[0].cpus_configured = cpus;
702 mem->vm[0].cpus_standby = 0;
703 mem->vm[0].cpus_reserved = 0;
704 mem->vm[0].caf = 1000;
705 memcpy(mem->vm[0].name, "KVMguest", 8);
706 ASCEBC(mem->vm[0].name, 8);
707 memcpy(mem->vm[0].cpi, "KVM/Linux ", 16);
708 ASCEBC(mem->vm[0].cpi, 16);
709}
710
27f67f87 711static void insert_stsi_usr_data(struct kvm_vcpu *vcpu, u64 addr, u8 ar,
e44fc8c9
ET		 712 u8 fc, u8 sel1, u16 sel2)
713{
714 vcpu->run->exit_reason = KVM_EXIT_S390_STSI;
715 vcpu->run->s390_stsi.addr = addr;
716 vcpu->run->s390_stsi.ar = ar;
717 vcpu->run->s390_stsi.fc = fc;
718 vcpu->run->s390_stsi.sel1 = sel1;
719 vcpu->run->s390_stsi.sel2 = sel2;
720}
721
453423dc
CB		 722static int handle_stsi(struct kvm_vcpu *vcpu)
723{
5a32c1af
CB		 724 int fc = (vcpu->run->s.regs.gprs[0] & 0xf0000000) >> 28;
725 int sel1 = vcpu->run->s.regs.gprs[0] & 0xff;
726 int sel2 = vcpu->run->s.regs.gprs[1] & 0xffff;
c51f068c 727 unsigned long mem = 0;
453423dc 728 u64 operand2;
db4a29cb 729 int rc = 0;
27f67f87 730 u8 ar;
453423dc
CB		 731
732 vcpu->stat.instruction_stsi++;
7cbde76b 733 VCPU_EVENT(vcpu, 3, "STSI: fc: %u sel1: %u sel2: %u", fc, sel1, sel2);
453423dc 734
5087dfa6
TH		 735 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
736 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
737
87d41fb4 738 if (fc > 3) {
ea828ebf 739 kvm_s390_set_psw_cc(vcpu, 3);
87d41fb4
TH		 740 return 0;
741 }
453423dc 742
87d41fb4
TH		 743 if (vcpu->run->s.regs.gprs[0] & 0x0fffff00
744 || vcpu->run->s.regs.gprs[1] & 0xffff0000)
453423dc
CB		 745 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
746
87d41fb4 747 if (fc == 0) {
5a32c1af 748 vcpu->run->s.regs.gprs[0] = 3 << 28;
ea828ebf 749 kvm_s390_set_psw_cc(vcpu, 0);
453423dc 750 return 0;
87d41fb4
TH		 751 }
752
8ae04b8f 753 operand2 = kvm_s390_get_base_disp_s(vcpu, &ar);
87d41fb4
TH		 754
755 if (operand2 & 0xfff)
756 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
757
758 switch (fc) {
453423dc
CB		 759 case 1: /* same handling for 1 and 2 */
760 case 2:
761 mem = get_zeroed_page(GFP_KERNEL);
762 if (!mem)
c51f068c 763 goto out_no_data;
caf757c6 764 if (stsi((void *) mem, fc, sel1, sel2))
c51f068c 765 goto out_no_data;
453423dc
CB		 766 break;
767 case 3:
768 if (sel1 != 2 || sel2 != 2)
c51f068c 769 goto out_no_data;
453423dc
CB		 770 mem = get_zeroed_page(GFP_KERNEL);
771 if (!mem)
c51f068c 772 goto out_no_data;
453423dc
CB		 773 handle_stsi_3_2_2(vcpu, (void *) mem);
774 break;
453423dc
CB		 775 }
776
8ae04b8f 777 rc = write_guest(vcpu, operand2, ar, (void *)mem, PAGE_SIZE);
645c5bc1
HC		 778 if (rc) {
779 rc = kvm_s390_inject_prog_cond(vcpu, rc);
780 goto out;
453423dc 781 }
e44fc8c9
ET		 782 if (vcpu->kvm->arch.user_stsi) {
783 insert_stsi_usr_data(vcpu, operand2, ar, fc, sel1, sel2);
784 rc = -EREMOTE;
785 }
5786fffa 786 trace_kvm_s390_handle_stsi(vcpu, fc, sel1, sel2, operand2);
453423dc 787 free_page(mem);
ea828ebf 788 kvm_s390_set_psw_cc(vcpu, 0);
5a32c1af 789 vcpu->run->s.regs.gprs[0] = 0;
e44fc8c9 790 return rc;
c51f068c 791out_no_data:
ea828ebf 792 kvm_s390_set_psw_cc(vcpu, 3);
645c5bc1 793out:
c51f068c 794 free_page(mem);
db4a29cb 795 return rc;
453423dc
CB		 796}
797
f379aae5 798static const intercept_handler_t b2_handlers[256] = {
453423dc 799 [0x02] = handle_stidp,
6a3f95a6 800 [0x04] = handle_set_clock,
453423dc
CB		 801 [0x10] = handle_set_prefix,
802 [0x11] = handle_store_prefix,
803 [0x12] = handle_store_cpu_address,
a3508fbe 804 [0x14] = kvm_s390_handle_vsie,
8a242234 805 [0x21] = handle_ipte_interlock,
a7e19ab5
DH		 806 [0x29] = handle_iske,
807 [0x2a] = handle_rrbe,
808 [0x2b] = handle_sske,
aca84241 809 [0x2c] = handle_test_block,
f379aae5
CH		 810 [0x30] = handle_io_inst,
811 [0x31] = handle_io_inst,
812 [0x32] = handle_io_inst,
813 [0x33] = handle_io_inst,
814 [0x34] = handle_io_inst,
815 [0x35] = handle_io_inst,
816 [0x36] = handle_io_inst,
817 [0x37] = handle_io_inst,
818 [0x38] = handle_io_inst,
819 [0x39] = handle_io_inst,
820 [0x3a] = handle_io_inst,
821 [0x3b] = handle_io_inst,
822 [0x3c] = handle_io_inst,
8a242234 823 [0x50] = handle_ipte_interlock,
c0a6bfdc 824 [0x56] = handle_sthyi,
f379aae5
CH		 825 [0x5f] = handle_io_inst,
826 [0x74] = handle_io_inst,
827 [0x76] = handle_io_inst,
453423dc
CB		 828 [0x7d] = handle_stsi,
829 [0xb1] = handle_stfl,
48a3e950 830 [0xb2] = handle_lpswe,
453423dc
CB		 831};
832
70455a36 833int kvm_s390_handle_b2(struct kvm_vcpu *vcpu)
453423dc
CB		 834{
835 intercept_handler_t handler;
836
70455a36 837 /*
5087dfa6
TH		 838 * A lot of B2 instructions are priviledged. Here we check for
839 * the privileged ones, that we can handle in the kernel.
840 * Anything else goes to userspace.
841 */
f379aae5 842 handler = b2_handlers[vcpu->arch.sie_block->ipa & 0x00ff];
5087dfa6
TH		 843 if (handler)
844 return handler(vcpu);
845
b8e660b8 846 return -EOPNOTSUPP;
453423dc 847}
bb25b9ba 848
48a3e950
CH		 849static int handle_epsw(struct kvm_vcpu *vcpu)
850{
851 int reg1, reg2;
852
a37cb07a
CB		 853 vcpu->stat.instruction_epsw++;
854
aeb87c3c 855 kvm_s390_get_regs_rre(vcpu, &reg1, &reg2);
48a3e950
CH		 856
857 /* This basically extracts the mask half of the psw. */
843200e7 858 vcpu->run->s.regs.gprs[reg1] &= 0xffffffff00000000UL;
48a3e950
CH		 859 vcpu->run->s.regs.gprs[reg1] |= vcpu->arch.sie_block->gpsw.mask >> 32;
860 if (reg2) {
843200e7 861 vcpu->run->s.regs.gprs[reg2] &= 0xffffffff00000000UL;
48a3e950 862 vcpu->run->s.regs.gprs[reg2] |=
843200e7 863 vcpu->arch.sie_block->gpsw.mask & 0x00000000ffffffffUL;
48a3e950
CH		 864 }
865 return 0;
866}
867
69d0d3a3
CB		 868#define PFMF_RESERVED 0xfffc0101UL
869#define PFMF_SK 0x00020000UL
870#define PFMF_CF 0x00010000UL
871#define PFMF_UI 0x00008000UL
872#define PFMF_FSC 0x00007000UL
873#define PFMF_NQ 0x00000800UL
874#define PFMF_MR 0x00000400UL
875#define PFMF_MC 0x00000200UL
876#define PFMF_KEY 0x000000feUL
877
878static int handle_pfmf(struct kvm_vcpu *vcpu)
879{
1824c723 880 bool mr = false, mc = false, nq;
69d0d3a3
CB		 881 int reg1, reg2;
882 unsigned long start, end;
1824c723 883 unsigned char key;
69d0d3a3
CB		 884
885 vcpu->stat.instruction_pfmf++;
886
887 kvm_s390_get_regs_rre(vcpu, &reg1, &reg2);
888
03c02807 889 if (!test_kvm_facility(vcpu->kvm, 8))
69d0d3a3
CB		 890 return kvm_s390_inject_program_int(vcpu, PGM_OPERATION);
891
892 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
208dd756 893 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
69d0d3a3
CB		 894
895 if (vcpu->run->s.regs.gprs[reg1] & PFMF_RESERVED)
896 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
897
edc5b055
DH		 898 /* Only provide non-quiescing support if enabled for the guest */
899 if (vcpu->run->s.regs.gprs[reg1] & PFMF_NQ &&
900 !test_kvm_facility(vcpu->kvm, 14))
69d0d3a3
CB		 901 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
902
1824c723
DH		 903 /* Only provide conditional-SSKE support if enabled for the guest */
904 if (vcpu->run->s.regs.gprs[reg1] & PFMF_SK &&
905 test_kvm_facility(vcpu->kvm, 10)) {
906 mr = vcpu->run->s.regs.gprs[reg1] & PFMF_MR;
907 mc = vcpu->run->s.regs.gprs[reg1] & PFMF_MC;
908 }
909
910 nq = vcpu->run->s.regs.gprs[reg1] & PFMF_NQ;
911 key = vcpu->run->s.regs.gprs[reg1] & PFMF_KEY;
69d0d3a3 912 start = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK;
a02689fe 913 start = kvm_s390_logical_to_effective(vcpu, start);
fb34c603 914
6164a2e9
DH		 915 if (vcpu->run->s.regs.gprs[reg1] & PFMF_CF) {
916 if (kvm_s390_check_low_addr_prot_real(vcpu, start))
917 return kvm_s390_inject_prog_irq(vcpu, &vcpu->arch.pgm);
918 }
919
69d0d3a3
CB		 920 switch (vcpu->run->s.regs.gprs[reg1] & PFMF_FSC) {
921 case 0x00000000:
6164a2e9
DH		 922 /* only 4k frames specify a real address */
923 start = kvm_s390_real_to_abs(vcpu, start);
58cdf5eb 924 end = (start + PAGE_SIZE) & ~(PAGE_SIZE - 1);
69d0d3a3
CB		 925 break;
926 case 0x00001000:
58cdf5eb 927 end = (start + _SEGMENT_SIZE) & ~(_SEGMENT_SIZE - 1);
69d0d3a3 928 break;
69d0d3a3 929 case 0x00002000:
53df84f8
GH		 930 /* only support 2G frame size if EDAT2 is available and we are
931 not in 24-bit addressing mode */
932 if (!test_kvm_facility(vcpu->kvm, 78) ||
8bb3fdd6 933 psw_bits(vcpu->arch.sie_block->gpsw).eaba == PSW_BITS_AMODE_24BIT)
53df84f8 934 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
58cdf5eb 935 end = (start + _REGION3_SIZE) & ~(_REGION3_SIZE - 1);
53df84f8 936 break;
69d0d3a3
CB		 937 default:
938 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
939 }
a02689fe 940
695be0e7 941 while (start != end) {
6164a2e9 942 unsigned long useraddr;
fb34c603
TH		 943
944 /* Translate guest address to host address */
6164a2e9 945 useraddr = gfn_to_hva(vcpu->kvm, gpa_to_gfn(start));
fb34c603 946 if (kvm_is_error_hva(useraddr))
69d0d3a3
CB		 947 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
948
949 if (vcpu->run->s.regs.gprs[reg1] & PFMF_CF) {
950 if (clear_user((void __user *)useraddr, PAGE_SIZE))
951 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
952 }
953
954 if (vcpu->run->s.regs.gprs[reg1] & PFMF_SK) {
730cd632 955 int rc = kvm_s390_skey_check_enable(vcpu);
3ac8e380
DD		 956
957 if (rc)
958 return rc;
d3ed1cee 959 down_read(&current->mm->mmap_sem);
1824c723
DH		 960 rc = cond_set_guest_storage_key(current->mm, useraddr,
961 key, NULL, nq, mr, mc);
d3ed1cee 962 up_read(&current->mm->mmap_sem);
1824c723 963 if (rc < 0)
69d0d3a3
CB		 964 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
965 }
966
967 start += PAGE_SIZE;
968 }
2c26d1d2 969 if (vcpu->run->s.regs.gprs[reg1] & PFMF_FSC) {
8bb3fdd6 970 if (psw_bits(vcpu->arch.sie_block->gpsw).eaba == PSW_BITS_AMODE_64BIT) {
2c26d1d2
DH		 971 vcpu->run->s.regs.gprs[reg2] = end;
972 } else {
973 vcpu->run->s.regs.gprs[reg2] &= ~0xffffffffUL;
974 end = kvm_s390_logical_to_effective(vcpu, end);
975 vcpu->run->s.regs.gprs[reg2] |= end;
976 }
977 }
69d0d3a3
CB		 978 return 0;
979}
980
190df4a2
CI		 981static inline int do_essa(struct kvm_vcpu *vcpu, const int orc)
982{
983 struct kvm_s390_migration_state *ms = vcpu->kvm->arch.migration_state;
984 int r1, r2, nappended, entries;
985 unsigned long gfn, hva, res, pgstev, ptev;
986 unsigned long *cbrlo;
987
988 /*
989 * We don't need to set SD.FPF.SK to 1 here, because if we have a
990 * machine check here we either handle it or crash
991 */
992
993 kvm_s390_get_regs_rre(vcpu, &r1, &r2);
994 gfn = vcpu->run->s.regs.gprs[r2] >> PAGE_SHIFT;
995 hva = gfn_to_hva(vcpu->kvm, gfn);
996 entries = (vcpu->arch.sie_block->cbrlo & ~PAGE_MASK) >> 3;
997
998 if (kvm_is_error_hva(hva))
999 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
1000
1001 nappended = pgste_perform_essa(vcpu->kvm->mm, hva, orc, &ptev, &pgstev);
1002 if (nappended < 0) {
1003 res = orc ? 0x10 : 0;
1004 vcpu->run->s.regs.gprs[r1] = res; /* Exception Indication */
1005 return 0;
1006 }
1007 res = (pgstev & _PGSTE_GPS_USAGE_MASK) >> 22;
1008 /*
1009 * Set the block-content state part of the result. 0 means resident, so
1010 * nothing to do if the page is valid. 2 is for preserved pages
1011 * (non-present and non-zero), and 3 for zero pages (non-present and
1012 * zero).
1013 */
1014 if (ptev & _PAGE_INVALID) {
1015 res |= 2;
1016 if (pgstev & _PGSTE_GPS_ZERO)
1017 res |= 1;
1018 }
1bab1c02
CI		 1019 if (pgstev & _PGSTE_GPS_NODAT)
1020 res |= 0x20;
190df4a2
CI		 1021 vcpu->run->s.regs.gprs[r1] = res;
1022 /*
1023 * It is possible that all the normal 511 slots were full, in which case
1024 * we will now write in the 512th slot, which is reserved for host use.
1025 * In both cases we let the normal essa handling code process all the
1026 * slots, including the reserved one, if needed.
1027 */
1028 if (nappended > 0) {
1029 cbrlo = phys_to_virt(vcpu->arch.sie_block->cbrlo & PAGE_MASK);
1030 cbrlo[entries] = gfn << PAGE_SHIFT;
1031 }
1032
c2cf265d 1033 if (orc && gfn < ms->bitmap_size) {
190df4a2
CI		 1034 /* increment only if we are really flipping the bit to 1 */
1035 if (!test_and_set_bit(gfn, ms->pgste_bitmap))
1036 atomic64_inc(&ms->dirty_pages);
1037 }
1038
1039 return nappended;
1040}
1041
b31288fa
KW		 1042static int handle_essa(struct kvm_vcpu *vcpu)
1043{
1044 /* entries expected to be 1FF */
1045 int entries = (vcpu->arch.sie_block->cbrlo & ~PAGE_MASK) >> 3;
4a5e7e38 1046 unsigned long *cbrlo;
b31288fa 1047 struct gmap *gmap;
190df4a2 1048 int i, orc;
b31288fa 1049
7cbde76b 1050 VCPU_EVENT(vcpu, 4, "ESSA: release %d pages", entries);
b31288fa
KW		 1051 gmap = vcpu->arch.gmap;
1052 vcpu->stat.instruction_essa++;
e6db1d61 1053 if (!vcpu->kvm->arch.use_cmma)
b31288fa
KW		 1054 return kvm_s390_inject_program_int(vcpu, PGM_OPERATION);
1055
1056 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
1057 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
190df4a2
CI		 1058 /* Check for invalid operation request code */
1059 orc = (vcpu->arch.sie_block->ipb & 0xf0000000) >> 28;
1bab1c02
CI		 1060 /* ORCs 0-6 are always valid */
1061 if (orc > (test_kvm_facility(vcpu->kvm, 147) ? ESSA_SET_STABLE_NODAT
1062 : ESSA_SET_STABLE_IF_RESIDENT))
b31288fa
KW		 1063 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
1064
190df4a2
CI		 1065 if (likely(!vcpu->kvm->arch.migration_state)) {
1066 /*
1067 * CMMA is enabled in the KVM settings, but is disabled in
1068 * the SIE block and in the mm_context, and we are not doing
1069 * a migration. Enable CMMA in the mm_context.
1070 * Since we need to take a write lock to write to the context
1071 * to avoid races with storage keys handling, we check if the
1072 * value really needs to be written to; if the value is
1073 * already correct, we do nothing and avoid the lock.
1074 */
1075 if (vcpu->kvm->mm->context.use_cmma == 0) {
1076 down_write(&vcpu->kvm->mm->mmap_sem);
1077 vcpu->kvm->mm->context.use_cmma = 1;
1078 up_write(&vcpu->kvm->mm->mmap_sem);
1079 }
1080 /*
1081 * If we are here, we are supposed to have CMMA enabled in
1082 * the SIE block. Enabling CMMA works on a per-CPU basis,
1083 * while the context use_cmma flag is per process.
1084 * It's possible that the context flag is enabled and the
1085 * SIE flag is not, so we set the flag always; if it was
1086 * already set, nothing changes, otherwise we enable it
1087 * on this CPU too.
1088 */
1089 vcpu->arch.sie_block->ecb2 |= ECB2_CMMA;
1090 /* Retry the ESSA instruction */
1091 kvm_s390_retry_instr(vcpu);
1092 } else {
1093 /* Account for the possible extra cbrl entry */
1094 i = do_essa(vcpu, orc);
1095 if (i < 0)
1096 return i;
1097 entries += i;
1098 }
b31288fa
KW		 1099 vcpu->arch.sie_block->cbrlo &= PAGE_MASK; /* reset nceo */
1100 cbrlo = phys_to_virt(vcpu->arch.sie_block->cbrlo);
1101 down_read(&gmap->mm->mmap_sem);
4a5e7e38
DH		 1102 for (i = 0; i < entries; ++i)
1103 __gmap_zap(gmap, cbrlo[i]);
b31288fa 1104 up_read(&gmap->mm->mmap_sem);
b31288fa
KW		 1105 return 0;
1106}
1107
48a3e950 1108static const intercept_handler_t b9_handlers[256] = {
8a242234 1109 [0x8a] = handle_ipte_interlock,
48a3e950 1110 [0x8d] = handle_epsw,
8a242234
HC		 1111 [0x8e] = handle_ipte_interlock,
1112 [0x8f] = handle_ipte_interlock,
b31288fa 1113 [0xab] = handle_essa,
69d0d3a3 1114 [0xaf] = handle_pfmf,
48a3e950
CH		 1115};
1116
1117int kvm_s390_handle_b9(struct kvm_vcpu *vcpu)
1118{
1119 intercept_handler_t handler;
1120
1121 /* This is handled just as for the B2 instructions. */
1122 handler = b9_handlers[vcpu->arch.sie_block->ipa & 0x00ff];
5087dfa6
TH		 1123 if (handler)
1124 return handler(vcpu);
1125
48a3e950
CH		 1126 return -EOPNOTSUPP;
1127}
1128
953ed88d
TH		 1129int kvm_s390_handle_lctl(struct kvm_vcpu *vcpu)
1130{
1131 int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
1132 int reg3 = vcpu->arch.sie_block->ipa & 0x000f;
fc56eb66
HC		 1133 int reg, rc, nr_regs;
1134 u32 ctl_array[16];
f987a3ee 1135 u64 ga;
27f67f87 1136 u8 ar;
953ed88d
TH		 1137
1138 vcpu->stat.instruction_lctl++;
1139
1140 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
1141 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
1142
8ae04b8f 1143 ga = kvm_s390_get_base_disp_rs(vcpu, &ar);
953ed88d 1144
f987a3ee 1145 if (ga & 3)
953ed88d
TH		 1146 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
1147
7cbde76b 1148 VCPU_EVENT(vcpu, 4, "LCTL: r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga);
f987a3ee 1149 trace_kvm_s390_handle_lctl(vcpu, 0, reg1, reg3, ga);
953ed88d 1150
fc56eb66 1151 nr_regs = ((reg3 - reg1) & 0xf) + 1;
8ae04b8f 1152 rc = read_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u32));
fc56eb66
HC		 1153 if (rc)
1154 return kvm_s390_inject_prog_cond(vcpu, rc);
953ed88d 1155 reg = reg1;
fc56eb66 1156 nr_regs = 0;
953ed88d 1157 do {
953ed88d 1158 vcpu->arch.sie_block->gcr[reg] &= 0xffffffff00000000ul;
fc56eb66 1159 vcpu->arch.sie_block->gcr[reg] |= ctl_array[nr_regs++];
953ed88d
TH		 1160 if (reg == reg3)
1161 break;
1162 reg = (reg + 1) % 16;
1163 } while (1);
2dca485f 1164 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
953ed88d
TH		 1165 return 0;
1166}
1167
aba07508
DH		 1168int kvm_s390_handle_stctl(struct kvm_vcpu *vcpu)
1169{
1170 int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
1171 int reg3 = vcpu->arch.sie_block->ipa & 0x000f;
fc56eb66
HC		 1172 int reg, rc, nr_regs;
1173 u32 ctl_array[16];
aba07508 1174 u64 ga;
27f67f87 1175 u8 ar;
aba07508
DH		 1176
1177 vcpu->stat.instruction_stctl++;
1178
1179 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
1180 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
1181
8ae04b8f 1182 ga = kvm_s390_get_base_disp_rs(vcpu, &ar);
aba07508
DH		 1183
1184 if (ga & 3)
1185 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
1186
7cbde76b 1187 VCPU_EVENT(vcpu, 4, "STCTL r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga);
aba07508
DH		 1188 trace_kvm_s390_handle_stctl(vcpu, 0, reg1, reg3, ga);
1189
1190 reg = reg1;
fc56eb66 1191 nr_regs = 0;
aba07508 1192 do {
fc56eb66 1193 ctl_array[nr_regs++] = vcpu->arch.sie_block->gcr[reg];
aba07508
DH		 1194 if (reg == reg3)
1195 break;
1196 reg = (reg + 1) % 16;
1197 } while (1);
8ae04b8f 1198 rc = write_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u32));
fc56eb66 1199 return rc ? kvm_s390_inject_prog_cond(vcpu, rc) : 0;
aba07508
DH		 1200}
1201
953ed88d
TH		 1202static int handle_lctlg(struct kvm_vcpu *vcpu)
1203{
1204 int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
1205 int reg3 = vcpu->arch.sie_block->ipa & 0x000f;
fc56eb66
HC		 1206 int reg, rc, nr_regs;
1207 u64 ctl_array[16];
1208 u64 ga;
27f67f87 1209 u8 ar;
953ed88d
TH		 1210
1211 vcpu->stat.instruction_lctlg++;
1212
1213 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
1214 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
1215
8ae04b8f 1216 ga = kvm_s390_get_base_disp_rsy(vcpu, &ar);
953ed88d 1217
f987a3ee 1218 if (ga & 7)
953ed88d
TH		 1219 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
1220
7cbde76b 1221 VCPU_EVENT(vcpu, 4, "LCTLG: r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga);
f987a3ee 1222 trace_kvm_s390_handle_lctl(vcpu, 1, reg1, reg3, ga);
953ed88d 1223
fc56eb66 1224 nr_regs = ((reg3 - reg1) & 0xf) + 1;
8ae04b8f 1225 rc = read_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u64));
fc56eb66
HC		 1226 if (rc)
1227 return kvm_s390_inject_prog_cond(vcpu, rc);
1228 reg = reg1;
1229 nr_regs = 0;
953ed88d 1230 do {
fc56eb66 1231 vcpu->arch.sie_block->gcr[reg] = ctl_array[nr_regs++];
953ed88d
TH		 1232 if (reg == reg3)
1233 break;
1234 reg = (reg + 1) % 16;
1235 } while (1);
2dca485f 1236 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
953ed88d
TH		 1237 return 0;
1238}
1239
aba07508
DH		 1240static int handle_stctg(struct kvm_vcpu *vcpu)
1241{
1242 int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
1243 int reg3 = vcpu->arch.sie_block->ipa & 0x000f;
fc56eb66
HC		 1244 int reg, rc, nr_regs;
1245 u64 ctl_array[16];
1246 u64 ga;
27f67f87 1247 u8 ar;
aba07508
DH		 1248
1249 vcpu->stat.instruction_stctg++;
1250
1251 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
1252 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
1253
8ae04b8f 1254 ga = kvm_s390_get_base_disp_rsy(vcpu, &ar);
aba07508
DH		 1255
1256 if (ga & 7)
1257 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
1258
7cbde76b 1259 VCPU_EVENT(vcpu, 4, "STCTG r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga);
aba07508
DH		 1260 trace_kvm_s390_handle_stctl(vcpu, 1, reg1, reg3, ga);
1261
fc56eb66
HC		 1262 reg = reg1;
1263 nr_regs = 0;
aba07508 1264 do {
fc56eb66 1265 ctl_array[nr_regs++] = vcpu->arch.sie_block->gcr[reg];
aba07508
DH		 1266 if (reg == reg3)
1267 break;
1268 reg = (reg + 1) % 16;
1269 } while (1);
8ae04b8f 1270 rc = write_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u64));
fc56eb66 1271 return rc ? kvm_s390_inject_prog_cond(vcpu, rc) : 0;
aba07508
DH		 1272}
1273
f379aae5 1274static const intercept_handler_t eb_handlers[256] = {
953ed88d 1275 [0x2f] = handle_lctlg,
aba07508 1276 [0x25] = handle_stctg,
80cd8763
FZ		 1277 [0x60] = handle_ri,
1278 [0x61] = handle_ri,
1279 [0x62] = handle_ri,
f379aae5
CH		 1280};
1281
953ed88d 1282int kvm_s390_handle_eb(struct kvm_vcpu *vcpu)
f379aae5
CH		 1283{
1284 intercept_handler_t handler;
1285
f379aae5
CH		 1286 handler = eb_handlers[vcpu->arch.sie_block->ipb & 0xff];
1287 if (handler)
1288 return handler(vcpu);
1289 return -EOPNOTSUPP;
1290}
1291
bb25b9ba
CB		 1292static int handle_tprot(struct kvm_vcpu *vcpu)
1293{
b1c571a5 1294 u64 address1, address2;
a0465f9a
TH		 1295 unsigned long hva, gpa;
1296 int ret = 0, cc = 0;
1297 bool writable;
27f67f87 1298 u8 ar;
bb25b9ba
CB		 1299
1300 vcpu->stat.instruction_tprot++;
1301
f9f6bbc6
TH		 1302 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
1303 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
1304
8ae04b8f 1305 kvm_s390_get_base_disp_sse(vcpu, &address1, &address2, &ar, NULL);
b1c571a5 1306
bb25b9ba
CB		 1307 /* we only handle the Linux memory detection case:
1308 * access key == 0
bb25b9ba
CB		 1309 * everything else goes to userspace. */
1310 if (address2 & 0xf0)
1311 return -EOPNOTSUPP;
1312 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_DAT)
a0465f9a 1313 ipte_lock(vcpu);
92c96321 1314 ret = guest_translate_address(vcpu, address1, ar, &gpa, GACC_STORE);
a0465f9a
TH		 1315 if (ret == PGM_PROTECTION) {
1316 /* Write protected? Try again with read-only... */
1317 cc = 1;
92c96321
DH		 1318 ret = guest_translate_address(vcpu, address1, ar, &gpa,
1319 GACC_FETCH);
a0465f9a
TH		 1320 }
1321 if (ret) {
1322 if (ret == PGM_ADDRESSING || ret == PGM_TRANSLATION_SPEC) {
1323 ret = kvm_s390_inject_program_int(vcpu, ret);
1324 } else if (ret > 0) {
1325 /* Translation not available */
1326 kvm_s390_set_psw_cc(vcpu, 3);
1327 ret = 0;
1328 }
1329 goto out_unlock;
1330 }
59a1fa2d 1331
a0465f9a
TH		 1332 hva = gfn_to_hva_prot(vcpu->kvm, gpa_to_gfn(gpa), &writable);
1333 if (kvm_is_error_hva(hva)) {
1334 ret = kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
1335 } else {
1336 if (!writable)
1337 cc = 1; /* Write not permitted ==> read-only */
1338 kvm_s390_set_psw_cc(vcpu, cc);
1339 /* Note: CC2 only occurs for storage keys (not supported yet) */
1340 }
1341out_unlock:
1342 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_DAT)
1343 ipte_unlock(vcpu);
1344 return ret;
bb25b9ba
CB		 1345}
1346
1347int kvm_s390_handle_e5(struct kvm_vcpu *vcpu)
1348{
1349 /* For e5xx... instructions we only handle TPROT */
1350 if ((vcpu->arch.sie_block->ipa & 0x00ff) == 0x01)
1351 return handle_tprot(vcpu);
1352 return -EOPNOTSUPP;
1353}
1354
8c3f61e2
CH		 1355static int handle_sckpf(struct kvm_vcpu *vcpu)
1356{
1357 u32 value;
1358
a37cb07a
CB		 1359 vcpu->stat.instruction_sckpf++;
1360
8c3f61e2 1361 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
208dd756 1362 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
8c3f61e2
CH		 1363
1364 if (vcpu->run->s.regs.gprs[0] & 0x00000000ffff0000)
1365 return kvm_s390_inject_program_int(vcpu,
1366 PGM_SPECIFICATION);
1367
1368 value = vcpu->run->s.regs.gprs[0] & 0x000000000000ffff;
1369 vcpu->arch.sie_block->todpr = value;
1370
1371 return 0;
1372}
1373
9acc317b
DH		 1374static int handle_ptff(struct kvm_vcpu *vcpu)
1375{
a37cb07a
CB		 1376 vcpu->stat.instruction_ptff++;
1377
9acc317b
DH		 1378 /* we don't emulate any control instructions yet */
1379 kvm_s390_set_psw_cc(vcpu, 3);
1380 return 0;
1381}
1382
77975357 1383static const intercept_handler_t x01_handlers[256] = {
9acc317b 1384 [0x04] = handle_ptff,
8c3f61e2
CH		 1385 [0x07] = handle_sckpf,
1386};
1387
1388int kvm_s390_handle_01(struct kvm_vcpu *vcpu)
1389{
1390 intercept_handler_t handler;
1391
1392 handler = x01_handlers[vcpu->arch.sie_block->ipa & 0x00ff];
1393 if (handler)
1394 return handler(vcpu);
1395 return -EOPNOTSUPP;
1396}
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