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1da177e4 LT |
1 | # |
2 | # For a description of the syntax of this configuration file, | |
3 | # see Documentation/kbuild/kconfig-language.txt. | |
4 | # | |
5 | ||
6 | mainmenu "Linux/SuperH Kernel Configuration" | |
7 | ||
8 | config SUPERH | |
9 | bool | |
10 | default y | |
7a440c95 | 11 | select EMBEDDED |
1da177e4 LT |
12 | help |
13 | The SuperH is a RISC processor targeted for use in embedded systems | |
14 | and consumer electronics; it was also used in the Sega Dreamcast | |
15 | gaming console. The SuperH port has a home page at | |
16 | <http://www.linux-sh.org/>. | |
17 | ||
1da177e4 LT |
18 | config RWSEM_GENERIC_SPINLOCK |
19 | bool | |
20 | default y | |
21 | ||
22 | config RWSEM_XCHGADD_ALGORITHM | |
23 | bool | |
24 | ||
e2268c71 AM |
25 | config GENERIC_FIND_NEXT_BIT |
26 | bool | |
27 | default y | |
28 | ||
29 | config GENERIC_HWEIGHT | |
30 | bool | |
31 | default y | |
32 | ||
1da177e4 LT |
33 | config GENERIC_HARDIRQS |
34 | bool | |
35 | default y | |
36 | ||
37 | config GENERIC_IRQ_PROBE | |
38 | bool | |
39 | default y | |
40 | ||
41 | config GENERIC_CALIBRATE_DELAY | |
42 | bool | |
43 | default y | |
44 | ||
cad82448 PM |
45 | config GENERIC_IOMAP |
46 | bool | |
47 | ||
45882145 PM |
48 | config GENERIC_TIME |
49 | def_bool n | |
50 | ||
a08b6b79 AV |
51 | config ARCH_MAY_HAVE_PC_FDC |
52 | bool | |
a08b6b79 | 53 | |
afbfb52e PM |
54 | config STACKTRACE_SUPPORT |
55 | bool | |
56 | default y | |
57 | ||
58 | config LOCKDEP_SUPPORT | |
59 | bool | |
60 | default y | |
61 | ||
f0d1b0b3 DH |
62 | config ARCH_HAS_ILOG2_U32 |
63 | bool | |
64 | default n | |
65 | ||
66 | config ARCH_HAS_ILOG2_U64 | |
67 | bool | |
68 | default n | |
69 | ||
1da177e4 LT |
70 | source "init/Kconfig" |
71 | ||
72 | menu "System type" | |
73 | ||
bc8fb5d0 PM |
74 | config SOLUTION_ENGINE |
75 | bool | |
76 | ||
1da177e4 LT |
77 | choice |
78 | prompt "SuperH system type" | |
79 | default SH_UNKNOWN | |
80 | ||
81 | config SH_SOLUTION_ENGINE | |
82 | bool "SolutionEngine" | |
bc8fb5d0 | 83 | select SOLUTION_ENGINE |
1da177e4 LT |
84 | help |
85 | Select SolutionEngine if configuring for a Hitachi SH7709 | |
86 | or SH7750 evaluation board. | |
87 | ||
88 | config SH_7751_SOLUTION_ENGINE | |
89 | bool "SolutionEngine7751" | |
bc8fb5d0 | 90 | select SOLUTION_ENGINE |
cad82448 | 91 | select CPU_SUBTYPE_SH7751 |
1da177e4 LT |
92 | help |
93 | Select 7751 SolutionEngine if configuring for a Hitachi SH7751 | |
94 | evaluation board. | |
95 | ||
96 | config SH_7300_SOLUTION_ENGINE | |
97 | bool "SolutionEngine7300" | |
bc8fb5d0 | 98 | select SOLUTION_ENGINE |
cad82448 | 99 | select CPU_SUBTYPE_SH7300 |
1da177e4 | 100 | help |
bc8fb5d0 PM |
101 | Select 7300 SolutionEngine if configuring for a Hitachi |
102 | SH7300(SH-Mobile V) evaluation board. | |
103 | ||
104 | config SH_7343_SOLUTION_ENGINE | |
105 | bool "SolutionEngine7343" | |
106 | select SOLUTION_ENGINE | |
107 | select CPU_SUBTYPE_SH7343 | |
108 | help | |
109 | Select 7343 SolutionEngine if configuring for a Hitachi | |
110 | SH7343 (SH-Mobile 3AS) evaluation board. | |
1da177e4 LT |
111 | |
112 | config SH_73180_SOLUTION_ENGINE | |
113 | bool "SolutionEngine73180" | |
bc8fb5d0 PM |
114 | select SOLUTION_ENGINE |
115 | select CPU_SUBTYPE_SH73180 | |
116 | help | |
117 | Select 73180 SolutionEngine if configuring for a Hitachi | |
118 | SH73180(SH-Mobile 3) evaluation board. | |
1da177e4 LT |
119 | |
120 | config SH_7751_SYSTEMH | |
121 | bool "SystemH7751R" | |
cad82448 | 122 | select CPU_SUBTYPE_SH7751R |
1da177e4 LT |
123 | help |
124 | Select SystemH if you are configuring for a Renesas SystemH | |
125 | 7751R evaluation board. | |
126 | ||
cad82448 PM |
127 | config SH_HP6XX |
128 | bool "HP6XX" | |
1da177e4 | 129 | help |
cad82448 | 130 | Select HP6XX if configuring for a HP jornada HP6xx. |
1da177e4 LT |
131 | More information (hardware only) at |
132 | <http://www.hp.com/jornada/>. | |
133 | ||
1da177e4 LT |
134 | config SH_EC3104 |
135 | bool "EC3104" | |
136 | help | |
137 | Select EC3104 if configuring for a system with an Eclipse | |
138 | International EC3104 chip, e.g. the Harris AD2000. | |
139 | ||
140 | config SH_SATURN | |
141 | bool "Saturn" | |
cad82448 | 142 | select CPU_SUBTYPE_SH7604 |
1da177e4 LT |
143 | help |
144 | Select Saturn if configuring for a SEGA Saturn. | |
145 | ||
146 | config SH_DREAMCAST | |
147 | bool "Dreamcast" | |
cad82448 | 148 | select CPU_SUBTYPE_SH7091 |
1da177e4 LT |
149 | help |
150 | Select Dreamcast if configuring for a SEGA Dreamcast. | |
151 | More information at | |
152 | <http://www.m17n.org/linux-sh/dreamcast/>. There is a | |
153 | Dreamcast project is at <http://linuxdc.sourceforge.net/>. | |
154 | ||
1da177e4 LT |
155 | config SH_BIGSUR |
156 | bool "BigSur" | |
157 | ||
1da177e4 | 158 | config SH_MPC1211 |
cad82448 PM |
159 | bool "Interface MPC1211" |
160 | help | |
161 | CTP/PCI-SH02 is a CPU module computer that is produced | |
162 | by Interface Corporation. | |
163 | More information at <http://www.interface.co.jp> | |
1da177e4 LT |
164 | |
165 | config SH_SH03 | |
cad82448 | 166 | bool "Interface CTP/PCI-SH03" |
1da177e4 | 167 | help |
cad82448 | 168 | CTP/PCI-SH03 is a CPU module computer that is produced |
1da177e4 | 169 | by Interface Corporation. |
1da177e4 LT |
170 | More information at <http://www.interface.co.jp> |
171 | ||
172 | config SH_SECUREEDGE5410 | |
173 | bool "SecureEdge5410" | |
cad82448 | 174 | select CPU_SUBTYPE_SH7751R |
1da177e4 LT |
175 | help |
176 | Select SecureEdge5410 if configuring for a SnapGear SH board. | |
177 | This includes both the OEM SecureEdge products as well as the | |
178 | SME product line. | |
179 | ||
180 | config SH_HS7751RVOIP | |
181 | bool "HS7751RVOIP" | |
cad82448 | 182 | select CPU_SUBTYPE_SH7751R |
1da177e4 LT |
183 | help |
184 | Select HS7751RVOIP if configuring for a Renesas Technology | |
185 | Sales VoIP board. | |
186 | ||
91b91d01 PM |
187 | config SH_7710VOIPGW |
188 | bool "SH7710-VOIP-GW" | |
189 | select CPU_SUBTYPE_SH7710 | |
190 | help | |
191 | Select this option to build a kernel for the SH7710 based | |
192 | VOIP GW. | |
193 | ||
1da177e4 LT |
194 | config SH_RTS7751R2D |
195 | bool "RTS7751R2D" | |
cad82448 | 196 | select CPU_SUBTYPE_SH7751R |
1da177e4 LT |
197 | help |
198 | Select RTS7751R2D if configuring for a Renesas Technology | |
199 | Sales SH-Graphics board. | |
200 | ||
cad82448 PM |
201 | config SH_R7780RP |
202 | bool "R7780RP-1" | |
203 | select CPU_SUBTYPE_SH7780 | |
204 | help | |
205 | Select R7780RP-1 if configuring for a Renesas Solutions | |
206 | HIGHLANDER board. | |
207 | ||
1da177e4 LT |
208 | config SH_EDOSK7705 |
209 | bool "EDOSK7705" | |
cad82448 | 210 | select CPU_SUBTYPE_SH7705 |
1da177e4 LT |
211 | |
212 | config SH_SH4202_MICRODEV | |
213 | bool "SH4-202 MicroDev" | |
cad82448 | 214 | select CPU_SUBTYPE_SH4_202 |
1da177e4 LT |
215 | help |
216 | Select SH4-202 MicroDev if configuring for a SuperH MicroDev board | |
217 | with an SH4-202 CPU. | |
218 | ||
cad82448 PM |
219 | config SH_LANDISK |
220 | bool "LANDISK" | |
221 | select CPU_SUBTYPE_SH7751R | |
222 | help | |
223 | I-O DATA DEVICE, INC. "LANDISK Series" support. | |
224 | ||
225 | config SH_TITAN | |
226 | bool "TITAN" | |
227 | select CPU_SUBTYPE_SH7751R | |
228 | help | |
229 | Select Titan if you are configuring for a Nimble Microsystems | |
230 | NetEngine NP51R. | |
231 | ||
51e22e7a TY |
232 | config SH_SHMIN |
233 | bool "SHMIN" | |
234 | select CPU_SUBTYPE_SH7706 | |
235 | help | |
3cb2fccc | 236 | Select SHMIN if configuring for the SHMIN board. |
51e22e7a | 237 | |
9d4436a6 YS |
238 | config SH_7206_SOLUTION_ENGINE |
239 | bool "SolutionEngine7206" | |
240 | select CPU_SUBTYPE_SH7206 | |
241 | help | |
242 | Select 7206 SolutionEngine if configuring for a Hitachi SH7206 | |
243 | evaluation board. | |
244 | ||
245 | config SH_7619_SOLUTION_ENGINE | |
246 | bool "SolutionEngine7619" | |
247 | select CPU_SUBTYPE_SH7619 | |
248 | help | |
249 | Select 7619 SolutionEngine if configuring for a Hitachi SH7619 | |
250 | evaluation board. | |
251 | ||
1da177e4 LT |
252 | config SH_UNKNOWN |
253 | bool "BareCPU" | |
254 | help | |
255 | "Bare CPU" aka "unknown" means an SH-based system which is not one | |
256 | of the specific ones mentioned above, which means you need to enter | |
257 | all sorts of stuff like CONFIG_MEMORY_START because the config | |
258 | system doesn't already know what it is. You get a machine vector | |
259 | without any platform-specific code in it, so things like the RTC may | |
260 | not work. | |
261 | ||
262 | This option is for the early stages of porting to a new machine. | |
263 | ||
264 | endchoice | |
265 | ||
cad82448 | 266 | source "arch/sh/mm/Kconfig" |
1da177e4 | 267 | |
1da177e4 LT |
268 | config CF_ENABLER |
269 | bool "Compact Flash Enabler support" | |
5a4053b2 | 270 | depends on SH_SOLUTION_ENGINE || SH_UNKNOWN || SH_SH03 |
1da177e4 LT |
271 | ---help--- |
272 | Compact Flash is a small, removable mass storage device introduced | |
273 | in 1994 originally as a PCMCIA device. If you say `Y' here, you | |
274 | compile in support for Compact Flash devices directly connected to | |
275 | a SuperH processor. A Compact Flash FAQ is available at | |
276 | <http://www.compactflash.org/faqs/faq.htm>. | |
277 | ||
278 | If your board has "Directly Connected" CompactFlash at area 5 or 6, | |
279 | you may want to enable this option. Then, you can use CF as | |
280 | primary IDE drive (only tested for SanDisk). | |
281 | ||
282 | If in doubt, select 'N'. | |
283 | ||
284 | choice | |
285 | prompt "Compact Flash Connection Area" | |
286 | depends on CF_ENABLER | |
287 | default CF_AREA6 | |
288 | ||
289 | config CF_AREA5 | |
290 | bool "Area5" | |
291 | help | |
292 | If your board has "Directly Connected" CompactFlash, You should | |
293 | select the area where your CF is connected to. | |
294 | ||
295 | - "Area5" if CompactFlash is connected to Area 5 (0x14000000) | |
296 | - "Area6" if it is connected to Area 6 (0x18000000) | |
297 | ||
5a4053b2 | 298 | "Area6" will work for most boards. |
1da177e4 LT |
299 | |
300 | config CF_AREA6 | |
301 | bool "Area6" | |
302 | ||
303 | endchoice | |
304 | ||
305 | config CF_BASE_ADDR | |
306 | hex | |
307 | depends on CF_ENABLER | |
308 | default "0xb8000000" if CF_AREA6 | |
309 | default "0xb4000000" if CF_AREA5 | |
310 | ||
cad82448 PM |
311 | menu "Processor features" |
312 | ||
53644087 PM |
313 | choice |
314 | prompt "Endianess selection" | |
315 | default CPU_LITTLE_ENDIAN | |
cad82448 PM |
316 | help |
317 | Some SuperH machines can be configured for either little or big | |
53644087 PM |
318 | endian byte order. These modes require different kernels. |
319 | ||
320 | config CPU_LITTLE_ENDIAN | |
321 | bool "Little Endian" | |
322 | ||
323 | config CPU_BIG_ENDIAN | |
324 | bool "Big Endian" | |
325 | ||
326 | endchoice | |
cad82448 | 327 | |
1da177e4 LT |
328 | config SH_FPU |
329 | bool "FPU support" | |
330 | depends on !CPU_SH3 | |
331 | default y | |
332 | help | |
333 | Selecting this option will enable support for SH processors that | |
334 | have FPU units (ie, SH77xx). | |
335 | ||
336 | This option must be set in order to enable the FPU. | |
337 | ||
4b565680 TY |
338 | config SH_FPU_EMU |
339 | bool "FPU emulation support" | |
340 | depends on !SH_FPU && EXPERIMENTAL | |
341 | default n | |
342 | help | |
343 | Selecting this option will enable support for software FPU emulation. | |
344 | Most SH-3 users will want to say Y here, whereas most SH-4 users will | |
345 | want to say N. | |
346 | ||
1da177e4 LT |
347 | config SH_DSP |
348 | bool "DSP support" | |
e5723e0e PM |
349 | default y if SH4AL_DSP || !CPU_SH4 |
350 | default n | |
1da177e4 LT |
351 | help |
352 | Selecting this option will enable support for SH processors that | |
e5723e0e | 353 | have DSP units (ie, SH2-DSP, SH3-DSP, and SH4AL-DSP). |
1da177e4 LT |
354 | |
355 | This option must be set in order to enable the DSP. | |
356 | ||
357 | config SH_ADC | |
358 | bool "ADC support" | |
359 | depends on CPU_SH3 | |
360 | default y | |
361 | help | |
362 | Selecting this option will allow the Linux kernel to use SH3 on-chip | |
363 | ADC module. | |
364 | ||
365 | If unsure, say N. | |
366 | ||
cad82448 PM |
367 | config SH_STORE_QUEUES |
368 | bool "Support for Store Queues" | |
369 | depends on CPU_SH4 | |
370 | help | |
371 | Selecting this option will enable an in-kernel API for manipulating | |
372 | the store queues integrated in the SH-4 processors. | |
373 | ||
374 | config CPU_HAS_INTEVT | |
1da177e4 | 375 | bool |
1da177e4 | 376 | |
cad82448 PM |
377 | config CPU_HAS_PINT_IRQ |
378 | bool | |
1da177e4 | 379 | |
ba463937 PM |
380 | config CPU_HAS_MASKREG_IRQ |
381 | bool | |
382 | ||
cad82448 PM |
383 | config CPU_HAS_INTC2_IRQ |
384 | bool | |
3f22ab27 | 385 | |
ea0f8fea JL |
386 | config CPU_HAS_IPR_IRQ |
387 | bool | |
388 | ||
cad82448 PM |
389 | config CPU_HAS_SR_RB |
390 | bool "CPU has SR.RB" | |
391 | depends on CPU_SH3 || CPU_SH4 | |
392 | default y | |
1da177e4 | 393 | help |
cad82448 PM |
394 | This will enable the use of SR.RB register bank usage. Processors |
395 | that are lacking this bit must have another method in place for | |
396 | accomplishing what is taken care of by the banked registers. | |
1da177e4 | 397 | |
cad82448 PM |
398 | See <file:Documentation/sh/register-banks.txt> for further |
399 | information on SR.RB and register banking in the kernel in general. | |
1da177e4 | 400 | |
9b3a53ab SM |
401 | config CPU_HAS_PTEA |
402 | bool | |
403 | ||
cad82448 | 404 | endmenu |
1da177e4 | 405 | |
cad82448 | 406 | menu "Timer support" |
45882145 | 407 | depends on !GENERIC_TIME |
1da177e4 | 408 | |
cad82448 PM |
409 | config SH_TMU |
410 | bool "TMU timer support" | |
9d4436a6 | 411 | depends on CPU_SH3 || CPU_SH4 |
1da177e4 | 412 | default y |
1da177e4 | 413 | help |
cad82448 | 414 | This enables the use of the TMU as the system timer. |
1da177e4 | 415 | |
9d4436a6 YS |
416 | config SH_CMT |
417 | bool "CMT timer support" | |
418 | depends on CPU_SH2 | |
419 | default y | |
420 | help | |
421 | This enables the use of the CMT as the system timer. | |
422 | ||
423 | config SH_MTU2 | |
424 | bool "MTU2 timer support" | |
425 | depends on CPU_SH2A | |
426 | default n | |
427 | help | |
428 | This enables the use of the MTU2 as the system timer. | |
429 | ||
cad82448 | 430 | endmenu |
1da177e4 | 431 | |
e8fb67f8 | 432 | source "arch/sh/boards/renesas/hs7751rvoip/Kconfig" |
1da177e4 | 433 | |
36efc354 | 434 | source "arch/sh/boards/renesas/rts7751r2d/Kconfig" |
cad82448 | 435 | |
5283ecb5 PM |
436 | source "arch/sh/boards/renesas/r7780rp/Kconfig" |
437 | ||
417528a2 PM |
438 | config SH_TIMER_IRQ |
439 | int | |
440 | default "28" if CPU_SUBTYPE_SH7780 | |
441 | default "86" if CPU_SUBTYPE_SH7619 | |
442 | default "140" if CPU_SUBTYPE_SH7206 | |
443 | default "16" | |
444 | ||
bd156147 PM |
445 | config NO_IDLE_HZ |
446 | bool "Dynamic tick timer" | |
447 | help | |
448 | Select this option if you want to disable continuous timer ticks | |
449 | and have them programmed to occur as required. This option saves | |
450 | power as the system can remain in idle state for longer. | |
451 | ||
452 | By default dynamic tick is disabled during the boot, and can be | |
453 | manually enabled with: | |
454 | ||
455 | echo 1 > /sys/devices/system/timer/timer0/dyn_tick | |
456 | ||
457 | Alternatively, if you want dynamic tick automatically enabled | |
458 | during boot, pass "dyntick=enable" via the kernel command string. | |
459 | ||
460 | Please note that dynamic tick may affect the accuracy of | |
461 | timekeeping on some platforms depending on the implementation. | |
462 | ||
cad82448 PM |
463 | config SH_PCLK_FREQ |
464 | int "Peripheral clock frequency (in Hz)" | |
9d4436a6 YS |
465 | default "27000000" if CPU_SUBTYPE_SH73180 || CPU_SUBTYPE_SH7343 |
466 | default "31250000" if CPU_SUBTYPE_SH7619 | |
467 | default "33333333" if CPU_SUBTYPE_SH7300 || CPU_SUBTYPE_SH7770 || \ | |
468 | CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7705 || \ | |
469 | CPU_SUBTYPE_SH7206 | |
cad82448 PM |
470 | default "50000000" if CPU_SUBTYPE_SH7750 || CPU_SUBTYPE_SH7780 |
471 | default "60000000" if CPU_SUBTYPE_SH7751 | |
cad82448 | 472 | default "66000000" if CPU_SUBTYPE_SH4_202 |
1da177e4 | 473 | help |
cad82448 PM |
474 | This option is used to specify the peripheral clock frequency. |
475 | This is necessary for determining the reference clock value on | |
476 | platforms lacking an RTC. | |
1da177e4 | 477 | |
9d4436a6 YS |
478 | config SH_CLK_MD |
479 | int "CPU Mode Pin Setting" | |
480 | depends on CPU_SUBTYPE_SH7619 || CPU_SUBTYPE_SH7206 | |
481 | help | |
482 | MD2 - MD0 Setting. | |
483 | ||
cad82448 PM |
484 | menu "CPU Frequency scaling" |
485 | ||
486 | source "drivers/cpufreq/Kconfig" | |
1da177e4 | 487 | |
cad82448 PM |
488 | config SH_CPU_FREQ |
489 | tristate "SuperH CPU Frequency driver" | |
490 | depends on CPU_FREQ | |
491 | select CPU_FREQ_TABLE | |
1da177e4 | 492 | help |
cad82448 PM |
493 | This adds the cpufreq driver for SuperH. At present, only |
494 | the SH-4 is supported. | |
1da177e4 | 495 | |
cad82448 | 496 | For details, take a look at <file:Documentation/cpu-freq>. |
1da177e4 LT |
497 | |
498 | If unsure, say N. | |
499 | ||
cad82448 PM |
500 | endmenu |
501 | ||
502 | source "arch/sh/drivers/dma/Kconfig" | |
503 | ||
504 | source "arch/sh/cchips/Kconfig" | |
505 | ||
506 | config HEARTBEAT | |
507 | bool "Heartbeat LED" | |
5a4053b2 | 508 | depends on SH_MPC1211 || SH_SH03 || \ |
bc8fb5d0 | 509 | SH_BIGSUR || SOLUTION_ENGINE || \ |
cad82448 | 510 | SH_RTS7751R2D || SH_SH4202_MICRODEV || SH_LANDISK |
1da177e4 | 511 | help |
cad82448 PM |
512 | Use the power-on LED on your machine as a load meter. The exact |
513 | behavior is platform-dependent, but normally the flash frequency is | |
514 | a hyperbolic function of the 5-minute load average. | |
1da177e4 | 515 | |
9f5e8eee PM |
516 | source "arch/sh/drivers/Kconfig" |
517 | ||
cad82448 | 518 | endmenu |
1da177e4 | 519 | |
cad82448 PM |
520 | config ISA_DMA_API |
521 | bool | |
05efc67d | 522 | depends on SH_MPC1211 |
cad82448 | 523 | default y |
1da177e4 | 524 | |
cad82448 PM |
525 | menu "Kernel features" |
526 | ||
91b91d01 PM |
527 | source kernel/Kconfig.hz |
528 | ||
cad82448 PM |
529 | config KEXEC |
530 | bool "kexec system call (EXPERIMENTAL)" | |
531 | depends on EXPERIMENTAL | |
1da177e4 | 532 | help |
cad82448 PM |
533 | kexec is a system call that implements the ability to shutdown your |
534 | current kernel, and to start another kernel. It is like a reboot | |
1f1332f7 | 535 | but it is independent of the system firmware. And like a reboot |
cad82448 PM |
536 | you can start any kernel with it, not just Linux. |
537 | ||
1f1332f7 | 538 | The name comes from the similarity to the exec system call. |
cad82448 PM |
539 | |
540 | It is an ongoing process to be certain the hardware in a machine | |
541 | is properly shutdown, so do not be surprised if this code does not | |
542 | initially work for you. It may help to enable device hotplugging | |
543 | support. As of this writing the exact hardware interface is | |
544 | strongly in flux, so no good recommendation can be made. | |
545 | ||
1da177e4 LT |
546 | config SMP |
547 | bool "Symmetric multi-processing support" | |
548 | ---help--- | |
549 | This enables support for systems with more than one CPU. If you have | |
550 | a system with only one CPU, like most personal computers, say N. If | |
551 | you have a system with more than one CPU, say Y. | |
552 | ||
553 | If you say N here, the kernel will run on single and multiprocessor | |
554 | machines, but will use only one CPU of a multiprocessor machine. If | |
555 | you say Y here, the kernel will run on many, but not all, | |
556 | singleprocessor machines. On a singleprocessor machine, the kernel | |
557 | will run faster if you say N here. | |
558 | ||
559 | People using multiprocessor machines who say Y here should also say | |
560 | Y to "Enhanced Real Time Clock Support", below. | |
561 | ||
562 | See also the <file:Documentation/smp.txt>, | |
563 | <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available | |
564 | at <http://www.tldp.org/docs.html#howto>. | |
565 | ||
566 | If you don't know what to do here, say N. | |
567 | ||
568 | config NR_CPUS | |
569 | int "Maximum number of CPUs (2-32)" | |
570 | range 2 32 | |
571 | depends on SMP | |
572 | default "2" | |
573 | help | |
574 | This allows you to specify the maximum number of CPUs which this | |
575 | kernel will support. The maximum supported value is 32 and the | |
576 | minimum value which makes sense is 2. | |
577 | ||
578 | This is purely to save memory - each supported CPU adds | |
579 | approximately eight kilobytes to the kernel image. | |
580 | ||
91b91d01 PM |
581 | source "kernel/Kconfig.preempt" |
582 | ||
cad82448 PM |
583 | config CPU_HAS_SR_RB |
584 | bool "CPU has SR.RB" | |
585 | depends on CPU_SH3 || CPU_SH4 | |
1da177e4 LT |
586 | default y |
587 | help | |
cad82448 PM |
588 | This will enable the use of SR.RB register bank usage. Processors |
589 | that are lacking this bit must have another method in place for | |
590 | accomplishing what is taken care of by the banked registers. | |
1da177e4 | 591 | |
cad82448 PM |
592 | See <file:Documentation/sh/register-banks.txt> for further |
593 | information on SR.RB and register banking in the kernel in general. | |
1da177e4 | 594 | |
c80d79d7 YG |
595 | config NODES_SHIFT |
596 | int | |
597 | default "1" | |
598 | depends on NEED_MULTIPLE_NODES | |
599 | ||
cad82448 | 600 | endmenu |
1da177e4 | 601 | |
cad82448 | 602 | menu "Boot options" |
1da177e4 | 603 | |
cad82448 PM |
604 | config ZERO_PAGE_OFFSET |
605 | hex "Zero page offset" | |
606 | default "0x00004000" if SH_MPC1211 || SH_SH03 | |
607 | default "0x00001000" | |
1da177e4 | 608 | help |
cad82448 | 609 | This sets the default offset of zero page. |
1da177e4 | 610 | |
cad82448 PM |
611 | config BOOT_LINK_OFFSET |
612 | hex "Link address offset for booting" | |
613 | default "0x00800000" | |
614 | help | |
615 | This option allows you to set the link address offset of the zImage. | |
616 | This can be useful if you are on a board which has a small amount of | |
617 | memory. | |
1da177e4 | 618 | |
cad82448 PM |
619 | config UBC_WAKEUP |
620 | bool "Wakeup UBC on startup" | |
621 | help | |
622 | Selecting this option will wakeup the User Break Controller (UBC) on | |
623 | startup. Although the UBC is left in an awake state when the processor | |
624 | comes up, some boot loaders misbehave by putting the UBC to sleep in a | |
625 | power saving state, which causes issues with things like ptrace(). | |
1da177e4 | 626 | |
cad82448 | 627 | If unsure, say N. |
1da177e4 | 628 | |
cad82448 PM |
629 | config CMDLINE_BOOL |
630 | bool "Default bootloader kernel arguments" | |
1da177e4 | 631 | |
cad82448 PM |
632 | config CMDLINE |
633 | string "Initial kernel command string" | |
634 | depends on CMDLINE_BOOL | |
635 | default "console=ttySC1,115200" | |
1da177e4 LT |
636 | |
637 | endmenu | |
638 | ||
cad82448 | 639 | menu "Bus options" |
1da177e4 LT |
640 | |
641 | # Even on SuperH devices which don't have an ISA bus, | |
642 | # this variable helps the PCMCIA modules handle | |
643 | # IRQ requesting properly -- Greg Banks. | |
644 | # | |
645 | # Though we're generally not interested in it when | |
646 | # we're not using PCMCIA, so we make it dependent on | |
647 | # PCMCIA outright. -- PFM. | |
648 | config ISA | |
649 | bool | |
cad82448 | 650 | default y if PCMCIA |
1da177e4 LT |
651 | help |
652 | Find out whether you have ISA slots on your motherboard. ISA is the | |
653 | name of a bus system, i.e. the way the CPU talks to the other stuff | |
654 | inside your box. Other bus systems are PCI, EISA, MicroChannel | |
655 | (MCA) or VESA. ISA is an older system, now being displaced by PCI; | |
656 | newer boards don't support it. If you have ISA, say Y, otherwise N. | |
657 | ||
658 | config EISA | |
659 | bool | |
660 | ---help--- | |
661 | The Extended Industry Standard Architecture (EISA) bus was | |
662 | developed as an open alternative to the IBM MicroChannel bus. | |
663 | ||
664 | The EISA bus provided some of the features of the IBM MicroChannel | |
665 | bus while maintaining backward compatibility with cards made for | |
666 | the older ISA bus. The EISA bus saw limited use between 1988 and | |
667 | 1995 when it was made obsolete by the PCI bus. | |
668 | ||
669 | Say Y here if you are building a kernel for an EISA-based machine. | |
670 | ||
671 | Otherwise, say N. | |
672 | ||
673 | config MCA | |
674 | bool | |
675 | help | |
676 | MicroChannel Architecture is found in some IBM PS/2 machines and | |
677 | laptops. It is a bus system similar to PCI or ISA. See | |
678 | <file:Documentation/mca.txt> (and especially the web page given | |
679 | there) before attempting to build an MCA bus kernel. | |
680 | ||
681 | config SBUS | |
682 | bool | |
683 | ||
cad82448 PM |
684 | config SUPERHYWAY |
685 | tristate "SuperHyway Bus support" | |
686 | depends on CPU_SUBTYPE_SH4_202 | |
1da177e4 LT |
687 | |
688 | source "arch/sh/drivers/pci/Kconfig" | |
689 | ||
690 | source "drivers/pci/Kconfig" | |
691 | ||
692 | source "drivers/pcmcia/Kconfig" | |
693 | ||
694 | source "drivers/pci/hotplug/Kconfig" | |
695 | ||
696 | endmenu | |
697 | ||
698 | menu "Executable file formats" | |
699 | ||
700 | source "fs/Kconfig.binfmt" | |
701 | ||
702 | endmenu | |
703 | ||
3aa770e7 AS |
704 | menu "Power management options (EXPERIMENTAL)" |
705 | depends on EXPERIMENTAL | |
706 | ||
707 | source kernel/power/Kconfig | |
708 | ||
709 | config APM | |
710 | bool "Advanced Power Management Emulation" | |
711 | depends on PM | |
712 | endmenu | |
713 | ||
d5950b43 SR |
714 | source "net/Kconfig" |
715 | ||
1da177e4 LT |
716 | source "drivers/Kconfig" |
717 | ||
718 | source "fs/Kconfig" | |
719 | ||
720 | source "arch/sh/oprofile/Kconfig" | |
721 | ||
722 | source "arch/sh/Kconfig.debug" | |
723 | ||
724 | source "security/Kconfig" | |
725 | ||
726 | source "crypto/Kconfig" | |
727 | ||
728 | source "lib/Kconfig" |