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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
f5e706ad SR |
2 | #ifndef _SPARC64_FUTEX_H |
3 | #define _SPARC64_FUTEX_H | |
4 | ||
5 | #include <linux/futex.h> | |
6 | #include <linux/uaccess.h> | |
7 | #include <asm/errno.h> | |
f5e706ad SR |
8 | |
9 | #define __futex_cas_op(insn, ret, oldval, uaddr, oparg) \ | |
10 | __asm__ __volatile__( \ | |
11 | "\n1: lduwa [%3] %%asi, %2\n" \ | |
12 | " " insn "\n" \ | |
13 | "2: casa [%3] %%asi, %2, %1\n" \ | |
14 | " cmp %2, %1\n" \ | |
15 | " bne,pn %%icc, 1b\n" \ | |
16 | " mov 0, %0\n" \ | |
17 | "3:\n" \ | |
18 | " .section .fixup,#alloc,#execinstr\n" \ | |
19 | " .align 4\n" \ | |
20 | "4: sethi %%hi(3b), %0\n" \ | |
21 | " jmpl %0 + %%lo(3b), %%g0\n" \ | |
22 | " mov %5, %0\n" \ | |
23 | " .previous\n" \ | |
24 | " .section __ex_table,\"a\"\n" \ | |
25 | " .align 4\n" \ | |
26 | " .word 1b, 4b\n" \ | |
27 | " .word 2b, 4b\n" \ | |
28 | " .previous\n" \ | |
29 | : "=&r" (ret), "=&r" (oldval), "=&r" (tem) \ | |
30 | : "r" (uaddr), "r" (oparg), "i" (-EFAULT) \ | |
31 | : "memory") | |
32 | ||
30d6e0a4 JS |
33 | static inline int arch_futex_atomic_op_inuser(int op, int oparg, int *oval, |
34 | u32 __user *uaddr) | |
f5e706ad | 35 | { |
f5e706ad SR |
36 | int oldval = 0, ret, tem; |
37 | ||
f5e706ad SR |
38 | if (unlikely((((unsigned long) uaddr) & 0x3UL))) |
39 | return -EINVAL; | |
40 | ||
f5e706ad SR |
41 | pagefault_disable(); |
42 | ||
43 | switch (op) { | |
44 | case FUTEX_OP_SET: | |
45 | __futex_cas_op("mov\t%4, %1", ret, oldval, uaddr, oparg); | |
46 | break; | |
47 | case FUTEX_OP_ADD: | |
48 | __futex_cas_op("add\t%2, %4, %1", ret, oldval, uaddr, oparg); | |
49 | break; | |
50 | case FUTEX_OP_OR: | |
51 | __futex_cas_op("or\t%2, %4, %1", ret, oldval, uaddr, oparg); | |
52 | break; | |
53 | case FUTEX_OP_ANDN: | |
d72609e1 | 54 | __futex_cas_op("andn\t%2, %4, %1", ret, oldval, uaddr, oparg); |
f5e706ad SR |
55 | break; |
56 | case FUTEX_OP_XOR: | |
57 | __futex_cas_op("xor\t%2, %4, %1", ret, oldval, uaddr, oparg); | |
58 | break; | |
59 | default: | |
60 | ret = -ENOSYS; | |
61 | } | |
62 | ||
63 | pagefault_enable(); | |
64 | ||
30d6e0a4 JS |
65 | if (!ret) |
66 | *oval = oldval; | |
67 | ||
f5e706ad SR |
68 | return ret; |
69 | } | |
70 | ||
71 | static inline int | |
8d7718aa ML |
72 | futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, |
73 | u32 oldval, u32 newval) | |
f5e706ad | 74 | { |
37a9d912 ML |
75 | int ret = 0; |
76 | ||
f5e706ad | 77 | __asm__ __volatile__( |
37a9d912 | 78 | "\n1: casa [%4] %%asi, %3, %1\n" |
f5e706ad SR |
79 | "2:\n" |
80 | " .section .fixup,#alloc,#execinstr\n" | |
81 | " .align 4\n" | |
82 | "3: sethi %%hi(2b), %0\n" | |
83 | " jmpl %0 + %%lo(2b), %%g0\n" | |
37a9d912 | 84 | " mov %5, %0\n" |
f5e706ad SR |
85 | " .previous\n" |
86 | " .section __ex_table,\"a\"\n" | |
87 | " .align 4\n" | |
88 | " .word 1b, 3b\n" | |
89 | " .previous\n" | |
37a9d912 ML |
90 | : "+r" (ret), "=r" (newval) |
91 | : "1" (newval), "r" (oldval), "r" (uaddr), "i" (-EFAULT) | |
f5e706ad SR |
92 | : "memory"); |
93 | ||
37a9d912 ML |
94 | *uval = newval; |
95 | return ret; | |
f5e706ad SR |
96 | } |
97 | ||
98 | #endif /* !(_SPARC64_FUTEX_H) */ |