[mirror_ubuntu-bionic-kernel.git] / arch / sparc / include / asm / io-unit.h

/* SPDX-License-Identifier: GPL-2.0 */
/* io-unit.h: Definitions for the sun4d IO-UNIT.
 *
 * Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
 */
#ifndef _SPARC_IO_UNIT_H
#define _SPARC_IO_UNIT_H

#include <linux/spinlock.h>
#include <asm/page.h>
#include <asm/pgtable.h>

/* The io-unit handles all virtual to physical address translations
 * that occur between the SBUS and physical memory.  Access by
 * the cpu to IO registers and similar go over the xdbus so are
 * translated by the on chip SRMMU.  The io-unit and the srmmu do
 * not need to have the same translations at all, in fact most
 * of the time the translations they handle are a disjunct set.
 * Basically the io-unit handles all dvma sbus activity.
 */
 
/* AIEEE, unlike the nice sun4m, these monsters have 
   fixed DMA range 64M */
 
#define IOUNIT_DMA_BASE	    0xfc000000 /* TOP - 64M */
#define IOUNIT_DMA_SIZE	    0x04000000 /* 64M */
/* We use last 1M for sparc_dvma_malloc */
#define IOUNIT_DVMA_SIZE    0x00100000 /* 1M */

/* The format of an iopte in the external page tables */
#define IOUPTE_PAGE          0xffffff00 /* Physical page number (PA[35:12])	*/
#define IOUPTE_CACHE         0x00000080 /* Cached (in Viking/MXCC)		*/
/* XXX Jakub, find out how to program SBUS streaming cache on XDBUS/sun4d.
 * XXX Actually, all you should need to do is find out where the registers
 * XXX are and copy over the sparc64 implementation I wrote.  There may be
 * XXX some horrible hwbugs though, so be careful.  -DaveM
 */
#define IOUPTE_STREAM        0x00000040 /* Translation can use streaming cache	*/
#define IOUPTE_INTRA	     0x00000008 /* SBUS direct slot->slot transfer	*/
#define IOUPTE_WRITE         0x00000004 /* Writeable				*/
#define IOUPTE_VALID         0x00000002 /* IOPTE is valid			*/
#define IOUPTE_PARITY        0x00000001 /* Parity is checked during DVMA	*/

struct iounit_struct {
	unsigned long		bmap[(IOUNIT_DMA_SIZE >> (PAGE_SHIFT + 3)) / sizeof(unsigned long)];
	spinlock_t		lock;
	iopte_t __iomem		*page_table;
	unsigned long		rotor[3];
	unsigned long		limit[4];
};

#define IOUNIT_BMAP1_START	0x00000000
#define IOUNIT_BMAP1_END	(IOUNIT_DMA_SIZE >> (PAGE_SHIFT + 1))
#define IOUNIT_BMAP2_START	IOUNIT_BMAP1_END
#define IOUNIT_BMAP2_END	IOUNIT_BMAP2_START + (IOUNIT_DMA_SIZE >> (PAGE_SHIFT + 2))
#define IOUNIT_BMAPM_START	IOUNIT_BMAP2_END
#define IOUNIT_BMAPM_END	((IOUNIT_DMA_SIZE - IOUNIT_DVMA_SIZE) >> PAGE_SHIFT)

#endif /* !(_SPARC_IO_UNIT_H) */
Commit	Line	Data
b2441318	1	/* SPDX-License-Identifier: GPL-2.0 */
1da177e4 LT	2	/* io-unit.h: Definitions for the sun4d IO-UNIT.
	3	*
	4	* Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
	5	*/
	6	#ifndef _SPARC_IO_UNIT_H
	7	#define _SPARC_IO_UNIT_H
	8
	9	#include <linux/spinlock.h>
	10	#include <asm/page.h>
	11	#include <asm/pgtable.h>
	12
	13	/* The io-unit handles all virtual to physical address translations
	14	* that occur between the SBUS and physical memory. Access by
	15	* the cpu to IO registers and similar go over the xdbus so are
	16	* translated by the on chip SRMMU. The io-unit and the srmmu do
	17	* not need to have the same translations at all, in fact most
	18	* of the time the translations they handle are a disjunct set.
	19	* Basically the io-unit handles all dvma sbus activity.
	20	*/
	21
	22	/* AIEEE, unlike the nice sun4m, these monsters have
	23	fixed DMA range 64M */
	24
	25	#define IOUNIT_DMA_BASE 0xfc000000 /* TOP - 64M */
	26	#define IOUNIT_DMA_SIZE 0x04000000 /* 64M */
	27	/* We use last 1M for sparc_dvma_malloc */
	28	#define IOUNIT_DVMA_SIZE 0x00100000 /* 1M */
	29
	30	/* The format of an iopte in the external page tables */
	31	#define IOUPTE_PAGE 0xffffff00 /* Physical page number (PA[35:12]) */
	32	#define IOUPTE_CACHE 0x00000080 /* Cached (in Viking/MXCC) */
	33	/* XXX Jakub, find out how to program SBUS streaming cache on XDBUS/sun4d.
	34	* XXX Actually, all you should need to do is find out where the registers
	35	* XXX are and copy over the sparc64 implementation I wrote. There may be
	36	* XXX some horrible hwbugs though, so be careful. -DaveM
	37	*/
	38	#define IOUPTE_STREAM 0x00000040 /* Translation can use streaming cache */
	39	#define IOUPTE_INTRA 0x00000008 /* SBUS direct slot->slot transfer */
	40	#define IOUPTE_WRITE 0x00000004 /* Writeable */
	41	#define IOUPTE_VALID 0x00000002 /* IOPTE is valid */
	42	#define IOUPTE_PARITY 0x00000001 /* Parity is checked during DVMA */
	43
	44	struct iounit_struct {
	45	unsigned long bmap[(IOUNIT_DMA_SIZE >> (PAGE_SHIFT + 3)) / sizeof(unsigned long)];
	46	spinlock_t lock;
1918660b	47	iopte_t __iomem *page_table;
1da177e4 LT	48	unsigned long rotor[3];
	49	unsigned long limit[4];
	50	};
	51
	52	#define IOUNIT_BMAP1_START 0x00000000
	53	#define IOUNIT_BMAP1_END (IOUNIT_DMA_SIZE >> (PAGE_SHIFT + 1))
	54	#define IOUNIT_BMAP2_START IOUNIT_BMAP1_END
	55	#define IOUNIT_BMAP2_END IOUNIT_BMAP2_START + (IOUNIT_DMA_SIZE >> (PAGE_SHIFT + 2))
	56	#define IOUNIT_BMAPM_START IOUNIT_BMAP2_END
	57	#define IOUNIT_BMAPM_END ((IOUNIT_DMA_SIZE - IOUNIT_DVMA_SIZE) >> PAGE_SHIFT)
	58
1da177e4	59	#endif /* !(_SPARC_IO_UNIT_H) */