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5213a780 KE |
1 | /* |
2 | * Copyright (C) 2009 Daniel Hellstrom (daniel@gaisler.com) Aeroflex Gaisler AB | |
3 | * Copyright (C) 2009 Konrad Eisele (konrad@gaisler.com) Aeroflex Gaisler AB | |
4 | */ | |
5 | ||
6 | #include <linux/kernel.h> | |
5213a780 KE |
7 | #include <linux/errno.h> |
8 | #include <linux/mutex.h> | |
5213a780 KE |
9 | #include <linux/of.h> |
10 | #include <linux/of_platform.h> | |
11 | #include <linux/interrupt.h> | |
12 | #include <linux/of_device.h> | |
62f08283 TK |
13 | #include <linux/clocksource.h> |
14 | #include <linux/clockchips.h> | |
8401707f | 15 | |
5213a780 KE |
16 | #include <asm/oplib.h> |
17 | #include <asm/timer.h> | |
18 | #include <asm/prom.h> | |
19 | #include <asm/leon.h> | |
20 | #include <asm/leon_amba.h> | |
8401707f KE |
21 | #include <asm/traps.h> |
22 | #include <asm/cacheflush.h> | |
4c6773c3 | 23 | #include <asm/smp.h> |
01dae0f0 | 24 | #include <asm/setup.h> |
5213a780 | 25 | |
93bb32f6 | 26 | #include "kernel.h" |
5213a780 KE |
27 | #include "prom.h" |
28 | #include "irq.h" | |
29 | ||
53aea7ca DH |
30 | struct leon3_irqctrl_regs_map *leon3_irqctrl_regs; /* interrupt controller base address */ |
31 | struct leon3_gptimer_regs_map *leon3_gptimer_regs; /* timer controller base address */ | |
5213a780 KE |
32 | |
33 | int leondebug_irq_disable; | |
34 | int leon_debug_irqout; | |
fcea8b27 | 35 | static volatile u32 dummy_master_l10_counter; |
7279b82c | 36 | unsigned long amba_system_id; |
d61a38b2 | 37 | static DEFINE_SPINLOCK(leon_irq_lock); |
5213a780 | 38 | |
4007b65a | 39 | static unsigned long leon3_gptimer_idx; /* Timer Index (0..6) within Timer Core */ |
384859d2 | 40 | static unsigned long leon3_gptimer_ackmask; /* For clearing pending bit */ |
53aea7ca | 41 | unsigned long leon3_gptimer_irq; /* interrupt controller irq number */ |
5213a780 | 42 | unsigned int sparc_leon_eirq; |
a481b5d0 | 43 | #define LEON_IMASK(cpu) (&leon3_irqctrl_regs->mask[cpu]) |
4c6773c3 DH |
44 | #define LEON_IACK (&leon3_irqctrl_regs->iclear) |
45 | #define LEON_DO_ACK_HW 1 | |
5213a780 | 46 | |
4c6773c3 DH |
47 | /* Return the last ACKed IRQ by the Extended IRQ controller. It has already |
48 | * been (automatically) ACKed when the CPU takes the trap. | |
49 | */ | |
50 | static inline unsigned int leon_eirq_get(int cpu) | |
5213a780 KE |
51 | { |
52 | return LEON3_BYPASS_LOAD_PA(&leon3_irqctrl_regs->intid[cpu]) & 0x1f; | |
53 | } | |
54 | ||
4c6773c3 | 55 | /* Handle one or multiple IRQs from the extended interrupt controller */ |
bd0b9ac4 | 56 | static void leon_handle_ext_irq(struct irq_desc *desc) |
5213a780 | 57 | { |
4c6773c3 | 58 | unsigned int eirq; |
20424d85 | 59 | struct irq_bucket *p; |
01dae0f0 | 60 | int cpu = sparc_leon3_cpuid(); |
4c6773c3 DH |
61 | |
62 | eirq = leon_eirq_get(cpu); | |
20424d85 AL |
63 | p = irq_map[eirq]; |
64 | if ((eirq & 0x10) && p && p->irq) /* bit4 tells if IRQ happened */ | |
65 | generic_handle_irq(p->irq); | |
5213a780 KE |
66 | } |
67 | ||
68 | /* The extended IRQ controller has been found, this function registers it */ | |
4007b65a | 69 | static void leon_eirq_setup(unsigned int eirq) |
5213a780 | 70 | { |
4c6773c3 DH |
71 | unsigned long mask, oldmask; |
72 | unsigned int veirq; | |
5213a780 | 73 | |
4c6773c3 DH |
74 | if (eirq < 1 || eirq > 0xf) { |
75 | printk(KERN_ERR "LEON EXT IRQ NUMBER BAD: %d\n", eirq); | |
76 | return; | |
5213a780 KE |
77 | } |
78 | ||
4c6773c3 DH |
79 | veirq = leon_build_device_irq(eirq, leon_handle_ext_irq, "extirq", 0); |
80 | ||
81 | /* | |
82 | * Unmask the Extended IRQ, the IRQs routed through the Ext-IRQ | |
83 | * controller have a mask-bit of their own, so this is safe. | |
84 | */ | |
85 | irq_link(veirq); | |
86 | mask = 1 << eirq; | |
01dae0f0 DH |
87 | oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(boot_cpu_id)); |
88 | LEON3_BYPASS_STORE_PA(LEON_IMASK(boot_cpu_id), (oldmask | mask)); | |
4c6773c3 | 89 | sparc_leon_eirq = eirq; |
5213a780 KE |
90 | } |
91 | ||
4ba22b16 | 92 | unsigned long leon_get_irqmask(unsigned int irq) |
5213a780 KE |
93 | { |
94 | unsigned long mask; | |
95 | ||
96 | if (!irq || ((irq > 0xf) && !sparc_leon_eirq) | |
97 | || ((irq > 0x1f) && sparc_leon_eirq)) { | |
98 | printk(KERN_ERR | |
99 | "leon_get_irqmask: false irq number: %d\n", irq); | |
100 | mask = 0; | |
101 | } else { | |
102 | mask = LEON_HARD_INT(irq); | |
103 | } | |
104 | return mask; | |
105 | } | |
106 | ||
5eb1f4fc DH |
107 | #ifdef CONFIG_SMP |
108 | static int irq_choose_cpu(const struct cpumask *affinity) | |
109 | { | |
110 | cpumask_t mask; | |
111 | ||
0b5f9c00 RR |
112 | cpumask_and(&mask, cpu_online_mask, affinity); |
113 | if (cpumask_equal(&mask, cpu_online_mask) || cpumask_empty(&mask)) | |
01dae0f0 | 114 | return boot_cpu_id; |
5eb1f4fc | 115 | else |
0b5f9c00 | 116 | return cpumask_first(&mask); |
5eb1f4fc DH |
117 | } |
118 | #else | |
01dae0f0 | 119 | #define irq_choose_cpu(affinity) boot_cpu_id |
5eb1f4fc DH |
120 | #endif |
121 | ||
122 | static int leon_set_affinity(struct irq_data *data, const struct cpumask *dest, | |
123 | bool force) | |
124 | { | |
125 | unsigned long mask, oldmask, flags; | |
126 | int oldcpu, newcpu; | |
127 | ||
128 | mask = (unsigned long)data->chip_data; | |
d7185a98 | 129 | oldcpu = irq_choose_cpu(irq_data_get_affinity_mask(data)); |
5eb1f4fc DH |
130 | newcpu = irq_choose_cpu(dest); |
131 | ||
132 | if (oldcpu == newcpu) | |
133 | goto out; | |
134 | ||
135 | /* unmask on old CPU first before enabling on the selected CPU */ | |
136 | spin_lock_irqsave(&leon_irq_lock, flags); | |
137 | oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(oldcpu)); | |
138 | LEON3_BYPASS_STORE_PA(LEON_IMASK(oldcpu), (oldmask & ~mask)); | |
139 | oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(newcpu)); | |
140 | LEON3_BYPASS_STORE_PA(LEON_IMASK(newcpu), (oldmask | mask)); | |
141 | spin_unlock_irqrestore(&leon_irq_lock, flags); | |
142 | out: | |
143 | return IRQ_SET_MASK_OK; | |
144 | } | |
145 | ||
6baa9b20 | 146 | static void leon_unmask_irq(struct irq_data *data) |
5213a780 | 147 | { |
a481b5d0 | 148 | unsigned long mask, oldmask, flags; |
5eb1f4fc | 149 | int cpu; |
6baa9b20 SR |
150 | |
151 | mask = (unsigned long)data->chip_data; | |
d7185a98 | 152 | cpu = irq_choose_cpu(irq_data_get_affinity_mask(data)); |
d61a38b2 | 153 | spin_lock_irqsave(&leon_irq_lock, flags); |
5eb1f4fc DH |
154 | oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(cpu)); |
155 | LEON3_BYPASS_STORE_PA(LEON_IMASK(cpu), (oldmask | mask)); | |
d61a38b2 | 156 | spin_unlock_irqrestore(&leon_irq_lock, flags); |
5213a780 KE |
157 | } |
158 | ||
6baa9b20 | 159 | static void leon_mask_irq(struct irq_data *data) |
5213a780 | 160 | { |
a481b5d0 | 161 | unsigned long mask, oldmask, flags; |
5eb1f4fc | 162 | int cpu; |
6baa9b20 SR |
163 | |
164 | mask = (unsigned long)data->chip_data; | |
d7185a98 | 165 | cpu = irq_choose_cpu(irq_data_get_affinity_mask(data)); |
d61a38b2 | 166 | spin_lock_irqsave(&leon_irq_lock, flags); |
5eb1f4fc DH |
167 | oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(cpu)); |
168 | LEON3_BYPASS_STORE_PA(LEON_IMASK(cpu), (oldmask & ~mask)); | |
d61a38b2 | 169 | spin_unlock_irqrestore(&leon_irq_lock, flags); |
5213a780 KE |
170 | } |
171 | ||
6baa9b20 SR |
172 | static unsigned int leon_startup_irq(struct irq_data *data) |
173 | { | |
174 | irq_link(data->irq); | |
175 | leon_unmask_irq(data); | |
176 | return 0; | |
177 | } | |
178 | ||
179 | static void leon_shutdown_irq(struct irq_data *data) | |
180 | { | |
181 | leon_mask_irq(data); | |
182 | irq_unlink(data->irq); | |
183 | } | |
184 | ||
4c6773c3 DH |
185 | /* Used by external level sensitive IRQ handlers on the LEON: ACK IRQ ctrl */ |
186 | static void leon_eoi_irq(struct irq_data *data) | |
187 | { | |
188 | unsigned long mask = (unsigned long)data->chip_data; | |
189 | ||
190 | if (mask & LEON_DO_ACK_HW) | |
191 | LEON3_BYPASS_STORE_PA(LEON_IACK, mask & ~LEON_DO_ACK_HW); | |
192 | } | |
193 | ||
6baa9b20 | 194 | static struct irq_chip leon_irq = { |
5eb1f4fc DH |
195 | .name = "leon", |
196 | .irq_startup = leon_startup_irq, | |
197 | .irq_shutdown = leon_shutdown_irq, | |
198 | .irq_mask = leon_mask_irq, | |
199 | .irq_unmask = leon_unmask_irq, | |
200 | .irq_eoi = leon_eoi_irq, | |
201 | .irq_set_affinity = leon_set_affinity, | |
6baa9b20 SR |
202 | }; |
203 | ||
4c6773c3 DH |
204 | /* |
205 | * Build a LEON IRQ for the edge triggered LEON IRQ controller: | |
08f80073 | 206 | * Edge (normal) IRQ - handle_simple_irq, ack=DON'T-CARE, never ack |
4c6773c3 DH |
207 | * Level IRQ (PCI|Level-GPIO) - handle_fasteoi_irq, ack=1, ack after ISR |
208 | * Per-CPU Edge - handle_percpu_irq, ack=0 | |
209 | */ | |
210 | unsigned int leon_build_device_irq(unsigned int real_irq, | |
211 | irq_flow_handler_t flow_handler, | |
212 | const char *name, int do_ack) | |
6baa9b20 SR |
213 | { |
214 | unsigned int irq; | |
215 | unsigned long mask; | |
6e4741e7 | 216 | struct irq_desc *desc; |
6baa9b20 SR |
217 | |
218 | irq = 0; | |
4ba22b16 | 219 | mask = leon_get_irqmask(real_irq); |
6baa9b20 SR |
220 | if (mask == 0) |
221 | goto out; | |
222 | ||
223 | irq = irq_alloc(real_irq, real_irq); | |
224 | if (irq == 0) | |
225 | goto out; | |
226 | ||
4c6773c3 DH |
227 | if (do_ack) |
228 | mask |= LEON_DO_ACK_HW; | |
229 | ||
6e4741e7 AL |
230 | desc = irq_to_desc(irq); |
231 | if (!desc || !desc->handle_irq || desc->handle_irq == handle_bad_irq) { | |
232 | irq_set_chip_and_handler_name(irq, &leon_irq, | |
233 | flow_handler, name); | |
234 | irq_set_chip_data(irq, (void *)mask); | |
235 | } | |
6baa9b20 SR |
236 | |
237 | out: | |
238 | return irq; | |
239 | } | |
240 | ||
4c6773c3 DH |
241 | static unsigned int _leon_build_device_irq(struct platform_device *op, |
242 | unsigned int real_irq) | |
243 | { | |
244 | return leon_build_device_irq(real_irq, handle_simple_irq, "edge", 0); | |
245 | } | |
246 | ||
5d07b786 DH |
247 | void leon_update_virq_handling(unsigned int virq, |
248 | irq_flow_handler_t flow_handler, | |
249 | const char *name, int do_ack) | |
250 | { | |
251 | unsigned long mask = (unsigned long)irq_get_chip_data(virq); | |
252 | ||
253 | mask &= ~LEON_DO_ACK_HW; | |
254 | if (do_ack) | |
255 | mask |= LEON_DO_ACK_HW; | |
256 | ||
257 | irq_set_chip_and_handler_name(virq, &leon_irq, | |
258 | flow_handler, name); | |
259 | irq_set_chip_data(virq, (void *)mask); | |
260 | } | |
261 | ||
62f08283 TK |
262 | static u32 leon_cycles_offset(void) |
263 | { | |
384859d2 AL |
264 | u32 rld, val, ctrl, off; |
265 | ||
62f08283 TK |
266 | rld = LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].rld); |
267 | val = LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].val); | |
384859d2 AL |
268 | ctrl = LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl); |
269 | if (LEON3_GPTIMER_CTRL_ISPENDING(ctrl)) { | |
270 | val = LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].val); | |
271 | off = 2 * rld - val; | |
272 | } else { | |
273 | off = rld - val; | |
274 | } | |
275 | ||
276 | return off; | |
62f08283 TK |
277 | } |
278 | ||
279 | #ifdef CONFIG_SMP | |
280 | ||
281 | /* smp clockevent irq */ | |
4007b65a | 282 | static irqreturn_t leon_percpu_timer_ce_interrupt(int irq, void *unused) |
62f08283 TK |
283 | { |
284 | struct clock_event_device *ce; | |
285 | int cpu = smp_processor_id(); | |
286 | ||
287 | leon_clear_profile_irq(cpu); | |
288 | ||
1ffbc51a AL |
289 | if (cpu == boot_cpu_id) |
290 | timer_interrupt(irq, NULL); | |
291 | ||
62f08283 TK |
292 | ce = &per_cpu(sparc32_clockevent, cpu); |
293 | ||
294 | irq_enter(); | |
295 | if (ce->event_handler) | |
296 | ce->event_handler(ce); | |
297 | irq_exit(); | |
298 | ||
299 | return IRQ_HANDLED; | |
300 | } | |
301 | ||
302 | #endif /* CONFIG_SMP */ | |
303 | ||
304 | void __init leon_init_timers(void) | |
5213a780 | 305 | { |
4c6773c3 | 306 | int irq, eirq; |
2791c1a4 | 307 | struct device_node *rootnp, *np, *nnp; |
53aea7ca DH |
308 | struct property *pp; |
309 | int len; | |
01dae0f0 | 310 | int icsel; |
2791c1a4 | 311 | int ampopts; |
6baa9b20 | 312 | int err; |
1ffbc51a | 313 | u32 config; |
384859d2 | 314 | u32 ctrl; |
5213a780 | 315 | |
62f08283 TK |
316 | sparc_config.get_cycles_offset = leon_cycles_offset; |
317 | sparc_config.cs_period = 1000000 / HZ; | |
318 | sparc_config.features |= FEAT_L10_CLOCKSOURCE; | |
319 | ||
320 | #ifndef CONFIG_SMP | |
321 | sparc_config.features |= FEAT_L10_CLOCKEVENT; | |
322 | #endif | |
323 | ||
5213a780 KE |
324 | leondebug_irq_disable = 0; |
325 | leon_debug_irqout = 0; | |
fcea8b27 | 326 | master_l10_counter = (u32 __iomem *)&dummy_master_l10_counter; |
5213a780 KE |
327 | dummy_master_l10_counter = 0; |
328 | ||
53aea7ca DH |
329 | rootnp = of_find_node_by_path("/ambapp0"); |
330 | if (!rootnp) | |
331 | goto bad; | |
7279b82c DH |
332 | |
333 | /* Find System ID: GRLIB build ID and optional CHIP ID */ | |
334 | pp = of_find_property(rootnp, "systemid", &len); | |
335 | if (pp) | |
336 | amba_system_id = *(unsigned long *)pp->value; | |
337 | ||
338 | /* Find IRQMP IRQ Controller Registers base adr otherwise bail out */ | |
53aea7ca | 339 | np = of_find_node_by_name(rootnp, "GAISLER_IRQMP"); |
9742e72c DH |
340 | if (!np) { |
341 | np = of_find_node_by_name(rootnp, "01_00d"); | |
342 | if (!np) | |
343 | goto bad; | |
344 | } | |
53aea7ca DH |
345 | pp = of_find_property(np, "reg", &len); |
346 | if (!pp) | |
347 | goto bad; | |
348 | leon3_irqctrl_regs = *(struct leon3_irqctrl_regs_map **)pp->value; | |
349 | ||
350 | /* Find GPTIMER Timer Registers base address otherwise bail out. */ | |
2791c1a4 | 351 | nnp = rootnp; |
2791c1a4 | 352 | |
601e6e3c DC |
353 | retry: |
354 | np = of_find_node_by_name(nnp, "GAISLER_GPTIMER"); | |
355 | if (!np) { | |
356 | np = of_find_node_by_name(nnp, "01_011"); | |
357 | if (!np) | |
358 | goto bad; | |
359 | } | |
360 | ||
361 | ampopts = 0; | |
362 | pp = of_find_property(np, "ampopts", &len); | |
363 | if (pp) { | |
364 | ampopts = *(int *)pp->value; | |
365 | if (ampopts == 0) { | |
366 | /* Skip this instance, resource already | |
367 | * allocated by other OS */ | |
368 | nnp = np; | |
369 | goto retry; | |
2791c1a4 | 370 | } |
601e6e3c DC |
371 | } |
372 | ||
373 | /* Select Timer-Instance on Timer Core. Default is zero */ | |
374 | leon3_gptimer_idx = ampopts & 0x7; | |
2791c1a4 | 375 | |
601e6e3c DC |
376 | pp = of_find_property(np, "reg", &len); |
377 | if (pp) | |
378 | leon3_gptimer_regs = *(struct leon3_gptimer_regs_map **) | |
379 | pp->value; | |
380 | pp = of_find_property(np, "interrupts", &len); | |
381 | if (pp) | |
382 | leon3_gptimer_irq = *(unsigned int *)pp->value; | |
53aea7ca | 383 | |
a481b5d0 DH |
384 | if (!(leon3_gptimer_regs && leon3_irqctrl_regs && leon3_gptimer_irq)) |
385 | goto bad; | |
386 | ||
384859d2 AL |
387 | ctrl = LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl); |
388 | LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl, | |
389 | ctrl | LEON3_GPTIMER_CTRL_PENDING); | |
390 | ctrl = LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl); | |
391 | ||
392 | if ((ctrl & LEON3_GPTIMER_CTRL_PENDING) != 0) | |
393 | leon3_gptimer_ackmask = ~LEON3_GPTIMER_CTRL_PENDING; | |
394 | else | |
395 | leon3_gptimer_ackmask = ~0; | |
396 | ||
a481b5d0 DH |
397 | LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].val, 0); |
398 | LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].rld, | |
399 | (((1000000 / HZ) - 1))); | |
400 | LEON3_BYPASS_STORE_PA( | |
2791c1a4 | 401 | &leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl, 0); |
5213a780 | 402 | |
a481b5d0 DH |
403 | /* |
404 | * The IRQ controller may (if implemented) consist of multiple | |
405 | * IRQ controllers, each mapped on a 4Kb boundary. | |
406 | * Each CPU may be routed to different IRQCTRLs, however | |
407 | * we assume that all CPUs (in SMP system) is routed to the | |
408 | * same IRQ Controller, and for non-SMP only one IRQCTRL is | |
409 | * accessed anyway. | |
410 | * In AMP systems, Linux must run on CPU0 for the time being. | |
411 | */ | |
01dae0f0 DH |
412 | icsel = LEON3_BYPASS_LOAD_PA(&leon3_irqctrl_regs->icsel[boot_cpu_id/8]); |
413 | icsel = (icsel >> ((7 - (boot_cpu_id&0x7)) * 4)) & 0xf; | |
a481b5d0 DH |
414 | leon3_irqctrl_regs += icsel; |
415 | ||
970def65 DH |
416 | /* Mask all IRQs on boot-cpu IRQ controller */ |
417 | LEON3_BYPASS_STORE_PA(&leon3_irqctrl_regs->mask[boot_cpu_id], 0); | |
418 | ||
a481b5d0 DH |
419 | /* Probe extended IRQ controller */ |
420 | eirq = (LEON3_BYPASS_LOAD_PA(&leon3_irqctrl_regs->mpstatus) | |
421 | >> 16) & 0xf; | |
422 | if (eirq != 0) | |
423 | leon_eirq_setup(eirq); | |
424 | ||
10f0d07c DH |
425 | #ifdef CONFIG_SMP |
426 | { | |
427 | unsigned long flags; | |
428 | ||
429 | /* | |
430 | * In SMP, sun4m adds a IPI handler to IRQ trap handler that | |
431 | * LEON never must take, sun4d and LEON overwrites the branch | |
432 | * with a NOP. | |
433 | */ | |
434 | local_irq_save(flags); | |
435 | patchme_maybe_smp_msg[0] = 0x01000000; /* NOP out the branch */ | |
5d83d666 | 436 | local_ops->cache_all(); |
10f0d07c DH |
437 | local_irq_restore(flags); |
438 | } | |
439 | #endif | |
440 | ||
1ffbc51a AL |
441 | config = LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->config); |
442 | if (config & (1 << LEON3_GPTIMER_SEPIRQ)) | |
443 | leon3_gptimer_irq += leon3_gptimer_idx; | |
444 | else if ((config & LEON3_GPTIMER_TIMERS) > 1) | |
445 | pr_warn("GPTIMER uses shared irqs, using other timers of the same core will fail.\n"); | |
8401707f KE |
446 | |
447 | #ifdef CONFIG_SMP | |
a481b5d0 | 448 | /* Install per-cpu IRQ handler for broadcasted ticker */ |
1ffbc51a | 449 | irq = leon_build_device_irq(leon3_gptimer_irq, handle_percpu_irq, |
a481b5d0 | 450 | "per-cpu", 0); |
62f08283 | 451 | err = request_irq(irq, leon_percpu_timer_ce_interrupt, |
1ffbc51a AL |
452 | IRQF_PERCPU | IRQF_TIMER, "timer", NULL); |
453 | #else | |
454 | irq = _leon_build_device_irq(NULL, leon3_gptimer_irq); | |
455 | err = request_irq(irq, timer_interrupt, IRQF_TIMER, "timer", NULL); | |
456 | #endif | |
a481b5d0 | 457 | if (err) { |
1ffbc51a | 458 | pr_err("Unable to attach timer IRQ%d\n", irq); |
a481b5d0 DH |
459 | prom_halt(); |
460 | } | |
1ffbc51a | 461 | LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl, |
a481b5d0 DH |
462 | LEON3_GPTIMER_EN | |
463 | LEON3_GPTIMER_RL | | |
464 | LEON3_GPTIMER_LD | | |
465 | LEON3_GPTIMER_IRQEN); | |
53aea7ca DH |
466 | return; |
467 | bad: | |
468 | printk(KERN_ERR "No Timer/irqctrl found\n"); | |
469 | BUG(); | |
470 | return; | |
5213a780 KE |
471 | } |
472 | ||
08c9388f | 473 | static void leon_clear_clock_irq(void) |
5213a780 | 474 | { |
384859d2 AL |
475 | u32 ctrl; |
476 | ||
477 | ctrl = LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl); | |
478 | LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl, | |
479 | ctrl & leon3_gptimer_ackmask); | |
5213a780 KE |
480 | } |
481 | ||
08c9388f | 482 | static void leon_load_profile_irq(int cpu, unsigned int limit) |
5213a780 | 483 | { |
5213a780 KE |
484 | } |
485 | ||
5213a780 KE |
486 | void __init leon_trans_init(struct device_node *dp) |
487 | { | |
488 | if (strcmp(dp->type, "cpu") == 0 && strcmp(dp->name, "<NULL>") == 0) { | |
489 | struct property *p; | |
490 | p = of_find_property(dp, "mid", (void *)0); | |
491 | if (p) { | |
492 | int mid; | |
493 | dp->name = prom_early_alloc(5 + 1); | |
494 | memcpy(&mid, p->value, p->length); | |
495 | sprintf((char *)dp->name, "cpu%.2d", mid); | |
496 | } | |
497 | } | |
498 | } | |
499 | ||
8401707f | 500 | #ifdef CONFIG_SMP |
8401707f KE |
501 | void leon_clear_profile_irq(int cpu) |
502 | { | |
503 | } | |
504 | ||
505 | void leon_enable_irq_cpu(unsigned int irq_nr, unsigned int cpu) | |
506 | { | |
507 | unsigned long mask, flags, *addr; | |
4ba22b16 | 508 | mask = leon_get_irqmask(irq_nr); |
d61a38b2 | 509 | spin_lock_irqsave(&leon_irq_lock, flags); |
a481b5d0 DH |
510 | addr = (unsigned long *)LEON_IMASK(cpu); |
511 | LEON3_BYPASS_STORE_PA(addr, (LEON3_BYPASS_LOAD_PA(addr) | mask)); | |
d61a38b2 | 512 | spin_unlock_irqrestore(&leon_irq_lock, flags); |
8401707f KE |
513 | } |
514 | ||
515 | #endif | |
516 | ||
5213a780 KE |
517 | void __init leon_init_IRQ(void) |
518 | { | |
472bc4f2 SR |
519 | sparc_config.init_timers = leon_init_timers; |
520 | sparc_config.build_device_irq = _leon_build_device_irq; | |
08c9388f SR |
521 | sparc_config.clock_rate = 1000000; |
522 | sparc_config.clear_clock_irq = leon_clear_clock_irq; | |
523 | sparc_config.load_profile_irq = leon_load_profile_irq; | |
5213a780 | 524 | } |