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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
a2bd4fd1 DM |
2 | #include <linux/string.h> |
3 | #include <linux/kernel.h> | |
f85ff305 | 4 | #include <linux/of.h> |
a2bd4fd1 | 5 | #include <linux/init.h> |
066bcaca | 6 | #include <linux/export.h> |
a2bd4fd1 DM |
7 | #include <linux/mod_devicetable.h> |
8 | #include <linux/slab.h> | |
3f23de10 | 9 | #include <linux/errno.h> |
c1b1a5f1 | 10 | #include <linux/irq.h> |
3f23de10 SR |
11 | #include <linux/of_device.h> |
12 | #include <linux/of_platform.h> | |
c2068dab | 13 | #include <asm/spitfire.h> |
a2bd4fd1 | 14 | |
c9f5b7e7 RR |
15 | #include "of_device_common.h" |
16 | ||
3ca9fab4 DM |
17 | void __iomem *of_ioremap(struct resource *res, unsigned long offset, unsigned long size, char *name) |
18 | { | |
19 | unsigned long ret = res->start + offset; | |
6bda5736 | 20 | struct resource *r; |
3ca9fab4 | 21 | |
6bda5736 DM |
22 | if (res->flags & IORESOURCE_MEM) |
23 | r = request_mem_region(ret, size, name); | |
24 | else | |
25 | r = request_region(ret, size, name); | |
26 | if (!r) | |
3ca9fab4 DM |
27 | ret = 0; |
28 | ||
29 | return (void __iomem *) ret; | |
30 | } | |
31 | EXPORT_SYMBOL(of_ioremap); | |
32 | ||
e3a411a3 | 33 | void of_iounmap(struct resource *res, void __iomem *base, unsigned long size) |
3ca9fab4 | 34 | { |
e3a411a3 DM |
35 | if (res->flags & IORESOURCE_MEM) |
36 | release_mem_region((unsigned long) base, size); | |
37 | else | |
38 | release_region((unsigned long) base, size); | |
3ca9fab4 DM |
39 | } |
40 | EXPORT_SYMBOL(of_iounmap); | |
41 | ||
cf44bbc2 DM |
42 | /* |
43 | * PCI bus specific translator | |
44 | */ | |
45 | ||
46 | static int of_bus_pci_match(struct device_node *np) | |
47 | { | |
7ee766d8 | 48 | if (!strcmp(np->name, "pci")) { |
a165b420 | 49 | const char *model = of_get_property(np, "model", NULL); |
01f94c4a DM |
50 | |
51 | if (model && !strcmp(model, "SUNW,simba")) | |
52 | return 0; | |
53 | ||
a83f9823 DM |
54 | /* Do not do PCI specific frobbing if the |
55 | * PCI bridge lacks a ranges property. We | |
56 | * want to pass it through up to the next | |
57 | * parent as-is, not with the PCI translate | |
58 | * method which chops off the top address cell. | |
59 | */ | |
60 | if (!of_find_property(np, "ranges", NULL)) | |
61 | return 0; | |
62 | ||
63 | return 1; | |
64 | } | |
65 | ||
66 | return 0; | |
cf44bbc2 DM |
67 | } |
68 | ||
01f94c4a DM |
69 | static int of_bus_simba_match(struct device_node *np) |
70 | { | |
a165b420 | 71 | const char *model = of_get_property(np, "model", NULL); |
01f94c4a DM |
72 | |
73 | if (model && !strcmp(model, "SUNW,simba")) | |
74 | return 1; | |
8c2786cf DM |
75 | |
76 | /* Treat PCI busses lacking ranges property just like | |
77 | * simba. | |
78 | */ | |
7ee766d8 | 79 | if (!strcmp(np->name, "pci")) { |
8c2786cf DM |
80 | if (!of_find_property(np, "ranges", NULL)) |
81 | return 1; | |
82 | } | |
83 | ||
01f94c4a DM |
84 | return 0; |
85 | } | |
86 | ||
87 | static int of_bus_simba_map(u32 *addr, const u32 *range, | |
88 | int na, int ns, int pna) | |
89 | { | |
90 | return 0; | |
91 | } | |
92 | ||
cf44bbc2 DM |
93 | static void of_bus_pci_count_cells(struct device_node *np, |
94 | int *addrc, int *sizec) | |
95 | { | |
96 | if (addrc) | |
97 | *addrc = 3; | |
98 | if (sizec) | |
99 | *sizec = 2; | |
100 | } | |
101 | ||
a83f9823 DM |
102 | static int of_bus_pci_map(u32 *addr, const u32 *range, |
103 | int na, int ns, int pna) | |
cf44bbc2 | 104 | { |
a83f9823 DM |
105 | u32 result[OF_MAX_ADDR_CELLS]; |
106 | int i; | |
cf44bbc2 DM |
107 | |
108 | /* Check address type match */ | |
4230fa3b DM |
109 | if (!((addr[0] ^ range[0]) & 0x03000000)) |
110 | goto type_match; | |
111 | ||
112 | /* Special exception, we can map a 64-bit address into | |
113 | * a 32-bit range. | |
114 | */ | |
115 | if ((addr[0] & 0x03000000) == 0x03000000 && | |
116 | (range[0] & 0x03000000) == 0x02000000) | |
117 | goto type_match; | |
118 | ||
119 | return -EINVAL; | |
cf44bbc2 | 120 | |
4230fa3b | 121 | type_match: |
a83f9823 DM |
122 | if (of_out_of_range(addr + 1, range + 1, range + na + pna, |
123 | na - 1, ns)) | |
124 | return -EINVAL; | |
cf44bbc2 | 125 | |
a83f9823 DM |
126 | /* Start with the parent range base. */ |
127 | memcpy(result, range + na, pna * 4); | |
cf44bbc2 | 128 | |
a83f9823 DM |
129 | /* Add in the child address offset, skipping high cell. */ |
130 | for (i = 0; i < na - 1; i++) | |
131 | result[pna - 1 - i] += | |
132 | (addr[na - 1 - i] - | |
133 | range[na - 1 - i]); | |
134 | ||
135 | memcpy(addr, result, pna * 4); | |
136 | ||
137 | return 0; | |
cf44bbc2 DM |
138 | } |
139 | ||
e3c71a32 | 140 | static unsigned long of_bus_pci_get_flags(const u32 *addr, unsigned long flags) |
cf44bbc2 | 141 | { |
cf44bbc2 DM |
142 | u32 w = addr[0]; |
143 | ||
e3c71a32 DM |
144 | /* For PCI, we override whatever child busses may have used. */ |
145 | flags = 0; | |
cf44bbc2 DM |
146 | switch((w >> 24) & 0x03) { |
147 | case 0x01: | |
148 | flags |= IORESOURCE_IO; | |
e3c71a32 DM |
149 | break; |
150 | ||
cf44bbc2 DM |
151 | case 0x02: /* 32 bits */ |
152 | case 0x03: /* 64 bits */ | |
153 | flags |= IORESOURCE_MEM; | |
e3c71a32 | 154 | break; |
cf44bbc2 DM |
155 | } |
156 | if (w & 0x40000000) | |
157 | flags |= IORESOURCE_PREFETCH; | |
158 | return flags; | |
159 | } | |
160 | ||
4130a4b2 DM |
161 | /* |
162 | * FHC/Central bus specific translator. | |
163 | * | |
164 | * This is just needed to hard-code the address and size cell | |
165 | * counts. 'fhc' and 'central' nodes lack the #address-cells and | |
166 | * #size-cells properties, and if you walk to the root on such | |
167 | * Enterprise boxes all you'll get is a #size-cells of 2 which is | |
168 | * not what we want to use. | |
169 | */ | |
170 | static int of_bus_fhc_match(struct device_node *np) | |
cf44bbc2 | 171 | { |
4130a4b2 DM |
172 | return !strcmp(np->name, "fhc") || |
173 | !strcmp(np->name, "central"); | |
cf44bbc2 DM |
174 | } |
175 | ||
4130a4b2 | 176 | #define of_bus_fhc_count_cells of_bus_sbus_count_cells |
cf44bbc2 DM |
177 | |
178 | /* | |
179 | * Array of bus specific translators | |
180 | */ | |
181 | ||
182 | static struct of_bus of_busses[] = { | |
183 | /* PCI */ | |
184 | { | |
185 | .name = "pci", | |
186 | .addr_prop_name = "assigned-addresses", | |
187 | .match = of_bus_pci_match, | |
188 | .count_cells = of_bus_pci_count_cells, | |
189 | .map = of_bus_pci_map, | |
cf44bbc2 DM |
190 | .get_flags = of_bus_pci_get_flags, |
191 | }, | |
01f94c4a DM |
192 | /* SIMBA */ |
193 | { | |
194 | .name = "simba", | |
195 | .addr_prop_name = "assigned-addresses", | |
196 | .match = of_bus_simba_match, | |
197 | .count_cells = of_bus_pci_count_cells, | |
198 | .map = of_bus_simba_map, | |
199 | .get_flags = of_bus_pci_get_flags, | |
200 | }, | |
cf44bbc2 DM |
201 | /* SBUS */ |
202 | { | |
203 | .name = "sbus", | |
204 | .addr_prop_name = "reg", | |
205 | .match = of_bus_sbus_match, | |
206 | .count_cells = of_bus_sbus_count_cells, | |
4130a4b2 DM |
207 | .map = of_bus_default_map, |
208 | .get_flags = of_bus_default_get_flags, | |
209 | }, | |
210 | /* FHC */ | |
211 | { | |
212 | .name = "fhc", | |
213 | .addr_prop_name = "reg", | |
214 | .match = of_bus_fhc_match, | |
215 | .count_cells = of_bus_fhc_count_cells, | |
216 | .map = of_bus_default_map, | |
217 | .get_flags = of_bus_default_get_flags, | |
cf44bbc2 DM |
218 | }, |
219 | /* Default */ | |
220 | { | |
221 | .name = "default", | |
222 | .addr_prop_name = "reg", | |
223 | .match = NULL, | |
224 | .count_cells = of_bus_default_count_cells, | |
225 | .map = of_bus_default_map, | |
cf44bbc2 DM |
226 | .get_flags = of_bus_default_get_flags, |
227 | }, | |
228 | }; | |
229 | ||
230 | static struct of_bus *of_match_bus(struct device_node *np) | |
231 | { | |
232 | int i; | |
233 | ||
234 | for (i = 0; i < ARRAY_SIZE(of_busses); i ++) | |
235 | if (!of_busses[i].match || of_busses[i].match(np)) | |
236 | return &of_busses[i]; | |
237 | BUG(); | |
238 | return NULL; | |
239 | } | |
240 | ||
241 | static int __init build_one_resource(struct device_node *parent, | |
242 | struct of_bus *bus, | |
243 | struct of_bus *pbus, | |
244 | u32 *addr, | |
245 | int na, int ns, int pna) | |
246 | { | |
6a23acf3 | 247 | const u32 *ranges; |
21cd8833 | 248 | int rone, rlen; |
cf44bbc2 DM |
249 | |
250 | ranges = of_get_property(parent, "ranges", &rlen); | |
251 | if (ranges == NULL || rlen == 0) { | |
a83f9823 DM |
252 | u32 result[OF_MAX_ADDR_CELLS]; |
253 | int i; | |
254 | ||
255 | memset(result, 0, pna * 4); | |
256 | for (i = 0; i < na; i++) | |
257 | result[pna - 1 - i] = | |
258 | addr[na - 1 - i]; | |
259 | ||
260 | memcpy(addr, result, pna * 4); | |
261 | return 0; | |
cf44bbc2 DM |
262 | } |
263 | ||
264 | /* Now walk through the ranges */ | |
265 | rlen /= 4; | |
266 | rone = na + pna + ns; | |
267 | for (; rlen >= rone; rlen -= rone, ranges += rone) { | |
a83f9823 DM |
268 | if (!bus->map(addr, ranges, na, ns, pna)) |
269 | return 0; | |
cf44bbc2 | 270 | } |
a83f9823 | 271 | |
49d23cfc DM |
272 | /* When we miss an I/O space match on PCI, just pass it up |
273 | * to the next PCI bridge and/or controller. | |
274 | */ | |
275 | if (!strcmp(bus->name, "pci") && | |
276 | (addr[0] & 0x03000000) == 0x01000000) | |
277 | return 0; | |
278 | ||
a83f9823 DM |
279 | return 1; |
280 | } | |
281 | ||
282 | static int __init use_1to1_mapping(struct device_node *pp) | |
283 | { | |
a83f9823 DM |
284 | /* If we have a ranges property in the parent, use it. */ |
285 | if (of_find_property(pp, "ranges", NULL) != NULL) | |
286 | return 0; | |
cf44bbc2 | 287 | |
a83f9823 DM |
288 | /* If the parent is the dma node of an ISA bus, pass |
289 | * the translation up to the root. | |
5280267c DM |
290 | * |
291 | * Some SBUS devices use intermediate nodes to express | |
292 | * hierarchy within the device itself. These aren't | |
293 | * real bus nodes, and don't have a 'ranges' property. | |
294 | * But, we should still pass the translation work up | |
295 | * to the SBUS itself. | |
a83f9823 | 296 | */ |
5280267c DM |
297 | if (!strcmp(pp->name, "dma") || |
298 | !strcmp(pp->name, "espdma") || | |
299 | !strcmp(pp->name, "ledma") || | |
300 | !strcmp(pp->name, "lebuffer")) | |
a83f9823 DM |
301 | return 0; |
302 | ||
8c2786cf DM |
303 | /* Similarly for all PCI bridges, if we get this far |
304 | * it lacks a ranges property, and this will include | |
305 | * cases like Simba. | |
306 | */ | |
7ee766d8 | 307 | if (!strcmp(pp->name, "pci")) |
a83f9823 DM |
308 | return 0; |
309 | ||
310 | return 1; | |
cf44bbc2 DM |
311 | } |
312 | ||
a83f9823 DM |
313 | static int of_resource_verbose; |
314 | ||
cd4cd730 | 315 | static void __init build_device_resources(struct platform_device *op, |
cf44bbc2 DM |
316 | struct device *parent) |
317 | { | |
cd4cd730 | 318 | struct platform_device *p_op; |
cf44bbc2 DM |
319 | struct of_bus *bus; |
320 | int na, ns; | |
321 | int index, num_reg; | |
6a23acf3 | 322 | const void *preg; |
cf44bbc2 DM |
323 | |
324 | if (!parent) | |
325 | return; | |
326 | ||
cd4cd730 | 327 | p_op = to_platform_device(parent); |
61c7a080 GL |
328 | bus = of_match_bus(p_op->dev.of_node); |
329 | bus->count_cells(op->dev.of_node, &na, &ns); | |
cf44bbc2 | 330 | |
61c7a080 | 331 | preg = of_get_property(op->dev.of_node, bus->addr_prop_name, &num_reg); |
cf44bbc2 DM |
332 | if (!preg || num_reg == 0) |
333 | return; | |
334 | ||
335 | /* Convert to num-cells. */ | |
336 | num_reg /= 4; | |
337 | ||
46ba6d7d | 338 | /* Convert to num-entries. */ |
cf44bbc2 DM |
339 | num_reg /= na + ns; |
340 | ||
e5dd42e4 | 341 | /* Prevent overrunning the op->resources[] array. */ |
46ba6d7d DM |
342 | if (num_reg > PROMREG_MAX) { |
343 | printk(KERN_WARNING "%s: Too many regs (%d), " | |
344 | "limiting to %d.\n", | |
61c7a080 | 345 | op->dev.of_node->full_name, num_reg, PROMREG_MAX); |
46ba6d7d DM |
346 | num_reg = PROMREG_MAX; |
347 | } | |
348 | ||
1636f8ac GL |
349 | op->resource = op->archdata.resource; |
350 | op->num_resources = num_reg; | |
cf44bbc2 DM |
351 | for (index = 0; index < num_reg; index++) { |
352 | struct resource *r = &op->resource[index]; | |
353 | u32 addr[OF_MAX_ADDR_CELLS]; | |
6a23acf3 | 354 | const u32 *reg = (preg + (index * ((na + ns) * 4))); |
61c7a080 GL |
355 | struct device_node *dp = op->dev.of_node; |
356 | struct device_node *pp = p_op->dev.of_node; | |
b85cdd49 | 357 | struct of_bus *pbus, *dbus; |
cf44bbc2 DM |
358 | u64 size, result = OF_BAD_ADDR; |
359 | unsigned long flags; | |
360 | int dna, dns; | |
361 | int pna, pns; | |
362 | ||
363 | size = of_read_addr(reg + na, ns); | |
cf44bbc2 DM |
364 | memcpy(addr, reg, na * 4); |
365 | ||
e3c71a32 DM |
366 | flags = bus->get_flags(addr, 0); |
367 | ||
a83f9823 | 368 | if (use_1to1_mapping(pp)) { |
cf44bbc2 DM |
369 | result = of_read_addr(addr, na); |
370 | goto build_res; | |
371 | } | |
372 | ||
373 | dna = na; | |
374 | dns = ns; | |
b85cdd49 | 375 | dbus = bus; |
cf44bbc2 DM |
376 | |
377 | while (1) { | |
378 | dp = pp; | |
379 | pp = dp->parent; | |
380 | if (!pp) { | |
381 | result = of_read_addr(addr, dna); | |
382 | break; | |
383 | } | |
384 | ||
385 | pbus = of_match_bus(pp); | |
386 | pbus->count_cells(dp, &pna, &pns); | |
387 | ||
b85cdd49 | 388 | if (build_one_resource(dp, dbus, pbus, addr, |
a83f9823 | 389 | dna, dns, pna)) |
cf44bbc2 DM |
390 | break; |
391 | ||
e3c71a32 DM |
392 | flags = pbus->get_flags(addr, flags); |
393 | ||
cf44bbc2 DM |
394 | dna = pna; |
395 | dns = pns; | |
b85cdd49 | 396 | dbus = pbus; |
cf44bbc2 DM |
397 | } |
398 | ||
399 | build_res: | |
400 | memset(r, 0, sizeof(*r)); | |
a83f9823 DM |
401 | |
402 | if (of_resource_verbose) | |
90181136 | 403 | printk("%s reg[%d] -> %llx\n", |
61c7a080 | 404 | op->dev.of_node->full_name, index, |
a83f9823 DM |
405 | result); |
406 | ||
cf44bbc2 | 407 | if (result != OF_BAD_ADDR) { |
1815aed5 DM |
408 | if (tlb_type == hypervisor) |
409 | result &= 0x0fffffffffffffffUL; | |
410 | ||
cf44bbc2 DM |
411 | r->start = result; |
412 | r->end = result + size - 1; | |
413 | r->flags = flags; | |
cf44bbc2 | 414 | } |
61c7a080 | 415 | r->name = op->dev.of_node->name; |
cf44bbc2 DM |
416 | } |
417 | } | |
418 | ||
2b1e5978 DM |
419 | static struct device_node * __init |
420 | apply_interrupt_map(struct device_node *dp, struct device_node *pp, | |
6a23acf3 | 421 | const u32 *imap, int imlen, const u32 *imask, |
2b1e5978 DM |
422 | unsigned int *irq_p) |
423 | { | |
424 | struct device_node *cp; | |
425 | unsigned int irq = *irq_p; | |
426 | struct of_bus *bus; | |
427 | phandle handle; | |
6a23acf3 | 428 | const u32 *reg; |
2b1e5978 DM |
429 | int na, num_reg, i; |
430 | ||
431 | bus = of_match_bus(pp); | |
432 | bus->count_cells(dp, &na, NULL); | |
433 | ||
434 | reg = of_get_property(dp, "reg", &num_reg); | |
435 | if (!reg || !num_reg) | |
436 | return NULL; | |
437 | ||
438 | imlen /= ((na + 3) * 4); | |
439 | handle = 0; | |
440 | for (i = 0; i < imlen; i++) { | |
441 | int j; | |
442 | ||
443 | for (j = 0; j < na; j++) { | |
444 | if ((reg[j] & imask[j]) != imap[j]) | |
445 | goto next; | |
446 | } | |
447 | if (imap[na] == irq) { | |
448 | handle = imap[na + 1]; | |
449 | irq = imap[na + 2]; | |
450 | break; | |
451 | } | |
452 | ||
453 | next: | |
454 | imap += (na + 3); | |
455 | } | |
46ba6d7d DM |
456 | if (i == imlen) { |
457 | /* Psycho and Sabre PCI controllers can have 'interrupt-map' | |
458 | * properties that do not include the on-board device | |
459 | * interrupts. Instead, the device's 'interrupts' property | |
460 | * is already a fully specified INO value. | |
461 | * | |
462 | * Handle this by deciding that, if we didn't get a | |
463 | * match in the parent's 'interrupt-map', and the | |
25985edc | 464 | * parent is an IRQ translator, then use the parent as |
46ba6d7d DM |
465 | * our IRQ controller. |
466 | */ | |
467 | if (pp->irq_trans) | |
468 | return pp; | |
469 | ||
2b1e5978 | 470 | return NULL; |
46ba6d7d | 471 | } |
2b1e5978 DM |
472 | |
473 | *irq_p = irq; | |
474 | cp = of_find_node_by_phandle(handle); | |
475 | ||
476 | return cp; | |
477 | } | |
478 | ||
479 | static unsigned int __init pci_irq_swizzle(struct device_node *dp, | |
480 | struct device_node *pp, | |
481 | unsigned int irq) | |
482 | { | |
6a23acf3 | 483 | const struct linux_prom_pci_registers *regs; |
bb4c18cb | 484 | unsigned int bus, devfn, slot, ret; |
2b1e5978 DM |
485 | |
486 | if (irq < 1 || irq > 4) | |
487 | return irq; | |
488 | ||
489 | regs = of_get_property(dp, "reg", NULL); | |
490 | if (!regs) | |
491 | return irq; | |
492 | ||
bb4c18cb | 493 | bus = (regs->phys_hi >> 16) & 0xff; |
2b1e5978 DM |
494 | devfn = (regs->phys_hi >> 8) & 0xff; |
495 | slot = (devfn >> 3) & 0x1f; | |
496 | ||
bb4c18cb DM |
497 | if (pp->irq_trans) { |
498 | /* Derived from Table 8-3, U2P User's Manual. This branch | |
499 | * is handling a PCI controller that lacks a proper set of | |
500 | * interrupt-map and interrupt-map-mask properties. The | |
501 | * Ultra-E450 is one example. | |
502 | * | |
503 | * The bit layout is BSSLL, where: | |
504 | * B: 0 on bus A, 1 on bus B | |
505 | * D: 2-bit slot number, derived from PCI device number as | |
506 | * (dev - 1) for bus A, or (dev - 2) for bus B | |
507 | * L: 2-bit line number | |
bb4c18cb DM |
508 | */ |
509 | if (bus & 0x80) { | |
510 | /* PBM-A */ | |
511 | bus = 0x00; | |
512 | slot = (slot - 1) << 2; | |
513 | } else { | |
514 | /* PBM-B */ | |
515 | bus = 0x10; | |
516 | slot = (slot - 2) << 2; | |
517 | } | |
518 | irq -= 1; | |
519 | ||
520 | ret = (bus | slot | irq); | |
521 | } else { | |
522 | /* Going through a PCI-PCI bridge that lacks a set of | |
523 | * interrupt-map and interrupt-map-mask properties. | |
524 | */ | |
525 | ret = ((irq - 1 + (slot & 3)) & 3) + 1; | |
526 | } | |
2b1e5978 DM |
527 | |
528 | return ret; | |
529 | } | |
530 | ||
a83f9823 DM |
531 | static int of_irq_verbose; |
532 | ||
cd4cd730 | 533 | static unsigned int __init build_one_device_irq(struct platform_device *op, |
2b1e5978 DM |
534 | struct device *parent, |
535 | unsigned int irq) | |
536 | { | |
61c7a080 | 537 | struct device_node *dp = op->dev.of_node; |
2b1e5978 DM |
538 | struct device_node *pp, *ip; |
539 | unsigned int orig_irq = irq; | |
c1b1a5f1 | 540 | int nid; |
2b1e5978 DM |
541 | |
542 | if (irq == 0xffffffff) | |
543 | return irq; | |
544 | ||
545 | if (dp->irq_trans) { | |
546 | irq = dp->irq_trans->irq_build(dp, irq, | |
547 | dp->irq_trans->data); | |
a83f9823 DM |
548 | |
549 | if (of_irq_verbose) | |
550 | printk("%s: direct translate %x --> %x\n", | |
551 | dp->full_name, orig_irq, irq); | |
552 | ||
c1b1a5f1 | 553 | goto out; |
2b1e5978 DM |
554 | } |
555 | ||
556 | /* Something more complicated. Walk up to the root, applying | |
557 | * interrupt-map or bus specific translations, until we hit | |
558 | * an IRQ translator. | |
559 | * | |
560 | * If we hit a bus type or situation we cannot handle, we | |
561 | * stop and assume that the original IRQ number was in a | |
562 | * format which has special meaning to it's immediate parent. | |
563 | */ | |
564 | pp = dp->parent; | |
565 | ip = NULL; | |
566 | while (pp) { | |
6a23acf3 | 567 | const void *imap, *imsk; |
2b1e5978 DM |
568 | int imlen; |
569 | ||
570 | imap = of_get_property(pp, "interrupt-map", &imlen); | |
571 | imsk = of_get_property(pp, "interrupt-map-mask", NULL); | |
572 | if (imap && imsk) { | |
573 | struct device_node *iret; | |
574 | int this_orig_irq = irq; | |
575 | ||
576 | iret = apply_interrupt_map(dp, pp, | |
577 | imap, imlen, imsk, | |
578 | &irq); | |
a83f9823 DM |
579 | |
580 | if (of_irq_verbose) | |
581 | printk("%s: Apply [%s:%x] imap --> [%s:%x]\n", | |
61c7a080 | 582 | op->dev.of_node->full_name, |
a83f9823 | 583 | pp->full_name, this_orig_irq, |
74a7f084 | 584 | of_node_full_name(iret), irq); |
a83f9823 | 585 | |
2b1e5978 DM |
586 | if (!iret) |
587 | break; | |
588 | ||
589 | if (iret->irq_trans) { | |
590 | ip = iret; | |
591 | break; | |
592 | } | |
593 | } else { | |
7ee766d8 | 594 | if (!strcmp(pp->name, "pci")) { |
2b1e5978 DM |
595 | unsigned int this_orig_irq = irq; |
596 | ||
597 | irq = pci_irq_swizzle(dp, pp, irq); | |
a83f9823 DM |
598 | if (of_irq_verbose) |
599 | printk("%s: PCI swizzle [%s] " | |
600 | "%x --> %x\n", | |
61c7a080 | 601 | op->dev.of_node->full_name, |
a83f9823 DM |
602 | pp->full_name, this_orig_irq, |
603 | irq); | |
604 | ||
2b1e5978 DM |
605 | } |
606 | ||
607 | if (pp->irq_trans) { | |
608 | ip = pp; | |
609 | break; | |
610 | } | |
611 | } | |
612 | dp = pp; | |
613 | pp = pp->parent; | |
614 | } | |
615 | if (!ip) | |
616 | return orig_irq; | |
617 | ||
61c7a080 | 618 | irq = ip->irq_trans->irq_build(op->dev.of_node, irq, |
2b1e5978 | 619 | ip->irq_trans->data); |
a83f9823 DM |
620 | if (of_irq_verbose) |
621 | printk("%s: Apply IRQ trans [%s] %x --> %x\n", | |
61c7a080 | 622 | op->dev.of_node->full_name, ip->full_name, orig_irq, irq); |
2b1e5978 | 623 | |
c1b1a5f1 DM |
624 | out: |
625 | nid = of_node_to_nid(dp); | |
626 | if (nid != -1) { | |
fb1fece5 | 627 | cpumask_t numa_mask; |
c1b1a5f1 | 628 | |
fb1fece5 | 629 | cpumask_copy(&numa_mask, cpumask_of_node(nid)); |
0de26520 | 630 | irq_set_affinity(irq, &numa_mask); |
c1b1a5f1 DM |
631 | } |
632 | ||
2b1e5978 DM |
633 | return irq; |
634 | } | |
635 | ||
cd4cd730 | 636 | static struct platform_device * __init scan_one_device(struct device_node *dp, |
cf44bbc2 DM |
637 | struct device *parent) |
638 | { | |
cd4cd730 | 639 | struct platform_device *op = kzalloc(sizeof(*op), GFP_KERNEL); |
6a23acf3 | 640 | const unsigned int *irq; |
3d6e4702 | 641 | struct dev_archdata *sd; |
2b1e5978 | 642 | int len, i; |
cf44bbc2 DM |
643 | |
644 | if (!op) | |
645 | return NULL; | |
646 | ||
3d6e4702 | 647 | sd = &op->dev.archdata; |
3d6e4702 DM |
648 | sd->op = op; |
649 | ||
d706c1b0 | 650 | op->dev.of_node = dp; |
cf44bbc2 | 651 | |
cf44bbc2 | 652 | irq = of_get_property(dp, "interrupts", &len); |
2b1e5978 | 653 | if (irq) { |
1636f8ac | 654 | op->archdata.num_irqs = len / 4; |
92d9091f RR |
655 | |
656 | /* Prevent overrunning the op->irqs[] array. */ | |
1636f8ac | 657 | if (op->archdata.num_irqs > PROMINTR_MAX) { |
92d9091f RR |
658 | printk(KERN_WARNING "%s: Too many irqs (%d), " |
659 | "limiting to %d.\n", | |
1636f8ac GL |
660 | dp->full_name, op->archdata.num_irqs, PROMINTR_MAX); |
661 | op->archdata.num_irqs = PROMINTR_MAX; | |
92d9091f | 662 | } |
1636f8ac | 663 | memcpy(op->archdata.irqs, irq, op->archdata.num_irqs * 4); |
2b1e5978 | 664 | } else { |
1636f8ac | 665 | op->archdata.num_irqs = 0; |
2b1e5978 | 666 | } |
cf44bbc2 DM |
667 | |
668 | build_device_resources(op, parent); | |
1636f8ac GL |
669 | for (i = 0; i < op->archdata.num_irqs; i++) |
670 | op->archdata.irqs[i] = build_one_device_irq(op, parent, op->archdata.irqs[i]); | |
cf44bbc2 DM |
671 | |
672 | op->dev.parent = parent; | |
eca39301 | 673 | op->dev.bus = &platform_bus_type; |
cf44bbc2 | 674 | if (!parent) |
2222c313 | 675 | dev_set_name(&op->dev, "root"); |
cf44bbc2 | 676 | else |
6016a363 | 677 | dev_set_name(&op->dev, "%08x", dp->phandle); |
cf44bbc2 DM |
678 | |
679 | if (of_device_register(op)) { | |
680 | printk("%s: Could not register of device.\n", | |
681 | dp->full_name); | |
682 | kfree(op); | |
683 | op = NULL; | |
684 | } | |
685 | ||
686 | return op; | |
687 | } | |
688 | ||
689 | static void __init scan_tree(struct device_node *dp, struct device *parent) | |
690 | { | |
691 | while (dp) { | |
cd4cd730 | 692 | struct platform_device *op = scan_one_device(dp, parent); |
cf44bbc2 DM |
693 | |
694 | if (op) | |
695 | scan_tree(dp->child, &op->dev); | |
696 | ||
697 | dp = dp->sibling; | |
698 | } | |
699 | } | |
700 | ||
eca39301 | 701 | static int __init scan_of_devices(void) |
cf44bbc2 DM |
702 | { |
703 | struct device_node *root = of_find_node_by_path("/"); | |
cd4cd730 | 704 | struct platform_device *parent; |
cf44bbc2 DM |
705 | |
706 | parent = scan_one_device(root, NULL); | |
707 | if (!parent) | |
eca39301 | 708 | return 0; |
cf44bbc2 DM |
709 | |
710 | scan_tree(root->child, &parent->dev); | |
eca39301 | 711 | return 0; |
cf44bbc2 | 712 | } |
eca39301 | 713 | postcore_initcall(scan_of_devices); |
a2bd4fd1 | 714 | |
a83f9823 DM |
715 | static int __init of_debug(char *str) |
716 | { | |
717 | int val = 0; | |
718 | ||
719 | get_option(&str, &val); | |
720 | if (val & 1) | |
721 | of_resource_verbose = 1; | |
722 | if (val & 2) | |
723 | of_irq_verbose = 1; | |
724 | return 1; | |
725 | } | |
726 | ||
727 | __setup("of_debug=", of_debug); |