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Commit | Line | Data |
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1b1fbbca | 1 | /* ld script for sparc32/sparc64 kernel */ |
1da177e4 LT |
2 | |
3 | #include <asm-generic/vmlinux.lds.h> | |
b74e34db | 4 | |
bcbe40eb | 5 | #include <asm/page.h> |
b74e34db | 6 | #include <asm/thread_info.h> |
1da177e4 | 7 | |
1b1fbbca SR |
8 | #ifdef CONFIG_SPARC32 |
9 | #define INITIAL_ADDRESS 0x10000 + SIZEOF_HEADERS | |
10 | #define TEXTSTART 0xf0004000 | |
11 | ||
12 | #define SMP_CACHE_BYTES_SHIFT 5 | |
13 | ||
14 | #else | |
15 | #define SMP_CACHE_BYTES_SHIFT 6 | |
16 | #define INITIAL_ADDRESS 0x4000 | |
17 | #define TEXTSTART 0x0000000000404000 | |
18 | ||
19 | #endif | |
20 | ||
21 | #define SMP_CACHE_BYTES (1 << SMP_CACHE_BYTES_SHIFT) | |
22 | ||
23 | #ifdef CONFIG_SPARC32 | |
1da177e4 LT |
24 | OUTPUT_FORMAT("elf32-sparc", "elf32-sparc", "elf32-sparc") |
25 | OUTPUT_ARCH(sparc) | |
26 | ENTRY(_start) | |
27 | jiffies = jiffies_64 + 4; | |
1b1fbbca SR |
28 | #else |
29 | /* sparc64 */ | |
30 | OUTPUT_FORMAT("elf64-sparc", "elf64-sparc", "elf64-sparc") | |
31 | OUTPUT_ARCH(sparc:v9a) | |
32 | ENTRY(_start) | |
33 | jiffies = jiffies_64; | |
34 | #endif | |
35 | ||
1da177e4 LT |
36 | SECTIONS |
37 | { | |
1b1fbbca SR |
38 | /* swapper_low_pmd_dir is sparc64 only */ |
39 | swapper_low_pmd_dir = 0x0000000000402000; | |
40 | . = INITIAL_ADDRESS; | |
41 | .text TEXTSTART : | |
bcbe40eb SR |
42 | { |
43 | _text = .; | |
ce8a7424 | 44 | HEAD_TEXT |
bcbe40eb SR |
45 | TEXT_TEXT |
46 | SCHED_TEXT | |
47 | LOCK_TEXT | |
1b1fbbca | 48 | KPROBES_TEXT |
bcbe40eb SR |
49 | *(.gnu.warning) |
50 | } = 0 | |
51 | _etext = .; | |
1b1fbbca SR |
52 | |
53 | RO_DATA(PAGE_SIZE) | |
bcbe40eb SR |
54 | .data : { |
55 | DATA_DATA | |
56 | CONSTRUCTORS | |
57 | } | |
58 | .data1 : { | |
59 | *(.data1) | |
60 | } | |
1b1fbbca SR |
61 | . = ALIGN(SMP_CACHE_BYTES); |
62 | .data.cacheline_aligned : { | |
63 | *(.data.cacheline_aligned) | |
64 | } | |
65 | . = ALIGN(SMP_CACHE_BYTES); | |
66 | .data.read_mostly : { | |
67 | *(.data.read_mostly) | |
68 | } | |
b74e34db | 69 | /* End of data section */ |
bcbe40eb | 70 | _edata = .; |
b74e34db SR |
71 | |
72 | /* init_task */ | |
73 | . = ALIGN(THREAD_SIZE); | |
74 | .data.init_task : { | |
75 | *(.data.init_task) | |
76 | } | |
bcbe40eb SR |
77 | .fixup : { |
78 | __start___fixup = .; | |
79 | *(.fixup) | |
80 | __stop___fixup = .; | |
81 | } | |
1b1fbbca | 82 | . = ALIGN(16); |
bcbe40eb SR |
83 | __ex_table : { |
84 | __start___ex_table = .; | |
85 | *(__ex_table) | |
86 | __stop___ex_table = .; | |
87 | } | |
bcbe40eb SR |
88 | NOTES |
89 | ||
90 | . = ALIGN(PAGE_SIZE); | |
bcbe40eb | 91 | .init.text : { |
1b1fbbca | 92 | __init_begin = .; |
bcbe40eb | 93 | _sinittext = .; |
01ba2bdc | 94 | INIT_TEXT |
bcbe40eb SR |
95 | _einittext = .; |
96 | } | |
97 | __init_text_end = .; | |
98 | .init.data : { | |
01ba2bdc | 99 | INIT_DATA |
bcbe40eb SR |
100 | } |
101 | . = ALIGN(16); | |
102 | .init.setup : { | |
103 | __setup_start = .; | |
104 | *(.init.setup) | |
105 | __setup_end = .; | |
106 | } | |
107 | .initcall.init : { | |
108 | __initcall_start = .; | |
109 | INITCALLS | |
1b1fbbca | 110 | __initcall_end = .; |
bcbe40eb SR |
111 | } |
112 | .con_initcall.init : { | |
113 | __con_initcall_start = .; | |
114 | *(.con_initcall.init) | |
115 | __con_initcall_end = .; | |
116 | } | |
117 | SECURITY_INIT | |
67d38229 | 118 | |
1b1fbbca SR |
119 | . = ALIGN(4); |
120 | .tsb_ldquad_phys_patch : { | |
121 | __tsb_ldquad_phys_patch = .; | |
122 | *(.tsb_ldquad_phys_patch) | |
123 | __tsb_ldquad_phys_patch_end = .; | |
124 | } | |
125 | ||
126 | .tsb_phys_patch : { | |
127 | __tsb_phys_patch = .; | |
128 | *(.tsb_phys_patch) | |
129 | __tsb_phys_patch_end = .; | |
130 | } | |
131 | ||
132 | .cpuid_patch : { | |
133 | __cpuid_patch = .; | |
134 | *(.cpuid_patch) | |
135 | __cpuid_patch_end = .; | |
136 | } | |
137 | ||
138 | .sun4v_1insn_patch : { | |
139 | __sun4v_1insn_patch = .; | |
140 | *(.sun4v_1insn_patch) | |
141 | __sun4v_1insn_patch_end = .; | |
142 | } | |
143 | .sun4v_2insn_patch : { | |
144 | __sun4v_2insn_patch = .; | |
145 | *(.sun4v_2insn_patch) | |
146 | __sun4v_2insn_patch_end = .; | |
147 | } | |
148 | ||
67d38229 | 149 | #ifdef CONFIG_BLK_DEV_INITRD |
bcbe40eb SR |
150 | . = ALIGN(PAGE_SIZE); |
151 | .init.ramfs : { | |
1b1fbbca | 152 | __initramfs_start = .; |
bcbe40eb | 153 | *(.init.ramfs) |
1b1fbbca | 154 | __initramfs_end = .; |
bcbe40eb | 155 | } |
67d38229 JPS |
156 | #endif |
157 | ||
bcbe40eb | 158 | PERCPU(PAGE_SIZE) |
1b1fbbca | 159 | |
bcbe40eb SR |
160 | . = ALIGN(PAGE_SIZE); |
161 | __init_end = .; | |
bcbe40eb SR |
162 | __bss_start = .; |
163 | .sbss : { | |
164 | *(.sbss) | |
1b1fbbca SR |
165 | *(.scommon) |
166 | } | |
bcbe40eb SR |
167 | .bss : { |
168 | *(.dynbss) | |
169 | *(.bss) | |
170 | *(COMMON) | |
171 | } | |
172 | _end = . ; | |
1b1fbbca | 173 | |
bcbe40eb | 174 | /DISCARD/ : { |
01ba2bdc SR |
175 | EXIT_TEXT |
176 | EXIT_DATA | |
bcbe40eb SR |
177 | *(.exitcall.exit) |
178 | } | |
d5784b57 | 179 | |
bcbe40eb SR |
180 | STABS_DEBUG |
181 | DWARF_DEBUG | |
1da177e4 | 182 | } |