[mirror_ubuntu-artful-kernel.git] / arch / x86 / include / asm / xsave.h

#ifndef __ASM_X86_XSAVE_H
#define __ASM_X86_XSAVE_H

#include <linux/types.h>
#include <asm/processor.h>

#define XSTATE_FP	0x1
#define XSTATE_SSE	0x2
#define XSTATE_YMM	0x4

#define XSTATE_FPSSE	(XSTATE_FP | XSTATE_SSE)

#define FXSAVE_SIZE	512

/*
 * These are the features that the OS can handle currently.
 */
#define XCNTXT_MASK	(XSTATE_FP | XSTATE_SSE | XSTATE_YMM)

#ifdef CONFIG_X86_64
#define REX_PREFIX	"0x48, "
#else
#define REX_PREFIX
#endif

extern unsigned int xstate_size;
extern u64 pcntxt_mask;
extern struct xsave_struct *init_xstate_buf;
extern u64 xstate_fx_sw_bytes[USER_XSTATE_FX_SW_WORDS];

extern void xsave_init(void);
extern void update_regset_xstate_info(unsigned int size, u64 xstate_mask);
extern int init_fpu(struct task_struct *child);
extern int check_for_xstate(struct i387_fxsave_struct __user *buf,
			    void __user *fpstate,
			    struct _fpx_sw_bytes *sw);

static inline int fpu_xrstor_checking(struct fpu *fpu)
{
	struct xsave_struct *fx = &fpu->state->xsave;
	int err;

	asm volatile("1: .byte " REX_PREFIX "0x0f,0xae,0x2f\n\t"
		     "2:\n"
		     ".section .fixup,\"ax\"\n"
		     "3:  movl $-1,%[err]\n"
		     "    jmp  2b\n"
		     ".previous\n"
		     _ASM_EXTABLE(1b, 3b)
		     : [err] "=r" (err)
		     : "D" (fx), "m" (*fx), "a" (-1), "d" (-1), "0" (0)
		     : "memory");

	return err;
}

static inline int xsave_user(struct xsave_struct __user *buf)
{
	int err;
	__asm__ __volatile__("1: .byte " REX_PREFIX "0x0f,0xae,0x27\n"
			     "2:\n"
			     ".section .fixup,\"ax\"\n"
			     "3:  movl $-1,%[err]\n"
			     "    jmp  2b\n"
			     ".previous\n"
			     ".section __ex_table,\"a\"\n"
			     _ASM_ALIGN "\n"
			     _ASM_PTR "1b,3b\n"
			     ".previous"
			     : [err] "=r" (err)
			     : "D" (buf), "a" (-1), "d" (-1), "0" (0)
			     : "memory");
	if (unlikely(err) && __clear_user(buf, xstate_size))
		err = -EFAULT;
	/* No need to clear here because the caller clears USED_MATH */
	return err;
}

static inline int xrestore_user(struct xsave_struct __user *buf, u64 mask)
{
	int err;
	struct xsave_struct *xstate = ((__force struct xsave_struct *)buf);
	u32 lmask = mask;
	u32 hmask = mask >> 32;

	__asm__ __volatile__("1: .byte " REX_PREFIX "0x0f,0xae,0x2f\n"
			     "2:\n"
			     ".section .fixup,\"ax\"\n"
			     "3:  movl $-1,%[err]\n"
			     "    jmp  2b\n"
			     ".previous\n"
			     ".section __ex_table,\"a\"\n"
			     _ASM_ALIGN "\n"
			     _ASM_PTR "1b,3b\n"
			     ".previous"
			     : [err] "=r" (err)
			     : "D" (xstate), "a" (lmask), "d" (hmask), "0" (0)
			     : "memory");	/* memory required? */
	return err;
}

static inline void xrstor_state(struct xsave_struct *fx, u64 mask)
{
	u32 lmask = mask;
	u32 hmask = mask >> 32;

	asm volatile(".byte " REX_PREFIX "0x0f,0xae,0x2f\n\t"
		     : : "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask)
		     :   "memory");
}

static inline void xsave_state(struct xsave_struct *fx, u64 mask)
{
	u32 lmask = mask;
	u32 hmask = mask >> 32;

	asm volatile(".byte " REX_PREFIX "0x0f,0xae,0x27\n\t"
		     : : "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask)
		     :   "memory");
}

static inline void fpu_xsave(struct fpu *fpu)
{
	/* This, however, we can work around by forcing the compiler to select
	   an addressing mode that doesn't require extended registers. */
	alternative_input(
		".byte " REX_PREFIX "0x0f,0xae,0x27",
		".byte " REX_PREFIX "0x0f,0xae,0x37",
		X86_FEATURE_XSAVEOPT,
		[fx] "D" (&fpu->state->xsave), "a" (-1), "d" (-1) :
		"memory");
}
#endif
Commit	Line	Data
dc1e35c6 SS	1	#ifndef __ASM_X86_XSAVE_H
	2	#define __ASM_X86_XSAVE_H
	3
6152e4b1	4	#include <linux/types.h>
dc1e35c6	5	#include <asm/processor.h>
dc1e35c6 SS	6
	7	#define XSTATE_FP 0x1
	8	#define XSTATE_SSE 0x2
a30469e7	9	#define XSTATE_YMM 0x4
dc1e35c6 SS	10
	11	#define XSTATE_FPSSE (XSTATE_FP \| XSTATE_SSE)
	12
	13	#define FXSAVE_SIZE 512
	14
	15	/*
	16	* These are the features that the OS can handle currently.
	17	*/
a30469e7	18	#define XCNTXT_MASK (XSTATE_FP \| XSTATE_SSE \| XSTATE_YMM)
dc1e35c6	19
b359e8a4 SS	20	#ifdef CONFIG_X86_64
	21	#define REX_PREFIX "0x48, "
	22	#else
	23	#define REX_PREFIX
	24	#endif
	25
6152e4b1 PA	26	extern unsigned int xstate_size;
6152e4b1 PA	27	extern u64 pcntxt_mask;
dc1e35c6	28	extern struct xsave_struct *init_xstate_buf;
5b3efd50	29	extern u64 xstate_fx_sw_bytes[USER_XSTATE_FX_SW_WORDS];
dc1e35c6	30
dc1e35c6	31	extern void xsave_init(void);
5b3efd50	32	extern void update_regset_xstate_info(unsigned int size, u64 xstate_mask);
b359e8a4	33	extern int init_fpu(struct task_struct *child);
c37b5efe SS	34	extern int check_for_xstate(struct i387_fxsave_struct __user *buf,
	35	void __user *fpstate,
	36	struct _fpx_sw_bytes *sw);
b359e8a4	37
86603283	38	static inline int fpu_xrstor_checking(struct fpu *fpu)
b359e8a4	39	{
86603283	40	struct xsave_struct *fx = &fpu->state->xsave;
b359e8a4 SS	41	int err;
	42
	43	asm volatile("1: .byte " REX_PREFIX "0x0f,0xae,0x2f\n\t"
	44	"2:\n"
	45	".section .fixup,\"ax\"\n"
	46	"3: movl $-1,%[err]\n"
	47	" jmp 2b\n"
	48	".previous\n"
	49	_ASM_EXTABLE(1b, 3b)
	50	: [err] "=r" (err)
	51	: "D" (fx), "m" (*fx), "a" (-1), "d" (-1), "0" (0)
	52	: "memory");
	53
	54	return err;
	55	}
	56
c37b5efe	57	static inline int xsave_user(struct xsave_struct __user *buf)
9dc89c0f SS	58	{
	59	int err;
	60	__asm__ __volatile__("1: .byte " REX_PREFIX "0x0f,0xae,0x27\n"
	61	"2:\n"
	62	".section .fixup,\"ax\"\n"
	63	"3: movl $-1,%[err]\n"
	64	" jmp 2b\n"
	65	".previous\n"
	66	".section __ex_table,\"a\"\n"
	67	_ASM_ALIGN "\n"
	68	_ASM_PTR "1b,3b\n"
	69	".previous"
	70	: [err] "=r" (err)
	71	: "D" (buf), "a" (-1), "d" (-1), "0" (0)
	72	: "memory");
	73	if (unlikely(err) && __clear_user(buf, xstate_size))
	74	err = -EFAULT;
	75	/* No need to clear here because the caller clears USED_MATH */
	76	return err;
	77	}
	78
6152e4b1	79	static inline int xrestore_user(struct xsave_struct __user *buf, u64 mask)
9dc89c0f SS	80	{
	81	int err;
	82	struct xsave_struct xstate = ((__force struct xsave_struct )buf);
6152e4b1 PA	83	u32 lmask = mask;
6152e4b1 PA	84	u32 hmask = mask >> 32;
9dc89c0f SS	85
	86	__asm__ __volatile__("1: .byte " REX_PREFIX "0x0f,0xae,0x2f\n"
	87	"2:\n"
	88	".section .fixup,\"ax\"\n"
	89	"3: movl $-1,%[err]\n"
	90	" jmp 2b\n"
	91	".previous\n"
	92	".section __ex_table,\"a\"\n"
	93	_ASM_ALIGN "\n"
	94	_ASM_PTR "1b,3b\n"
	95	".previous"
	96	: [err] "=r" (err)
	97	: "D" (xstate), "a" (lmask), "d" (hmask), "0" (0)
	98	: "memory"); /* memory required? */
	99	return err;
	100	}
	101
6152e4b1	102	static inline void xrstor_state(struct xsave_struct *fx, u64 mask)
9dc89c0f	103	{
6152e4b1 PA	104	u32 lmask = mask;
	105	u32 hmask = mask >> 32;
	106
9dc89c0f SS	107	asm volatile(".byte " REX_PREFIX "0x0f,0xae,0x2f\n\t"
	108	: : "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask)
	109	: "memory");
	110	}
	111
29104e10 SS	112	static inline void xsave_state(struct xsave_struct *fx, u64 mask)
	113	{
	114	u32 lmask = mask;
	115	u32 hmask = mask >> 32;
	116
	117	asm volatile(".byte " REX_PREFIX "0x0f,0xae,0x27\n\t"
	118	: : "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask)
	119	: "memory");
	120	}
	121
86603283	122	static inline void fpu_xsave(struct fpu *fpu)
b359e8a4 SS	123	{
	124	/* This, however, we can work around by forcing the compiler to select
	125	an addressing mode that doesn't require extended registers. */
6bad06b7 SS	126	alternative_input(
	127	".byte " REX_PREFIX "0x0f,0xae,0x27",
	128	".byte " REX_PREFIX "0x0f,0xae,0x37",
	129	X86_FEATURE_XSAVEOPT,
	130	[fx] "D" (&fpu->state->xsave), "a" (-1), "d" (-1) :
	131	"memory");
b359e8a4	132	}
dc1e35c6	133	#endif