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Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * |
3 | * Copyright (C) 1991, 1992 Linus Torvalds | |
4 | * | |
5 | * Enhanced CPU detection and feature setting code by Mike Jagdis | |
6 | * and Martin Mares, November 1997. | |
7 | */ | |
8 | ||
9 | .text | |
1da177e4 | 10 | #include <linux/threads.h> |
8b2f7fff | 11 | #include <linux/init.h> |
1da177e4 LT |
12 | #include <linux/linkage.h> |
13 | #include <asm/segment.h> | |
0341c14d JF |
14 | #include <asm/page_types.h> |
15 | #include <asm/pgtable_types.h> | |
1da177e4 LT |
16 | #include <asm/cache.h> |
17 | #include <asm/thread_info.h> | |
86feeaa8 | 18 | #include <asm/asm-offsets.h> |
1da177e4 | 19 | #include <asm/setup.h> |
551889a6 | 20 | #include <asm/processor-flags.h> |
8a50e513 PA |
21 | #include <asm/msr-index.h> |
22 | #include <asm/cpufeature.h> | |
60a5317f | 23 | #include <asm/percpu.h> |
4c5023a3 | 24 | #include <asm/nops.h> |
fb148d83 | 25 | #include <asm/bootparam.h> |
551889a6 IC |
26 | |
27 | /* Physical address */ | |
28 | #define pa(X) ((X) - __PAGE_OFFSET) | |
1da177e4 LT |
29 | |
30 | /* | |
31 | * References to members of the new_cpu_data structure. | |
32 | */ | |
33 | ||
34 | #define X86 new_cpu_data+CPUINFO_x86 | |
35 | #define X86_VENDOR new_cpu_data+CPUINFO_x86_vendor | |
36 | #define X86_MODEL new_cpu_data+CPUINFO_x86_model | |
37 | #define X86_MASK new_cpu_data+CPUINFO_x86_mask | |
38 | #define X86_HARD_MATH new_cpu_data+CPUINFO_hard_math | |
39 | #define X86_CPUID new_cpu_data+CPUINFO_cpuid_level | |
40 | #define X86_CAPABILITY new_cpu_data+CPUINFO_x86_capability | |
41 | #define X86_VENDOR_ID new_cpu_data+CPUINFO_x86_vendor_id | |
42 | ||
43 | /* | |
c090f532 JF |
44 | * This is how much memory in addition to the memory covered up to |
45 | * and including _end we need mapped initially. | |
9ce8c2ed | 46 | * We need: |
2bd2753f YL |
47 | * (KERNEL_IMAGE_SIZE/4096) / 1024 pages (worst case, non PAE) |
48 | * (KERNEL_IMAGE_SIZE/4096) / 512 + 4 pages (worst case for PAE) | |
1da177e4 LT |
49 | * |
50 | * Modulo rounding, each megabyte assigned here requires a kilobyte of | |
51 | * memory, which is currently unreclaimed. | |
52 | * | |
53 | * This should be a multiple of a page. | |
2bd2753f YL |
54 | * |
55 | * KERNEL_IMAGE_SIZE should be greater than pa(_end) | |
56 | * and small than max_low_pfn, otherwise will waste some page table entries | |
1da177e4 | 57 | */ |
1da177e4 | 58 | |
9ce8c2ed | 59 | #if PTRS_PER_PMD > 1 |
c090f532 | 60 | #define PAGE_TABLE_SIZE(pages) (((pages) / PTRS_PER_PMD) + PTRS_PER_PGD) |
9ce8c2ed | 61 | #else |
c090f532 | 62 | #define PAGE_TABLE_SIZE(pages) ((pages) / PTRS_PER_PGD) |
9ce8c2ed | 63 | #endif |
9ce8c2ed | 64 | |
147dd561 PA |
65 | /* Number of possible pages in the lowmem region */ |
66 | LOWMEM_PAGES = (((1<<32) - __PAGE_OFFSET) >> PAGE_SHIFT) | |
67 | ||
c090f532 | 68 | /* Enough space to fit pagetables for the low memory linear map */ |
147dd561 | 69 | MAPPING_BEYOND_END = PAGE_TABLE_SIZE(LOWMEM_PAGES) << PAGE_SHIFT |
c090f532 JF |
70 | |
71 | /* | |
72 | * Worst-case size of the kernel mapping we need to make: | |
147dd561 PA |
73 | * a relocatable kernel can live anywhere in lowmem, so we need to be able |
74 | * to map all of lowmem. | |
c090f532 | 75 | */ |
147dd561 | 76 | KERNEL_PAGES = LOWMEM_PAGES |
c090f532 | 77 | |
7bf04be8 | 78 | INIT_MAP_SIZE = PAGE_TABLE_SIZE(KERNEL_PAGES) * PAGE_SIZE |
2bd2753f | 79 | RESERVE_BRK(pagetables, INIT_MAP_SIZE) |
796216a5 | 80 | |
1da177e4 LT |
81 | /* |
82 | * 32-bit kernel entrypoint; only used by the boot CPU. On entry, | |
83 | * %esi points to the real-mode code as a 32-bit pointer. | |
84 | * CS and DS must be 4 GB flat segments, but we don't depend on | |
85 | * any particular GDT layout, because we load our own as soon as we | |
86 | * can. | |
87 | */ | |
4ae59b91 | 88 | __HEAD |
1da177e4 | 89 | ENTRY(startup_32) |
11d4c3f9 PA |
90 | movl pa(stack_start),%ecx |
91 | ||
a24e7851 RR |
92 | /* test KEEP_SEGMENTS flag to see if the bootloader is asking |
93 | us to not reload segments */ | |
fb148d83 | 94 | testb $KEEP_SEGMENTS, BP_loadflags(%esi) |
a24e7851 | 95 | jnz 2f |
1da177e4 LT |
96 | |
97 | /* | |
98 | * Set segments to known values. | |
99 | */ | |
551889a6 | 100 | lgdt pa(boot_gdt_descr) |
1da177e4 LT |
101 | movl $(__BOOT_DS),%eax |
102 | movl %eax,%ds | |
103 | movl %eax,%es | |
104 | movl %eax,%fs | |
105 | movl %eax,%gs | |
11d4c3f9 | 106 | movl %eax,%ss |
a24e7851 | 107 | 2: |
11d4c3f9 | 108 | leal -__PAGE_OFFSET(%ecx),%esp |
1da177e4 LT |
109 | |
110 | /* | |
111 | * Clear BSS first so that there are no surprises... | |
1da177e4 | 112 | */ |
a24e7851 | 113 | cld |
1da177e4 | 114 | xorl %eax,%eax |
551889a6 IC |
115 | movl $pa(__bss_start),%edi |
116 | movl $pa(__bss_stop),%ecx | |
1da177e4 LT |
117 | subl %edi,%ecx |
118 | shrl $2,%ecx | |
119 | rep ; stosl | |
484b90c4 VG |
120 | /* |
121 | * Copy bootup parameters out of the way. | |
122 | * Note: %esi still has the pointer to the real-mode data. | |
123 | * With the kexec as boot loader, parameter segment might be loaded beyond | |
124 | * kernel image and might not even be addressable by early boot page tables. | |
125 | * (kexec on panic case). Hence copy out the parameters before initializing | |
126 | * page tables. | |
127 | */ | |
551889a6 | 128 | movl $pa(boot_params),%edi |
484b90c4 VG |
129 | movl $(PARAM_SIZE/4),%ecx |
130 | cld | |
131 | rep | |
132 | movsl | |
551889a6 | 133 | movl pa(boot_params) + NEW_CL_POINTER,%esi |
484b90c4 | 134 | andl %esi,%esi |
b595076a | 135 | jz 1f # No command line |
551889a6 | 136 | movl $pa(boot_command_line),%edi |
484b90c4 VG |
137 | movl $(COMMAND_LINE_SIZE/4),%ecx |
138 | rep | |
139 | movsl | |
140 | 1: | |
1da177e4 | 141 | |
dc3119e7 | 142 | #ifdef CONFIG_OLPC |
fd699c76 AS |
143 | /* save OFW's pgdir table for later use when calling into OFW */ |
144 | movl %cr3, %eax | |
145 | movl %eax, pa(olpc_ofw_pgd) | |
146 | #endif | |
147 | ||
63b553c6 FY |
148 | #ifdef CONFIG_MICROCODE_EARLY |
149 | /* Early load ucode on BSP. */ | |
150 | call load_ucode_bsp | |
151 | #endif | |
152 | ||
1da177e4 LT |
153 | /* |
154 | * Initialize page tables. This creates a PDE and a set of page | |
2bd2753f | 155 | * tables, which are located immediately beyond __brk_base. The variable |
ccf3fe02 | 156 | * _brk_end is set up to point to the first "safe" location. |
1da177e4 | 157 | * Mappings are created both at virtual address 0 (identity mapping) |
2bd2753f | 158 | * and PAGE_OFFSET for up to _end. |
1da177e4 | 159 | */ |
551889a6 IC |
160 | #ifdef CONFIG_X86_PAE |
161 | ||
162 | /* | |
b40827fa BP |
163 | * In PAE mode initial_page_table is statically defined to contain |
164 | * enough entries to cover the VMSPLIT option (that is the top 1, 2 or 3 | |
165 | * entries). The identity mapping is handled by pointing two PGD entries | |
166 | * to the first kernel PMD. | |
551889a6 | 167 | * |
b40827fa | 168 | * Note the upper half of each PMD or PTE are always zero at this stage. |
551889a6 IC |
169 | */ |
170 | ||
86b2b70e | 171 | #define KPMDS (((-__PAGE_OFFSET) >> 30) & 3) /* Number of kernel PMDs */ |
551889a6 IC |
172 | |
173 | xorl %ebx,%ebx /* %ebx is kept at zero */ | |
174 | ||
ccf3fe02 | 175 | movl $pa(__brk_base), %edi |
b40827fa | 176 | movl $pa(initial_pg_pmd), %edx |
b2bc2731 | 177 | movl $PTE_IDENT_ATTR, %eax |
551889a6 | 178 | 10: |
b2bc2731 | 179 | leal PDE_IDENT_ATTR(%edi),%ecx /* Create PMD entry */ |
551889a6 IC |
180 | movl %ecx,(%edx) /* Store PMD entry */ |
181 | /* Upper half already zero */ | |
182 | addl $8,%edx | |
183 | movl $512,%ecx | |
184 | 11: | |
185 | stosl | |
186 | xchgl %eax,%ebx | |
187 | stosl | |
188 | xchgl %eax,%ebx | |
189 | addl $0x1000,%eax | |
190 | loop 11b | |
191 | ||
192 | /* | |
c090f532 | 193 | * End condition: we must map up to the end + MAPPING_BEYOND_END. |
551889a6 | 194 | */ |
c090f532 | 195 | movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp |
551889a6 IC |
196 | cmpl %ebp,%eax |
197 | jb 10b | |
198 | 1: | |
ccf3fe02 JF |
199 | addl $__PAGE_OFFSET, %edi |
200 | movl %edi, pa(_brk_end) | |
6af61a76 YL |
201 | shrl $12, %eax |
202 | movl %eax, pa(max_pfn_mapped) | |
551889a6 IC |
203 | |
204 | /* Do early initialization of the fixmap area */ | |
b40827fa BP |
205 | movl $pa(initial_pg_fixmap)+PDE_IDENT_ATTR,%eax |
206 | movl %eax,pa(initial_pg_pmd+0x1000*KPMDS-8) | |
551889a6 IC |
207 | #else /* Not PAE */ |
208 | ||
209 | page_pde_offset = (__PAGE_OFFSET >> 20); | |
210 | ||
ccf3fe02 | 211 | movl $pa(__brk_base), %edi |
b40827fa | 212 | movl $pa(initial_page_table), %edx |
b2bc2731 | 213 | movl $PTE_IDENT_ATTR, %eax |
1da177e4 | 214 | 10: |
b2bc2731 | 215 | leal PDE_IDENT_ATTR(%edi),%ecx /* Create PDE entry */ |
1da177e4 LT |
216 | movl %ecx,(%edx) /* Store identity PDE entry */ |
217 | movl %ecx,page_pde_offset(%edx) /* Store kernel PDE entry */ | |
218 | addl $4,%edx | |
219 | movl $1024, %ecx | |
220 | 11: | |
221 | stosl | |
222 | addl $0x1000,%eax | |
223 | loop 11b | |
551889a6 | 224 | /* |
c090f532 | 225 | * End condition: we must map up to the end + MAPPING_BEYOND_END. |
551889a6 | 226 | */ |
c090f532 | 227 | movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp |
1da177e4 LT |
228 | cmpl %ebp,%eax |
229 | jb 10b | |
ccf3fe02 JF |
230 | addl $__PAGE_OFFSET, %edi |
231 | movl %edi, pa(_brk_end) | |
6af61a76 YL |
232 | shrl $12, %eax |
233 | movl %eax, pa(max_pfn_mapped) | |
17d57a92 | 234 | |
551889a6 | 235 | /* Do early initialization of the fixmap area */ |
b40827fa BP |
236 | movl $pa(initial_pg_fixmap)+PDE_IDENT_ATTR,%eax |
237 | movl %eax,pa(initial_page_table+0xffc) | |
551889a6 | 238 | #endif |
d50d8fe1 RR |
239 | |
240 | #ifdef CONFIG_PARAVIRT | |
241 | /* This is can only trip for a broken bootloader... */ | |
242 | cmpw $0x207, pa(boot_params + BP_version) | |
243 | jb default_entry | |
244 | ||
245 | /* Paravirt-compatible boot parameters. Look to see what architecture | |
246 | we're booting under. */ | |
247 | movl pa(boot_params + BP_hardware_subarch), %eax | |
248 | cmpl $num_subarch_entries, %eax | |
249 | jae bad_subarch | |
250 | ||
251 | movl pa(subarch_entries)(,%eax,4), %eax | |
252 | subl $__PAGE_OFFSET, %eax | |
253 | jmp *%eax | |
254 | ||
255 | bad_subarch: | |
256 | WEAK(lguest_entry) | |
257 | WEAK(xen_entry) | |
258 | /* Unknown implementation; there's really | |
259 | nothing we can do at this point. */ | |
260 | ud2a | |
261 | ||
262 | __INITDATA | |
263 | ||
264 | subarch_entries: | |
265 | .long default_entry /* normal x86/PC */ | |
266 | .long lguest_entry /* lguest hypervisor */ | |
267 | .long xen_entry /* Xen hypervisor */ | |
268 | .long default_entry /* Moorestown MID */ | |
269 | num_subarch_entries = (. - subarch_entries) / 4 | |
270 | .previous | |
271 | #else | |
272 | jmp default_entry | |
273 | #endif /* CONFIG_PARAVIRT */ | |
274 | ||
3e2a0cc3 FY |
275 | #ifdef CONFIG_HOTPLUG_CPU |
276 | /* | |
277 | * Boot CPU0 entry point. It's called from play_dead(). Everything has been set | |
278 | * up already except stack. We just set up stack here. Then call | |
279 | * start_secondary(). | |
280 | */ | |
281 | ENTRY(start_cpu0) | |
282 | movl stack_start, %ecx | |
283 | movl %ecx, %esp | |
284 | jmp *(initial_code) | |
285 | ENDPROC(start_cpu0) | |
286 | #endif | |
287 | ||
1da177e4 LT |
288 | /* |
289 | * Non-boot CPU entry point; entered from trampoline.S | |
290 | * We can't lgdt here, because lgdt itself uses a data segment, but | |
52de74dd | 291 | * we know the trampoline has already loaded the boot_gdt for us. |
f8657e1b VG |
292 | * |
293 | * If cpu hotplug is not supported then this code can go in init section | |
294 | * which will be freed later | |
1da177e4 LT |
295 | */ |
296 | ENTRY(startup_32_smp) | |
297 | cld | |
298 | movl $(__BOOT_DS),%eax | |
299 | movl %eax,%ds | |
300 | movl %eax,%es | |
301 | movl %eax,%fs | |
302 | movl %eax,%gs | |
11d4c3f9 PA |
303 | movl pa(stack_start),%ecx |
304 | movl %eax,%ss | |
305 | leal -__PAGE_OFFSET(%ecx),%esp | |
48927bbb | 306 | |
63b553c6 FY |
307 | #ifdef CONFIG_MICROCODE_EARLY |
308 | /* Early load ucode on AP. */ | |
309 | call load_ucode_ap | |
310 | #endif | |
311 | ||
312 | ||
d50d8fe1 | 313 | default_entry: |
021ef050 PA |
314 | #define CR0_STATE (X86_CR0_PE | X86_CR0_MP | X86_CR0_ET | \ |
315 | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM | \ | |
316 | X86_CR0_PG) | |
317 | movl $(CR0_STATE & ~X86_CR0_PG),%eax | |
318 | movl %eax,%cr0 | |
319 | ||
1da177e4 | 320 | /* |
9efb58de BP |
321 | * We want to start out with EFLAGS unambiguously cleared. Some BIOSes leave |
322 | * bits like NT set. This would confuse the debugger if this code is traced. So | |
323 | * initialize them properly now before switching to protected mode. That means | |
324 | * DF in particular (even though we have cleared it earlier after copying the | |
325 | * command line) because GCC expects it. | |
326 | */ | |
327 | pushl $0 | |
328 | popfl | |
329 | ||
330 | /* | |
331 | * New page tables may be in 4Mbyte page mode and may be using the global pages. | |
1da177e4 | 332 | * |
9efb58de BP |
333 | * NOTE! If we are on a 486 we may have no cr4 at all! Specifically, cr4 exists |
334 | * if and only if CPUID exists and has flags other than the FPU flag set. | |
1da177e4 | 335 | */ |
9efb58de | 336 | movl $-1,pa(X86_CPUID) # preset CPUID level |
5a5a51db PA |
337 | movl $X86_EFLAGS_ID,%ecx |
338 | pushl %ecx | |
9efb58de | 339 | popfl # set EFLAGS=ID |
5a5a51db | 340 | pushfl |
9efb58de BP |
341 | popl %eax # get EFLAGS |
342 | testl $X86_EFLAGS_ID,%eax # did EFLAGS.ID remained set? | |
5e2a044d | 343 | jz enable_paging # hw disallowed setting of ID bit |
9efb58de BP |
344 | # which means no CPUID and no CR4 |
345 | ||
346 | xorl %eax,%eax | |
347 | cpuid | |
348 | movl %eax,pa(X86_CPUID) # save largest std CPUID function | |
5a5a51db | 349 | |
6662c34f PA |
350 | movl $1,%eax |
351 | cpuid | |
9efb58de | 352 | andl $~1,%edx # Ignore CPUID.FPU |
5e2a044d | 353 | jz enable_paging # No flags or only CPUID.FPU = no CR4 |
6662c34f | 354 | |
5a5a51db | 355 | movl pa(mmu_cr4_features),%eax |
1da177e4 LT |
356 | movl %eax,%cr4 |
357 | ||
8a50e513 | 358 | testb $X86_CR4_PAE, %al # check if PAE is enabled |
5e2a044d | 359 | jz enable_paging |
1da177e4 LT |
360 | |
361 | /* Check if extended functions are implemented */ | |
362 | movl $0x80000000, %eax | |
363 | cpuid | |
8a50e513 PA |
364 | /* Value must be in the range 0x80000001 to 0x8000ffff */ |
365 | subl $0x80000001, %eax | |
366 | cmpl $(0x8000ffff-0x80000001), %eax | |
5e2a044d | 367 | ja enable_paging |
ebba638a KC |
368 | |
369 | /* Clear bogus XD_DISABLE bits */ | |
370 | call verify_cpu | |
371 | ||
1da177e4 LT |
372 | mov $0x80000001, %eax |
373 | cpuid | |
374 | /* Execute Disable bit supported? */ | |
8a50e513 | 375 | btl $(X86_FEATURE_NX & 31), %edx |
5e2a044d | 376 | jnc enable_paging |
1da177e4 LT |
377 | |
378 | /* Setup EFER (Extended Feature Enable Register) */ | |
8a50e513 | 379 | movl $MSR_EFER, %ecx |
1da177e4 LT |
380 | rdmsr |
381 | ||
8a50e513 | 382 | btsl $_EFER_NX, %eax |
1da177e4 LT |
383 | /* Make changes effective */ |
384 | wrmsr | |
385 | ||
5e2a044d | 386 | enable_paging: |
1da177e4 LT |
387 | |
388 | /* | |
389 | * Enable paging | |
390 | */ | |
b40827fa | 391 | movl $pa(initial_page_table), %eax |
1da177e4 | 392 | movl %eax,%cr3 /* set the page table pointer.. */ |
021ef050 | 393 | movl $CR0_STATE,%eax |
1da177e4 LT |
394 | movl %eax,%cr0 /* ..and set paging (PG) bit */ |
395 | ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */ | |
396 | 1: | |
11d4c3f9 PA |
397 | /* Shift the stack pointer to a virtual address */ |
398 | addl $__PAGE_OFFSET, %esp | |
1da177e4 | 399 | |
1da177e4 LT |
400 | /* |
401 | * start system 32-bit setup. We need to re-do some of the things done | |
402 | * in 16-bit mode for the "real" operations. | |
403 | */ | |
4c5023a3 PA |
404 | movl setup_once_ref,%eax |
405 | andl %eax,%eax | |
406 | jz 1f # Did we do this already? | |
407 | call *%eax | |
408 | 1: | |
166df91d | 409 | |
1da177e4 | 410 | /* |
166df91d | 411 | * Check if it is 486 |
1da177e4 | 412 | */ |
237d1548 | 413 | movb $4,X86 # at least 486 |
c3a22a26 | 414 | cmpl $-1,X86_CPUID |
1da177e4 LT |
415 | je is486 |
416 | ||
417 | /* get vendor info */ | |
418 | xorl %eax,%eax # call CPUID with 0 -> return vendor ID | |
419 | cpuid | |
420 | movl %eax,X86_CPUID # save CPUID level | |
421 | movl %ebx,X86_VENDOR_ID # lo 4 chars | |
422 | movl %edx,X86_VENDOR_ID+4 # next 4 chars | |
423 | movl %ecx,X86_VENDOR_ID+8 # last 4 chars | |
424 | ||
425 | orl %eax,%eax # do we have processor info as well? | |
426 | je is486 | |
427 | ||
428 | movl $1,%eax # Use the CPUID instruction to get CPU type | |
429 | cpuid | |
430 | movb %al,%cl # save reg for future use | |
431 | andb $0x0f,%ah # mask processor family | |
432 | movb %ah,X86 | |
433 | andb $0xf0,%al # mask model | |
434 | shrb $4,%al | |
435 | movb %al,X86_MODEL | |
436 | andb $0x0f,%cl # mask mask revision | |
437 | movb %cl,X86_MASK | |
438 | movl %edx,X86_CAPABILITY | |
439 | ||
c3a22a26 | 440 | is486: |
c3a22a26 | 441 | movl $0x50022,%ecx # set AM, WP, NE and MP |
166df91d | 442 | movl %cr0,%eax |
1da177e4 LT |
443 | andl $0x80000011,%eax # Save PG,PE,ET |
444 | orl %ecx,%eax | |
445 | movl %eax,%cr0 | |
446 | ||
2a57ff1a | 447 | lgdt early_gdt_descr |
1da177e4 LT |
448 | lidt idt_descr |
449 | ljmp $(__KERNEL_CS),$1f | |
450 | 1: movl $(__KERNEL_DS),%eax # reload all the segment registers | |
451 | movl %eax,%ss # after changing gdt. | |
452 | ||
453 | movl $(__USER_DS),%eax # DS/ES contains default USER segment | |
454 | movl %eax,%ds | |
455 | movl %eax,%es | |
456 | ||
0dd76d73 BG |
457 | movl $(__KERNEL_PERCPU), %eax |
458 | movl %eax,%fs # set this cpu's percpu | |
459 | ||
60a5317f | 460 | movl $(__KERNEL_STACK_CANARY),%eax |
464d1a78 | 461 | movl %eax,%gs |
60a5317f TH |
462 | |
463 | xorl %eax,%eax # Clear LDT | |
1da177e4 | 464 | lldt %ax |
f95d47ca | 465 | |
26fd5e08 | 466 | pushl $0 # fake return address for unwinder |
e3f77edf | 467 | jmp *(initial_code) |
1da177e4 | 468 | |
4c5023a3 PA |
469 | #include "verify_cpu.S" |
470 | ||
1da177e4 | 471 | /* |
4c5023a3 | 472 | * setup_once |
1da177e4 | 473 | * |
4c5023a3 | 474 | * The setup work we only want to run on the BSP. |
1da177e4 LT |
475 | * |
476 | * Warning: %esi is live across this function. | |
477 | */ | |
4c5023a3 PA |
478 | __INIT |
479 | setup_once: | |
480 | /* | |
425be567 AL |
481 | * Set up a idt with 256 interrupt gates that push zero if there |
482 | * is no error code and then jump to early_idt_handler_common. | |
483 | * It doesn't actually load the idt - that needs to be done on | |
484 | * each CPU. Interrupts are enabled elsewhere, when we can be | |
485 | * relatively sure everything is ok. | |
4c5023a3 | 486 | */ |
1da177e4 | 487 | |
4c5023a3 | 488 | movl $idt_table,%edi |
425be567 | 489 | movl $early_idt_handler_array,%eax |
4c5023a3 PA |
490 | movl $NUM_EXCEPTION_VECTORS,%ecx |
491 | 1: | |
1da177e4 | 492 | movl %eax,(%edi) |
4c5023a3 PA |
493 | movl %eax,4(%edi) |
494 | /* interrupt gate, dpl=0, present */ | |
495 | movl $(0x8E000000 + __KERNEL_CS),2(%edi) | |
425be567 | 496 | addl $EARLY_IDT_HANDLER_SIZE,%eax |
1da177e4 | 497 | addl $8,%edi |
4c5023a3 | 498 | loop 1b |
ec5c0926 | 499 | |
4c5023a3 PA |
500 | movl $256 - NUM_EXCEPTION_VECTORS,%ecx |
501 | movl $ignore_int,%edx | |
ec5c0926 | 502 | movl $(__KERNEL_CS << 16),%eax |
4c5023a3 | 503 | movw %dx,%ax /* selector = 0x0010 = cs */ |
ec5c0926 | 504 | movw $0x8E00,%dx /* interrupt gate - dpl=0, present */ |
4c5023a3 PA |
505 | 2: |
506 | movl %eax,(%edi) | |
507 | movl %edx,4(%edi) | |
508 | addl $8,%edi | |
509 | loop 2b | |
ec5c0926 | 510 | |
4c5023a3 PA |
511 | #ifdef CONFIG_CC_STACKPROTECTOR |
512 | /* | |
513 | * Configure the stack canary. The linker can't handle this by | |
514 | * relocation. Manually set base address in stack canary | |
515 | * segment descriptor. | |
516 | */ | |
517 | movl $gdt_page,%eax | |
518 | movl $stack_canary,%ecx | |
519 | movw %cx, 8 * GDT_ENTRY_STACK_CANARY + 2(%eax) | |
520 | shrl $16, %ecx | |
521 | movb %cl, 8 * GDT_ENTRY_STACK_CANARY + 4(%eax) | |
522 | movb %ch, 8 * GDT_ENTRY_STACK_CANARY + 7(%eax) | |
523 | #endif | |
ec5c0926 | 524 | |
4c5023a3 | 525 | andl $0,setup_once_ref /* Once is enough, thanks */ |
1da177e4 LT |
526 | ret |
527 | ||
425be567 | 528 | ENTRY(early_idt_handler_array) |
4c5023a3 PA |
529 | # 36(%esp) %eflags |
530 | # 32(%esp) %cs | |
531 | # 28(%esp) %eip | |
532 | # 24(%rsp) error code | |
533 | i = 0 | |
534 | .rept NUM_EXCEPTION_VECTORS | |
425be567 | 535 | .ifeq (EXCEPTION_ERRCODE_MASK >> i) & 1 |
4c5023a3 PA |
536 | pushl $0 # Dummy error code, to make stack frame uniform |
537 | .endif | |
538 | pushl $i # 20(%esp) Vector number | |
425be567 | 539 | jmp early_idt_handler_common |
4c5023a3 | 540 | i = i + 1 |
425be567 | 541 | .fill early_idt_handler_array + i*EARLY_IDT_HANDLER_SIZE - ., 1, 0xcc |
4c5023a3 | 542 | .endr |
425be567 | 543 | ENDPROC(early_idt_handler_array) |
4c5023a3 | 544 | |
425be567 AL |
545 | early_idt_handler_common: |
546 | /* | |
547 | * The stack is the hardware frame, an error code or zero, and the | |
548 | * vector number. | |
549 | */ | |
4c5023a3 | 550 | cld |
5fa10196 | 551 | |
b01d4e68 | 552 | cmpl $2,(%esp) # X86_TRAP_NMI |
5fa10196 PA |
553 | je is_nmi # Ignore NMI |
554 | ||
4c5023a3 PA |
555 | cmpl $2,%ss:early_recursion_flag |
556 | je hlt_loop | |
557 | incl %ss:early_recursion_flag | |
ec5c0926 | 558 | |
4c5023a3 PA |
559 | push %eax # 16(%esp) |
560 | push %ecx # 12(%esp) | |
561 | push %edx # 8(%esp) | |
562 | push %ds # 4(%esp) | |
563 | push %es # 0(%esp) | |
564 | movl $(__KERNEL_DS),%eax | |
565 | movl %eax,%ds | |
566 | movl %eax,%es | |
ec5c0926 | 567 | |
4c5023a3 PA |
568 | cmpl $(__KERNEL_CS),32(%esp) |
569 | jne 10f | |
ec5c0926 | 570 | |
4c5023a3 PA |
571 | leal 28(%esp),%eax # Pointer to %eip |
572 | call early_fixup_exception | |
573 | andl %eax,%eax | |
574 | jnz ex_entry /* found an exception entry */ | |
ec5c0926 | 575 | |
4c5023a3 | 576 | 10: |
ec5c0926 | 577 | #ifdef CONFIG_PRINTK |
4c5023a3 PA |
578 | xorl %eax,%eax |
579 | movw %ax,2(%esp) /* clean up the segment values on some cpus */ | |
580 | movw %ax,6(%esp) | |
581 | movw %ax,34(%esp) | |
582 | leal 40(%esp),%eax | |
583 | pushl %eax /* %esp before the exception */ | |
584 | pushl %ebx | |
585 | pushl %ebp | |
586 | pushl %esi | |
587 | pushl %edi | |
ec5c0926 CE |
588 | movl %cr2,%eax |
589 | pushl %eax | |
4c5023a3 | 590 | pushl (20+6*4)(%esp) /* trapno */ |
ec5c0926 | 591 | pushl $fault_msg |
ec5c0926 | 592 | call printk |
ec5c0926 | 593 | #endif |
94878efd | 594 | call dump_stack |
ec5c0926 CE |
595 | hlt_loop: |
596 | hlt | |
597 | jmp hlt_loop | |
598 | ||
4c5023a3 PA |
599 | ex_entry: |
600 | pop %es | |
601 | pop %ds | |
602 | pop %edx | |
603 | pop %ecx | |
604 | pop %eax | |
4c5023a3 | 605 | decl %ss:early_recursion_flag |
5fa10196 PA |
606 | is_nmi: |
607 | addl $8,%esp /* drop vector number and error code */ | |
4c5023a3 | 608 | iret |
425be567 | 609 | ENDPROC(early_idt_handler_common) |
4c5023a3 | 610 | |
1da177e4 LT |
611 | /* This is the default interrupt "handler" :-) */ |
612 | ALIGN | |
613 | ignore_int: | |
614 | cld | |
d59745ce | 615 | #ifdef CONFIG_PRINTK |
1da177e4 LT |
616 | pushl %eax |
617 | pushl %ecx | |
618 | pushl %edx | |
619 | pushl %es | |
620 | pushl %ds | |
621 | movl $(__KERNEL_DS),%eax | |
622 | movl %eax,%ds | |
623 | movl %eax,%es | |
ec5c0926 CE |
624 | cmpl $2,early_recursion_flag |
625 | je hlt_loop | |
626 | incl early_recursion_flag | |
1da177e4 LT |
627 | pushl 16(%esp) |
628 | pushl 24(%esp) | |
629 | pushl 32(%esp) | |
630 | pushl 40(%esp) | |
631 | pushl $int_msg | |
632 | call printk | |
d5e397cb IM |
633 | |
634 | call dump_stack | |
635 | ||
1da177e4 LT |
636 | addl $(5*4),%esp |
637 | popl %ds | |
638 | popl %es | |
639 | popl %edx | |
640 | popl %ecx | |
641 | popl %eax | |
d59745ce | 642 | #endif |
1da177e4 | 643 | iret |
4c5023a3 PA |
644 | ENDPROC(ignore_int) |
645 | __INITDATA | |
646 | .align 4 | |
647 | early_recursion_flag: | |
648 | .long 0 | |
1da177e4 | 649 | |
4c5023a3 PA |
650 | __REFDATA |
651 | .align 4 | |
583323b9 TG |
652 | ENTRY(initial_code) |
653 | .long i386_start_kernel | |
4c5023a3 PA |
654 | ENTRY(setup_once_ref) |
655 | .long setup_once | |
583323b9 | 656 | |
1da177e4 LT |
657 | /* |
658 | * BSS section | |
659 | */ | |
02b7da37 | 660 | __PAGE_ALIGNED_BSS |
7bf04be8 | 661 | .align PAGE_SIZE |
551889a6 | 662 | #ifdef CONFIG_X86_PAE |
d50d8fe1 | 663 | initial_pg_pmd: |
551889a6 IC |
664 | .fill 1024*KPMDS,4,0 |
665 | #else | |
b40827fa | 666 | ENTRY(initial_page_table) |
1da177e4 | 667 | .fill 1024,4,0 |
551889a6 | 668 | #endif |
d50d8fe1 | 669 | initial_pg_fixmap: |
b1c931e3 | 670 | .fill 1024,4,0 |
1da177e4 LT |
671 | ENTRY(empty_zero_page) |
672 | .fill 4096,1,0 | |
b40827fa BP |
673 | ENTRY(swapper_pg_dir) |
674 | .fill 1024,4,0 | |
2bd2753f | 675 | |
1da177e4 LT |
676 | /* |
677 | * This starts the data section. | |
678 | */ | |
551889a6 | 679 | #ifdef CONFIG_X86_PAE |
abe1ee3a | 680 | __PAGE_ALIGNED_DATA |
551889a6 | 681 | /* Page-aligned for the benefit of paravirt? */ |
7bf04be8 | 682 | .align PAGE_SIZE |
b40827fa BP |
683 | ENTRY(initial_page_table) |
684 | .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0 /* low identity map */ | |
551889a6 | 685 | # if KPMDS == 3 |
b40827fa BP |
686 | .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0 |
687 | .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0 | |
688 | .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x2000),0 | |
551889a6 IC |
689 | # elif KPMDS == 2 |
690 | .long 0,0 | |
b40827fa BP |
691 | .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0 |
692 | .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0 | |
551889a6 IC |
693 | # elif KPMDS == 1 |
694 | .long 0,0 | |
695 | .long 0,0 | |
b40827fa | 696 | .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0 |
551889a6 IC |
697 | # else |
698 | # error "Kernel PMDs should be 1, 2 or 3" | |
699 | # endif | |
7bf04be8 | 700 | .align PAGE_SIZE /* needs to be page-sized too */ |
551889a6 IC |
701 | #endif |
702 | ||
1da177e4 | 703 | .data |
11d4c3f9 | 704 | .balign 4 |
1da177e4 LT |
705 | ENTRY(stack_start) |
706 | .long init_thread_union+THREAD_SIZE | |
1da177e4 | 707 | |
4c5023a3 | 708 | __INITRODATA |
1da177e4 | 709 | int_msg: |
d5e397cb | 710 | .asciz "Unknown interrupt or fault at: %p %p %p\n" |
1da177e4 | 711 | |
ec5c0926 | 712 | fault_msg: |
575ca735 VN |
713 | /* fault info: */ |
714 | .ascii "BUG: Int %d: CR2 %p\n" | |
4c5023a3 PA |
715 | /* regs pushed in early_idt_handler: */ |
716 | .ascii " EDI %p ESI %p EBP %p EBX %p\n" | |
717 | .ascii " ESP %p ES %p DS %p\n" | |
718 | .ascii " EDX %p ECX %p EAX %p\n" | |
575ca735 | 719 | /* fault frame: */ |
4c5023a3 | 720 | .ascii " vec %p err %p EIP %p CS %p flg %p\n" |
575ca735 VN |
721 | .ascii "Stack: %p %p %p %p %p %p %p %p\n" |
722 | .ascii " %p %p %p %p %p %p %p %p\n" | |
723 | .asciz " %p %p %p %p %p %p %p %p\n" | |
ec5c0926 | 724 | |
9702785a | 725 | #include "../../x86/xen/xen-head.S" |
5ead97c8 | 726 | |
1da177e4 LT |
727 | /* |
728 | * The IDT and GDT 'descriptors' are a strange 48-bit object | |
729 | * only used by the lidt and lgdt instructions. They are not | |
730 | * like usual segment descriptors - they consist of a 16-bit | |
731 | * segment size, and 32-bit linear address value: | |
732 | */ | |
733 | ||
4c5023a3 | 734 | .data |
1da177e4 LT |
735 | .globl boot_gdt_descr |
736 | .globl idt_descr | |
1da177e4 LT |
737 | |
738 | ALIGN | |
739 | # early boot GDT descriptor (must use 1:1 address mapping) | |
740 | .word 0 # 32 bit align gdt_desc.address | |
741 | boot_gdt_descr: | |
742 | .word __BOOT_DS+7 | |
52de74dd | 743 | .long boot_gdt - __PAGE_OFFSET |
1da177e4 LT |
744 | |
745 | .word 0 # 32-bit align idt_desc.address | |
746 | idt_descr: | |
747 | .word IDT_ENTRIES*8-1 # idt contains 256 entries | |
748 | .long idt_table | |
749 | ||
750 | # boot GDT descriptor (later on used by CPU#0): | |
751 | .word 0 # 32 bit align gdt_desc.address | |
2a57ff1a | 752 | ENTRY(early_gdt_descr) |
1da177e4 | 753 | .word GDT_ENTRIES*8-1 |
dd17c8f7 | 754 | .long gdt_page /* Overwritten for secondary CPUs */ |
1da177e4 | 755 | |
1da177e4 | 756 | /* |
52de74dd | 757 | * The boot_gdt must mirror the equivalent in setup.S and is |
1da177e4 LT |
758 | * used only for booting. |
759 | */ | |
760 | .align L1_CACHE_BYTES | |
52de74dd | 761 | ENTRY(boot_gdt) |
1da177e4 LT |
762 | .fill GDT_ENTRY_BOOT_CS,8,0 |
763 | .quad 0x00cf9a000000ffff /* kernel 4GB code at 0x00000000 */ | |
764 | .quad 0x00cf92000000ffff /* kernel 4GB data at 0x00000000 */ |