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Commit | Line | Data |
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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
77883860 | 2 | #include <linux/linkage.h> |
1da177e4 LT |
3 | #include <linux/errno.h> |
4 | #include <linux/signal.h> | |
5 | #include <linux/sched.h> | |
6 | #include <linux/ioport.h> | |
7 | #include <linux/interrupt.h> | |
77883860 | 8 | #include <linux/timex.h> |
1da177e4 | 9 | #include <linux/random.h> |
47f16ca7 | 10 | #include <linux/kprobes.h> |
1da177e4 LT |
11 | #include <linux/init.h> |
12 | #include <linux/kernel_stat.h> | |
edbaa603 | 13 | #include <linux/device.h> |
1da177e4 | 14 | #include <linux/bitops.h> |
77883860 | 15 | #include <linux/acpi.h> |
aa09e6cd JSR |
16 | #include <linux/io.h> |
17 | #include <linux/delay.h> | |
1da177e4 | 18 | |
60063497 | 19 | #include <linux/atomic.h> |
1da177e4 | 20 | #include <asm/timer.h> |
77883860 | 21 | #include <asm/hw_irq.h> |
1da177e4 | 22 | #include <asm/pgtable.h> |
1da177e4 LT |
23 | #include <asm/desc.h> |
24 | #include <asm/apic.h> | |
8e6dafd6 | 25 | #include <asm/setup.h> |
1da177e4 | 26 | #include <asm/i8259.h> |
aa09e6cd | 27 | #include <asm/traps.h> |
3879a6f3 | 28 | #include <asm/prom.h> |
1da177e4 | 29 | |
77883860 PE |
30 | /* |
31 | * ISA PIC or low IO-APIC triggered (INTA-cycle or APIC) interrupts: | |
32 | * (these are usually mapped to vectors 0x30-0x3f) | |
33 | */ | |
34 | ||
35 | /* | |
36 | * The IO-APIC gives us many more interrupt sources. Most of these | |
37 | * are unused but an SMP system is supposed to have enough memory ... | |
38 | * sometimes (mostly wrt. hw bugs) we get corrupted vectors all | |
39 | * across the spectrum, so we really want to be prepared to get all | |
40 | * of these. Plus, more powerful systems might have more than 64 | |
41 | * IO-APIC registers. | |
42 | * | |
43 | * (these are usually mapped into the 0x30-0xff vector range) | |
44 | */ | |
1da177e4 | 45 | |
2ae111cd CG |
46 | /* |
47 | * IRQ2 is cascade interrupt to second interrupt controller | |
48 | */ | |
49 | static struct irqaction irq2 = { | |
50 | .handler = no_action, | |
2ae111cd | 51 | .name = "cascade", |
9bbbff25 | 52 | .flags = IRQF_NO_THREAD, |
2ae111cd CG |
53 | }; |
54 | ||
497c9a19 | 55 | DEFINE_PER_CPU(vector_irq_t, vector_irq) = { |
7276c6a2 | 56 | [0 ... NR_VECTORS - 1] = VECTOR_UNUSED, |
497c9a19 YL |
57 | }; |
58 | ||
d9112f43 | 59 | void __init init_ISA_irqs(void) |
1da177e4 | 60 | { |
011d578f | 61 | struct irq_chip *chip = legacy_pic->chip; |
1da177e4 LT |
62 | int i; |
63 | ||
fc90ccfd VS |
64 | #if defined(CONFIG_X86_64) || defined(CONFIG_X86_LOCAL_APIC) |
65 | init_bsp_APIC(); | |
66 | #endif | |
b81bb373 | 67 | legacy_pic->init(0); |
1da177e4 | 68 | |
95d76acc | 69 | for (i = 0; i < nr_legacy_irqs(); i++) |
60e684f0 | 70 | irq_set_chip_and_handler(i, chip, handle_level_irq); |
7371d9fc | 71 | } |
1da177e4 | 72 | |
54e2603f | 73 | void __init init_IRQ(void) |
66bcaf0b | 74 | { |
97943390 SS |
75 | int i; |
76 | ||
77 | /* | |
8b455e65 | 78 | * On cpu 0, Assign ISA_IRQ_VECTOR(irq) to IRQ 0..15. |
97943390 SS |
79 | * If these IRQ's are handled by legacy interrupt-controllers like PIC, |
80 | * then this configuration will likely be static after the boot. If | |
81 | * these IRQ's are handled by more mordern controllers like IO-APIC, | |
82 | * then this vector space can be freed and re-used dynamically as the | |
83 | * irq's migrate etc. | |
84 | */ | |
95d76acc | 85 | for (i = 0; i < nr_legacy_irqs(); i++) |
a782a7e4 | 86 | per_cpu(vector_irq, 0)[ISA_IRQ_VECTOR(i)] = irq_to_desc(i); |
97943390 | 87 | |
66bcaf0b TG |
88 | x86_init.irqs.intr_init(); |
89 | } | |
2ae111cd | 90 | |
22813c45 PE |
91 | void __init native_init_IRQ(void) |
92 | { | |
22813c45 | 93 | /* Execute any quirks before the call gates are initialised: */ |
d9112f43 | 94 | x86_init.irqs.pre_vector_init(); |
22813c45 | 95 | |
636a7598 | 96 | idt_setup_apic_and_irq_gates(); |
0fa115da | 97 | lapic_assign_system_vectors(); |
77857dc0 | 98 | |
a90b858c | 99 | if (!acpi_ioapic && !of_ioapic && nr_legacy_irqs()) |
2ae111cd CG |
100 | setup_irq(2, &irq2); |
101 | ||
1da177e4 LT |
102 | irq_ctx_init(smp_processor_id()); |
103 | } |