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x86-microcode: fix unbalanced use of get_cpu()
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CommitLineData
1da177e4
LT
1/*
2 * Intel CPU Microcode Update Driver for Linux
3 *
69688262 4 * Copyright (C) 2000-2006 Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
9a3110bf 5 * 2006 Shaohua Li <shaohua.li@intel.com>
1da177e4
LT
6 *
7 * This driver allows to upgrade microcode on Intel processors
bc4e0f9a 8 * belonging to IA-32 family - PentiumPro, Pentium II,
1da177e4
LT
9 * Pentium III, Xeon, Pentium 4, etc.
10 *
bc4e0f9a
BC
11 * Reference: Section 8.11 of Volume 3a, IA-32 Intel? Architecture
12 * Software Developer's Manual
13 * Order Number 253668 or free download from:
14 *
15 * http://developer.intel.com/design/pentium4/manuals/253668.htm
1da177e4
LT
16 *
17 * For more information, go to http://www.urbanmyth.org/microcode
18 *
19 * This program is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU General Public License
21 * as published by the Free Software Foundation; either version
22 * 2 of the License, or (at your option) any later version.
23 *
24 * 1.0 16 Feb 2000, Tigran Aivazian <tigran@sco.com>
25 * Initial release.
26 * 1.01 18 Feb 2000, Tigran Aivazian <tigran@sco.com>
27 * Added read() support + cleanups.
28 * 1.02 21 Feb 2000, Tigran Aivazian <tigran@sco.com>
29 * Added 'device trimming' support. open(O_WRONLY) zeroes
30 * and frees the saved copy of applied microcode.
31 * 1.03 29 Feb 2000, Tigran Aivazian <tigran@sco.com>
32 * Made to use devfs (/dev/cpu/microcode) + cleanups.
33 * 1.04 06 Jun 2000, Simon Trimmer <simon@veritas.com>
34 * Added misc device support (now uses both devfs and misc).
35 * Added MICROCODE_IOCFREE ioctl to clear memory.
36 * 1.05 09 Jun 2000, Simon Trimmer <simon@veritas.com>
37 * Messages for error cases (non Intel & no suitable microcode).
38 * 1.06 03 Aug 2000, Tigran Aivazian <tigran@veritas.com>
39 * Removed ->release(). Removed exclusive open and status bitmap.
40 * Added microcode_rwsem to serialize read()/write()/ioctl().
41 * Removed global kernel lock usage.
42 * 1.07 07 Sep 2000, Tigran Aivazian <tigran@veritas.com>
43 * Write 0 to 0x8B msr and then cpuid before reading revision,
44 * so that it works even if there were no update done by the
45 * BIOS. Otherwise, reading from 0x8B gives junk (which happened
46 * to be 0 on my machine which is why it worked even when I
47 * disabled update by the BIOS)
48 * Thanks to Eric W. Biederman <ebiederman@lnxi.com> for the fix.
49 * 1.08 11 Dec 2000, Richard Schaal <richard.schaal@intel.com> and
50 * Tigran Aivazian <tigran@veritas.com>
51 * Intel Pentium 4 processor support and bugfixes.
52 * 1.09 30 Oct 2001, Tigran Aivazian <tigran@veritas.com>
53 * Bugfix for HT (Hyper-Threading) enabled processors
54 * whereby processor resources are shared by all logical processors
55 * in a single CPU package.
56 * 1.10 28 Feb 2002 Asit K Mallick <asit.k.mallick@intel.com> and
57 * Tigran Aivazian <tigran@veritas.com>,
f516526f
PO
58 * Serialize updates as required on HT processors due to
59 * speculative nature of implementation.
1da177e4
LT
60 * 1.11 22 Mar 2002 Tigran Aivazian <tigran@veritas.com>
61 * Fix the panic when writing zero-length microcode chunk.
bc4e0f9a 62 * 1.12 29 Sep 2003 Nitin Kamble <nitin.a.kamble@intel.com>,
1da177e4
LT
63 * Jun Nakajima <jun.nakajima@intel.com>
64 * Support for the microcode updates in the new format.
65 * 1.13 10 Oct 2003 Tigran Aivazian <tigran@veritas.com>
66 * Removed ->read() method and obsoleted MICROCODE_IOCFREE ioctl
bc4e0f9a 67 * because we no longer hold a copy of applied microcode
1da177e4
LT
68 * in kernel memory.
69 * 1.14 25 Jun 2004 Tigran Aivazian <tigran@veritas.com>
70 * Fix sigmatch() macro to handle old CPUs with pf == 0.
71 * Thanks to Stuart Swales for pointing out this bug.
72 */
73
f516526f 74/* #define DEBUG */ /* pr_debug */
a9415644 75#include <linux/capability.h>
1da177e4
LT
76#include <linux/kernel.h>
77#include <linux/init.h>
78#include <linux/sched.h>
77149367 79#include <linux/smp_lock.h>
5cf6c541 80#include <linux/cpumask.h>
1da177e4
LT
81#include <linux/module.h>
82#include <linux/slab.h>
83#include <linux/vmalloc.h>
84#include <linux/miscdevice.h>
85#include <linux/spinlock.h>
86#include <linux/mm.h>
4e950f6f 87#include <linux/fs.h>
14cc3e2b 88#include <linux/mutex.h>
a30a6a2c
SL
89#include <linux/cpu.h>
90#include <linux/firmware.h>
91#include <linux/platform_device.h>
1da177e4
LT
92
93#include <asm/msr.h>
94#include <asm/uaccess.h>
95#include <asm/processor.h>
9a56a0f8 96#include <asm/microcode.h>
1da177e4 97
3e135d88 98MODULE_DESCRIPTION("Microcode Update Driver");
69688262 99MODULE_AUTHOR("Tigran Aivazian <tigran@aivazian.fsnet.co.uk>");
1da177e4
LT
100MODULE_LICENSE("GPL");
101
f516526f
PO
102#define DEFAULT_UCODE_DATASIZE (2000)
103#define MC_HEADER_SIZE (sizeof(struct microcode_header_intel))
104#define DEFAULT_UCODE_TOTALSIZE (DEFAULT_UCODE_DATASIZE + MC_HEADER_SIZE)
105#define EXT_HEADER_SIZE (sizeof(struct extended_sigtable))
106#define EXT_SIGNATURE_SIZE (sizeof(struct extended_signature))
3e135d88 107#define DWSIZE (sizeof(u32))
1da177e4 108#define get_totalsize(mc) \
d4ee3668
PO
109 (((struct microcode_intel *)mc)->hdr.totalsize ? \
110 ((struct microcode_intel *)mc)->hdr.totalsize : \
111 DEFAULT_UCODE_TOTALSIZE)
112
1da177e4 113#define get_datasize(mc) \
d4ee3668
PO
114 (((struct microcode_intel *)mc)->hdr.datasize ? \
115 ((struct microcode_intel *)mc)->hdr.datasize : DEFAULT_UCODE_DATASIZE)
1da177e4
LT
116
117#define sigmatch(s1, s2, p1, p2) \
118 (((s1) == (s2)) && (((p1) & (p2)) || (((p1) == 0) && ((p2) == 0))))
119
120#define exttable_size(et) ((et)->count * EXT_SIGNATURE_SIZE + EXT_HEADER_SIZE)
121
122/* serialize access to the physical write to MSR 0x79 */
123static DEFINE_SPINLOCK(microcode_update_lock);
124
125/* no concurrent ->write()s are allowed on /dev/cpu/microcode */
3e135d88 126extern struct mutex microcode_mutex;
1da177e4 127
3e135d88 128extern struct ucode_cpu_info ucode_cpu_info[NR_CPUS];
1da177e4 129
8d86f390 130static void collect_cpu_info(int cpu_num)
1da177e4 131{
92cb7612 132 struct cpuinfo_x86 *c = &cpu_data(cpu_num);
1da177e4
LT
133 struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;
134 unsigned int val[2];
135
9a3110bf
SL
136 /* We should bind the task to the CPU */
137 BUG_ON(raw_smp_processor_id() != cpu_num);
138 uci->pf = uci->rev = 0;
d4ee3668 139 uci->mc.mc_intel = NULL;
9a3110bf 140 uci->valid = 1;
1da177e4
LT
141
142 if (c->x86_vendor != X86_VENDOR_INTEL || c->x86 < 6 ||
3e135d88 143 cpu_has(c, X86_FEATURE_IA64)) {
9a3110bf
SL
144 printk(KERN_ERR "microcode: CPU%d not a capable Intel "
145 "processor\n", cpu_num);
146 uci->valid = 0;
1da177e4 147 return;
9a3110bf 148 }
1da177e4 149
9a3110bf
SL
150 uci->sig = cpuid_eax(0x00000001);
151
152 if ((c->x86_model >= 5) || (c->x86 > 6)) {
153 /* get processor flags from MSR 0x17 */
154 rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
155 uci->pf = 1 << ((val[1] >> 18) & 7);
1da177e4
LT
156 }
157
158 wrmsr(MSR_IA32_UCODE_REV, 0, 0);
245067d1 159 /* see notes above for revision 1.07. Apparent chip bug */
487472bc 160 sync_core();
1da177e4
LT
161 /* get the current revision from MSR 0x8B */
162 rdmsr(MSR_IA32_UCODE_REV, val[0], uci->rev);
163 pr_debug("microcode: collect_cpu_info : sig=0x%x, pf=0x%x, rev=0x%x\n",
164 uci->sig, uci->pf, uci->rev);
165}
166
9a3110bf 167static inline int microcode_update_match(int cpu_num,
d4ee3668 168 struct microcode_header_intel *mc_header, int sig, int pf)
1da177e4
LT
169{
170 struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;
171
9a3110bf
SL
172 if (!sigmatch(sig, uci->sig, pf, uci->pf)
173 || mc_header->rev <= uci->rev)
174 return 0;
175 return 1;
1da177e4
LT
176}
177
8d86f390 178static int microcode_sanity_check(void *mc)
1da177e4 179{
d4ee3668 180 struct microcode_header_intel *mc_header = mc;
9a3110bf
SL
181 struct extended_sigtable *ext_header = NULL;
182 struct extended_signature *ext_sig;
183 unsigned long total_size, data_size, ext_table_size;
184 int sum, orig_sum, ext_sigcount = 0, i;
185
186 total_size = get_totalsize(mc_header);
187 data_size = get_datasize(mc_header);
bd8e39f9 188 if (data_size + MC_HEADER_SIZE > total_size) {
9a3110bf
SL
189 printk(KERN_ERR "microcode: error! "
190 "Bad data size in microcode data file\n");
191 return -EINVAL;
192 }
1da177e4 193
9a3110bf
SL
194 if (mc_header->ldrver != 1 || mc_header->hdrver != 1) {
195 printk(KERN_ERR "microcode: error! "
196 "Unknown microcode update format\n");
197 return -EINVAL;
198 }
199 ext_table_size = total_size - (MC_HEADER_SIZE + data_size);
200 if (ext_table_size) {
201 if ((ext_table_size < EXT_HEADER_SIZE)
202 || ((ext_table_size - EXT_HEADER_SIZE) % EXT_SIGNATURE_SIZE)) {
203 printk(KERN_ERR "microcode: error! "
204 "Small exttable size in microcode data file\n");
205 return -EINVAL;
1da177e4 206 }
9a3110bf
SL
207 ext_header = mc + MC_HEADER_SIZE + data_size;
208 if (ext_table_size != exttable_size(ext_header)) {
209 printk(KERN_ERR "microcode: error! "
210 "Bad exttable size in microcode data file\n");
211 return -EFAULT;
1da177e4 212 }
9a3110bf
SL
213 ext_sigcount = ext_header->count;
214 }
1da177e4 215
9a3110bf
SL
216 /* check extended table checksum */
217 if (ext_table_size) {
218 int ext_table_sum = 0;
9a4b9efa 219 int *ext_tablep = (int *)ext_header;
9a3110bf
SL
220
221 i = ext_table_size / DWSIZE;
222 while (i--)
223 ext_table_sum += ext_tablep[i];
224 if (ext_table_sum) {
225 printk(KERN_WARNING "microcode: aborting, "
226 "bad extended signature table checksum\n");
227 return -EINVAL;
1da177e4 228 }
9a3110bf 229 }
1da177e4 230
9a3110bf
SL
231 /* calculate the checksum */
232 orig_sum = 0;
233 i = (MC_HEADER_SIZE + data_size) / DWSIZE;
234 while (i--)
235 orig_sum += ((int *)mc)[i];
236 if (orig_sum) {
237 printk(KERN_ERR "microcode: aborting, bad checksum\n");
238 return -EINVAL;
239 }
240 if (!ext_table_size)
241 return 0;
242 /* check extended signature checksum */
243 for (i = 0; i < ext_sigcount; i++) {
ade1af77
JE
244 ext_sig = (void *)ext_header + EXT_HEADER_SIZE +
245 EXT_SIGNATURE_SIZE * i;
9a3110bf
SL
246 sum = orig_sum
247 - (mc_header->sig + mc_header->pf + mc_header->cksum)
248 + (ext_sig->sig + ext_sig->pf + ext_sig->cksum);
249 if (sum) {
250 printk(KERN_ERR "microcode: aborting, bad checksum\n");
251 return -EINVAL;
1da177e4 252 }
9a3110bf
SL
253 }
254 return 0;
255}
5cf6c541 256
9a3110bf
SL
257/*
258 * return 0 - no update found
259 * return 1 - found update
260 * return < 0 - error
261 */
8d86f390 262static int get_matching_microcode(void *mc, int cpu)
9a3110bf
SL
263{
264 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
d4ee3668 265 struct microcode_header_intel *mc_header = mc;
9a3110bf
SL
266 struct extended_sigtable *ext_header;
267 unsigned long total_size = get_totalsize(mc_header);
268 int ext_sigcount, i;
269 struct extended_signature *ext_sig;
270 void *new_mc;
271
272 if (microcode_update_match(cpu, mc_header,
273 mc_header->sig, mc_header->pf))
274 goto find;
275
276 if (total_size <= get_datasize(mc_header) + MC_HEADER_SIZE)
277 return 0;
278
ade1af77 279 ext_header = mc + get_datasize(mc_header) + MC_HEADER_SIZE;
9a3110bf 280 ext_sigcount = ext_header->count;
ade1af77 281 ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
9a3110bf
SL
282 for (i = 0; i < ext_sigcount; i++) {
283 if (microcode_update_match(cpu, mc_header,
284 ext_sig->sig, ext_sig->pf))
285 goto find;
286 ext_sig++;
287 }
288 return 0;
289find:
fe176de0 290 pr_debug("microcode: CPU%d found a matching microcode update with"
8d86f390
PO
291 " version 0x%x (current=0x%x)\n",
292 cpu, mc_header->rev, uci->rev);
9a3110bf
SL
293 new_mc = vmalloc(total_size);
294 if (!new_mc) {
295 printk(KERN_ERR "microcode: error! Can not allocate memory\n");
296 return -ENOMEM;
297 }
1da177e4 298
9a3110bf 299 /* free previous update file */
d4ee3668 300 vfree(uci->mc.mc_intel);
1da177e4 301
9a3110bf 302 memcpy(new_mc, mc, total_size);
d4ee3668 303 uci->mc.mc_intel = new_mc;
9a3110bf 304 return 1;
1da177e4
LT
305}
306
8d86f390 307static void apply_microcode(int cpu)
1da177e4
LT
308{
309 unsigned long flags;
310 unsigned int val[2];
9a3110bf 311 int cpu_num = raw_smp_processor_id();
1da177e4
LT
312 struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;
313
9a3110bf
SL
314 /* We should bind the task to the CPU */
315 BUG_ON(cpu_num != cpu);
316
d4ee3668 317 if (uci->mc.mc_intel == NULL)
1da177e4 318 return;
1da177e4
LT
319
320 /* serialize access to the physical write to MSR 0x79 */
bc4e0f9a 321 spin_lock_irqsave(&microcode_update_lock, flags);
1da177e4
LT
322
323 /* write microcode via MSR 0x79 */
324 wrmsr(MSR_IA32_UCODE_WRITE,
d4ee3668
PO
325 (unsigned long) uci->mc.mc_intel->bits,
326 (unsigned long) uci->mc.mc_intel->bits >> 16 >> 16);
1da177e4
LT
327 wrmsr(MSR_IA32_UCODE_REV, 0, 0);
328
245067d1 329 /* see notes above for revision 1.07. Apparent chip bug */
487472bc 330 sync_core();
245067d1 331
1da177e4
LT
332 /* get the current revision from MSR 0x8B */
333 rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
334
1da177e4 335 spin_unlock_irqrestore(&microcode_update_lock, flags);
d4ee3668 336 if (val[1] != uci->mc.mc_intel->hdr.rev) {
fe176de0 337 printk(KERN_ERR "microcode: CPU%d update from revision "
9a3110bf
SL
338 "0x%x to 0x%x failed\n", cpu_num, uci->rev, val[1]);
339 return;
340 }
fe176de0 341 printk(KERN_INFO "microcode: CPU%d updated from revision "
34a1b9fc
DW
342 "0x%x to 0x%x, date = %04x-%02x-%02x \n",
343 cpu_num, uci->rev, val[1],
344 uci->mc.mc_intel->hdr.date & 0xffff,
345 uci->mc.mc_intel->hdr.date >> 24,
346 (uci->mc.mc_intel->hdr.date >> 16) & 0xff);
9a3110bf 347 uci->rev = val[1];
1da177e4
LT
348}
349
9a3110bf 350#ifdef CONFIG_MICROCODE_OLD_INTERFACE
3e135d88
PO
351extern void __user *user_buffer; /* user area microcode data buffer */
352extern unsigned int user_buffer_size; /* it's size */
1da177e4 353
8d86f390 354static long get_next_ucode(void **mc, long offset)
9a3110bf 355{
d4ee3668 356 struct microcode_header_intel mc_header;
9a3110bf
SL
357 unsigned long total_size;
358
359 /* No more data */
360 if (offset >= user_buffer_size)
361 return 0;
362 if (copy_from_user(&mc_header, user_buffer + offset, MC_HEADER_SIZE)) {
363 printk(KERN_ERR "microcode: error! Can not read user data\n");
364 return -EFAULT;
1da177e4 365 }
9a3110bf 366 total_size = get_totalsize(&mc_header);
bd8e39f9 367 if (offset + total_size > user_buffer_size) {
9a3110bf
SL
368 printk(KERN_ERR "microcode: error! Bad total size in microcode "
369 "data file\n");
370 return -EINVAL;
1da177e4 371 }
9a3110bf
SL
372 *mc = vmalloc(total_size);
373 if (!*mc)
374 return -ENOMEM;
375 if (copy_from_user(*mc, user_buffer + offset, total_size)) {
376 printk(KERN_ERR "microcode: error! Can not read user data\n");
377 vfree(*mc);
378 return -EFAULT;
1da177e4 379 }
9a3110bf
SL
380 return offset + total_size;
381}
9a3110bf
SL
382#endif
383
a13b04af 384static long get_next_ucode_from_buffer(void **mc, const u8 *buf,
a30a6a2c
SL
385 unsigned long size, long offset)
386{
d4ee3668 387 struct microcode_header_intel *mc_header;
a30a6a2c
SL
388 unsigned long total_size;
389
390 /* No more data */
391 if (offset >= size)
392 return 0;
d4ee3668 393 mc_header = (struct microcode_header_intel *)(buf + offset);
a30a6a2c
SL
394 total_size = get_totalsize(mc_header);
395
bd8e39f9 396 if (offset + total_size > size) {
a30a6a2c
SL
397 printk(KERN_ERR "microcode: error! Bad data in microcode data file\n");
398 return -EINVAL;
399 }
400
401 *mc = vmalloc(total_size);
402 if (!*mc) {
403 printk(KERN_ERR "microcode: error! Can not allocate memory\n");
404 return -ENOMEM;
405 }
406 memcpy(*mc, buf + offset, total_size);
407 return offset + total_size;
408}
409
410/* fake device for request_firmware */
3e135d88 411extern struct platform_device *microcode_pdev;
a30a6a2c 412
8d86f390 413static int cpu_request_microcode(int cpu)
a30a6a2c
SL
414{
415 char name[30];
92cb7612 416 struct cpuinfo_x86 *c = &cpu_data(cpu);
a30a6a2c 417 const struct firmware *firmware;
a13b04af 418 const u8 *buf;
a30a6a2c
SL
419 unsigned long size;
420 long offset = 0;
421 int error;
422 void *mc;
423
424 /* We should bind the task to the CPU */
425 BUG_ON(cpu != raw_smp_processor_id());
3e135d88 426 sprintf(name, "intel-ucode/%02x-%02x-%02x",
a30a6a2c
SL
427 c->x86, c->x86_model, c->x86_mask);
428 error = request_firmware(&firmware, name, &microcode_pdev->dev);
429 if (error) {
bc4e0f9a 430 pr_debug("microcode: data file %s load failed\n", name);
a30a6a2c
SL
431 return error;
432 }
ade1af77 433 buf = firmware->data;
a30a6a2c
SL
434 size = firmware->size;
435 while ((offset = get_next_ucode_from_buffer(&mc, buf, size, offset))
436 > 0) {
437 error = microcode_sanity_check(mc);
438 if (error)
439 break;
3e135d88 440 error = get_matching_microcode(mc, cpu);
a30a6a2c
SL
441 if (error < 0)
442 break;
443 /*
444 * It's possible the data file has multiple matching ucode,
445 * lets keep searching till the latest version
446 */
447 if (error == 1) {
448 apply_microcode(cpu);
449 error = 0;
450 }
451 vfree(mc);
452 }
453 if (offset > 0)
454 vfree(mc);
455 if (offset < 0)
456 error = offset;
457 release_firmware(firmware);
458
459 return error;
460}
461
8d86f390 462static int apply_microcode_check_cpu(int cpu)
1d64b9cb 463{
92cb7612 464 struct cpuinfo_x86 *c = &cpu_data(cpu);
1d64b9cb
RW
465 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
466 cpumask_t old;
467 unsigned int val[2];
468 int err = 0;
469
455c017a 470 /* Check if the microcode is available */
d4ee3668 471 if (!uci->mc.mc_intel)
455c017a 472 return 0;
1d64b9cb
RW
473
474 old = current->cpus_allowed;
3825c9e8 475 set_cpus_allowed_ptr(current, &cpumask_of_cpu(cpu));
1d64b9cb
RW
476
477 /* Check if the microcode we have in memory matches the CPU */
478 if (c->x86_vendor != X86_VENDOR_INTEL || c->x86 < 6 ||
479 cpu_has(c, X86_FEATURE_IA64) || uci->sig != cpuid_eax(0x00000001))
480 err = -EINVAL;
481
482 if (!err && ((c->x86_model >= 5) || (c->x86 > 6))) {
483 /* get processor flags from MSR 0x17 */
484 rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
485 if (uci->pf != (1 << ((val[1] >> 18) & 7)))
486 err = -EINVAL;
487 }
488
489 if (!err) {
490 wrmsr(MSR_IA32_UCODE_REV, 0, 0);
491 /* see notes above for revision 1.07. Apparent chip bug */
492 sync_core();
493 /* get the current revision from MSR 0x8B */
494 rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
495 if (uci->rev != val[1])
496 err = -EINVAL;
497 }
498
499 if (!err)
500 apply_microcode(cpu);
501 else
502 printk(KERN_ERR "microcode: Could not apply microcode to CPU%d:"
503 " sig=0x%x, pf=0x%x, rev=0x%x\n",
504 cpu, uci->sig, uci->pf, uci->rev);
505
fc0e4748 506 set_cpus_allowed_ptr(current, &old);
1d64b9cb
RW
507 return err;
508}
509
8d86f390 510static void microcode_fini_cpu(int cpu)
a30a6a2c
SL
511{
512 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
513
514 mutex_lock(&microcode_mutex);
515 uci->valid = 0;
8d86f390 516 vfree(uci->mc.mc_intel);
d4ee3668 517 uci->mc.mc_intel = NULL;
a30a6a2c
SL
518 mutex_unlock(&microcode_mutex);
519}
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520
521static struct microcode_ops microcode_intel_ops = {
522 .get_next_ucode = get_next_ucode,
523 .get_matching_microcode = get_matching_microcode,
524 .microcode_sanity_check = microcode_sanity_check,
525 .apply_microcode_check_cpu = apply_microcode_check_cpu,
526 .cpu_request_microcode = cpu_request_microcode,
527 .collect_cpu_info = collect_cpu_info,
528 .apply_microcode = apply_microcode,
529 .microcode_fini_cpu = microcode_fini_cpu,
530};
531
532static int __init microcode_intel_module_init(void)
533{
8343ef24 534 struct cpuinfo_x86 *c = &cpu_data(0);
8d86f390 535
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536 if (c->x86_vendor != X86_VENDOR_INTEL) {
537 printk(KERN_ERR "microcode: CPU platform is not Intel-capable\n");
8d86f390 538 return -ENODEV;
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539 }
540
541 return microcode_init(&microcode_intel_ops, THIS_MODULE);
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542}
543
544static void __exit microcode_intel_module_exit(void)
545{
546 microcode_exit();
547}
548
549module_init(microcode_intel_module_init)
550module_exit(microcode_intel_module_exit)