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x86: unify mc146818rtc.h - prepare for sharing rtc code
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1da177e4 1/*
1da177e4
LT
2 * Copyright (C) 1991, 1992, 1995 Linus Torvalds
3 *
4 * This file contains the PC-specific time handling details:
5 * reading the RTC at bootup, etc..
6 * 1994-07-02 Alan Modra
7 * fixed set_rtc_mmss, fixed time.year for >= 2000, new mktime
8 * 1995-03-26 Markus Kuhn
9 * fixed 500 ms bug at call to set_rtc_mmss, fixed DS12887
10 * precision CMOS clock update
11 * 1996-05-03 Ingo Molnar
12 * fixed time warps in do_[slow|fast]_gettimeoffset()
13 * 1997-09-10 Updated NTP code according to technical memorandum Jan '96
14 * "A Kernel Model for Precision Timekeeping" by Dave Mills
15 * 1998-09-05 (Various)
16 * More robust do_fast_gettimeoffset() algorithm implemented
17 * (works with APM, Cyrix 6x86MX and Centaur C6),
18 * monotonic gettimeofday() with fast_get_timeoffset(),
19 * drift-proof precision TSC calibration on boot
20 * (C. Scott Ananian <cananian@alumni.princeton.edu>, Andrew D.
21 * Balsa <andrebalsa@altern.org>, Philip Gladstone <philip@raptor.com>;
22 * ported from 2.0.35 Jumbo-9 by Michael Krause <m.krause@tu-harburg.de>).
23 * 1998-12-16 Andrea Arcangeli
24 * Fixed Jumbo-9 code in 2.1.131: do_gettimeofday was missing 1 jiffy
25 * because was not accounting lost_ticks.
26 * 1998-12-24 Copyright (C) 1998 Andrea Arcangeli
27 * Fixed a xtime SMP race (we need the xtime_lock rw spinlock to
28 * serialize accesses to xtime/lost_ticks).
29 */
30
31#include <linux/errno.h>
32#include <linux/sched.h>
33#include <linux/kernel.h>
34#include <linux/param.h>
35#include <linux/string.h>
36#include <linux/mm.h>
37#include <linux/interrupt.h>
38#include <linux/time.h>
39#include <linux/delay.h>
40#include <linux/init.h>
41#include <linux/smp.h>
42#include <linux/module.h>
43#include <linux/sysdev.h>
44#include <linux/bcd.h>
45#include <linux/efi.h>
46#include <linux/mca.h>
47
48#include <asm/io.h>
49#include <asm/smp.h>
50#include <asm/irq.h>
51#include <asm/msr.h>
52#include <asm/delay.h>
53#include <asm/mpspec.h>
54#include <asm/uaccess.h>
55#include <asm/processor.h>
56#include <asm/timer.h>
d3561b7f 57#include <asm/time.h>
1da177e4
LT
58
59#include "mach_time.h"
60
61#include <linux/timex.h>
1da177e4
LT
62
63#include <asm/hpet.h>
64
65#include <asm/arch_hooks.h>
66
67#include "io_ports.h"
68
306e440d
IM
69#include <asm/i8259.h>
70
1da177e4
LT
71#include "do_timer.h"
72
a3a255e7 73unsigned int cpu_khz; /* Detected as we calibrate the TSC */
129f6946 74EXPORT_SYMBOL(cpu_khz);
1da177e4 75
1da177e4 76DEFINE_SPINLOCK(rtc_lock);
129f6946 77EXPORT_SYMBOL(rtc_lock);
1da177e4 78
1da177e4
LT
79/*
80 * This is a special lock that is owned by the CPU and holds the index
81 * register we are working with. It is required for NMI access to the
82 * CMOS/RTC registers. See include/asm-i386/mc146818rtc.h for details.
83 */
84volatile unsigned long cmos_lock = 0;
85EXPORT_SYMBOL(cmos_lock);
86
87/* Routines for accessing the CMOS RAM/RTC. */
88unsigned char rtc_cmos_read(unsigned char addr)
89{
90 unsigned char val;
91 lock_cmos_prefix(addr);
92 outb_p(addr, RTC_PORT(0));
93 val = inb_p(RTC_PORT(1));
94 lock_cmos_suffix(addr);
95 return val;
96}
97EXPORT_SYMBOL(rtc_cmos_read);
98
99void rtc_cmos_write(unsigned char val, unsigned char addr)
100{
101 lock_cmos_prefix(addr);
102 outb_p(addr, RTC_PORT(0));
103 outb_p(val, RTC_PORT(1));
104 lock_cmos_suffix(addr);
105}
106EXPORT_SYMBOL(rtc_cmos_write);
107
1da177e4
LT
108static int set_rtc_mmss(unsigned long nowtime)
109{
110 int retval;
6f84fa2f 111 unsigned long flags;
1da177e4
LT
112
113 /* gets recalled with irq locally disabled */
6f84fa2f
JS
114 /* XXX - does irqsave resolve this? -johnstul */
115 spin_lock_irqsave(&rtc_lock, flags);
d3561b7f 116 retval = set_wallclock(nowtime);
6f84fa2f 117 spin_unlock_irqrestore(&rtc_lock, flags);
1da177e4
LT
118
119 return retval;
120}
121
122
123int timer_ack;
124
1da177e4
LT
125unsigned long profile_pc(struct pt_regs *regs)
126{
127 unsigned long pc = instruction_pointer(regs);
128
0cb91a22 129#ifdef CONFIG_SMP
7b355202
ZA
130 if (!v8086_mode(regs) && SEGMENT_IS_KERNEL_CODE(regs->xcs) &&
131 in_lock_functions(pc)) {
0cb91a22 132#ifdef CONFIG_FRAME_POINTER
1da177e4 133 return *(unsigned long *)(regs->ebp + 4);
0cb91a22 134#else
7b355202
ZA
135 unsigned long *sp = (unsigned long *)&regs->esp;
136
0cb91a22
AK
137 /* Return address is either directly at stack pointer
138 or above a saved eflags. Eflags has bits 22-31 zero,
139 kernel addresses don't. */
140 if (sp[0] >> 22)
141 return sp[0];
142 if (sp[1] >> 22)
143 return sp[1];
144#endif
145 }
146#endif
1da177e4
LT
147 return pc;
148}
149EXPORT_SYMBOL(profile_pc);
1da177e4
LT
150
151/*
6f84fa2f
JS
152 * This is the same as the above, except we _also_ save the current
153 * Time Stamp Counter value at the time of the timer interrupt, so that
154 * we later on can estimate the time of day more exactly.
1da177e4 155 */
7d12e780 156irqreturn_t timer_interrupt(int irq, void *dev_id)
1da177e4 157{
3c9aea47
TG
158 /* Keep nmi watchdog up to date */
159 per_cpu(irq_stat, smp_processor_id()).irq0_irqs++;
160
1da177e4
LT
161#ifdef CONFIG_X86_IO_APIC
162 if (timer_ack) {
163 /*
164 * Subtle, when I/O APICs are used we have to ack timer IRQ
165 * manually to reset the IRR bit for do_slow_gettimeoffset().
166 * This will also deassert NMI lines for the watchdog if run
167 * on an 82489DX-based system.
168 */
169 spin_lock(&i8259A_lock);
170 outb(0x0c, PIC_MASTER_OCW3);
171 /* Ack the IRQ; AEOI will end it automatically. */
172 inb(PIC_MASTER_POLL);
173 spin_unlock(&i8259A_lock);
174 }
175#endif
176
7d12e780 177 do_timer_interrupt_hook();
1da177e4 178
1da177e4
LT
179 if (MCA_bus) {
180 /* The PS/2 uses level-triggered interrupts. You can't
181 turn them off, nor would you want to (any attempt to
182 enable edge-triggered interrupts usually gets intercepted by a
183 special hardware circuit). Hence we have to acknowledge
184 the timer interrupt. Through some incredibly stupid
185 design idea, the reset for IRQ 0 is done by setting the
186 high bit of the PPI port B (0x61). Note that some PS/2s,
187 notably the 55SX, work fine if this is removed. */
188
86d91bab
JG
189 u8 irq_v = inb_p( 0x61 ); /* read the current state */
190 outb_p( irq_v|0x80, 0x61 ); /* reset the IRQ */
1da177e4 191 }
1da177e4 192
1da177e4
LT
193 return IRQ_HANDLED;
194}
195
196/* not static: needed by APM */
c1d370e1 197unsigned long read_persistent_clock(void)
1da177e4
LT
198{
199 unsigned long retval;
7ba1c6c8 200 unsigned long flags;
1da177e4 201
7ba1c6c8 202 spin_lock_irqsave(&rtc_lock, flags);
1da177e4 203
d3561b7f 204 retval = get_wallclock();
1da177e4 205
7ba1c6c8 206 spin_unlock_irqrestore(&rtc_lock, flags);
1da177e4
LT
207
208 return retval;
209}
129f6946 210
82644459 211int update_persistent_clock(struct timespec now)
1da177e4 212{
82644459 213 return set_rtc_mmss(now.tv_sec);
1da177e4
LT
214}
215
1e4c85f9 216extern void (*late_time_init)(void);
1da177e4 217/* Duplicate of time_init() below, with hpet_enable part added */
e30fab3a 218void __init hpet_time_init(void)
1da177e4 219{
e9e2cdb4
TG
220 if (!hpet_enable())
221 setup_pit_timer();
e30fab3a 222 time_init_hook();
1da177e4 223}
1da177e4 224
e30fab3a
ZA
225/*
226 * This is called directly from init code; we must delay timer setup in the
227 * HPET case as we can't make the decision to turn on HPET this early in the
228 * boot process.
229 *
230 * The chosen time_init function will usually be hpet_time_init, above, but
231 * in the case of virtual hardware, an alternative function may be substituted.
232 */
1da177e4
LT
233void __init time_init(void)
234{
6bb74df4 235 tsc_init();
e30fab3a 236 late_time_init = choose_time_init();
1da177e4 237}