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x86: Add timer_init to x86_init_ops
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1da177e4 1/*
1da177e4
LT
2 * Copyright (C) 1991, 1992, 1995 Linus Torvalds
3 *
4 * This file contains the PC-specific time handling details:
5 * reading the RTC at bootup, etc..
6 * 1994-07-02 Alan Modra
7 * fixed set_rtc_mmss, fixed time.year for >= 2000, new mktime
8 * 1995-03-26 Markus Kuhn
9 * fixed 500 ms bug at call to set_rtc_mmss, fixed DS12887
10 * precision CMOS clock update
11 * 1996-05-03 Ingo Molnar
12 * fixed time warps in do_[slow|fast]_gettimeoffset()
13 * 1997-09-10 Updated NTP code according to technical memorandum Jan '96
14 * "A Kernel Model for Precision Timekeeping" by Dave Mills
15 * 1998-09-05 (Various)
16 * More robust do_fast_gettimeoffset() algorithm implemented
17 * (works with APM, Cyrix 6x86MX and Centaur C6),
18 * monotonic gettimeofday() with fast_get_timeoffset(),
19 * drift-proof precision TSC calibration on boot
20 * (C. Scott Ananian <cananian@alumni.princeton.edu>, Andrew D.
21 * Balsa <andrebalsa@altern.org>, Philip Gladstone <philip@raptor.com>;
22 * ported from 2.0.35 Jumbo-9 by Michael Krause <m.krause@tu-harburg.de>).
23 * 1998-12-16 Andrea Arcangeli
24 * Fixed Jumbo-9 code in 2.1.131: do_gettimeofday was missing 1 jiffy
25 * because was not accounting lost_ticks.
26 * 1998-12-24 Copyright (C) 1998 Andrea Arcangeli
27 * Fixed a xtime SMP race (we need the xtime_lock rw spinlock to
28 * serialize accesses to xtime/lost_ticks).
29 */
30
fe599f9f 31#include <linux/init.h>
1da177e4
LT
32#include <linux/interrupt.h>
33#include <linux/time.h>
1da177e4
LT
34#include <linux/mca.h>
35
8e6dafd6 36#include <asm/setup.h>
fe599f9f
TG
37#include <asm/hpet.h>
38#include <asm/time.h>
cc038491 39#include <asm/timer.h>
1da177e4 40
1164dd00 41#include <asm/do_timer.h>
1da177e4 42
1da177e4
LT
43int timer_ack;
44
1da177e4
LT
45unsigned long profile_pc(struct pt_regs *regs)
46{
47 unsigned long pc = instruction_pointer(regs);
48
0cb91a22 49#ifdef CONFIG_SMP
2c44e668 50 if (!user_mode_vm(regs) && in_lock_functions(pc)) {
0cb91a22 51#ifdef CONFIG_FRAME_POINTER
2c460d0b 52 return *(unsigned long *)(regs->bp + sizeof(long));
0cb91a22 53#else
65ea5b03 54 unsigned long *sp = (unsigned long *)&regs->sp;
7b355202 55
0cb91a22 56 /* Return address is either directly at stack pointer
65ea5b03 57 or above a saved flags. Eflags has bits 22-31 zero,
0cb91a22 58 kernel addresses don't. */
fe599f9f 59 if (sp[0] >> 22)
0cb91a22
AK
60 return sp[0];
61 if (sp[1] >> 22)
62 return sp[1];
63#endif
64 }
65#endif
1da177e4
LT
66 return pc;
67}
68EXPORT_SYMBOL(profile_pc);
1da177e4
LT
69
70/*
6f84fa2f
JS
71 * This is the same as the above, except we _also_ save the current
72 * Time Stamp Counter value at the time of the timer interrupt, so that
73 * we later on can estimate the time of day more exactly.
1da177e4 74 */
845b3944 75static irqreturn_t timer_interrupt(int irq, void *dev_id)
1da177e4 76{
3c9aea47 77 /* Keep nmi watchdog up to date */
8ae93669 78 inc_irq_stat(irq0_irqs);
3c9aea47 79
1da177e4
LT
80#ifdef CONFIG_X86_IO_APIC
81 if (timer_ack) {
82 /*
83 * Subtle, when I/O APICs are used we have to ack timer IRQ
d11d5794 84 * manually to deassert NMI lines for the watchdog if run
1da177e4
LT
85 * on an 82489DX-based system.
86 */
87 spin_lock(&i8259A_lock);
88 outb(0x0c, PIC_MASTER_OCW3);
89 /* Ack the IRQ; AEOI will end it automatically. */
90 inb(PIC_MASTER_POLL);
91 spin_unlock(&i8259A_lock);
92 }
93#endif
94
7d12e780 95 do_timer_interrupt_hook();
1da177e4 96
33c053d0 97#ifdef CONFIG_MCA
1da177e4
LT
98 if (MCA_bus) {
99 /* The PS/2 uses level-triggered interrupts. You can't
100 turn them off, nor would you want to (any attempt to
101 enable edge-triggered interrupts usually gets intercepted by a
102 special hardware circuit). Hence we have to acknowledge
103 the timer interrupt. Through some incredibly stupid
104 design idea, the reset for IRQ 0 is done by setting the
105 high bit of the PPI port B (0x61). Note that some PS/2s,
106 notably the 55SX, work fine if this is removed. */
107
69036c8c
JSR
108 u8 irq_v = inb_p(0x61); /* read the current state */
109 outb_p(irq_v | 0x80, 0x61); /* reset the IRQ */
1da177e4 110 }
33c053d0 111#endif
1da177e4 112
1da177e4
LT
113 return IRQ_HANDLED;
114}
115
845b3944
TG
116static struct irqaction irq0 = {
117 .handler = timer_interrupt,
118 .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER,
119 .name = "timer"
120};
121
122void __init setup_default_timer_irq(void)
123{
124 irq0.mask = cpumask_of_cpu(0);
125 setup_irq(0, &irq0);
126}
127
128/* Default timer init function */
e30fab3a 129void __init hpet_time_init(void)
1da177e4 130{
e9e2cdb4
TG
131 if (!hpet_enable())
132 setup_pit_timer();
845b3944
TG
133 setup_default_timer_irq();
134}
135
136static void x86_late_time_init(void)
137{
138 x86_init.timers.timer_init();
1da177e4 139}
1da177e4 140
e30fab3a 141/*
845b3944
TG
142 * Initialize TSC and delay the periodic timer init to
143 * late x86_late_time_init() so ioremap works.
e30fab3a 144 */
1da177e4
LT
145void __init time_init(void)
146{
6bb74df4 147 tsc_init();
845b3944 148 late_time_init = x86_late_time_init;
1da177e4 149}