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Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Copyright (C) 1991, 1992, 1995 Linus Torvalds |
3 | * | |
4 | * This file contains the PC-specific time handling details: | |
5 | * reading the RTC at bootup, etc.. | |
6 | * 1994-07-02 Alan Modra | |
7 | * fixed set_rtc_mmss, fixed time.year for >= 2000, new mktime | |
8 | * 1995-03-26 Markus Kuhn | |
9 | * fixed 500 ms bug at call to set_rtc_mmss, fixed DS12887 | |
10 | * precision CMOS clock update | |
11 | * 1996-05-03 Ingo Molnar | |
12 | * fixed time warps in do_[slow|fast]_gettimeoffset() | |
13 | * 1997-09-10 Updated NTP code according to technical memorandum Jan '96 | |
14 | * "A Kernel Model for Precision Timekeeping" by Dave Mills | |
15 | * 1998-09-05 (Various) | |
16 | * More robust do_fast_gettimeoffset() algorithm implemented | |
17 | * (works with APM, Cyrix 6x86MX and Centaur C6), | |
18 | * monotonic gettimeofday() with fast_get_timeoffset(), | |
19 | * drift-proof precision TSC calibration on boot | |
20 | * (C. Scott Ananian <cananian@alumni.princeton.edu>, Andrew D. | |
21 | * Balsa <andrebalsa@altern.org>, Philip Gladstone <philip@raptor.com>; | |
22 | * ported from 2.0.35 Jumbo-9 by Michael Krause <m.krause@tu-harburg.de>). | |
23 | * 1998-12-16 Andrea Arcangeli | |
24 | * Fixed Jumbo-9 code in 2.1.131: do_gettimeofday was missing 1 jiffy | |
25 | * because was not accounting lost_ticks. | |
26 | * 1998-12-24 Copyright (C) 1998 Andrea Arcangeli | |
27 | * Fixed a xtime SMP race (we need the xtime_lock rw spinlock to | |
28 | * serialize accesses to xtime/lost_ticks). | |
29 | */ | |
30 | ||
ecce8508 | 31 | #include <linux/clockchips.h> |
fe599f9f | 32 | #include <linux/init.h> |
1da177e4 LT |
33 | #include <linux/interrupt.h> |
34 | #include <linux/time.h> | |
1da177e4 LT |
35 | #include <linux/mca.h> |
36 | ||
8e6dafd6 | 37 | #include <asm/setup.h> |
fe599f9f TG |
38 | #include <asm/hpet.h> |
39 | #include <asm/time.h> | |
cc038491 | 40 | #include <asm/timer.h> |
ecce8508 TG |
41 | #include <asm/i8259.h> |
42 | #include <asm/i8253.h> | |
1da177e4 | 43 | |
1da177e4 LT |
44 | int timer_ack; |
45 | ||
1da177e4 LT |
46 | unsigned long profile_pc(struct pt_regs *regs) |
47 | { | |
48 | unsigned long pc = instruction_pointer(regs); | |
49 | ||
0cb91a22 | 50 | #ifdef CONFIG_SMP |
2c44e668 | 51 | if (!user_mode_vm(regs) && in_lock_functions(pc)) { |
0cb91a22 | 52 | #ifdef CONFIG_FRAME_POINTER |
2c460d0b | 53 | return *(unsigned long *)(regs->bp + sizeof(long)); |
0cb91a22 | 54 | #else |
65ea5b03 | 55 | unsigned long *sp = (unsigned long *)®s->sp; |
7b355202 | 56 | |
0cb91a22 | 57 | /* Return address is either directly at stack pointer |
65ea5b03 | 58 | or above a saved flags. Eflags has bits 22-31 zero, |
0cb91a22 | 59 | kernel addresses don't. */ |
fe599f9f | 60 | if (sp[0] >> 22) |
0cb91a22 AK |
61 | return sp[0]; |
62 | if (sp[1] >> 22) | |
63 | return sp[1]; | |
64 | #endif | |
65 | } | |
66 | #endif | |
1da177e4 LT |
67 | return pc; |
68 | } | |
69 | EXPORT_SYMBOL(profile_pc); | |
1da177e4 LT |
70 | |
71 | /* | |
6f84fa2f JS |
72 | * This is the same as the above, except we _also_ save the current |
73 | * Time Stamp Counter value at the time of the timer interrupt, so that | |
74 | * we later on can estimate the time of day more exactly. | |
1da177e4 | 75 | */ |
845b3944 | 76 | static irqreturn_t timer_interrupt(int irq, void *dev_id) |
1da177e4 | 77 | { |
3c9aea47 | 78 | /* Keep nmi watchdog up to date */ |
8ae93669 | 79 | inc_irq_stat(irq0_irqs); |
3c9aea47 | 80 | |
1da177e4 LT |
81 | #ifdef CONFIG_X86_IO_APIC |
82 | if (timer_ack) { | |
83 | /* | |
84 | * Subtle, when I/O APICs are used we have to ack timer IRQ | |
d11d5794 | 85 | * manually to deassert NMI lines for the watchdog if run |
1da177e4 LT |
86 | * on an 82489DX-based system. |
87 | */ | |
88 | spin_lock(&i8259A_lock); | |
89 | outb(0x0c, PIC_MASTER_OCW3); | |
90 | /* Ack the IRQ; AEOI will end it automatically. */ | |
91 | inb(PIC_MASTER_POLL); | |
92 | spin_unlock(&i8259A_lock); | |
93 | } | |
94 | #endif | |
95 | ||
ecce8508 | 96 | global_clock_event->event_handler(global_clock_event); |
1da177e4 | 97 | |
33c053d0 | 98 | #ifdef CONFIG_MCA |
1da177e4 LT |
99 | if (MCA_bus) { |
100 | /* The PS/2 uses level-triggered interrupts. You can't | |
101 | turn them off, nor would you want to (any attempt to | |
102 | enable edge-triggered interrupts usually gets intercepted by a | |
103 | special hardware circuit). Hence we have to acknowledge | |
104 | the timer interrupt. Through some incredibly stupid | |
105 | design idea, the reset for IRQ 0 is done by setting the | |
106 | high bit of the PPI port B (0x61). Note that some PS/2s, | |
107 | notably the 55SX, work fine if this is removed. */ | |
108 | ||
69036c8c JSR |
109 | u8 irq_v = inb_p(0x61); /* read the current state */ |
110 | outb_p(irq_v | 0x80, 0x61); /* reset the IRQ */ | |
1da177e4 | 111 | } |
33c053d0 | 112 | #endif |
1da177e4 | 113 | |
1da177e4 LT |
114 | return IRQ_HANDLED; |
115 | } | |
116 | ||
845b3944 TG |
117 | static struct irqaction irq0 = { |
118 | .handler = timer_interrupt, | |
119 | .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER, | |
120 | .name = "timer" | |
121 | }; | |
122 | ||
123 | void __init setup_default_timer_irq(void) | |
124 | { | |
125 | irq0.mask = cpumask_of_cpu(0); | |
126 | setup_irq(0, &irq0); | |
127 | } | |
128 | ||
129 | /* Default timer init function */ | |
e30fab3a | 130 | void __init hpet_time_init(void) |
1da177e4 | 131 | { |
e9e2cdb4 TG |
132 | if (!hpet_enable()) |
133 | setup_pit_timer(); | |
845b3944 TG |
134 | setup_default_timer_irq(); |
135 | } | |
136 | ||
137 | static void x86_late_time_init(void) | |
138 | { | |
139 | x86_init.timers.timer_init(); | |
1da177e4 | 140 | } |
1da177e4 | 141 | |
e30fab3a | 142 | /* |
845b3944 TG |
143 | * Initialize TSC and delay the periodic timer init to |
144 | * late x86_late_time_init() so ioremap works. | |
e30fab3a | 145 | */ |
1da177e4 LT |
146 | void __init time_init(void) |
147 | { | |
6bb74df4 | 148 | tsc_init(); |
845b3944 | 149 | late_time_init = x86_late_time_init; |
1da177e4 | 150 | } |