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Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 | 2 | * Copyright (C) 1991, 1992 Linus Torvalds |
a8c1be9d | 3 | * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs |
1da177e4 LT |
4 | * |
5 | * Pentium III FXSR, SSE support | |
6 | * Gareth Hughes <gareth@valinux.com>, May 2000 | |
7 | */ | |
8 | ||
9 | /* | |
c1d518c8 | 10 | * Handle hardware traps and faults. |
1da177e4 | 11 | */ |
c767a54b JP |
12 | |
13 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
14 | ||
56dd9470 | 15 | #include <linux/context_tracking.h> |
b5964405 IM |
16 | #include <linux/interrupt.h> |
17 | #include <linux/kallsyms.h> | |
18 | #include <linux/spinlock.h> | |
b5964405 IM |
19 | #include <linux/kprobes.h> |
20 | #include <linux/uaccess.h> | |
b5964405 | 21 | #include <linux/kdebug.h> |
f503b5ae | 22 | #include <linux/kgdb.h> |
1da177e4 | 23 | #include <linux/kernel.h> |
186f4360 | 24 | #include <linux/export.h> |
b5964405 | 25 | #include <linux/ptrace.h> |
b02ef20a | 26 | #include <linux/uprobes.h> |
1da177e4 | 27 | #include <linux/string.h> |
b5964405 | 28 | #include <linux/delay.h> |
1da177e4 | 29 | #include <linux/errno.h> |
b5964405 IM |
30 | #include <linux/kexec.h> |
31 | #include <linux/sched.h> | |
68db0cf1 | 32 | #include <linux/sched/task_stack.h> |
1da177e4 | 33 | #include <linux/timer.h> |
1da177e4 | 34 | #include <linux/init.h> |
91768d6c | 35 | #include <linux/bug.h> |
b5964405 IM |
36 | #include <linux/nmi.h> |
37 | #include <linux/mm.h> | |
c1d518c8 AH |
38 | #include <linux/smp.h> |
39 | #include <linux/io.h> | |
1da177e4 | 40 | |
c0d12172 DJ |
41 | #if defined(CONFIG_EDAC) |
42 | #include <linux/edac.h> | |
43 | #endif | |
44 | ||
f8561296 | 45 | #include <asm/kmemcheck.h> |
b5964405 | 46 | #include <asm/stacktrace.h> |
1da177e4 | 47 | #include <asm/processor.h> |
1da177e4 | 48 | #include <asm/debugreg.h> |
60063497 | 49 | #include <linux/atomic.h> |
35de5b06 | 50 | #include <asm/text-patching.h> |
08d636b6 | 51 | #include <asm/ftrace.h> |
c1d518c8 | 52 | #include <asm/traps.h> |
1da177e4 | 53 | #include <asm/desc.h> |
78f7f1e5 | 54 | #include <asm/fpu/internal.h> |
9e55e44e | 55 | #include <asm/mce.h> |
4eefbe79 | 56 | #include <asm/fixmap.h> |
1164dd00 | 57 | #include <asm/mach_traps.h> |
17f41571 | 58 | #include <asm/alternative.h> |
a84eeaa9 | 59 | #include <asm/fpu/xstate.h> |
e7126cf5 | 60 | #include <asm/trace/mpx.h> |
fe3d197f | 61 | #include <asm/mpx.h> |
ba3e127e | 62 | #include <asm/vm86.h> |
c1d518c8 | 63 | |
081f75bb | 64 | #ifdef CONFIG_X86_64 |
428cf902 | 65 | #include <asm/x86_init.h> |
081f75bb AH |
66 | #include <asm/pgalloc.h> |
67 | #include <asm/proto.h> | |
081f75bb | 68 | #else |
c1d518c8 | 69 | #include <asm/processor-flags.h> |
8e6dafd6 | 70 | #include <asm/setup.h> |
b2502b41 | 71 | #include <asm/proto.h> |
081f75bb | 72 | #endif |
1da177e4 | 73 | |
b77b881f | 74 | DECLARE_BITMAP(used_vectors, NR_VECTORS); |
b77b881f | 75 | |
d99e1bd1 | 76 | static inline void cond_local_irq_enable(struct pt_regs *regs) |
762db434 AH |
77 | { |
78 | if (regs->flags & X86_EFLAGS_IF) | |
79 | local_irq_enable(); | |
80 | } | |
81 | ||
d99e1bd1 | 82 | static inline void cond_local_irq_disable(struct pt_regs *regs) |
3d2a71a5 AH |
83 | { |
84 | if (regs->flags & X86_EFLAGS_IF) | |
85 | local_irq_disable(); | |
3d2a71a5 AH |
86 | } |
87 | ||
aaee8c3c AL |
88 | /* |
89 | * In IST context, we explicitly disable preemption. This serves two | |
90 | * purposes: it makes it much less likely that we would accidentally | |
91 | * schedule in IST context and it will force a warning if we somehow | |
92 | * manage to schedule by accident. | |
93 | */ | |
8c84014f | 94 | void ist_enter(struct pt_regs *regs) |
95927475 | 95 | { |
f39b6f0e | 96 | if (user_mode(regs)) { |
5778077d | 97 | RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU"); |
95927475 AL |
98 | } else { |
99 | /* | |
100 | * We might have interrupted pretty much anything. In | |
101 | * fact, if we're a machine check, we can even interrupt | |
102 | * NMI processing. We don't want in_nmi() to return true, | |
103 | * but we need to notify RCU. | |
104 | */ | |
105 | rcu_nmi_enter(); | |
95927475 | 106 | } |
b926e6f6 | 107 | |
aaee8c3c | 108 | preempt_disable(); |
b926e6f6 AL |
109 | |
110 | /* This code is a bit fragile. Test it. */ | |
f78f5b90 | 111 | RCU_LOCKDEP_WARN(!rcu_is_watching(), "ist_enter didn't work"); |
95927475 AL |
112 | } |
113 | ||
8c84014f | 114 | void ist_exit(struct pt_regs *regs) |
95927475 | 115 | { |
aaee8c3c | 116 | preempt_enable_no_resched(); |
95927475 | 117 | |
8c84014f | 118 | if (!user_mode(regs)) |
95927475 AL |
119 | rcu_nmi_exit(); |
120 | } | |
121 | ||
bced35b6 AL |
122 | /** |
123 | * ist_begin_non_atomic() - begin a non-atomic section in an IST exception | |
124 | * @regs: regs passed to the IST exception handler | |
125 | * | |
126 | * IST exception handlers normally cannot schedule. As a special | |
127 | * exception, if the exception interrupted userspace code (i.e. | |
f39b6f0e | 128 | * user_mode(regs) would return true) and the exception was not |
bced35b6 AL |
129 | * a double fault, it can be safe to schedule. ist_begin_non_atomic() |
130 | * begins a non-atomic section within an ist_enter()/ist_exit() region. | |
131 | * Callers are responsible for enabling interrupts themselves inside | |
8c84014f | 132 | * the non-atomic section, and callers must call ist_end_non_atomic() |
bced35b6 AL |
133 | * before ist_exit(). |
134 | */ | |
135 | void ist_begin_non_atomic(struct pt_regs *regs) | |
136 | { | |
f39b6f0e | 137 | BUG_ON(!user_mode(regs)); |
bced35b6 AL |
138 | |
139 | /* | |
140 | * Sanity check: we need to be on the normal thread stack. This | |
141 | * will catch asm bugs and any attempt to use ist_preempt_enable | |
142 | * from double_fault. | |
143 | */ | |
3383642c | 144 | BUG_ON(!on_thread_stack()); |
bced35b6 | 145 | |
aaee8c3c | 146 | preempt_enable_no_resched(); |
bced35b6 AL |
147 | } |
148 | ||
149 | /** | |
150 | * ist_end_non_atomic() - begin a non-atomic section in an IST exception | |
151 | * | |
152 | * Ends a non-atomic section started with ist_begin_non_atomic(). | |
153 | */ | |
154 | void ist_end_non_atomic(void) | |
155 | { | |
aaee8c3c | 156 | preempt_disable(); |
bced35b6 AL |
157 | } |
158 | ||
9a93848f PZ |
159 | int is_valid_bugaddr(unsigned long addr) |
160 | { | |
161 | unsigned short ud; | |
162 | ||
163 | if (addr < TASK_SIZE_MAX) | |
164 | return 0; | |
165 | ||
166 | if (probe_kernel_address((unsigned short *)addr, ud)) | |
167 | return 0; | |
168 | ||
169 | return ud == INSN_UD0 || ud == INSN_UD2; | |
170 | } | |
171 | ||
8a524f80 | 172 | int fixup_bug(struct pt_regs *regs, int trapnr) |
9a93848f PZ |
173 | { |
174 | if (trapnr != X86_TRAP_UD) | |
175 | return 0; | |
176 | ||
177 | switch (report_bug(regs->ip, regs)) { | |
178 | case BUG_TRAP_TYPE_NONE: | |
179 | case BUG_TRAP_TYPE_BUG: | |
180 | break; | |
181 | ||
182 | case BUG_TRAP_TYPE_WARN: | |
183 | regs->ip += LEN_UD0; | |
184 | return 1; | |
185 | } | |
186 | ||
187 | return 0; | |
188 | } | |
189 | ||
9326638c | 190 | static nokprobe_inline int |
c416ddf5 FW |
191 | do_trap_no_signal(struct task_struct *tsk, int trapnr, char *str, |
192 | struct pt_regs *regs, long error_code) | |
1da177e4 | 193 | { |
d74ef111 | 194 | if (v8086_mode(regs)) { |
3c1326f8 | 195 | /* |
c416ddf5 | 196 | * Traps 0, 1, 3, 4, and 5 should be forwarded to vm86. |
3c1326f8 AH |
197 | * On nmi (interrupt 2), do_trap should not be called. |
198 | */ | |
c416ddf5 FW |
199 | if (trapnr < X86_TRAP_UD) { |
200 | if (!handle_vm86_trap((struct kernel_vm86_regs *) regs, | |
201 | error_code, trapnr)) | |
202 | return 0; | |
203 | } | |
204 | return -1; | |
1da177e4 | 205 | } |
d74ef111 | 206 | |
55474c48 | 207 | if (!user_mode(regs)) { |
9a93848f PZ |
208 | if (fixup_exception(regs, trapnr)) |
209 | return 0; | |
210 | ||
9a93848f PZ |
211 | tsk->thread.error_code = error_code; |
212 | tsk->thread.trap_nr = trapnr; | |
213 | die(str, regs, error_code); | |
c416ddf5 | 214 | } |
1da177e4 | 215 | |
c416ddf5 FW |
216 | return -1; |
217 | } | |
1da177e4 | 218 | |
1c326c4d ON |
219 | static siginfo_t *fill_trap_info(struct pt_regs *regs, int signr, int trapnr, |
220 | siginfo_t *info) | |
958d3d72 ON |
221 | { |
222 | unsigned long siaddr; | |
223 | int sicode; | |
224 | ||
225 | switch (trapnr) { | |
1c326c4d ON |
226 | default: |
227 | return SEND_SIG_PRIV; | |
228 | ||
958d3d72 ON |
229 | case X86_TRAP_DE: |
230 | sicode = FPE_INTDIV; | |
b02ef20a | 231 | siaddr = uprobe_get_trap_addr(regs); |
958d3d72 ON |
232 | break; |
233 | case X86_TRAP_UD: | |
234 | sicode = ILL_ILLOPN; | |
b02ef20a | 235 | siaddr = uprobe_get_trap_addr(regs); |
958d3d72 ON |
236 | break; |
237 | case X86_TRAP_AC: | |
238 | sicode = BUS_ADRALN; | |
239 | siaddr = 0; | |
240 | break; | |
241 | } | |
242 | ||
243 | info->si_signo = signr; | |
244 | info->si_errno = 0; | |
245 | info->si_code = sicode; | |
246 | info->si_addr = (void __user *)siaddr; | |
1c326c4d | 247 | return info; |
958d3d72 ON |
248 | } |
249 | ||
9326638c | 250 | static void |
c416ddf5 FW |
251 | do_trap(int trapnr, int signr, char *str, struct pt_regs *regs, |
252 | long error_code, siginfo_t *info) | |
253 | { | |
254 | struct task_struct *tsk = current; | |
255 | ||
256 | ||
257 | if (!do_trap_no_signal(tsk, trapnr, str, regs, error_code)) | |
258 | return; | |
b5964405 | 259 | /* |
51e7dc70 | 260 | * We want error_code and trap_nr set for userspace faults and |
b5964405 IM |
261 | * kernelspace faults which result in die(), but not |
262 | * kernelspace faults which are fixed up. die() gives the | |
263 | * process no chance to handle the signal and notice the | |
264 | * kernel fault information, so that won't result in polluting | |
265 | * the information about previously queued, but not yet | |
266 | * delivered, faults. See also do_general_protection below. | |
267 | */ | |
268 | tsk->thread.error_code = error_code; | |
51e7dc70 | 269 | tsk->thread.trap_nr = trapnr; |
d1895183 | 270 | |
081f75bb AH |
271 | if (show_unhandled_signals && unhandled_signal(tsk, signr) && |
272 | printk_ratelimit()) { | |
c767a54b JP |
273 | pr_info("%s[%d] trap %s ip:%lx sp:%lx error:%lx", |
274 | tsk->comm, tsk->pid, str, | |
275 | regs->ip, regs->sp, error_code); | |
1c99a687 | 276 | print_vma_addr(KERN_CONT " in ", regs->ip); |
c767a54b | 277 | pr_cont("\n"); |
081f75bb | 278 | } |
081f75bb | 279 | |
38cad57b | 280 | force_sig_info(signr, info ?: SEND_SIG_PRIV, tsk); |
1da177e4 | 281 | } |
9326638c | 282 | NOKPROBE_SYMBOL(do_trap); |
1da177e4 | 283 | |
dff0796e | 284 | static void do_error_trap(struct pt_regs *regs, long error_code, char *str, |
1c326c4d | 285 | unsigned long trapnr, int signr) |
dff0796e | 286 | { |
1c326c4d | 287 | siginfo_t info; |
dff0796e | 288 | |
5778077d | 289 | RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU"); |
02fdcd5e | 290 | |
b8347c21 AS |
291 | /* |
292 | * WARN*()s end up here; fix them up before we call the | |
293 | * notifier chain. | |
294 | */ | |
295 | if (!user_mode(regs) && fixup_bug(regs, trapnr)) | |
296 | return; | |
297 | ||
dff0796e ON |
298 | if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) != |
299 | NOTIFY_STOP) { | |
d99e1bd1 | 300 | cond_local_irq_enable(regs); |
1c326c4d ON |
301 | do_trap(trapnr, signr, str, regs, error_code, |
302 | fill_trap_info(regs, signr, trapnr, &info)); | |
dff0796e | 303 | } |
dff0796e ON |
304 | } |
305 | ||
b5964405 | 306 | #define DO_ERROR(trapnr, signr, str, name) \ |
e407d620 | 307 | dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \ |
b5964405 | 308 | { \ |
1c326c4d | 309 | do_error_trap(regs, error_code, str, trapnr, signr); \ |
1da177e4 LT |
310 | } |
311 | ||
0eb14833 ON |
312 | DO_ERROR(X86_TRAP_DE, SIGFPE, "divide error", divide_error) |
313 | DO_ERROR(X86_TRAP_OF, SIGSEGV, "overflow", overflow) | |
0eb14833 ON |
314 | DO_ERROR(X86_TRAP_UD, SIGILL, "invalid opcode", invalid_op) |
315 | DO_ERROR(X86_TRAP_OLD_MF, SIGFPE, "coprocessor segment overrun",coprocessor_segment_overrun) | |
316 | DO_ERROR(X86_TRAP_TS, SIGSEGV, "invalid TSS", invalid_TSS) | |
317 | DO_ERROR(X86_TRAP_NP, SIGBUS, "segment not present", segment_not_present) | |
0eb14833 | 318 | DO_ERROR(X86_TRAP_SS, SIGBUS, "stack segment", stack_segment) |
0eb14833 | 319 | DO_ERROR(X86_TRAP_AC, SIGBUS, "alignment check", alignment_check) |
1da177e4 | 320 | |
e37e43a4 | 321 | #ifdef CONFIG_VMAP_STACK |
6271cfdf AL |
322 | __visible void __noreturn handle_stack_overflow(const char *message, |
323 | struct pt_regs *regs, | |
324 | unsigned long fault_address) | |
e37e43a4 AL |
325 | { |
326 | printk(KERN_EMERG "BUG: stack guard page was hit at %p (stack is %p..%p)\n", | |
327 | (void *)fault_address, current->stack, | |
328 | (char *)current->stack + THREAD_SIZE - 1); | |
329 | die(message, regs, 0); | |
330 | ||
331 | /* Be absolutely certain we don't return. */ | |
332 | panic(message); | |
333 | } | |
334 | #endif | |
335 | ||
081f75bb AH |
336 | #ifdef CONFIG_X86_64 |
337 | /* Runs on IST stack */ | |
081f75bb AH |
338 | dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code) |
339 | { | |
340 | static const char str[] = "double fault"; | |
341 | struct task_struct *tsk = current; | |
e37e43a4 AL |
342 | #ifdef CONFIG_VMAP_STACK |
343 | unsigned long cr2; | |
344 | #endif | |
081f75bb | 345 | |
af726f21 AL |
346 | #ifdef CONFIG_X86_ESPFIX64 |
347 | extern unsigned char native_irq_return_iret[]; | |
348 | ||
349 | /* | |
350 | * If IRET takes a non-IST fault on the espfix64 stack, then we | |
6d9256f0 AL |
351 | * end up promoting it to a doublefault. In that case, take |
352 | * advantage of the fact that we're not using the normal (TSS.sp0) | |
353 | * stack right now. We can write a fake #GP(0) frame at TSS.sp0 | |
354 | * and then modify our own IRET frame so that, when we return, | |
355 | * we land directly at the #GP(0) vector with the stack already | |
356 | * set up according to its expectations. | |
357 | * | |
358 | * The net result is that our #GP handler will think that we | |
359 | * entered from usermode with the bad user context. | |
95927475 AL |
360 | * |
361 | * No need for ist_enter here because we don't use RCU. | |
af726f21 AL |
362 | */ |
363 | if (((long)regs->sp >> PGDIR_SHIFT) == ESPFIX_PGD_ENTRY && | |
364 | regs->cs == __KERNEL_CS && | |
365 | regs->ip == (unsigned long)native_irq_return_iret) | |
366 | { | |
6d9256f0 AL |
367 | struct pt_regs *gpregs = (struct pt_regs *)this_cpu_read(cpu_tss.x86_tss.sp0) - 1; |
368 | ||
369 | /* | |
370 | * regs->sp points to the failing IRET frame on the | |
371 | * ESPFIX64 stack. Copy it to the entry stack. This fills | |
372 | * in gpregs->ss through gpregs->ip. | |
373 | * | |
374 | */ | |
375 | memmove(&gpregs->ip, (void *)regs->sp, 5*8); | |
376 | gpregs->orig_ax = 0; /* Missing (lost) #GP error code */ | |
af726f21 | 377 | |
6d9256f0 AL |
378 | /* |
379 | * Adjust our frame so that we return straight to the #GP | |
380 | * vector with the expected RSP value. This is safe because | |
381 | * we won't enable interupts or schedule before we invoke | |
382 | * general_protection, so nothing will clobber the stack | |
383 | * frame we just set up. | |
384 | */ | |
af726f21 | 385 | regs->ip = (unsigned long)general_protection; |
6d9256f0 | 386 | regs->sp = (unsigned long)&gpregs->orig_ax; |
95927475 | 387 | |
af726f21 AL |
388 | return; |
389 | } | |
390 | #endif | |
391 | ||
8c84014f | 392 | ist_enter(regs); |
c9408265 | 393 | notify_die(DIE_TRAP, str, regs, error_code, X86_TRAP_DF, SIGSEGV); |
081f75bb AH |
394 | |
395 | tsk->thread.error_code = error_code; | |
51e7dc70 | 396 | tsk->thread.trap_nr = X86_TRAP_DF; |
081f75bb | 397 | |
e37e43a4 AL |
398 | #ifdef CONFIG_VMAP_STACK |
399 | /* | |
400 | * If we overflow the stack into a guard page, the CPU will fail | |
401 | * to deliver #PF and will send #DF instead. Similarly, if we | |
402 | * take any non-IST exception while too close to the bottom of | |
403 | * the stack, the processor will get a page fault while | |
404 | * delivering the exception and will generate a double fault. | |
405 | * | |
406 | * According to the SDM (footnote in 6.15 under "Interrupt 14 - | |
407 | * Page-Fault Exception (#PF): | |
408 | * | |
409 | * Processors update CR2 whenever a page fault is detected. If a | |
410 | * second page fault occurs while an earlier page fault is being | |
6d9256f0 | 411 | * delivered, the faulting linear address of the second fault will |
e37e43a4 AL |
412 | * overwrite the contents of CR2 (replacing the previous |
413 | * address). These updates to CR2 occur even if the page fault | |
414 | * results in a double fault or occurs during the delivery of a | |
415 | * double fault. | |
416 | * | |
417 | * The logic below has a small possibility of incorrectly diagnosing | |
418 | * some errors as stack overflows. For example, if the IDT or GDT | |
419 | * gets corrupted such that #GP delivery fails due to a bad descriptor | |
420 | * causing #GP and we hit this condition while CR2 coincidentally | |
421 | * points to the stack guard page, we'll think we overflowed the | |
422 | * stack. Given that we're going to panic one way or another | |
423 | * if this happens, this isn't necessarily worth fixing. | |
424 | * | |
425 | * If necessary, we could improve the test by only diagnosing | |
426 | * a stack overflow if the saved RSP points within 47 bytes of | |
427 | * the bottom of the stack: if RSP == tsk_stack + 48 and we | |
428 | * take an exception, the stack is already aligned and there | |
429 | * will be enough room SS, RSP, RFLAGS, CS, RIP, and a | |
430 | * possible error code, so a stack overflow would *not* double | |
431 | * fault. With any less space left, exception delivery could | |
432 | * fail, and, as a practical matter, we've overflowed the | |
433 | * stack even if the actual trigger for the double fault was | |
434 | * something else. | |
435 | */ | |
436 | cr2 = read_cr2(); | |
437 | if ((unsigned long)task_stack_page(tsk) - 1 - cr2 < PAGE_SIZE) | |
438 | handle_stack_overflow("kernel stack overflow (double-fault)", regs, cr2); | |
439 | #endif | |
440 | ||
4d067d8e BP |
441 | #ifdef CONFIG_DOUBLEFAULT |
442 | df_debug(regs, error_code); | |
443 | #endif | |
bd8b96df IM |
444 | /* |
445 | * This is always a kernel trap and never fixable (and thus must | |
446 | * never return). | |
447 | */ | |
081f75bb AH |
448 | for (;;) |
449 | die(str, regs, error_code); | |
450 | } | |
451 | #endif | |
452 | ||
fe3d197f DH |
453 | dotraplinkage void do_bounds(struct pt_regs *regs, long error_code) |
454 | { | |
1126cb45 | 455 | const struct mpx_bndcsr *bndcsr; |
fe3d197f DH |
456 | siginfo_t *info; |
457 | ||
5778077d | 458 | RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU"); |
fe3d197f DH |
459 | if (notify_die(DIE_TRAP, "bounds", regs, error_code, |
460 | X86_TRAP_BR, SIGSEGV) == NOTIFY_STOP) | |
8c84014f | 461 | return; |
d99e1bd1 | 462 | cond_local_irq_enable(regs); |
fe3d197f | 463 | |
f39b6f0e | 464 | if (!user_mode(regs)) |
fe3d197f DH |
465 | die("bounds", regs, error_code); |
466 | ||
467 | if (!cpu_feature_enabled(X86_FEATURE_MPX)) { | |
468 | /* The exception is not from Intel MPX */ | |
469 | goto exit_trap; | |
470 | } | |
471 | ||
472 | /* | |
473 | * We need to look at BNDSTATUS to resolve this exception. | |
a84eeaa9 DH |
474 | * A NULL here might mean that it is in its 'init state', |
475 | * which is all zeros which indicates MPX was not | |
476 | * responsible for the exception. | |
fe3d197f | 477 | */ |
d91cab78 | 478 | bndcsr = get_xsave_field_ptr(XFEATURE_MASK_BNDCSR); |
fe3d197f DH |
479 | if (!bndcsr) |
480 | goto exit_trap; | |
481 | ||
e7126cf5 | 482 | trace_bounds_exception_mpx(bndcsr); |
fe3d197f DH |
483 | /* |
484 | * The error code field of the BNDSTATUS register communicates status | |
485 | * information of a bound range exception #BR or operation involving | |
486 | * bound directory. | |
487 | */ | |
488 | switch (bndcsr->bndstatus & MPX_BNDSTA_ERROR_CODE) { | |
489 | case 2: /* Bound directory has invalid entry. */ | |
46a6e0cf | 490 | if (mpx_handle_bd_fault()) |
fe3d197f DH |
491 | goto exit_trap; |
492 | break; /* Success, it was handled */ | |
493 | case 1: /* Bound violation. */ | |
46a6e0cf | 494 | info = mpx_generate_siginfo(regs); |
e10abb2f | 495 | if (IS_ERR(info)) { |
fe3d197f DH |
496 | /* |
497 | * We failed to decode the MPX instruction. Act as if | |
498 | * the exception was not caused by MPX. | |
499 | */ | |
500 | goto exit_trap; | |
501 | } | |
502 | /* | |
503 | * Success, we decoded the instruction and retrieved | |
504 | * an 'info' containing the address being accessed | |
505 | * which caused the exception. This information | |
506 | * allows and application to possibly handle the | |
507 | * #BR exception itself. | |
508 | */ | |
509 | do_trap(X86_TRAP_BR, SIGSEGV, "bounds", regs, error_code, info); | |
510 | kfree(info); | |
511 | break; | |
512 | case 0: /* No exception caused by Intel MPX operations. */ | |
513 | goto exit_trap; | |
514 | default: | |
515 | die("bounds", regs, error_code); | |
516 | } | |
517 | ||
fe3d197f | 518 | return; |
8c84014f | 519 | |
fe3d197f DH |
520 | exit_trap: |
521 | /* | |
522 | * This path out is for all the cases where we could not | |
523 | * handle the exception in some way (like allocating a | |
524 | * table or telling userspace about it. We will also end | |
525 | * up here if the kernel has MPX turned off at compile | |
526 | * time.. | |
527 | */ | |
528 | do_trap(X86_TRAP_BR, SIGSEGV, "bounds", regs, error_code, NULL); | |
fe3d197f DH |
529 | } |
530 | ||
9326638c | 531 | dotraplinkage void |
13485ab5 | 532 | do_general_protection(struct pt_regs *regs, long error_code) |
1da177e4 | 533 | { |
13485ab5 | 534 | struct task_struct *tsk; |
b5964405 | 535 | |
5778077d | 536 | RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU"); |
d99e1bd1 | 537 | cond_local_irq_enable(regs); |
c6df0d71 | 538 | |
d74ef111 | 539 | if (v8086_mode(regs)) { |
ef3f6288 FW |
540 | local_irq_enable(); |
541 | handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code); | |
8c84014f | 542 | return; |
ef3f6288 | 543 | } |
1da177e4 | 544 | |
13485ab5 | 545 | tsk = current; |
55474c48 | 546 | if (!user_mode(regs)) { |
548acf19 | 547 | if (fixup_exception(regs, X86_TRAP_GP)) |
8c84014f | 548 | return; |
ef3f6288 FW |
549 | |
550 | tsk->thread.error_code = error_code; | |
551 | tsk->thread.trap_nr = X86_TRAP_GP; | |
6ba3c97a FW |
552 | if (notify_die(DIE_GPF, "general protection fault", regs, error_code, |
553 | X86_TRAP_GP, SIGSEGV) != NOTIFY_STOP) | |
ef3f6288 | 554 | die("general protection fault", regs, error_code); |
8c84014f | 555 | return; |
ef3f6288 | 556 | } |
1da177e4 | 557 | |
13485ab5 | 558 | tsk->thread.error_code = error_code; |
51e7dc70 | 559 | tsk->thread.trap_nr = X86_TRAP_GP; |
b5964405 | 560 | |
13485ab5 AH |
561 | if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) && |
562 | printk_ratelimit()) { | |
c767a54b | 563 | pr_info("%s[%d] general protection ip:%lx sp:%lx error:%lx", |
13485ab5 AH |
564 | tsk->comm, task_pid_nr(tsk), |
565 | regs->ip, regs->sp, error_code); | |
1c99a687 | 566 | print_vma_addr(KERN_CONT " in ", regs->ip); |
c767a54b | 567 | pr_cont("\n"); |
03252919 | 568 | } |
abd4f750 | 569 | |
38cad57b | 570 | force_sig_info(SIGSEGV, SEND_SIG_PRIV, tsk); |
1da177e4 | 571 | } |
9326638c | 572 | NOKPROBE_SYMBOL(do_general_protection); |
1da177e4 | 573 | |
c1d518c8 | 574 | /* May run on IST stack. */ |
9326638c | 575 | dotraplinkage void notrace do_int3(struct pt_regs *regs, long error_code) |
1da177e4 | 576 | { |
08d636b6 | 577 | #ifdef CONFIG_DYNAMIC_FTRACE |
a192cd04 SR |
578 | /* |
579 | * ftrace must be first, everything else may cause a recursive crash. | |
580 | * See note by declaration of modifying_ftrace_code in ftrace.c | |
581 | */ | |
582 | if (unlikely(atomic_read(&modifying_ftrace_code)) && | |
583 | ftrace_int3_handler(regs)) | |
08d636b6 SR |
584 | return; |
585 | #endif | |
17f41571 JK |
586 | if (poke_int3_handler(regs)) |
587 | return; | |
588 | ||
8c84014f | 589 | ist_enter(regs); |
5778077d | 590 | RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU"); |
f503b5ae | 591 | #ifdef CONFIG_KGDB_LOW_LEVEL_TRAP |
c9408265 KC |
592 | if (kgdb_ll_trap(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP, |
593 | SIGTRAP) == NOTIFY_STOP) | |
6ba3c97a | 594 | goto exit; |
f503b5ae | 595 | #endif /* CONFIG_KGDB_LOW_LEVEL_TRAP */ |
cc3a1bf5 | 596 | |
6f6343f5 MH |
597 | #ifdef CONFIG_KPROBES |
598 | if (kprobe_int3_handler(regs)) | |
4cdf77a8 | 599 | goto exit; |
6f6343f5 MH |
600 | #endif |
601 | ||
c9408265 KC |
602 | if (notify_die(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP, |
603 | SIGTRAP) == NOTIFY_STOP) | |
6ba3c97a | 604 | goto exit; |
b5964405 | 605 | |
42181186 SR |
606 | /* |
607 | * Let others (NMI) know that the debug stack is in use | |
608 | * as we may switch to the interrupt stack. | |
609 | */ | |
610 | debug_stack_usage_inc(); | |
d99e1bd1 | 611 | cond_local_irq_enable(regs); |
c9408265 | 612 | do_trap(X86_TRAP_BP, SIGTRAP, "int3", regs, error_code, NULL); |
d99e1bd1 | 613 | cond_local_irq_disable(regs); |
42181186 | 614 | debug_stack_usage_dec(); |
6ba3c97a | 615 | exit: |
8c84014f | 616 | ist_exit(regs); |
1da177e4 | 617 | } |
9326638c | 618 | NOKPROBE_SYMBOL(do_int3); |
1da177e4 | 619 | |
081f75bb | 620 | #ifdef CONFIG_X86_64 |
bd8b96df | 621 | /* |
48e08d0f AL |
622 | * Help handler running on IST stack to switch off the IST stack if the |
623 | * interrupted code was in user mode. The actual stack switch is done in | |
624 | * entry_64.S | |
bd8b96df | 625 | */ |
7ddc6a21 | 626 | asmlinkage __visible notrace struct pt_regs *sync_regs(struct pt_regs *eregs) |
081f75bb | 627 | { |
48e08d0f AL |
628 | struct pt_regs *regs = task_pt_regs(current); |
629 | *regs = *eregs; | |
081f75bb AH |
630 | return regs; |
631 | } | |
9326638c | 632 | NOKPROBE_SYMBOL(sync_regs); |
b645af2d AL |
633 | |
634 | struct bad_iret_stack { | |
635 | void *error_entry_ret; | |
636 | struct pt_regs regs; | |
637 | }; | |
638 | ||
7ddc6a21 | 639 | asmlinkage __visible notrace |
b645af2d AL |
640 | struct bad_iret_stack *fixup_bad_iret(struct bad_iret_stack *s) |
641 | { | |
642 | /* | |
643 | * This is called from entry_64.S early in handling a fault | |
644 | * caused by a bad iret to user mode. To handle the fault | |
645 | * correctly, we want move our stack frame to task_pt_regs | |
646 | * and we want to pretend that the exception came from the | |
647 | * iret target. | |
648 | */ | |
649 | struct bad_iret_stack *new_stack = | |
650 | container_of(task_pt_regs(current), | |
651 | struct bad_iret_stack, regs); | |
652 | ||
653 | /* Copy the IRET target to the new stack. */ | |
654 | memmove(&new_stack->regs.ip, (void *)s->regs.sp, 5*8); | |
655 | ||
656 | /* Copy the remainder of the stack from the current stack. */ | |
657 | memmove(new_stack, s, offsetof(struct bad_iret_stack, regs.ip)); | |
658 | ||
f39b6f0e | 659 | BUG_ON(!user_mode(&new_stack->regs)); |
b645af2d AL |
660 | return new_stack; |
661 | } | |
7ddc6a21 | 662 | NOKPROBE_SYMBOL(fixup_bad_iret); |
081f75bb AH |
663 | #endif |
664 | ||
f2b37575 AL |
665 | static bool is_sysenter_singlestep(struct pt_regs *regs) |
666 | { | |
667 | /* | |
668 | * We don't try for precision here. If we're anywhere in the region of | |
669 | * code that can be single-stepped in the SYSENTER entry path, then | |
670 | * assume that this is a useless single-step trap due to SYSENTER | |
671 | * being invoked with TF set. (We don't know in advance exactly | |
672 | * which instructions will be hit because BTF could plausibly | |
673 | * be set.) | |
674 | */ | |
675 | #ifdef CONFIG_X86_32 | |
676 | return (regs->ip - (unsigned long)__begin_SYSENTER_singlestep_region) < | |
677 | (unsigned long)__end_SYSENTER_singlestep_region - | |
678 | (unsigned long)__begin_SYSENTER_singlestep_region; | |
679 | #elif defined(CONFIG_IA32_EMULATION) | |
680 | return (regs->ip - (unsigned long)entry_SYSENTER_compat) < | |
681 | (unsigned long)__end_entry_SYSENTER_compat - | |
682 | (unsigned long)entry_SYSENTER_compat; | |
683 | #else | |
684 | return false; | |
685 | #endif | |
686 | } | |
687 | ||
1da177e4 LT |
688 | /* |
689 | * Our handling of the processor debug registers is non-trivial. | |
690 | * We do not clear them on entry and exit from the kernel. Therefore | |
691 | * it is possible to get a watchpoint trap here from inside the kernel. | |
692 | * However, the code in ./ptrace.c has ensured that the user can | |
693 | * only set watchpoints on userspace addresses. Therefore the in-kernel | |
694 | * watchpoint trap can only occur in code which is reading/writing | |
695 | * from user space. Such code must not hold kernel locks (since it | |
696 | * can equally take a page fault), therefore it is safe to call | |
697 | * force_sig_info even though that claims and releases locks. | |
b5964405 | 698 | * |
1da177e4 LT |
699 | * Code in ./signal.c ensures that the debug control register |
700 | * is restored before we deliver any signal, and therefore that | |
701 | * user code runs with the correct debug control register even though | |
702 | * we clear it here. | |
703 | * | |
704 | * Being careful here means that we don't have to be as careful in a | |
705 | * lot of more complicated places (task switching can be a bit lazy | |
706 | * about restoring all the debug state, and ptrace doesn't have to | |
707 | * find every occurrence of the TF bit that could be saved away even | |
708 | * by user code) | |
c1d518c8 AH |
709 | * |
710 | * May run on IST stack. | |
1da177e4 | 711 | */ |
9326638c | 712 | dotraplinkage void do_debug(struct pt_regs *regs, long error_code) |
1da177e4 | 713 | { |
1da177e4 | 714 | struct task_struct *tsk = current; |
a1e80faf | 715 | int user_icebp = 0; |
08d68323 | 716 | unsigned long dr6; |
da654b74 | 717 | int si_code; |
1da177e4 | 718 | |
8c84014f | 719 | ist_enter(regs); |
4cdf77a8 | 720 | |
08d68323 | 721 | get_debugreg(dr6, 6); |
8bb56436 AL |
722 | /* |
723 | * The Intel SDM says: | |
724 | * | |
725 | * Certain debug exceptions may clear bits 0-3. The remaining | |
726 | * contents of the DR6 register are never cleared by the | |
727 | * processor. To avoid confusion in identifying debug | |
728 | * exceptions, debug handlers should clear the register before | |
729 | * returning to the interrupted task. | |
730 | * | |
731 | * Keep it simple: clear DR6 immediately. | |
732 | */ | |
733 | set_debugreg(0, 6); | |
1da177e4 | 734 | |
40f9249a P |
735 | /* Filter out all the reserved bits which are preset to 1 */ |
736 | dr6 &= ~DR6_RESERVED; | |
737 | ||
81edd9f6 AL |
738 | /* |
739 | * The SDM says "The processor clears the BTF flag when it | |
740 | * generates a debug exception." Clear TIF_BLOCKSTEP to keep | |
741 | * TIF_BLOCKSTEP in sync with the hardware BTF flag. | |
742 | */ | |
743 | clear_tsk_thread_flag(tsk, TIF_BLOCKSTEP); | |
744 | ||
f2b37575 AL |
745 | if (unlikely(!user_mode(regs) && (dr6 & DR_STEP) && |
746 | is_sysenter_singlestep(regs))) { | |
747 | dr6 &= ~DR_STEP; | |
748 | if (!dr6) | |
749 | goto exit; | |
750 | /* | |
751 | * else we might have gotten a single-step trap and hit a | |
752 | * watchpoint at the same time, in which case we should fall | |
753 | * through and handle the watchpoint. | |
754 | */ | |
755 | } | |
756 | ||
a1e80faf FW |
757 | /* |
758 | * If dr6 has no reason to give us about the origin of this trap, | |
759 | * then it's very likely the result of an icebp/int01 trap. | |
760 | * User wants a sigtrap for that. | |
761 | */ | |
f39b6f0e | 762 | if (!dr6 && user_mode(regs)) |
a1e80faf FW |
763 | user_icebp = 1; |
764 | ||
f2b37575 | 765 | /* Catch kmemcheck conditions! */ |
eadb8a09 | 766 | if ((dr6 & DR_STEP) && kmemcheck_trap(regs)) |
6ba3c97a | 767 | goto exit; |
f8561296 | 768 | |
08d68323 P |
769 | /* Store the virtualized DR6 value */ |
770 | tsk->thread.debugreg6 = dr6; | |
771 | ||
6f6343f5 MH |
772 | #ifdef CONFIG_KPROBES |
773 | if (kprobe_debug_handler(regs)) | |
774 | goto exit; | |
775 | #endif | |
776 | ||
5a802e15 | 777 | if (notify_die(DIE_DEBUG, "debug", regs, (long)&dr6, error_code, |
62edab90 | 778 | SIGTRAP) == NOTIFY_STOP) |
6ba3c97a | 779 | goto exit; |
3d2a71a5 | 780 | |
42181186 SR |
781 | /* |
782 | * Let others (NMI) know that the debug stack is in use | |
783 | * as we may switch to the interrupt stack. | |
784 | */ | |
785 | debug_stack_usage_inc(); | |
786 | ||
1da177e4 | 787 | /* It's safe to allow irq's after DR6 has been saved */ |
d99e1bd1 | 788 | cond_local_irq_enable(regs); |
1da177e4 | 789 | |
d74ef111 | 790 | if (v8086_mode(regs)) { |
c9408265 KC |
791 | handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, |
792 | X86_TRAP_DB); | |
d99e1bd1 | 793 | cond_local_irq_disable(regs); |
42181186 | 794 | debug_stack_usage_dec(); |
6ba3c97a | 795 | goto exit; |
1da177e4 LT |
796 | } |
797 | ||
f2b37575 AL |
798 | if (WARN_ON_ONCE((dr6 & DR_STEP) && !user_mode(regs))) { |
799 | /* | |
800 | * Historical junk that used to handle SYSENTER single-stepping. | |
801 | * This should be unreachable now. If we survive for a while | |
802 | * without anyone hitting this warning, we'll turn this into | |
803 | * an oops. | |
804 | */ | |
08d68323 P |
805 | tsk->thread.debugreg6 &= ~DR_STEP; |
806 | set_tsk_thread_flag(tsk, TIF_SINGLESTEP); | |
807 | regs->flags &= ~X86_EFLAGS_TF; | |
1da177e4 | 808 | } |
08d68323 | 809 | si_code = get_si_code(tsk->thread.debugreg6); |
a1e80faf | 810 | if (tsk->thread.debugreg6 & (DR_STEP | DR_TRAP_BITS) || user_icebp) |
08d68323 | 811 | send_sigtrap(tsk, regs, error_code, si_code); |
d99e1bd1 | 812 | cond_local_irq_disable(regs); |
42181186 | 813 | debug_stack_usage_dec(); |
1da177e4 | 814 | |
6ba3c97a | 815 | exit: |
2a41aa4f AL |
816 | /* |
817 | * This is the most likely code path that involves non-trivial use | |
818 | * of the SYSENTER stack. Check that we haven't overrun it. | |
819 | */ | |
820 | WARN(this_cpu_read(cpu_tss.SYSENTER_stack_canary) != STACK_END_MAGIC, | |
821 | "Overran or corrupted SYSENTER stack\n"); | |
1a79797b | 822 | |
8c84014f | 823 | ist_exit(regs); |
1da177e4 | 824 | } |
9326638c | 825 | NOKPROBE_SYMBOL(do_debug); |
1da177e4 LT |
826 | |
827 | /* | |
828 | * Note that we play around with the 'TS' bit in an attempt to get | |
829 | * the correct behaviour even in the presence of the asynchronous | |
830 | * IRQ13 behaviour | |
831 | */ | |
5e1b05be | 832 | static void math_error(struct pt_regs *regs, int error_code, int trapnr) |
1da177e4 | 833 | { |
e2e75c91 | 834 | struct task_struct *task = current; |
e1cebad4 | 835 | struct fpu *fpu = &task->thread.fpu; |
1da177e4 | 836 | siginfo_t info; |
c9408265 KC |
837 | char *str = (trapnr == X86_TRAP_MF) ? "fpu exception" : |
838 | "simd exception"; | |
e2e75c91 BG |
839 | |
840 | if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, SIGFPE) == NOTIFY_STOP) | |
841 | return; | |
d99e1bd1 | 842 | cond_local_irq_enable(regs); |
e2e75c91 | 843 | |
e1cebad4 | 844 | if (!user_mode(regs)) { |
548acf19 | 845 | if (!fixup_exception(regs, trapnr)) { |
e2e75c91 | 846 | task->thread.error_code = error_code; |
51e7dc70 | 847 | task->thread.trap_nr = trapnr; |
e2e75c91 BG |
848 | die(str, regs, error_code); |
849 | } | |
850 | return; | |
851 | } | |
1da177e4 LT |
852 | |
853 | /* | |
854 | * Save the info for the exception handler and clear the error. | |
855 | */ | |
e1cebad4 IM |
856 | fpu__save(fpu); |
857 | ||
858 | task->thread.trap_nr = trapnr; | |
9b6dba9e | 859 | task->thread.error_code = error_code; |
e1cebad4 IM |
860 | info.si_signo = SIGFPE; |
861 | info.si_errno = 0; | |
862 | info.si_addr = (void __user *)uprobe_get_trap_addr(regs); | |
adf77bac | 863 | |
e1cebad4 | 864 | info.si_code = fpu__exception_code(fpu, trapnr); |
adf77bac | 865 | |
e1cebad4 IM |
866 | /* Retry when we get spurious exceptions: */ |
867 | if (!info.si_code) | |
c9408265 | 868 | return; |
e1cebad4 | 869 | |
1da177e4 LT |
870 | force_sig_info(SIGFPE, &info, task); |
871 | } | |
872 | ||
e407d620 | 873 | dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code) |
1da177e4 | 874 | { |
5778077d | 875 | RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU"); |
c9408265 | 876 | math_error(regs, error_code, X86_TRAP_MF); |
1da177e4 LT |
877 | } |
878 | ||
e407d620 AH |
879 | dotraplinkage void |
880 | do_simd_coprocessor_error(struct pt_regs *regs, long error_code) | |
1da177e4 | 881 | { |
5778077d | 882 | RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU"); |
c9408265 | 883 | math_error(regs, error_code, X86_TRAP_XF); |
1da177e4 LT |
884 | } |
885 | ||
e407d620 AH |
886 | dotraplinkage void |
887 | do_spurious_interrupt_bug(struct pt_regs *regs, long error_code) | |
1da177e4 | 888 | { |
d99e1bd1 | 889 | cond_local_irq_enable(regs); |
081f75bb AH |
890 | } |
891 | ||
9326638c | 892 | dotraplinkage void |
aa78bcfa | 893 | do_device_not_available(struct pt_regs *regs, long error_code) |
7643e9b9 | 894 | { |
bef8b6da AL |
895 | unsigned long cr0; |
896 | ||
5778077d | 897 | RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU"); |
304bceda | 898 | |
a334fe43 | 899 | #ifdef CONFIG_MATH_EMULATION |
c6ab109f | 900 | if (!boot_cpu_has(X86_FEATURE_FPU) && (read_cr0() & X86_CR0_EM)) { |
d315760f TH |
901 | struct math_emu_info info = { }; |
902 | ||
d99e1bd1 | 903 | cond_local_irq_enable(regs); |
d315760f | 904 | |
aa78bcfa | 905 | info.regs = regs; |
d315760f | 906 | math_emulate(&info); |
a334fe43 | 907 | return; |
7643e9b9 | 908 | } |
a334fe43 | 909 | #endif |
bef8b6da AL |
910 | |
911 | /* This should not happen. */ | |
912 | cr0 = read_cr0(); | |
913 | if (WARN(cr0 & X86_CR0_TS, "CR0.TS was set")) { | |
914 | /* Try to fix it up and carry on. */ | |
915 | write_cr0(cr0 & ~X86_CR0_TS); | |
916 | } else { | |
917 | /* | |
918 | * Something terrible happened, and we're better off trying | |
919 | * to kill the task than getting stuck in a never-ending | |
920 | * loop of #NM faults. | |
921 | */ | |
922 | die("unexpected #NM exception", regs, error_code); | |
923 | } | |
7643e9b9 | 924 | } |
9326638c | 925 | NOKPROBE_SYMBOL(do_device_not_available); |
7643e9b9 | 926 | |
081f75bb | 927 | #ifdef CONFIG_X86_32 |
e407d620 | 928 | dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code) |
f8e0870f AH |
929 | { |
930 | siginfo_t info; | |
6ba3c97a | 931 | |
5778077d | 932 | RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU"); |
f8e0870f AH |
933 | local_irq_enable(); |
934 | ||
935 | info.si_signo = SIGILL; | |
936 | info.si_errno = 0; | |
937 | info.si_code = ILL_BADSTK; | |
fc6fcdfb | 938 | info.si_addr = NULL; |
c9408265 | 939 | if (notify_die(DIE_TRAP, "iret exception", regs, error_code, |
6ba3c97a FW |
940 | X86_TRAP_IRET, SIGILL) != NOTIFY_STOP) { |
941 | do_trap(X86_TRAP_IRET, SIGILL, "iret exception", regs, error_code, | |
942 | &info); | |
943 | } | |
f8e0870f | 944 | } |
081f75bb | 945 | #endif |
f8e0870f | 946 | |
1da177e4 LT |
947 | void __init trap_init(void) |
948 | { | |
b70543a0 | 949 | idt_setup_traps(); |
bb3f0b59 | 950 | |
4eefbe79 KC |
951 | /* |
952 | * Set the IDT descriptor to a fixed read-only location, so that the | |
953 | * "sidt" instruction will not leak the location of the kernel, and | |
954 | * to defend the IDT against arbitrary memory write vulnerabilities. | |
955 | * It will be reloaded in cpu_init() */ | |
956 | __set_fixmap(FIX_RO_IDT, __pa_symbol(idt_table), PAGE_KERNEL_RO); | |
957 | idt_descr.address = fix_to_virt(FIX_RO_IDT); | |
958 | ||
1da177e4 | 959 | /* |
b5964405 | 960 | * Should be a barrier for any external CPU state: |
1da177e4 LT |
961 | */ |
962 | cpu_init(); | |
963 | ||
90f6225f | 964 | idt_setup_ist_traps(); |
b4d83270 | 965 | |
428cf902 | 966 | x86_init.irqs.trap_init(); |
228bdaa9 | 967 | |
0a30908b | 968 | idt_setup_debugidt_traps(); |
1da177e4 | 969 | } |