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b2441318 1/* SPDX-License-Identifier: GPL-2.0 */
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2/*
3 * ld script for the x86 kernel
4 *
5 * Historic 32-bit version written by Martin Mares <mj@atrey.karlin.mff.cuni.cz>
6 *
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7 * Modernisation, unification and other changes and fixes:
8 * Copyright (C) 2007-2009 Sam Ravnborg <sam@ravnborg.org>
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9 *
10 *
11 * Don't define absolute symbols until and unless you know that symbol
12 * value is should remain constant even if kernel image is relocated
13 * at run time. Absolute symbols are not relocated. If symbol value should
14 * change if kernel is relocated, make the symbol section relative and
15 * put it inside the section definition.
16 */
17
18#ifdef CONFIG_X86_32
19#define LOAD_OFFSET __PAGE_OFFSET
20#else
21#define LOAD_OFFSET __START_KERNEL_map
22#endif
23
24#include <asm-generic/vmlinux.lds.h>
25#include <asm/asm-offsets.h>
26#include <asm/thread_info.h>
27#include <asm/page_types.h>
ee9f8fce 28#include <asm/orc_lookup.h>
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29#include <asm/cache.h>
30#include <asm/boot.h>
31
32#undef i386 /* in case the preprocessor is a 32bit one */
33
34OUTPUT_FORMAT(CONFIG_OUTPUT_FORMAT, CONFIG_OUTPUT_FORMAT, CONFIG_OUTPUT_FORMAT)
35
36#ifdef CONFIG_X86_32
37OUTPUT_ARCH(i386)
38ENTRY(phys_startup_32)
6b35eb9d 39jiffies = jiffies_64;
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40#else
41OUTPUT_ARCH(i386:x86-64)
42ENTRY(phys_startup_64)
6b35eb9d 43jiffies_64 = jiffies;
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44#endif
45
9ccaf77c 46#if defined(CONFIG_X86_64)
d6cc1c3a 47/*
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48 * On 64-bit, align RODATA to 2MB so we retain large page mappings for
49 * boundaries spanning kernel text, rodata and data sections.
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50 *
51 * However, kernel identity mappings will have different RWX permissions
52 * to the pages mapping to text and to the pages padding (which are freed) the
53 * text section. Hence kernel identity mappings will be broken to smaller
54 * pages. For 64-bit, kernel text and kernel identity mappings are different,
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55 * so we can enable protection checks as well as retain 2MB large page
56 * mappings for kernel text.
d6cc1c3a 57 */
9ccaf77c 58#define X64_ALIGN_RODATA_BEGIN . = ALIGN(HPAGE_SIZE);
74e08179 59
9ccaf77c 60#define X64_ALIGN_RODATA_END \
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61 . = ALIGN(HPAGE_SIZE); \
62 __end_rodata_hpage_align = .;
63
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64#define ALIGN_ENTRY_TEXT_BEGIN . = ALIGN(PMD_SIZE);
65#define ALIGN_ENTRY_TEXT_END . = ALIGN(PMD_SIZE);
66
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67#else
68
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69#define X64_ALIGN_RODATA_BEGIN
70#define X64_ALIGN_RODATA_END
74e08179 71
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72#define ALIGN_ENTRY_TEXT_BEGIN
73#define ALIGN_ENTRY_TEXT_END
74
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75#endif
76
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77PHDRS {
78 text PT_LOAD FLAGS(5); /* R_E */
5bd5a452 79 data PT_LOAD FLAGS(6); /* RW_ */
afb8095a 80#ifdef CONFIG_X86_64
afb8095a 81#ifdef CONFIG_SMP
8d0cc631 82 percpu PT_LOAD FLAGS(6); /* RW_ */
afb8095a 83#endif
c62e4320 84 init PT_LOAD FLAGS(7); /* RWE */
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85#endif
86 note PT_NOTE FLAGS(0); /* ___ */
87}
17ce265d 88
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89SECTIONS
90{
91#ifdef CONFIG_X86_32
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92 . = LOAD_OFFSET + LOAD_PHYSICAL_ADDR;
93 phys_startup_32 = ABSOLUTE(startup_32 - LOAD_OFFSET);
444e0ae4 94#else
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95 . = __START_KERNEL;
96 phys_startup_64 = ABSOLUTE(startup_64 - LOAD_OFFSET);
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97#endif
98
dfc20895 99 /* Text and read-only data */
dfc20895 100 .text : AT(ADDR(.text) - LOAD_OFFSET) {
4ae59b91 101 _text = .;
e728f61c 102 _stext = .;
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103 /* bootstrapping code */
104 HEAD_TEXT
dfc20895 105 . = ALIGN(8);
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106 TEXT_TEXT
107 SCHED_TEXT
6727ad9e 108 CPUIDLE_TEXT
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109 LOCK_TEXT
110 KPROBES_TEXT
2f7412ba 111 ALIGN_ENTRY_TEXT_BEGIN
ea714547 112 ENTRY_TEXT
dfc20895 113 IRQENTRY_TEXT
2f7412ba 114 ALIGN_ENTRY_TEXT_END
be7635e7 115 SOFTIRQENTRY_TEXT
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116 *(.fixup)
117 *(.gnu.warning)
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118
119#ifdef CONFIG_X86_64
120 . = ALIGN(PAGE_SIZE);
121 _entry_trampoline = .;
122 *(.entry_trampoline)
123 . = ALIGN(PAGE_SIZE);
124 ASSERT(. - _entry_trampoline == PAGE_SIZE, "entry trampoline is too big");
125#endif
126
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127#ifdef CONFIG_RETPOLINE
128 __indirect_thunk_start = .;
129 *(.text.__x86.indirect_thunk)
130 __indirect_thunk_end = .;
131#endif
132
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133 /* End of text section */
134 _etext = .;
135 } :text = 0x9090
136
137 NOTES :text :note
138
123f3e1d 139 EXCEPTION_TABLE(16) :text = 0x9090
448bc3ab 140
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141 /* .text should occupy whole number of pages */
142 . = ALIGN(PAGE_SIZE);
9ccaf77c 143 X64_ALIGN_RODATA_BEGIN
c62e4320 144 RO_DATA(PAGE_SIZE)
9ccaf77c 145 X64_ALIGN_RODATA_END
448bc3ab 146
1f6397ba 147 /* Data */
1f6397ba 148 .data : AT(ADDR(.data) - LOAD_OFFSET) {
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149 /* Start of data section */
150 _sdata = .;
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151
152 /* init_task */
153 INIT_TASK_DATA(THREAD_SIZE)
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154
155#ifdef CONFIG_X86_32
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156 /* 32 bit has nosave before _edata */
157 NOSAVE_DATA
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158#endif
159
c62e4320 160 PAGE_ALIGNED_DATA(PAGE_SIZE)
1f6397ba 161
350f8f56 162 CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES)
1f6397ba 163
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164 DATA_DATA
165 CONSTRUCTORS
166
167 /* rarely changed data like cpu maps */
350f8f56 168 READ_MOSTLY_DATA(INTERNODE_CACHE_BYTES)
1f6397ba 169
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170 /* End of data section */
171 _edata = .;
c62e4320 172 } :data
1f6397ba 173
b5effd38 174 BUG_TABLE
ff6f87e1 175
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176 ORC_UNWIND_TABLE
177
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178 . = ALIGN(PAGE_SIZE);
179 __vvar_page = .;
180
181 .vvar : AT(ADDR(.vvar) - LOAD_OFFSET) {
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182 /* work around gold bug 13023 */
183 __vvar_beginning_hack = .;
9c40818d 184
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185 /* Place all vvars at the offsets in asm/vvar.h. */
186#define EMIT_VVAR(name, offset) \
187 . = __vvar_beginning_hack + offset; \
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188 *(.vvar_ ## name)
189#define __VVAR_KERNEL_LDS
190#include <asm/vvar.h>
191#undef __VVAR_KERNEL_LDS
192#undef EMIT_VVAR
193
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194 /*
195 * Pad the rest of the page with zeros. Otherwise the loader
196 * can leave garbage here.
197 */
198 . = __vvar_beginning_hack + PAGE_SIZE;
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199 } :data
200
201 . = ALIGN(__vvar_page + PAGE_SIZE, PAGE_SIZE);
202
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203 /* Init code and data - will be freed after init */
204 . = ALIGN(PAGE_SIZE);
205 .init.begin : AT(ADDR(.init.begin) - LOAD_OFFSET) {
206 __init_begin = .; /* paired with __init_end */
e58bdaa8 207 }
e58bdaa8 208
c62e4320 209#if defined(CONFIG_X86_64) && defined(CONFIG_SMP)
e58bdaa8 210 /*
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211 * percpu offsets are zero-based on SMP. PERCPU_VADDR() changes the
212 * output PHDR, so the next output section - .init.text - should
213 * start another segment - init.
e58bdaa8 214 */
19df0c2f 215 PERCPU_VADDR(INTERNODE_CACHE_BYTES, 0, :percpu)
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216 ASSERT(SIZEOF(.data..percpu) < CONFIG_PHYSICAL_START,
217 "per-CPU data too large - increase CONFIG_PHYSICAL_START")
c62e4320 218#endif
e58bdaa8 219
123f3e1d 220 INIT_TEXT_SECTION(PAGE_SIZE)
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221#ifdef CONFIG_X86_64
222 :init
223#endif
e58bdaa8 224
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225 /*
226 * Section for code used exclusively before alternatives are run. All
227 * references to such code must be patched out by alternatives, normally
228 * by using X86_FEATURE_ALWAYS CPU feature bit.
229 *
230 * See static_cpu_has() for an example.
231 */
232 .altinstr_aux : AT(ADDR(.altinstr_aux) - LOAD_OFFSET) {
233 *(.altinstr_aux)
234 }
235
123f3e1d 236 INIT_DATA_SECTION(16)
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237
238 .x86_cpu_dev.init : AT(ADDR(.x86_cpu_dev.init) - LOAD_OFFSET) {
239 __x86_cpu_dev_start = .;
240 *(.x86_cpu_dev.init)
241 __x86_cpu_dev_end = .;
242 }
243
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244#ifdef CONFIG_X86_INTEL_MID
245 .x86_intel_mid_dev.init : AT(ADDR(.x86_intel_mid_dev.init) - \
246 LOAD_OFFSET) {
247 __x86_intel_mid_dev_start = .;
248 *(.x86_intel_mid_dev.init)
249 __x86_intel_mid_dev_end = .;
250 }
251#endif
252
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253 /*
254 * start address and size of operations which during runtime
255 * can be patched with virtualization friendly instructions or
256 * baremetal native ones. Think page table operations.
257 * Details in paravirt_types.h
258 */
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259 . = ALIGN(8);
260 .parainstructions : AT(ADDR(.parainstructions) - LOAD_OFFSET) {
261 __parainstructions = .;
262 *(.parainstructions)
263 __parainstructions_end = .;
264 }
265
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266 /*
267 * struct alt_inst entries. From the header (alternative.h):
268 * "Alternative instructions for different CPU types or capabilities"
269 * Think locking instructions on spinlocks.
270 */
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271 . = ALIGN(8);
272 .altinstructions : AT(ADDR(.altinstructions) - LOAD_OFFSET) {
273 __alt_instructions = .;
274 *(.altinstructions)
275 __alt_instructions_end = .;
276 }
277
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278 /*
279 * And here are the replacement instructions. The linker sticks
280 * them as binary blobs. The .altinstructions has enough data to
281 * get the address and the length of them to patch the kernel safely.
282 */
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SR
283 .altinstr_replacement : AT(ADDR(.altinstr_replacement) - LOAD_OFFSET) {
284 *(.altinstr_replacement)
285 }
286
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287 /*
288 * struct iommu_table_entry entries are injected in this section.
289 * It is an array of IOMMUs which during run time gets sorted depending
290 * on its dependency order. After rootfs_initcall is complete
291 * this section can be safely removed.
292 */
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293 .iommu_table : AT(ADDR(.iommu_table) - LOAD_OFFSET) {
294 __iommu_table = .;
295 *(.iommu_table)
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296 __iommu_table_end = .;
297 }
4822b7fc 298
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299 . = ALIGN(8);
300 .apicdrivers : AT(ADDR(.apicdrivers) - LOAD_OFFSET) {
301 __apicdrivers = .;
302 *(.apicdrivers);
303 __apicdrivers_end = .;
304 }
305
7ac41ccf 306 . = ALIGN(8);
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307 /*
308 * .exit.text is discard at runtime, not link time, to deal with
309 * references from .altinstructions and .eh_frame
310 */
311 .exit.text : AT(ADDR(.exit.text) - LOAD_OFFSET) {
312 EXIT_TEXT
313 }
314
315 .exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) {
316 EXIT_DATA
317 }
318
c62e4320 319#if !defined(CONFIG_X86_64) || !defined(CONFIG_SMP)
0415b00d 320 PERCPU_SECTION(INTERNODE_CACHE_BYTES)
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321#endif
322
323 . = ALIGN(PAGE_SIZE);
fd073194 324
9d16e783 325 /* freed after init ends here */
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IM
326 .init.end : AT(ADDR(.init.end) - LOAD_OFFSET) {
327 __init_end = .;
328 }
9d16e783 329
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330 /*
331 * smp_locks might be freed after init
332 * start/end must be page aligned
333 */
334 . = ALIGN(PAGE_SIZE);
335 .smp_locks : AT(ADDR(.smp_locks) - LOAD_OFFSET) {
336 __smp_locks = .;
337 *(.smp_locks)
c62e4320 338 . = ALIGN(PAGE_SIZE);
596b711e 339 __smp_locks_end = .;
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340 }
341
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342#ifdef CONFIG_X86_64
343 .data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) {
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344 NOSAVE_DATA
345 }
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346#endif
347
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348 /* BSS */
349 . = ALIGN(PAGE_SIZE);
350 .bss : AT(ADDR(.bss) - LOAD_OFFSET) {
351 __bss_start = .;
7c74df07 352 *(.bss..page_aligned)
091e52c3 353 *(.bss)
5bd5a452 354 . = ALIGN(PAGE_SIZE);
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SR
355 __bss_stop = .;
356 }
9d16e783 357
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SR
358 . = ALIGN(PAGE_SIZE);
359 .brk : AT(ADDR(.brk) - LOAD_OFFSET) {
360 __brk_base = .;
361 . += 64 * 1024; /* 64k alignment slop space */
362 *(.brk_reservation) /* areas brk users have reserved */
363 __brk_limit = .;
364 }
365
974f221c 366 . = ALIGN(PAGE_SIZE); /* keep VO_INIT_SIZE page aligned */
873b5271 367 _end = .;
091e52c3 368
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SR
369 STABS_DEBUG
370 DWARF_DEBUG
023bf6f1
TH
371
372 /* Sections to be discarded */
373 DISCARDS
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374 /DISCARD/ : {
375 *(.eh_frame)
9a99417a 376 }
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377}
378
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379
380#ifdef CONFIG_X86_32
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IM
381/*
382 * The ASSERT() sink to . is intentional, for binutils 2.14 compatibility:
383 */
d2ba8b21
PA
384. = ASSERT((_end - LOAD_OFFSET <= KERNEL_IMAGE_SIZE),
385 "kernel image bigger than KERNEL_IMAGE_SIZE");
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SR
386#else
387/*
388 * Per-cpu symbols which need to be offset from __per_cpu_load
389 * for the boot processor.
390 */
dd17c8f7 391#define INIT_PER_CPU(x) init_per_cpu__##x = x + __per_cpu_load
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392INIT_PER_CPU(gdt_page);
393INIT_PER_CPU(irq_stack_union);
394
395/*
396 * Build-time check on the image size:
397 */
d2ba8b21
PA
398. = ASSERT((_end - _text <= KERNEL_IMAGE_SIZE),
399 "kernel image bigger than KERNEL_IMAGE_SIZE");
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400
401#ifdef CONFIG_SMP
dd17c8f7 402. = ASSERT((irq_stack_union == 0),
d2ba8b21 403 "irq_stack_union is not at start of per-cpu area");
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404#endif
405
406#endif /* CONFIG_X86_32 */
407
2965faa5 408#ifdef CONFIG_KEXEC_CORE
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409#include <asm/kexec.h>
410
d2ba8b21
PA
411. = ASSERT(kexec_control_code_size <= KEXEC_CONTROL_CODE_MAX_SIZE,
412 "kexec control code size is too big");
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SR
413#endif
414