]>
Commit | Line | Data |
---|---|---|
6aa8b732 AK |
1 | /* |
2 | * Kernel-based Virtual Machine driver for Linux | |
3 | * | |
4 | * This module enables machines with Intel VT-x extensions to run virtual | |
5 | * machines without emulation or binary translation. | |
6 | * | |
7 | * MMU support | |
8 | * | |
9 | * Copyright (C) 2006 Qumranet, Inc. | |
10 | * | |
11 | * Authors: | |
12 | * Yaniv Kamay <yaniv@qumranet.com> | |
13 | * Avi Kivity <avi@qumranet.com> | |
14 | * | |
15 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
16 | * the COPYING file in the top-level directory. | |
17 | * | |
18 | */ | |
e495606d AK |
19 | |
20 | #include "vmx.h" | |
1d737c8a | 21 | #include "mmu.h" |
e495606d | 22 | |
edf88417 | 23 | #include <linux/kvm_host.h> |
6aa8b732 AK |
24 | #include <linux/types.h> |
25 | #include <linux/string.h> | |
6aa8b732 AK |
26 | #include <linux/mm.h> |
27 | #include <linux/highmem.h> | |
28 | #include <linux/module.h> | |
448353ca | 29 | #include <linux/swap.h> |
05da4558 | 30 | #include <linux/hugetlb.h> |
2f333bcb | 31 | #include <linux/compiler.h> |
6aa8b732 | 32 | |
e495606d AK |
33 | #include <asm/page.h> |
34 | #include <asm/cmpxchg.h> | |
4e542370 | 35 | #include <asm/io.h> |
6aa8b732 | 36 | |
18552672 JR |
37 | /* |
38 | * When setting this variable to true it enables Two-Dimensional-Paging | |
39 | * where the hardware walks 2 page tables: | |
40 | * 1. the guest-virtual to guest-physical | |
41 | * 2. while doing 1. it walks guest-physical to host-physical | |
42 | * If the hardware supports that we don't need to do shadow paging. | |
43 | */ | |
2f333bcb | 44 | bool tdp_enabled = false; |
18552672 | 45 | |
37a7d8b0 AK |
46 | #undef MMU_DEBUG |
47 | ||
48 | #undef AUDIT | |
49 | ||
50 | #ifdef AUDIT | |
51 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg); | |
52 | #else | |
53 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {} | |
54 | #endif | |
55 | ||
56 | #ifdef MMU_DEBUG | |
57 | ||
58 | #define pgprintk(x...) do { if (dbg) printk(x); } while (0) | |
59 | #define rmap_printk(x...) do { if (dbg) printk(x); } while (0) | |
60 | ||
61 | #else | |
62 | ||
63 | #define pgprintk(x...) do { } while (0) | |
64 | #define rmap_printk(x...) do { } while (0) | |
65 | ||
66 | #endif | |
67 | ||
68 | #if defined(MMU_DEBUG) || defined(AUDIT) | |
69 | static int dbg = 1; | |
70 | #endif | |
6aa8b732 | 71 | |
d6c69ee9 YD |
72 | #ifndef MMU_DEBUG |
73 | #define ASSERT(x) do { } while (0) | |
74 | #else | |
6aa8b732 AK |
75 | #define ASSERT(x) \ |
76 | if (!(x)) { \ | |
77 | printk(KERN_WARNING "assertion failed %s:%d: %s\n", \ | |
78 | __FILE__, __LINE__, #x); \ | |
79 | } | |
d6c69ee9 | 80 | #endif |
6aa8b732 | 81 | |
cea0f0e7 AK |
82 | #define PT64_PT_BITS 9 |
83 | #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS) | |
84 | #define PT32_PT_BITS 10 | |
85 | #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS) | |
6aa8b732 AK |
86 | |
87 | #define PT_WRITABLE_SHIFT 1 | |
88 | ||
89 | #define PT_PRESENT_MASK (1ULL << 0) | |
90 | #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT) | |
91 | #define PT_USER_MASK (1ULL << 2) | |
92 | #define PT_PWT_MASK (1ULL << 3) | |
93 | #define PT_PCD_MASK (1ULL << 4) | |
94 | #define PT_ACCESSED_MASK (1ULL << 5) | |
95 | #define PT_DIRTY_MASK (1ULL << 6) | |
96 | #define PT_PAGE_SIZE_MASK (1ULL << 7) | |
97 | #define PT_PAT_MASK (1ULL << 7) | |
98 | #define PT_GLOBAL_MASK (1ULL << 8) | |
fe135d2c AK |
99 | #define PT64_NX_SHIFT 63 |
100 | #define PT64_NX_MASK (1ULL << PT64_NX_SHIFT) | |
6aa8b732 AK |
101 | |
102 | #define PT_PAT_SHIFT 7 | |
103 | #define PT_DIR_PAT_SHIFT 12 | |
104 | #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT) | |
105 | ||
106 | #define PT32_DIR_PSE36_SIZE 4 | |
107 | #define PT32_DIR_PSE36_SHIFT 13 | |
d77c26fc MD |
108 | #define PT32_DIR_PSE36_MASK \ |
109 | (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT) | |
6aa8b732 AK |
110 | |
111 | ||
6aa8b732 AK |
112 | #define PT_FIRST_AVAIL_BITS_SHIFT 9 |
113 | #define PT64_SECOND_AVAIL_BITS_SHIFT 52 | |
114 | ||
6aa8b732 AK |
115 | #define VALID_PAGE(x) ((x) != INVALID_PAGE) |
116 | ||
117 | #define PT64_LEVEL_BITS 9 | |
118 | ||
119 | #define PT64_LEVEL_SHIFT(level) \ | |
d77c26fc | 120 | (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS) |
6aa8b732 AK |
121 | |
122 | #define PT64_LEVEL_MASK(level) \ | |
123 | (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level)) | |
124 | ||
125 | #define PT64_INDEX(address, level)\ | |
126 | (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1)) | |
127 | ||
128 | ||
129 | #define PT32_LEVEL_BITS 10 | |
130 | ||
131 | #define PT32_LEVEL_SHIFT(level) \ | |
d77c26fc | 132 | (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS) |
6aa8b732 AK |
133 | |
134 | #define PT32_LEVEL_MASK(level) \ | |
135 | (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level)) | |
136 | ||
137 | #define PT32_INDEX(address, level)\ | |
138 | (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1)) | |
139 | ||
140 | ||
27aba766 | 141 | #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1)) |
6aa8b732 AK |
142 | #define PT64_DIR_BASE_ADDR_MASK \ |
143 | (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1)) | |
144 | ||
145 | #define PT32_BASE_ADDR_MASK PAGE_MASK | |
146 | #define PT32_DIR_BASE_ADDR_MASK \ | |
147 | (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1)) | |
148 | ||
79539cec AK |
149 | #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \ |
150 | | PT64_NX_MASK) | |
6aa8b732 AK |
151 | |
152 | #define PFERR_PRESENT_MASK (1U << 0) | |
153 | #define PFERR_WRITE_MASK (1U << 1) | |
154 | #define PFERR_USER_MASK (1U << 2) | |
73b1087e | 155 | #define PFERR_FETCH_MASK (1U << 4) |
6aa8b732 AK |
156 | |
157 | #define PT64_ROOT_LEVEL 4 | |
158 | #define PT32_ROOT_LEVEL 2 | |
159 | #define PT32E_ROOT_LEVEL 3 | |
160 | ||
161 | #define PT_DIRECTORY_LEVEL 2 | |
162 | #define PT_PAGE_TABLE_LEVEL 1 | |
163 | ||
cd4a4e53 AK |
164 | #define RMAP_EXT 4 |
165 | ||
fe135d2c AK |
166 | #define ACC_EXEC_MASK 1 |
167 | #define ACC_WRITE_MASK PT_WRITABLE_MASK | |
168 | #define ACC_USER_MASK PT_USER_MASK | |
169 | #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK) | |
170 | ||
2f333bcb MT |
171 | struct kvm_pv_mmu_op_buffer { |
172 | void *ptr; | |
173 | unsigned len; | |
174 | unsigned processed; | |
175 | char buf[512] __aligned(sizeof(long)); | |
176 | }; | |
177 | ||
cd4a4e53 AK |
178 | struct kvm_rmap_desc { |
179 | u64 *shadow_ptes[RMAP_EXT]; | |
180 | struct kvm_rmap_desc *more; | |
181 | }; | |
182 | ||
b5a33a75 AK |
183 | static struct kmem_cache *pte_chain_cache; |
184 | static struct kmem_cache *rmap_desc_cache; | |
d3d25b04 | 185 | static struct kmem_cache *mmu_page_header_cache; |
b5a33a75 | 186 | |
c7addb90 AK |
187 | static u64 __read_mostly shadow_trap_nonpresent_pte; |
188 | static u64 __read_mostly shadow_notrap_nonpresent_pte; | |
189 | ||
190 | void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte) | |
191 | { | |
192 | shadow_trap_nonpresent_pte = trap_pte; | |
193 | shadow_notrap_nonpresent_pte = notrap_pte; | |
194 | } | |
195 | EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes); | |
196 | ||
6aa8b732 AK |
197 | static int is_write_protection(struct kvm_vcpu *vcpu) |
198 | { | |
ad312c7c | 199 | return vcpu->arch.cr0 & X86_CR0_WP; |
6aa8b732 AK |
200 | } |
201 | ||
202 | static int is_cpuid_PSE36(void) | |
203 | { | |
204 | return 1; | |
205 | } | |
206 | ||
73b1087e AK |
207 | static int is_nx(struct kvm_vcpu *vcpu) |
208 | { | |
ad312c7c | 209 | return vcpu->arch.shadow_efer & EFER_NX; |
73b1087e AK |
210 | } |
211 | ||
6aa8b732 AK |
212 | static int is_present_pte(unsigned long pte) |
213 | { | |
214 | return pte & PT_PRESENT_MASK; | |
215 | } | |
216 | ||
c7addb90 AK |
217 | static int is_shadow_present_pte(u64 pte) |
218 | { | |
c7addb90 AK |
219 | return pte != shadow_trap_nonpresent_pte |
220 | && pte != shadow_notrap_nonpresent_pte; | |
221 | } | |
222 | ||
05da4558 MT |
223 | static int is_large_pte(u64 pte) |
224 | { | |
225 | return pte & PT_PAGE_SIZE_MASK; | |
226 | } | |
227 | ||
6aa8b732 AK |
228 | static int is_writeble_pte(unsigned long pte) |
229 | { | |
230 | return pte & PT_WRITABLE_MASK; | |
231 | } | |
232 | ||
e3c5e7ec AK |
233 | static int is_dirty_pte(unsigned long pte) |
234 | { | |
235 | return pte & PT_DIRTY_MASK; | |
236 | } | |
237 | ||
cd4a4e53 AK |
238 | static int is_rmap_pte(u64 pte) |
239 | { | |
4b1a80fa | 240 | return is_shadow_present_pte(pte); |
cd4a4e53 AK |
241 | } |
242 | ||
0b49ea86 AK |
243 | static struct page *spte_to_page(u64 pte) |
244 | { | |
245 | hfn_t hfn = (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT; | |
246 | ||
247 | return pfn_to_page(hfn); | |
248 | } | |
249 | ||
da928521 AK |
250 | static gfn_t pse36_gfn_delta(u32 gpte) |
251 | { | |
252 | int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT; | |
253 | ||
254 | return (gpte & PT32_DIR_PSE36_MASK) << shift; | |
255 | } | |
256 | ||
e663ee64 AK |
257 | static void set_shadow_pte(u64 *sptep, u64 spte) |
258 | { | |
259 | #ifdef CONFIG_X86_64 | |
260 | set_64bit((unsigned long *)sptep, spte); | |
261 | #else | |
262 | set_64bit((unsigned long long *)sptep, spte); | |
263 | #endif | |
264 | } | |
265 | ||
e2dec939 | 266 | static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache, |
2e3e5882 | 267 | struct kmem_cache *base_cache, int min) |
714b93da AK |
268 | { |
269 | void *obj; | |
270 | ||
271 | if (cache->nobjs >= min) | |
e2dec939 | 272 | return 0; |
714b93da | 273 | while (cache->nobjs < ARRAY_SIZE(cache->objects)) { |
2e3e5882 | 274 | obj = kmem_cache_zalloc(base_cache, GFP_KERNEL); |
714b93da | 275 | if (!obj) |
e2dec939 | 276 | return -ENOMEM; |
714b93da AK |
277 | cache->objects[cache->nobjs++] = obj; |
278 | } | |
e2dec939 | 279 | return 0; |
714b93da AK |
280 | } |
281 | ||
282 | static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc) | |
283 | { | |
284 | while (mc->nobjs) | |
285 | kfree(mc->objects[--mc->nobjs]); | |
286 | } | |
287 | ||
c1158e63 | 288 | static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache, |
2e3e5882 | 289 | int min) |
c1158e63 AK |
290 | { |
291 | struct page *page; | |
292 | ||
293 | if (cache->nobjs >= min) | |
294 | return 0; | |
295 | while (cache->nobjs < ARRAY_SIZE(cache->objects)) { | |
2e3e5882 | 296 | page = alloc_page(GFP_KERNEL); |
c1158e63 AK |
297 | if (!page) |
298 | return -ENOMEM; | |
299 | set_page_private(page, 0); | |
300 | cache->objects[cache->nobjs++] = page_address(page); | |
301 | } | |
302 | return 0; | |
303 | } | |
304 | ||
305 | static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc) | |
306 | { | |
307 | while (mc->nobjs) | |
c4d198d5 | 308 | free_page((unsigned long)mc->objects[--mc->nobjs]); |
c1158e63 AK |
309 | } |
310 | ||
2e3e5882 | 311 | static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu) |
714b93da | 312 | { |
e2dec939 AK |
313 | int r; |
314 | ||
ad312c7c | 315 | r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache, |
2e3e5882 | 316 | pte_chain_cache, 4); |
e2dec939 AK |
317 | if (r) |
318 | goto out; | |
ad312c7c | 319 | r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache, |
2e3e5882 | 320 | rmap_desc_cache, 1); |
d3d25b04 AK |
321 | if (r) |
322 | goto out; | |
ad312c7c | 323 | r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8); |
d3d25b04 AK |
324 | if (r) |
325 | goto out; | |
ad312c7c | 326 | r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache, |
2e3e5882 | 327 | mmu_page_header_cache, 4); |
e2dec939 AK |
328 | out: |
329 | return r; | |
714b93da AK |
330 | } |
331 | ||
332 | static void mmu_free_memory_caches(struct kvm_vcpu *vcpu) | |
333 | { | |
ad312c7c ZX |
334 | mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache); |
335 | mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache); | |
336 | mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache); | |
337 | mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache); | |
714b93da AK |
338 | } |
339 | ||
340 | static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc, | |
341 | size_t size) | |
342 | { | |
343 | void *p; | |
344 | ||
345 | BUG_ON(!mc->nobjs); | |
346 | p = mc->objects[--mc->nobjs]; | |
347 | memset(p, 0, size); | |
348 | return p; | |
349 | } | |
350 | ||
714b93da AK |
351 | static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu) |
352 | { | |
ad312c7c | 353 | return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache, |
714b93da AK |
354 | sizeof(struct kvm_pte_chain)); |
355 | } | |
356 | ||
90cb0529 | 357 | static void mmu_free_pte_chain(struct kvm_pte_chain *pc) |
714b93da | 358 | { |
90cb0529 | 359 | kfree(pc); |
714b93da AK |
360 | } |
361 | ||
362 | static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu) | |
363 | { | |
ad312c7c | 364 | return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache, |
714b93da AK |
365 | sizeof(struct kvm_rmap_desc)); |
366 | } | |
367 | ||
90cb0529 | 368 | static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd) |
714b93da | 369 | { |
90cb0529 | 370 | kfree(rd); |
714b93da AK |
371 | } |
372 | ||
05da4558 MT |
373 | /* |
374 | * Return the pointer to the largepage write count for a given | |
375 | * gfn, handling slots that are not large page aligned. | |
376 | */ | |
377 | static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot) | |
378 | { | |
379 | unsigned long idx; | |
380 | ||
381 | idx = (gfn / KVM_PAGES_PER_HPAGE) - | |
382 | (slot->base_gfn / KVM_PAGES_PER_HPAGE); | |
383 | return &slot->lpage_info[idx].write_count; | |
384 | } | |
385 | ||
386 | static void account_shadowed(struct kvm *kvm, gfn_t gfn) | |
387 | { | |
388 | int *write_count; | |
389 | ||
390 | write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn)); | |
391 | *write_count += 1; | |
392 | WARN_ON(*write_count > KVM_PAGES_PER_HPAGE); | |
393 | } | |
394 | ||
395 | static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn) | |
396 | { | |
397 | int *write_count; | |
398 | ||
399 | write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn)); | |
400 | *write_count -= 1; | |
401 | WARN_ON(*write_count < 0); | |
402 | } | |
403 | ||
404 | static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn) | |
405 | { | |
406 | struct kvm_memory_slot *slot = gfn_to_memslot(kvm, gfn); | |
407 | int *largepage_idx; | |
408 | ||
409 | if (slot) { | |
410 | largepage_idx = slot_largepage_idx(gfn, slot); | |
411 | return *largepage_idx; | |
412 | } | |
413 | ||
414 | return 1; | |
415 | } | |
416 | ||
417 | static int host_largepage_backed(struct kvm *kvm, gfn_t gfn) | |
418 | { | |
419 | struct vm_area_struct *vma; | |
420 | unsigned long addr; | |
421 | ||
422 | addr = gfn_to_hva(kvm, gfn); | |
423 | if (kvm_is_error_hva(addr)) | |
424 | return 0; | |
425 | ||
426 | vma = find_vma(current->mm, addr); | |
427 | if (vma && is_vm_hugetlb_page(vma)) | |
428 | return 1; | |
429 | ||
430 | return 0; | |
431 | } | |
432 | ||
433 | static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn) | |
434 | { | |
435 | struct kvm_memory_slot *slot; | |
436 | ||
437 | if (has_wrprotected_page(vcpu->kvm, large_gfn)) | |
438 | return 0; | |
439 | ||
440 | if (!host_largepage_backed(vcpu->kvm, large_gfn)) | |
441 | return 0; | |
442 | ||
443 | slot = gfn_to_memslot(vcpu->kvm, large_gfn); | |
444 | if (slot && slot->dirty_bitmap) | |
445 | return 0; | |
446 | ||
447 | return 1; | |
448 | } | |
449 | ||
290fc38d IE |
450 | /* |
451 | * Take gfn and return the reverse mapping to it. | |
452 | * Note: gfn must be unaliased before this function get called | |
453 | */ | |
454 | ||
05da4558 | 455 | static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage) |
290fc38d IE |
456 | { |
457 | struct kvm_memory_slot *slot; | |
05da4558 | 458 | unsigned long idx; |
290fc38d IE |
459 | |
460 | slot = gfn_to_memslot(kvm, gfn); | |
05da4558 MT |
461 | if (!lpage) |
462 | return &slot->rmap[gfn - slot->base_gfn]; | |
463 | ||
464 | idx = (gfn / KVM_PAGES_PER_HPAGE) - | |
465 | (slot->base_gfn / KVM_PAGES_PER_HPAGE); | |
466 | ||
467 | return &slot->lpage_info[idx].rmap_pde; | |
290fc38d IE |
468 | } |
469 | ||
cd4a4e53 AK |
470 | /* |
471 | * Reverse mapping data structures: | |
472 | * | |
290fc38d IE |
473 | * If rmapp bit zero is zero, then rmapp point to the shadw page table entry |
474 | * that points to page_address(page). | |
cd4a4e53 | 475 | * |
290fc38d IE |
476 | * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc |
477 | * containing more mappings. | |
cd4a4e53 | 478 | */ |
05da4558 | 479 | static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage) |
cd4a4e53 | 480 | { |
4db35314 | 481 | struct kvm_mmu_page *sp; |
cd4a4e53 | 482 | struct kvm_rmap_desc *desc; |
290fc38d | 483 | unsigned long *rmapp; |
cd4a4e53 AK |
484 | int i; |
485 | ||
486 | if (!is_rmap_pte(*spte)) | |
487 | return; | |
290fc38d | 488 | gfn = unalias_gfn(vcpu->kvm, gfn); |
4db35314 AK |
489 | sp = page_header(__pa(spte)); |
490 | sp->gfns[spte - sp->spt] = gfn; | |
05da4558 | 491 | rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage); |
290fc38d | 492 | if (!*rmapp) { |
cd4a4e53 | 493 | rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte); |
290fc38d IE |
494 | *rmapp = (unsigned long)spte; |
495 | } else if (!(*rmapp & 1)) { | |
cd4a4e53 | 496 | rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte); |
714b93da | 497 | desc = mmu_alloc_rmap_desc(vcpu); |
290fc38d | 498 | desc->shadow_ptes[0] = (u64 *)*rmapp; |
cd4a4e53 | 499 | desc->shadow_ptes[1] = spte; |
290fc38d | 500 | *rmapp = (unsigned long)desc | 1; |
cd4a4e53 AK |
501 | } else { |
502 | rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte); | |
290fc38d | 503 | desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul); |
cd4a4e53 AK |
504 | while (desc->shadow_ptes[RMAP_EXT-1] && desc->more) |
505 | desc = desc->more; | |
506 | if (desc->shadow_ptes[RMAP_EXT-1]) { | |
714b93da | 507 | desc->more = mmu_alloc_rmap_desc(vcpu); |
cd4a4e53 AK |
508 | desc = desc->more; |
509 | } | |
510 | for (i = 0; desc->shadow_ptes[i]; ++i) | |
511 | ; | |
512 | desc->shadow_ptes[i] = spte; | |
513 | } | |
514 | } | |
515 | ||
290fc38d | 516 | static void rmap_desc_remove_entry(unsigned long *rmapp, |
cd4a4e53 AK |
517 | struct kvm_rmap_desc *desc, |
518 | int i, | |
519 | struct kvm_rmap_desc *prev_desc) | |
520 | { | |
521 | int j; | |
522 | ||
523 | for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j) | |
524 | ; | |
525 | desc->shadow_ptes[i] = desc->shadow_ptes[j]; | |
11718b4d | 526 | desc->shadow_ptes[j] = NULL; |
cd4a4e53 AK |
527 | if (j != 0) |
528 | return; | |
529 | if (!prev_desc && !desc->more) | |
290fc38d | 530 | *rmapp = (unsigned long)desc->shadow_ptes[0]; |
cd4a4e53 AK |
531 | else |
532 | if (prev_desc) | |
533 | prev_desc->more = desc->more; | |
534 | else | |
290fc38d | 535 | *rmapp = (unsigned long)desc->more | 1; |
90cb0529 | 536 | mmu_free_rmap_desc(desc); |
cd4a4e53 AK |
537 | } |
538 | ||
290fc38d | 539 | static void rmap_remove(struct kvm *kvm, u64 *spte) |
cd4a4e53 | 540 | { |
cd4a4e53 AK |
541 | struct kvm_rmap_desc *desc; |
542 | struct kvm_rmap_desc *prev_desc; | |
4db35314 | 543 | struct kvm_mmu_page *sp; |
76c35c6e | 544 | struct page *page; |
290fc38d | 545 | unsigned long *rmapp; |
cd4a4e53 AK |
546 | int i; |
547 | ||
548 | if (!is_rmap_pte(*spte)) | |
549 | return; | |
4db35314 | 550 | sp = page_header(__pa(spte)); |
0b49ea86 | 551 | page = spte_to_page(*spte); |
448353ca | 552 | mark_page_accessed(page); |
b4231d61 | 553 | if (is_writeble_pte(*spte)) |
76c35c6e | 554 | kvm_release_page_dirty(page); |
b4231d61 | 555 | else |
76c35c6e | 556 | kvm_release_page_clean(page); |
05da4558 | 557 | rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte)); |
290fc38d | 558 | if (!*rmapp) { |
cd4a4e53 AK |
559 | printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte); |
560 | BUG(); | |
290fc38d | 561 | } else if (!(*rmapp & 1)) { |
cd4a4e53 | 562 | rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte); |
290fc38d | 563 | if ((u64 *)*rmapp != spte) { |
cd4a4e53 AK |
564 | printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n", |
565 | spte, *spte); | |
566 | BUG(); | |
567 | } | |
290fc38d | 568 | *rmapp = 0; |
cd4a4e53 AK |
569 | } else { |
570 | rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte); | |
290fc38d | 571 | desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul); |
cd4a4e53 AK |
572 | prev_desc = NULL; |
573 | while (desc) { | |
574 | for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) | |
575 | if (desc->shadow_ptes[i] == spte) { | |
290fc38d | 576 | rmap_desc_remove_entry(rmapp, |
714b93da | 577 | desc, i, |
cd4a4e53 AK |
578 | prev_desc); |
579 | return; | |
580 | } | |
581 | prev_desc = desc; | |
582 | desc = desc->more; | |
583 | } | |
584 | BUG(); | |
585 | } | |
586 | } | |
587 | ||
98348e95 | 588 | static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte) |
374cbac0 | 589 | { |
374cbac0 | 590 | struct kvm_rmap_desc *desc; |
98348e95 IE |
591 | struct kvm_rmap_desc *prev_desc; |
592 | u64 *prev_spte; | |
593 | int i; | |
594 | ||
595 | if (!*rmapp) | |
596 | return NULL; | |
597 | else if (!(*rmapp & 1)) { | |
598 | if (!spte) | |
599 | return (u64 *)*rmapp; | |
600 | return NULL; | |
601 | } | |
602 | desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul); | |
603 | prev_desc = NULL; | |
604 | prev_spte = NULL; | |
605 | while (desc) { | |
606 | for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) { | |
607 | if (prev_spte == spte) | |
608 | return desc->shadow_ptes[i]; | |
609 | prev_spte = desc->shadow_ptes[i]; | |
610 | } | |
611 | desc = desc->more; | |
612 | } | |
613 | return NULL; | |
614 | } | |
615 | ||
616 | static void rmap_write_protect(struct kvm *kvm, u64 gfn) | |
617 | { | |
290fc38d | 618 | unsigned long *rmapp; |
374cbac0 | 619 | u64 *spte; |
caa5b8a5 | 620 | int write_protected = 0; |
374cbac0 | 621 | |
4a4c9924 | 622 | gfn = unalias_gfn(kvm, gfn); |
05da4558 | 623 | rmapp = gfn_to_rmap(kvm, gfn, 0); |
374cbac0 | 624 | |
98348e95 IE |
625 | spte = rmap_next(kvm, rmapp, NULL); |
626 | while (spte) { | |
374cbac0 | 627 | BUG_ON(!spte); |
374cbac0 | 628 | BUG_ON(!(*spte & PT_PRESENT_MASK)); |
374cbac0 | 629 | rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte); |
caa5b8a5 | 630 | if (is_writeble_pte(*spte)) { |
9647c14c | 631 | set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK); |
caa5b8a5 ED |
632 | write_protected = 1; |
633 | } | |
9647c14c | 634 | spte = rmap_next(kvm, rmapp, spte); |
374cbac0 | 635 | } |
855149aa IE |
636 | if (write_protected) { |
637 | struct page *page; | |
638 | ||
639 | spte = rmap_next(kvm, rmapp, NULL); | |
0b49ea86 | 640 | page = spte_to_page(*spte); |
855149aa IE |
641 | SetPageDirty(page); |
642 | } | |
643 | ||
05da4558 MT |
644 | /* check for huge page mappings */ |
645 | rmapp = gfn_to_rmap(kvm, gfn, 1); | |
646 | spte = rmap_next(kvm, rmapp, NULL); | |
647 | while (spte) { | |
648 | BUG_ON(!spte); | |
649 | BUG_ON(!(*spte & PT_PRESENT_MASK)); | |
650 | BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)); | |
651 | pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn); | |
652 | if (is_writeble_pte(*spte)) { | |
653 | rmap_remove(kvm, spte); | |
654 | --kvm->stat.lpages; | |
655 | set_shadow_pte(spte, shadow_trap_nonpresent_pte); | |
656 | write_protected = 1; | |
657 | } | |
658 | spte = rmap_next(kvm, rmapp, spte); | |
659 | } | |
660 | ||
caa5b8a5 ED |
661 | if (write_protected) |
662 | kvm_flush_remote_tlbs(kvm); | |
05da4558 MT |
663 | |
664 | account_shadowed(kvm, gfn); | |
374cbac0 AK |
665 | } |
666 | ||
d6c69ee9 | 667 | #ifdef MMU_DEBUG |
47ad8e68 | 668 | static int is_empty_shadow_page(u64 *spt) |
6aa8b732 | 669 | { |
139bdb2d AK |
670 | u64 *pos; |
671 | u64 *end; | |
672 | ||
47ad8e68 | 673 | for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++) |
d196e343 | 674 | if (*pos != shadow_trap_nonpresent_pte) { |
b8688d51 | 675 | printk(KERN_ERR "%s: %p %llx\n", __func__, |
139bdb2d | 676 | pos, *pos); |
6aa8b732 | 677 | return 0; |
139bdb2d | 678 | } |
6aa8b732 AK |
679 | return 1; |
680 | } | |
d6c69ee9 | 681 | #endif |
6aa8b732 | 682 | |
4db35314 | 683 | static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp) |
260746c0 | 684 | { |
4db35314 AK |
685 | ASSERT(is_empty_shadow_page(sp->spt)); |
686 | list_del(&sp->link); | |
687 | __free_page(virt_to_page(sp->spt)); | |
688 | __free_page(virt_to_page(sp->gfns)); | |
689 | kfree(sp); | |
f05e70ac | 690 | ++kvm->arch.n_free_mmu_pages; |
260746c0 AK |
691 | } |
692 | ||
cea0f0e7 AK |
693 | static unsigned kvm_page_table_hashfn(gfn_t gfn) |
694 | { | |
1ae0a13d | 695 | return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1); |
cea0f0e7 AK |
696 | } |
697 | ||
25c0de2c AK |
698 | static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu, |
699 | u64 *parent_pte) | |
6aa8b732 | 700 | { |
4db35314 | 701 | struct kvm_mmu_page *sp; |
6aa8b732 | 702 | |
ad312c7c ZX |
703 | sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp); |
704 | sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE); | |
705 | sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE); | |
4db35314 | 706 | set_page_private(virt_to_page(sp->spt), (unsigned long)sp); |
f05e70ac | 707 | list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages); |
4db35314 AK |
708 | ASSERT(is_empty_shadow_page(sp->spt)); |
709 | sp->slot_bitmap = 0; | |
710 | sp->multimapped = 0; | |
711 | sp->parent_pte = parent_pte; | |
f05e70ac | 712 | --vcpu->kvm->arch.n_free_mmu_pages; |
4db35314 | 713 | return sp; |
6aa8b732 AK |
714 | } |
715 | ||
714b93da | 716 | static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu, |
4db35314 | 717 | struct kvm_mmu_page *sp, u64 *parent_pte) |
cea0f0e7 AK |
718 | { |
719 | struct kvm_pte_chain *pte_chain; | |
720 | struct hlist_node *node; | |
721 | int i; | |
722 | ||
723 | if (!parent_pte) | |
724 | return; | |
4db35314 AK |
725 | if (!sp->multimapped) { |
726 | u64 *old = sp->parent_pte; | |
cea0f0e7 AK |
727 | |
728 | if (!old) { | |
4db35314 | 729 | sp->parent_pte = parent_pte; |
cea0f0e7 AK |
730 | return; |
731 | } | |
4db35314 | 732 | sp->multimapped = 1; |
714b93da | 733 | pte_chain = mmu_alloc_pte_chain(vcpu); |
4db35314 AK |
734 | INIT_HLIST_HEAD(&sp->parent_ptes); |
735 | hlist_add_head(&pte_chain->link, &sp->parent_ptes); | |
cea0f0e7 AK |
736 | pte_chain->parent_ptes[0] = old; |
737 | } | |
4db35314 | 738 | hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) { |
cea0f0e7 AK |
739 | if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1]) |
740 | continue; | |
741 | for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) | |
742 | if (!pte_chain->parent_ptes[i]) { | |
743 | pte_chain->parent_ptes[i] = parent_pte; | |
744 | return; | |
745 | } | |
746 | } | |
714b93da | 747 | pte_chain = mmu_alloc_pte_chain(vcpu); |
cea0f0e7 | 748 | BUG_ON(!pte_chain); |
4db35314 | 749 | hlist_add_head(&pte_chain->link, &sp->parent_ptes); |
cea0f0e7 AK |
750 | pte_chain->parent_ptes[0] = parent_pte; |
751 | } | |
752 | ||
4db35314 | 753 | static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp, |
cea0f0e7 AK |
754 | u64 *parent_pte) |
755 | { | |
756 | struct kvm_pte_chain *pte_chain; | |
757 | struct hlist_node *node; | |
758 | int i; | |
759 | ||
4db35314 AK |
760 | if (!sp->multimapped) { |
761 | BUG_ON(sp->parent_pte != parent_pte); | |
762 | sp->parent_pte = NULL; | |
cea0f0e7 AK |
763 | return; |
764 | } | |
4db35314 | 765 | hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) |
cea0f0e7 AK |
766 | for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) { |
767 | if (!pte_chain->parent_ptes[i]) | |
768 | break; | |
769 | if (pte_chain->parent_ptes[i] != parent_pte) | |
770 | continue; | |
697fe2e2 AK |
771 | while (i + 1 < NR_PTE_CHAIN_ENTRIES |
772 | && pte_chain->parent_ptes[i + 1]) { | |
cea0f0e7 AK |
773 | pte_chain->parent_ptes[i] |
774 | = pte_chain->parent_ptes[i + 1]; | |
775 | ++i; | |
776 | } | |
777 | pte_chain->parent_ptes[i] = NULL; | |
697fe2e2 AK |
778 | if (i == 0) { |
779 | hlist_del(&pte_chain->link); | |
90cb0529 | 780 | mmu_free_pte_chain(pte_chain); |
4db35314 AK |
781 | if (hlist_empty(&sp->parent_ptes)) { |
782 | sp->multimapped = 0; | |
783 | sp->parent_pte = NULL; | |
697fe2e2 AK |
784 | } |
785 | } | |
cea0f0e7 AK |
786 | return; |
787 | } | |
788 | BUG(); | |
789 | } | |
790 | ||
4db35314 | 791 | static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn) |
cea0f0e7 AK |
792 | { |
793 | unsigned index; | |
794 | struct hlist_head *bucket; | |
4db35314 | 795 | struct kvm_mmu_page *sp; |
cea0f0e7 AK |
796 | struct hlist_node *node; |
797 | ||
b8688d51 | 798 | pgprintk("%s: looking for gfn %lx\n", __func__, gfn); |
1ae0a13d | 799 | index = kvm_page_table_hashfn(gfn); |
f05e70ac | 800 | bucket = &kvm->arch.mmu_page_hash[index]; |
4db35314 | 801 | hlist_for_each_entry(sp, node, bucket, hash_link) |
2e53d63a MT |
802 | if (sp->gfn == gfn && !sp->role.metaphysical |
803 | && !sp->role.invalid) { | |
cea0f0e7 | 804 | pgprintk("%s: found role %x\n", |
b8688d51 | 805 | __func__, sp->role.word); |
4db35314 | 806 | return sp; |
cea0f0e7 AK |
807 | } |
808 | return NULL; | |
809 | } | |
810 | ||
811 | static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu, | |
812 | gfn_t gfn, | |
813 | gva_t gaddr, | |
814 | unsigned level, | |
815 | int metaphysical, | |
41074d07 | 816 | unsigned access, |
f7d9c7b7 | 817 | u64 *parent_pte) |
cea0f0e7 AK |
818 | { |
819 | union kvm_mmu_page_role role; | |
820 | unsigned index; | |
821 | unsigned quadrant; | |
822 | struct hlist_head *bucket; | |
4db35314 | 823 | struct kvm_mmu_page *sp; |
cea0f0e7 AK |
824 | struct hlist_node *node; |
825 | ||
826 | role.word = 0; | |
ad312c7c | 827 | role.glevels = vcpu->arch.mmu.root_level; |
cea0f0e7 AK |
828 | role.level = level; |
829 | role.metaphysical = metaphysical; | |
41074d07 | 830 | role.access = access; |
ad312c7c | 831 | if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) { |
cea0f0e7 AK |
832 | quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level)); |
833 | quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1; | |
834 | role.quadrant = quadrant; | |
835 | } | |
b8688d51 | 836 | pgprintk("%s: looking gfn %lx role %x\n", __func__, |
cea0f0e7 | 837 | gfn, role.word); |
1ae0a13d | 838 | index = kvm_page_table_hashfn(gfn); |
f05e70ac | 839 | bucket = &vcpu->kvm->arch.mmu_page_hash[index]; |
4db35314 AK |
840 | hlist_for_each_entry(sp, node, bucket, hash_link) |
841 | if (sp->gfn == gfn && sp->role.word == role.word) { | |
842 | mmu_page_add_parent_pte(vcpu, sp, parent_pte); | |
b8688d51 | 843 | pgprintk("%s: found\n", __func__); |
4db35314 | 844 | return sp; |
cea0f0e7 | 845 | } |
dfc5aa00 | 846 | ++vcpu->kvm->stat.mmu_cache_miss; |
4db35314 AK |
847 | sp = kvm_mmu_alloc_page(vcpu, parent_pte); |
848 | if (!sp) | |
849 | return sp; | |
b8688d51 | 850 | pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word); |
4db35314 AK |
851 | sp->gfn = gfn; |
852 | sp->role = role; | |
853 | hlist_add_head(&sp->hash_link, bucket); | |
ad312c7c | 854 | vcpu->arch.mmu.prefetch_page(vcpu, sp); |
374cbac0 | 855 | if (!metaphysical) |
4a4c9924 | 856 | rmap_write_protect(vcpu->kvm, gfn); |
4db35314 | 857 | return sp; |
cea0f0e7 AK |
858 | } |
859 | ||
90cb0529 | 860 | static void kvm_mmu_page_unlink_children(struct kvm *kvm, |
4db35314 | 861 | struct kvm_mmu_page *sp) |
a436036b | 862 | { |
697fe2e2 AK |
863 | unsigned i; |
864 | u64 *pt; | |
865 | u64 ent; | |
866 | ||
4db35314 | 867 | pt = sp->spt; |
697fe2e2 | 868 | |
4db35314 | 869 | if (sp->role.level == PT_PAGE_TABLE_LEVEL) { |
697fe2e2 | 870 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { |
c7addb90 | 871 | if (is_shadow_present_pte(pt[i])) |
290fc38d | 872 | rmap_remove(kvm, &pt[i]); |
c7addb90 | 873 | pt[i] = shadow_trap_nonpresent_pte; |
697fe2e2 | 874 | } |
90cb0529 | 875 | kvm_flush_remote_tlbs(kvm); |
697fe2e2 AK |
876 | return; |
877 | } | |
878 | ||
879 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
880 | ent = pt[i]; | |
881 | ||
05da4558 MT |
882 | if (is_shadow_present_pte(ent)) { |
883 | if (!is_large_pte(ent)) { | |
884 | ent &= PT64_BASE_ADDR_MASK; | |
885 | mmu_page_remove_parent_pte(page_header(ent), | |
886 | &pt[i]); | |
887 | } else { | |
888 | --kvm->stat.lpages; | |
889 | rmap_remove(kvm, &pt[i]); | |
890 | } | |
891 | } | |
c7addb90 | 892 | pt[i] = shadow_trap_nonpresent_pte; |
697fe2e2 | 893 | } |
90cb0529 | 894 | kvm_flush_remote_tlbs(kvm); |
a436036b AK |
895 | } |
896 | ||
4db35314 | 897 | static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte) |
cea0f0e7 | 898 | { |
4db35314 | 899 | mmu_page_remove_parent_pte(sp, parent_pte); |
a436036b AK |
900 | } |
901 | ||
12b7d28f AK |
902 | static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm) |
903 | { | |
904 | int i; | |
905 | ||
906 | for (i = 0; i < KVM_MAX_VCPUS; ++i) | |
907 | if (kvm->vcpus[i]) | |
ad312c7c | 908 | kvm->vcpus[i]->arch.last_pte_updated = NULL; |
12b7d28f AK |
909 | } |
910 | ||
4db35314 | 911 | static void kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp) |
a436036b AK |
912 | { |
913 | u64 *parent_pte; | |
914 | ||
4cee5764 | 915 | ++kvm->stat.mmu_shadow_zapped; |
4db35314 AK |
916 | while (sp->multimapped || sp->parent_pte) { |
917 | if (!sp->multimapped) | |
918 | parent_pte = sp->parent_pte; | |
a436036b AK |
919 | else { |
920 | struct kvm_pte_chain *chain; | |
921 | ||
4db35314 | 922 | chain = container_of(sp->parent_ptes.first, |
a436036b AK |
923 | struct kvm_pte_chain, link); |
924 | parent_pte = chain->parent_ptes[0]; | |
925 | } | |
697fe2e2 | 926 | BUG_ON(!parent_pte); |
4db35314 | 927 | kvm_mmu_put_page(sp, parent_pte); |
c7addb90 | 928 | set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte); |
a436036b | 929 | } |
4db35314 AK |
930 | kvm_mmu_page_unlink_children(kvm, sp); |
931 | if (!sp->root_count) { | |
05da4558 MT |
932 | if (!sp->role.metaphysical) |
933 | unaccount_shadowed(kvm, sp->gfn); | |
4db35314 AK |
934 | hlist_del(&sp->hash_link); |
935 | kvm_mmu_free_page(kvm, sp); | |
2e53d63a | 936 | } else { |
f05e70ac | 937 | list_move(&sp->link, &kvm->arch.active_mmu_pages); |
2e53d63a MT |
938 | sp->role.invalid = 1; |
939 | kvm_reload_remote_mmus(kvm); | |
940 | } | |
12b7d28f | 941 | kvm_mmu_reset_last_pte_updated(kvm); |
a436036b AK |
942 | } |
943 | ||
82ce2c96 IE |
944 | /* |
945 | * Changing the number of mmu pages allocated to the vm | |
946 | * Note: if kvm_nr_mmu_pages is too small, you will get dead lock | |
947 | */ | |
948 | void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages) | |
949 | { | |
950 | /* | |
951 | * If we set the number of mmu pages to be smaller be than the | |
952 | * number of actived pages , we must to free some mmu pages before we | |
953 | * change the value | |
954 | */ | |
955 | ||
f05e70ac | 956 | if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) > |
82ce2c96 | 957 | kvm_nr_mmu_pages) { |
f05e70ac ZX |
958 | int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages |
959 | - kvm->arch.n_free_mmu_pages; | |
82ce2c96 IE |
960 | |
961 | while (n_used_mmu_pages > kvm_nr_mmu_pages) { | |
962 | struct kvm_mmu_page *page; | |
963 | ||
f05e70ac | 964 | page = container_of(kvm->arch.active_mmu_pages.prev, |
82ce2c96 IE |
965 | struct kvm_mmu_page, link); |
966 | kvm_mmu_zap_page(kvm, page); | |
967 | n_used_mmu_pages--; | |
968 | } | |
f05e70ac | 969 | kvm->arch.n_free_mmu_pages = 0; |
82ce2c96 IE |
970 | } |
971 | else | |
f05e70ac ZX |
972 | kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages |
973 | - kvm->arch.n_alloc_mmu_pages; | |
82ce2c96 | 974 | |
f05e70ac | 975 | kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages; |
82ce2c96 IE |
976 | } |
977 | ||
f67a46f4 | 978 | static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn) |
a436036b AK |
979 | { |
980 | unsigned index; | |
981 | struct hlist_head *bucket; | |
4db35314 | 982 | struct kvm_mmu_page *sp; |
a436036b AK |
983 | struct hlist_node *node, *n; |
984 | int r; | |
985 | ||
b8688d51 | 986 | pgprintk("%s: looking for gfn %lx\n", __func__, gfn); |
a436036b | 987 | r = 0; |
1ae0a13d | 988 | index = kvm_page_table_hashfn(gfn); |
f05e70ac | 989 | bucket = &kvm->arch.mmu_page_hash[index]; |
4db35314 AK |
990 | hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) |
991 | if (sp->gfn == gfn && !sp->role.metaphysical) { | |
b8688d51 | 992 | pgprintk("%s: gfn %lx role %x\n", __func__, gfn, |
4db35314 AK |
993 | sp->role.word); |
994 | kvm_mmu_zap_page(kvm, sp); | |
a436036b AK |
995 | r = 1; |
996 | } | |
997 | return r; | |
cea0f0e7 AK |
998 | } |
999 | ||
f67a46f4 | 1000 | static void mmu_unshadow(struct kvm *kvm, gfn_t gfn) |
97a0a01e | 1001 | { |
4db35314 | 1002 | struct kvm_mmu_page *sp; |
97a0a01e | 1003 | |
4db35314 | 1004 | while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) { |
b8688d51 | 1005 | pgprintk("%s: zap %lx %x\n", __func__, gfn, sp->role.word); |
4db35314 | 1006 | kvm_mmu_zap_page(kvm, sp); |
97a0a01e AK |
1007 | } |
1008 | } | |
1009 | ||
38c335f1 | 1010 | static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn) |
6aa8b732 | 1011 | { |
38c335f1 | 1012 | int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn)); |
4db35314 | 1013 | struct kvm_mmu_page *sp = page_header(__pa(pte)); |
6aa8b732 | 1014 | |
4db35314 | 1015 | __set_bit(slot, &sp->slot_bitmap); |
6aa8b732 AK |
1016 | } |
1017 | ||
039576c0 AK |
1018 | struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva) |
1019 | { | |
72dc67a6 IE |
1020 | struct page *page; |
1021 | ||
ad312c7c | 1022 | gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva); |
039576c0 AK |
1023 | |
1024 | if (gpa == UNMAPPED_GVA) | |
1025 | return NULL; | |
72dc67a6 IE |
1026 | |
1027 | down_read(¤t->mm->mmap_sem); | |
1028 | page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT); | |
1029 | up_read(¤t->mm->mmap_sem); | |
1030 | ||
1031 | return page; | |
039576c0 AK |
1032 | } |
1033 | ||
1c4f1fd6 AK |
1034 | static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte, |
1035 | unsigned pt_access, unsigned pte_access, | |
1036 | int user_fault, int write_fault, int dirty, | |
05da4558 | 1037 | int *ptwrite, int largepage, gfn_t gfn, |
947da538 | 1038 | struct page *page, bool speculative) |
1c4f1fd6 AK |
1039 | { |
1040 | u64 spte; | |
15aaa819 | 1041 | int was_rmapped = 0; |
75e68e60 | 1042 | int was_writeble = is_writeble_pte(*shadow_pte); |
1c4f1fd6 | 1043 | |
bc750ba8 | 1044 | pgprintk("%s: spte %llx access %x write_fault %d" |
1c4f1fd6 | 1045 | " user_fault %d gfn %lx\n", |
b8688d51 | 1046 | __func__, *shadow_pte, pt_access, |
1c4f1fd6 AK |
1047 | write_fault, user_fault, gfn); |
1048 | ||
15aaa819 | 1049 | if (is_rmap_pte(*shadow_pte)) { |
05da4558 MT |
1050 | /* |
1051 | * If we overwrite a PTE page pointer with a 2MB PMD, unlink | |
1052 | * the parent of the now unreachable PTE. | |
1053 | */ | |
1054 | if (largepage && !is_large_pte(*shadow_pte)) { | |
1055 | struct kvm_mmu_page *child; | |
1056 | u64 pte = *shadow_pte; | |
1057 | ||
1058 | child = page_header(pte & PT64_BASE_ADDR_MASK); | |
1059 | mmu_page_remove_parent_pte(child, shadow_pte); | |
0b49ea86 | 1060 | } else if (page != spte_to_page(*shadow_pte)) { |
15aaa819 | 1061 | pgprintk("hfn old %lx new %lx\n", |
0b49ea86 AK |
1062 | page_to_pfn(spte_to_page(*shadow_pte)), |
1063 | page_to_pfn(page)); | |
15aaa819 | 1064 | rmap_remove(vcpu->kvm, shadow_pte); |
05da4558 MT |
1065 | } else { |
1066 | if (largepage) | |
1067 | was_rmapped = is_large_pte(*shadow_pte); | |
1068 | else | |
1069 | was_rmapped = 1; | |
15aaa819 | 1070 | } |
15aaa819 MT |
1071 | } |
1072 | ||
1c4f1fd6 AK |
1073 | /* |
1074 | * We don't set the accessed bit, since we sometimes want to see | |
1075 | * whether the guest actually used the pte (in order to detect | |
1076 | * demand paging). | |
1077 | */ | |
1078 | spte = PT_PRESENT_MASK | PT_DIRTY_MASK; | |
947da538 AK |
1079 | if (!speculative) |
1080 | pte_access |= PT_ACCESSED_MASK; | |
1c4f1fd6 AK |
1081 | if (!dirty) |
1082 | pte_access &= ~ACC_WRITE_MASK; | |
1083 | if (!(pte_access & ACC_EXEC_MASK)) | |
1084 | spte |= PT64_NX_MASK; | |
1085 | ||
1c4f1fd6 AK |
1086 | spte |= PT_PRESENT_MASK; |
1087 | if (pte_access & ACC_USER_MASK) | |
1088 | spte |= PT_USER_MASK; | |
05da4558 MT |
1089 | if (largepage) |
1090 | spte |= PT_PAGE_SIZE_MASK; | |
1c4f1fd6 | 1091 | |
1c4f1fd6 AK |
1092 | spte |= page_to_phys(page); |
1093 | ||
1094 | if ((pte_access & ACC_WRITE_MASK) | |
1095 | || (write_fault && !is_write_protection(vcpu) && !user_fault)) { | |
1096 | struct kvm_mmu_page *shadow; | |
1097 | ||
1098 | spte |= PT_WRITABLE_MASK; | |
1099 | if (user_fault) { | |
1100 | mmu_unshadow(vcpu->kvm, gfn); | |
1101 | goto unshadowed; | |
1102 | } | |
1103 | ||
1104 | shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn); | |
05da4558 MT |
1105 | if (shadow || |
1106 | (largepage && has_wrprotected_page(vcpu->kvm, gfn))) { | |
1c4f1fd6 | 1107 | pgprintk("%s: found shadow page for %lx, marking ro\n", |
b8688d51 | 1108 | __func__, gfn); |
1c4f1fd6 AK |
1109 | pte_access &= ~ACC_WRITE_MASK; |
1110 | if (is_writeble_pte(spte)) { | |
1111 | spte &= ~PT_WRITABLE_MASK; | |
1112 | kvm_x86_ops->tlb_flush(vcpu); | |
1113 | } | |
1114 | if (write_fault) | |
1115 | *ptwrite = 1; | |
1116 | } | |
1117 | } | |
1118 | ||
1119 | unshadowed: | |
1120 | ||
1121 | if (pte_access & ACC_WRITE_MASK) | |
1122 | mark_page_dirty(vcpu->kvm, gfn); | |
1123 | ||
b8688d51 | 1124 | pgprintk("%s: setting spte %llx\n", __func__, spte); |
05da4558 MT |
1125 | pgprintk("instantiating %s PTE (%s) at %d (%llx) addr %llx\n", |
1126 | (spte&PT_PAGE_SIZE_MASK)? "2MB" : "4kB", | |
1127 | (spte&PT_WRITABLE_MASK)?"RW":"R", gfn, spte, shadow_pte); | |
1c4f1fd6 | 1128 | set_shadow_pte(shadow_pte, spte); |
05da4558 MT |
1129 | if (!was_rmapped && (spte & PT_PAGE_SIZE_MASK) |
1130 | && (spte & PT_PRESENT_MASK)) | |
1131 | ++vcpu->kvm->stat.lpages; | |
1132 | ||
1c4f1fd6 AK |
1133 | page_header_update_slot(vcpu->kvm, shadow_pte, gfn); |
1134 | if (!was_rmapped) { | |
05da4558 | 1135 | rmap_add(vcpu, shadow_pte, gfn, largepage); |
1c4f1fd6 AK |
1136 | if (!is_rmap_pte(*shadow_pte)) |
1137 | kvm_release_page_clean(page); | |
75e68e60 IE |
1138 | } else { |
1139 | if (was_writeble) | |
1140 | kvm_release_page_dirty(page); | |
1141 | else | |
1142 | kvm_release_page_clean(page); | |
1c4f1fd6 | 1143 | } |
1c4f1fd6 | 1144 | if (!ptwrite || !*ptwrite) |
ad312c7c | 1145 | vcpu->arch.last_pte_updated = shadow_pte; |
1c4f1fd6 AK |
1146 | } |
1147 | ||
6aa8b732 AK |
1148 | static void nonpaging_new_cr3(struct kvm_vcpu *vcpu) |
1149 | { | |
1150 | } | |
1151 | ||
4d9976bb | 1152 | static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write, |
05da4558 MT |
1153 | int largepage, gfn_t gfn, struct page *page, |
1154 | int level) | |
6aa8b732 | 1155 | { |
ad312c7c | 1156 | hpa_t table_addr = vcpu->arch.mmu.root_hpa; |
e833240f | 1157 | int pt_write = 0; |
6aa8b732 AK |
1158 | |
1159 | for (; ; level--) { | |
1160 | u32 index = PT64_INDEX(v, level); | |
1161 | u64 *table; | |
1162 | ||
1163 | ASSERT(VALID_PAGE(table_addr)); | |
1164 | table = __va(table_addr); | |
1165 | ||
1166 | if (level == 1) { | |
e833240f | 1167 | mmu_set_spte(vcpu, &table[index], ACC_ALL, ACC_ALL, |
947da538 | 1168 | 0, write, 1, &pt_write, 0, gfn, page, false); |
05da4558 MT |
1169 | return pt_write; |
1170 | } | |
1171 | ||
1172 | if (largepage && level == 2) { | |
1173 | mmu_set_spte(vcpu, &table[index], ACC_ALL, ACC_ALL, | |
947da538 | 1174 | 0, write, 1, &pt_write, 1, gfn, page, false); |
d196e343 | 1175 | return pt_write; |
6aa8b732 AK |
1176 | } |
1177 | ||
c7addb90 | 1178 | if (table[index] == shadow_trap_nonpresent_pte) { |
25c0de2c | 1179 | struct kvm_mmu_page *new_table; |
cea0f0e7 | 1180 | gfn_t pseudo_gfn; |
6aa8b732 | 1181 | |
cea0f0e7 AK |
1182 | pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK) |
1183 | >> PAGE_SHIFT; | |
1184 | new_table = kvm_mmu_get_page(vcpu, pseudo_gfn, | |
1185 | v, level - 1, | |
f7d9c7b7 | 1186 | 1, ACC_ALL, &table[index]); |
25c0de2c | 1187 | if (!new_table) { |
6aa8b732 | 1188 | pgprintk("nonpaging_map: ENOMEM\n"); |
d7824fff | 1189 | kvm_release_page_clean(page); |
6aa8b732 AK |
1190 | return -ENOMEM; |
1191 | } | |
1192 | ||
47ad8e68 | 1193 | table[index] = __pa(new_table->spt) | PT_PRESENT_MASK |
25c0de2c | 1194 | | PT_WRITABLE_MASK | PT_USER_MASK; |
6aa8b732 AK |
1195 | } |
1196 | table_addr = table[index] & PT64_BASE_ADDR_MASK; | |
1197 | } | |
1198 | } | |
1199 | ||
10589a46 MT |
1200 | static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn) |
1201 | { | |
1202 | int r; | |
05da4558 | 1203 | int largepage = 0; |
10589a46 | 1204 | |
aaee2c94 MT |
1205 | struct page *page; |
1206 | ||
72dc67a6 IE |
1207 | down_read(&vcpu->kvm->slots_lock); |
1208 | ||
aaee2c94 | 1209 | down_read(¤t->mm->mmap_sem); |
05da4558 MT |
1210 | if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) { |
1211 | gfn &= ~(KVM_PAGES_PER_HPAGE-1); | |
1212 | largepage = 1; | |
1213 | } | |
1214 | ||
aaee2c94 | 1215 | page = gfn_to_page(vcpu->kvm, gfn); |
72dc67a6 | 1216 | up_read(¤t->mm->mmap_sem); |
aaee2c94 | 1217 | |
d196e343 AK |
1218 | /* mmio */ |
1219 | if (is_error_page(page)) { | |
1220 | kvm_release_page_clean(page); | |
1221 | up_read(&vcpu->kvm->slots_lock); | |
1222 | return 1; | |
1223 | } | |
1224 | ||
aaee2c94 | 1225 | spin_lock(&vcpu->kvm->mmu_lock); |
eb787d10 | 1226 | kvm_mmu_free_some_pages(vcpu); |
05da4558 MT |
1227 | r = __direct_map(vcpu, v, write, largepage, gfn, page, |
1228 | PT32E_ROOT_LEVEL); | |
aaee2c94 MT |
1229 | spin_unlock(&vcpu->kvm->mmu_lock); |
1230 | ||
72dc67a6 | 1231 | up_read(&vcpu->kvm->slots_lock); |
aaee2c94 | 1232 | |
10589a46 MT |
1233 | return r; |
1234 | } | |
1235 | ||
1236 | ||
c7addb90 AK |
1237 | static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu, |
1238 | struct kvm_mmu_page *sp) | |
1239 | { | |
1240 | int i; | |
1241 | ||
1242 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) | |
1243 | sp->spt[i] = shadow_trap_nonpresent_pte; | |
1244 | } | |
1245 | ||
17ac10ad AK |
1246 | static void mmu_free_roots(struct kvm_vcpu *vcpu) |
1247 | { | |
1248 | int i; | |
4db35314 | 1249 | struct kvm_mmu_page *sp; |
17ac10ad | 1250 | |
ad312c7c | 1251 | if (!VALID_PAGE(vcpu->arch.mmu.root_hpa)) |
7b53aa56 | 1252 | return; |
aaee2c94 | 1253 | spin_lock(&vcpu->kvm->mmu_lock); |
17ac10ad | 1254 | #ifdef CONFIG_X86_64 |
ad312c7c ZX |
1255 | if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) { |
1256 | hpa_t root = vcpu->arch.mmu.root_hpa; | |
17ac10ad | 1257 | |
4db35314 AK |
1258 | sp = page_header(root); |
1259 | --sp->root_count; | |
2e53d63a MT |
1260 | if (!sp->root_count && sp->role.invalid) |
1261 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
ad312c7c | 1262 | vcpu->arch.mmu.root_hpa = INVALID_PAGE; |
aaee2c94 | 1263 | spin_unlock(&vcpu->kvm->mmu_lock); |
17ac10ad AK |
1264 | return; |
1265 | } | |
1266 | #endif | |
1267 | for (i = 0; i < 4; ++i) { | |
ad312c7c | 1268 | hpa_t root = vcpu->arch.mmu.pae_root[i]; |
17ac10ad | 1269 | |
417726a3 | 1270 | if (root) { |
417726a3 | 1271 | root &= PT64_BASE_ADDR_MASK; |
4db35314 AK |
1272 | sp = page_header(root); |
1273 | --sp->root_count; | |
2e53d63a MT |
1274 | if (!sp->root_count && sp->role.invalid) |
1275 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
417726a3 | 1276 | } |
ad312c7c | 1277 | vcpu->arch.mmu.pae_root[i] = INVALID_PAGE; |
17ac10ad | 1278 | } |
aaee2c94 | 1279 | spin_unlock(&vcpu->kvm->mmu_lock); |
ad312c7c | 1280 | vcpu->arch.mmu.root_hpa = INVALID_PAGE; |
17ac10ad AK |
1281 | } |
1282 | ||
1283 | static void mmu_alloc_roots(struct kvm_vcpu *vcpu) | |
1284 | { | |
1285 | int i; | |
cea0f0e7 | 1286 | gfn_t root_gfn; |
4db35314 | 1287 | struct kvm_mmu_page *sp; |
fb72d167 | 1288 | int metaphysical = 0; |
3bb65a22 | 1289 | |
ad312c7c | 1290 | root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT; |
17ac10ad AK |
1291 | |
1292 | #ifdef CONFIG_X86_64 | |
ad312c7c ZX |
1293 | if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) { |
1294 | hpa_t root = vcpu->arch.mmu.root_hpa; | |
17ac10ad AK |
1295 | |
1296 | ASSERT(!VALID_PAGE(root)); | |
fb72d167 JR |
1297 | if (tdp_enabled) |
1298 | metaphysical = 1; | |
4db35314 | 1299 | sp = kvm_mmu_get_page(vcpu, root_gfn, 0, |
fb72d167 JR |
1300 | PT64_ROOT_LEVEL, metaphysical, |
1301 | ACC_ALL, NULL); | |
4db35314 AK |
1302 | root = __pa(sp->spt); |
1303 | ++sp->root_count; | |
ad312c7c | 1304 | vcpu->arch.mmu.root_hpa = root; |
17ac10ad AK |
1305 | return; |
1306 | } | |
1307 | #endif | |
fb72d167 JR |
1308 | metaphysical = !is_paging(vcpu); |
1309 | if (tdp_enabled) | |
1310 | metaphysical = 1; | |
17ac10ad | 1311 | for (i = 0; i < 4; ++i) { |
ad312c7c | 1312 | hpa_t root = vcpu->arch.mmu.pae_root[i]; |
17ac10ad AK |
1313 | |
1314 | ASSERT(!VALID_PAGE(root)); | |
ad312c7c ZX |
1315 | if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) { |
1316 | if (!is_present_pte(vcpu->arch.pdptrs[i])) { | |
1317 | vcpu->arch.mmu.pae_root[i] = 0; | |
417726a3 AK |
1318 | continue; |
1319 | } | |
ad312c7c ZX |
1320 | root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT; |
1321 | } else if (vcpu->arch.mmu.root_level == 0) | |
cea0f0e7 | 1322 | root_gfn = 0; |
4db35314 | 1323 | sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30, |
fb72d167 | 1324 | PT32_ROOT_LEVEL, metaphysical, |
f7d9c7b7 | 1325 | ACC_ALL, NULL); |
4db35314 AK |
1326 | root = __pa(sp->spt); |
1327 | ++sp->root_count; | |
ad312c7c | 1328 | vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK; |
17ac10ad | 1329 | } |
ad312c7c | 1330 | vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root); |
17ac10ad AK |
1331 | } |
1332 | ||
6aa8b732 AK |
1333 | static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr) |
1334 | { | |
1335 | return vaddr; | |
1336 | } | |
1337 | ||
1338 | static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva, | |
3f3e7124 | 1339 | u32 error_code) |
6aa8b732 | 1340 | { |
e833240f | 1341 | gfn_t gfn; |
e2dec939 | 1342 | int r; |
6aa8b732 | 1343 | |
b8688d51 | 1344 | pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code); |
e2dec939 AK |
1345 | r = mmu_topup_memory_caches(vcpu); |
1346 | if (r) | |
1347 | return r; | |
714b93da | 1348 | |
6aa8b732 | 1349 | ASSERT(vcpu); |
ad312c7c | 1350 | ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa)); |
6aa8b732 | 1351 | |
e833240f | 1352 | gfn = gva >> PAGE_SHIFT; |
6aa8b732 | 1353 | |
e833240f AK |
1354 | return nonpaging_map(vcpu, gva & PAGE_MASK, |
1355 | error_code & PFERR_WRITE_MASK, gfn); | |
6aa8b732 AK |
1356 | } |
1357 | ||
fb72d167 JR |
1358 | static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa, |
1359 | u32 error_code) | |
1360 | { | |
1361 | struct page *page; | |
1362 | int r; | |
05da4558 MT |
1363 | int largepage = 0; |
1364 | gfn_t gfn = gpa >> PAGE_SHIFT; | |
fb72d167 JR |
1365 | |
1366 | ASSERT(vcpu); | |
1367 | ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa)); | |
1368 | ||
1369 | r = mmu_topup_memory_caches(vcpu); | |
1370 | if (r) | |
1371 | return r; | |
1372 | ||
1373 | down_read(¤t->mm->mmap_sem); | |
05da4558 MT |
1374 | if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) { |
1375 | gfn &= ~(KVM_PAGES_PER_HPAGE-1); | |
1376 | largepage = 1; | |
1377 | } | |
1378 | page = gfn_to_page(vcpu->kvm, gfn); | |
fb72d167 JR |
1379 | if (is_error_page(page)) { |
1380 | kvm_release_page_clean(page); | |
1381 | up_read(¤t->mm->mmap_sem); | |
1382 | return 1; | |
1383 | } | |
1384 | spin_lock(&vcpu->kvm->mmu_lock); | |
1385 | kvm_mmu_free_some_pages(vcpu); | |
1386 | r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK, | |
05da4558 | 1387 | largepage, gfn, page, TDP_ROOT_LEVEL); |
fb72d167 JR |
1388 | spin_unlock(&vcpu->kvm->mmu_lock); |
1389 | up_read(¤t->mm->mmap_sem); | |
1390 | ||
1391 | return r; | |
1392 | } | |
1393 | ||
6aa8b732 AK |
1394 | static void nonpaging_free(struct kvm_vcpu *vcpu) |
1395 | { | |
17ac10ad | 1396 | mmu_free_roots(vcpu); |
6aa8b732 AK |
1397 | } |
1398 | ||
1399 | static int nonpaging_init_context(struct kvm_vcpu *vcpu) | |
1400 | { | |
ad312c7c | 1401 | struct kvm_mmu *context = &vcpu->arch.mmu; |
6aa8b732 AK |
1402 | |
1403 | context->new_cr3 = nonpaging_new_cr3; | |
1404 | context->page_fault = nonpaging_page_fault; | |
6aa8b732 AK |
1405 | context->gva_to_gpa = nonpaging_gva_to_gpa; |
1406 | context->free = nonpaging_free; | |
c7addb90 | 1407 | context->prefetch_page = nonpaging_prefetch_page; |
cea0f0e7 | 1408 | context->root_level = 0; |
6aa8b732 | 1409 | context->shadow_root_level = PT32E_ROOT_LEVEL; |
17c3ba9d | 1410 | context->root_hpa = INVALID_PAGE; |
6aa8b732 AK |
1411 | return 0; |
1412 | } | |
1413 | ||
d835dfec | 1414 | void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu) |
6aa8b732 | 1415 | { |
1165f5fe | 1416 | ++vcpu->stat.tlb_flush; |
cbdd1bea | 1417 | kvm_x86_ops->tlb_flush(vcpu); |
6aa8b732 AK |
1418 | } |
1419 | ||
1420 | static void paging_new_cr3(struct kvm_vcpu *vcpu) | |
1421 | { | |
b8688d51 | 1422 | pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3); |
cea0f0e7 | 1423 | mmu_free_roots(vcpu); |
6aa8b732 AK |
1424 | } |
1425 | ||
6aa8b732 AK |
1426 | static void inject_page_fault(struct kvm_vcpu *vcpu, |
1427 | u64 addr, | |
1428 | u32 err_code) | |
1429 | { | |
c3c91fee | 1430 | kvm_inject_page_fault(vcpu, addr, err_code); |
6aa8b732 AK |
1431 | } |
1432 | ||
6aa8b732 AK |
1433 | static void paging_free(struct kvm_vcpu *vcpu) |
1434 | { | |
1435 | nonpaging_free(vcpu); | |
1436 | } | |
1437 | ||
1438 | #define PTTYPE 64 | |
1439 | #include "paging_tmpl.h" | |
1440 | #undef PTTYPE | |
1441 | ||
1442 | #define PTTYPE 32 | |
1443 | #include "paging_tmpl.h" | |
1444 | #undef PTTYPE | |
1445 | ||
17ac10ad | 1446 | static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level) |
6aa8b732 | 1447 | { |
ad312c7c | 1448 | struct kvm_mmu *context = &vcpu->arch.mmu; |
6aa8b732 AK |
1449 | |
1450 | ASSERT(is_pae(vcpu)); | |
1451 | context->new_cr3 = paging_new_cr3; | |
1452 | context->page_fault = paging64_page_fault; | |
6aa8b732 | 1453 | context->gva_to_gpa = paging64_gva_to_gpa; |
c7addb90 | 1454 | context->prefetch_page = paging64_prefetch_page; |
6aa8b732 | 1455 | context->free = paging_free; |
17ac10ad AK |
1456 | context->root_level = level; |
1457 | context->shadow_root_level = level; | |
17c3ba9d | 1458 | context->root_hpa = INVALID_PAGE; |
6aa8b732 AK |
1459 | return 0; |
1460 | } | |
1461 | ||
17ac10ad AK |
1462 | static int paging64_init_context(struct kvm_vcpu *vcpu) |
1463 | { | |
1464 | return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL); | |
1465 | } | |
1466 | ||
6aa8b732 AK |
1467 | static int paging32_init_context(struct kvm_vcpu *vcpu) |
1468 | { | |
ad312c7c | 1469 | struct kvm_mmu *context = &vcpu->arch.mmu; |
6aa8b732 AK |
1470 | |
1471 | context->new_cr3 = paging_new_cr3; | |
1472 | context->page_fault = paging32_page_fault; | |
6aa8b732 AK |
1473 | context->gva_to_gpa = paging32_gva_to_gpa; |
1474 | context->free = paging_free; | |
c7addb90 | 1475 | context->prefetch_page = paging32_prefetch_page; |
6aa8b732 AK |
1476 | context->root_level = PT32_ROOT_LEVEL; |
1477 | context->shadow_root_level = PT32E_ROOT_LEVEL; | |
17c3ba9d | 1478 | context->root_hpa = INVALID_PAGE; |
6aa8b732 AK |
1479 | return 0; |
1480 | } | |
1481 | ||
1482 | static int paging32E_init_context(struct kvm_vcpu *vcpu) | |
1483 | { | |
17ac10ad | 1484 | return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL); |
6aa8b732 AK |
1485 | } |
1486 | ||
fb72d167 JR |
1487 | static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu) |
1488 | { | |
1489 | struct kvm_mmu *context = &vcpu->arch.mmu; | |
1490 | ||
1491 | context->new_cr3 = nonpaging_new_cr3; | |
1492 | context->page_fault = tdp_page_fault; | |
1493 | context->free = nonpaging_free; | |
1494 | context->prefetch_page = nonpaging_prefetch_page; | |
1495 | context->shadow_root_level = TDP_ROOT_LEVEL; | |
1496 | context->root_hpa = INVALID_PAGE; | |
1497 | ||
1498 | if (!is_paging(vcpu)) { | |
1499 | context->gva_to_gpa = nonpaging_gva_to_gpa; | |
1500 | context->root_level = 0; | |
1501 | } else if (is_long_mode(vcpu)) { | |
1502 | context->gva_to_gpa = paging64_gva_to_gpa; | |
1503 | context->root_level = PT64_ROOT_LEVEL; | |
1504 | } else if (is_pae(vcpu)) { | |
1505 | context->gva_to_gpa = paging64_gva_to_gpa; | |
1506 | context->root_level = PT32E_ROOT_LEVEL; | |
1507 | } else { | |
1508 | context->gva_to_gpa = paging32_gva_to_gpa; | |
1509 | context->root_level = PT32_ROOT_LEVEL; | |
1510 | } | |
1511 | ||
1512 | return 0; | |
1513 | } | |
1514 | ||
1515 | static int init_kvm_softmmu(struct kvm_vcpu *vcpu) | |
6aa8b732 AK |
1516 | { |
1517 | ASSERT(vcpu); | |
ad312c7c | 1518 | ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa)); |
6aa8b732 AK |
1519 | |
1520 | if (!is_paging(vcpu)) | |
1521 | return nonpaging_init_context(vcpu); | |
a9058ecd | 1522 | else if (is_long_mode(vcpu)) |
6aa8b732 AK |
1523 | return paging64_init_context(vcpu); |
1524 | else if (is_pae(vcpu)) | |
1525 | return paging32E_init_context(vcpu); | |
1526 | else | |
1527 | return paging32_init_context(vcpu); | |
1528 | } | |
1529 | ||
fb72d167 JR |
1530 | static int init_kvm_mmu(struct kvm_vcpu *vcpu) |
1531 | { | |
1532 | if (tdp_enabled) | |
1533 | return init_kvm_tdp_mmu(vcpu); | |
1534 | else | |
1535 | return init_kvm_softmmu(vcpu); | |
1536 | } | |
1537 | ||
6aa8b732 AK |
1538 | static void destroy_kvm_mmu(struct kvm_vcpu *vcpu) |
1539 | { | |
1540 | ASSERT(vcpu); | |
ad312c7c ZX |
1541 | if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) { |
1542 | vcpu->arch.mmu.free(vcpu); | |
1543 | vcpu->arch.mmu.root_hpa = INVALID_PAGE; | |
6aa8b732 AK |
1544 | } |
1545 | } | |
1546 | ||
1547 | int kvm_mmu_reset_context(struct kvm_vcpu *vcpu) | |
17c3ba9d AK |
1548 | { |
1549 | destroy_kvm_mmu(vcpu); | |
1550 | return init_kvm_mmu(vcpu); | |
1551 | } | |
8668a3c4 | 1552 | EXPORT_SYMBOL_GPL(kvm_mmu_reset_context); |
17c3ba9d AK |
1553 | |
1554 | int kvm_mmu_load(struct kvm_vcpu *vcpu) | |
6aa8b732 | 1555 | { |
714b93da AK |
1556 | int r; |
1557 | ||
e2dec939 | 1558 | r = mmu_topup_memory_caches(vcpu); |
17c3ba9d AK |
1559 | if (r) |
1560 | goto out; | |
aaee2c94 | 1561 | spin_lock(&vcpu->kvm->mmu_lock); |
eb787d10 | 1562 | kvm_mmu_free_some_pages(vcpu); |
17c3ba9d | 1563 | mmu_alloc_roots(vcpu); |
aaee2c94 | 1564 | spin_unlock(&vcpu->kvm->mmu_lock); |
ad312c7c | 1565 | kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa); |
17c3ba9d | 1566 | kvm_mmu_flush_tlb(vcpu); |
714b93da AK |
1567 | out: |
1568 | return r; | |
6aa8b732 | 1569 | } |
17c3ba9d AK |
1570 | EXPORT_SYMBOL_GPL(kvm_mmu_load); |
1571 | ||
1572 | void kvm_mmu_unload(struct kvm_vcpu *vcpu) | |
1573 | { | |
1574 | mmu_free_roots(vcpu); | |
1575 | } | |
6aa8b732 | 1576 | |
09072daf | 1577 | static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu, |
4db35314 | 1578 | struct kvm_mmu_page *sp, |
ac1b714e AK |
1579 | u64 *spte) |
1580 | { | |
1581 | u64 pte; | |
1582 | struct kvm_mmu_page *child; | |
1583 | ||
1584 | pte = *spte; | |
c7addb90 | 1585 | if (is_shadow_present_pte(pte)) { |
05da4558 MT |
1586 | if (sp->role.level == PT_PAGE_TABLE_LEVEL || |
1587 | is_large_pte(pte)) | |
290fc38d | 1588 | rmap_remove(vcpu->kvm, spte); |
ac1b714e AK |
1589 | else { |
1590 | child = page_header(pte & PT64_BASE_ADDR_MASK); | |
90cb0529 | 1591 | mmu_page_remove_parent_pte(child, spte); |
ac1b714e AK |
1592 | } |
1593 | } | |
c7addb90 | 1594 | set_shadow_pte(spte, shadow_trap_nonpresent_pte); |
05da4558 MT |
1595 | if (is_large_pte(pte)) |
1596 | --vcpu->kvm->stat.lpages; | |
ac1b714e AK |
1597 | } |
1598 | ||
0028425f | 1599 | static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu, |
4db35314 | 1600 | struct kvm_mmu_page *sp, |
0028425f | 1601 | u64 *spte, |
489f1d65 | 1602 | const void *new) |
0028425f | 1603 | { |
05da4558 MT |
1604 | if ((sp->role.level != PT_PAGE_TABLE_LEVEL) |
1605 | && !vcpu->arch.update_pte.largepage) { | |
4cee5764 | 1606 | ++vcpu->kvm->stat.mmu_pde_zapped; |
0028425f | 1607 | return; |
4cee5764 | 1608 | } |
0028425f | 1609 | |
4cee5764 | 1610 | ++vcpu->kvm->stat.mmu_pte_updated; |
4db35314 | 1611 | if (sp->role.glevels == PT32_ROOT_LEVEL) |
489f1d65 | 1612 | paging32_update_pte(vcpu, sp, spte, new); |
0028425f | 1613 | else |
489f1d65 | 1614 | paging64_update_pte(vcpu, sp, spte, new); |
0028425f AK |
1615 | } |
1616 | ||
79539cec AK |
1617 | static bool need_remote_flush(u64 old, u64 new) |
1618 | { | |
1619 | if (!is_shadow_present_pte(old)) | |
1620 | return false; | |
1621 | if (!is_shadow_present_pte(new)) | |
1622 | return true; | |
1623 | if ((old ^ new) & PT64_BASE_ADDR_MASK) | |
1624 | return true; | |
1625 | old ^= PT64_NX_MASK; | |
1626 | new ^= PT64_NX_MASK; | |
1627 | return (old & ~new & PT64_PERM_MASK) != 0; | |
1628 | } | |
1629 | ||
1630 | static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new) | |
1631 | { | |
1632 | if (need_remote_flush(old, new)) | |
1633 | kvm_flush_remote_tlbs(vcpu->kvm); | |
1634 | else | |
1635 | kvm_mmu_flush_tlb(vcpu); | |
1636 | } | |
1637 | ||
12b7d28f AK |
1638 | static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu) |
1639 | { | |
ad312c7c | 1640 | u64 *spte = vcpu->arch.last_pte_updated; |
12b7d28f AK |
1641 | |
1642 | return !!(spte && (*spte & PT_ACCESSED_MASK)); | |
1643 | } | |
1644 | ||
d7824fff AK |
1645 | static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, |
1646 | const u8 *new, int bytes) | |
1647 | { | |
1648 | gfn_t gfn; | |
1649 | int r; | |
1650 | u64 gpte = 0; | |
72dc67a6 | 1651 | struct page *page; |
d7824fff | 1652 | |
05da4558 MT |
1653 | vcpu->arch.update_pte.largepage = 0; |
1654 | ||
d7824fff AK |
1655 | if (bytes != 4 && bytes != 8) |
1656 | return; | |
1657 | ||
1658 | /* | |
1659 | * Assume that the pte write on a page table of the same type | |
1660 | * as the current vcpu paging mode. This is nearly always true | |
1661 | * (might be false while changing modes). Note it is verified later | |
1662 | * by update_pte(). | |
1663 | */ | |
1664 | if (is_pae(vcpu)) { | |
1665 | /* Handle a 32-bit guest writing two halves of a 64-bit gpte */ | |
1666 | if ((bytes == 4) && (gpa % 4 == 0)) { | |
1667 | r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8); | |
1668 | if (r) | |
1669 | return; | |
1670 | memcpy((void *)&gpte + (gpa % 8), new, 4); | |
1671 | } else if ((bytes == 8) && (gpa % 8 == 0)) { | |
1672 | memcpy((void *)&gpte, new, 8); | |
1673 | } | |
1674 | } else { | |
1675 | if ((bytes == 4) && (gpa % 4 == 0)) | |
1676 | memcpy((void *)&gpte, new, 4); | |
1677 | } | |
1678 | if (!is_present_pte(gpte)) | |
1679 | return; | |
1680 | gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT; | |
72dc67a6 | 1681 | |
05da4558 MT |
1682 | down_read(¤t->mm->mmap_sem); |
1683 | if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) { | |
1684 | gfn &= ~(KVM_PAGES_PER_HPAGE-1); | |
1685 | vcpu->arch.update_pte.largepage = 1; | |
1686 | } | |
72dc67a6 | 1687 | page = gfn_to_page(vcpu->kvm, gfn); |
05da4558 | 1688 | up_read(¤t->mm->mmap_sem); |
72dc67a6 | 1689 | |
d196e343 AK |
1690 | if (is_error_page(page)) { |
1691 | kvm_release_page_clean(page); | |
1692 | return; | |
1693 | } | |
d7824fff | 1694 | vcpu->arch.update_pte.gfn = gfn; |
e48bb497 | 1695 | vcpu->arch.update_pte.page = page; |
d7824fff AK |
1696 | } |
1697 | ||
09072daf | 1698 | void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, |
fe551881 | 1699 | const u8 *new, int bytes) |
da4a00f0 | 1700 | { |
9b7a0325 | 1701 | gfn_t gfn = gpa >> PAGE_SHIFT; |
4db35314 | 1702 | struct kvm_mmu_page *sp; |
0e7bc4b9 | 1703 | struct hlist_node *node, *n; |
9b7a0325 AK |
1704 | struct hlist_head *bucket; |
1705 | unsigned index; | |
489f1d65 | 1706 | u64 entry, gentry; |
9b7a0325 | 1707 | u64 *spte; |
9b7a0325 | 1708 | unsigned offset = offset_in_page(gpa); |
0e7bc4b9 | 1709 | unsigned pte_size; |
9b7a0325 | 1710 | unsigned page_offset; |
0e7bc4b9 | 1711 | unsigned misaligned; |
fce0657f | 1712 | unsigned quadrant; |
9b7a0325 | 1713 | int level; |
86a5ba02 | 1714 | int flooded = 0; |
ac1b714e | 1715 | int npte; |
489f1d65 | 1716 | int r; |
9b7a0325 | 1717 | |
b8688d51 | 1718 | pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes); |
d7824fff | 1719 | mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes); |
aaee2c94 | 1720 | spin_lock(&vcpu->kvm->mmu_lock); |
eb787d10 | 1721 | kvm_mmu_free_some_pages(vcpu); |
4cee5764 | 1722 | ++vcpu->kvm->stat.mmu_pte_write; |
c7addb90 | 1723 | kvm_mmu_audit(vcpu, "pre pte write"); |
ad312c7c | 1724 | if (gfn == vcpu->arch.last_pt_write_gfn |
12b7d28f | 1725 | && !last_updated_pte_accessed(vcpu)) { |
ad312c7c ZX |
1726 | ++vcpu->arch.last_pt_write_count; |
1727 | if (vcpu->arch.last_pt_write_count >= 3) | |
86a5ba02 AK |
1728 | flooded = 1; |
1729 | } else { | |
ad312c7c ZX |
1730 | vcpu->arch.last_pt_write_gfn = gfn; |
1731 | vcpu->arch.last_pt_write_count = 1; | |
1732 | vcpu->arch.last_pte_updated = NULL; | |
86a5ba02 | 1733 | } |
1ae0a13d | 1734 | index = kvm_page_table_hashfn(gfn); |
f05e70ac | 1735 | bucket = &vcpu->kvm->arch.mmu_page_hash[index]; |
4db35314 AK |
1736 | hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) { |
1737 | if (sp->gfn != gfn || sp->role.metaphysical) | |
9b7a0325 | 1738 | continue; |
4db35314 | 1739 | pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8; |
0e7bc4b9 | 1740 | misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1); |
e925c5ba | 1741 | misaligned |= bytes < 4; |
86a5ba02 | 1742 | if (misaligned || flooded) { |
0e7bc4b9 AK |
1743 | /* |
1744 | * Misaligned accesses are too much trouble to fix | |
1745 | * up; also, they usually indicate a page is not used | |
1746 | * as a page table. | |
86a5ba02 AK |
1747 | * |
1748 | * If we're seeing too many writes to a page, | |
1749 | * it may no longer be a page table, or we may be | |
1750 | * forking, in which case it is better to unmap the | |
1751 | * page. | |
0e7bc4b9 AK |
1752 | */ |
1753 | pgprintk("misaligned: gpa %llx bytes %d role %x\n", | |
4db35314 AK |
1754 | gpa, bytes, sp->role.word); |
1755 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
4cee5764 | 1756 | ++vcpu->kvm->stat.mmu_flooded; |
0e7bc4b9 AK |
1757 | continue; |
1758 | } | |
9b7a0325 | 1759 | page_offset = offset; |
4db35314 | 1760 | level = sp->role.level; |
ac1b714e | 1761 | npte = 1; |
4db35314 | 1762 | if (sp->role.glevels == PT32_ROOT_LEVEL) { |
ac1b714e AK |
1763 | page_offset <<= 1; /* 32->64 */ |
1764 | /* | |
1765 | * A 32-bit pde maps 4MB while the shadow pdes map | |
1766 | * only 2MB. So we need to double the offset again | |
1767 | * and zap two pdes instead of one. | |
1768 | */ | |
1769 | if (level == PT32_ROOT_LEVEL) { | |
6b8d0f9b | 1770 | page_offset &= ~7; /* kill rounding error */ |
ac1b714e AK |
1771 | page_offset <<= 1; |
1772 | npte = 2; | |
1773 | } | |
fce0657f | 1774 | quadrant = page_offset >> PAGE_SHIFT; |
9b7a0325 | 1775 | page_offset &= ~PAGE_MASK; |
4db35314 | 1776 | if (quadrant != sp->role.quadrant) |
fce0657f | 1777 | continue; |
9b7a0325 | 1778 | } |
4db35314 | 1779 | spte = &sp->spt[page_offset / sizeof(*spte)]; |
489f1d65 DE |
1780 | if ((gpa & (pte_size - 1)) || (bytes < pte_size)) { |
1781 | gentry = 0; | |
1782 | r = kvm_read_guest_atomic(vcpu->kvm, | |
1783 | gpa & ~(u64)(pte_size - 1), | |
1784 | &gentry, pte_size); | |
1785 | new = (const void *)&gentry; | |
1786 | if (r < 0) | |
1787 | new = NULL; | |
1788 | } | |
ac1b714e | 1789 | while (npte--) { |
79539cec | 1790 | entry = *spte; |
4db35314 | 1791 | mmu_pte_write_zap_pte(vcpu, sp, spte); |
489f1d65 DE |
1792 | if (new) |
1793 | mmu_pte_write_new_pte(vcpu, sp, spte, new); | |
79539cec | 1794 | mmu_pte_write_flush_tlb(vcpu, entry, *spte); |
ac1b714e | 1795 | ++spte; |
9b7a0325 | 1796 | } |
9b7a0325 | 1797 | } |
c7addb90 | 1798 | kvm_mmu_audit(vcpu, "post pte write"); |
aaee2c94 | 1799 | spin_unlock(&vcpu->kvm->mmu_lock); |
d7824fff AK |
1800 | if (vcpu->arch.update_pte.page) { |
1801 | kvm_release_page_clean(vcpu->arch.update_pte.page); | |
1802 | vcpu->arch.update_pte.page = NULL; | |
1803 | } | |
da4a00f0 AK |
1804 | } |
1805 | ||
a436036b AK |
1806 | int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva) |
1807 | { | |
10589a46 MT |
1808 | gpa_t gpa; |
1809 | int r; | |
a436036b | 1810 | |
72dc67a6 | 1811 | down_read(&vcpu->kvm->slots_lock); |
10589a46 | 1812 | gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva); |
72dc67a6 | 1813 | up_read(&vcpu->kvm->slots_lock); |
10589a46 | 1814 | |
aaee2c94 | 1815 | spin_lock(&vcpu->kvm->mmu_lock); |
10589a46 | 1816 | r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT); |
aaee2c94 | 1817 | spin_unlock(&vcpu->kvm->mmu_lock); |
10589a46 | 1818 | return r; |
a436036b AK |
1819 | } |
1820 | ||
22d95b12 | 1821 | void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu) |
ebeace86 | 1822 | { |
f05e70ac | 1823 | while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) { |
4db35314 | 1824 | struct kvm_mmu_page *sp; |
ebeace86 | 1825 | |
f05e70ac | 1826 | sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev, |
4db35314 AK |
1827 | struct kvm_mmu_page, link); |
1828 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
4cee5764 | 1829 | ++vcpu->kvm->stat.mmu_recycled; |
ebeace86 AK |
1830 | } |
1831 | } | |
ebeace86 | 1832 | |
3067714c AK |
1833 | int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code) |
1834 | { | |
1835 | int r; | |
1836 | enum emulation_result er; | |
1837 | ||
ad312c7c | 1838 | r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code); |
3067714c AK |
1839 | if (r < 0) |
1840 | goto out; | |
1841 | ||
1842 | if (!r) { | |
1843 | r = 1; | |
1844 | goto out; | |
1845 | } | |
1846 | ||
b733bfb5 AK |
1847 | r = mmu_topup_memory_caches(vcpu); |
1848 | if (r) | |
1849 | goto out; | |
1850 | ||
3067714c | 1851 | er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0); |
3067714c AK |
1852 | |
1853 | switch (er) { | |
1854 | case EMULATE_DONE: | |
1855 | return 1; | |
1856 | case EMULATE_DO_MMIO: | |
1857 | ++vcpu->stat.mmio_exits; | |
1858 | return 0; | |
1859 | case EMULATE_FAIL: | |
1860 | kvm_report_emulation_failure(vcpu, "pagetable"); | |
1861 | return 1; | |
1862 | default: | |
1863 | BUG(); | |
1864 | } | |
1865 | out: | |
3067714c AK |
1866 | return r; |
1867 | } | |
1868 | EXPORT_SYMBOL_GPL(kvm_mmu_page_fault); | |
1869 | ||
18552672 JR |
1870 | void kvm_enable_tdp(void) |
1871 | { | |
1872 | tdp_enabled = true; | |
1873 | } | |
1874 | EXPORT_SYMBOL_GPL(kvm_enable_tdp); | |
1875 | ||
6aa8b732 AK |
1876 | static void free_mmu_pages(struct kvm_vcpu *vcpu) |
1877 | { | |
4db35314 | 1878 | struct kvm_mmu_page *sp; |
6aa8b732 | 1879 | |
f05e70ac ZX |
1880 | while (!list_empty(&vcpu->kvm->arch.active_mmu_pages)) { |
1881 | sp = container_of(vcpu->kvm->arch.active_mmu_pages.next, | |
4db35314 AK |
1882 | struct kvm_mmu_page, link); |
1883 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
f51234c2 | 1884 | } |
ad312c7c | 1885 | free_page((unsigned long)vcpu->arch.mmu.pae_root); |
6aa8b732 AK |
1886 | } |
1887 | ||
1888 | static int alloc_mmu_pages(struct kvm_vcpu *vcpu) | |
1889 | { | |
17ac10ad | 1890 | struct page *page; |
6aa8b732 AK |
1891 | int i; |
1892 | ||
1893 | ASSERT(vcpu); | |
1894 | ||
f05e70ac ZX |
1895 | if (vcpu->kvm->arch.n_requested_mmu_pages) |
1896 | vcpu->kvm->arch.n_free_mmu_pages = | |
1897 | vcpu->kvm->arch.n_requested_mmu_pages; | |
82ce2c96 | 1898 | else |
f05e70ac ZX |
1899 | vcpu->kvm->arch.n_free_mmu_pages = |
1900 | vcpu->kvm->arch.n_alloc_mmu_pages; | |
17ac10ad AK |
1901 | /* |
1902 | * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64. | |
1903 | * Therefore we need to allocate shadow page tables in the first | |
1904 | * 4GB of memory, which happens to fit the DMA32 zone. | |
1905 | */ | |
1906 | page = alloc_page(GFP_KERNEL | __GFP_DMA32); | |
1907 | if (!page) | |
1908 | goto error_1; | |
ad312c7c | 1909 | vcpu->arch.mmu.pae_root = page_address(page); |
17ac10ad | 1910 | for (i = 0; i < 4; ++i) |
ad312c7c | 1911 | vcpu->arch.mmu.pae_root[i] = INVALID_PAGE; |
17ac10ad | 1912 | |
6aa8b732 AK |
1913 | return 0; |
1914 | ||
1915 | error_1: | |
1916 | free_mmu_pages(vcpu); | |
1917 | return -ENOMEM; | |
1918 | } | |
1919 | ||
8018c27b | 1920 | int kvm_mmu_create(struct kvm_vcpu *vcpu) |
6aa8b732 | 1921 | { |
6aa8b732 | 1922 | ASSERT(vcpu); |
ad312c7c | 1923 | ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa)); |
6aa8b732 | 1924 | |
8018c27b IM |
1925 | return alloc_mmu_pages(vcpu); |
1926 | } | |
6aa8b732 | 1927 | |
8018c27b IM |
1928 | int kvm_mmu_setup(struct kvm_vcpu *vcpu) |
1929 | { | |
1930 | ASSERT(vcpu); | |
ad312c7c | 1931 | ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa)); |
2c264957 | 1932 | |
8018c27b | 1933 | return init_kvm_mmu(vcpu); |
6aa8b732 AK |
1934 | } |
1935 | ||
1936 | void kvm_mmu_destroy(struct kvm_vcpu *vcpu) | |
1937 | { | |
1938 | ASSERT(vcpu); | |
1939 | ||
1940 | destroy_kvm_mmu(vcpu); | |
1941 | free_mmu_pages(vcpu); | |
714b93da | 1942 | mmu_free_memory_caches(vcpu); |
6aa8b732 AK |
1943 | } |
1944 | ||
90cb0529 | 1945 | void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot) |
6aa8b732 | 1946 | { |
4db35314 | 1947 | struct kvm_mmu_page *sp; |
6aa8b732 | 1948 | |
f05e70ac | 1949 | list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) { |
6aa8b732 AK |
1950 | int i; |
1951 | u64 *pt; | |
1952 | ||
4db35314 | 1953 | if (!test_bit(slot, &sp->slot_bitmap)) |
6aa8b732 AK |
1954 | continue; |
1955 | ||
4db35314 | 1956 | pt = sp->spt; |
6aa8b732 AK |
1957 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) |
1958 | /* avoid RMW */ | |
9647c14c | 1959 | if (pt[i] & PT_WRITABLE_MASK) |
6aa8b732 | 1960 | pt[i] &= ~PT_WRITABLE_MASK; |
6aa8b732 AK |
1961 | } |
1962 | } | |
37a7d8b0 | 1963 | |
90cb0529 | 1964 | void kvm_mmu_zap_all(struct kvm *kvm) |
e0fa826f | 1965 | { |
4db35314 | 1966 | struct kvm_mmu_page *sp, *node; |
e0fa826f | 1967 | |
aaee2c94 | 1968 | spin_lock(&kvm->mmu_lock); |
f05e70ac | 1969 | list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link) |
4db35314 | 1970 | kvm_mmu_zap_page(kvm, sp); |
aaee2c94 | 1971 | spin_unlock(&kvm->mmu_lock); |
e0fa826f | 1972 | |
90cb0529 | 1973 | kvm_flush_remote_tlbs(kvm); |
e0fa826f DL |
1974 | } |
1975 | ||
b5a33a75 AK |
1976 | void kvm_mmu_module_exit(void) |
1977 | { | |
1978 | if (pte_chain_cache) | |
1979 | kmem_cache_destroy(pte_chain_cache); | |
1980 | if (rmap_desc_cache) | |
1981 | kmem_cache_destroy(rmap_desc_cache); | |
d3d25b04 AK |
1982 | if (mmu_page_header_cache) |
1983 | kmem_cache_destroy(mmu_page_header_cache); | |
b5a33a75 AK |
1984 | } |
1985 | ||
1986 | int kvm_mmu_module_init(void) | |
1987 | { | |
1988 | pte_chain_cache = kmem_cache_create("kvm_pte_chain", | |
1989 | sizeof(struct kvm_pte_chain), | |
20c2df83 | 1990 | 0, 0, NULL); |
b5a33a75 AK |
1991 | if (!pte_chain_cache) |
1992 | goto nomem; | |
1993 | rmap_desc_cache = kmem_cache_create("kvm_rmap_desc", | |
1994 | sizeof(struct kvm_rmap_desc), | |
20c2df83 | 1995 | 0, 0, NULL); |
b5a33a75 AK |
1996 | if (!rmap_desc_cache) |
1997 | goto nomem; | |
1998 | ||
d3d25b04 AK |
1999 | mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header", |
2000 | sizeof(struct kvm_mmu_page), | |
20c2df83 | 2001 | 0, 0, NULL); |
d3d25b04 AK |
2002 | if (!mmu_page_header_cache) |
2003 | goto nomem; | |
2004 | ||
b5a33a75 AK |
2005 | return 0; |
2006 | ||
2007 | nomem: | |
2008 | kvm_mmu_module_exit(); | |
2009 | return -ENOMEM; | |
2010 | } | |
2011 | ||
3ad82a7e ZX |
2012 | /* |
2013 | * Caculate mmu pages needed for kvm. | |
2014 | */ | |
2015 | unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm) | |
2016 | { | |
2017 | int i; | |
2018 | unsigned int nr_mmu_pages; | |
2019 | unsigned int nr_pages = 0; | |
2020 | ||
2021 | for (i = 0; i < kvm->nmemslots; i++) | |
2022 | nr_pages += kvm->memslots[i].npages; | |
2023 | ||
2024 | nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000; | |
2025 | nr_mmu_pages = max(nr_mmu_pages, | |
2026 | (unsigned int) KVM_MIN_ALLOC_MMU_PAGES); | |
2027 | ||
2028 | return nr_mmu_pages; | |
2029 | } | |
2030 | ||
2f333bcb MT |
2031 | static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer, |
2032 | unsigned len) | |
2033 | { | |
2034 | if (len > buffer->len) | |
2035 | return NULL; | |
2036 | return buffer->ptr; | |
2037 | } | |
2038 | ||
2039 | static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer, | |
2040 | unsigned len) | |
2041 | { | |
2042 | void *ret; | |
2043 | ||
2044 | ret = pv_mmu_peek_buffer(buffer, len); | |
2045 | if (!ret) | |
2046 | return ret; | |
2047 | buffer->ptr += len; | |
2048 | buffer->len -= len; | |
2049 | buffer->processed += len; | |
2050 | return ret; | |
2051 | } | |
2052 | ||
2053 | static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu, | |
2054 | gpa_t addr, gpa_t value) | |
2055 | { | |
2056 | int bytes = 8; | |
2057 | int r; | |
2058 | ||
2059 | if (!is_long_mode(vcpu) && !is_pae(vcpu)) | |
2060 | bytes = 4; | |
2061 | ||
2062 | r = mmu_topup_memory_caches(vcpu); | |
2063 | if (r) | |
2064 | return r; | |
2065 | ||
2066 | if (!__emulator_write_phys(vcpu, addr, &value, bytes)) | |
2067 | return -EFAULT; | |
2068 | ||
2069 | return 1; | |
2070 | } | |
2071 | ||
2072 | static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu) | |
2073 | { | |
2074 | kvm_x86_ops->tlb_flush(vcpu); | |
2075 | return 1; | |
2076 | } | |
2077 | ||
2078 | static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr) | |
2079 | { | |
2080 | spin_lock(&vcpu->kvm->mmu_lock); | |
2081 | mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT); | |
2082 | spin_unlock(&vcpu->kvm->mmu_lock); | |
2083 | return 1; | |
2084 | } | |
2085 | ||
2086 | static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu, | |
2087 | struct kvm_pv_mmu_op_buffer *buffer) | |
2088 | { | |
2089 | struct kvm_mmu_op_header *header; | |
2090 | ||
2091 | header = pv_mmu_peek_buffer(buffer, sizeof *header); | |
2092 | if (!header) | |
2093 | return 0; | |
2094 | switch (header->op) { | |
2095 | case KVM_MMU_OP_WRITE_PTE: { | |
2096 | struct kvm_mmu_op_write_pte *wpte; | |
2097 | ||
2098 | wpte = pv_mmu_read_buffer(buffer, sizeof *wpte); | |
2099 | if (!wpte) | |
2100 | return 0; | |
2101 | return kvm_pv_mmu_write(vcpu, wpte->pte_phys, | |
2102 | wpte->pte_val); | |
2103 | } | |
2104 | case KVM_MMU_OP_FLUSH_TLB: { | |
2105 | struct kvm_mmu_op_flush_tlb *ftlb; | |
2106 | ||
2107 | ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb); | |
2108 | if (!ftlb) | |
2109 | return 0; | |
2110 | return kvm_pv_mmu_flush_tlb(vcpu); | |
2111 | } | |
2112 | case KVM_MMU_OP_RELEASE_PT: { | |
2113 | struct kvm_mmu_op_release_pt *rpt; | |
2114 | ||
2115 | rpt = pv_mmu_read_buffer(buffer, sizeof *rpt); | |
2116 | if (!rpt) | |
2117 | return 0; | |
2118 | return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys); | |
2119 | } | |
2120 | default: return 0; | |
2121 | } | |
2122 | } | |
2123 | ||
2124 | int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes, | |
2125 | gpa_t addr, unsigned long *ret) | |
2126 | { | |
2127 | int r; | |
2128 | struct kvm_pv_mmu_op_buffer buffer; | |
2129 | ||
2130 | down_read(&vcpu->kvm->slots_lock); | |
2131 | down_read(¤t->mm->mmap_sem); | |
2132 | ||
2133 | buffer.ptr = buffer.buf; | |
2134 | buffer.len = min_t(unsigned long, bytes, sizeof buffer.buf); | |
2135 | buffer.processed = 0; | |
2136 | ||
2137 | r = kvm_read_guest(vcpu->kvm, addr, buffer.buf, buffer.len); | |
2138 | if (r) | |
2139 | goto out; | |
2140 | ||
2141 | while (buffer.len) { | |
2142 | r = kvm_pv_mmu_op_one(vcpu, &buffer); | |
2143 | if (r < 0) | |
2144 | goto out; | |
2145 | if (r == 0) | |
2146 | break; | |
2147 | } | |
2148 | ||
2149 | r = 1; | |
2150 | out: | |
2151 | *ret = buffer.processed; | |
2152 | up_read(¤t->mm->mmap_sem); | |
2153 | up_read(&vcpu->kvm->slots_lock); | |
2154 | return r; | |
2155 | } | |
2156 | ||
37a7d8b0 AK |
2157 | #ifdef AUDIT |
2158 | ||
2159 | static const char *audit_msg; | |
2160 | ||
2161 | static gva_t canonicalize(gva_t gva) | |
2162 | { | |
2163 | #ifdef CONFIG_X86_64 | |
2164 | gva = (long long)(gva << 16) >> 16; | |
2165 | #endif | |
2166 | return gva; | |
2167 | } | |
2168 | ||
2169 | static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte, | |
2170 | gva_t va, int level) | |
2171 | { | |
2172 | u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK); | |
2173 | int i; | |
2174 | gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1)); | |
2175 | ||
2176 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) { | |
2177 | u64 ent = pt[i]; | |
2178 | ||
c7addb90 | 2179 | if (ent == shadow_trap_nonpresent_pte) |
37a7d8b0 AK |
2180 | continue; |
2181 | ||
2182 | va = canonicalize(va); | |
c7addb90 AK |
2183 | if (level > 1) { |
2184 | if (ent == shadow_notrap_nonpresent_pte) | |
2185 | printk(KERN_ERR "audit: (%s) nontrapping pte" | |
2186 | " in nonleaf level: levels %d gva %lx" | |
2187 | " level %d pte %llx\n", audit_msg, | |
ad312c7c | 2188 | vcpu->arch.mmu.root_level, va, level, ent); |
c7addb90 | 2189 | |
37a7d8b0 | 2190 | audit_mappings_page(vcpu, ent, va, level - 1); |
c7addb90 | 2191 | } else { |
ad312c7c | 2192 | gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va); |
1d28f5f4 AK |
2193 | struct page *page = gpa_to_page(vcpu, gpa); |
2194 | hpa_t hpa = page_to_phys(page); | |
37a7d8b0 | 2195 | |
c7addb90 | 2196 | if (is_shadow_present_pte(ent) |
37a7d8b0 | 2197 | && (ent & PT64_BASE_ADDR_MASK) != hpa) |
c7addb90 AK |
2198 | printk(KERN_ERR "xx audit error: (%s) levels %d" |
2199 | " gva %lx gpa %llx hpa %llx ent %llx %d\n", | |
ad312c7c | 2200 | audit_msg, vcpu->arch.mmu.root_level, |
d77c26fc MD |
2201 | va, gpa, hpa, ent, |
2202 | is_shadow_present_pte(ent)); | |
c7addb90 AK |
2203 | else if (ent == shadow_notrap_nonpresent_pte |
2204 | && !is_error_hpa(hpa)) | |
2205 | printk(KERN_ERR "audit: (%s) notrap shadow," | |
2206 | " valid guest gva %lx\n", audit_msg, va); | |
b4231d61 | 2207 | kvm_release_page_clean(page); |
c7addb90 | 2208 | |
37a7d8b0 AK |
2209 | } |
2210 | } | |
2211 | } | |
2212 | ||
2213 | static void audit_mappings(struct kvm_vcpu *vcpu) | |
2214 | { | |
1ea252af | 2215 | unsigned i; |
37a7d8b0 | 2216 | |
ad312c7c ZX |
2217 | if (vcpu->arch.mmu.root_level == 4) |
2218 | audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4); | |
37a7d8b0 AK |
2219 | else |
2220 | for (i = 0; i < 4; ++i) | |
ad312c7c | 2221 | if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK) |
37a7d8b0 | 2222 | audit_mappings_page(vcpu, |
ad312c7c | 2223 | vcpu->arch.mmu.pae_root[i], |
37a7d8b0 AK |
2224 | i << 30, |
2225 | 2); | |
2226 | } | |
2227 | ||
2228 | static int count_rmaps(struct kvm_vcpu *vcpu) | |
2229 | { | |
2230 | int nmaps = 0; | |
2231 | int i, j, k; | |
2232 | ||
2233 | for (i = 0; i < KVM_MEMORY_SLOTS; ++i) { | |
2234 | struct kvm_memory_slot *m = &vcpu->kvm->memslots[i]; | |
2235 | struct kvm_rmap_desc *d; | |
2236 | ||
2237 | for (j = 0; j < m->npages; ++j) { | |
290fc38d | 2238 | unsigned long *rmapp = &m->rmap[j]; |
37a7d8b0 | 2239 | |
290fc38d | 2240 | if (!*rmapp) |
37a7d8b0 | 2241 | continue; |
290fc38d | 2242 | if (!(*rmapp & 1)) { |
37a7d8b0 AK |
2243 | ++nmaps; |
2244 | continue; | |
2245 | } | |
290fc38d | 2246 | d = (struct kvm_rmap_desc *)(*rmapp & ~1ul); |
37a7d8b0 AK |
2247 | while (d) { |
2248 | for (k = 0; k < RMAP_EXT; ++k) | |
2249 | if (d->shadow_ptes[k]) | |
2250 | ++nmaps; | |
2251 | else | |
2252 | break; | |
2253 | d = d->more; | |
2254 | } | |
2255 | } | |
2256 | } | |
2257 | return nmaps; | |
2258 | } | |
2259 | ||
2260 | static int count_writable_mappings(struct kvm_vcpu *vcpu) | |
2261 | { | |
2262 | int nmaps = 0; | |
4db35314 | 2263 | struct kvm_mmu_page *sp; |
37a7d8b0 AK |
2264 | int i; |
2265 | ||
f05e70ac | 2266 | list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) { |
4db35314 | 2267 | u64 *pt = sp->spt; |
37a7d8b0 | 2268 | |
4db35314 | 2269 | if (sp->role.level != PT_PAGE_TABLE_LEVEL) |
37a7d8b0 AK |
2270 | continue; |
2271 | ||
2272 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
2273 | u64 ent = pt[i]; | |
2274 | ||
2275 | if (!(ent & PT_PRESENT_MASK)) | |
2276 | continue; | |
2277 | if (!(ent & PT_WRITABLE_MASK)) | |
2278 | continue; | |
2279 | ++nmaps; | |
2280 | } | |
2281 | } | |
2282 | return nmaps; | |
2283 | } | |
2284 | ||
2285 | static void audit_rmap(struct kvm_vcpu *vcpu) | |
2286 | { | |
2287 | int n_rmap = count_rmaps(vcpu); | |
2288 | int n_actual = count_writable_mappings(vcpu); | |
2289 | ||
2290 | if (n_rmap != n_actual) | |
2291 | printk(KERN_ERR "%s: (%s) rmap %d actual %d\n", | |
b8688d51 | 2292 | __func__, audit_msg, n_rmap, n_actual); |
37a7d8b0 AK |
2293 | } |
2294 | ||
2295 | static void audit_write_protection(struct kvm_vcpu *vcpu) | |
2296 | { | |
4db35314 | 2297 | struct kvm_mmu_page *sp; |
290fc38d IE |
2298 | struct kvm_memory_slot *slot; |
2299 | unsigned long *rmapp; | |
2300 | gfn_t gfn; | |
37a7d8b0 | 2301 | |
f05e70ac | 2302 | list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) { |
4db35314 | 2303 | if (sp->role.metaphysical) |
37a7d8b0 AK |
2304 | continue; |
2305 | ||
4db35314 AK |
2306 | slot = gfn_to_memslot(vcpu->kvm, sp->gfn); |
2307 | gfn = unalias_gfn(vcpu->kvm, sp->gfn); | |
290fc38d IE |
2308 | rmapp = &slot->rmap[gfn - slot->base_gfn]; |
2309 | if (*rmapp) | |
37a7d8b0 AK |
2310 | printk(KERN_ERR "%s: (%s) shadow page has writable" |
2311 | " mappings: gfn %lx role %x\n", | |
b8688d51 | 2312 | __func__, audit_msg, sp->gfn, |
4db35314 | 2313 | sp->role.word); |
37a7d8b0 AK |
2314 | } |
2315 | } | |
2316 | ||
2317 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) | |
2318 | { | |
2319 | int olddbg = dbg; | |
2320 | ||
2321 | dbg = 0; | |
2322 | audit_msg = msg; | |
2323 | audit_rmap(vcpu); | |
2324 | audit_write_protection(vcpu); | |
2325 | audit_mappings(vcpu); | |
2326 | dbg = olddbg; | |
2327 | } | |
2328 | ||
2329 | #endif |