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KVM: x86: Push potential exception error code on task switches
[mirror_ubuntu-jammy-kernel.git] / arch / x86 / kvm / mmu.c
CommitLineData
6aa8b732
AK		 1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
e495606d 19
1d737c8a 20#include "mmu.h"
836a1b3c 21#include "x86.h"
6de4f3ad 22#include "kvm_cache_regs.h"
e495606d 23
edf88417 24#include <linux/kvm_host.h>
6aa8b732
AK		 25#include <linux/types.h>
26#include <linux/string.h>
6aa8b732
AK		 27#include <linux/mm.h>
28#include <linux/highmem.h>
29#include <linux/module.h>
448353ca 30#include <linux/swap.h>
05da4558 31#include <linux/hugetlb.h>
2f333bcb 32#include <linux/compiler.h>
bc6678a3 33#include <linux/srcu.h>
5a0e3ad6 34#include <linux/slab.h>
6aa8b732 35
e495606d
AK		 36#include <asm/page.h>
37#include <asm/cmpxchg.h>
4e542370 38#include <asm/io.h>
13673a90 39#include <asm/vmx.h>
6aa8b732 40
18552672
JR		 41/*
42 * When setting this variable to true it enables Two-Dimensional-Paging
43 * where the hardware walks 2 page tables:
44 * 1. the guest-virtual to guest-physical
45 * 2. while doing 1. it walks guest-physical to host-physical
46 * If the hardware supports that we don't need to do shadow paging.
47 */
2f333bcb 48bool tdp_enabled = false;
18552672 49
37a7d8b0
AK		 50#undef MMU_DEBUG
51
52#undef AUDIT
53
54#ifdef AUDIT
55static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
56#else
57static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
58#endif
59
60#ifdef MMU_DEBUG
61
62#define pgprintk(x...) do { if (dbg) printk(x); } while (0)
63#define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
64
65#else
66
67#define pgprintk(x...) do { } while (0)
68#define rmap_printk(x...) do { } while (0)
69
70#endif
71
72#if defined(MMU_DEBUG) || defined(AUDIT)
6ada8cca
AK		 73static int dbg = 0;
74module_param(dbg, bool, 0644);
37a7d8b0 75#endif
6aa8b732 76
582801a9
MT		 77static int oos_shadow = 1;
78module_param(oos_shadow, bool, 0644);
79
d6c69ee9
YD		 80#ifndef MMU_DEBUG
81#define ASSERT(x) do { } while (0)
82#else
6aa8b732
AK		 83#define ASSERT(x) \
84 if (!(x)) { \
85 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
86 __FILE__, __LINE__, #x); \
87 }
d6c69ee9 88#endif
6aa8b732 89
6aa8b732
AK		 90#define PT_FIRST_AVAIL_BITS_SHIFT 9
91#define PT64_SECOND_AVAIL_BITS_SHIFT 52
92
6aa8b732
AK		 93#define VALID_PAGE(x) ((x) != INVALID_PAGE)
94
95#define PT64_LEVEL_BITS 9
96
97#define PT64_LEVEL_SHIFT(level) \
d77c26fc 98 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
6aa8b732
AK		 99
100#define PT64_LEVEL_MASK(level) \
101 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
102
103#define PT64_INDEX(address, level)\
104 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
105
106
107#define PT32_LEVEL_BITS 10
108
109#define PT32_LEVEL_SHIFT(level) \
d77c26fc 110 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
6aa8b732
AK		 111
112#define PT32_LEVEL_MASK(level) \
113 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
e04da980
JR		 114#define PT32_LVL_OFFSET_MASK(level) \
115 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
116 * PT32_LEVEL_BITS))) - 1))
6aa8b732
AK		 117
118#define PT32_INDEX(address, level)\
119 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
120
121
27aba766 122#define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
6aa8b732
AK		 123#define PT64_DIR_BASE_ADDR_MASK \
124 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
e04da980
JR		 125#define PT64_LVL_ADDR_MASK(level) \
126 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
127 * PT64_LEVEL_BITS))) - 1))
128#define PT64_LVL_OFFSET_MASK(level) \
129 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
130 * PT64_LEVEL_BITS))) - 1))
6aa8b732
AK		 131
132#define PT32_BASE_ADDR_MASK PAGE_MASK
133#define PT32_DIR_BASE_ADDR_MASK \
134 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
e04da980
JR		 135#define PT32_LVL_ADDR_MASK(level) \
136 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
137 * PT32_LEVEL_BITS))) - 1))
6aa8b732 138
79539cec
AK		 139#define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
140 | PT64_NX_MASK)
6aa8b732 141
cd4a4e53
AK		 142#define RMAP_EXT 4
143
fe135d2c
AK		 144#define ACC_EXEC_MASK 1
145#define ACC_WRITE_MASK PT_WRITABLE_MASK
146#define ACC_USER_MASK PT_USER_MASK
147#define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
148
90bb6fc5
AK		 149#include <trace/events/kvm.h>
150
07420171
AK		 151#define CREATE_TRACE_POINTS
152#include "mmutrace.h"
153
1403283a
IE		 154#define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
155
135f8c2b
AK		 156#define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
157
cd4a4e53 158struct kvm_rmap_desc {
d555c333 159 u64 *sptes[RMAP_EXT];
cd4a4e53
AK		 160 struct kvm_rmap_desc *more;
161};
162
2d11123a
AK		 163struct kvm_shadow_walk_iterator {
164 u64 addr;
165 hpa_t shadow_addr;
166 int level;
167 u64 *sptep;
168 unsigned index;
169};
170
171#define for_each_shadow_entry(_vcpu, _addr, _walker) \
172 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
173 shadow_walk_okay(&(_walker)); \
174 shadow_walk_next(&(_walker)))
175
176
4731d4c7
MT		 177struct kvm_unsync_walk {
178 int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
179};
180
ad8cfbe3
MT		 181typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
182
b5a33a75
AK		 183static struct kmem_cache *pte_chain_cache;
184static struct kmem_cache *rmap_desc_cache;
d3d25b04 185static struct kmem_cache *mmu_page_header_cache;
b5a33a75 186
c7addb90
AK		 187static u64 __read_mostly shadow_trap_nonpresent_pte;
188static u64 __read_mostly shadow_notrap_nonpresent_pte;
7b52345e
SY		 189static u64 __read_mostly shadow_base_present_pte;
190static u64 __read_mostly shadow_nx_mask;
191static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
192static u64 __read_mostly shadow_user_mask;
193static u64 __read_mostly shadow_accessed_mask;
194static u64 __read_mostly shadow_dirty_mask;
c7addb90 195
82725b20
DE		 196static inline u64 rsvd_bits(int s, int e)
197{
198 return ((1ULL << (e - s + 1)) - 1) << s;
199}
200
c7addb90
AK		 201void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
202{
203 shadow_trap_nonpresent_pte = trap_pte;
204 shadow_notrap_nonpresent_pte = notrap_pte;
205}
206EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
207
7b52345e
SY		 208void kvm_mmu_set_base_ptes(u64 base_pte)
209{
210 shadow_base_present_pte = base_pte;
211}
212EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
213
214void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
4b12f0de 215 u64 dirty_mask, u64 nx_mask, u64 x_mask)
7b52345e
SY		 216{
217 shadow_user_mask = user_mask;
218 shadow_accessed_mask = accessed_mask;
219 shadow_dirty_mask = dirty_mask;
220 shadow_nx_mask = nx_mask;
221 shadow_x_mask = x_mask;
222}
223EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
224
6aa8b732
AK		 225static int is_write_protection(struct kvm_vcpu *vcpu)
226{
4d4ec087 227 return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
6aa8b732
AK		 228}
229
230static int is_cpuid_PSE36(void)
231{
232 return 1;
233}
234
73b1087e
AK		 235static int is_nx(struct kvm_vcpu *vcpu)
236{
f6801dff 237 return vcpu->arch.efer & EFER_NX;
73b1087e
AK		 238}
239
c7addb90
AK		 240static int is_shadow_present_pte(u64 pte)
241{
c7addb90
AK		 242 return pte != shadow_trap_nonpresent_pte
243 && pte != shadow_notrap_nonpresent_pte;
244}
245
05da4558
MT		 246static int is_large_pte(u64 pte)
247{
248 return pte & PT_PAGE_SIZE_MASK;
249}
250
8dae4445 251static int is_writable_pte(unsigned long pte)
6aa8b732
AK		 252{
253 return pte & PT_WRITABLE_MASK;
254}
255
43a3795a 256static int is_dirty_gpte(unsigned long pte)
e3c5e7ec 257{
439e218a 258 return pte & PT_DIRTY_MASK;
e3c5e7ec
AK		 259}
260
43a3795a 261static int is_rmap_spte(u64 pte)
cd4a4e53 262{
4b1a80fa 263 return is_shadow_present_pte(pte);
cd4a4e53
AK		 264}
265
776e6633
MT		 266static int is_last_spte(u64 pte, int level)
267{
268 if (level == PT_PAGE_TABLE_LEVEL)
269 return 1;
852e3c19 270 if (is_large_pte(pte))
776e6633
MT		 271 return 1;
272 return 0;
273}
274
35149e21 275static pfn_t spte_to_pfn(u64 pte)
0b49ea86 276{
35149e21 277 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
0b49ea86
AK		 278}
279
da928521
AK		 280static gfn_t pse36_gfn_delta(u32 gpte)
281{
282 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
283
284 return (gpte & PT32_DIR_PSE36_MASK) << shift;
285}
286
d555c333 287static void __set_spte(u64 *sptep, u64 spte)
e663ee64
AK		 288{
289#ifdef CONFIG_X86_64
290 set_64bit((unsigned long *)sptep, spte);
291#else
292 set_64bit((unsigned long long *)sptep, spte);
293#endif
294}
295
e2dec939 296static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
2e3e5882 297 struct kmem_cache *base_cache, int min)
714b93da
AK		 298{
299 void *obj;
300
301 if (cache->nobjs >= min)
e2dec939 302 return 0;
714b93da 303 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 304 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
714b93da 305 if (!obj)
e2dec939 306 return -ENOMEM;
714b93da
AK		 307 cache->objects[cache->nobjs++] = obj;
308 }
e2dec939 309 return 0;
714b93da
AK		 310}
311
312static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
313{
314 while (mc->nobjs)
315 kfree(mc->objects[--mc->nobjs]);
316}
317
c1158e63 318static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
2e3e5882 319 int min)
c1158e63
AK		 320{
321 struct page *page;
322
323 if (cache->nobjs >= min)
324 return 0;
325 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 326 page = alloc_page(GFP_KERNEL);
c1158e63
AK		 327 if (!page)
328 return -ENOMEM;
c1158e63
AK		 329 cache->objects[cache->nobjs++] = page_address(page);
330 }
331 return 0;
332}
333
334static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
335{
336 while (mc->nobjs)
c4d198d5 337 free_page((unsigned long)mc->objects[--mc->nobjs]);
c1158e63
AK		 338}
339
2e3e5882 340static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
714b93da 341{
e2dec939
AK		 342 int r;
343
ad312c7c 344 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
2e3e5882 345 pte_chain_cache, 4);
e2dec939
AK		 346 if (r)
347 goto out;
ad312c7c 348 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
c41ef344 349 rmap_desc_cache, 4);
d3d25b04
AK		 350 if (r)
351 goto out;
ad312c7c 352 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
d3d25b04
AK		 353 if (r)
354 goto out;
ad312c7c 355 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
2e3e5882 356 mmu_page_header_cache, 4);
e2dec939
AK		 357out:
358 return r;
714b93da
AK		 359}
360
361static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
362{
ad312c7c
ZX		 363 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
364 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
365 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
366 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
714b93da
AK		 367}
368
369static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
370 size_t size)
371{
372 void *p;
373
374 BUG_ON(!mc->nobjs);
375 p = mc->objects[--mc->nobjs];
714b93da
AK		 376 return p;
377}
378
714b93da
AK		 379static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
380{
ad312c7c 381 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
714b93da
AK		 382 sizeof(struct kvm_pte_chain));
383}
384
90cb0529 385static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
714b93da 386{
90cb0529 387 kfree(pc);
714b93da
AK		 388}
389
390static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
391{
ad312c7c 392 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
714b93da
AK		 393 sizeof(struct kvm_rmap_desc));
394}
395
90cb0529 396static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
714b93da 397{
90cb0529 398 kfree(rd);
714b93da
AK		 399}
400
05da4558
MT		 401/*
402 * Return the pointer to the largepage write count for a given
403 * gfn, handling slots that are not large page aligned.
404 */
d25797b2
JR		 405static int *slot_largepage_idx(gfn_t gfn,
406 struct kvm_memory_slot *slot,
407 int level)
05da4558
MT		 408{
409 unsigned long idx;
410
d25797b2
JR		 411 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
412 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
413 return &slot->lpage_info[level - 2][idx].write_count;
05da4558
MT		 414}
415
416static void account_shadowed(struct kvm *kvm, gfn_t gfn)
417{
d25797b2 418 struct kvm_memory_slot *slot;
05da4558 419 int *write_count;
d25797b2 420 int i;
05da4558 421
2843099f 422 gfn = unalias_gfn(kvm, gfn);
d25797b2
JR		 423
424 slot = gfn_to_memslot_unaliased(kvm, gfn);
425 for (i = PT_DIRECTORY_LEVEL;
426 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
427 write_count = slot_largepage_idx(gfn, slot, i);
428 *write_count += 1;
429 }
05da4558
MT		 430}
431
432static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
433{
d25797b2 434 struct kvm_memory_slot *slot;
05da4558 435 int *write_count;
d25797b2 436 int i;
05da4558 437
2843099f 438 gfn = unalias_gfn(kvm, gfn);
d25797b2
JR		 439 for (i = PT_DIRECTORY_LEVEL;
440 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
441 slot = gfn_to_memslot_unaliased(kvm, gfn);
442 write_count = slot_largepage_idx(gfn, slot, i);
443 *write_count -= 1;
444 WARN_ON(*write_count < 0);
445 }
05da4558
MT		 446}
447
d25797b2
JR		 448static int has_wrprotected_page(struct kvm *kvm,
449 gfn_t gfn,
450 int level)
05da4558 451{
2843099f 452 struct kvm_memory_slot *slot;
05da4558
MT		 453 int *largepage_idx;
454
2843099f
IE		 455 gfn = unalias_gfn(kvm, gfn);
456 slot = gfn_to_memslot_unaliased(kvm, gfn);
05da4558 457 if (slot) {
d25797b2 458 largepage_idx = slot_largepage_idx(gfn, slot, level);
05da4558
MT		 459 return *largepage_idx;
460 }
461
462 return 1;
463}
464
d25797b2 465static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
05da4558 466{
8f0b1ab6 467 unsigned long page_size;
d25797b2 468 int i, ret = 0;
05da4558 469
8f0b1ab6 470 page_size = kvm_host_page_size(kvm, gfn);
05da4558 471
d25797b2
JR		 472 for (i = PT_PAGE_TABLE_LEVEL;
473 i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
474 if (page_size >= KVM_HPAGE_SIZE(i))
475 ret = i;
476 else
477 break;
478 }
479
4c2155ce 480 return ret;
05da4558
MT		 481}
482
d25797b2 483static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
05da4558
MT		 484{
485 struct kvm_memory_slot *slot;
878403b7 486 int host_level, level, max_level;
05da4558
MT		 487
488 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
489 if (slot && slot->dirty_bitmap)
d25797b2 490 return PT_PAGE_TABLE_LEVEL;
05da4558 491
d25797b2
JR		 492 host_level = host_mapping_level(vcpu->kvm, large_gfn);
493
494 if (host_level == PT_PAGE_TABLE_LEVEL)
495 return host_level;
496
878403b7
SY		 497 max_level = kvm_x86_ops->get_lpage_level() < host_level ?
498 kvm_x86_ops->get_lpage_level() : host_level;
499
500 for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
d25797b2
JR		 501 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
502 break;
d25797b2
JR		 503
504 return level - 1;
05da4558
MT		 505}
506
290fc38d
IE		 507/*
508 * Take gfn and return the reverse mapping to it.
509 * Note: gfn must be unaliased before this function get called
510 */
511
44ad9944 512static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
290fc38d
IE		 513{
514 struct kvm_memory_slot *slot;
05da4558 515 unsigned long idx;
290fc38d
IE		 516
517 slot = gfn_to_memslot(kvm, gfn);
44ad9944 518 if (likely(level == PT_PAGE_TABLE_LEVEL))
05da4558
MT		 519 return &slot->rmap[gfn - slot->base_gfn];
520
44ad9944
JR		 521 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
522 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
05da4558 523
44ad9944 524 return &slot->lpage_info[level - 2][idx].rmap_pde;
290fc38d
IE		 525}
526
cd4a4e53
AK		 527/*
528 * Reverse mapping data structures:
529 *
290fc38d
IE		 530 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
531 * that points to page_address(page).
cd4a4e53 532 *
290fc38d
IE		 533 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
534 * containing more mappings.
53a27b39
MT		 535 *
536 * Returns the number of rmap entries before the spte was added or zero if
537 * the spte was not added.
538 *
cd4a4e53 539 */
44ad9944 540static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
cd4a4e53 541{
4db35314 542 struct kvm_mmu_page *sp;
cd4a4e53 543 struct kvm_rmap_desc *desc;
290fc38d 544 unsigned long *rmapp;
53a27b39 545 int i, count = 0;
cd4a4e53 546
43a3795a 547 if (!is_rmap_spte(*spte))
53a27b39 548 return count;
290fc38d 549 gfn = unalias_gfn(vcpu->kvm, gfn);
4db35314
AK		 550 sp = page_header(__pa(spte));
551 sp->gfns[spte - sp->spt] = gfn;
44ad9944 552 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
290fc38d 553 if (!*rmapp) {
cd4a4e53 554 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
290fc38d
IE		 555 *rmapp = (unsigned long)spte;
556 } else if (!(*rmapp & 1)) {
cd4a4e53 557 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
714b93da 558 desc = mmu_alloc_rmap_desc(vcpu);
d555c333
AK		 559 desc->sptes[0] = (u64 *)*rmapp;
560 desc->sptes[1] = spte;
290fc38d 561 *rmapp = (unsigned long)desc | 1;
cd4a4e53
AK		 562 } else {
563 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
290fc38d 564 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
d555c333 565 while (desc->sptes[RMAP_EXT-1] && desc->more) {
cd4a4e53 566 desc = desc->more;
53a27b39
MT		 567 count += RMAP_EXT;
568 }
d555c333 569 if (desc->sptes[RMAP_EXT-1]) {
714b93da 570 desc->more = mmu_alloc_rmap_desc(vcpu);
cd4a4e53
AK		 571 desc = desc->more;
572 }
d555c333 573 for (i = 0; desc->sptes[i]; ++i)
cd4a4e53 574 ;
d555c333 575 desc->sptes[i] = spte;
cd4a4e53 576 }
53a27b39 577 return count;
cd4a4e53
AK		 578}
579
290fc38d 580static void rmap_desc_remove_entry(unsigned long *rmapp,
cd4a4e53
AK		 581 struct kvm_rmap_desc *desc,
582 int i,
583 struct kvm_rmap_desc *prev_desc)
584{
585 int j;
586
d555c333 587 for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
cd4a4e53 588 ;
d555c333
AK		 589 desc->sptes[i] = desc->sptes[j];
590 desc->sptes[j] = NULL;
cd4a4e53
AK		 591 if (j != 0)
592 return;
593 if (!prev_desc && !desc->more)
d555c333 594 *rmapp = (unsigned long)desc->sptes[0];
cd4a4e53
AK		 595 else
596 if (prev_desc)
597 prev_desc->more = desc->more;
598 else
290fc38d 599 *rmapp = (unsigned long)desc->more | 1;
90cb0529 600 mmu_free_rmap_desc(desc);
cd4a4e53
AK		 601}
602
290fc38d 603static void rmap_remove(struct kvm *kvm, u64 *spte)
cd4a4e53 604{
cd4a4e53
AK		 605 struct kvm_rmap_desc *desc;
606 struct kvm_rmap_desc *prev_desc;
4db35314 607 struct kvm_mmu_page *sp;
35149e21 608 pfn_t pfn;
290fc38d 609 unsigned long *rmapp;
cd4a4e53
AK		 610 int i;
611
43a3795a 612 if (!is_rmap_spte(*spte))
cd4a4e53 613 return;
4db35314 614 sp = page_header(__pa(spte));
35149e21 615 pfn = spte_to_pfn(*spte);
7b52345e 616 if (*spte & shadow_accessed_mask)
35149e21 617 kvm_set_pfn_accessed(pfn);
8dae4445 618 if (is_writable_pte(*spte))
acb66dd0 619 kvm_set_pfn_dirty(pfn);
44ad9944 620 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], sp->role.level);
290fc38d 621 if (!*rmapp) {
cd4a4e53
AK		 622 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
623 BUG();
290fc38d 624 } else if (!(*rmapp & 1)) {
cd4a4e53 625 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
290fc38d 626 if ((u64 *)*rmapp != spte) {
cd4a4e53
AK		 627 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
628 spte, *spte);
629 BUG();
630 }
290fc38d 631 *rmapp = 0;
cd4a4e53
AK		 632 } else {
633 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
290fc38d 634 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
cd4a4e53
AK		 635 prev_desc = NULL;
636 while (desc) {
d555c333
AK		 637 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
638 if (desc->sptes[i] == spte) {
290fc38d 639 rmap_desc_remove_entry(rmapp,
714b93da 640 desc, i,
cd4a4e53
AK		 641 prev_desc);
642 return;
643 }
644 prev_desc = desc;
645 desc = desc->more;
646 }
186a3e52 647 pr_err("rmap_remove: %p %llx many->many\n", spte, *spte);
cd4a4e53
AK		 648 BUG();
649 }
650}
651
98348e95 652static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
374cbac0 653{
374cbac0 654 struct kvm_rmap_desc *desc;
98348e95
IE		 655 struct kvm_rmap_desc *prev_desc;
656 u64 *prev_spte;
657 int i;
658
659 if (!*rmapp)
660 return NULL;
661 else if (!(*rmapp & 1)) {
662 if (!spte)
663 return (u64 *)*rmapp;
664 return NULL;
665 }
666 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
667 prev_desc = NULL;
668 prev_spte = NULL;
669 while (desc) {
d555c333 670 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
98348e95 671 if (prev_spte == spte)
d555c333
AK		 672 return desc->sptes[i];
673 prev_spte = desc->sptes[i];
98348e95
IE		 674 }
675 desc = desc->more;
676 }
677 return NULL;
678}
679
b1a36821 680static int rmap_write_protect(struct kvm *kvm, u64 gfn)
98348e95 681{
290fc38d 682 unsigned long *rmapp;
374cbac0 683 u64 *spte;
44ad9944 684 int i, write_protected = 0;
374cbac0 685
4a4c9924 686 gfn = unalias_gfn(kvm, gfn);
44ad9944 687 rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
374cbac0 688
98348e95
IE		 689 spte = rmap_next(kvm, rmapp, NULL);
690 while (spte) {
374cbac0 691 BUG_ON(!spte);
374cbac0 692 BUG_ON(!(*spte & PT_PRESENT_MASK));
374cbac0 693 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
8dae4445 694 if (is_writable_pte(*spte)) {
d555c333 695 __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
caa5b8a5
ED		 696 write_protected = 1;
697 }
9647c14c 698 spte = rmap_next(kvm, rmapp, spte);
374cbac0 699 }
855149aa 700 if (write_protected) {
35149e21 701 pfn_t pfn;
855149aa
IE		 702
703 spte = rmap_next(kvm, rmapp, NULL);
35149e21
AL		 704 pfn = spte_to_pfn(*spte);
705 kvm_set_pfn_dirty(pfn);
855149aa
IE		 706 }
707
05da4558 708 /* check for huge page mappings */
44ad9944
JR		 709 for (i = PT_DIRECTORY_LEVEL;
710 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
711 rmapp = gfn_to_rmap(kvm, gfn, i);
712 spte = rmap_next(kvm, rmapp, NULL);
713 while (spte) {
714 BUG_ON(!spte);
715 BUG_ON(!(*spte & PT_PRESENT_MASK));
716 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
717 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
8dae4445 718 if (is_writable_pte(*spte)) {
44ad9944
JR		 719 rmap_remove(kvm, spte);
720 --kvm->stat.lpages;
721 __set_spte(spte, shadow_trap_nonpresent_pte);
722 spte = NULL;
723 write_protected = 1;
724 }
725 spte = rmap_next(kvm, rmapp, spte);
05da4558 726 }
05da4558
MT		 727 }
728
b1a36821 729 return write_protected;
374cbac0
AK		 730}
731
8a8365c5
FD		 732static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
733 unsigned long data)
e930bffe
AA		 734{
735 u64 *spte;
736 int need_tlb_flush = 0;
737
738 while ((spte = rmap_next(kvm, rmapp, NULL))) {
739 BUG_ON(!(*spte & PT_PRESENT_MASK));
740 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
741 rmap_remove(kvm, spte);
d555c333 742 __set_spte(spte, shadow_trap_nonpresent_pte);
e930bffe
AA		 743 need_tlb_flush = 1;
744 }
745 return need_tlb_flush;
746}
747
8a8365c5
FD		 748static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
749 unsigned long data)
3da0dd43
IE		 750{
751 int need_flush = 0;
752 u64 *spte, new_spte;
753 pte_t *ptep = (pte_t *)data;
754 pfn_t new_pfn;
755
756 WARN_ON(pte_huge(*ptep));
757 new_pfn = pte_pfn(*ptep);
758 spte = rmap_next(kvm, rmapp, NULL);
759 while (spte) {
760 BUG_ON(!is_shadow_present_pte(*spte));
761 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
762 need_flush = 1;
763 if (pte_write(*ptep)) {
764 rmap_remove(kvm, spte);
765 __set_spte(spte, shadow_trap_nonpresent_pte);
766 spte = rmap_next(kvm, rmapp, NULL);
767 } else {
768 new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
769 new_spte |= (u64)new_pfn << PAGE_SHIFT;
770
771 new_spte &= ~PT_WRITABLE_MASK;
772 new_spte &= ~SPTE_HOST_WRITEABLE;
8dae4445 773 if (is_writable_pte(*spte))
3da0dd43
IE		 774 kvm_set_pfn_dirty(spte_to_pfn(*spte));
775 __set_spte(spte, new_spte);
776 spte = rmap_next(kvm, rmapp, spte);
777 }
778 }
779 if (need_flush)
780 kvm_flush_remote_tlbs(kvm);
781
782 return 0;
783}
784
8a8365c5
FD		 785static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
786 unsigned long data,
3da0dd43 787 int (*handler)(struct kvm *kvm, unsigned long *rmapp,
8a8365c5 788 unsigned long data))
e930bffe 789{
852e3c19 790 int i, j;
90bb6fc5 791 int ret;
e930bffe 792 int retval = 0;
bc6678a3
MT		 793 struct kvm_memslots *slots;
794
795 slots = rcu_dereference(kvm->memslots);
e930bffe 796
46a26bf5
MT		 797 for (i = 0; i < slots->nmemslots; i++) {
798 struct kvm_memory_slot *memslot = &slots->memslots[i];
e930bffe
AA		 799 unsigned long start = memslot->userspace_addr;
800 unsigned long end;
801
e930bffe
AA		 802 end = start + (memslot->npages << PAGE_SHIFT);
803 if (hva >= start && hva < end) {
804 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
852e3c19 805
90bb6fc5 806 ret = handler(kvm, &memslot->rmap[gfn_offset], data);
852e3c19
JR		 807
808 for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
809 int idx = gfn_offset;
810 idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j);
90bb6fc5 811 ret |= handler(kvm,
3da0dd43
IE		 812 &memslot->lpage_info[j][idx].rmap_pde,
813 data);
852e3c19 814 }
90bb6fc5
AK		 815 trace_kvm_age_page(hva, memslot, ret);
816 retval |= ret;
e930bffe
AA		 817 }
818 }
819
820 return retval;
821}
822
823int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
824{
3da0dd43
IE		 825 return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
826}
827
828void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
829{
8a8365c5 830 kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
e930bffe
AA		 831}
832
8a8365c5
FD		 833static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
834 unsigned long data)
e930bffe
AA		 835{
836 u64 *spte;
837 int young = 0;
838
6316e1c8
RR		 839 /*
840 * Emulate the accessed bit for EPT, by checking if this page has
841 * an EPT mapping, and clearing it if it does. On the next access,
842 * a new EPT mapping will be established.
843 * This has some overhead, but not as much as the cost of swapping
844 * out actively used pages or breaking up actively used hugepages.
845 */
534e38b4 846 if (!shadow_accessed_mask)
6316e1c8 847 return kvm_unmap_rmapp(kvm, rmapp, data);
534e38b4 848
e930bffe
AA		 849 spte = rmap_next(kvm, rmapp, NULL);
850 while (spte) {
851 int _young;
852 u64 _spte = *spte;
853 BUG_ON(!(_spte & PT_PRESENT_MASK));
854 _young = _spte & PT_ACCESSED_MASK;
855 if (_young) {
856 young = 1;
857 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
858 }
859 spte = rmap_next(kvm, rmapp, spte);
860 }
861 return young;
862}
863
53a27b39
MT		 864#define RMAP_RECYCLE_THRESHOLD 1000
865
852e3c19 866static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
53a27b39
MT		 867{
868 unsigned long *rmapp;
852e3c19
JR		 869 struct kvm_mmu_page *sp;
870
871 sp = page_header(__pa(spte));
53a27b39
MT		 872
873 gfn = unalias_gfn(vcpu->kvm, gfn);
852e3c19 874 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
53a27b39 875
3da0dd43 876 kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
53a27b39
MT		 877 kvm_flush_remote_tlbs(vcpu->kvm);
878}
879
e930bffe
AA		 880int kvm_age_hva(struct kvm *kvm, unsigned long hva)
881{
3da0dd43 882 return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
e930bffe
AA		 883}
884
d6c69ee9 885#ifdef MMU_DEBUG
47ad8e68 886static int is_empty_shadow_page(u64 *spt)
6aa8b732 887{
139bdb2d
AK		 888 u64 *pos;
889 u64 *end;
890
47ad8e68 891 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
3c915510 892 if (is_shadow_present_pte(*pos)) {
b8688d51 893 printk(KERN_ERR "%s: %p %llx\n", __func__,
139bdb2d 894 pos, *pos);
6aa8b732 895 return 0;
139bdb2d 896 }
6aa8b732
AK		 897 return 1;
898}
d6c69ee9 899#endif
6aa8b732 900
4db35314 901static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
260746c0 902{
4db35314
AK		 903 ASSERT(is_empty_shadow_page(sp->spt));
904 list_del(&sp->link);
905 __free_page(virt_to_page(sp->spt));
906 __free_page(virt_to_page(sp->gfns));
907 kfree(sp);
f05e70ac 908 ++kvm->arch.n_free_mmu_pages;
260746c0
AK		 909}
910
cea0f0e7
AK		 911static unsigned kvm_page_table_hashfn(gfn_t gfn)
912{
1ae0a13d 913 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
cea0f0e7
AK		 914}
915
25c0de2c
AK		 916static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
917 u64 *parent_pte)
6aa8b732 918{
4db35314 919 struct kvm_mmu_page *sp;
6aa8b732 920
ad312c7c
ZX		 921 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
922 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
923 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
4db35314 924 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
f05e70ac 925 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
291f26bc 926 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
4db35314
AK		 927 sp->multimapped = 0;
928 sp->parent_pte = parent_pte;
f05e70ac 929 --vcpu->kvm->arch.n_free_mmu_pages;
4db35314 930 return sp;
6aa8b732
AK		 931}
932
714b93da 933static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
4db35314 934 struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7
AK		 935{
936 struct kvm_pte_chain *pte_chain;
937 struct hlist_node *node;
938 int i;
939
940 if (!parent_pte)
941 return;
4db35314
AK		 942 if (!sp->multimapped) {
943 u64 *old = sp->parent_pte;
cea0f0e7
AK		 944
945 if (!old) {
4db35314 946 sp->parent_pte = parent_pte;
cea0f0e7
AK		 947 return;
948 }
4db35314 949 sp->multimapped = 1;
714b93da 950 pte_chain = mmu_alloc_pte_chain(vcpu);
4db35314
AK		 951 INIT_HLIST_HEAD(&sp->parent_ptes);
952 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK		 953 pte_chain->parent_ptes[0] = old;
954 }
4db35314 955 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
cea0f0e7
AK		 956 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
957 continue;
958 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
959 if (!pte_chain->parent_ptes[i]) {
960 pte_chain->parent_ptes[i] = parent_pte;
961 return;
962 }
963 }
714b93da 964 pte_chain = mmu_alloc_pte_chain(vcpu);
cea0f0e7 965 BUG_ON(!pte_chain);
4db35314 966 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK		 967 pte_chain->parent_ptes[0] = parent_pte;
968}
969
4db35314 970static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
cea0f0e7
AK		 971 u64 *parent_pte)
972{
973 struct kvm_pte_chain *pte_chain;
974 struct hlist_node *node;
975 int i;
976
4db35314
AK		 977 if (!sp->multimapped) {
978 BUG_ON(sp->parent_pte != parent_pte);
979 sp->parent_pte = NULL;
cea0f0e7
AK		 980 return;
981 }
4db35314 982 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
cea0f0e7
AK		 983 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
984 if (!pte_chain->parent_ptes[i])
985 break;
986 if (pte_chain->parent_ptes[i] != parent_pte)
987 continue;
697fe2e2
AK		 988 while (i + 1 < NR_PTE_CHAIN_ENTRIES
989 && pte_chain->parent_ptes[i + 1]) {
cea0f0e7
AK		 990 pte_chain->parent_ptes[i]
991 = pte_chain->parent_ptes[i + 1];
992 ++i;
993 }
994 pte_chain->parent_ptes[i] = NULL;
697fe2e2
AK		 995 if (i == 0) {
996 hlist_del(&pte_chain->link);
90cb0529 997 mmu_free_pte_chain(pte_chain);
4db35314
AK		 998 if (hlist_empty(&sp->parent_ptes)) {
999 sp->multimapped = 0;
1000 sp->parent_pte = NULL;
697fe2e2
AK		 1001 }
1002 }
cea0f0e7
AK		 1003 return;
1004 }
1005 BUG();
1006}
1007
ad8cfbe3
MT		 1008
1009static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1010 mmu_parent_walk_fn fn)
1011{
1012 struct kvm_pte_chain *pte_chain;
1013 struct hlist_node *node;
1014 struct kvm_mmu_page *parent_sp;
1015 int i;
1016
1017 if (!sp->multimapped && sp->parent_pte) {
1018 parent_sp = page_header(__pa(sp->parent_pte));
1019 fn(vcpu, parent_sp);
1020 mmu_parent_walk(vcpu, parent_sp, fn);
1021 return;
1022 }
1023 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1024 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1025 if (!pte_chain->parent_ptes[i])
1026 break;
1027 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
1028 fn(vcpu, parent_sp);
1029 mmu_parent_walk(vcpu, parent_sp, fn);
1030 }
1031}
1032
0074ff63
MT		 1033static void kvm_mmu_update_unsync_bitmap(u64 *spte)
1034{
1035 unsigned int index;
1036 struct kvm_mmu_page *sp = page_header(__pa(spte));
1037
1038 index = spte - sp->spt;
60c8aec6
MT		 1039 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
1040 sp->unsync_children++;
1041 WARN_ON(!sp->unsync_children);
0074ff63
MT		 1042}
1043
1044static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
1045{
1046 struct kvm_pte_chain *pte_chain;
1047 struct hlist_node *node;
1048 int i;
1049
1050 if (!sp->parent_pte)
1051 return;
1052
1053 if (!sp->multimapped) {
1054 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
1055 return;
1056 }
1057
1058 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1059 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1060 if (!pte_chain->parent_ptes[i])
1061 break;
1062 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
1063 }
1064}
1065
1066static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1067{
0074ff63
MT		 1068 kvm_mmu_update_parents_unsync(sp);
1069 return 1;
1070}
1071
1072static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
1073 struct kvm_mmu_page *sp)
1074{
1075 mmu_parent_walk(vcpu, sp, unsync_walk_fn);
1076 kvm_mmu_update_parents_unsync(sp);
1077}
1078
d761a501
AK		 1079static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1080 struct kvm_mmu_page *sp)
1081{
1082 int i;
1083
1084 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1085 sp->spt[i] = shadow_trap_nonpresent_pte;
1086}
1087
e8bc217a
MT		 1088static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1089 struct kvm_mmu_page *sp)
1090{
1091 return 1;
1092}
1093
a7052897
MT		 1094static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1095{
1096}
1097
60c8aec6
MT		 1098#define KVM_PAGE_ARRAY_NR 16
1099
1100struct kvm_mmu_pages {
1101 struct mmu_page_and_offset {
1102 struct kvm_mmu_page *sp;
1103 unsigned int idx;
1104 } page[KVM_PAGE_ARRAY_NR];
1105 unsigned int nr;
1106};
1107
0074ff63
MT		 1108#define for_each_unsync_children(bitmap, idx) \
1109 for (idx = find_first_bit(bitmap, 512); \
1110 idx < 512; \
1111 idx = find_next_bit(bitmap, 512, idx+1))
1112
cded19f3
HE		 1113static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1114 int idx)
4731d4c7 1115{
60c8aec6 1116 int i;
4731d4c7 1117
60c8aec6
MT		 1118 if (sp->unsync)
1119 for (i=0; i < pvec->nr; i++)
1120 if (pvec->page[i].sp == sp)
1121 return 0;
1122
1123 pvec->page[pvec->nr].sp = sp;
1124 pvec->page[pvec->nr].idx = idx;
1125 pvec->nr++;
1126 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1127}
1128
1129static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1130 struct kvm_mmu_pages *pvec)
1131{
1132 int i, ret, nr_unsync_leaf = 0;
4731d4c7 1133
0074ff63 1134 for_each_unsync_children(sp->unsync_child_bitmap, i) {
4731d4c7
MT		 1135 u64 ent = sp->spt[i];
1136
87917239 1137 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
4731d4c7
MT		 1138 struct kvm_mmu_page *child;
1139 child = page_header(ent & PT64_BASE_ADDR_MASK);
1140
1141 if (child->unsync_children) {
60c8aec6
MT		 1142 if (mmu_pages_add(pvec, child, i))
1143 return -ENOSPC;
1144
1145 ret = __mmu_unsync_walk(child, pvec);
1146 if (!ret)
1147 __clear_bit(i, sp->unsync_child_bitmap);
1148 else if (ret > 0)
1149 nr_unsync_leaf += ret;
1150 else
4731d4c7
MT		 1151 return ret;
1152 }
1153
1154 if (child->unsync) {
60c8aec6
MT		 1155 nr_unsync_leaf++;
1156 if (mmu_pages_add(pvec, child, i))
1157 return -ENOSPC;
4731d4c7
MT		 1158 }
1159 }
1160 }
1161
0074ff63 1162 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
4731d4c7
MT		 1163 sp->unsync_children = 0;
1164
60c8aec6
MT		 1165 return nr_unsync_leaf;
1166}
1167
1168static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1169 struct kvm_mmu_pages *pvec)
1170{
1171 if (!sp->unsync_children)
1172 return 0;
1173
1174 mmu_pages_add(pvec, sp, 0);
1175 return __mmu_unsync_walk(sp, pvec);
4731d4c7
MT		 1176}
1177
4db35314 1178static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
cea0f0e7
AK		 1179{
1180 unsigned index;
1181 struct hlist_head *bucket;
4db35314 1182 struct kvm_mmu_page *sp;
cea0f0e7
AK		 1183 struct hlist_node *node;
1184
b8688d51 1185 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1ae0a13d 1186 index = kvm_page_table_hashfn(gfn);
f05e70ac 1187 bucket = &kvm->arch.mmu_page_hash[index];
4db35314 1188 hlist_for_each_entry(sp, node, bucket, hash_link)
f6e2c02b 1189 if (sp->gfn == gfn && !sp->role.direct
2e53d63a 1190 && !sp->role.invalid) {
cea0f0e7 1191 pgprintk("%s: found role %x\n",
b8688d51 1192 __func__, sp->role.word);
4db35314 1193 return sp;
cea0f0e7
AK		 1194 }
1195 return NULL;
1196}
1197
4731d4c7
MT		 1198static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1199{
1200 WARN_ON(!sp->unsync);
1201 sp->unsync = 0;
1202 --kvm->stat.mmu_unsync;
1203}
1204
1205static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1206
1207static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1208{
1209 if (sp->role.glevels != vcpu->arch.mmu.root_level) {
1210 kvm_mmu_zap_page(vcpu->kvm, sp);
1211 return 1;
1212 }
1213
f691fe1d 1214 trace_kvm_mmu_sync_page(sp);
b1a36821
MT		 1215 if (rmap_write_protect(vcpu->kvm, sp->gfn))
1216 kvm_flush_remote_tlbs(vcpu->kvm);
0c0f40bd 1217 kvm_unlink_unsync_page(vcpu->kvm, sp);
4731d4c7
MT		 1218 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1219 kvm_mmu_zap_page(vcpu->kvm, sp);
1220 return 1;
1221 }
1222
1223 kvm_mmu_flush_tlb(vcpu);
4731d4c7
MT		 1224 return 0;
1225}
1226
60c8aec6
MT		 1227struct mmu_page_path {
1228 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1229 unsigned int idx[PT64_ROOT_LEVEL-1];
4731d4c7
MT		 1230};
1231
60c8aec6
MT		 1232#define for_each_sp(pvec, sp, parents, i) \
1233 for (i = mmu_pages_next(&pvec, &parents, -1), \
1234 sp = pvec.page[i].sp; \
1235 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1236 i = mmu_pages_next(&pvec, &parents, i))
1237
cded19f3
HE		 1238static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1239 struct mmu_page_path *parents,
1240 int i)
60c8aec6
MT		 1241{
1242 int n;
1243
1244 for (n = i+1; n < pvec->nr; n++) {
1245 struct kvm_mmu_page *sp = pvec->page[n].sp;
1246
1247 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1248 parents->idx[0] = pvec->page[n].idx;
1249 return n;
1250 }
1251
1252 parents->parent[sp->role.level-2] = sp;
1253 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1254 }
1255
1256 return n;
1257}
1258
cded19f3 1259static void mmu_pages_clear_parents(struct mmu_page_path *parents)
4731d4c7 1260{
60c8aec6
MT		 1261 struct kvm_mmu_page *sp;
1262 unsigned int level = 0;
1263
1264 do {
1265 unsigned int idx = parents->idx[level];
4731d4c7 1266
60c8aec6
MT		 1267 sp = parents->parent[level];
1268 if (!sp)
1269 return;
1270
1271 --sp->unsync_children;
1272 WARN_ON((int)sp->unsync_children < 0);
1273 __clear_bit(idx, sp->unsync_child_bitmap);
1274 level++;
1275 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
4731d4c7
MT		 1276}
1277
60c8aec6
MT		 1278static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1279 struct mmu_page_path *parents,
1280 struct kvm_mmu_pages *pvec)
4731d4c7 1281{
60c8aec6
MT		 1282 parents->parent[parent->role.level-1] = NULL;
1283 pvec->nr = 0;
1284}
4731d4c7 1285
60c8aec6
MT		 1286static void mmu_sync_children(struct kvm_vcpu *vcpu,
1287 struct kvm_mmu_page *parent)
1288{
1289 int i;
1290 struct kvm_mmu_page *sp;
1291 struct mmu_page_path parents;
1292 struct kvm_mmu_pages pages;
1293
1294 kvm_mmu_pages_init(parent, &parents, &pages);
1295 while (mmu_unsync_walk(parent, &pages)) {
b1a36821
MT		 1296 int protected = 0;
1297
1298 for_each_sp(pages, sp, parents, i)
1299 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1300
1301 if (protected)
1302 kvm_flush_remote_tlbs(vcpu->kvm);
1303
60c8aec6
MT		 1304 for_each_sp(pages, sp, parents, i) {
1305 kvm_sync_page(vcpu, sp);
1306 mmu_pages_clear_parents(&parents);
1307 }
4731d4c7 1308 cond_resched_lock(&vcpu->kvm->mmu_lock);
60c8aec6
MT		 1309 kvm_mmu_pages_init(parent, &parents, &pages);
1310 }
4731d4c7
MT		 1311}
1312
cea0f0e7
AK		 1313static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1314 gfn_t gfn,
1315 gva_t gaddr,
1316 unsigned level,
f6e2c02b 1317 int direct,
41074d07 1318 unsigned access,
f7d9c7b7 1319 u64 *parent_pte)
cea0f0e7
AK		 1320{
1321 union kvm_mmu_page_role role;
1322 unsigned index;
1323 unsigned quadrant;
1324 struct hlist_head *bucket;
4db35314 1325 struct kvm_mmu_page *sp;
4731d4c7 1326 struct hlist_node *node, *tmp;
cea0f0e7 1327
a770f6f2 1328 role = vcpu->arch.mmu.base_role;
cea0f0e7 1329 role.level = level;
f6e2c02b 1330 role.direct = direct;
84b0c8c6
AK		 1331 if (role.direct)
1332 role.glevels = 0;
41074d07 1333 role.access = access;
ad312c7c 1334 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
cea0f0e7
AK		 1335 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1336 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1337 role.quadrant = quadrant;
1338 }
1ae0a13d 1339 index = kvm_page_table_hashfn(gfn);
f05e70ac 1340 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4731d4c7
MT		 1341 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1342 if (sp->gfn == gfn) {
1343 if (sp->unsync)
1344 if (kvm_sync_page(vcpu, sp))
1345 continue;
1346
1347 if (sp->role.word != role.word)
1348 continue;
1349
4db35314 1350 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
0074ff63
MT		 1351 if (sp->unsync_children) {
1352 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1353 kvm_mmu_mark_parents_unsync(vcpu, sp);
1354 }
f691fe1d 1355 trace_kvm_mmu_get_page(sp, false);
4db35314 1356 return sp;
cea0f0e7 1357 }
dfc5aa00 1358 ++vcpu->kvm->stat.mmu_cache_miss;
4db35314
AK		 1359 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1360 if (!sp)
1361 return sp;
4db35314
AK		 1362 sp->gfn = gfn;
1363 sp->role = role;
1364 hlist_add_head(&sp->hash_link, bucket);
f6e2c02b 1365 if (!direct) {
b1a36821
MT		 1366 if (rmap_write_protect(vcpu->kvm, gfn))
1367 kvm_flush_remote_tlbs(vcpu->kvm);
4731d4c7
MT		 1368 account_shadowed(vcpu->kvm, gfn);
1369 }
131d8279
AK		 1370 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1371 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1372 else
1373 nonpaging_prefetch_page(vcpu, sp);
f691fe1d 1374 trace_kvm_mmu_get_page(sp, true);
4db35314 1375 return sp;
cea0f0e7
AK		 1376}
1377
2d11123a
AK		 1378static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1379 struct kvm_vcpu *vcpu, u64 addr)
1380{
1381 iterator->addr = addr;
1382 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1383 iterator->level = vcpu->arch.mmu.shadow_root_level;
1384 if (iterator->level == PT32E_ROOT_LEVEL) {
1385 iterator->shadow_addr
1386 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1387 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1388 --iterator->level;
1389 if (!iterator->shadow_addr)
1390 iterator->level = 0;
1391 }
1392}
1393
1394static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1395{
1396 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1397 return false;
4d88954d
MT		 1398
1399 if (iterator->level == PT_PAGE_TABLE_LEVEL)
1400 if (is_large_pte(*iterator->sptep))
1401 return false;
1402
2d11123a
AK		 1403 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1404 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1405 return true;
1406}
1407
1408static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1409{
1410 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1411 --iterator->level;
1412}
1413
90cb0529 1414static void kvm_mmu_page_unlink_children(struct kvm *kvm,
4db35314 1415 struct kvm_mmu_page *sp)
a436036b 1416{
697fe2e2
AK		 1417 unsigned i;
1418 u64 *pt;
1419 u64 ent;
1420
4db35314 1421 pt = sp->spt;
697fe2e2 1422
697fe2e2
AK		 1423 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1424 ent = pt[i];
1425
05da4558 1426 if (is_shadow_present_pte(ent)) {
776e6633 1427 if (!is_last_spte(ent, sp->role.level)) {
05da4558
MT		 1428 ent &= PT64_BASE_ADDR_MASK;
1429 mmu_page_remove_parent_pte(page_header(ent),
1430 &pt[i]);
1431 } else {
776e6633
MT		 1432 if (is_large_pte(ent))
1433 --kvm->stat.lpages;
05da4558
MT		 1434 rmap_remove(kvm, &pt[i]);
1435 }
1436 }
c7addb90 1437 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2 1438 }
a436036b
AK		 1439}
1440
4db35314 1441static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7 1442{
4db35314 1443 mmu_page_remove_parent_pte(sp, parent_pte);
a436036b
AK		 1444}
1445
12b7d28f
AK		 1446static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1447{
1448 int i;
988a2cae 1449 struct kvm_vcpu *vcpu;
12b7d28f 1450
988a2cae
GN		 1451 kvm_for_each_vcpu(i, vcpu, kvm)
1452 vcpu->arch.last_pte_updated = NULL;
12b7d28f
AK		 1453}
1454
31aa2b44 1455static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
a436036b
AK		 1456{
1457 u64 *parent_pte;
1458
4db35314
AK		 1459 while (sp->multimapped || sp->parent_pte) {
1460 if (!sp->multimapped)
1461 parent_pte = sp->parent_pte;
a436036b
AK		 1462 else {
1463 struct kvm_pte_chain *chain;
1464
4db35314 1465 chain = container_of(sp->parent_ptes.first,
a436036b
AK		 1466 struct kvm_pte_chain, link);
1467 parent_pte = chain->parent_ptes[0];
1468 }
697fe2e2 1469 BUG_ON(!parent_pte);
4db35314 1470 kvm_mmu_put_page(sp, parent_pte);
d555c333 1471 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
a436036b 1472 }
31aa2b44
AK		 1473}
1474
60c8aec6
MT		 1475static int mmu_zap_unsync_children(struct kvm *kvm,
1476 struct kvm_mmu_page *parent)
4731d4c7 1477{
60c8aec6
MT		 1478 int i, zapped = 0;
1479 struct mmu_page_path parents;
1480 struct kvm_mmu_pages pages;
4731d4c7 1481
60c8aec6 1482 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
4731d4c7 1483 return 0;
60c8aec6
MT		 1484
1485 kvm_mmu_pages_init(parent, &parents, &pages);
1486 while (mmu_unsync_walk(parent, &pages)) {
1487 struct kvm_mmu_page *sp;
1488
1489 for_each_sp(pages, sp, parents, i) {
1490 kvm_mmu_zap_page(kvm, sp);
1491 mmu_pages_clear_parents(&parents);
77662e00 1492 zapped++;
60c8aec6 1493 }
60c8aec6
MT		 1494 kvm_mmu_pages_init(parent, &parents, &pages);
1495 }
1496
1497 return zapped;
4731d4c7
MT		 1498}
1499
07385413 1500static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
31aa2b44 1501{
4731d4c7 1502 int ret;
f691fe1d
AK		 1503
1504 trace_kvm_mmu_zap_page(sp);
31aa2b44 1505 ++kvm->stat.mmu_shadow_zapped;
4731d4c7 1506 ret = mmu_zap_unsync_children(kvm, sp);
4db35314 1507 kvm_mmu_page_unlink_children(kvm, sp);
31aa2b44 1508 kvm_mmu_unlink_parents(kvm, sp);
5b5c6a5a 1509 kvm_flush_remote_tlbs(kvm);
f6e2c02b 1510 if (!sp->role.invalid && !sp->role.direct)
5b5c6a5a 1511 unaccount_shadowed(kvm, sp->gfn);
4731d4c7
MT		 1512 if (sp->unsync)
1513 kvm_unlink_unsync_page(kvm, sp);
4db35314
AK		 1514 if (!sp->root_count) {
1515 hlist_del(&sp->hash_link);
1516 kvm_mmu_free_page(kvm, sp);
2e53d63a 1517 } else {
2e53d63a 1518 sp->role.invalid = 1;
5b5c6a5a 1519 list_move(&sp->link, &kvm->arch.active_mmu_pages);
2e53d63a
MT		 1520 kvm_reload_remote_mmus(kvm);
1521 }
12b7d28f 1522 kvm_mmu_reset_last_pte_updated(kvm);
4731d4c7 1523 return ret;
a436036b
AK		 1524}
1525
82ce2c96
IE		 1526/*
1527 * Changing the number of mmu pages allocated to the vm
1528 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1529 */
1530void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1531{
025dbbf3
MT		 1532 int used_pages;
1533
1534 used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1535 used_pages = max(0, used_pages);
1536
82ce2c96
IE		 1537 /*
1538 * If we set the number of mmu pages to be smaller be than the
1539 * number of actived pages , we must to free some mmu pages before we
1540 * change the value
1541 */
1542
025dbbf3 1543 if (used_pages > kvm_nr_mmu_pages) {
77662e00
XG		 1544 while (used_pages > kvm_nr_mmu_pages &&
1545 !list_empty(&kvm->arch.active_mmu_pages)) {
82ce2c96
IE		 1546 struct kvm_mmu_page *page;
1547
f05e70ac 1548 page = container_of(kvm->arch.active_mmu_pages.prev,
82ce2c96 1549 struct kvm_mmu_page, link);
77662e00 1550 used_pages -= kvm_mmu_zap_page(kvm, page);
025dbbf3 1551 used_pages--;
82ce2c96 1552 }
77662e00 1553 kvm_nr_mmu_pages = used_pages;
f05e70ac 1554 kvm->arch.n_free_mmu_pages = 0;
82ce2c96
IE		 1555 }
1556 else
f05e70ac
ZX		 1557 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1558 - kvm->arch.n_alloc_mmu_pages;
82ce2c96 1559
f05e70ac 1560 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
82ce2c96
IE		 1561}
1562
f67a46f4 1563static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
a436036b
AK		 1564{
1565 unsigned index;
1566 struct hlist_head *bucket;
4db35314 1567 struct kvm_mmu_page *sp;
a436036b
AK		 1568 struct hlist_node *node, *n;
1569 int r;
1570
b8688d51 1571 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
a436036b 1572 r = 0;
1ae0a13d 1573 index = kvm_page_table_hashfn(gfn);
f05e70ac 1574 bucket = &kvm->arch.mmu_page_hash[index];
4db35314 1575 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
f6e2c02b 1576 if (sp->gfn == gfn && !sp->role.direct) {
b8688d51 1577 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
4db35314 1578 sp->role.word);
a436036b 1579 r = 1;
07385413
MT		 1580 if (kvm_mmu_zap_page(kvm, sp))
1581 n = bucket->first;
a436036b
AK		 1582 }
1583 return r;
cea0f0e7
AK		 1584}
1585
f67a46f4 1586static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
97a0a01e 1587{
4677a3b6
AK		 1588 unsigned index;
1589 struct hlist_head *bucket;
4db35314 1590 struct kvm_mmu_page *sp;
4677a3b6 1591 struct hlist_node *node, *nn;
97a0a01e 1592
4677a3b6
AK		 1593 index = kvm_page_table_hashfn(gfn);
1594 bucket = &kvm->arch.mmu_page_hash[index];
1595 hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
f6e2c02b 1596 if (sp->gfn == gfn && !sp->role.direct
4677a3b6
AK		 1597 && !sp->role.invalid) {
1598 pgprintk("%s: zap %lx %x\n",
1599 __func__, gfn, sp->role.word);
77662e00
XG		 1600 if (kvm_mmu_zap_page(kvm, sp))
1601 nn = bucket->first;
4677a3b6 1602 }
97a0a01e
AK		 1603 }
1604}
1605
38c335f1 1606static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
6aa8b732 1607{
bc6678a3 1608 int slot = memslot_id(kvm, gfn);
4db35314 1609 struct kvm_mmu_page *sp = page_header(__pa(pte));
6aa8b732 1610
291f26bc 1611 __set_bit(slot, sp->slot_bitmap);
6aa8b732
AK		 1612}
1613
6844dec6
MT		 1614static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1615{
1616 int i;
1617 u64 *pt = sp->spt;
1618
1619 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1620 return;
1621
1622 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1623 if (pt[i] == shadow_notrap_nonpresent_pte)
d555c333 1624 __set_spte(&pt[i], shadow_trap_nonpresent_pte);
6844dec6
MT		 1625 }
1626}
1627
039576c0
AK		 1628struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1629{
72dc67a6
IE		 1630 struct page *page;
1631
1871c602 1632 gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
039576c0
AK		 1633
1634 if (gpa == UNMAPPED_GVA)
1635 return NULL;
72dc67a6 1636
72dc67a6 1637 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
72dc67a6
IE		 1638
1639 return page;
039576c0
AK		 1640}
1641
74be52e3
SY		 1642/*
1643 * The function is based on mtrr_type_lookup() in
1644 * arch/x86/kernel/cpu/mtrr/generic.c
1645 */
1646static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1647 u64 start, u64 end)
1648{
1649 int i;
1650 u64 base, mask;
1651 u8 prev_match, curr_match;
1652 int num_var_ranges = KVM_NR_VAR_MTRR;
1653
1654 if (!mtrr_state->enabled)
1655 return 0xFF;
1656
1657 /* Make end inclusive end, instead of exclusive */
1658 end--;
1659
1660 /* Look in fixed ranges. Just return the type as per start */
1661 if (mtrr_state->have_fixed && (start < 0x100000)) {
1662 int idx;
1663
1664 if (start < 0x80000) {
1665 idx = 0;
1666 idx += (start >> 16);
1667 return mtrr_state->fixed_ranges[idx];
1668 } else if (start < 0xC0000) {
1669 idx = 1 * 8;
1670 idx += ((start - 0x80000) >> 14);
1671 return mtrr_state->fixed_ranges[idx];
1672 } else if (start < 0x1000000) {
1673 idx = 3 * 8;
1674 idx += ((start - 0xC0000) >> 12);
1675 return mtrr_state->fixed_ranges[idx];
1676 }
1677 }
1678
1679 /*
1680 * Look in variable ranges
1681 * Look of multiple ranges matching this address and pick type
1682 * as per MTRR precedence
1683 */
1684 if (!(mtrr_state->enabled & 2))
1685 return mtrr_state->def_type;
1686
1687 prev_match = 0xFF;
1688 for (i = 0; i < num_var_ranges; ++i) {
1689 unsigned short start_state, end_state;
1690
1691 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1692 continue;
1693
1694 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1695 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1696 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1697 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1698
1699 start_state = ((start & mask) == (base & mask));
1700 end_state = ((end & mask) == (base & mask));
1701 if (start_state != end_state)
1702 return 0xFE;
1703
1704 if ((start & mask) != (base & mask))
1705 continue;
1706
1707 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1708 if (prev_match == 0xFF) {
1709 prev_match = curr_match;
1710 continue;
1711 }
1712
1713 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1714 curr_match == MTRR_TYPE_UNCACHABLE)
1715 return MTRR_TYPE_UNCACHABLE;
1716
1717 if ((prev_match == MTRR_TYPE_WRBACK &&
1718 curr_match == MTRR_TYPE_WRTHROUGH) ||
1719 (prev_match == MTRR_TYPE_WRTHROUGH &&
1720 curr_match == MTRR_TYPE_WRBACK)) {
1721 prev_match = MTRR_TYPE_WRTHROUGH;
1722 curr_match = MTRR_TYPE_WRTHROUGH;
1723 }
1724
1725 if (prev_match != curr_match)
1726 return MTRR_TYPE_UNCACHABLE;
1727 }
1728
1729 if (prev_match != 0xFF)
1730 return prev_match;
1731
1732 return mtrr_state->def_type;
1733}
1734
4b12f0de 1735u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
74be52e3
SY		 1736{
1737 u8 mtrr;
1738
1739 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1740 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1741 if (mtrr == 0xfe || mtrr == 0xff)
1742 mtrr = MTRR_TYPE_WRBACK;
1743 return mtrr;
1744}
4b12f0de 1745EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
74be52e3 1746
4731d4c7
MT		 1747static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1748{
1749 unsigned index;
1750 struct hlist_head *bucket;
1751 struct kvm_mmu_page *s;
1752 struct hlist_node *node, *n;
1753
f691fe1d 1754 trace_kvm_mmu_unsync_page(sp);
4731d4c7
MT		 1755 index = kvm_page_table_hashfn(sp->gfn);
1756 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1757 /* don't unsync if pagetable is shadowed with multiple roles */
1758 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
f6e2c02b 1759 if (s->gfn != sp->gfn || s->role.direct)
4731d4c7
MT		 1760 continue;
1761 if (s->role.word != sp->role.word)
1762 return 1;
1763 }
4731d4c7
MT		 1764 ++vcpu->kvm->stat.mmu_unsync;
1765 sp->unsync = 1;
6cffe8ca 1766
c2d0ee46 1767 kvm_mmu_mark_parents_unsync(vcpu, sp);
6cffe8ca 1768
4731d4c7
MT		 1769 mmu_convert_notrap(sp);
1770 return 0;
1771}
1772
1773static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1774 bool can_unsync)
1775{
1776 struct kvm_mmu_page *shadow;
1777
1778 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1779 if (shadow) {
1780 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1781 return 1;
1782 if (shadow->unsync)
1783 return 0;
582801a9 1784 if (can_unsync && oos_shadow)
4731d4c7
MT		 1785 return kvm_unsync_page(vcpu, shadow);
1786 return 1;
1787 }
1788 return 0;
1789}
1790
d555c333 1791static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1e73f9dd 1792 unsigned pte_access, int user_fault,
852e3c19 1793 int write_fault, int dirty, int level,
c2d0ee46 1794 gfn_t gfn, pfn_t pfn, bool speculative,
1403283a 1795 bool can_unsync, bool reset_host_protection)
1c4f1fd6
AK		 1796{
1797 u64 spte;
1e73f9dd 1798 int ret = 0;
64d4d521 1799
1c4f1fd6
AK		 1800 /*
1801 * We don't set the accessed bit, since we sometimes want to see
1802 * whether the guest actually used the pte (in order to detect
1803 * demand paging).
1804 */
7b52345e 1805 spte = shadow_base_present_pte | shadow_dirty_mask;
947da538 1806 if (!speculative)
3201b5d9 1807 spte |= shadow_accessed_mask;
1c4f1fd6
AK		 1808 if (!dirty)
1809 pte_access &= ~ACC_WRITE_MASK;
7b52345e
SY		 1810 if (pte_access & ACC_EXEC_MASK)
1811 spte |= shadow_x_mask;
1812 else
1813 spte |= shadow_nx_mask;
1c4f1fd6 1814 if (pte_access & ACC_USER_MASK)
7b52345e 1815 spte |= shadow_user_mask;
852e3c19 1816 if (level > PT_PAGE_TABLE_LEVEL)
05da4558 1817 spte |= PT_PAGE_SIZE_MASK;
4b12f0de
SY		 1818 if (tdp_enabled)
1819 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1820 kvm_is_mmio_pfn(pfn));
1c4f1fd6 1821
1403283a
IE		 1822 if (reset_host_protection)
1823 spte |= SPTE_HOST_WRITEABLE;
1824
35149e21 1825 spte |= (u64)pfn << PAGE_SHIFT;
1c4f1fd6
AK		 1826
1827 if ((pte_access & ACC_WRITE_MASK)
1828 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1c4f1fd6 1829
852e3c19
JR		 1830 if (level > PT_PAGE_TABLE_LEVEL &&
1831 has_wrprotected_page(vcpu->kvm, gfn, level)) {
38187c83
MT		 1832 ret = 1;
1833 spte = shadow_trap_nonpresent_pte;
1834 goto set_pte;
1835 }
1836
1c4f1fd6 1837 spte |= PT_WRITABLE_MASK;
1c4f1fd6 1838
ecc5589f
MT		 1839 /*
1840 * Optimization: for pte sync, if spte was writable the hash
1841 * lookup is unnecessary (and expensive). Write protection
1842 * is responsibility of mmu_get_page / kvm_sync_page.
1843 * Same reasoning can be applied to dirty page accounting.
1844 */
8dae4445 1845 if (!can_unsync && is_writable_pte(*sptep))
ecc5589f
MT		 1846 goto set_pte;
1847
4731d4c7 1848 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1c4f1fd6 1849 pgprintk("%s: found shadow page for %lx, marking ro\n",
b8688d51 1850 __func__, gfn);
1e73f9dd 1851 ret = 1;
1c4f1fd6 1852 pte_access &= ~ACC_WRITE_MASK;
8dae4445 1853 if (is_writable_pte(spte))
1c4f1fd6 1854 spte &= ~PT_WRITABLE_MASK;
1c4f1fd6
AK		 1855 }
1856 }
1857
1c4f1fd6
AK		 1858 if (pte_access & ACC_WRITE_MASK)
1859 mark_page_dirty(vcpu->kvm, gfn);
1860
38187c83 1861set_pte:
d555c333 1862 __set_spte(sptep, spte);
1e73f9dd
MT		 1863 return ret;
1864}
1865
d555c333 1866static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1e73f9dd
MT		 1867 unsigned pt_access, unsigned pte_access,
1868 int user_fault, int write_fault, int dirty,
852e3c19 1869 int *ptwrite, int level, gfn_t gfn,
1403283a
IE		 1870 pfn_t pfn, bool speculative,
1871 bool reset_host_protection)
1e73f9dd
MT		 1872{
1873 int was_rmapped = 0;
8dae4445 1874 int was_writable = is_writable_pte(*sptep);
53a27b39 1875 int rmap_count;
1e73f9dd
MT		 1876
1877 pgprintk("%s: spte %llx access %x write_fault %d"
1878 " user_fault %d gfn %lx\n",
d555c333 1879 __func__, *sptep, pt_access,
1e73f9dd
MT		 1880 write_fault, user_fault, gfn);
1881
d555c333 1882 if (is_rmap_spte(*sptep)) {
1e73f9dd
MT		 1883 /*
1884 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1885 * the parent of the now unreachable PTE.
1886 */
852e3c19
JR		 1887 if (level > PT_PAGE_TABLE_LEVEL &&
1888 !is_large_pte(*sptep)) {
1e73f9dd 1889 struct kvm_mmu_page *child;
d555c333 1890 u64 pte = *sptep;
1e73f9dd
MT		 1891
1892 child = page_header(pte & PT64_BASE_ADDR_MASK);
d555c333
AK		 1893 mmu_page_remove_parent_pte(child, sptep);
1894 } else if (pfn != spte_to_pfn(*sptep)) {
1e73f9dd 1895 pgprintk("hfn old %lx new %lx\n",
d555c333
AK		 1896 spte_to_pfn(*sptep), pfn);
1897 rmap_remove(vcpu->kvm, sptep);
6bed6b9e
JR		 1898 } else
1899 was_rmapped = 1;
1e73f9dd 1900 }
852e3c19 1901
d555c333 1902 if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
1403283a
IE		 1903 dirty, level, gfn, pfn, speculative, true,
1904 reset_host_protection)) {
1e73f9dd
MT		 1905 if (write_fault)
1906 *ptwrite = 1;
a378b4e6
MT		 1907 kvm_x86_ops->tlb_flush(vcpu);
1908 }
1e73f9dd 1909
d555c333 1910 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
1e73f9dd 1911 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
d555c333 1912 is_large_pte(*sptep)? "2MB" : "4kB",
a205bc19
JR		 1913 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
1914 *sptep, sptep);
d555c333 1915 if (!was_rmapped && is_large_pte(*sptep))
05da4558
MT		 1916 ++vcpu->kvm->stat.lpages;
1917
d555c333 1918 page_header_update_slot(vcpu->kvm, sptep, gfn);
1c4f1fd6 1919 if (!was_rmapped) {
44ad9944 1920 rmap_count = rmap_add(vcpu, sptep, gfn);
acb66dd0 1921 kvm_release_pfn_clean(pfn);
53a27b39 1922 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
852e3c19 1923 rmap_recycle(vcpu, sptep, gfn);
75e68e60 1924 } else {
8dae4445 1925 if (was_writable)
35149e21 1926 kvm_release_pfn_dirty(pfn);
75e68e60 1927 else
35149e21 1928 kvm_release_pfn_clean(pfn);
1c4f1fd6 1929 }
1b7fcd32 1930 if (speculative) {
d555c333 1931 vcpu->arch.last_pte_updated = sptep;
1b7fcd32
AK		 1932 vcpu->arch.last_pte_gfn = gfn;
1933 }
1c4f1fd6
AK		 1934}
1935
6aa8b732
AK		 1936static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1937{
1938}
1939
9f652d21 1940static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
852e3c19 1941 int level, gfn_t gfn, pfn_t pfn)
140754bc 1942{
9f652d21 1943 struct kvm_shadow_walk_iterator iterator;
140754bc 1944 struct kvm_mmu_page *sp;
9f652d21 1945 int pt_write = 0;
140754bc 1946 gfn_t pseudo_gfn;
6aa8b732 1947
9f652d21 1948 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
852e3c19 1949 if (iterator.level == level) {
9f652d21
AK		 1950 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
1951 0, write, 1, &pt_write,
1403283a 1952 level, gfn, pfn, false, true);
9f652d21
AK		 1953 ++vcpu->stat.pf_fixed;
1954 break;
6aa8b732
AK		 1955 }
1956
9f652d21
AK		 1957 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
1958 pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
1959 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
1960 iterator.level - 1,
1961 1, ACC_ALL, iterator.sptep);
1962 if (!sp) {
1963 pgprintk("nonpaging_map: ENOMEM\n");
1964 kvm_release_pfn_clean(pfn);
1965 return -ENOMEM;
1966 }
140754bc 1967
d555c333
AK		 1968 __set_spte(iterator.sptep,
1969 __pa(sp->spt)
1970 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1971 | shadow_user_mask | shadow_x_mask);
9f652d21
AK		 1972 }
1973 }
1974 return pt_write;
6aa8b732
AK		 1975}
1976
10589a46
MT		 1977static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1978{
1979 int r;
852e3c19 1980 int level;
35149e21 1981 pfn_t pfn;
e930bffe 1982 unsigned long mmu_seq;
aaee2c94 1983
852e3c19
JR		 1984 level = mapping_level(vcpu, gfn);
1985
1986 /*
1987 * This path builds a PAE pagetable - so we can map 2mb pages at
1988 * maximum. Therefore check if the level is larger than that.
1989 */
1990 if (level > PT_DIRECTORY_LEVEL)
1991 level = PT_DIRECTORY_LEVEL;
1992
1993 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
05da4558 1994
e930bffe 1995 mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 1996 smp_rmb();
35149e21 1997 pfn = gfn_to_pfn(vcpu->kvm, gfn);
aaee2c94 1998
d196e343 1999 /* mmio */
35149e21
AL		 2000 if (is_error_pfn(pfn)) {
2001 kvm_release_pfn_clean(pfn);
d196e343
AK		 2002 return 1;
2003 }
2004
aaee2c94 2005 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA		 2006 if (mmu_notifier_retry(vcpu, mmu_seq))
2007 goto out_unlock;
eb787d10 2008 kvm_mmu_free_some_pages(vcpu);
852e3c19 2009 r = __direct_map(vcpu, v, write, level, gfn, pfn);
aaee2c94
MT		 2010 spin_unlock(&vcpu->kvm->mmu_lock);
2011
aaee2c94 2012
10589a46 2013 return r;
e930bffe
AA		 2014
2015out_unlock:
2016 spin_unlock(&vcpu->kvm->mmu_lock);
2017 kvm_release_pfn_clean(pfn);
2018 return 0;
10589a46
MT		 2019}
2020
2021
17ac10ad
AK		 2022static void mmu_free_roots(struct kvm_vcpu *vcpu)
2023{
2024 int i;
4db35314 2025 struct kvm_mmu_page *sp;
17ac10ad 2026
ad312c7c 2027 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
7b53aa56 2028 return;
aaee2c94 2029 spin_lock(&vcpu->kvm->mmu_lock);
ad312c7c
ZX		 2030 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2031 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad 2032
4db35314
AK		 2033 sp = page_header(root);
2034 --sp->root_count;
2e53d63a
MT		 2035 if (!sp->root_count && sp->role.invalid)
2036 kvm_mmu_zap_page(vcpu->kvm, sp);
ad312c7c 2037 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
aaee2c94 2038 spin_unlock(&vcpu->kvm->mmu_lock);
17ac10ad
AK		 2039 return;
2040 }
17ac10ad 2041 for (i = 0; i < 4; ++i) {
ad312c7c 2042 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad 2043
417726a3 2044 if (root) {
417726a3 2045 root &= PT64_BASE_ADDR_MASK;
4db35314
AK		 2046 sp = page_header(root);
2047 --sp->root_count;
2e53d63a
MT		 2048 if (!sp->root_count && sp->role.invalid)
2049 kvm_mmu_zap_page(vcpu->kvm, sp);
417726a3 2050 }
ad312c7c 2051 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 2052 }
aaee2c94 2053 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 2054 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
17ac10ad
AK		 2055}
2056
8986ecc0
MT		 2057static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2058{
2059 int ret = 0;
2060
2061 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2062 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2063 ret = 1;
2064 }
2065
2066 return ret;
2067}
2068
2069static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
17ac10ad
AK		 2070{
2071 int i;
cea0f0e7 2072 gfn_t root_gfn;
4db35314 2073 struct kvm_mmu_page *sp;
f6e2c02b 2074 int direct = 0;
6de4f3ad 2075 u64 pdptr;
3bb65a22 2076
ad312c7c 2077 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
17ac10ad 2078
ad312c7c
ZX		 2079 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2080 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad
AK		 2081
2082 ASSERT(!VALID_PAGE(root));
fb72d167 2083 if (tdp_enabled)
f6e2c02b 2084 direct = 1;
8986ecc0
MT		 2085 if (mmu_check_root(vcpu, root_gfn))
2086 return 1;
4db35314 2087 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
f6e2c02b 2088 PT64_ROOT_LEVEL, direct,
fb72d167 2089 ACC_ALL, NULL);
4db35314
AK		 2090 root = __pa(sp->spt);
2091 ++sp->root_count;
ad312c7c 2092 vcpu->arch.mmu.root_hpa = root;
8986ecc0 2093 return 0;
17ac10ad 2094 }
f6e2c02b 2095 direct = !is_paging(vcpu);
fb72d167 2096 if (tdp_enabled)
f6e2c02b 2097 direct = 1;
17ac10ad 2098 for (i = 0; i < 4; ++i) {
ad312c7c 2099 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad
AK		 2100
2101 ASSERT(!VALID_PAGE(root));
ad312c7c 2102 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
6de4f3ad 2103 pdptr = kvm_pdptr_read(vcpu, i);
43a3795a 2104 if (!is_present_gpte(pdptr)) {
ad312c7c 2105 vcpu->arch.mmu.pae_root[i] = 0;
417726a3
AK		 2106 continue;
2107 }
6de4f3ad 2108 root_gfn = pdptr >> PAGE_SHIFT;
ad312c7c 2109 } else if (vcpu->arch.mmu.root_level == 0)
cea0f0e7 2110 root_gfn = 0;
8986ecc0
MT		 2111 if (mmu_check_root(vcpu, root_gfn))
2112 return 1;
4db35314 2113 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
f6e2c02b 2114 PT32_ROOT_LEVEL, direct,
f7d9c7b7 2115 ACC_ALL, NULL);
4db35314
AK		 2116 root = __pa(sp->spt);
2117 ++sp->root_count;
ad312c7c 2118 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
17ac10ad 2119 }
ad312c7c 2120 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
8986ecc0 2121 return 0;
17ac10ad
AK		 2122}
2123
0ba73cda
MT		 2124static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2125{
2126 int i;
2127 struct kvm_mmu_page *sp;
2128
2129 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2130 return;
2131 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2132 hpa_t root = vcpu->arch.mmu.root_hpa;
2133 sp = page_header(root);
2134 mmu_sync_children(vcpu, sp);
2135 return;
2136 }
2137 for (i = 0; i < 4; ++i) {
2138 hpa_t root = vcpu->arch.mmu.pae_root[i];
2139
8986ecc0 2140 if (root && VALID_PAGE(root)) {
0ba73cda
MT		 2141 root &= PT64_BASE_ADDR_MASK;
2142 sp = page_header(root);
2143 mmu_sync_children(vcpu, sp);
2144 }
2145 }
2146}
2147
2148void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2149{
2150 spin_lock(&vcpu->kvm->mmu_lock);
2151 mmu_sync_roots(vcpu);
6cffe8ca 2152 spin_unlock(&vcpu->kvm->mmu_lock);
0ba73cda
MT		 2153}
2154
1871c602
GN		 2155static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
2156 u32 access, u32 *error)
6aa8b732 2157{
1871c602
GN		 2158 if (error)
2159 *error = 0;
6aa8b732
AK		 2160 return vaddr;
2161}
2162
2163static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
3f3e7124 2164 u32 error_code)
6aa8b732 2165{
e833240f 2166 gfn_t gfn;
e2dec939 2167 int r;
6aa8b732 2168
b8688d51 2169 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
e2dec939
AK		 2170 r = mmu_topup_memory_caches(vcpu);
2171 if (r)
2172 return r;
714b93da 2173
6aa8b732 2174 ASSERT(vcpu);
ad312c7c 2175 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 2176
e833240f 2177 gfn = gva >> PAGE_SHIFT;
6aa8b732 2178
e833240f
AK		 2179 return nonpaging_map(vcpu, gva & PAGE_MASK,
2180 error_code & PFERR_WRITE_MASK, gfn);
6aa8b732
AK		 2181}
2182
fb72d167
JR		 2183static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2184 u32 error_code)
2185{
35149e21 2186 pfn_t pfn;
fb72d167 2187 int r;
852e3c19 2188 int level;
05da4558 2189 gfn_t gfn = gpa >> PAGE_SHIFT;
e930bffe 2190 unsigned long mmu_seq;
fb72d167
JR		 2191
2192 ASSERT(vcpu);
2193 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2194
2195 r = mmu_topup_memory_caches(vcpu);
2196 if (r)
2197 return r;
2198
852e3c19
JR		 2199 level = mapping_level(vcpu, gfn);
2200
2201 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2202
e930bffe 2203 mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 2204 smp_rmb();
35149e21 2205 pfn = gfn_to_pfn(vcpu->kvm, gfn);
35149e21
AL		 2206 if (is_error_pfn(pfn)) {
2207 kvm_release_pfn_clean(pfn);
fb72d167
JR		 2208 return 1;
2209 }
2210 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA		 2211 if (mmu_notifier_retry(vcpu, mmu_seq))
2212 goto out_unlock;
fb72d167
JR		 2213 kvm_mmu_free_some_pages(vcpu);
2214 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
852e3c19 2215 level, gfn, pfn);
fb72d167 2216 spin_unlock(&vcpu->kvm->mmu_lock);
fb72d167
JR		 2217
2218 return r;
e930bffe
AA		 2219
2220out_unlock:
2221 spin_unlock(&vcpu->kvm->mmu_lock);
2222 kvm_release_pfn_clean(pfn);
2223 return 0;
fb72d167
JR		 2224}
2225
6aa8b732
AK		 2226static void nonpaging_free(struct kvm_vcpu *vcpu)
2227{
17ac10ad 2228 mmu_free_roots(vcpu);
6aa8b732
AK		 2229}
2230
2231static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2232{
ad312c7c 2233 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK		 2234
2235 context->new_cr3 = nonpaging_new_cr3;
2236 context->page_fault = nonpaging_page_fault;
6aa8b732
AK		 2237 context->gva_to_gpa = nonpaging_gva_to_gpa;
2238 context->free = nonpaging_free;
c7addb90 2239 context->prefetch_page = nonpaging_prefetch_page;
e8bc217a 2240 context->sync_page = nonpaging_sync_page;
a7052897 2241 context->invlpg = nonpaging_invlpg;
cea0f0e7 2242 context->root_level = 0;
6aa8b732 2243 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 2244 context->root_hpa = INVALID_PAGE;
6aa8b732
AK		 2245 return 0;
2246}
2247
d835dfec 2248void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
6aa8b732 2249{
1165f5fe 2250 ++vcpu->stat.tlb_flush;
cbdd1bea 2251 kvm_x86_ops->tlb_flush(vcpu);
6aa8b732
AK		 2252}
2253
2254static void paging_new_cr3(struct kvm_vcpu *vcpu)
2255{
b8688d51 2256 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
cea0f0e7 2257 mmu_free_roots(vcpu);
6aa8b732
AK		 2258}
2259
6aa8b732
AK		 2260static void inject_page_fault(struct kvm_vcpu *vcpu,
2261 u64 addr,
2262 u32 err_code)
2263{
c3c91fee 2264 kvm_inject_page_fault(vcpu, addr, err_code);
6aa8b732
AK		 2265}
2266
6aa8b732
AK		 2267static void paging_free(struct kvm_vcpu *vcpu)
2268{
2269 nonpaging_free(vcpu);
2270}
2271
82725b20
DE		 2272static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2273{
2274 int bit7;
2275
2276 bit7 = (gpte >> 7) & 1;
2277 return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2278}
2279
6aa8b732
AK		 2280#define PTTYPE 64
2281#include "paging_tmpl.h"
2282#undef PTTYPE
2283
2284#define PTTYPE 32
2285#include "paging_tmpl.h"
2286#undef PTTYPE
2287
82725b20
DE		 2288static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2289{
2290 struct kvm_mmu *context = &vcpu->arch.mmu;
2291 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2292 u64 exb_bit_rsvd = 0;
2293
2294 if (!is_nx(vcpu))
2295 exb_bit_rsvd = rsvd_bits(63, 63);
2296 switch (level) {
2297 case PT32_ROOT_LEVEL:
2298 /* no rsvd bits for 2 level 4K page table entries */
2299 context->rsvd_bits_mask[0][1] = 0;
2300 context->rsvd_bits_mask[0][0] = 0;
f815bce8
XG		 2301 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2302
2303 if (!is_pse(vcpu)) {
2304 context->rsvd_bits_mask[1][1] = 0;
2305 break;
2306 }
2307
82725b20
DE		 2308 if (is_cpuid_PSE36())
2309 /* 36bits PSE 4MB page */
2310 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2311 else
2312 /* 32 bits PSE 4MB page */
2313 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
82725b20
DE		 2314 break;
2315 case PT32E_ROOT_LEVEL:
20c466b5
DE		 2316 context->rsvd_bits_mask[0][2] =
2317 rsvd_bits(maxphyaddr, 63) |
2318 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
82725b20 2319 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
4c26b4cd 2320 rsvd_bits(maxphyaddr, 62); /* PDE */
82725b20
DE		 2321 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2322 rsvd_bits(maxphyaddr, 62); /* PTE */
2323 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2324 rsvd_bits(maxphyaddr, 62) |
2325 rsvd_bits(13, 20); /* large page */
f815bce8 2326 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
82725b20
DE		 2327 break;
2328 case PT64_ROOT_LEVEL:
2329 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2330 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2331 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2332 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2333 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
4c26b4cd 2334 rsvd_bits(maxphyaddr, 51);
82725b20
DE		 2335 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2336 rsvd_bits(maxphyaddr, 51);
2337 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
e04da980
JR		 2338 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2339 rsvd_bits(maxphyaddr, 51) |
2340 rsvd_bits(13, 29);
82725b20 2341 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
4c26b4cd
SY		 2342 rsvd_bits(maxphyaddr, 51) |
2343 rsvd_bits(13, 20); /* large page */
f815bce8 2344 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
82725b20
DE		 2345 break;
2346 }
2347}
2348
17ac10ad 2349static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
6aa8b732 2350{
ad312c7c 2351 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK		 2352
2353 ASSERT(is_pae(vcpu));
2354 context->new_cr3 = paging_new_cr3;
2355 context->page_fault = paging64_page_fault;
6aa8b732 2356 context->gva_to_gpa = paging64_gva_to_gpa;
c7addb90 2357 context->prefetch_page = paging64_prefetch_page;
e8bc217a 2358 context->sync_page = paging64_sync_page;
a7052897 2359 context->invlpg = paging64_invlpg;
6aa8b732 2360 context->free = paging_free;
17ac10ad
AK		 2361 context->root_level = level;
2362 context->shadow_root_level = level;
17c3ba9d 2363 context->root_hpa = INVALID_PAGE;
6aa8b732
AK		 2364 return 0;
2365}
2366
17ac10ad
AK		 2367static int paging64_init_context(struct kvm_vcpu *vcpu)
2368{
82725b20 2369 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
17ac10ad
AK		 2370 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2371}
2372
6aa8b732
AK		 2373static int paging32_init_context(struct kvm_vcpu *vcpu)
2374{
ad312c7c 2375 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732 2376
82725b20 2377 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
6aa8b732
AK		 2378 context->new_cr3 = paging_new_cr3;
2379 context->page_fault = paging32_page_fault;
6aa8b732
AK		 2380 context->gva_to_gpa = paging32_gva_to_gpa;
2381 context->free = paging_free;
c7addb90 2382 context->prefetch_page = paging32_prefetch_page;
e8bc217a 2383 context->sync_page = paging32_sync_page;
a7052897 2384 context->invlpg = paging32_invlpg;
6aa8b732
AK		 2385 context->root_level = PT32_ROOT_LEVEL;
2386 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 2387 context->root_hpa = INVALID_PAGE;
6aa8b732
AK		 2388 return 0;
2389}
2390
2391static int paging32E_init_context(struct kvm_vcpu *vcpu)
2392{
82725b20 2393 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
17ac10ad 2394 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
6aa8b732
AK		 2395}
2396
fb72d167
JR		 2397static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2398{
2399 struct kvm_mmu *context = &vcpu->arch.mmu;
2400
2401 context->new_cr3 = nonpaging_new_cr3;
2402 context->page_fault = tdp_page_fault;
2403 context->free = nonpaging_free;
2404 context->prefetch_page = nonpaging_prefetch_page;
e8bc217a 2405 context->sync_page = nonpaging_sync_page;
a7052897 2406 context->invlpg = nonpaging_invlpg;
67253af5 2407 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
fb72d167
JR		 2408 context->root_hpa = INVALID_PAGE;
2409
2410 if (!is_paging(vcpu)) {
2411 context->gva_to_gpa = nonpaging_gva_to_gpa;
2412 context->root_level = 0;
2413 } else if (is_long_mode(vcpu)) {
82725b20 2414 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
fb72d167
JR		 2415 context->gva_to_gpa = paging64_gva_to_gpa;
2416 context->root_level = PT64_ROOT_LEVEL;
2417 } else if (is_pae(vcpu)) {
82725b20 2418 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
fb72d167
JR		 2419 context->gva_to_gpa = paging64_gva_to_gpa;
2420 context->root_level = PT32E_ROOT_LEVEL;
2421 } else {
82725b20 2422 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
fb72d167
JR		 2423 context->gva_to_gpa = paging32_gva_to_gpa;
2424 context->root_level = PT32_ROOT_LEVEL;
2425 }
2426
2427 return 0;
2428}
2429
2430static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
6aa8b732 2431{
a770f6f2
AK		 2432 int r;
2433
6aa8b732 2434 ASSERT(vcpu);
ad312c7c 2435 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732
AK		 2436
2437 if (!is_paging(vcpu))
a770f6f2 2438 r = nonpaging_init_context(vcpu);
a9058ecd 2439 else if (is_long_mode(vcpu))
a770f6f2 2440 r = paging64_init_context(vcpu);
6aa8b732 2441 else if (is_pae(vcpu))
a770f6f2 2442 r = paging32E_init_context(vcpu);
6aa8b732 2443 else
a770f6f2
AK		 2444 r = paging32_init_context(vcpu);
2445
2446 vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
2447
2448 return r;
6aa8b732
AK		 2449}
2450
fb72d167
JR		 2451static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2452{
35149e21
AL		 2453 vcpu->arch.update_pte.pfn = bad_pfn;
2454
fb72d167
JR		 2455 if (tdp_enabled)
2456 return init_kvm_tdp_mmu(vcpu);
2457 else
2458 return init_kvm_softmmu(vcpu);
2459}
2460
6aa8b732
AK		 2461static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2462{
2463 ASSERT(vcpu);
ad312c7c
ZX		 2464 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2465 vcpu->arch.mmu.free(vcpu);
2466 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6aa8b732
AK		 2467 }
2468}
2469
2470int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
17c3ba9d
AK		 2471{
2472 destroy_kvm_mmu(vcpu);
2473 return init_kvm_mmu(vcpu);
2474}
8668a3c4 2475EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
17c3ba9d
AK		 2476
2477int kvm_mmu_load(struct kvm_vcpu *vcpu)
6aa8b732 2478{
714b93da
AK		 2479 int r;
2480
e2dec939 2481 r = mmu_topup_memory_caches(vcpu);
17c3ba9d
AK		 2482 if (r)
2483 goto out;
aaee2c94 2484 spin_lock(&vcpu->kvm->mmu_lock);
eb787d10 2485 kvm_mmu_free_some_pages(vcpu);
8986ecc0 2486 r = mmu_alloc_roots(vcpu);
0ba73cda 2487 mmu_sync_roots(vcpu);
aaee2c94 2488 spin_unlock(&vcpu->kvm->mmu_lock);
8986ecc0
MT		 2489 if (r)
2490 goto out;
3662cb1c 2491 /* set_cr3() should ensure TLB has been flushed */
ad312c7c 2492 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
714b93da
AK		 2493out:
2494 return r;
6aa8b732 2495}
17c3ba9d
AK		 2496EXPORT_SYMBOL_GPL(kvm_mmu_load);
2497
2498void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2499{
2500 mmu_free_roots(vcpu);
2501}
6aa8b732 2502
09072daf 2503static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
4db35314 2504 struct kvm_mmu_page *sp,
ac1b714e
AK		 2505 u64 *spte)
2506{
2507 u64 pte;
2508 struct kvm_mmu_page *child;
2509
2510 pte = *spte;
c7addb90 2511 if (is_shadow_present_pte(pte)) {
776e6633 2512 if (is_last_spte(pte, sp->role.level))
290fc38d 2513 rmap_remove(vcpu->kvm, spte);
ac1b714e
AK		 2514 else {
2515 child = page_header(pte & PT64_BASE_ADDR_MASK);
90cb0529 2516 mmu_page_remove_parent_pte(child, spte);
ac1b714e
AK		 2517 }
2518 }
d555c333 2519 __set_spte(spte, shadow_trap_nonpresent_pte);
05da4558
MT		 2520 if (is_large_pte(pte))
2521 --vcpu->kvm->stat.lpages;
ac1b714e
AK		 2522}
2523
0028425f 2524static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
4db35314 2525 struct kvm_mmu_page *sp,
0028425f 2526 u64 *spte,
489f1d65 2527 const void *new)
0028425f 2528{
30945387 2529 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
7e4e4056
JR		 2530 ++vcpu->kvm->stat.mmu_pde_zapped;
2531 return;
30945387 2532 }
0028425f 2533
4cee5764 2534 ++vcpu->kvm->stat.mmu_pte_updated;
4db35314 2535 if (sp->role.glevels == PT32_ROOT_LEVEL)
489f1d65 2536 paging32_update_pte(vcpu, sp, spte, new);
0028425f 2537 else
489f1d65 2538 paging64_update_pte(vcpu, sp, spte, new);
0028425f
AK		 2539}
2540
79539cec
AK		 2541static bool need_remote_flush(u64 old, u64 new)
2542{
2543 if (!is_shadow_present_pte(old))
2544 return false;
2545 if (!is_shadow_present_pte(new))
2546 return true;
2547 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2548 return true;
2549 old ^= PT64_NX_MASK;
2550 new ^= PT64_NX_MASK;
2551 return (old & ~new & PT64_PERM_MASK) != 0;
2552}
2553
2554static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2555{
2556 if (need_remote_flush(old, new))
2557 kvm_flush_remote_tlbs(vcpu->kvm);
2558 else
2559 kvm_mmu_flush_tlb(vcpu);
2560}
2561
12b7d28f
AK		 2562static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2563{
ad312c7c 2564 u64 *spte = vcpu->arch.last_pte_updated;
12b7d28f 2565
7b52345e 2566 return !!(spte && (*spte & shadow_accessed_mask));
12b7d28f
AK		 2567}
2568
d7824fff 2569static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
72016f3a 2570 u64 gpte)
d7824fff
AK		 2571{
2572 gfn_t gfn;
35149e21 2573 pfn_t pfn;
d7824fff 2574
43a3795a 2575 if (!is_present_gpte(gpte))
d7824fff
AK		 2576 return;
2577 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
72dc67a6 2578
e930bffe 2579 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 2580 smp_rmb();
35149e21 2581 pfn = gfn_to_pfn(vcpu->kvm, gfn);
72dc67a6 2582
35149e21
AL		 2583 if (is_error_pfn(pfn)) {
2584 kvm_release_pfn_clean(pfn);
d196e343
AK		 2585 return;
2586 }
d7824fff 2587 vcpu->arch.update_pte.gfn = gfn;
35149e21 2588 vcpu->arch.update_pte.pfn = pfn;
d7824fff
AK		 2589}
2590
1b7fcd32
AK		 2591static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2592{
2593 u64 *spte = vcpu->arch.last_pte_updated;
2594
2595 if (spte
2596 && vcpu->arch.last_pte_gfn == gfn
2597 && shadow_accessed_mask
2598 && !(*spte & shadow_accessed_mask)
2599 && is_shadow_present_pte(*spte))
2600 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2601}
2602
09072daf 2603void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
ad218f85
MT		 2604 const u8 *new, int bytes,
2605 bool guest_initiated)
da4a00f0 2606{
9b7a0325 2607 gfn_t gfn = gpa >> PAGE_SHIFT;
4db35314 2608 struct kvm_mmu_page *sp;
0e7bc4b9 2609 struct hlist_node *node, *n;
9b7a0325
AK		 2610 struct hlist_head *bucket;
2611 unsigned index;
489f1d65 2612 u64 entry, gentry;
9b7a0325 2613 u64 *spte;
9b7a0325 2614 unsigned offset = offset_in_page(gpa);
0e7bc4b9 2615 unsigned pte_size;
9b7a0325 2616 unsigned page_offset;
0e7bc4b9 2617 unsigned misaligned;
fce0657f 2618 unsigned quadrant;
9b7a0325 2619 int level;
86a5ba02 2620 int flooded = 0;
ac1b714e 2621 int npte;
489f1d65 2622 int r;
08e850c6 2623 int invlpg_counter;
9b7a0325 2624
b8688d51 2625 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
72016f3a 2626
08e850c6 2627 invlpg_counter = atomic_read(&vcpu->kvm->arch.invlpg_counter);
72016f3a
AK		 2628
2629 /*
2630 * Assume that the pte write on a page table of the same type
2631 * as the current vcpu paging mode. This is nearly always true
2632 * (might be false while changing modes). Note it is verified later
2633 * by update_pte().
2634 */
08e850c6 2635 if ((is_pae(vcpu) && bytes == 4) || !new) {
72016f3a 2636 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
08e850c6
AK		 2637 if (is_pae(vcpu)) {
2638 gpa &= ~(gpa_t)7;
2639 bytes = 8;
2640 }
2641 r = kvm_read_guest(vcpu->kvm, gpa, &gentry, min(bytes, 8));
72016f3a
AK		 2642 if (r)
2643 gentry = 0;
08e850c6
AK		 2644 new = (const u8 *)&gentry;
2645 }
2646
2647 switch (bytes) {
2648 case 4:
2649 gentry = *(const u32 *)new;
2650 break;
2651 case 8:
2652 gentry = *(const u64 *)new;
2653 break;
2654 default:
2655 gentry = 0;
2656 break;
72016f3a
AK		 2657 }
2658
2659 mmu_guess_page_from_pte_write(vcpu, gpa, gentry);
aaee2c94 2660 spin_lock(&vcpu->kvm->mmu_lock);
08e850c6
AK		 2661 if (atomic_read(&vcpu->kvm->arch.invlpg_counter) != invlpg_counter)
2662 gentry = 0;
1b7fcd32 2663 kvm_mmu_access_page(vcpu, gfn);
eb787d10 2664 kvm_mmu_free_some_pages(vcpu);
4cee5764 2665 ++vcpu->kvm->stat.mmu_pte_write;
c7addb90 2666 kvm_mmu_audit(vcpu, "pre pte write");
ad218f85
MT		 2667 if (guest_initiated) {
2668 if (gfn == vcpu->arch.last_pt_write_gfn
2669 && !last_updated_pte_accessed(vcpu)) {
2670 ++vcpu->arch.last_pt_write_count;
2671 if (vcpu->arch.last_pt_write_count >= 3)
2672 flooded = 1;
2673 } else {
2674 vcpu->arch.last_pt_write_gfn = gfn;
2675 vcpu->arch.last_pt_write_count = 1;
2676 vcpu->arch.last_pte_updated = NULL;
2677 }
86a5ba02 2678 }
1ae0a13d 2679 index = kvm_page_table_hashfn(gfn);
f05e70ac 2680 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4db35314 2681 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
f6e2c02b 2682 if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
9b7a0325 2683 continue;
4db35314 2684 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
0e7bc4b9 2685 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
e925c5ba 2686 misaligned |= bytes < 4;
86a5ba02 2687 if (misaligned || flooded) {
0e7bc4b9
AK		 2688 /*
2689 * Misaligned accesses are too much trouble to fix
2690 * up; also, they usually indicate a page is not used
2691 * as a page table.
86a5ba02
AK		 2692 *
2693 * If we're seeing too many writes to a page,
2694 * it may no longer be a page table, or we may be
2695 * forking, in which case it is better to unmap the
2696 * page.
0e7bc4b9
AK		 2697 */
2698 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
4db35314 2699 gpa, bytes, sp->role.word);
07385413
MT		 2700 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2701 n = bucket->first;
4cee5764 2702 ++vcpu->kvm->stat.mmu_flooded;
0e7bc4b9
AK		 2703 continue;
2704 }
9b7a0325 2705 page_offset = offset;
4db35314 2706 level = sp->role.level;
ac1b714e 2707 npte = 1;
4db35314 2708 if (sp->role.glevels == PT32_ROOT_LEVEL) {
ac1b714e
AK		 2709 page_offset <<= 1; /* 32->64 */
2710 /*
2711 * A 32-bit pde maps 4MB while the shadow pdes map
2712 * only 2MB. So we need to double the offset again
2713 * and zap two pdes instead of one.
2714 */
2715 if (level == PT32_ROOT_LEVEL) {
6b8d0f9b 2716 page_offset &= ~7; /* kill rounding error */
ac1b714e
AK		 2717 page_offset <<= 1;
2718 npte = 2;
2719 }
fce0657f 2720 quadrant = page_offset >> PAGE_SHIFT;
9b7a0325 2721 page_offset &= ~PAGE_MASK;
4db35314 2722 if (quadrant != sp->role.quadrant)
fce0657f 2723 continue;
9b7a0325 2724 }
4db35314 2725 spte = &sp->spt[page_offset / sizeof(*spte)];
ac1b714e 2726 while (npte--) {
79539cec 2727 entry = *spte;
4db35314 2728 mmu_pte_write_zap_pte(vcpu, sp, spte);
72016f3a
AK		 2729 if (gentry)
2730 mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
79539cec 2731 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
ac1b714e 2732 ++spte;
9b7a0325 2733 }
9b7a0325 2734 }
c7addb90 2735 kvm_mmu_audit(vcpu, "post pte write");
aaee2c94 2736 spin_unlock(&vcpu->kvm->mmu_lock);
35149e21
AL		 2737 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2738 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2739 vcpu->arch.update_pte.pfn = bad_pfn;
d7824fff 2740 }
da4a00f0
AK		 2741}
2742
a436036b
AK		 2743int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2744{
10589a46
MT		 2745 gpa_t gpa;
2746 int r;
a436036b 2747
60f24784
AK		 2748 if (tdp_enabled)
2749 return 0;
2750
1871c602 2751 gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
10589a46 2752
aaee2c94 2753 spin_lock(&vcpu->kvm->mmu_lock);
10589a46 2754 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
aaee2c94 2755 spin_unlock(&vcpu->kvm->mmu_lock);
10589a46 2756 return r;
a436036b 2757}
577bdc49 2758EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
a436036b 2759
22d95b12 2760void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
ebeace86 2761{
3b80fffe
IE		 2762 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES &&
2763 !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
4db35314 2764 struct kvm_mmu_page *sp;
ebeace86 2765
f05e70ac 2766 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
4db35314
AK		 2767 struct kvm_mmu_page, link);
2768 kvm_mmu_zap_page(vcpu->kvm, sp);
4cee5764 2769 ++vcpu->kvm->stat.mmu_recycled;
ebeace86
AK		 2770 }
2771}
ebeace86 2772
3067714c
AK		 2773int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2774{
2775 int r;
2776 enum emulation_result er;
2777
ad312c7c 2778 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
3067714c
AK		 2779 if (r < 0)
2780 goto out;
2781
2782 if (!r) {
2783 r = 1;
2784 goto out;
2785 }
2786
b733bfb5
AK		 2787 r = mmu_topup_memory_caches(vcpu);
2788 if (r)
2789 goto out;
2790
851ba692 2791 er = emulate_instruction(vcpu, cr2, error_code, 0);
3067714c
AK		 2792
2793 switch (er) {
2794 case EMULATE_DONE:
2795 return 1;
2796 case EMULATE_DO_MMIO:
2797 ++vcpu->stat.mmio_exits;
2798 return 0;
2799 case EMULATE_FAIL:
3f5d18a9
AK		 2800 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
2801 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
a9c7399d 2802 vcpu->run->internal.ndata = 0;
3f5d18a9 2803 return 0;
3067714c
AK		 2804 default:
2805 BUG();
2806 }
2807out:
3067714c
AK		 2808 return r;
2809}
2810EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2811
a7052897
MT		 2812void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2813{
a7052897 2814 vcpu->arch.mmu.invlpg(vcpu, gva);
a7052897
MT		 2815 kvm_mmu_flush_tlb(vcpu);
2816 ++vcpu->stat.invlpg;
2817}
2818EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2819
18552672
JR		 2820void kvm_enable_tdp(void)
2821{
2822 tdp_enabled = true;
2823}
2824EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2825
5f4cb662
JR		 2826void kvm_disable_tdp(void)
2827{
2828 tdp_enabled = false;
2829}
2830EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2831
6aa8b732
AK		 2832static void free_mmu_pages(struct kvm_vcpu *vcpu)
2833{
ad312c7c 2834 free_page((unsigned long)vcpu->arch.mmu.pae_root);
6aa8b732
AK		 2835}
2836
2837static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2838{
17ac10ad 2839 struct page *page;
6aa8b732
AK		 2840 int i;
2841
2842 ASSERT(vcpu);
2843
17ac10ad
AK		 2844 /*
2845 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2846 * Therefore we need to allocate shadow page tables in the first
2847 * 4GB of memory, which happens to fit the DMA32 zone.
2848 */
2849 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2850 if (!page)
d7fa6ab2
WY		 2851 return -ENOMEM;
2852
ad312c7c 2853 vcpu->arch.mmu.pae_root = page_address(page);
17ac10ad 2854 for (i = 0; i < 4; ++i)
ad312c7c 2855 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 2856
6aa8b732 2857 return 0;
6aa8b732
AK		 2858}
2859
8018c27b 2860int kvm_mmu_create(struct kvm_vcpu *vcpu)
6aa8b732 2861{
6aa8b732 2862 ASSERT(vcpu);
ad312c7c 2863 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 2864
8018c27b
IM		 2865 return alloc_mmu_pages(vcpu);
2866}
6aa8b732 2867
8018c27b
IM		 2868int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2869{
2870 ASSERT(vcpu);
ad312c7c 2871 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2c264957 2872
8018c27b 2873 return init_kvm_mmu(vcpu);
6aa8b732
AK		 2874}
2875
2876void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2877{
2878 ASSERT(vcpu);
2879
2880 destroy_kvm_mmu(vcpu);
2881 free_mmu_pages(vcpu);
714b93da 2882 mmu_free_memory_caches(vcpu);
6aa8b732
AK		 2883}
2884
90cb0529 2885void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
6aa8b732 2886{
4db35314 2887 struct kvm_mmu_page *sp;
6aa8b732 2888
f05e70ac 2889 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
6aa8b732
AK		 2890 int i;
2891 u64 *pt;
2892
291f26bc 2893 if (!test_bit(slot, sp->slot_bitmap))
6aa8b732
AK		 2894 continue;
2895
4db35314 2896 pt = sp->spt;
6aa8b732
AK		 2897 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2898 /* avoid RMW */
9647c14c 2899 if (pt[i] & PT_WRITABLE_MASK)
6aa8b732 2900 pt[i] &= ~PT_WRITABLE_MASK;
6aa8b732 2901 }
171d595d 2902 kvm_flush_remote_tlbs(kvm);
6aa8b732 2903}
37a7d8b0 2904
90cb0529 2905void kvm_mmu_zap_all(struct kvm *kvm)
e0fa826f 2906{
4db35314 2907 struct kvm_mmu_page *sp, *node;
e0fa826f 2908
aaee2c94 2909 spin_lock(&kvm->mmu_lock);
f05e70ac 2910 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
07385413
MT		 2911 if (kvm_mmu_zap_page(kvm, sp))
2912 node = container_of(kvm->arch.active_mmu_pages.next,
2913 struct kvm_mmu_page, link);
aaee2c94 2914 spin_unlock(&kvm->mmu_lock);
e0fa826f 2915
90cb0529 2916 kvm_flush_remote_tlbs(kvm);
e0fa826f
DL		 2917}
2918
8b2cf73c 2919static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
3ee16c81
IE		 2920{
2921 struct kvm_mmu_page *page;
2922
2923 page = container_of(kvm->arch.active_mmu_pages.prev,
2924 struct kvm_mmu_page, link);
2925 kvm_mmu_zap_page(kvm, page);
2926}
2927
2928static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2929{
2930 struct kvm *kvm;
2931 struct kvm *kvm_freed = NULL;
2932 int cache_count = 0;
2933
2934 spin_lock(&kvm_lock);
2935
2936 list_for_each_entry(kvm, &vm_list, vm_list) {
f656ce01 2937 int npages, idx;
3ee16c81 2938
f656ce01 2939 idx = srcu_read_lock(&kvm->srcu);
3ee16c81
IE		 2940 spin_lock(&kvm->mmu_lock);
2941 npages = kvm->arch.n_alloc_mmu_pages -
2942 kvm->arch.n_free_mmu_pages;
2943 cache_count += npages;
2944 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2945 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2946 cache_count--;
2947 kvm_freed = kvm;
2948 }
2949 nr_to_scan--;
2950
2951 spin_unlock(&kvm->mmu_lock);
f656ce01 2952 srcu_read_unlock(&kvm->srcu, idx);
3ee16c81
IE		 2953 }
2954 if (kvm_freed)
2955 list_move_tail(&kvm_freed->vm_list, &vm_list);
2956
2957 spin_unlock(&kvm_lock);
2958
2959 return cache_count;
2960}
2961
2962static struct shrinker mmu_shrinker = {
2963 .shrink = mmu_shrink,
2964 .seeks = DEFAULT_SEEKS * 10,
2965};
2966
2ddfd20e 2967static void mmu_destroy_caches(void)
b5a33a75
AK		 2968{
2969 if (pte_chain_cache)
2970 kmem_cache_destroy(pte_chain_cache);
2971 if (rmap_desc_cache)
2972 kmem_cache_destroy(rmap_desc_cache);
d3d25b04
AK		 2973 if (mmu_page_header_cache)
2974 kmem_cache_destroy(mmu_page_header_cache);
b5a33a75
AK		 2975}
2976
3ee16c81
IE		 2977void kvm_mmu_module_exit(void)
2978{
2979 mmu_destroy_caches();
2980 unregister_shrinker(&mmu_shrinker);
2981}
2982
b5a33a75
AK		 2983int kvm_mmu_module_init(void)
2984{
2985 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2986 sizeof(struct kvm_pte_chain),
20c2df83 2987 0, 0, NULL);
b5a33a75
AK		 2988 if (!pte_chain_cache)
2989 goto nomem;
2990 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2991 sizeof(struct kvm_rmap_desc),
20c2df83 2992 0, 0, NULL);
b5a33a75
AK		 2993 if (!rmap_desc_cache)
2994 goto nomem;
2995
d3d25b04
AK		 2996 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2997 sizeof(struct kvm_mmu_page),
20c2df83 2998 0, 0, NULL);
d3d25b04
AK		 2999 if (!mmu_page_header_cache)
3000 goto nomem;
3001
3ee16c81
IE		 3002 register_shrinker(&mmu_shrinker);
3003
b5a33a75
AK		 3004 return 0;
3005
3006nomem:
3ee16c81 3007 mmu_destroy_caches();
b5a33a75
AK		 3008 return -ENOMEM;
3009}
3010
3ad82a7e
ZX		 3011/*
3012 * Caculate mmu pages needed for kvm.
3013 */
3014unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3015{
3016 int i;
3017 unsigned int nr_mmu_pages;
3018 unsigned int nr_pages = 0;
bc6678a3 3019 struct kvm_memslots *slots;
3ad82a7e 3020
bc6678a3
MT		 3021 slots = rcu_dereference(kvm->memslots);
3022 for (i = 0; i < slots->nmemslots; i++)
3023 nr_pages += slots->memslots[i].npages;
3ad82a7e
ZX		 3024
3025 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3026 nr_mmu_pages = max(nr_mmu_pages,
3027 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3028
3029 return nr_mmu_pages;
3030}
3031
2f333bcb
MT		 3032static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3033 unsigned len)
3034{
3035 if (len > buffer->len)
3036 return NULL;
3037 return buffer->ptr;
3038}
3039
3040static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3041 unsigned len)
3042{
3043 void *ret;
3044
3045 ret = pv_mmu_peek_buffer(buffer, len);
3046 if (!ret)
3047 return ret;
3048 buffer->ptr += len;
3049 buffer->len -= len;
3050 buffer->processed += len;
3051 return ret;
3052}
3053
3054static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3055 gpa_t addr, gpa_t value)
3056{
3057 int bytes = 8;
3058 int r;
3059
3060 if (!is_long_mode(vcpu) && !is_pae(vcpu))
3061 bytes = 4;
3062
3063 r = mmu_topup_memory_caches(vcpu);
3064 if (r)
3065 return r;
3066
3200f405 3067 if (!emulator_write_phys(vcpu, addr, &value, bytes))
2f333bcb
MT		 3068 return -EFAULT;
3069
3070 return 1;
3071}
3072
3073static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3074{
a8cd0244 3075 kvm_set_cr3(vcpu, vcpu->arch.cr3);
2f333bcb
MT		 3076 return 1;
3077}
3078
3079static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3080{
3081 spin_lock(&vcpu->kvm->mmu_lock);
3082 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3083 spin_unlock(&vcpu->kvm->mmu_lock);
3084 return 1;
3085}
3086
3087static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3088 struct kvm_pv_mmu_op_buffer *buffer)
3089{
3090 struct kvm_mmu_op_header *header;
3091
3092 header = pv_mmu_peek_buffer(buffer, sizeof *header);
3093 if (!header)
3094 return 0;
3095 switch (header->op) {
3096 case KVM_MMU_OP_WRITE_PTE: {
3097 struct kvm_mmu_op_write_pte *wpte;
3098
3099 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3100 if (!wpte)
3101 return 0;
3102 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3103 wpte->pte_val);
3104 }
3105 case KVM_MMU_OP_FLUSH_TLB: {
3106 struct kvm_mmu_op_flush_tlb *ftlb;
3107
3108 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3109 if (!ftlb)
3110 return 0;
3111 return kvm_pv_mmu_flush_tlb(vcpu);
3112 }
3113 case KVM_MMU_OP_RELEASE_PT: {
3114 struct kvm_mmu_op_release_pt *rpt;
3115
3116 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3117 if (!rpt)
3118 return 0;
3119 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3120 }
3121 default: return 0;
3122 }
3123}
3124
3125int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3126 gpa_t addr, unsigned long *ret)
3127{
3128 int r;
6ad18fba 3129 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
2f333bcb 3130
6ad18fba
DH		 3131 buffer->ptr = buffer->buf;
3132 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3133 buffer->processed = 0;
2f333bcb 3134
6ad18fba 3135 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
2f333bcb
MT		 3136 if (r)
3137 goto out;
3138
6ad18fba
DH		 3139 while (buffer->len) {
3140 r = kvm_pv_mmu_op_one(vcpu, buffer);
2f333bcb
MT		 3141 if (r < 0)
3142 goto out;
3143 if (r == 0)
3144 break;
3145 }
3146
3147 r = 1;
3148out:
6ad18fba 3149 *ret = buffer->processed;
2f333bcb
MT		 3150 return r;
3151}
3152
94d8b056
MT		 3153int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3154{
3155 struct kvm_shadow_walk_iterator iterator;
3156 int nr_sptes = 0;
3157
3158 spin_lock(&vcpu->kvm->mmu_lock);
3159 for_each_shadow_entry(vcpu, addr, iterator) {
3160 sptes[iterator.level-1] = *iterator.sptep;
3161 nr_sptes++;
3162 if (!is_shadow_present_pte(*iterator.sptep))
3163 break;
3164 }
3165 spin_unlock(&vcpu->kvm->mmu_lock);
3166
3167 return nr_sptes;
3168}
3169EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3170
37a7d8b0
AK		 3171#ifdef AUDIT
3172
3173static const char *audit_msg;
3174
3175static gva_t canonicalize(gva_t gva)
3176{
3177#ifdef CONFIG_X86_64
3178 gva = (long long)(gva << 16) >> 16;
3179#endif
3180 return gva;
3181}
3182
08a3732b 3183
805d32de 3184typedef void (*inspect_spte_fn) (struct kvm *kvm, u64 *sptep);
08a3732b
MT		 3185
3186static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3187 inspect_spte_fn fn)
3188{
3189 int i;
3190
3191 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3192 u64 ent = sp->spt[i];
3193
3194 if (is_shadow_present_pte(ent)) {
2920d728 3195 if (!is_last_spte(ent, sp->role.level)) {
08a3732b
MT		 3196 struct kvm_mmu_page *child;
3197 child = page_header(ent & PT64_BASE_ADDR_MASK);
3198 __mmu_spte_walk(kvm, child, fn);
2920d728 3199 } else
805d32de 3200 fn(kvm, &sp->spt[i]);
08a3732b
MT		 3201 }
3202 }
3203}
3204
3205static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3206{
3207 int i;
3208 struct kvm_mmu_page *sp;
3209
3210 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3211 return;
3212 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3213 hpa_t root = vcpu->arch.mmu.root_hpa;
3214 sp = page_header(root);
3215 __mmu_spte_walk(vcpu->kvm, sp, fn);
3216 return;
3217 }
3218 for (i = 0; i < 4; ++i) {
3219 hpa_t root = vcpu->arch.mmu.pae_root[i];
3220
3221 if (root && VALID_PAGE(root)) {
3222 root &= PT64_BASE_ADDR_MASK;
3223 sp = page_header(root);
3224 __mmu_spte_walk(vcpu->kvm, sp, fn);
3225 }
3226 }
3227 return;
3228}
3229
37a7d8b0
AK		 3230static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3231 gva_t va, int level)
3232{
3233 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3234 int i;
3235 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3236
3237 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3238 u64 ent = pt[i];
3239
c7addb90 3240 if (ent == shadow_trap_nonpresent_pte)
37a7d8b0
AK		 3241 continue;
3242
3243 va = canonicalize(va);
2920d728
MT		 3244 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3245 audit_mappings_page(vcpu, ent, va, level - 1);
3246 else {
1871c602 3247 gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, va, NULL);
34382539
JK		 3248 gfn_t gfn = gpa >> PAGE_SHIFT;
3249 pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3250 hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
37a7d8b0 3251
2aaf65e8
MT		 3252 if (is_error_pfn(pfn)) {
3253 kvm_release_pfn_clean(pfn);
3254 continue;
3255 }
3256
c7addb90 3257 if (is_shadow_present_pte(ent)
37a7d8b0 3258 && (ent & PT64_BASE_ADDR_MASK) != hpa)
c7addb90
AK		 3259 printk(KERN_ERR "xx audit error: (%s) levels %d"
3260 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
ad312c7c 3261 audit_msg, vcpu->arch.mmu.root_level,
d77c26fc
MD		 3262 va, gpa, hpa, ent,
3263 is_shadow_present_pte(ent));
c7addb90
AK		 3264 else if (ent == shadow_notrap_nonpresent_pte
3265 && !is_error_hpa(hpa))
3266 printk(KERN_ERR "audit: (%s) notrap shadow,"
3267 " valid guest gva %lx\n", audit_msg, va);
35149e21 3268 kvm_release_pfn_clean(pfn);
c7addb90 3269
37a7d8b0
AK		 3270 }
3271 }
3272}
3273
3274static void audit_mappings(struct kvm_vcpu *vcpu)
3275{
1ea252af 3276 unsigned i;
37a7d8b0 3277
ad312c7c
ZX		 3278 if (vcpu->arch.mmu.root_level == 4)
3279 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
37a7d8b0
AK		 3280 else
3281 for (i = 0; i < 4; ++i)
ad312c7c 3282 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
37a7d8b0 3283 audit_mappings_page(vcpu,
ad312c7c 3284 vcpu->arch.mmu.pae_root[i],
37a7d8b0
AK		 3285 i << 30,
3286 2);
3287}
3288
3289static int count_rmaps(struct kvm_vcpu *vcpu)
3290{
805d32de
XG		 3291 struct kvm *kvm = vcpu->kvm;
3292 struct kvm_memslots *slots;
37a7d8b0 3293 int nmaps = 0;
bc6678a3 3294 int i, j, k, idx;
37a7d8b0 3295
bc6678a3
MT		 3296 idx = srcu_read_lock(&kvm->srcu);
3297 slots = rcu_dereference(kvm->memslots);
37a7d8b0 3298 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
bc6678a3 3299 struct kvm_memory_slot *m = &slots->memslots[i];
37a7d8b0
AK		 3300 struct kvm_rmap_desc *d;
3301
3302 for (j = 0; j < m->npages; ++j) {
290fc38d 3303 unsigned long *rmapp = &m->rmap[j];
37a7d8b0 3304
290fc38d 3305 if (!*rmapp)
37a7d8b0 3306 continue;
290fc38d 3307 if (!(*rmapp & 1)) {
37a7d8b0
AK		 3308 ++nmaps;
3309 continue;
3310 }
290fc38d 3311 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
37a7d8b0
AK		 3312 while (d) {
3313 for (k = 0; k < RMAP_EXT; ++k)
d555c333 3314 if (d->sptes[k])
37a7d8b0
AK		 3315 ++nmaps;
3316 else
3317 break;
3318 d = d->more;
3319 }
3320 }
3321 }
bc6678a3 3322 srcu_read_unlock(&kvm->srcu, idx);
37a7d8b0
AK		 3323 return nmaps;
3324}
3325
805d32de 3326void inspect_spte_has_rmap(struct kvm *kvm, u64 *sptep)
08a3732b
MT		 3327{
3328 unsigned long *rmapp;
3329 struct kvm_mmu_page *rev_sp;
3330 gfn_t gfn;
3331
3332 if (*sptep & PT_WRITABLE_MASK) {
3333 rev_sp = page_header(__pa(sptep));
3334 gfn = rev_sp->gfns[sptep - rev_sp->spt];
3335
3336 if (!gfn_to_memslot(kvm, gfn)) {
3337 if (!printk_ratelimit())
3338 return;
3339 printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3340 audit_msg, gfn);
3341 printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
805d32de 3342 audit_msg, (long int)(sptep - rev_sp->spt),
08a3732b
MT		 3343 rev_sp->gfn);
3344 dump_stack();
3345 return;
3346 }
3347
2920d728 3348 rmapp = gfn_to_rmap(kvm, rev_sp->gfns[sptep - rev_sp->spt],
805d32de 3349 rev_sp->role.level);
08a3732b
MT		 3350 if (!*rmapp) {
3351 if (!printk_ratelimit())
3352 return;
3353 printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3354 audit_msg, *sptep);
3355 dump_stack();
3356 }
3357 }
3358
3359}
3360
3361void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3362{
3363 mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3364}
3365
3366static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
37a7d8b0 3367{
4db35314 3368 struct kvm_mmu_page *sp;
37a7d8b0
AK		 3369 int i;
3370
f05e70ac 3371 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 3372 u64 *pt = sp->spt;
37a7d8b0 3373
4db35314 3374 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
37a7d8b0
AK		 3375 continue;
3376
3377 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3378 u64 ent = pt[i];
3379
3380 if (!(ent & PT_PRESENT_MASK))
3381 continue;
3382 if (!(ent & PT_WRITABLE_MASK))
3383 continue;
805d32de 3384 inspect_spte_has_rmap(vcpu->kvm, &pt[i]);
37a7d8b0
AK		 3385 }
3386 }
08a3732b 3387 return;
37a7d8b0
AK		 3388}
3389
3390static void audit_rmap(struct kvm_vcpu *vcpu)
3391{
08a3732b
MT		 3392 check_writable_mappings_rmap(vcpu);
3393 count_rmaps(vcpu);
37a7d8b0
AK		 3394}
3395
3396static void audit_write_protection(struct kvm_vcpu *vcpu)
3397{
4db35314 3398 struct kvm_mmu_page *sp;
290fc38d
IE		 3399 struct kvm_memory_slot *slot;
3400 unsigned long *rmapp;
e58b0f9e 3401 u64 *spte;
290fc38d 3402 gfn_t gfn;
37a7d8b0 3403
f05e70ac 3404 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
f6e2c02b 3405 if (sp->role.direct)
37a7d8b0 3406 continue;
e58b0f9e
MT		 3407 if (sp->unsync)
3408 continue;
37a7d8b0 3409
4db35314 3410 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
2843099f 3411 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
290fc38d 3412 rmapp = &slot->rmap[gfn - slot->base_gfn];
e58b0f9e
MT		 3413
3414 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3415 while (spte) {
3416 if (*spte & PT_WRITABLE_MASK)
3417 printk(KERN_ERR "%s: (%s) shadow page has "
3418 "writable mappings: gfn %lx role %x\n",
b8688d51 3419 __func__, audit_msg, sp->gfn,
4db35314 3420 sp->role.word);
e58b0f9e
MT		 3421 spte = rmap_next(vcpu->kvm, rmapp, spte);
3422 }
37a7d8b0
AK		 3423 }
3424}
3425
3426static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3427{
3428 int olddbg = dbg;
3429
3430 dbg = 0;
3431 audit_msg = msg;
3432 audit_rmap(vcpu);
3433 audit_write_protection(vcpu);
2aaf65e8
MT		 3434 if (strcmp("pre pte write", audit_msg) != 0)
3435 audit_mappings(vcpu);
08a3732b 3436 audit_writable_sptes_have_rmaps(vcpu);
37a7d8b0
AK		 3437 dbg = olddbg;
3438}
3439
3440#endif
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