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xen: adjust early dom0 p2m handling to xen hypervisor behavior
[mirror_ubuntu-zesty-kernel.git] / arch / x86 / xen / mmu.c
CommitLineData
3b827c1b
JF
1/*
2 * Xen mmu operations
3 *
4 * This file contains the various mmu fetch and update operations.
5 * The most important job they must perform is the mapping between the
6 * domain's pfn and the overall machine mfns.
7 *
8 * Xen allows guests to directly update the pagetable, in a controlled
9 * fashion. In other words, the guest modifies the same pagetable
10 * that the CPU actually uses, which eliminates the overhead of having
11 * a separate shadow pagetable.
12 *
13 * In order to allow this, it falls on the guest domain to map its
14 * notion of a "physical" pfn - which is just a domain-local linear
15 * address - into a real "machine address" which the CPU's MMU can
16 * use.
17 *
18 * A pgd_t/pmd_t/pte_t will typically contain an mfn, and so can be
19 * inserted directly into the pagetable. When creating a new
20 * pte/pmd/pgd, it converts the passed pfn into an mfn. Conversely,
21 * when reading the content back with __(pgd|pmd|pte)_val, it converts
22 * the mfn back into a pfn.
23 *
24 * The other constraint is that all pages which make up a pagetable
25 * must be mapped read-only in the guest. This prevents uncontrolled
26 * guest updates to the pagetable. Xen strictly enforces this, and
27 * will disallow any pagetable update which will end up mapping a
28 * pagetable page RW, and will disallow using any writable page as a
29 * pagetable.
30 *
31 * Naively, when loading %cr3 with the base of a new pagetable, Xen
32 * would need to validate the whole pagetable before going on.
33 * Naturally, this is quite slow. The solution is to "pin" a
34 * pagetable, which enforces all the constraints on the pagetable even
35 * when it is not actively in use. This menas that Xen can be assured
36 * that it is still valid when you do load it into %cr3, and doesn't
37 * need to revalidate it.
38 *
39 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
40 */
f120f13e 41#include <linux/sched.h>
f4f97b3e 42#include <linux/highmem.h>
994025ca 43#include <linux/debugfs.h>
3b827c1b 44#include <linux/bug.h>
d2cb2145 45#include <linux/vmalloc.h>
7a2463dc
PG
46#include <linux/export.h>
47#include <linux/init.h>
5a0e3ad6 48#include <linux/gfp.h>
a9ce6bc1 49#include <linux/memblock.h>
2222e71b 50#include <linux/seq_file.h>
34b6f01a 51#include <linux/crash_dump.h>
3b827c1b 52
84708807
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53#include <trace/events/xen.h>
54
3b827c1b
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55#include <asm/pgtable.h>
56#include <asm/tlbflush.h>
5deb30d1 57#include <asm/fixmap.h>
3b827c1b 58#include <asm/mmu_context.h>
319f3ba5 59#include <asm/setup.h>
f4f97b3e 60#include <asm/paravirt.h>
7347b408 61#include <asm/e820.h>
cbcd79c2 62#include <asm/linkage.h>
08bbc9da 63#include <asm/page.h>
fef5ba79 64#include <asm/init.h>
41f2e477 65#include <asm/pat.h>
900cba88 66#include <asm/smp.h>
3b827c1b
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67
68#include <asm/xen/hypercall.h>
f4f97b3e 69#include <asm/xen/hypervisor.h>
3b827c1b 70
c0011dbf 71#include <xen/xen.h>
3b827c1b
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72#include <xen/page.h>
73#include <xen/interface/xen.h>
59151001 74#include <xen/interface/hvm/hvm_op.h>
319f3ba5 75#include <xen/interface/version.h>
c0011dbf 76#include <xen/interface/memory.h>
319f3ba5 77#include <xen/hvc-console.h>
3b827c1b 78
f4f97b3e 79#include "multicalls.h"
3b827c1b 80#include "mmu.h"
994025ca
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81#include "debugfs.h"
82
19001c8c
AN
83/*
84 * Protects atomic reservation decrease/increase against concurrent increases.
06f521d5 85 * Also protects non-atomic updates of current_pages and balloon lists.
19001c8c
AN
86 */
87DEFINE_SPINLOCK(xen_reservation_lock);
88
caaf9ecf 89#ifdef CONFIG_X86_32
319f3ba5
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90/*
91 * Identity map, in addition to plain kernel map. This needs to be
92 * large enough to allocate page table pages to allocate the rest.
93 * Each page can map 2MB.
94 */
764f0138
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95#define LEVEL1_IDENT_ENTRIES (PTRS_PER_PTE * 4)
96static RESERVE_BRK_ARRAY(pte_t, level1_ident_pgt, LEVEL1_IDENT_ENTRIES);
caaf9ecf 97#endif
319f3ba5
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98#ifdef CONFIG_X86_64
99/* l3 pud for userspace vsyscall mapping */
100static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss;
101#endif /* CONFIG_X86_64 */
102
103/*
104 * Note about cr3 (pagetable base) values:
105 *
106 * xen_cr3 contains the current logical cr3 value; it contains the
107 * last set cr3. This may not be the current effective cr3, because
108 * its update may be being lazily deferred. However, a vcpu looking
109 * at its own cr3 can use this value knowing that it everything will
110 * be self-consistent.
111 *
112 * xen_current_cr3 contains the actual vcpu cr3; it is set once the
113 * hypercall to set the vcpu cr3 is complete (so it may be a little
114 * out of date, but it will never be set early). If one vcpu is
115 * looking at another vcpu's cr3 value, it should use this variable.
116 */
117DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */
118DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */
119
04414baa 120static phys_addr_t xen_pt_base, xen_pt_size __initdata;
319f3ba5 121
d6182fbf
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122/*
123 * Just beyond the highest usermode address. STACK_TOP_MAX has a
124 * redzone above it, so round it up to a PGD boundary.
125 */
126#define USER_LIMIT ((STACK_TOP_MAX + PGDIR_SIZE - 1) & PGDIR_MASK)
127
9976b39b
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128unsigned long arbitrary_virt_to_mfn(void *vaddr)
129{
130 xmaddr_t maddr = arbitrary_virt_to_machine(vaddr);
131
132 return PFN_DOWN(maddr.maddr);
133}
134
ce803e70 135xmaddr_t arbitrary_virt_to_machine(void *vaddr)
3b827c1b 136{
ce803e70 137 unsigned long address = (unsigned long)vaddr;
da7bfc50 138 unsigned int level;
9f32d21c
CL
139 pte_t *pte;
140 unsigned offset;
3b827c1b 141
9f32d21c
CL
142 /*
143 * if the PFN is in the linear mapped vaddr range, we can just use
144 * the (quick) virt_to_machine() p2m lookup
145 */
146 if (virt_addr_valid(vaddr))
147 return virt_to_machine(vaddr);
148
149 /* otherwise we have to do a (slower) full page-table walk */
3b827c1b 150
9f32d21c
CL
151 pte = lookup_address(address, &level);
152 BUG_ON(pte == NULL);
153 offset = address & ~PAGE_MASK;
ebd879e3 154 return XMADDR(((phys_addr_t)pte_mfn(*pte) << PAGE_SHIFT) + offset);
3b827c1b 155}
de23be5f 156EXPORT_SYMBOL_GPL(arbitrary_virt_to_machine);
3b827c1b
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157
158void make_lowmem_page_readonly(void *vaddr)
159{
160 pte_t *pte, ptev;
161 unsigned long address = (unsigned long)vaddr;
da7bfc50 162 unsigned int level;
3b827c1b 163
f0646e43 164 pte = lookup_address(address, &level);
fef5ba79
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165 if (pte == NULL)
166 return; /* vaddr missing */
3b827c1b
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167
168 ptev = pte_wrprotect(*pte);
169
170 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
171 BUG();
172}
173
174void make_lowmem_page_readwrite(void *vaddr)
175{
176 pte_t *pte, ptev;
177 unsigned long address = (unsigned long)vaddr;
da7bfc50 178 unsigned int level;
3b827c1b 179
f0646e43 180 pte = lookup_address(address, &level);
fef5ba79
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181 if (pte == NULL)
182 return; /* vaddr missing */
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183
184 ptev = pte_mkwrite(*pte);
185
186 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
187 BUG();
188}
189
190
7708ad64 191static bool xen_page_pinned(void *ptr)
e2426cf8
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192{
193 struct page *page = virt_to_page(ptr);
194
195 return PagePinned(page);
196}
197
eba3ff8b 198void xen_set_domain_pte(pte_t *ptep, pte_t pteval, unsigned domid)
c0011dbf
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199{
200 struct multicall_space mcs;
201 struct mmu_update *u;
202
84708807
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203 trace_xen_mmu_set_domain_pte(ptep, pteval, domid);
204
c0011dbf
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205 mcs = xen_mc_entry(sizeof(*u));
206 u = mcs.args;
207
208 /* ptep might be kmapped when using 32-bit HIGHPTE */
d5108316 209 u->ptr = virt_to_machine(ptep).maddr;
c0011dbf
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210 u->val = pte_val_ma(pteval);
211
eba3ff8b 212 MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, domid);
c0011dbf
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213
214 xen_mc_issue(PARAVIRT_LAZY_MMU);
215}
eba3ff8b
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216EXPORT_SYMBOL_GPL(xen_set_domain_pte);
217
7708ad64 218static void xen_extend_mmu_update(const struct mmu_update *update)
3b827c1b 219{
d66bf8fc
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220 struct multicall_space mcs;
221 struct mmu_update *u;
3b827c1b 222
400d3494
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223 mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u));
224
994025ca 225 if (mcs.mc != NULL) {
400d3494 226 mcs.mc->args[1]++;
994025ca 227 } else {
400d3494
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228 mcs = __xen_mc_entry(sizeof(*u));
229 MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
230 }
d66bf8fc 231
d66bf8fc 232 u = mcs.args;
400d3494
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233 *u = *update;
234}
235
dcf7435c
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236static void xen_extend_mmuext_op(const struct mmuext_op *op)
237{
238 struct multicall_space mcs;
239 struct mmuext_op *u;
240
241 mcs = xen_mc_extend_args(__HYPERVISOR_mmuext_op, sizeof(*u));
242
243 if (mcs.mc != NULL) {
244 mcs.mc->args[1]++;
245 } else {
246 mcs = __xen_mc_entry(sizeof(*u));
247 MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
248 }
249
250 u = mcs.args;
251 *u = *op;
252}
253
4c13629f 254static void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val)
400d3494
JF
255{
256 struct mmu_update u;
257
258 preempt_disable();
259
260 xen_mc_batch();
261
ce803e70
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262 /* ptr may be ioremapped for 64-bit pagetable setup */
263 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
400d3494 264 u.val = pmd_val_ma(val);
7708ad64 265 xen_extend_mmu_update(&u);
d66bf8fc
JF
266
267 xen_mc_issue(PARAVIRT_LAZY_MMU);
268
269 preempt_enable();
3b827c1b
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270}
271
4c13629f 272static void xen_set_pmd(pmd_t *ptr, pmd_t val)
e2426cf8 273{
84708807
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274 trace_xen_mmu_set_pmd(ptr, val);
275
e2426cf8
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276 /* If page is not pinned, we can just update the entry
277 directly */
7708ad64 278 if (!xen_page_pinned(ptr)) {
e2426cf8
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279 *ptr = val;
280 return;
281 }
282
283 xen_set_pmd_hyper(ptr, val);
284}
285
3b827c1b
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286/*
287 * Associate a virtual page frame with a given physical page frame
288 * and protection flags for that frame.
289 */
290void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags)
291{
836fe2f2 292 set_pte_vaddr(vaddr, mfn_pte(mfn, flags));
3b827c1b
JF
293}
294
4a35c13c 295static bool xen_batched_set_pte(pte_t *ptep, pte_t pteval)
3b827c1b 296{
4a35c13c 297 struct mmu_update u;
c0011dbf 298
4a35c13c
JF
299 if (paravirt_get_lazy_mode() != PARAVIRT_LAZY_MMU)
300 return false;
994025ca 301
4a35c13c 302 xen_mc_batch();
d66bf8fc 303
4a35c13c
JF
304 u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE;
305 u.val = pte_val_ma(pteval);
306 xen_extend_mmu_update(&u);
a99ac5e8 307
4a35c13c 308 xen_mc_issue(PARAVIRT_LAZY_MMU);
2bd50036 309
4a35c13c
JF
310 return true;
311}
312
84708807 313static inline void __xen_set_pte(pte_t *ptep, pte_t pteval)
4a35c13c 314{
d095d43e
DV
315 if (!xen_batched_set_pte(ptep, pteval)) {
316 /*
317 * Could call native_set_pte() here and trap and
318 * emulate the PTE write but with 32-bit guests this
319 * needs two traps (one for each of the two 32-bit
320 * words in the PTE) so do one hypercall directly
321 * instead.
322 */
323 struct mmu_update u;
324
325 u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE;
326 u.val = pte_val_ma(pteval);
327 HYPERVISOR_mmu_update(&u, 1, NULL, DOMID_SELF);
328 }
3b827c1b
JF
329}
330
84708807
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331static void xen_set_pte(pte_t *ptep, pte_t pteval)
332{
333 trace_xen_mmu_set_pte(ptep, pteval);
334 __xen_set_pte(ptep, pteval);
335}
336
4c13629f 337static void xen_set_pte_at(struct mm_struct *mm, unsigned long addr,
4a35c13c
JF
338 pte_t *ptep, pte_t pteval)
339{
84708807
JF
340 trace_xen_mmu_set_pte_at(mm, addr, ptep, pteval);
341 __xen_set_pte(ptep, pteval);
3b827c1b
JF
342}
343
f63c2f24
T
344pte_t xen_ptep_modify_prot_start(struct mm_struct *mm,
345 unsigned long addr, pte_t *ptep)
947a69c9 346{
e57778a1 347 /* Just return the pte as-is. We preserve the bits on commit */
84708807 348 trace_xen_mmu_ptep_modify_prot_start(mm, addr, ptep, *ptep);
e57778a1
JF
349 return *ptep;
350}
351
352void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
353 pte_t *ptep, pte_t pte)
354{
400d3494 355 struct mmu_update u;
e57778a1 356
84708807 357 trace_xen_mmu_ptep_modify_prot_commit(mm, addr, ptep, pte);
400d3494 358 xen_mc_batch();
947a69c9 359
d5108316 360 u.ptr = virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD;
400d3494 361 u.val = pte_val_ma(pte);
7708ad64 362 xen_extend_mmu_update(&u);
947a69c9 363
e57778a1 364 xen_mc_issue(PARAVIRT_LAZY_MMU);
947a69c9
JF
365}
366
ebb9cfe2
JF
367/* Assume pteval_t is equivalent to all the other *val_t types. */
368static pteval_t pte_mfn_to_pfn(pteval_t val)
947a69c9 369{
5926f87f 370 if (val & _PAGE_PRESENT) {
59438c9f 371 unsigned long mfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
b7e5ffe5
KRW
372 unsigned long pfn = mfn_to_pfn(mfn);
373
77be1fab 374 pteval_t flags = val & PTE_FLAGS_MASK;
b7e5ffe5
KRW
375 if (unlikely(pfn == ~0))
376 val = flags & ~_PAGE_PRESENT;
377 else
378 val = ((pteval_t)pfn << PAGE_SHIFT) | flags;
ebb9cfe2 379 }
947a69c9 380
ebb9cfe2 381 return val;
947a69c9
JF
382}
383
ebb9cfe2 384static pteval_t pte_pfn_to_mfn(pteval_t val)
947a69c9 385{
5926f87f 386 if (val & _PAGE_PRESENT) {
59438c9f 387 unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
77be1fab 388 pteval_t flags = val & PTE_FLAGS_MASK;
fb38923e 389 unsigned long mfn;
cfd8951e 390
fb38923e 391 if (!xen_feature(XENFEAT_auto_translated_physmap))
0aad5689 392 mfn = __pfn_to_mfn(pfn);
fb38923e
KRW
393 else
394 mfn = pfn;
cfd8951e
JF
395 /*
396 * If there's no mfn for the pfn, then just create an
397 * empty non-present pte. Unfortunately this loses
398 * information about the original pfn, so
399 * pte_mfn_to_pfn is asymmetric.
400 */
401 if (unlikely(mfn == INVALID_P2M_ENTRY)) {
402 mfn = 0;
403 flags = 0;
7f2f8822
DV
404 } else
405 mfn &= ~(FOREIGN_FRAME_BIT | IDENTITY_FRAME_BIT);
cfd8951e 406 val = ((pteval_t)mfn << PAGE_SHIFT) | flags;
947a69c9
JF
407 }
408
ebb9cfe2 409 return val;
947a69c9
JF
410}
411
a2e7f0e3 412__visible pteval_t xen_pte_val(pte_t pte)
947a69c9 413{
41f2e477 414 pteval_t pteval = pte.pte;
47591df5 415
41f2e477 416 return pte_mfn_to_pfn(pteval);
947a69c9 417}
da5de7c2 418PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val);
947a69c9 419
a2e7f0e3 420__visible pgdval_t xen_pgd_val(pgd_t pgd)
947a69c9 421{
ebb9cfe2 422 return pte_mfn_to_pfn(pgd.pgd);
947a69c9 423}
da5de7c2 424PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val);
947a69c9 425
a2e7f0e3 426__visible pte_t xen_make_pte(pteval_t pte)
947a69c9 427{
7f2f8822 428 pte = pte_pfn_to_mfn(pte);
c0011dbf 429
ebb9cfe2 430 return native_make_pte(pte);
947a69c9 431}
da5de7c2 432PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte);
947a69c9 433
a2e7f0e3 434__visible pgd_t xen_make_pgd(pgdval_t pgd)
947a69c9 435{
ebb9cfe2
JF
436 pgd = pte_pfn_to_mfn(pgd);
437 return native_make_pgd(pgd);
947a69c9 438}
da5de7c2 439PV_CALLEE_SAVE_REGS_THUNK(xen_make_pgd);
947a69c9 440
a2e7f0e3 441__visible pmdval_t xen_pmd_val(pmd_t pmd)
947a69c9 442{
ebb9cfe2 443 return pte_mfn_to_pfn(pmd.pmd);
947a69c9 444}
da5de7c2 445PV_CALLEE_SAVE_REGS_THUNK(xen_pmd_val);
28499143 446
4c13629f 447static void xen_set_pud_hyper(pud_t *ptr, pud_t val)
f4f97b3e 448{
400d3494 449 struct mmu_update u;
f4f97b3e 450
d66bf8fc
JF
451 preempt_disable();
452
400d3494
JF
453 xen_mc_batch();
454
ce803e70
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455 /* ptr may be ioremapped for 64-bit pagetable setup */
456 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
400d3494 457 u.val = pud_val_ma(val);
7708ad64 458 xen_extend_mmu_update(&u);
d66bf8fc
JF
459
460 xen_mc_issue(PARAVIRT_LAZY_MMU);
461
462 preempt_enable();
f4f97b3e
JF
463}
464
4c13629f 465static void xen_set_pud(pud_t *ptr, pud_t val)
e2426cf8 466{
84708807
JF
467 trace_xen_mmu_set_pud(ptr, val);
468
e2426cf8
JF
469 /* If page is not pinned, we can just update the entry
470 directly */
7708ad64 471 if (!xen_page_pinned(ptr)) {
e2426cf8
JF
472 *ptr = val;
473 return;
474 }
475
476 xen_set_pud_hyper(ptr, val);
477}
478
f6e58732 479#ifdef CONFIG_X86_PAE
4c13629f 480static void xen_set_pte_atomic(pte_t *ptep, pte_t pte)
3b827c1b 481{
84708807 482 trace_xen_mmu_set_pte_atomic(ptep, pte);
f6e58732 483 set_64bit((u64 *)ptep, native_pte_val(pte));
3b827c1b
JF
484}
485
4c13629f 486static void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
3b827c1b 487{
84708807 488 trace_xen_mmu_pte_clear(mm, addr, ptep);
4a35c13c
JF
489 if (!xen_batched_set_pte(ptep, native_make_pte(0)))
490 native_pte_clear(mm, addr, ptep);
3b827c1b
JF
491}
492
4c13629f 493static void xen_pmd_clear(pmd_t *pmdp)
3b827c1b 494{
84708807 495 trace_xen_mmu_pmd_clear(pmdp);
e2426cf8 496 set_pmd(pmdp, __pmd(0));
3b827c1b 497}
f6e58732 498#endif /* CONFIG_X86_PAE */
3b827c1b 499
a2e7f0e3 500__visible pmd_t xen_make_pmd(pmdval_t pmd)
3b827c1b 501{
ebb9cfe2 502 pmd = pte_pfn_to_mfn(pmd);
947a69c9 503 return native_make_pmd(pmd);
3b827c1b 504}
da5de7c2 505PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd);
3b827c1b 506
98233368 507#if CONFIG_PGTABLE_LEVELS == 4
a2e7f0e3 508__visible pudval_t xen_pud_val(pud_t pud)
f6e58732
JF
509{
510 return pte_mfn_to_pfn(pud.pud);
511}
da5de7c2 512PV_CALLEE_SAVE_REGS_THUNK(xen_pud_val);
f6e58732 513
a2e7f0e3 514__visible pud_t xen_make_pud(pudval_t pud)
f6e58732
JF
515{
516 pud = pte_pfn_to_mfn(pud);
517
518 return native_make_pud(pud);
519}
da5de7c2 520PV_CALLEE_SAVE_REGS_THUNK(xen_make_pud);
f6e58732 521
4c13629f 522static pgd_t *xen_get_user_pgd(pgd_t *pgd)
f6e58732 523{
d6182fbf
JF
524 pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK);
525 unsigned offset = pgd - pgd_page;
526 pgd_t *user_ptr = NULL;
f6e58732 527
d6182fbf
JF
528 if (offset < pgd_index(USER_LIMIT)) {
529 struct page *page = virt_to_page(pgd_page);
530 user_ptr = (pgd_t *)page->private;
531 if (user_ptr)
532 user_ptr += offset;
533 }
f6e58732 534
d6182fbf
JF
535 return user_ptr;
536}
537
538static void __xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
539{
540 struct mmu_update u;
f6e58732
JF
541
542 u.ptr = virt_to_machine(ptr).maddr;
543 u.val = pgd_val_ma(val);
7708ad64 544 xen_extend_mmu_update(&u);
d6182fbf
JF
545}
546
547/*
548 * Raw hypercall-based set_pgd, intended for in early boot before
549 * there's a page structure. This implies:
550 * 1. The only existing pagetable is the kernel's
551 * 2. It is always pinned
552 * 3. It has no user pagetable attached to it
553 */
4c13629f 554static void __init xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
d6182fbf
JF
555{
556 preempt_disable();
557
558 xen_mc_batch();
559
560 __xen_set_pgd_hyper(ptr, val);
f6e58732
JF
561
562 xen_mc_issue(PARAVIRT_LAZY_MMU);
563
564 preempt_enable();
565}
566
4c13629f 567static void xen_set_pgd(pgd_t *ptr, pgd_t val)
f6e58732 568{
d6182fbf
JF
569 pgd_t *user_ptr = xen_get_user_pgd(ptr);
570
84708807
JF
571 trace_xen_mmu_set_pgd(ptr, user_ptr, val);
572
f6e58732
JF
573 /* If page is not pinned, we can just update the entry
574 directly */
7708ad64 575 if (!xen_page_pinned(ptr)) {
f6e58732 576 *ptr = val;
d6182fbf 577 if (user_ptr) {
7708ad64 578 WARN_ON(xen_page_pinned(user_ptr));
d6182fbf
JF
579 *user_ptr = val;
580 }
f6e58732
JF
581 return;
582 }
583
d6182fbf
JF
584 /* If it's pinned, then we can at least batch the kernel and
585 user updates together. */
586 xen_mc_batch();
587
588 __xen_set_pgd_hyper(ptr, val);
589 if (user_ptr)
590 __xen_set_pgd_hyper(user_ptr, val);
591
592 xen_mc_issue(PARAVIRT_LAZY_MMU);
f6e58732 593}
98233368 594#endif /* CONFIG_PGTABLE_LEVELS == 4 */
f6e58732 595
f4f97b3e 596/*
5deb30d1
JF
597 * (Yet another) pagetable walker. This one is intended for pinning a
598 * pagetable. This means that it walks a pagetable and calls the
599 * callback function on each page it finds making up the page table,
600 * at every level. It walks the entire pagetable, but it only bothers
601 * pinning pte pages which are below limit. In the normal case this
602 * will be STACK_TOP_MAX, but at boot we need to pin up to
603 * FIXADDR_TOP.
604 *
605 * For 32-bit the important bit is that we don't pin beyond there,
606 * because then we start getting into Xen's ptes.
607 *
608 * For 64-bit, we must skip the Xen hole in the middle of the address
609 * space, just after the big x86-64 virtual hole.
610 */
86bbc2c2
IC
611static int __xen_pgd_walk(struct mm_struct *mm, pgd_t *pgd,
612 int (*func)(struct mm_struct *mm, struct page *,
613 enum pt_level),
614 unsigned long limit)
3b827c1b 615{
f4f97b3e 616 int flush = 0;
5deb30d1
JF
617 unsigned hole_low, hole_high;
618 unsigned pgdidx_limit, pudidx_limit, pmdidx_limit;
619 unsigned pgdidx, pudidx, pmdidx;
f4f97b3e 620
5deb30d1
JF
621 /* The limit is the last byte to be touched */
622 limit--;
623 BUG_ON(limit >= FIXADDR_TOP);
3b827c1b
JF
624
625 if (xen_feature(XENFEAT_auto_translated_physmap))
f4f97b3e
JF
626 return 0;
627
5deb30d1
JF
628 /*
629 * 64-bit has a great big hole in the middle of the address
630 * space, which contains the Xen mappings. On 32-bit these
631 * will end up making a zero-sized hole and so is a no-op.
632 */
d6182fbf 633 hole_low = pgd_index(USER_LIMIT);
5deb30d1
JF
634 hole_high = pgd_index(PAGE_OFFSET);
635
636 pgdidx_limit = pgd_index(limit);
637#if PTRS_PER_PUD > 1
638 pudidx_limit = pud_index(limit);
639#else
640 pudidx_limit = 0;
641#endif
642#if PTRS_PER_PMD > 1
643 pmdidx_limit = pmd_index(limit);
644#else
645 pmdidx_limit = 0;
646#endif
647
5deb30d1 648 for (pgdidx = 0; pgdidx <= pgdidx_limit; pgdidx++) {
f4f97b3e 649 pud_t *pud;
3b827c1b 650
5deb30d1
JF
651 if (pgdidx >= hole_low && pgdidx < hole_high)
652 continue;
f4f97b3e 653
5deb30d1 654 if (!pgd_val(pgd[pgdidx]))
3b827c1b 655 continue;
f4f97b3e 656
5deb30d1 657 pud = pud_offset(&pgd[pgdidx], 0);
3b827c1b
JF
658
659 if (PTRS_PER_PUD > 1) /* not folded */
eefb47f6 660 flush |= (*func)(mm, virt_to_page(pud), PT_PUD);
f4f97b3e 661
5deb30d1 662 for (pudidx = 0; pudidx < PTRS_PER_PUD; pudidx++) {
f4f97b3e 663 pmd_t *pmd;
f4f97b3e 664
5deb30d1
JF
665 if (pgdidx == pgdidx_limit &&
666 pudidx > pudidx_limit)
667 goto out;
3b827c1b 668
5deb30d1 669 if (pud_none(pud[pudidx]))
3b827c1b 670 continue;
f4f97b3e 671
5deb30d1 672 pmd = pmd_offset(&pud[pudidx], 0);
3b827c1b
JF
673
674 if (PTRS_PER_PMD > 1) /* not folded */
eefb47f6 675 flush |= (*func)(mm, virt_to_page(pmd), PT_PMD);
f4f97b3e 676
5deb30d1
JF
677 for (pmdidx = 0; pmdidx < PTRS_PER_PMD; pmdidx++) {
678 struct page *pte;
679
680 if (pgdidx == pgdidx_limit &&
681 pudidx == pudidx_limit &&
682 pmdidx > pmdidx_limit)
683 goto out;
3b827c1b 684
5deb30d1 685 if (pmd_none(pmd[pmdidx]))
3b827c1b
JF
686 continue;
687
5deb30d1 688 pte = pmd_page(pmd[pmdidx]);
eefb47f6 689 flush |= (*func)(mm, pte, PT_PTE);
3b827c1b
JF
690 }
691 }
692 }
11ad93e5 693
5deb30d1 694out:
11ad93e5
JF
695 /* Do the top level last, so that the callbacks can use it as
696 a cue to do final things like tlb flushes. */
eefb47f6 697 flush |= (*func)(mm, virt_to_page(pgd), PT_PGD);
f4f97b3e
JF
698
699 return flush;
3b827c1b
JF
700}
701
86bbc2c2
IC
702static int xen_pgd_walk(struct mm_struct *mm,
703 int (*func)(struct mm_struct *mm, struct page *,
704 enum pt_level),
705 unsigned long limit)
706{
707 return __xen_pgd_walk(mm, mm->pgd, func, limit);
708}
709
7708ad64
JF
710/* If we're using split pte locks, then take the page's lock and
711 return a pointer to it. Otherwise return NULL. */
eefb47f6 712static spinlock_t *xen_pte_lock(struct page *page, struct mm_struct *mm)
74260714
JF
713{
714 spinlock_t *ptl = NULL;
715
57c1ffce 716#if USE_SPLIT_PTE_PTLOCKS
49076ec2 717 ptl = ptlock_ptr(page);
eefb47f6 718 spin_lock_nest_lock(ptl, &mm->page_table_lock);
74260714
JF
719#endif
720
721 return ptl;
722}
723
7708ad64 724static void xen_pte_unlock(void *v)
74260714
JF
725{
726 spinlock_t *ptl = v;
727 spin_unlock(ptl);
728}
729
730static void xen_do_pin(unsigned level, unsigned long pfn)
731{
dcf7435c 732 struct mmuext_op op;
74260714 733
dcf7435c
JF
734 op.cmd = level;
735 op.arg1.mfn = pfn_to_mfn(pfn);
736
737 xen_extend_mmuext_op(&op);
74260714
JF
738}
739
eefb47f6
JF
740static int xen_pin_page(struct mm_struct *mm, struct page *page,
741 enum pt_level level)
f4f97b3e 742{
d60cd46b 743 unsigned pgfl = TestSetPagePinned(page);
f4f97b3e
JF
744 int flush;
745
746 if (pgfl)
747 flush = 0; /* already pinned */
748 else if (PageHighMem(page))
749 /* kmaps need flushing if we found an unpinned
750 highpage */
751 flush = 1;
752 else {
753 void *pt = lowmem_page_address(page);
754 unsigned long pfn = page_to_pfn(page);
755 struct multicall_space mcs = __xen_mc_entry(0);
74260714 756 spinlock_t *ptl;
f4f97b3e
JF
757
758 flush = 0;
759
11ad93e5
JF
760 /*
761 * We need to hold the pagetable lock between the time
762 * we make the pagetable RO and when we actually pin
763 * it. If we don't, then other users may come in and
764 * attempt to update the pagetable by writing it,
765 * which will fail because the memory is RO but not
766 * pinned, so Xen won't do the trap'n'emulate.
767 *
768 * If we're using split pte locks, we can't hold the
769 * entire pagetable's worth of locks during the
770 * traverse, because we may wrap the preempt count (8
771 * bits). The solution is to mark RO and pin each PTE
772 * page while holding the lock. This means the number
773 * of locks we end up holding is never more than a
774 * batch size (~32 entries, at present).
775 *
776 * If we're not using split pte locks, we needn't pin
777 * the PTE pages independently, because we're
778 * protected by the overall pagetable lock.
779 */
74260714
JF
780 ptl = NULL;
781 if (level == PT_PTE)
eefb47f6 782 ptl = xen_pte_lock(page, mm);
74260714 783
f4f97b3e
JF
784 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
785 pfn_pte(pfn, PAGE_KERNEL_RO),
74260714
JF
786 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
787
11ad93e5 788 if (ptl) {
74260714
JF
789 xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn);
790
74260714
JF
791 /* Queue a deferred unlock for when this batch
792 is completed. */
7708ad64 793 xen_mc_callback(xen_pte_unlock, ptl);
74260714 794 }
f4f97b3e
JF
795 }
796
797 return flush;
798}
3b827c1b 799
f4f97b3e
JF
800/* This is called just after a mm has been created, but it has not
801 been used yet. We need to make sure that its pagetable is all
802 read-only, and can be pinned. */
eefb47f6 803static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd)
3b827c1b 804{
5f94fb5b
JF
805 trace_xen_mmu_pgd_pin(mm, pgd);
806
f4f97b3e 807 xen_mc_batch();
3b827c1b 808
86bbc2c2 809 if (__xen_pgd_walk(mm, pgd, xen_pin_page, USER_LIMIT)) {
d05fdf31 810 /* re-enable interrupts for flushing */
f87e4cac 811 xen_mc_issue(0);
d05fdf31 812
f4f97b3e 813 kmap_flush_unused();
d05fdf31 814
f87e4cac
JF
815 xen_mc_batch();
816 }
f4f97b3e 817
d6182fbf
JF
818#ifdef CONFIG_X86_64
819 {
820 pgd_t *user_pgd = xen_get_user_pgd(pgd);
821
822 xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(pgd)));
823
824 if (user_pgd) {
eefb47f6 825 xen_pin_page(mm, virt_to_page(user_pgd), PT_PGD);
f63c2f24
T
826 xen_do_pin(MMUEXT_PIN_L4_TABLE,
827 PFN_DOWN(__pa(user_pgd)));
d6182fbf
JF
828 }
829 }
830#else /* CONFIG_X86_32 */
5deb30d1
JF
831#ifdef CONFIG_X86_PAE
832 /* Need to make sure unshared kernel PMD is pinnable */
47cb2ed9 833 xen_pin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
eefb47f6 834 PT_PMD);
5deb30d1 835#endif
28499143 836 xen_do_pin(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(pgd)));
d6182fbf 837#endif /* CONFIG_X86_64 */
f4f97b3e 838 xen_mc_issue(0);
3b827c1b
JF
839}
840
eefb47f6
JF
841static void xen_pgd_pin(struct mm_struct *mm)
842{
843 __xen_pgd_pin(mm, mm->pgd);
844}
845
0e91398f
JF
846/*
847 * On save, we need to pin all pagetables to make sure they get their
848 * mfns turned into pfns. Search the list for any unpinned pgds and pin
849 * them (unpinned pgds are not currently in use, probably because the
850 * process is under construction or destruction).
eefb47f6
JF
851 *
852 * Expected to be called in stop_machine() ("equivalent to taking
853 * every spinlock in the system"), so the locking doesn't really
854 * matter all that much.
0e91398f
JF
855 */
856void xen_mm_pin_all(void)
857{
0e91398f 858 struct page *page;
74260714 859
a79e53d8 860 spin_lock(&pgd_lock);
f4f97b3e 861
0e91398f
JF
862 list_for_each_entry(page, &pgd_list, lru) {
863 if (!PagePinned(page)) {
eefb47f6 864 __xen_pgd_pin(&init_mm, (pgd_t *)page_address(page));
0e91398f
JF
865 SetPageSavePinned(page);
866 }
867 }
868
a79e53d8 869 spin_unlock(&pgd_lock);
3b827c1b
JF
870}
871
c1f2f09e
EH
872/*
873 * The init_mm pagetable is really pinned as soon as its created, but
874 * that's before we have page structures to store the bits. So do all
875 * the book-keeping now.
876 */
3f508953 877static int __init xen_mark_pinned(struct mm_struct *mm, struct page *page,
eefb47f6 878 enum pt_level level)
3b827c1b 879{
f4f97b3e
JF
880 SetPagePinned(page);
881 return 0;
882}
3b827c1b 883
b96229b5 884static void __init xen_mark_init_mm_pinned(void)
f4f97b3e 885{
eefb47f6 886 xen_pgd_walk(&init_mm, xen_mark_pinned, FIXADDR_TOP);
f4f97b3e 887}
3b827c1b 888
eefb47f6
JF
889static int xen_unpin_page(struct mm_struct *mm, struct page *page,
890 enum pt_level level)
f4f97b3e 891{
d60cd46b 892 unsigned pgfl = TestClearPagePinned(page);
3b827c1b 893
f4f97b3e
JF
894 if (pgfl && !PageHighMem(page)) {
895 void *pt = lowmem_page_address(page);
896 unsigned long pfn = page_to_pfn(page);
74260714
JF
897 spinlock_t *ptl = NULL;
898 struct multicall_space mcs;
899
11ad93e5
JF
900 /*
901 * Do the converse to pin_page. If we're using split
902 * pte locks, we must be holding the lock for while
903 * the pte page is unpinned but still RO to prevent
904 * concurrent updates from seeing it in this
905 * partially-pinned state.
906 */
74260714 907 if (level == PT_PTE) {
eefb47f6 908 ptl = xen_pte_lock(page, mm);
74260714 909
11ad93e5
JF
910 if (ptl)
911 xen_do_pin(MMUEXT_UNPIN_TABLE, pfn);
74260714
JF
912 }
913
914 mcs = __xen_mc_entry(0);
f4f97b3e
JF
915
916 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
917 pfn_pte(pfn, PAGE_KERNEL),
74260714
JF
918 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
919
920 if (ptl) {
921 /* unlock when batch completed */
7708ad64 922 xen_mc_callback(xen_pte_unlock, ptl);
74260714 923 }
f4f97b3e
JF
924 }
925
926 return 0; /* never need to flush on unpin */
3b827c1b
JF
927}
928
f4f97b3e 929/* Release a pagetables pages back as normal RW */
eefb47f6 930static void __xen_pgd_unpin(struct mm_struct *mm, pgd_t *pgd)
f4f97b3e 931{
5f94fb5b
JF
932 trace_xen_mmu_pgd_unpin(mm, pgd);
933
f4f97b3e
JF
934 xen_mc_batch();
935
74260714 936 xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
f4f97b3e 937
d6182fbf
JF
938#ifdef CONFIG_X86_64
939 {
940 pgd_t *user_pgd = xen_get_user_pgd(pgd);
941
942 if (user_pgd) {
f63c2f24
T
943 xen_do_pin(MMUEXT_UNPIN_TABLE,
944 PFN_DOWN(__pa(user_pgd)));
eefb47f6 945 xen_unpin_page(mm, virt_to_page(user_pgd), PT_PGD);
d6182fbf
JF
946 }
947 }
948#endif
949
5deb30d1
JF
950#ifdef CONFIG_X86_PAE
951 /* Need to make sure unshared kernel PMD is unpinned */
47cb2ed9 952 xen_unpin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
eefb47f6 953 PT_PMD);
5deb30d1 954#endif
d6182fbf 955
86bbc2c2 956 __xen_pgd_walk(mm, pgd, xen_unpin_page, USER_LIMIT);
f4f97b3e
JF
957
958 xen_mc_issue(0);
959}
3b827c1b 960
eefb47f6
JF
961static void xen_pgd_unpin(struct mm_struct *mm)
962{
963 __xen_pgd_unpin(mm, mm->pgd);
964}
965
0e91398f
JF
966/*
967 * On resume, undo any pinning done at save, so that the rest of the
968 * kernel doesn't see any unexpected pinned pagetables.
969 */
970void xen_mm_unpin_all(void)
971{
0e91398f
JF
972 struct page *page;
973
a79e53d8 974 spin_lock(&pgd_lock);
0e91398f
JF
975
976 list_for_each_entry(page, &pgd_list, lru) {
977 if (PageSavePinned(page)) {
978 BUG_ON(!PagePinned(page));
eefb47f6 979 __xen_pgd_unpin(&init_mm, (pgd_t *)page_address(page));
0e91398f
JF
980 ClearPageSavePinned(page);
981 }
982 }
983
a79e53d8 984 spin_unlock(&pgd_lock);
0e91398f
JF
985}
986
4c13629f 987static void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next)
3b827c1b 988{
f4f97b3e 989 spin_lock(&next->page_table_lock);
eefb47f6 990 xen_pgd_pin(next);
f4f97b3e 991 spin_unlock(&next->page_table_lock);
3b827c1b
JF
992}
993
4c13629f 994static void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm)
3b827c1b 995{
f4f97b3e 996 spin_lock(&mm->page_table_lock);
eefb47f6 997 xen_pgd_pin(mm);
f4f97b3e 998 spin_unlock(&mm->page_table_lock);
3b827c1b
JF
999}
1000
3b827c1b 1001
f87e4cac
JF
1002#ifdef CONFIG_SMP
1003/* Another cpu may still have their %cr3 pointing at the pagetable, so
1004 we need to repoint it somewhere else before we can unpin it. */
1005static void drop_other_mm_ref(void *info)
1006{
1007 struct mm_struct *mm = info;
ce87b3d3 1008 struct mm_struct *active_mm;
3b827c1b 1009
2113f469 1010 active_mm = this_cpu_read(cpu_tlbstate.active_mm);
ce87b3d3 1011
2113f469 1012 if (active_mm == mm && this_cpu_read(cpu_tlbstate.state) != TLBSTATE_OK)
f87e4cac 1013 leave_mm(smp_processor_id());
9f79991d
JF
1014
1015 /* If this cpu still has a stale cr3 reference, then make sure
1016 it has been flushed. */
2113f469 1017 if (this_cpu_read(xen_current_cr3) == __pa(mm->pgd))
9f79991d 1018 load_cr3(swapper_pg_dir);
f87e4cac 1019}
3b827c1b 1020
7708ad64 1021static void xen_drop_mm_ref(struct mm_struct *mm)
f87e4cac 1022{
e4d98207 1023 cpumask_var_t mask;
9f79991d
JF
1024 unsigned cpu;
1025
f87e4cac
JF
1026 if (current->active_mm == mm) {
1027 if (current->mm == mm)
1028 load_cr3(swapper_pg_dir);
1029 else
1030 leave_mm(smp_processor_id());
9f79991d
JF
1031 }
1032
1033 /* Get the "official" set of cpus referring to our pagetable. */
e4d98207
MT
1034 if (!alloc_cpumask_var(&mask, GFP_ATOMIC)) {
1035 for_each_online_cpu(cpu) {
78f1c4d6 1036 if (!cpumask_test_cpu(cpu, mm_cpumask(mm))
e4d98207
MT
1037 && per_cpu(xen_current_cr3, cpu) != __pa(mm->pgd))
1038 continue;
1039 smp_call_function_single(cpu, drop_other_mm_ref, mm, 1);
1040 }
1041 return;
1042 }
78f1c4d6 1043 cpumask_copy(mask, mm_cpumask(mm));
9f79991d
JF
1044
1045 /* It's possible that a vcpu may have a stale reference to our
1046 cr3, because its in lazy mode, and it hasn't yet flushed
1047 its set of pending hypercalls yet. In this case, we can
1048 look at its actual current cr3 value, and force it to flush
1049 if needed. */
1050 for_each_online_cpu(cpu) {
1051 if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd))
e4d98207 1052 cpumask_set_cpu(cpu, mask);
3b827c1b
JF
1053 }
1054
e4d98207
MT
1055 if (!cpumask_empty(mask))
1056 smp_call_function_many(mask, drop_other_mm_ref, mm, 1);
1057 free_cpumask_var(mask);
f87e4cac
JF
1058}
1059#else
7708ad64 1060static void xen_drop_mm_ref(struct mm_struct *mm)
f87e4cac
JF
1061{
1062 if (current->active_mm == mm)
1063 load_cr3(swapper_pg_dir);
1064}
1065#endif
1066
1067/*
1068 * While a process runs, Xen pins its pagetables, which means that the
1069 * hypervisor forces it to be read-only, and it controls all updates
1070 * to it. This means that all pagetable updates have to go via the
1071 * hypervisor, which is moderately expensive.
1072 *
1073 * Since we're pulling the pagetable down, we switch to use init_mm,
1074 * unpin old process pagetable and mark it all read-write, which
1075 * allows further operations on it to be simple memory accesses.
1076 *
1077 * The only subtle point is that another CPU may be still using the
1078 * pagetable because of lazy tlb flushing. This means we need need to
1079 * switch all CPUs off this pagetable before we can unpin it.
1080 */
4c13629f 1081static void xen_exit_mmap(struct mm_struct *mm)
f87e4cac
JF
1082{
1083 get_cpu(); /* make sure we don't move around */
7708ad64 1084 xen_drop_mm_ref(mm);
f87e4cac 1085 put_cpu();
3b827c1b 1086
f120f13e 1087 spin_lock(&mm->page_table_lock);
df912ea4
JF
1088
1089 /* pgd may not be pinned in the error exit path of execve */
7708ad64 1090 if (xen_page_pinned(mm->pgd))
eefb47f6 1091 xen_pgd_unpin(mm);
74260714 1092
f120f13e 1093 spin_unlock(&mm->page_table_lock);
3b827c1b 1094}
994025ca 1095
c7112887
AR
1096static void xen_post_allocator_init(void);
1097
70e61199
JG
1098static void __init pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
1099{
1100 struct mmuext_op op;
1101
1102 op.cmd = cmd;
1103 op.arg1.mfn = pfn_to_mfn(pfn);
1104 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
1105 BUG();
1106}
1107
7f914062
KRW
1108#ifdef CONFIG_X86_64
1109static void __init xen_cleanhighmap(unsigned long vaddr,
1110 unsigned long vaddr_end)
1111{
1112 unsigned long kernel_end = roundup((unsigned long)_brk_end, PMD_SIZE) - 1;
1113 pmd_t *pmd = level2_kernel_pgt + pmd_index(vaddr);
1114
1115 /* NOTE: The loop is more greedy than the cleanup_highmap variant.
1116 * We include the PMD passed in on _both_ boundaries. */
1cf38741 1117 for (; vaddr <= vaddr_end && (pmd < (level2_kernel_pgt + PTRS_PER_PMD));
7f914062
KRW
1118 pmd++, vaddr += PMD_SIZE) {
1119 if (pmd_none(*pmd))
1120 continue;
1121 if (vaddr < (unsigned long) _text || vaddr > kernel_end)
1122 set_pmd(pmd, __pmd(0));
1123 }
1124 /* In case we did something silly, we should crash in this function
1125 * instead of somewhere later and be confusing. */
1126 xen_mc_flush();
1127}
054954eb 1128
8f5b0c63
JG
1129/*
1130 * Make a page range writeable and free it.
1131 */
1132static void __init xen_free_ro_pages(unsigned long paddr, unsigned long size)
1133{
1134 void *vaddr = __va(paddr);
1135 void *vaddr_end = vaddr + size;
1136
1137 for (; vaddr < vaddr_end; vaddr += PAGE_SIZE)
1138 make_lowmem_page_readwrite(vaddr);
1139
1140 memblock_free(paddr, size);
1141}
1142
70e61199 1143static void __init xen_cleanmfnmap_free_pgtbl(void *pgtbl, bool unpin)
8f5b0c63
JG
1144{
1145 unsigned long pa = __pa(pgtbl) & PHYSICAL_PAGE_MASK;
1146
70e61199
JG
1147 if (unpin)
1148 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(pa));
8f5b0c63
JG
1149 ClearPagePinned(virt_to_page(__va(pa)));
1150 xen_free_ro_pages(pa, PAGE_SIZE);
1151}
1152
1153/*
1154 * Since it is well isolated we can (and since it is perhaps large we should)
1155 * also free the page tables mapping the initial P->M table.
1156 */
1157static void __init xen_cleanmfnmap(unsigned long vaddr)
1158{
1159 unsigned long va = vaddr & PMD_MASK;
1160 unsigned long pa;
1161 pgd_t *pgd = pgd_offset_k(va);
1162 pud_t *pud_page = pud_offset(pgd, 0);
1163 pud_t *pud;
1164 pmd_t *pmd;
1165 pte_t *pte;
1166 unsigned int i;
70e61199 1167 bool unpin;
8f5b0c63 1168
70e61199 1169 unpin = (vaddr == 2 * PGDIR_SIZE);
8f5b0c63
JG
1170 set_pgd(pgd, __pgd(0));
1171 do {
1172 pud = pud_page + pud_index(va);
1173 if (pud_none(*pud)) {
1174 va += PUD_SIZE;
1175 } else if (pud_large(*pud)) {
1176 pa = pud_val(*pud) & PHYSICAL_PAGE_MASK;
1177 xen_free_ro_pages(pa, PUD_SIZE);
1178 va += PUD_SIZE;
1179 } else {
1180 pmd = pmd_offset(pud, va);
1181 if (pmd_large(*pmd)) {
1182 pa = pmd_val(*pmd) & PHYSICAL_PAGE_MASK;
1183 xen_free_ro_pages(pa, PMD_SIZE);
1184 } else if (!pmd_none(*pmd)) {
1185 pte = pte_offset_kernel(pmd, va);
70e61199 1186 set_pmd(pmd, __pmd(0));
8f5b0c63
JG
1187 for (i = 0; i < PTRS_PER_PTE; ++i) {
1188 if (pte_none(pte[i]))
1189 break;
1190 pa = pte_pfn(pte[i]) << PAGE_SHIFT;
1191 xen_free_ro_pages(pa, PAGE_SIZE);
1192 }
70e61199 1193 xen_cleanmfnmap_free_pgtbl(pte, unpin);
8f5b0c63
JG
1194 }
1195 va += PMD_SIZE;
1196 if (pmd_index(va))
1197 continue;
70e61199
JG
1198 set_pud(pud, __pud(0));
1199 xen_cleanmfnmap_free_pgtbl(pmd, unpin);
8f5b0c63
JG
1200 }
1201
1202 } while (pud_index(va) || pmd_index(va));
70e61199 1203 xen_cleanmfnmap_free_pgtbl(pud_page, unpin);
8f5b0c63
JG
1204}
1205
054954eb 1206static void __init xen_pagetable_p2m_free(void)
319f3ba5 1207{
7f914062
KRW
1208 unsigned long size;
1209 unsigned long addr;
32df75cd
KRW
1210
1211 size = PAGE_ALIGN(xen_start_info->nr_pages * sizeof(unsigned long));
1212
b621e157 1213 /* No memory or already called. */
054954eb 1214 if ((unsigned long)xen_p2m_addr == xen_start_info->mfn_list)
32df75cd 1215 return;
7f914062 1216
b621e157
KRW
1217 /* using __ka address and sticking INVALID_P2M_ENTRY! */
1218 memset((void *)xen_start_info->mfn_list, 0xff, size);
1219
b621e157 1220 addr = xen_start_info->mfn_list;
8f5b0c63
JG
1221 /*
1222 * We could be in __ka space.
1223 * We roundup to the PMD, which means that if anybody at this stage is
1224 * using the __ka address of xen_start_info or
1225 * xen_start_info->shared_info they are in going to crash. Fortunatly
1226 * we have already revectored in xen_setup_kernel_pagetable and in
1227 * xen_setup_shared_info.
1228 */
b621e157 1229 size = roundup(size, PMD_SIZE);
b621e157 1230
8f5b0c63
JG
1231 if (addr >= __START_KERNEL_map) {
1232 xen_cleanhighmap(addr, addr + size);
1233 size = PAGE_ALIGN(xen_start_info->nr_pages *
1234 sizeof(unsigned long));
1235 memblock_free(__pa(addr), size);
1236 } else {
1237 xen_cleanmfnmap(addr);
1238 }
70e61199
JG
1239}
1240
1241static void __init xen_pagetable_cleanhighmap(void)
1242{
1243 unsigned long size;
1244 unsigned long addr;
b621e157 1245
3aca7fbc
KRW
1246 /* At this stage, cleanup_highmap has already cleaned __ka space
1247 * from _brk_limit way up to the max_pfn_mapped (which is the end of
1248 * the ramdisk). We continue on, erasing PMD entries that point to page
1249 * tables - do note that they are accessible at this stage via __va.
1250 * For good measure we also round up to the PMD - which means that if
1251 * anybody is using __ka address to the initial boot-stack - and try
1252 * to use it - they are going to crash. The xen_start_info has been
1253 * taken care of already in xen_setup_kernel_pagetable. */
1254 addr = xen_start_info->pt_base;
1255 size = roundup(xen_start_info->nr_pt_frames * PAGE_SIZE, PMD_SIZE);
1256
1257 xen_cleanhighmap(addr, addr + size);
1258 xen_start_info->pt_base = (unsigned long)__va(__pa(xen_start_info->pt_base));
1259#ifdef DEBUG
6a6256f9 1260 /* This is superfluous and is not necessary, but you know what
3aca7fbc
KRW
1261 * lets do it. The MODULES_VADDR -> MODULES_END should be clear of
1262 * anything at this stage. */
1263 xen_cleanhighmap(MODULES_VADDR, roundup(MODULES_VADDR, PUD_SIZE) - 1);
1264#endif
32df75cd
KRW
1265}
1266#endif
1267
054954eb 1268static void __init xen_pagetable_p2m_setup(void)
32df75cd 1269{
054954eb
JG
1270 if (xen_feature(XENFEAT_auto_translated_physmap))
1271 return;
1272
1273 xen_vmalloc_p2m_tree();
1274
32df75cd 1275#ifdef CONFIG_X86_64
054954eb 1276 xen_pagetable_p2m_free();
70e61199
JG
1277
1278 xen_pagetable_cleanhighmap();
7f914062 1279#endif
054954eb
JG
1280 /* And revector! Bye bye old array */
1281 xen_start_info->mfn_list = (unsigned long)xen_p2m_addr;
1282}
1283
1284static void __init xen_pagetable_init(void)
1285{
1286 paging_init();
cdfa0bad 1287 xen_post_allocator_init();
054954eb
JG
1288
1289 xen_pagetable_p2m_setup();
1290
2c185687
JG
1291 /* Allocate and initialize top and mid mfn levels for p2m structure */
1292 xen_build_mfn_list_list();
1293
1f3ac86b
JG
1294 /* Remap memory freed due to conflicts with E820 map */
1295 if (!xen_feature(XENFEAT_auto_translated_physmap))
1296 xen_remap_memory();
1297
2c185687 1298 xen_setup_shared_info();
319f3ba5 1299}
319f3ba5
JF
1300static void xen_write_cr2(unsigned long cr2)
1301{
2113f469 1302 this_cpu_read(xen_vcpu)->arch.cr2 = cr2;
319f3ba5
JF
1303}
1304
1305static unsigned long xen_read_cr2(void)
1306{
2113f469 1307 return this_cpu_read(xen_vcpu)->arch.cr2;
319f3ba5
JF
1308}
1309
1310unsigned long xen_read_cr2_direct(void)
1311{
2113f469 1312 return this_cpu_read(xen_vcpu_info.arch.cr2);
319f3ba5
JF
1313}
1314
95a7d768
KRW
1315void xen_flush_tlb_all(void)
1316{
1317 struct mmuext_op *op;
1318 struct multicall_space mcs;
1319
1320 trace_xen_mmu_flush_tlb_all(0);
1321
1322 preempt_disable();
1323
1324 mcs = xen_mc_entry(sizeof(*op));
1325
1326 op = mcs.args;
1327 op->cmd = MMUEXT_TLB_FLUSH_ALL;
1328 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1329
1330 xen_mc_issue(PARAVIRT_LAZY_MMU);
1331
1332 preempt_enable();
1333}
319f3ba5
JF
1334static void xen_flush_tlb(void)
1335{
1336 struct mmuext_op *op;
1337 struct multicall_space mcs;
1338
c8eed171
JF
1339 trace_xen_mmu_flush_tlb(0);
1340
319f3ba5
JF
1341 preempt_disable();
1342
1343 mcs = xen_mc_entry(sizeof(*op));
1344
1345 op = mcs.args;
1346 op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
1347 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1348
1349 xen_mc_issue(PARAVIRT_LAZY_MMU);
1350
1351 preempt_enable();
1352}
1353
1354static void xen_flush_tlb_single(unsigned long addr)
1355{
1356 struct mmuext_op *op;
1357 struct multicall_space mcs;
1358
c8eed171
JF
1359 trace_xen_mmu_flush_tlb_single(addr);
1360
319f3ba5
JF
1361 preempt_disable();
1362
1363 mcs = xen_mc_entry(sizeof(*op));
1364 op = mcs.args;
1365 op->cmd = MMUEXT_INVLPG_LOCAL;
1366 op->arg1.linear_addr = addr & PAGE_MASK;
1367 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1368
1369 xen_mc_issue(PARAVIRT_LAZY_MMU);
1370
1371 preempt_enable();
1372}
1373
1374static void xen_flush_tlb_others(const struct cpumask *cpus,
e7b52ffd
AS
1375 struct mm_struct *mm, unsigned long start,
1376 unsigned long end)
319f3ba5
JF
1377{
1378 struct {
1379 struct mmuext_op op;
32dd1194 1380#ifdef CONFIG_SMP
900cba88 1381 DECLARE_BITMAP(mask, num_processors);
32dd1194
KRW
1382#else
1383 DECLARE_BITMAP(mask, NR_CPUS);
1384#endif
319f3ba5
JF
1385 } *args;
1386 struct multicall_space mcs;
1387
e7b52ffd 1388 trace_xen_mmu_flush_tlb_others(cpus, mm, start, end);
c8eed171 1389
e3f8a74e
JF
1390 if (cpumask_empty(cpus))
1391 return; /* nothing to do */
319f3ba5
JF
1392
1393 mcs = xen_mc_entry(sizeof(*args));
1394 args = mcs.args;
1395 args->op.arg2.vcpumask = to_cpumask(args->mask);
1396
1397 /* Remove us, and any offline CPUS. */
1398 cpumask_and(to_cpumask(args->mask), cpus, cpu_online_mask);
1399 cpumask_clear_cpu(smp_processor_id(), to_cpumask(args->mask));
319f3ba5 1400
e7b52ffd 1401 args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
ce7184bd 1402 if (end != TLB_FLUSH_ALL && (end - start) <= PAGE_SIZE) {
319f3ba5 1403 args->op.cmd = MMUEXT_INVLPG_MULTI;
e7b52ffd 1404 args->op.arg1.linear_addr = start;
319f3ba5
JF
1405 }
1406
1407 MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
1408
319f3ba5
JF
1409 xen_mc_issue(PARAVIRT_LAZY_MMU);
1410}
1411
1412static unsigned long xen_read_cr3(void)
1413{
2113f469 1414 return this_cpu_read(xen_cr3);
319f3ba5
JF
1415}
1416
1417static void set_current_cr3(void *v)
1418{
2113f469 1419 this_cpu_write(xen_current_cr3, (unsigned long)v);
319f3ba5
JF
1420}
1421
1422static void __xen_write_cr3(bool kernel, unsigned long cr3)
1423{
dcf7435c 1424 struct mmuext_op op;
319f3ba5
JF
1425 unsigned long mfn;
1426
c8eed171
JF
1427 trace_xen_mmu_write_cr3(kernel, cr3);
1428
319f3ba5
JF
1429 if (cr3)
1430 mfn = pfn_to_mfn(PFN_DOWN(cr3));
1431 else
1432 mfn = 0;
1433
1434 WARN_ON(mfn == 0 && kernel);
1435
dcf7435c
JF
1436 op.cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR;
1437 op.arg1.mfn = mfn;
319f3ba5 1438
dcf7435c 1439 xen_extend_mmuext_op(&op);
319f3ba5
JF
1440
1441 if (kernel) {
2113f469 1442 this_cpu_write(xen_cr3, cr3);
319f3ba5
JF
1443
1444 /* Update xen_current_cr3 once the batch has actually
1445 been submitted. */
1446 xen_mc_callback(set_current_cr3, (void *)cr3);
1447 }
1448}
319f3ba5
JF
1449static void xen_write_cr3(unsigned long cr3)
1450{
1451 BUG_ON(preemptible());
1452
1453 xen_mc_batch(); /* disables interrupts */
1454
1455 /* Update while interrupts are disabled, so its atomic with
1456 respect to ipis */
2113f469 1457 this_cpu_write(xen_cr3, cr3);
319f3ba5
JF
1458
1459 __xen_write_cr3(true, cr3);
1460
1461#ifdef CONFIG_X86_64
1462 {
1463 pgd_t *user_pgd = xen_get_user_pgd(__va(cr3));
1464 if (user_pgd)
1465 __xen_write_cr3(false, __pa(user_pgd));
1466 else
1467 __xen_write_cr3(false, 0);
1468 }
1469#endif
1470
1471 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
1472}
1473
0cc9129d
KRW
1474#ifdef CONFIG_X86_64
1475/*
1476 * At the start of the day - when Xen launches a guest, it has already
1477 * built pagetables for the guest. We diligently look over them
6a6256f9 1478 * in xen_setup_kernel_pagetable and graft as appropriate them in the
0cc9129d
KRW
1479 * init_level4_pgt and its friends. Then when we are happy we load
1480 * the new init_level4_pgt - and continue on.
1481 *
1482 * The generic code starts (start_kernel) and 'init_mem_mapping' sets
1483 * up the rest of the pagetables. When it has completed it loads the cr3.
1484 * N.B. that baremetal would start at 'start_kernel' (and the early
1485 * #PF handler would create bootstrap pagetables) - so we are running
1486 * with the same assumptions as what to do when write_cr3 is executed
1487 * at this point.
1488 *
1489 * Since there are no user-page tables at all, we have two variants
1490 * of xen_write_cr3 - the early bootup (this one), and the late one
1491 * (xen_write_cr3). The reason we have to do that is that in 64-bit
1492 * the Linux kernel and user-space are both in ring 3 while the
1493 * hypervisor is in ring 0.
1494 */
1495static void __init xen_write_cr3_init(unsigned long cr3)
1496{
1497 BUG_ON(preemptible());
1498
1499 xen_mc_batch(); /* disables interrupts */
1500
1501 /* Update while interrupts are disabled, so its atomic with
1502 respect to ipis */
1503 this_cpu_write(xen_cr3, cr3);
1504
1505 __xen_write_cr3(true, cr3);
1506
1507 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
0cc9129d
KRW
1508}
1509#endif
1510
319f3ba5
JF
1511static int xen_pgd_alloc(struct mm_struct *mm)
1512{
1513 pgd_t *pgd = mm->pgd;
1514 int ret = 0;
1515
1516 BUG_ON(PagePinned(virt_to_page(pgd)));
1517
1518#ifdef CONFIG_X86_64
1519 {
1520 struct page *page = virt_to_page(pgd);
1521 pgd_t *user_pgd;
1522
1523 BUG_ON(page->private != 0);
1524
1525 ret = -ENOMEM;
1526
1527 user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
1528 page->private = (unsigned long)user_pgd;
1529
1530 if (user_pgd != NULL) {
1ad83c85 1531#ifdef CONFIG_X86_VSYSCALL_EMULATION
f40c3300 1532 user_pgd[pgd_index(VSYSCALL_ADDR)] =
319f3ba5 1533 __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE);
1ad83c85 1534#endif
319f3ba5
JF
1535 ret = 0;
1536 }
1537
1538 BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd))));
1539 }
1540#endif
1541
1542 return ret;
1543}
1544
1545static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd)
1546{
1547#ifdef CONFIG_X86_64
1548 pgd_t *user_pgd = xen_get_user_pgd(pgd);
1549
1550 if (user_pgd)
1551 free_page((unsigned long)user_pgd);
1552#endif
1553}
1554
d095d43e
DV
1555/*
1556 * Init-time set_pte while constructing initial pagetables, which
1557 * doesn't allow RO page table pages to be remapped RW.
1558 *
66a27dde
DV
1559 * If there is no MFN for this PFN then this page is initially
1560 * ballooned out so clear the PTE (as in decrease_reservation() in
1561 * drivers/xen/balloon.c).
1562 *
d095d43e
DV
1563 * Many of these PTE updates are done on unpinned and writable pages
1564 * and doing a hypercall for these is unnecessary and expensive. At
1565 * this point it is not possible to tell if a page is pinned or not,
1566 * so always write the PTE directly and rely on Xen trapping and
1567 * emulating any updates as necessary.
1568 */
d6b186c1 1569__visible pte_t xen_make_pte_init(pteval_t pte)
1f4f9315 1570{
d6b186c1
DV
1571#ifdef CONFIG_X86_64
1572 unsigned long pfn;
1573
1574 /*
1575 * Pages belonging to the initial p2m list mapped outside the default
1576 * address range must be mapped read-only. This region contains the
1577 * page tables for mapping the p2m list, too, and page tables MUST be
1578 * mapped read-only.
1579 */
1580 pfn = (pte & PTE_PFN_MASK) >> PAGE_SHIFT;
1581 if (xen_start_info->mfn_list < __START_KERNEL_map &&
1582 pfn >= xen_start_info->first_p2m_pfn &&
1583 pfn < xen_start_info->first_p2m_pfn + xen_start_info->nr_p2m_frames)
1584 pte &= ~_PAGE_RW;
1585#endif
1586 pte = pte_pfn_to_mfn(pte);
1587 return native_make_pte(pte);
1588}
1589PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte_init);
1f4f9315 1590
d6b186c1
DV
1591static void __init xen_set_pte_init(pte_t *ptep, pte_t pte)
1592{
1593#ifdef CONFIG_X86_32
1594 /* If there's an existing pte, then don't allow _PAGE_RW to be set */
1595 if (pte_mfn(pte) != INVALID_P2M_ENTRY
1596 && pte_val_ma(*ptep) & _PAGE_PRESENT)
1597 pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) &
1598 pte_val_ma(pte));
1599#endif
d095d43e 1600 native_set_pte(ptep, pte);
1f4f9315 1601}
319f3ba5
JF
1602
1603/* Early in boot, while setting up the initial pagetable, assume
1604 everything is pinned. */
3f508953 1605static void __init xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn)
319f3ba5 1606{
b96229b5
JF
1607#ifdef CONFIG_FLATMEM
1608 BUG_ON(mem_map); /* should only be used early */
1609#endif
1610 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1611 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1612}
1613
1614/* Used for pmd and pud */
3f508953 1615static void __init xen_alloc_pmd_init(struct mm_struct *mm, unsigned long pfn)
b96229b5 1616{
319f3ba5
JF
1617#ifdef CONFIG_FLATMEM
1618 BUG_ON(mem_map); /* should only be used early */
1619#endif
1620 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1621}
1622
1623/* Early release_pte assumes that all pts are pinned, since there's
1624 only init_mm and anything attached to that is pinned. */
3f508953 1625static void __init xen_release_pte_init(unsigned long pfn)
319f3ba5 1626{
b96229b5 1627 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
319f3ba5
JF
1628 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1629}
1630
3f508953 1631static void __init xen_release_pmd_init(unsigned long pfn)
319f3ba5 1632{
b96229b5 1633 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
319f3ba5
JF
1634}
1635
bc7fe1d9
JF
1636static inline void __pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
1637{
1638 struct multicall_space mcs;
1639 struct mmuext_op *op;
1640
1641 mcs = __xen_mc_entry(sizeof(*op));
1642 op = mcs.args;
1643 op->cmd = cmd;
1644 op->arg1.mfn = pfn_to_mfn(pfn);
1645
1646 MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
1647}
1648
1649static inline void __set_pfn_prot(unsigned long pfn, pgprot_t prot)
1650{
1651 struct multicall_space mcs;
1652 unsigned long addr = (unsigned long)__va(pfn << PAGE_SHIFT);
1653
1654 mcs = __xen_mc_entry(0);
1655 MULTI_update_va_mapping(mcs.mc, (unsigned long)addr,
1656 pfn_pte(pfn, prot), 0);
1657}
1658
319f3ba5
JF
1659/* This needs to make sure the new pte page is pinned iff its being
1660 attached to a pinned pagetable. */
bc7fe1d9
JF
1661static inline void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn,
1662 unsigned level)
319f3ba5 1663{
bc7fe1d9
JF
1664 bool pinned = PagePinned(virt_to_page(mm->pgd));
1665
c2ba050d 1666 trace_xen_mmu_alloc_ptpage(mm, pfn, level, pinned);
319f3ba5 1667
c2ba050d 1668 if (pinned) {
bc7fe1d9 1669 struct page *page = pfn_to_page(pfn);
319f3ba5 1670
319f3ba5
JF
1671 SetPagePinned(page);
1672
319f3ba5 1673 if (!PageHighMem(page)) {
bc7fe1d9
JF
1674 xen_mc_batch();
1675
1676 __set_pfn_prot(pfn, PAGE_KERNEL_RO);
1677
57c1ffce 1678 if (level == PT_PTE && USE_SPLIT_PTE_PTLOCKS)
bc7fe1d9
JF
1679 __pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1680
1681 xen_mc_issue(PARAVIRT_LAZY_MMU);
319f3ba5
JF
1682 } else {
1683 /* make sure there are no stray mappings of
1684 this page */
1685 kmap_flush_unused();
1686 }
1687 }
1688}
1689
1690static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn)
1691{
1692 xen_alloc_ptpage(mm, pfn, PT_PTE);
1693}
1694
1695static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
1696{
1697 xen_alloc_ptpage(mm, pfn, PT_PMD);
1698}
1699
1700/* This should never happen until we're OK to use struct page */
bc7fe1d9 1701static inline void xen_release_ptpage(unsigned long pfn, unsigned level)
319f3ba5
JF
1702{
1703 struct page *page = pfn_to_page(pfn);
c2ba050d 1704 bool pinned = PagePinned(page);
319f3ba5 1705
c2ba050d 1706 trace_xen_mmu_release_ptpage(pfn, level, pinned);
319f3ba5 1707
c2ba050d 1708 if (pinned) {
319f3ba5 1709 if (!PageHighMem(page)) {
bc7fe1d9
JF
1710 xen_mc_batch();
1711
57c1ffce 1712 if (level == PT_PTE && USE_SPLIT_PTE_PTLOCKS)
bc7fe1d9
JF
1713 __pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
1714
1715 __set_pfn_prot(pfn, PAGE_KERNEL);
1716
1717 xen_mc_issue(PARAVIRT_LAZY_MMU);
319f3ba5
JF
1718 }
1719 ClearPagePinned(page);
1720 }
1721}
1722
1723static void xen_release_pte(unsigned long pfn)
1724{
1725 xen_release_ptpage(pfn, PT_PTE);
1726}
1727
1728static void xen_release_pmd(unsigned long pfn)
1729{
1730 xen_release_ptpage(pfn, PT_PMD);
1731}
1732
98233368 1733#if CONFIG_PGTABLE_LEVELS == 4
319f3ba5
JF
1734static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn)
1735{
1736 xen_alloc_ptpage(mm, pfn, PT_PUD);
1737}
1738
1739static void xen_release_pud(unsigned long pfn)
1740{
1741 xen_release_ptpage(pfn, PT_PUD);
1742}
1743#endif
1744
1745void __init xen_reserve_top(void)
1746{
1747#ifdef CONFIG_X86_32
1748 unsigned long top = HYPERVISOR_VIRT_START;
1749 struct xen_platform_parameters pp;
1750
1751 if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0)
1752 top = pp.virt_start;
1753
1754 reserve_top_address(-top);
1755#endif /* CONFIG_X86_32 */
1756}
1757
1758/*
1759 * Like __va(), but returns address in the kernel mapping (which is
1760 * all we have until the physical memory mapping has been set up.
1761 */
bf9d834a 1762static void * __init __ka(phys_addr_t paddr)
319f3ba5
JF
1763{
1764#ifdef CONFIG_X86_64
1765 return (void *)(paddr + __START_KERNEL_map);
1766#else
1767 return __va(paddr);
1768#endif
1769}
1770
1771/* Convert a machine address to physical address */
bf9d834a 1772static unsigned long __init m2p(phys_addr_t maddr)
319f3ba5
JF
1773{
1774 phys_addr_t paddr;
1775
1776 maddr &= PTE_PFN_MASK;
1777 paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT;
1778
1779 return paddr;
1780}
1781
1782/* Convert a machine address to kernel virtual */
bf9d834a 1783static void * __init m2v(phys_addr_t maddr)
319f3ba5
JF
1784{
1785 return __ka(m2p(maddr));
1786}
1787
4ec5387c 1788/* Set the page permissions on an identity-mapped pages */
bf9d834a
JG
1789static void __init set_page_prot_flags(void *addr, pgprot_t prot,
1790 unsigned long flags)
319f3ba5
JF
1791{
1792 unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
1793 pte_t pte = pfn_pte(pfn, prot);
1794
4e44e44b
MR
1795 /* For PVH no need to set R/O or R/W to pin them or unpin them. */
1796 if (xen_feature(XENFEAT_auto_translated_physmap))
1797 return;
1798
b2222794 1799 if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, flags))
319f3ba5
JF
1800 BUG();
1801}
bf9d834a 1802static void __init set_page_prot(void *addr, pgprot_t prot)
b2222794
KRW
1803{
1804 return set_page_prot_flags(addr, prot, UVMF_NONE);
1805}
caaf9ecf 1806#ifdef CONFIG_X86_32
3f508953 1807static void __init xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
319f3ba5
JF
1808{
1809 unsigned pmdidx, pteidx;
1810 unsigned ident_pte;
1811 unsigned long pfn;
1812
764f0138
JF
1813 level1_ident_pgt = extend_brk(sizeof(pte_t) * LEVEL1_IDENT_ENTRIES,
1814 PAGE_SIZE);
1815
319f3ba5
JF
1816 ident_pte = 0;
1817 pfn = 0;
1818 for (pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) {
1819 pte_t *pte_page;
1820
1821 /* Reuse or allocate a page of ptes */
1822 if (pmd_present(pmd[pmdidx]))
1823 pte_page = m2v(pmd[pmdidx].pmd);
1824 else {
1825 /* Check for free pte pages */
764f0138 1826 if (ident_pte == LEVEL1_IDENT_ENTRIES)
319f3ba5
JF
1827 break;
1828
1829 pte_page = &level1_ident_pgt[ident_pte];
1830 ident_pte += PTRS_PER_PTE;
1831
1832 pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE);
1833 }
1834
1835 /* Install mappings */
1836 for (pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) {
1837 pte_t pte;
1838
a91d9287
SS
1839 if (pfn > max_pfn_mapped)
1840 max_pfn_mapped = pfn;
a91d9287 1841
319f3ba5
JF
1842 if (!pte_none(pte_page[pteidx]))
1843 continue;
1844
1845 pte = pfn_pte(pfn, PAGE_KERNEL_EXEC);
1846 pte_page[pteidx] = pte;
1847 }
1848 }
1849
1850 for (pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE)
1851 set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO);
1852
1853 set_page_prot(pmd, PAGE_KERNEL_RO);
1854}
caaf9ecf 1855#endif
7e77506a
IC
1856void __init xen_setup_machphys_mapping(void)
1857{
1858 struct xen_machphys_mapping mapping;
7e77506a
IC
1859
1860 if (HYPERVISOR_memory_op(XENMEM_machphys_mapping, &mapping) == 0) {
1861 machine_to_phys_mapping = (unsigned long *)mapping.v_start;
ccbcdf7c 1862 machine_to_phys_nr = mapping.max_mfn + 1;
7e77506a 1863 } else {
ccbcdf7c 1864 machine_to_phys_nr = MACH2PHYS_NR_ENTRIES;
7e77506a 1865 }
ccbcdf7c 1866#ifdef CONFIG_X86_32
61cca2fa
JB
1867 WARN_ON((machine_to_phys_mapping + (machine_to_phys_nr - 1))
1868 < machine_to_phys_mapping);
ccbcdf7c 1869#endif
7e77506a
IC
1870}
1871
319f3ba5 1872#ifdef CONFIG_X86_64
bf9d834a 1873static void __init convert_pfn_mfn(void *v)
319f3ba5
JF
1874{
1875 pte_t *pte = v;
1876 int i;
1877
1878 /* All levels are converted the same way, so just treat them
1879 as ptes. */
1880 for (i = 0; i < PTRS_PER_PTE; i++)
1881 pte[i] = xen_make_pte(pte[i].pte);
1882}
488f046d
KRW
1883static void __init check_pt_base(unsigned long *pt_base, unsigned long *pt_end,
1884 unsigned long addr)
1885{
1886 if (*pt_base == PFN_DOWN(__pa(addr))) {
b2222794 1887 set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG);
488f046d
KRW
1888 clear_page((void *)addr);
1889 (*pt_base)++;
1890 }
1891 if (*pt_end == PFN_DOWN(__pa(addr))) {
b2222794 1892 set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG);
488f046d
KRW
1893 clear_page((void *)addr);
1894 (*pt_end)--;
1895 }
1896}
319f3ba5 1897/*
0d2eb44f 1898 * Set up the initial kernel pagetable.
319f3ba5
JF
1899 *
1900 * We can construct this by grafting the Xen provided pagetable into
1901 * head_64.S's preconstructed pagetables. We copy the Xen L2's into
0b5a5063
SB
1902 * level2_ident_pgt, and level2_kernel_pgt. This means that only the
1903 * kernel has a physical mapping to start with - but that's enough to
1904 * get __va working. We need to fill in the rest of the physical
1905 * mapping once some sort of allocator has been set up. NOTE: for
1906 * PVH, the page tables are native.
319f3ba5 1907 */
3699aad0 1908void __init xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
319f3ba5
JF
1909{
1910 pud_t *l3;
1911 pmd_t *l2;
488f046d
KRW
1912 unsigned long addr[3];
1913 unsigned long pt_base, pt_end;
1914 unsigned i;
319f3ba5 1915
14988a4d
SS
1916 /* max_pfn_mapped is the last pfn mapped in the initial memory
1917 * mappings. Considering that on Xen after the kernel mappings we
1918 * have the mappings of some pages that don't exist in pfn space, we
1919 * set max_pfn_mapped to the last real pfn mapped. */
8f5b0c63
JG
1920 if (xen_start_info->mfn_list < __START_KERNEL_map)
1921 max_pfn_mapped = xen_start_info->first_p2m_pfn;
1922 else
1923 max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->mfn_list));
14988a4d 1924
488f046d
KRW
1925 pt_base = PFN_DOWN(__pa(xen_start_info->pt_base));
1926 pt_end = pt_base + xen_start_info->nr_pt_frames;
1927
319f3ba5
JF
1928 /* Zap identity mapping */
1929 init_level4_pgt[0] = __pgd(0);
1930
4e44e44b
MR
1931 if (!xen_feature(XENFEAT_auto_translated_physmap)) {
1932 /* Pre-constructed entries are in pfn, so convert to mfn */
1933 /* L4[272] -> level3_ident_pgt
1934 * L4[511] -> level3_kernel_pgt */
1935 convert_pfn_mfn(init_level4_pgt);
1936
1937 /* L3_i[0] -> level2_ident_pgt */
1938 convert_pfn_mfn(level3_ident_pgt);
1939 /* L3_k[510] -> level2_kernel_pgt
0b5a5063 1940 * L3_k[511] -> level2_fixmap_pgt */
4e44e44b 1941 convert_pfn_mfn(level3_kernel_pgt);
0b5a5063
SB
1942
1943 /* L3_k[511][506] -> level1_fixmap_pgt */
1944 convert_pfn_mfn(level2_fixmap_pgt);
4e44e44b 1945 }
4fac153a 1946 /* We get [511][511] and have Xen's version of level2_kernel_pgt */
319f3ba5
JF
1947 l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd);
1948 l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud);
1949
488f046d
KRW
1950 addr[0] = (unsigned long)pgd;
1951 addr[1] = (unsigned long)l3;
1952 addr[2] = (unsigned long)l2;
4fac153a 1953 /* Graft it onto L4[272][0]. Note that we creating an aliasing problem:
0b5a5063 1954 * Both L4[272][0] and L4[511][510] have entries that point to the same
4fac153a
KRW
1955 * L2 (PMD) tables. Meaning that if you modify it in __va space
1956 * it will be also modified in the __ka space! (But if you just
1957 * modify the PMD table to point to other PTE's or none, then you
1958 * are OK - which is what cleanup_highmap does) */
ae895ed7 1959 copy_page(level2_ident_pgt, l2);
0b5a5063 1960 /* Graft it onto L4[511][510] */
ae895ed7 1961 copy_page(level2_kernel_pgt, l2);
319f3ba5 1962
8f5b0c63
JG
1963 /* Copy the initial P->M table mappings if necessary. */
1964 i = pgd_index(xen_start_info->mfn_list);
1965 if (i && i < pgd_index(__START_KERNEL_map))
1966 init_level4_pgt[i] = ((pgd_t *)xen_start_info->pt_base)[i];
1967
4e44e44b
MR
1968 if (!xen_feature(XENFEAT_auto_translated_physmap)) {
1969 /* Make pagetable pieces RO */
1970 set_page_prot(init_level4_pgt, PAGE_KERNEL_RO);
1971 set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO);
1972 set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO);
1973 set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO);
1974 set_page_prot(level2_ident_pgt, PAGE_KERNEL_RO);
1975 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1976 set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);
0b5a5063 1977 set_page_prot(level1_fixmap_pgt, PAGE_KERNEL_RO);
4e44e44b
MR
1978
1979 /* Pin down new L4 */
1980 pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE,
1981 PFN_DOWN(__pa_symbol(init_level4_pgt)));
1982
1983 /* Unpin Xen-provided one */
1984 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
319f3ba5 1985
4e44e44b
MR
1986 /*
1987 * At this stage there can be no user pgd, and no page
1988 * structure to attach it to, so make sure we just set kernel
1989 * pgd.
1990 */
1991 xen_mc_batch();
1992 __xen_write_cr3(true, __pa(init_level4_pgt));
1993 xen_mc_issue(PARAVIRT_LAZY_CPU);
1994 } else
1995 native_write_cr3(__pa(init_level4_pgt));
319f3ba5 1996
488f046d
KRW
1997 /* We can't that easily rip out L3 and L2, as the Xen pagetables are
1998 * set out this way: [L4], [L1], [L2], [L3], [L1], [L1] ... for
1999 * the initial domain. For guests using the toolstack, they are in:
2000 * [L4], [L3], [L2], [L1], [L1], order .. So for dom0 we can only
2001 * rip out the [L4] (pgd), but for guests we shave off three pages.
2002 */
2003 for (i = 0; i < ARRAY_SIZE(addr); i++)
2004 check_pt_base(&pt_base, &pt_end, addr[i]);
319f3ba5 2005
488f046d 2006 /* Our (by three pages) smaller Xen pagetable that we are using */
04414baa
JG
2007 xen_pt_base = PFN_PHYS(pt_base);
2008 xen_pt_size = (pt_end - pt_base) * PAGE_SIZE;
2009 memblock_reserve(xen_pt_base, xen_pt_size);
70e61199 2010
7f914062
KRW
2011 /* Revector the xen_start_info */
2012 xen_start_info = (struct start_info *)__va(__pa(xen_start_info));
319f3ba5 2013}
70e61199
JG
2014
2015/*
2016 * Read a value from a physical address.
2017 */
2018static unsigned long __init xen_read_phys_ulong(phys_addr_t addr)
2019{
2020 unsigned long *vaddr;
2021 unsigned long val;
2022
2023 vaddr = early_memremap_ro(addr, sizeof(val));
2024 val = *vaddr;
2025 early_memunmap(vaddr, sizeof(val));
2026 return val;
2027}
2028
2029/*
2030 * Translate a virtual address to a physical one without relying on mapped
ee2b3f8c
JG
2031 * page tables. Don't rely on big pages being aligned in (guest) physical
2032 * space!
70e61199
JG
2033 */
2034static phys_addr_t __init xen_early_virt_to_phys(unsigned long vaddr)
2035{
2036 phys_addr_t pa;
2037 pgd_t pgd;
2038 pud_t pud;
2039 pmd_t pmd;
2040 pte_t pte;
2041
2042 pa = read_cr3();
2043 pgd = native_make_pgd(xen_read_phys_ulong(pa + pgd_index(vaddr) *
2044 sizeof(pgd)));
2045 if (!pgd_present(pgd))
2046 return 0;
2047
2048 pa = pgd_val(pgd) & PTE_PFN_MASK;
2049 pud = native_make_pud(xen_read_phys_ulong(pa + pud_index(vaddr) *
2050 sizeof(pud)));
2051 if (!pud_present(pud))
2052 return 0;
ee2b3f8c 2053 pa = pud_val(pud) & PTE_PFN_MASK;
70e61199
JG
2054 if (pud_large(pud))
2055 return pa + (vaddr & ~PUD_MASK);
2056
2057 pmd = native_make_pmd(xen_read_phys_ulong(pa + pmd_index(vaddr) *
2058 sizeof(pmd)));
2059 if (!pmd_present(pmd))
2060 return 0;
ee2b3f8c 2061 pa = pmd_val(pmd) & PTE_PFN_MASK;
70e61199
JG
2062 if (pmd_large(pmd))
2063 return pa + (vaddr & ~PMD_MASK);
2064
2065 pte = native_make_pte(xen_read_phys_ulong(pa + pte_index(vaddr) *
2066 sizeof(pte)));
2067 if (!pte_present(pte))
2068 return 0;
2069 pa = pte_pfn(pte) << PAGE_SHIFT;
2070
2071 return pa | (vaddr & ~PAGE_MASK);
2072}
2073
2074/*
2075 * Find a new area for the hypervisor supplied p2m list and relocate the p2m to
2076 * this area.
2077 */
2078void __init xen_relocate_p2m(void)
2079{
2080 phys_addr_t size, new_area, pt_phys, pmd_phys, pud_phys;
2081 unsigned long p2m_pfn, p2m_pfn_end, n_frames, pfn, pfn_end;
2082 int n_pte, n_pt, n_pmd, n_pud, idx_pte, idx_pt, idx_pmd, idx_pud;
2083 pte_t *pt;
2084 pmd_t *pmd;
2085 pud_t *pud;
2086 pgd_t *pgd;
2087 unsigned long *new_p2m;
2088
2089 size = PAGE_ALIGN(xen_start_info->nr_pages * sizeof(unsigned long));
2090 n_pte = roundup(size, PAGE_SIZE) >> PAGE_SHIFT;
2091 n_pt = roundup(size, PMD_SIZE) >> PMD_SHIFT;
2092 n_pmd = roundup(size, PUD_SIZE) >> PUD_SHIFT;
2093 n_pud = roundup(size, PGDIR_SIZE) >> PGDIR_SHIFT;
2094 n_frames = n_pte + n_pt + n_pmd + n_pud;
2095
2096 new_area = xen_find_free_area(PFN_PHYS(n_frames));
2097 if (!new_area) {
2098 xen_raw_console_write("Can't find new memory area for p2m needed due to E820 map conflict\n");
2099 BUG();
2100 }
2101
2102 /*
2103 * Setup the page tables for addressing the new p2m list.
2104 * We have asked the hypervisor to map the p2m list at the user address
2105 * PUD_SIZE. It may have done so, or it may have used a kernel space
2106 * address depending on the Xen version.
2107 * To avoid any possible virtual address collision, just use
2108 * 2 * PUD_SIZE for the new area.
2109 */
2110 pud_phys = new_area;
2111 pmd_phys = pud_phys + PFN_PHYS(n_pud);
2112 pt_phys = pmd_phys + PFN_PHYS(n_pmd);
2113 p2m_pfn = PFN_DOWN(pt_phys) + n_pt;
2114
2115 pgd = __va(read_cr3());
2116 new_p2m = (unsigned long *)(2 * PGDIR_SIZE);
2117 for (idx_pud = 0; idx_pud < n_pud; idx_pud++) {
2118 pud = early_memremap(pud_phys, PAGE_SIZE);
2119 clear_page(pud);
2120 for (idx_pmd = 0; idx_pmd < min(n_pmd, PTRS_PER_PUD);
2121 idx_pmd++) {
2122 pmd = early_memremap(pmd_phys, PAGE_SIZE);
2123 clear_page(pmd);
2124 for (idx_pt = 0; idx_pt < min(n_pt, PTRS_PER_PMD);
2125 idx_pt++) {
2126 pt = early_memremap(pt_phys, PAGE_SIZE);
2127 clear_page(pt);
2128 for (idx_pte = 0;
2129 idx_pte < min(n_pte, PTRS_PER_PTE);
2130 idx_pte++) {
2131 set_pte(pt + idx_pte,
2132 pfn_pte(p2m_pfn, PAGE_KERNEL));
2133 p2m_pfn++;
2134 }
2135 n_pte -= PTRS_PER_PTE;
2136 early_memunmap(pt, PAGE_SIZE);
2137 make_lowmem_page_readonly(__va(pt_phys));
2138 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE,
2139 PFN_DOWN(pt_phys));
2140 set_pmd(pmd + idx_pt,
2141 __pmd(_PAGE_TABLE | pt_phys));
2142 pt_phys += PAGE_SIZE;
2143 }
2144 n_pt -= PTRS_PER_PMD;
2145 early_memunmap(pmd, PAGE_SIZE);
2146 make_lowmem_page_readonly(__va(pmd_phys));
2147 pin_pagetable_pfn(MMUEXT_PIN_L2_TABLE,
2148 PFN_DOWN(pmd_phys));
2149 set_pud(pud + idx_pmd, __pud(_PAGE_TABLE | pmd_phys));
2150 pmd_phys += PAGE_SIZE;
2151 }
2152 n_pmd -= PTRS_PER_PUD;
2153 early_memunmap(pud, PAGE_SIZE);
2154 make_lowmem_page_readonly(__va(pud_phys));
2155 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(pud_phys));
2156 set_pgd(pgd + 2 + idx_pud, __pgd(_PAGE_TABLE | pud_phys));
2157 pud_phys += PAGE_SIZE;
2158 }
2159
2160 /* Now copy the old p2m info to the new area. */
2161 memcpy(new_p2m, xen_p2m_addr, size);
2162 xen_p2m_addr = new_p2m;
2163
2164 /* Release the old p2m list and set new list info. */
2165 p2m_pfn = PFN_DOWN(xen_early_virt_to_phys(xen_start_info->mfn_list));
2166 BUG_ON(!p2m_pfn);
2167 p2m_pfn_end = p2m_pfn + PFN_DOWN(size);
2168
2169 if (xen_start_info->mfn_list < __START_KERNEL_map) {
2170 pfn = xen_start_info->first_p2m_pfn;
2171 pfn_end = xen_start_info->first_p2m_pfn +
2172 xen_start_info->nr_p2m_frames;
2173 set_pgd(pgd + 1, __pgd(0));
2174 } else {
2175 pfn = p2m_pfn;
2176 pfn_end = p2m_pfn_end;
2177 }
2178
2179 memblock_free(PFN_PHYS(pfn), PAGE_SIZE * (pfn_end - pfn));
2180 while (pfn < pfn_end) {
2181 if (pfn == p2m_pfn) {
2182 pfn = p2m_pfn_end;
2183 continue;
2184 }
2185 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
2186 pfn++;
2187 }
2188
2189 xen_start_info->mfn_list = (unsigned long)xen_p2m_addr;
2190 xen_start_info->first_p2m_pfn = PFN_DOWN(new_area);
2191 xen_start_info->nr_p2m_frames = n_frames;
2192}
2193
319f3ba5 2194#else /* !CONFIG_X86_64 */
5b5c1af1
IC
2195static RESERVE_BRK_ARRAY(pmd_t, initial_kernel_pmd, PTRS_PER_PMD);
2196static RESERVE_BRK_ARRAY(pmd_t, swapper_kernel_pmd, PTRS_PER_PMD);
2197
3f508953 2198static void __init xen_write_cr3_init(unsigned long cr3)
5b5c1af1
IC
2199{
2200 unsigned long pfn = PFN_DOWN(__pa(swapper_pg_dir));
2201
2202 BUG_ON(read_cr3() != __pa(initial_page_table));
2203 BUG_ON(cr3 != __pa(swapper_pg_dir));
2204
2205 /*
2206 * We are switching to swapper_pg_dir for the first time (from
2207 * initial_page_table) and therefore need to mark that page
2208 * read-only and then pin it.
2209 *
2210 * Xen disallows sharing of kernel PMDs for PAE
2211 * guests. Therefore we must copy the kernel PMD from
2212 * initial_page_table into a new kernel PMD to be used in
2213 * swapper_pg_dir.
2214 */
2215 swapper_kernel_pmd =
2216 extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE);
ae895ed7 2217 copy_page(swapper_kernel_pmd, initial_kernel_pmd);
5b5c1af1
IC
2218 swapper_pg_dir[KERNEL_PGD_BOUNDARY] =
2219 __pgd(__pa(swapper_kernel_pmd) | _PAGE_PRESENT);
2220 set_page_prot(swapper_kernel_pmd, PAGE_KERNEL_RO);
2221
2222 set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO);
2223 xen_write_cr3(cr3);
2224 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, pfn);
2225
2226 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE,
2227 PFN_DOWN(__pa(initial_page_table)));
2228 set_page_prot(initial_page_table, PAGE_KERNEL);
2229 set_page_prot(initial_kernel_pmd, PAGE_KERNEL);
2230
2231 pv_mmu_ops.write_cr3 = &xen_write_cr3;
2232}
319f3ba5 2233
70e61199
JG
2234/*
2235 * For 32 bit domains xen_start_info->pt_base is the pgd address which might be
2236 * not the first page table in the page table pool.
2237 * Iterate through the initial page tables to find the real page table base.
2238 */
2239static phys_addr_t xen_find_pt_base(pmd_t *pmd)
2240{
2241 phys_addr_t pt_base, paddr;
2242 unsigned pmdidx;
2243
2244 pt_base = min(__pa(xen_start_info->pt_base), __pa(pmd));
2245
2246 for (pmdidx = 0; pmdidx < PTRS_PER_PMD; pmdidx++)
2247 if (pmd_present(pmd[pmdidx]) && !pmd_large(pmd[pmdidx])) {
2248 paddr = m2p(pmd[pmdidx].pmd);
2249 pt_base = min(pt_base, paddr);
2250 }
2251
2252 return pt_base;
2253}
2254
3699aad0 2255void __init xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
319f3ba5
JF
2256{
2257 pmd_t *kernel_pmd;
2258
70e61199
JG
2259 kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd);
2260
2261 xen_pt_base = xen_find_pt_base(kernel_pmd);
2262 xen_pt_size = xen_start_info->nr_pt_frames * PAGE_SIZE;
2263
5b5c1af1
IC
2264 initial_kernel_pmd =
2265 extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE);
f0991802 2266
70e61199 2267 max_pfn_mapped = PFN_DOWN(xen_pt_base + xen_pt_size + 512 * 1024);
319f3ba5 2268
ae895ed7 2269 copy_page(initial_kernel_pmd, kernel_pmd);
319f3ba5 2270
5b5c1af1 2271 xen_map_identity_early(initial_kernel_pmd, max_pfn);
319f3ba5 2272
ae895ed7 2273 copy_page(initial_page_table, pgd);
5b5c1af1
IC
2274 initial_page_table[KERNEL_PGD_BOUNDARY] =
2275 __pgd(__pa(initial_kernel_pmd) | _PAGE_PRESENT);
319f3ba5 2276
5b5c1af1
IC
2277 set_page_prot(initial_kernel_pmd, PAGE_KERNEL_RO);
2278 set_page_prot(initial_page_table, PAGE_KERNEL_RO);
319f3ba5
JF
2279 set_page_prot(empty_zero_page, PAGE_KERNEL_RO);
2280
2281 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
2282
5b5c1af1
IC
2283 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE,
2284 PFN_DOWN(__pa(initial_page_table)));
2285 xen_write_cr3(__pa(initial_page_table));
319f3ba5 2286
04414baa 2287 memblock_reserve(xen_pt_base, xen_pt_size);
319f3ba5
JF
2288}
2289#endif /* CONFIG_X86_64 */
2290
6c2681c8
JG
2291void __init xen_reserve_special_pages(void)
2292{
2293 phys_addr_t paddr;
2294
2295 memblock_reserve(__pa(xen_start_info), PAGE_SIZE);
2296 if (xen_start_info->store_mfn) {
2297 paddr = PFN_PHYS(mfn_to_pfn(xen_start_info->store_mfn));
2298 memblock_reserve(paddr, PAGE_SIZE);
2299 }
2300 if (!xen_initial_domain()) {
2301 paddr = PFN_PHYS(mfn_to_pfn(xen_start_info->console.domU.mfn));
2302 memblock_reserve(paddr, PAGE_SIZE);
2303 }
2304}
2305
04414baa
JG
2306void __init xen_pt_check_e820(void)
2307{
2308 if (xen_is_e820_reserved(xen_pt_base, xen_pt_size)) {
2309 xen_raw_console_write("Xen hypervisor allocated page table memory conflicts with E820 map\n");
2310 BUG();
2311 }
2312}
2313
98511f35
JF
2314static unsigned char dummy_mapping[PAGE_SIZE] __page_aligned_bss;
2315
3b3809ac 2316static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot)
319f3ba5
JF
2317{
2318 pte_t pte;
2319
2320 phys >>= PAGE_SHIFT;
2321
2322 switch (idx) {
2323 case FIX_BTMAP_END ... FIX_BTMAP_BEGIN:
4eefbe79 2324 case FIX_RO_IDT:
319f3ba5
JF
2325#ifdef CONFIG_X86_32
2326 case FIX_WP_TEST:
319f3ba5
JF
2327# ifdef CONFIG_HIGHMEM
2328 case FIX_KMAP_BEGIN ... FIX_KMAP_END:
2329# endif
1ad83c85 2330#elif defined(CONFIG_X86_VSYSCALL_EMULATION)
f40c3300 2331 case VSYSCALL_PAGE:
319f3ba5 2332#endif
3ecb1b7d
JF
2333 case FIX_TEXT_POKE0:
2334 case FIX_TEXT_POKE1:
2335 /* All local page mappings */
319f3ba5
JF
2336 pte = pfn_pte(phys, prot);
2337 break;
2338
98511f35
JF
2339#ifdef CONFIG_X86_LOCAL_APIC
2340 case FIX_APIC_BASE: /* maps dummy local APIC */
2341 pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
2342 break;
2343#endif
2344
2345#ifdef CONFIG_X86_IO_APIC
2346 case FIX_IO_APIC_BASE_0 ... FIX_IO_APIC_BASE_END:
2347 /*
2348 * We just don't map the IO APIC - all access is via
2349 * hypercalls. Keep the address in the pte for reference.
2350 */
27abd14b 2351 pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
98511f35
JF
2352 break;
2353#endif
2354
c0011dbf
JF
2355 case FIX_PARAVIRT_BOOTMAP:
2356 /* This is an MFN, but it isn't an IO mapping from the
2357 IO domain */
319f3ba5
JF
2358 pte = mfn_pte(phys, prot);
2359 break;
c0011dbf
JF
2360
2361 default:
2362 /* By default, set_fixmap is used for hardware mappings */
7f2f8822 2363 pte = mfn_pte(phys, prot);
c0011dbf 2364 break;
319f3ba5
JF
2365 }
2366
2367 __native_set_fixmap(idx, pte);
2368
1ad83c85 2369#ifdef CONFIG_X86_VSYSCALL_EMULATION
319f3ba5
JF
2370 /* Replicate changes to map the vsyscall page into the user
2371 pagetable vsyscall mapping. */
f40c3300 2372 if (idx == VSYSCALL_PAGE) {
319f3ba5
JF
2373 unsigned long vaddr = __fix_to_virt(idx);
2374 set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte);
2375 }
2376#endif
2377}
2378
3f508953 2379static void __init xen_post_allocator_init(void)
319f3ba5 2380{
4e44e44b
MR
2381 if (xen_feature(XENFEAT_auto_translated_physmap))
2382 return;
2383
319f3ba5
JF
2384 pv_mmu_ops.set_pte = xen_set_pte;
2385 pv_mmu_ops.set_pmd = xen_set_pmd;
2386 pv_mmu_ops.set_pud = xen_set_pud;
98233368 2387#if CONFIG_PGTABLE_LEVELS == 4
319f3ba5
JF
2388 pv_mmu_ops.set_pgd = xen_set_pgd;
2389#endif
2390
2391 /* This will work as long as patching hasn't happened yet
2392 (which it hasn't) */
2393 pv_mmu_ops.alloc_pte = xen_alloc_pte;
2394 pv_mmu_ops.alloc_pmd = xen_alloc_pmd;
2395 pv_mmu_ops.release_pte = xen_release_pte;
2396 pv_mmu_ops.release_pmd = xen_release_pmd;
98233368 2397#if CONFIG_PGTABLE_LEVELS == 4
319f3ba5
JF
2398 pv_mmu_ops.alloc_pud = xen_alloc_pud;
2399 pv_mmu_ops.release_pud = xen_release_pud;
2400#endif
d6b186c1 2401 pv_mmu_ops.make_pte = PV_CALLEE_SAVE(xen_make_pte);
319f3ba5
JF
2402
2403#ifdef CONFIG_X86_64
d3eb2c89 2404 pv_mmu_ops.write_cr3 = &xen_write_cr3;
319f3ba5
JF
2405 SetPagePinned(virt_to_page(level3_user_vsyscall));
2406#endif
2407 xen_mark_init_mm_pinned();
2408}
2409
b407fc57
JF
2410static void xen_leave_lazy_mmu(void)
2411{
5caecb94 2412 preempt_disable();
b407fc57
JF
2413 xen_mc_flush();
2414 paravirt_leave_lazy_mmu();
5caecb94 2415 preempt_enable();
b407fc57 2416}
319f3ba5 2417
3f508953 2418static const struct pv_mmu_ops xen_mmu_ops __initconst = {
319f3ba5
JF
2419 .read_cr2 = xen_read_cr2,
2420 .write_cr2 = xen_write_cr2,
2421
2422 .read_cr3 = xen_read_cr3,
5b5c1af1 2423 .write_cr3 = xen_write_cr3_init,
319f3ba5
JF
2424
2425 .flush_tlb_user = xen_flush_tlb,
2426 .flush_tlb_kernel = xen_flush_tlb,
2427 .flush_tlb_single = xen_flush_tlb_single,
2428 .flush_tlb_others = xen_flush_tlb_others,
2429
2430 .pte_update = paravirt_nop,
319f3ba5
JF
2431
2432 .pgd_alloc = xen_pgd_alloc,
2433 .pgd_free = xen_pgd_free,
2434
2435 .alloc_pte = xen_alloc_pte_init,
2436 .release_pte = xen_release_pte_init,
b96229b5 2437 .alloc_pmd = xen_alloc_pmd_init,
b96229b5 2438 .release_pmd = xen_release_pmd_init,
319f3ba5 2439
319f3ba5 2440 .set_pte = xen_set_pte_init,
319f3ba5
JF
2441 .set_pte_at = xen_set_pte_at,
2442 .set_pmd = xen_set_pmd_hyper,
2443
2444 .ptep_modify_prot_start = __ptep_modify_prot_start,
2445 .ptep_modify_prot_commit = __ptep_modify_prot_commit,
2446
da5de7c2
JF
2447 .pte_val = PV_CALLEE_SAVE(xen_pte_val),
2448 .pgd_val = PV_CALLEE_SAVE(xen_pgd_val),
319f3ba5 2449
d6b186c1 2450 .make_pte = PV_CALLEE_SAVE(xen_make_pte_init),
da5de7c2 2451 .make_pgd = PV_CALLEE_SAVE(xen_make_pgd),
319f3ba5
JF
2452
2453#ifdef CONFIG_X86_PAE
2454 .set_pte_atomic = xen_set_pte_atomic,
319f3ba5
JF
2455 .pte_clear = xen_pte_clear,
2456 .pmd_clear = xen_pmd_clear,
2457#endif /* CONFIG_X86_PAE */
2458 .set_pud = xen_set_pud_hyper,
2459
da5de7c2
JF
2460 .make_pmd = PV_CALLEE_SAVE(xen_make_pmd),
2461 .pmd_val = PV_CALLEE_SAVE(xen_pmd_val),
319f3ba5 2462
98233368 2463#if CONFIG_PGTABLE_LEVELS == 4
da5de7c2
JF
2464 .pud_val = PV_CALLEE_SAVE(xen_pud_val),
2465 .make_pud = PV_CALLEE_SAVE(xen_make_pud),
319f3ba5
JF
2466 .set_pgd = xen_set_pgd_hyper,
2467
b96229b5
JF
2468 .alloc_pud = xen_alloc_pmd_init,
2469 .release_pud = xen_release_pmd_init,
98233368 2470#endif /* CONFIG_PGTABLE_LEVELS == 4 */
319f3ba5
JF
2471
2472 .activate_mm = xen_activate_mm,
2473 .dup_mmap = xen_dup_mmap,
2474 .exit_mmap = xen_exit_mmap,
2475
2476 .lazy_mode = {
2477 .enter = paravirt_enter_lazy_mmu,
b407fc57 2478 .leave = xen_leave_lazy_mmu,
511ba86e 2479 .flush = paravirt_flush_lazy_mmu,
319f3ba5
JF
2480 },
2481
2482 .set_fixmap = xen_set_fixmap,
2483};
2484
030cb6c0
TG
2485void __init xen_init_mmu_ops(void)
2486{
7737b215 2487 x86_init.paging.pagetable_init = xen_pagetable_init;
76bcceff 2488
20f36e03 2489 if (xen_feature(XENFEAT_auto_translated_physmap))
76bcceff 2490 return;
20f36e03 2491
030cb6c0 2492 pv_mmu_ops = xen_mmu_ops;
d2cb2145 2493
98511f35 2494 memset(dummy_mapping, 0xff, PAGE_SIZE);
030cb6c0 2495}
319f3ba5 2496
08bbc9da
AN
2497/* Protected by xen_reservation_lock. */
2498#define MAX_CONTIG_ORDER 9 /* 2MB */
2499static unsigned long discontig_frames[1<<MAX_CONTIG_ORDER];
2500
2501#define VOID_PTE (mfn_pte(0, __pgprot(0)))
2502static void xen_zap_pfn_range(unsigned long vaddr, unsigned int order,
2503 unsigned long *in_frames,
2504 unsigned long *out_frames)
2505{
2506 int i;
2507 struct multicall_space mcs;
2508
2509 xen_mc_batch();
2510 for (i = 0; i < (1UL<<order); i++, vaddr += PAGE_SIZE) {
2511 mcs = __xen_mc_entry(0);
2512
2513 if (in_frames)
2514 in_frames[i] = virt_to_mfn(vaddr);
2515
2516 MULTI_update_va_mapping(mcs.mc, vaddr, VOID_PTE, 0);
6eaa412f 2517 __set_phys_to_machine(virt_to_pfn(vaddr), INVALID_P2M_ENTRY);
08bbc9da
AN
2518
2519 if (out_frames)
2520 out_frames[i] = virt_to_pfn(vaddr);
2521 }
2522 xen_mc_issue(0);
2523}
2524
2525/*
2526 * Update the pfn-to-mfn mappings for a virtual address range, either to
2527 * point to an array of mfns, or contiguously from a single starting
2528 * mfn.
2529 */
2530static void xen_remap_exchanged_ptes(unsigned long vaddr, int order,
2531 unsigned long *mfns,
2532 unsigned long first_mfn)
2533{
2534 unsigned i, limit;
2535 unsigned long mfn;
2536
2537 xen_mc_batch();
2538
2539 limit = 1u << order;
2540 for (i = 0; i < limit; i++, vaddr += PAGE_SIZE) {
2541 struct multicall_space mcs;
2542 unsigned flags;
2543
2544 mcs = __xen_mc_entry(0);
2545 if (mfns)
2546 mfn = mfns[i];
2547 else
2548 mfn = first_mfn + i;
2549
2550 if (i < (limit - 1))
2551 flags = 0;
2552 else {
2553 if (order == 0)
2554 flags = UVMF_INVLPG | UVMF_ALL;
2555 else
2556 flags = UVMF_TLB_FLUSH | UVMF_ALL;
2557 }
2558
2559 MULTI_update_va_mapping(mcs.mc, vaddr,
2560 mfn_pte(mfn, PAGE_KERNEL), flags);
2561
2562 set_phys_to_machine(virt_to_pfn(vaddr), mfn);
2563 }
2564
2565 xen_mc_issue(0);
2566}
2567
2568/*
2569 * Perform the hypercall to exchange a region of our pfns to point to
2570 * memory with the required contiguous alignment. Takes the pfns as
2571 * input, and populates mfns as output.
2572 *
2573 * Returns a success code indicating whether the hypervisor was able to
2574 * satisfy the request or not.
2575 */
2576static int xen_exchange_memory(unsigned long extents_in, unsigned int order_in,
2577 unsigned long *pfns_in,
2578 unsigned long extents_out,
2579 unsigned int order_out,
2580 unsigned long *mfns_out,
2581 unsigned int address_bits)
2582{
2583 long rc;
2584 int success;
2585
2586 struct xen_memory_exchange exchange = {
2587 .in = {
2588 .nr_extents = extents_in,
2589 .extent_order = order_in,
2590 .extent_start = pfns_in,
2591 .domid = DOMID_SELF
2592 },
2593 .out = {
2594 .nr_extents = extents_out,
2595 .extent_order = order_out,
2596 .extent_start = mfns_out,
2597 .address_bits = address_bits,
2598 .domid = DOMID_SELF
2599 }
2600 };
2601
2602 BUG_ON(extents_in << order_in != extents_out << order_out);
2603
2604 rc = HYPERVISOR_memory_op(XENMEM_exchange, &exchange);
2605 success = (exchange.nr_exchanged == extents_in);
2606
2607 BUG_ON(!success && ((exchange.nr_exchanged != 0) || (rc == 0)));
2608 BUG_ON(success && (rc != 0));
2609
2610 return success;
2611}
2612
1b65c4e5 2613int xen_create_contiguous_region(phys_addr_t pstart, unsigned int order,
69908907
SS
2614 unsigned int address_bits,
2615 dma_addr_t *dma_handle)
08bbc9da
AN
2616{
2617 unsigned long *in_frames = discontig_frames, out_frame;
2618 unsigned long flags;
2619 int success;
1b65c4e5 2620 unsigned long vstart = (unsigned long)phys_to_virt(pstart);
08bbc9da
AN
2621
2622 /*
2623 * Currently an auto-translated guest will not perform I/O, nor will
2624 * it require PAE page directories below 4GB. Therefore any calls to
2625 * this function are redundant and can be ignored.
2626 */
2627
2628 if (xen_feature(XENFEAT_auto_translated_physmap))
2629 return 0;
2630
2631 if (unlikely(order > MAX_CONTIG_ORDER))
2632 return -ENOMEM;
2633
2634 memset((void *) vstart, 0, PAGE_SIZE << order);
2635
08bbc9da
AN
2636 spin_lock_irqsave(&xen_reservation_lock, flags);
2637
2638 /* 1. Zap current PTEs, remembering MFNs. */
2639 xen_zap_pfn_range(vstart, order, in_frames, NULL);
2640
2641 /* 2. Get a new contiguous memory extent. */
2642 out_frame = virt_to_pfn(vstart);
2643 success = xen_exchange_memory(1UL << order, 0, in_frames,
2644 1, order, &out_frame,
2645 address_bits);
2646
2647 /* 3. Map the new extent in place of old pages. */
2648 if (success)
2649 xen_remap_exchanged_ptes(vstart, order, NULL, out_frame);
2650 else
2651 xen_remap_exchanged_ptes(vstart, order, in_frames, 0);
2652
2653 spin_unlock_irqrestore(&xen_reservation_lock, flags);
2654
69908907 2655 *dma_handle = virt_to_machine(vstart).maddr;
08bbc9da
AN
2656 return success ? 0 : -ENOMEM;
2657}
2658EXPORT_SYMBOL_GPL(xen_create_contiguous_region);
2659
1b65c4e5 2660void xen_destroy_contiguous_region(phys_addr_t pstart, unsigned int order)
08bbc9da
AN
2661{
2662 unsigned long *out_frames = discontig_frames, in_frame;
2663 unsigned long flags;
2664 int success;
1b65c4e5 2665 unsigned long vstart;
08bbc9da
AN
2666
2667 if (xen_feature(XENFEAT_auto_translated_physmap))
2668 return;
2669
2670 if (unlikely(order > MAX_CONTIG_ORDER))
2671 return;
2672
1b65c4e5 2673 vstart = (unsigned long)phys_to_virt(pstart);
08bbc9da
AN
2674 memset((void *) vstart, 0, PAGE_SIZE << order);
2675
08bbc9da
AN
2676 spin_lock_irqsave(&xen_reservation_lock, flags);
2677
2678 /* 1. Find start MFN of contiguous extent. */
2679 in_frame = virt_to_mfn(vstart);
2680
2681 /* 2. Zap current PTEs. */
2682 xen_zap_pfn_range(vstart, order, NULL, out_frames);
2683
2684 /* 3. Do the exchange for non-contiguous MFNs. */
2685 success = xen_exchange_memory(1, order, &in_frame, 1UL << order,
2686 0, out_frames, 0);
2687
2688 /* 4. Map new pages in place of old pages. */
2689 if (success)
2690 xen_remap_exchanged_ptes(vstart, order, out_frames, 0);
2691 else
2692 xen_remap_exchanged_ptes(vstart, order, NULL, in_frame);
2693
2694 spin_unlock_irqrestore(&xen_reservation_lock, flags);
030cb6c0 2695}
08bbc9da 2696EXPORT_SYMBOL_GPL(xen_destroy_contiguous_region);
319f3ba5 2697
ca65f9fc 2698#ifdef CONFIG_XEN_PVHVM
34b6f01a
OH
2699#ifdef CONFIG_PROC_VMCORE
2700/*
2701 * This function is used in two contexts:
2702 * - the kdump kernel has to check whether a pfn of the crashed kernel
2703 * was a ballooned page. vmcore is using this function to decide
2704 * whether to access a pfn of the crashed kernel.
2705 * - the kexec kernel has to check whether a pfn was ballooned by the
2706 * previous kernel. If the pfn is ballooned, handle it properly.
2707 * Returns 0 if the pfn is not backed by a RAM page, the caller may
2708 * handle the pfn special in this case.
2709 */
2710static int xen_oldmem_pfn_is_ram(unsigned long pfn)
2711{
2712 struct xen_hvm_get_mem_type a = {
2713 .domid = DOMID_SELF,
2714 .pfn = pfn,
2715 };
2716 int ram;
2717
2718 if (HYPERVISOR_hvm_op(HVMOP_get_mem_type, &a))
2719 return -ENXIO;
2720
2721 switch (a.mem_type) {
2722 case HVMMEM_mmio_dm:
2723 ram = 0;
2724 break;
2725 case HVMMEM_ram_rw:
2726 case HVMMEM_ram_ro:
2727 default:
2728 ram = 1;
2729 break;
2730 }
2731
2732 return ram;
2733}
2734#endif
2735
59151001
SS
2736static void xen_hvm_exit_mmap(struct mm_struct *mm)
2737{
2738 struct xen_hvm_pagetable_dying a;
2739 int rc;
2740
2741 a.domid = DOMID_SELF;
2742 a.gpa = __pa(mm->pgd);
2743 rc = HYPERVISOR_hvm_op(HVMOP_pagetable_dying, &a);
2744 WARN_ON_ONCE(rc < 0);
2745}
2746
2747static int is_pagetable_dying_supported(void)
2748{
2749 struct xen_hvm_pagetable_dying a;
2750 int rc = 0;
2751
2752 a.domid = DOMID_SELF;
2753 a.gpa = 0x00;
2754 rc = HYPERVISOR_hvm_op(HVMOP_pagetable_dying, &a);
2755 if (rc < 0) {
2756 printk(KERN_DEBUG "HVMOP_pagetable_dying not supported\n");
2757 return 0;
2758 }
2759 return 1;
2760}
2761
2762void __init xen_hvm_init_mmu_ops(void)
2763{
2764 if (is_pagetable_dying_supported())
2765 pv_mmu_ops.exit_mmap = xen_hvm_exit_mmap;
34b6f01a
OH
2766#ifdef CONFIG_PROC_VMCORE
2767 register_oldmem_pfn_is_ram(&xen_oldmem_pfn_is_ram);
2768#endif
59151001 2769}
ca65f9fc 2770#endif
59151001 2771
de1ef206
IC
2772#define REMAP_BATCH_SIZE 16
2773
2774struct remap_data {
4e8c0c8c
DV
2775 xen_pfn_t *mfn;
2776 bool contiguous;
de1ef206
IC
2777 pgprot_t prot;
2778 struct mmu_update *mmu_update;
2779};
2780
2781static int remap_area_mfn_pte_fn(pte_t *ptep, pgtable_t token,
2782 unsigned long addr, void *data)
2783{
2784 struct remap_data *rmd = data;
4e8c0c8c
DV
2785 pte_t pte = pte_mkspecial(mfn_pte(*rmd->mfn, rmd->prot));
2786
6a6256f9 2787 /* If we have a contiguous range, just update the mfn itself,
4e8c0c8c
DV
2788 else update pointer to be "next mfn". */
2789 if (rmd->contiguous)
2790 (*rmd->mfn)++;
2791 else
2792 rmd->mfn++;
de1ef206 2793
d5108316 2794 rmd->mmu_update->ptr = virt_to_machine(ptep).maddr;
de1ef206
IC
2795 rmd->mmu_update->val = pte_val_ma(pte);
2796 rmd->mmu_update++;
2797
2798 return 0;
2799}
2800
a13d7201 2801static int do_remap_gfn(struct vm_area_struct *vma,
4e8c0c8c 2802 unsigned long addr,
a13d7201 2803 xen_pfn_t *gfn, int nr,
4e8c0c8c
DV
2804 int *err_ptr, pgprot_t prot,
2805 unsigned domid,
2806 struct page **pages)
de1ef206 2807{
4e8c0c8c 2808 int err = 0;
de1ef206
IC
2809 struct remap_data rmd;
2810 struct mmu_update mmu_update[REMAP_BATCH_SIZE];
de1ef206 2811 unsigned long range;
4e8c0c8c 2812 int mapped = 0;
de1ef206 2813
314e51b9 2814 BUG_ON(!((vma->vm_flags & (VM_PFNMAP | VM_IO)) == (VM_PFNMAP | VM_IO)));
de1ef206 2815
77945ca7
MR
2816 if (xen_feature(XENFEAT_auto_translated_physmap)) {
2817#ifdef CONFIG_XEN_PVH
2818 /* We need to update the local page tables and the xen HAP */
a13d7201 2819 return xen_xlate_remap_gfn_array(vma, addr, gfn, nr, err_ptr,
4e8c0c8c 2820 prot, domid, pages);
77945ca7
MR
2821#else
2822 return -EINVAL;
2823#endif
2824 }
2825
a13d7201 2826 rmd.mfn = gfn;
de1ef206 2827 rmd.prot = prot;
6a6256f9 2828 /* We use the err_ptr to indicate if there we are doing a contiguous
4e8c0c8c
DV
2829 * mapping or a discontigious mapping. */
2830 rmd.contiguous = !err_ptr;
de1ef206
IC
2831
2832 while (nr) {
4e8c0c8c
DV
2833 int index = 0;
2834 int done = 0;
2835 int batch = min(REMAP_BATCH_SIZE, nr);
2836 int batch_left = batch;
de1ef206
IC
2837 range = (unsigned long)batch << PAGE_SHIFT;
2838
2839 rmd.mmu_update = mmu_update;
2840 err = apply_to_page_range(vma->vm_mm, addr, range,
2841 remap_area_mfn_pte_fn, &rmd);
2842 if (err)
2843 goto out;
2844
4e8c0c8c
DV
2845 /* We record the error for each page that gives an error, but
2846 * continue mapping until the whole set is done */
2847 do {
2848 int i;
2849
2850 err = HYPERVISOR_mmu_update(&mmu_update[index],
2851 batch_left, &done, domid);
2852
2853 /*
a13d7201
JG
2854 * @err_ptr may be the same buffer as @gfn, so
2855 * only clear it after each chunk of @gfn is
4e8c0c8c
DV
2856 * used.
2857 */
2858 if (err_ptr) {
2859 for (i = index; i < index + done; i++)
2860 err_ptr[i] = 0;
2861 }
2862 if (err < 0) {
2863 if (!err_ptr)
2864 goto out;
2865 err_ptr[i] = err;
2866 done++; /* Skip failed frame. */
2867 } else
2868 mapped += done;
2869 batch_left -= done;
2870 index += done;
2871 } while (batch_left);
de1ef206
IC
2872
2873 nr -= batch;
2874 addr += range;
4e8c0c8c
DV
2875 if (err_ptr)
2876 err_ptr += batch;
914beb9f 2877 cond_resched();
de1ef206 2878 }
de1ef206
IC
2879out:
2880
95a7d768 2881 xen_flush_tlb_all();
de1ef206 2882
4e8c0c8c
DV
2883 return err < 0 ? err : mapped;
2884}
2885
a13d7201 2886int xen_remap_domain_gfn_range(struct vm_area_struct *vma,
4e8c0c8c 2887 unsigned long addr,
a13d7201 2888 xen_pfn_t gfn, int nr,
4e8c0c8c
DV
2889 pgprot_t prot, unsigned domid,
2890 struct page **pages)
2891{
a13d7201 2892 return do_remap_gfn(vma, addr, &gfn, nr, NULL, prot, domid, pages);
de1ef206 2893}
a13d7201 2894EXPORT_SYMBOL_GPL(xen_remap_domain_gfn_range);
9a032e39 2895
a13d7201 2896int xen_remap_domain_gfn_array(struct vm_area_struct *vma,
4e8c0c8c 2897 unsigned long addr,
a13d7201 2898 xen_pfn_t *gfn, int nr,
4e8c0c8c
DV
2899 int *err_ptr, pgprot_t prot,
2900 unsigned domid, struct page **pages)
2901{
2902 /* We BUG_ON because it's a programmer error to pass a NULL err_ptr,
2903 * and the consequences later is quite hard to detect what the actual
2904 * cause of "wrong memory was mapped in".
2905 */
2906 BUG_ON(err_ptr == NULL);
a13d7201 2907 return do_remap_gfn(vma, addr, gfn, nr, err_ptr, prot, domid, pages);
4e8c0c8c 2908}
a13d7201 2909EXPORT_SYMBOL_GPL(xen_remap_domain_gfn_array);
4e8c0c8c
DV
2910
2911
9a032e39 2912/* Returns: 0 success */
a13d7201 2913int xen_unmap_domain_gfn_range(struct vm_area_struct *vma,
9a032e39
IC
2914 int numpgs, struct page **pages)
2915{
2916 if (!pages || !xen_feature(XENFEAT_auto_translated_physmap))
2917 return 0;
2918
77945ca7 2919#ifdef CONFIG_XEN_PVH
628c28ee 2920 return xen_xlate_unmap_gfn_range(vma, numpgs, pages);
77945ca7 2921#else
9a032e39 2922 return -EINVAL;
77945ca7 2923#endif
9a032e39 2924}
a13d7201 2925EXPORT_SYMBOL_GPL(xen_unmap_domain_gfn_range);