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1 | /* SPDX-License-Identifier: BSD-3-Clause |
2 | * Copyright(c) 2010-2014 Intel Corporation | |
7c673cae FG |
3 | */ |
4 | ||
5 | #ifndef _IXGBE_BYPASS_DEFINES_H_ | |
6 | #define _IXGBE_BYPASS_DEFINES_H_ | |
7 | ||
9f95a23c | 8 | #ifdef RTE_LIBRTE_IXGBE_BYPASS |
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9 | |
10 | #define msleep(x) rte_delay_us(x*1000) | |
11 | #define usleep_range(min, max) rte_delay_us(min) | |
12 | ||
13 | #define BYPASS_PAGE_CTL0 0x00000000 | |
14 | #define BYPASS_PAGE_CTL1 0x40000000 | |
15 | #define BYPASS_PAGE_CTL2 0x80000000 | |
16 | #define BYPASS_PAGE_M 0xc0000000 | |
17 | #define BYPASS_WE 0x20000000 | |
18 | ||
19 | #define BYPASS_AUTO 0x0 | |
20 | #define BYPASS_NOP 0x0 | |
21 | #define BYPASS_NORM 0x1 | |
22 | #define BYPASS_BYPASS 0x2 | |
23 | #define BYPASS_ISOLATE 0x3 | |
24 | ||
25 | #define BYPASS_EVENT_MAIN_ON 0x1 | |
26 | #define BYPASS_EVENT_AUX_ON 0x2 | |
27 | #define BYPASS_EVENT_MAIN_OFF 0x3 | |
28 | #define BYPASS_EVENT_AUX_OFF 0x4 | |
29 | #define BYPASS_EVENT_WDT_TO 0x5 | |
30 | #define BYPASS_EVENT_USR 0x6 | |
31 | ||
32 | #define BYPASS_MODE_OFF_M 0x00000003 | |
33 | #define BYPASS_STATUS_OFF_M 0x0000000c | |
34 | #define BYPASS_AUX_ON_M 0x00000030 | |
35 | #define BYPASS_MAIN_ON_M 0x000000c0 | |
36 | #define BYPASS_MAIN_OFF_M 0x00000300 | |
37 | #define BYPASS_AUX_OFF_M 0x00000c00 | |
38 | #define BYPASS_WDTIMEOUT_M 0x00003000 | |
39 | #define BYPASS_WDT_ENABLE_M 0x00004000 | |
40 | #define BYPASS_WDT_VALUE_M 0x00070000 | |
41 | ||
42 | #define BYPASS_MODE_OFF_SHIFT 0 | |
43 | #define BYPASS_STATUS_OFF_SHIFT 2 | |
44 | #define BYPASS_AUX_ON_SHIFT 4 | |
45 | #define BYPASS_MAIN_ON_SHIFT 6 | |
46 | #define BYPASS_MAIN_OFF_SHIFT 8 | |
47 | #define BYPASS_AUX_OFF_SHIFT 10 | |
48 | #define BYPASS_WDTIMEOUT_SHIFT 12 | |
49 | #define BYPASS_WDT_ENABLE_SHIFT 14 | |
50 | #define BYPASS_WDT_TIME_SHIFT 16 | |
51 | ||
52 | #define BYPASS_WDT_1 0x0 | |
53 | #define BYPASS_WDT_1_5 0x1 | |
54 | #define BYPASS_WDT_2 0x2 | |
55 | #define BYPASS_WDT_3 0x3 | |
56 | #define BYPASS_WDT_4 0x4 | |
57 | #define BYPASS_WDT_8 0x5 | |
58 | #define BYPASS_WDT_16 0x6 | |
59 | #define BYPASS_WDT_32 0x7 | |
60 | #define BYPASS_WDT_OFF 0xffff | |
61 | ||
62 | #define BYPASS_WDT_MASK 0x7 | |
63 | ||
64 | #define BYPASS_CTL1_TIME_M 0x01ffffff | |
65 | #define BYPASS_CTL1_VALID_M 0x02000000 | |
66 | #define BYPASS_CTL1_OFFTRST_M 0x04000000 | |
67 | #define BYPASS_CTL1_WDT_PET_M 0x08000000 | |
68 | ||
69 | #define BYPASS_CTL1_VALID 0x02000000 | |
70 | #define BYPASS_CTL1_OFFTRST 0x04000000 | |
71 | #define BYPASS_CTL1_WDT_PET 0x08000000 | |
72 | ||
73 | #define BYPASS_CTL2_DATA_M 0x000000ff | |
74 | #define BYPASS_CTL2_OFFSET_M 0x0000ff00 | |
75 | #define BYPASS_CTL2_RW_M 0x00010000 | |
76 | #define BYPASS_CTL2_HEAD_M 0x0ff00000 | |
77 | ||
78 | #define BYPASS_CTL2_OFFSET_SHIFT 8 | |
79 | #define BYPASS_CTL2_HEAD_SHIFT 20 | |
80 | ||
81 | #define BYPASS_CTL2_RW 0x00010000 | |
82 | ||
83 | enum ixgbe_state_t { | |
84 | __IXGBE_TESTING, | |
85 | __IXGBE_RESETTING, | |
86 | __IXGBE_DOWN, | |
87 | __IXGBE_SERVICE_SCHED, | |
88 | __IXGBE_IN_SFP_INIT, | |
89 | __IXGBE_IN_BYPASS_LOW, | |
90 | __IXGBE_IN_BYPASS_HIGH, | |
91 | __IXGBE_IN_BYPASS_LOG, | |
92 | }; | |
93 | ||
94 | #define BYPASS_MAX_LOGS 43 | |
95 | #define BYPASS_LOG_SIZE 5 | |
96 | #define BYPASS_LOG_LINE_SIZE 37 | |
97 | ||
98 | #define BYPASS_EEPROM_VER_ADD 0x02 | |
99 | ||
100 | #define BYPASS_LOG_TIME_M 0x01ffffff | |
101 | #define BYPASS_LOG_TIME_VALID_M 0x02000000 | |
102 | #define BYPASS_LOG_HEAD_M 0x04000000 | |
103 | #define BYPASS_LOG_CLEAR_M 0x08000000 | |
104 | #define BYPASS_LOG_EVENT_M 0xf0000000 | |
105 | #define BYPASS_LOG_ACTION_M 0x03 | |
106 | ||
107 | #define BYPASS_LOG_EVENT_SHIFT 28 | |
108 | #define BYPASS_LOG_CLEAR_SHIFT 24 /* bit offset */ | |
109 | #define IXGBE_DEV_TO_ADPATER(dev) \ | |
110 | ((struct ixgbe_adapter *)(dev->data->dev_private)) | |
111 | ||
112 | /* extractions from ixgbe_phy.h */ | |
113 | #define IXGBE_I2C_EEPROM_DEV_ADDR2 0xA2 | |
114 | ||
115 | #define IXGBE_SFF_SFF_8472_SWAP 0x5C | |
116 | #define IXGBE_SFF_SFF_8472_COMP 0x5E | |
117 | #define IXGBE_SFF_SFF_8472_OSCB 0x6E | |
118 | #define IXGBE_SFF_SFF_8472_ESCB 0x76 | |
119 | ||
120 | #define IXGBE_SFF_SOFT_RS_SELECT_MASK 0x8 | |
121 | #define IXGBE_SFF_SOFT_RS_SELECT_10G 0x8 | |
122 | #define IXGBE_SFF_SOFT_RS_SELECT_1G 0x0 | |
123 | ||
124 | /* extractions from ixgbe_type.h */ | |
125 | #define IXGBE_DEV_ID_82599_BYPASS 0x155D | |
126 | ||
127 | #define IXGBE_BYPASS_FW_WRITE_FAILURE -35 | |
128 | ||
9f95a23c | 129 | #endif /* RTE_LIBRTE_IXGBE_BYPASS */ |
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130 | |
131 | #endif /* _IXGBE_BYPASS_DEFINES_H_ */ |