projects / ceph.git / blame
| Commit | Line | Data |
|---|---|---|
| 11fdf7f2 TL |
1 | /* SPDX-License-Identifier: BSD-3-Clause |
| 2 | * | |
| 3 | * Copyright (c) 2008-2016 Freescale Semiconductor, Inc. | |
| 4 | * Copyright 2017 NXP | |
| 5 | * | |
| 6 | */ | |
| 7 | ||
| 8 | #ifndef HEADER_COMPAT_H | |
| 9 | #define HEADER_COMPAT_H | |
| 10 | ||
| 11 | #ifndef _GNU_SOURCE | |
| 12 | #define _GNU_SOURCE | |
| 13 | #endif | |
| 9f95a23c | 14 | #include <stdio.h> |
| 11fdf7f2 TL |
15 | #include <stdint.h> |
| 16 | #include <stdlib.h> | |
| 17 | #include <errno.h> | |
| 18 | #include <string.h> | |
| 19 | #include <malloc.h> | |
| 20 | #include <unistd.h> | |
| 11fdf7f2 TL |
21 | #include <linux/types.h> |
| 22 | #include <rte_atomic.h> | |
| 23 | ||
| 24 | /* The following definitions are primarily to allow the single-source driver | |
| 25 | * interfaces to be included by arbitrary program code. Ie. for interfaces that | |
| 26 | * are also available in kernel-space, these definitions provide compatibility | |
| 27 | * with certain attributes and types used in those interfaces. | |
| 28 | */ | |
| 29 | ||
| 30 | /* Required compiler attributes */ | |
| 31 | #define likely(x) __builtin_expect(!!(x), 1) | |
| 32 | #define unlikely(x) __builtin_expect(!!(x), 0) | |
| 33 | ||
| 34 | /* Required types */ | |
| 35 | typedef uint64_t dma_addr_t; | |
| 36 | ||
| 37 | /* Debugging */ | |
| 38 | #define prflush(fmt, args...) \ | |
| 39 | do { \ | |
| 40 | printf(fmt, ##args); \ | |
| 41 | fflush(stdout); \ | |
| 42 | } while (0) | |
| 43 | #define pr_crit(fmt, args...) prflush("CRIT:" fmt, ##args) | |
| 44 | #define pr_err(fmt, args...) prflush("ERR:" fmt, ##args) | |
| 45 | #define pr_warn(fmt, args...) prflush("WARN:" fmt, ##args) | |
| 46 | #define pr_info(fmt, args...) prflush(fmt, ##args) | |
| 47 | ||
| 48 | #ifdef RTE_LIBRTE_DPAA2_DEBUG_BUS | |
| 49 | ||
| 50 | /* Trace the 3 different classes of read/write access to QBMan. #undef as | |
| 51 | * required. | |
| 52 | */ | |
| 53 | #define QBMAN_CCSR_TRACE | |
| 54 | #define QBMAN_CINH_TRACE | |
| 55 | #define QBMAN_CENA_TRACE | |
| 56 | ||
| 57 | #define QBMAN_CHECKING | |
| 58 | ||
| 59 | #ifdef pr_debug | |
| 60 | #undef pr_debug | |
| 61 | #endif | |
| 62 | #define pr_debug(fmt, args...) printf(fmt, ##args) | |
| 63 | #define QBMAN_BUG_ON(c) \ | |
| 64 | do { \ | |
| 65 | static int warned_##__LINE__; \ | |
| 66 | if ((c) && !warned_##__LINE__) { \ | |
| 67 | pr_warn("(%s:%d)\n", __FILE__, __LINE__); \ | |
| 68 | warned_##__LINE__ = 1; \ | |
| 69 | } \ | |
| 70 | } while (0) | |
| 71 | #else | |
| 72 | #define QBMAN_BUG_ON(c) {} | |
| 73 | #define pr_debug(fmt, args...) {} | |
| 74 | #endif | |
| 75 | ||
| 76 | /* Other miscellaneous interfaces our APIs depend on; */ | |
| 77 | ||
| 78 | #define lower_32_bits(x) ((uint32_t)(x)) | |
| 79 | #define upper_32_bits(x) ((uint32_t)(((x) >> 16) >> 16)) | |
| 80 | ||
| 11fdf7f2 TL |
81 | #define __iomem |
| 82 | ||
| 83 | #define __raw_readb(p) (*(const volatile unsigned char *)(p)) | |
| 84 | #define __raw_readl(p) (*(const volatile unsigned int *)(p)) | |
| 85 | #define __raw_writel(v, p) {*(volatile unsigned int *)(p) = (v); } | |
| 86 | ||
| 9f95a23c TL |
87 | #define dma_wmb() rte_smp_mb() |
| 88 | ||
| 11fdf7f2 TL |
89 | #define atomic_t rte_atomic32_t |
| 90 | #define atomic_read(v) rte_atomic32_read(v) | |
| 91 | #define atomic_set(v, i) rte_atomic32_set(v, i) | |
| 92 | ||
| 93 | #define atomic_inc(v) rte_atomic32_add(v, 1) | |
| 94 | #define atomic_dec(v) rte_atomic32_sub(v, 1) | |
| 95 | ||
| 96 | #define atomic_inc_and_test(v) rte_atomic32_inc_and_test(v) | |
| 97 | #define atomic_dec_and_test(v) rte_atomic32_dec_and_test(v) | |
| 98 | ||
| 99 | #define atomic_inc_return(v) rte_atomic32_add_return(v, 1) | |
| 100 | #define atomic_dec_return(v) rte_atomic32_sub_return(v, 1) | |
| 101 | #define atomic_sub_and_test(i, v) (rte_atomic32_sub_return(v, i) == 0) | |
| 102 | ||
| 103 | #endif /* HEADER_COMPAT_H */ |