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89a955e8 AM |
1 | /* |
2 | * Source file for nanoMIPS disassembler component of QEMU | |
3 | * | |
8bae1509 | 4 | * Copyright (C) 2018 Wave Computing, Inc. |
89a955e8 | 5 | * Copyright (C) 2018 Matthew Fortune <matthew.fortune@mips.com> |
8bae1509 | 6 | * Copyright (C) 2018 Aleksandar Markovic <amarkovic@wavecomp.com> |
89a955e8 AM |
7 | * |
8 | * This program is free software: you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
8bae1509 | 10 | * the Free Software Foundation, either version 2 of the License, or |
89a955e8 AM |
11 | * (at your option) any later version. |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program. If not, see <https://www.gnu.org/licenses/>. | |
8bae1509 | 20 | * |
89a955e8 AM |
21 | */ |
22 | ||
779bdf41 AM |
23 | /* |
24 | * Documentation used while implementing this component: | |
25 | * | |
26 | * [1] "MIPS® Architecture Base: nanoMIPS32(tm) Instruction Set Technical | |
27 | * Reference Manual", Revision 01.01, April 27, 2018 | |
28 | */ | |
29 | ||
89a955e8 | 30 | #include "qemu/osdep.h" |
3979fca4 | 31 | #include "disas/dis-asm.h" |
89a955e8 | 32 | |
7def8a4b | 33 | #include <string.h> |
89a955e8 | 34 | #include <stdexcept> |
89a955e8 AM |
35 | #include <stdio.h> |
36 | #include <stdarg.h> | |
37 | ||
f1cb3bdb ML |
38 | typedef int64_t int64; |
39 | typedef uint64_t uint64; | |
40 | typedef uint32_t uint32; | |
41 | typedef uint16_t uint16; | |
42 | typedef uint64_t img_address; | |
43 | ||
44 | enum TABLE_ENTRY_TYPE { | |
45 | instruction, | |
46 | call_instruction, | |
47 | branch_instruction, | |
48 | return_instruction, | |
49 | reserved_block, | |
50 | pool, | |
51 | }; | |
52 | ||
53 | enum TABLE_ATTRIBUTE_TYPE { | |
54 | MIPS64_ = 0x00000001, | |
55 | XNP_ = 0x00000002, | |
56 | XMMS_ = 0x00000004, | |
57 | EVA_ = 0x00000008, | |
58 | DSP_ = 0x00000010, | |
59 | MT_ = 0x00000020, | |
60 | EJTAG_ = 0x00000040, | |
61 | TLBINV_ = 0x00000080, | |
62 | CP0_ = 0x00000100, | |
63 | CP1_ = 0x00000200, | |
64 | CP2_ = 0x00000400, | |
65 | UDI_ = 0x00000800, | |
66 | MCU_ = 0x00001000, | |
67 | VZ_ = 0x00002000, | |
68 | TLB_ = 0x00004000, | |
69 | MVH_ = 0x00008000, | |
70 | ALL_ATTRIBUTES = 0xffffffffull, | |
71 | }; | |
72 | ||
73 | typedef struct Dis_info { | |
74 | img_address m_pc; | |
3f2aec07 ML |
75 | fprintf_function fprintf_func; |
76 | FILE *stream; | |
77 | sigjmp_buf buf; | |
f1cb3bdb ML |
78 | } Dis_info; |
79 | ||
80 | typedef bool (*conditional_function)(uint64 instruction); | |
7def8a4b | 81 | typedef char * (*disassembly_function)(uint64 instruction, |
f1cb3bdb ML |
82 | Dis_info *info); |
83 | ||
84 | typedef struct Pool { | |
85 | TABLE_ENTRY_TYPE type; | |
86 | const struct Pool *next_table; | |
87 | int next_table_size; | |
88 | int instructions_size; | |
89 | uint64 mask; | |
90 | uint64 value; | |
91 | disassembly_function disassembly; | |
92 | conditional_function condition; | |
93 | uint64 attributes; | |
94 | } Pool; | |
89a955e8 AM |
95 | |
96 | #define IMGASSERTONCE(test) | |
97 | ||
98 | ||
7def8a4b | 99 | static char *img_format(const char *format, ...) |
89a955e8 | 100 | { |
7def8a4b | 101 | char *buffer; |
c5231692 ML |
102 | va_list args; |
103 | va_start(args, format); | |
7def8a4b | 104 | buffer = g_strdup_vprintf(format, args); |
c5231692 ML |
105 | va_end(args); |
106 | return buffer; | |
107 | } | |
89a955e8 | 108 | |
89a955e8 | 109 | |
7def8a4b | 110 | static char *to_string(img_address a) |
c5231692 | 111 | { |
7def8a4b | 112 | return g_strdup_printf("0x%" PRIx64, a); |
89a955e8 AM |
113 | } |
114 | ||
115 | ||
2dc0c175 | 116 | static uint64 extract_bits(uint64 data, uint32 bit_offset, uint32 bit_size) |
89a955e8 AM |
117 | { |
118 | return (data << (64 - (bit_size + bit_offset))) >> (64 - bit_size); | |
119 | } | |
120 | ||
121 | ||
2dc0c175 | 122 | static int64 sign_extend(int64 data, int msb) |
89a955e8 AM |
123 | { |
124 | uint64 shift = 63 - msb; | |
125 | return (data << shift) >> shift; | |
126 | } | |
127 | ||
128 | ||
2dc0c175 | 129 | static uint64 renumber_registers(uint64 index, uint64 *register_list, |
3f2aec07 | 130 | size_t register_list_size, Dis_info *info) |
89a955e8 AM |
131 | { |
132 | if (index < register_list_size) { | |
133 | return register_list[index]; | |
134 | } | |
135 | ||
c5231692 | 136 | throw std::runtime_error(img_format( |
8c33ea59 SW |
137 | "Invalid register mapping index %" PRIu64 |
138 | ", size of list = %zu", | |
89a955e8 AM |
139 | index, register_list_size)); |
140 | } | |
141 | ||
142 | ||
eabf76a0 | 143 | /* |
2dc0c175 | 144 | * decode_gpr_gpr4() - decoder for 'gpr4' gpr encoding type |
eabf76a0 AM |
145 | * |
146 | * Map a 4-bit code to the 5-bit register space according to this pattern: | |
147 | * | |
148 | * 1 0 | |
149 | * 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 | |
150 | * | | | | | | | | | | | | | | | | | |
151 | * | | | | | | | | | | | | | | | | | |
152 | * | | | | | | | | | | | └---------------┐ | |
153 | * | | | | | | | | | | └---------------┐ | | |
154 | * | | | | | | | | | └---------------┐ | | | |
155 | * | | | | | | | | └---------------┐ | | | | |
156 | * | | | | | | | | | | | | | | | | | |
157 | * | | | | | | | | | | | | | | | | | |
158 | * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 | |
159 | * 3 2 1 0 | |
160 | * | |
161 | * Used in handling following instructions: | |
162 | * | |
163 | * - ADDU[4X4] | |
164 | * - LW[4X4] | |
165 | * - MOVEP[REV] | |
166 | * - MUL[4X4] | |
167 | * - SW[4X4] | |
168 | */ | |
3f2aec07 | 169 | static uint64 decode_gpr_gpr4(uint64 d, Dis_info *info) |
eabf76a0 AM |
170 | { |
171 | static uint64 register_list[] = { 8, 9, 10, 11, 4, 5, 6, 7, | |
172 | 16, 17, 18, 19, 20, 21, 22, 23 }; | |
173 | return renumber_registers(d, register_list, | |
3f2aec07 | 174 | sizeof(register_list) / sizeof(register_list[0]), info); |
eabf76a0 AM |
175 | } |
176 | ||
177 | ||
178 | /* | |
2dc0c175 | 179 | * decode_gpr_gpr4_zero() - decoder for 'gpr4.zero' gpr encoding type |
eabf76a0 AM |
180 | * |
181 | * Map a 4-bit code to the 5-bit register space according to this pattern: | |
182 | * | |
183 | * 1 0 | |
184 | * 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 | |
185 | * | | | | | | | | | | | | | | | | | |
186 | * | | | | | | | | | | | | └---------------------┐ | |
187 | * | | | | | | | | | | | └---------------┐ | | |
188 | * | | | | | | | | | | └---------------┐ | | | |
189 | * | | | | | | | | | └---------------┐ | | | | |
190 | * | | | | | | | | └---------------┐ | | | | | |
191 | * | | | | | | | | | | | | | | | | | |
192 | * | | | | | | | | | | | | | | | | | |
193 | * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 | |
194 | * 3 2 1 0 | |
195 | * | |
196 | * This pattern is the same one used for 'gpr4' gpr encoding type, except for | |
197 | * the input value 3, that is mapped to the output value 0 instead of 11. | |
198 | * | |
199 | * Used in handling following instructions: | |
200 | * | |
201 | * - MOVE.BALC | |
202 | * - MOVEP | |
203 | * - SW[4X4] | |
204 | */ | |
3f2aec07 | 205 | static uint64 decode_gpr_gpr4_zero(uint64 d, Dis_info *info) |
eabf76a0 AM |
206 | { |
207 | static uint64 register_list[] = { 8, 9, 10, 0, 4, 5, 6, 7, | |
208 | 16, 17, 18, 19, 20, 21, 22, 23 }; | |
209 | return renumber_registers(d, register_list, | |
3f2aec07 | 210 | sizeof(register_list) / sizeof(register_list[0]), info); |
eabf76a0 AM |
211 | } |
212 | ||
213 | ||
89a955e8 | 214 | /* |
2dc0c175 | 215 | * decode_gpr_gpr3() - decoder for 'gpr3' gpr encoding type |
01fc2557 AM |
216 | * |
217 | * Map a 3-bit code to the 5-bit register space according to this pattern: | |
218 | * | |
219 | * 7 6 5 4 3 2 1 0 | |
220 | * | | | | | | | | | |
221 | * | | | | | | | | | |
222 | * | | | └-----------------------┐ | |
223 | * | | └-----------------------┐ | | |
224 | * | └-----------------------┐ | | | |
225 | * └-----------------------┐ | | | | |
226 | * | | | | | | | | | |
227 | * ┌-------┘ | | | | | | | | |
228 | * | ┌-------┘ | | | | | | | |
229 | * | | ┌-------┘ | | | | | | |
230 | * | | | ┌-------┘ | | | | | |
231 | * | | | | | | | | | |
232 | * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 | |
233 | * 3 2 1 0 | |
234 | * | |
235 | * Used in handling following instructions: | |
236 | * | |
237 | * - ADDIU[R1.SP] | |
238 | * - ADDIU[R2] | |
239 | * - ADDU[16] | |
240 | * - AND[16] | |
241 | * - ANDI[16] | |
242 | * - BEQC[16] | |
243 | * - BEQZC[16] | |
244 | * - BNEC[16] | |
245 | * - BNEZC[16] | |
246 | * - LB[16] | |
247 | * - LBU[16] | |
248 | * - LH[16] | |
249 | * - LHU[16] | |
250 | * - LI[16] | |
251 | * - LW[16] | |
252 | * - LW[GP16] | |
253 | * - LWXS[16] | |
254 | * - NOT[16] | |
255 | * - OR[16] | |
256 | * - SB[16] | |
257 | * - SH[16] | |
258 | * - SLL[16] | |
259 | * - SRL[16] | |
260 | * - SUBU[16] | |
261 | * - SW[16] | |
262 | * - XOR[16] | |
89a955e8 | 263 | */ |
3f2aec07 | 264 | static uint64 decode_gpr_gpr3(uint64 d, Dis_info *info) |
89a955e8 AM |
265 | { |
266 | static uint64 register_list[] = { 16, 17, 18, 19, 4, 5, 6, 7 }; | |
267 | return renumber_registers(d, register_list, | |
3f2aec07 | 268 | sizeof(register_list) / sizeof(register_list[0]), info); |
89a955e8 AM |
269 | } |
270 | ||
271 | ||
6ab8abfc | 272 | /* |
2dc0c175 | 273 | * decode_gpr_gpr3_src_store() - decoder for 'gpr3.src.store' gpr encoding |
6ab8abfc AM |
274 | * type |
275 | * | |
276 | * Map a 3-bit code to the 5-bit register space according to this pattern: | |
277 | * | |
278 | * 7 6 5 4 3 2 1 0 | |
279 | * | | | | | | | | | |
280 | * | | | | | | | └-----------------------┐ | |
281 | * | | | └-----------------------┐ | | |
282 | * | | └-----------------------┐ | | | |
283 | * | └-----------------------┐ | | | | |
284 | * └-----------------------┐ | | | | | |
285 | * | | | | | | | | | |
286 | * ┌-------┘ | | | | | | | | |
287 | * | ┌-------┘ | | | | | | | |
288 | * | | ┌-------┘ | | | | | | |
289 | * | | | | | | | | | |
290 | * | | | | | | | | | |
291 | * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 | |
292 | * 3 2 1 0 | |
293 | * | |
294 | * This pattern is the same one used for 'gpr3' gpr encoding type, except for | |
295 | * the input value 0, that is mapped to the output value 0 instead of 16. | |
296 | * | |
297 | * Used in handling following instructions: | |
298 | * | |
299 | * - SB[16] | |
300 | * - SH[16] | |
301 | * - SW[16] | |
302 | * - SW[GP16] | |
303 | */ | |
3f2aec07 | 304 | static uint64 decode_gpr_gpr3_src_store(uint64 d, Dis_info *info) |
89a955e8 AM |
305 | { |
306 | static uint64 register_list[] = { 0, 17, 18, 19, 4, 5, 6, 7 }; | |
307 | return renumber_registers(d, register_list, | |
3f2aec07 | 308 | sizeof(register_list) / sizeof(register_list[0]), info); |
89a955e8 AM |
309 | } |
310 | ||
311 | ||
8e2919f6 | 312 | /* |
2dc0c175 | 313 | * decode_gpr_gpr2_reg1() - decoder for 'gpr2.reg1' gpr encoding type |
8e2919f6 AM |
314 | * |
315 | * Map a 2-bit code to the 5-bit register space according to this pattern: | |
316 | * | |
317 | * 3 2 1 0 | |
318 | * | | | | | |
319 | * | | | | | |
320 | * | | | └-------------------┐ | |
321 | * | | └-------------------┐ | | |
322 | * | └-------------------┐ | | | |
323 | * └-------------------┐ | | | | |
324 | * | | | | | |
325 | * | | | | | |
326 | * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 | |
327 | * 3 2 1 0 | |
328 | * | |
329 | * Used in handling following instructions: | |
330 | * | |
331 | * - MOVEP | |
332 | * - MOVEP[REV] | |
333 | */ | |
3f2aec07 | 334 | static uint64 decode_gpr_gpr2_reg1(uint64 d, Dis_info *info) |
89a955e8 AM |
335 | { |
336 | static uint64 register_list[] = { 4, 5, 6, 7 }; | |
337 | return renumber_registers(d, register_list, | |
3f2aec07 | 338 | sizeof(register_list) / sizeof(register_list[0]), info); |
89a955e8 AM |
339 | } |
340 | ||
341 | ||
a21e0520 | 342 | /* |
2dc0c175 | 343 | * decode_gpr_gpr2_reg2() - decoder for 'gpr2.reg2' gpr encoding type |
a21e0520 AM |
344 | * |
345 | * Map a 2-bit code to the 5-bit register space according to this pattern: | |
346 | * | |
347 | * 3 2 1 0 | |
348 | * | | | | | |
349 | * | | | | | |
350 | * | | | └-----------------┐ | |
351 | * | | └-----------------┐ | | |
352 | * | └-----------------┐ | | | |
353 | * └-----------------┐ | | | | |
354 | * | | | | | |
355 | * | | | | | |
356 | * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 | |
357 | * 3 2 1 0 | |
358 | * | |
359 | * Used in handling following instructions: | |
360 | * | |
361 | * - MOVEP | |
362 | * - MOVEP[REV] | |
363 | */ | |
3f2aec07 | 364 | static uint64 decode_gpr_gpr2_reg2(uint64 d, Dis_info *info) |
89a955e8 AM |
365 | { |
366 | static uint64 register_list[] = { 5, 6, 7, 8 }; | |
367 | return renumber_registers(d, register_list, | |
3f2aec07 | 368 | sizeof(register_list) / sizeof(register_list[0]), info); |
89a955e8 AM |
369 | } |
370 | ||
371 | ||
eabf76a0 | 372 | /* |
2dc0c175 | 373 | * decode_gpr_gpr1() - decoder for 'gpr1' gpr encoding type |
eabf76a0 AM |
374 | * |
375 | * Map a 1-bit code to the 5-bit register space according to this pattern: | |
376 | * | |
377 | * 1 0 | |
378 | * | | | |
379 | * | | | |
380 | * | └---------------------┐ | |
381 | * └---------------------┐ | | |
382 | * | | | |
383 | * | | | |
384 | * | | | |
385 | * | | | |
386 | * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 | |
387 | * 3 2 1 0 | |
388 | * | |
389 | * Used in handling following instruction: | |
390 | * | |
391 | * - MOVE.BALC | |
392 | */ | |
3f2aec07 | 393 | static uint64 decode_gpr_gpr1(uint64 d, Dis_info *info) |
eabf76a0 AM |
394 | { |
395 | static uint64 register_list[] = { 4, 5 }; | |
396 | return renumber_registers(d, register_list, | |
3f2aec07 | 397 | sizeof(register_list) / sizeof(register_list[0]), info); |
eabf76a0 AM |
398 | } |
399 | ||
400 | ||
2dc0c175 | 401 | static int64 neg_copy(uint64 d) |
89a955e8 AM |
402 | { |
403 | return 0ll - d; | |
404 | } | |
405 | ||
406 | ||
2dc0c175 | 407 | static uint64 encode_count3_from_count(uint64 d) |
89a955e8 AM |
408 | { |
409 | IMGASSERTONCE(d < 8); | |
410 | return d == 0ull ? 8ull : d; | |
411 | } | |
412 | ||
413 | ||
2dc0c175 | 414 | static uint64 encode_shift3_from_shift(uint64 d) |
89a955e8 AM |
415 | { |
416 | IMGASSERTONCE(d < 8); | |
417 | return d == 0ull ? 8ull : d; | |
418 | } | |
419 | ||
420 | ||
421 | /* special value for load literal */ | |
2dc0c175 | 422 | static int64 encode_eu_from_s_li16(uint64 d) |
89a955e8 AM |
423 | { |
424 | IMGASSERTONCE(d < 128); | |
425 | return d == 127 ? -1 : (int64)d; | |
426 | } | |
427 | ||
428 | ||
2dc0c175 | 429 | static uint64 encode_msbd_from_size(uint64 d) |
89a955e8 AM |
430 | { |
431 | IMGASSERTONCE(d < 32); | |
432 | return d + 1; | |
433 | } | |
434 | ||
435 | ||
2dc0c175 | 436 | static uint64 encode_eu_from_u_andi16(uint64 d) |
89a955e8 AM |
437 | { |
438 | IMGASSERTONCE(d < 16); | |
439 | if (d == 12) { | |
440 | return 0x00ffull; | |
441 | } | |
442 | if (d == 13) { | |
443 | return 0xffffull; | |
444 | } | |
445 | return d; | |
446 | } | |
447 | ||
448 | ||
89a955e8 | 449 | /* save16 / restore16 ???? */ |
2dc0c175 | 450 | static uint64 encode_rt1_from_rt(uint64 d) |
89a955e8 AM |
451 | { |
452 | return d ? 31 : 30; | |
453 | } | |
454 | ||
455 | ||
3f2aec07 | 456 | static const char *GPR(uint64 reg, Dis_info *info) |
89a955e8 AM |
457 | { |
458 | static const char *gpr_reg[32] = { | |
459 | "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3", | |
460 | "a4", "a5", "a6", "a7", "r12", "r13", "r14", "r15", | |
461 | "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", | |
462 | "r24", "r25", "k0", "k1", "gp", "sp", "fp", "ra" | |
463 | }; | |
464 | ||
465 | if (reg < 32) { | |
466 | return gpr_reg[reg]; | |
467 | } | |
468 | ||
c5231692 | 469 | throw std::runtime_error(img_format("Invalid GPR register index %" PRIu64, |
8c33ea59 | 470 | reg)); |
89a955e8 AM |
471 | } |
472 | ||
473 | ||
3f2aec07 ML |
474 | static char *save_restore_list(uint64 rt, uint64 count, uint64 gp, |
475 | Dis_info *info) | |
2dc0c175 | 476 | { |
7def8a4b ML |
477 | char *reg_list[34]; |
478 | reg_list[0] = (char *)""; | |
2dc0c175 | 479 | |
7def8a4b | 480 | assert(count <= 32); |
2dc0c175 ML |
481 | for (uint64 counter = 0; counter != count; counter++) { |
482 | bool use_gp = gp && (counter == count - 1); | |
483 | uint64 this_rt = use_gp ? 28 : ((rt & 0x10) | (rt + counter)) & 0x1f; | |
7def8a4b | 484 | /* glib usage below requires casting away const */ |
3f2aec07 | 485 | reg_list[counter + 1] = (char *)GPR(this_rt, info); |
2dc0c175 | 486 | } |
7def8a4b | 487 | reg_list[count + 1] = NULL; |
2dc0c175 | 488 | |
7def8a4b | 489 | return g_strjoinv(",", reg_list); |
2dc0c175 ML |
490 | } |
491 | ||
492 | ||
3f2aec07 | 493 | static const char *FPR(uint64 reg, Dis_info *info) |
89a955e8 AM |
494 | { |
495 | static const char *fpr_reg[32] = { | |
496 | "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", | |
497 | "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", | |
498 | "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", | |
499 | "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31" | |
500 | }; | |
501 | ||
502 | if (reg < 32) { | |
503 | return fpr_reg[reg]; | |
504 | } | |
505 | ||
c5231692 | 506 | throw std::runtime_error(img_format("Invalid FPR register index %" PRIu64, |
8c33ea59 | 507 | reg)); |
89a955e8 AM |
508 | } |
509 | ||
510 | ||
3f2aec07 | 511 | static const char *AC(uint64 reg, Dis_info *info) |
89a955e8 AM |
512 | { |
513 | static const char *ac_reg[4] = { | |
514 | "ac0", "ac1", "ac2", "ac3" | |
515 | }; | |
516 | ||
517 | if (reg < 4) { | |
518 | return ac_reg[reg]; | |
519 | } | |
520 | ||
c5231692 | 521 | throw std::runtime_error(img_format("Invalid AC register index %" PRIu64, |
8c33ea59 | 522 | reg)); |
89a955e8 AM |
523 | } |
524 | ||
525 | ||
7def8a4b | 526 | static char *ADDRESS(uint64 value, int instruction_size, Dis_info *info) |
89a955e8 AM |
527 | { |
528 | /* token for string replace */ | |
9972c8fa | 529 | img_address address = info->m_pc + value + instruction_size; |
89a955e8 | 530 | /* symbol replacement */ |
89a955e8 AM |
531 | return to_string(address); |
532 | } | |
533 | ||
534 | ||
beebf65b | 535 | static uint64 extract_op_code_value(const uint16 *data, int size) |
89a955e8 AM |
536 | { |
537 | switch (size) { | |
538 | case 16: | |
539 | return data[0]; | |
540 | case 32: | |
541 | return ((uint64)data[0] << 16) | data[1]; | |
542 | case 48: | |
543 | return ((uint64)data[0] << 32) | ((uint64)data[1] << 16) | data[2]; | |
544 | default: | |
545 | return data[0]; | |
546 | } | |
547 | } | |
548 | ||
549 | ||
89a955e8 AM |
550 | /* |
551 | * Recurse through tables until the instruction is found then return | |
552 | * the string and size | |
553 | * | |
554 | * inputs: | |
555 | * pointer to a word stream, | |
556 | * disassember table and size | |
557 | * returns: | |
558 | * instruction size - negative is error | |
559 | * disassembly string - on error will constain error string | |
560 | */ | |
7def8a4b | 561 | static int Disassemble(const uint16 *data, char **dis, |
bfffba15 | 562 | TABLE_ENTRY_TYPE & type, const Pool *table, |
9972c8fa | 563 | int table_size, Dis_info *info) |
89a955e8 AM |
564 | { |
565 | try | |
566 | { | |
567 | for (int i = 0; i < table_size; i++) { | |
568 | uint64 op_code = extract_op_code_value(data, | |
569 | table[i].instructions_size); | |
570 | if ((op_code & table[i].mask) == table[i].value) { | |
571 | /* possible match */ | |
572 | conditional_function cond = table[i].condition; | |
655fc22f | 573 | if ((cond == NULL) || cond(op_code)) { |
89a955e8 AM |
574 | try |
575 | { | |
576 | if (table[i].type == pool) { | |
577 | return Disassemble(data, dis, type, | |
578 | table[i].next_table, | |
9972c8fa ML |
579 | table[i].next_table_size, |
580 | info); | |
89a955e8 AM |
581 | } else if ((table[i].type == instruction) || |
582 | (table[i].type == call_instruction) || | |
583 | (table[i].type == branch_instruction) || | |
584 | (table[i].type == return_instruction)) { | |
89a955e8 AM |
585 | disassembly_function dis_fn = table[i].disassembly; |
586 | if (dis_fn == 0) { | |
7def8a4b ML |
587 | *dis = g_strdup( |
588 | "disassembler failure - bad table entry"); | |
89a955e8 AM |
589 | return -6; |
590 | } | |
591 | type = table[i].type; | |
7def8a4b | 592 | *dis = dis_fn(op_code, info); |
89a955e8 AM |
593 | return table[i].instructions_size; |
594 | } else { | |
7def8a4b | 595 | *dis = g_strdup("reserved instruction"); |
89a955e8 AM |
596 | return -2; |
597 | } | |
598 | } | |
599 | catch (std::runtime_error & e) | |
600 | { | |
7def8a4b | 601 | *dis = g_strdup(e.what()); |
89a955e8 AM |
602 | return -3; /* runtime error */ |
603 | } | |
604 | } | |
605 | } | |
606 | } | |
607 | } | |
608 | catch (std::exception & e) | |
609 | { | |
7def8a4b | 610 | *dis = g_strdup(e.what()); |
89a955e8 AM |
611 | return -4; /* runtime error */ |
612 | } | |
613 | ||
7def8a4b | 614 | *dis = g_strdup("failed to disassemble"); |
89a955e8 AM |
615 | return -1; /* failed to disassemble */ |
616 | } | |
617 | ||
618 | ||
2dc0c175 | 619 | static uint64 extract_code_18_to_0(uint64 instruction) |
89a955e8 AM |
620 | { |
621 | uint64 value = 0; | |
622 | value |= extract_bits(instruction, 0, 19); | |
623 | return value; | |
624 | } | |
625 | ||
626 | ||
2dc0c175 | 627 | static uint64 extract_shift3_2_1_0(uint64 instruction) |
89a955e8 AM |
628 | { |
629 | uint64 value = 0; | |
630 | value |= extract_bits(instruction, 0, 3); | |
631 | return value; | |
632 | } | |
633 | ||
634 | ||
2dc0c175 | 635 | static uint64 extract_u_11_10_9_8_7_6_5_4_3__s3(uint64 instruction) |
89a955e8 AM |
636 | { |
637 | uint64 value = 0; | |
638 | value |= extract_bits(instruction, 3, 9) << 3; | |
639 | return value; | |
640 | } | |
641 | ||
642 | ||
2dc0c175 | 643 | static uint64 extract_count_3_2_1_0(uint64 instruction) |
89a955e8 AM |
644 | { |
645 | uint64 value = 0; | |
646 | value |= extract_bits(instruction, 0, 4); | |
647 | return value; | |
648 | } | |
649 | ||
650 | ||
2dc0c175 | 651 | static uint64 extract_rtz3_9_8_7(uint64 instruction) |
89a955e8 AM |
652 | { |
653 | uint64 value = 0; | |
654 | value |= extract_bits(instruction, 7, 3); | |
655 | return value; | |
656 | } | |
657 | ||
658 | ||
2dc0c175 | 659 | static uint64 extract_u_17_to_1__s1(uint64 instruction) |
89a955e8 AM |
660 | { |
661 | uint64 value = 0; | |
662 | value |= extract_bits(instruction, 1, 17) << 1; | |
663 | return value; | |
664 | } | |
665 | ||
666 | ||
2dc0c175 | 667 | static int64 extract_s__se9_20_19_18_17_16_15_14_13_12_11(uint64 instruction) |
89a955e8 AM |
668 | { |
669 | int64 value = 0; | |
670 | value |= extract_bits(instruction, 11, 10); | |
671 | value = sign_extend(value, 9); | |
672 | return value; | |
673 | } | |
674 | ||
675 | ||
2dc0c175 | 676 | static int64 extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(uint64 instruction) |
89a955e8 AM |
677 | { |
678 | int64 value = 0; | |
679 | value |= extract_bits(instruction, 0, 1) << 11; | |
680 | value |= extract_bits(instruction, 1, 10) << 1; | |
681 | value = sign_extend(value, 11); | |
682 | return value; | |
683 | } | |
684 | ||
685 | ||
2dc0c175 | 686 | static uint64 extract_u_10(uint64 instruction) |
89a955e8 AM |
687 | { |
688 | uint64 value = 0; | |
689 | value |= extract_bits(instruction, 10, 1); | |
690 | return value; | |
691 | } | |
692 | ||
693 | ||
2dc0c175 | 694 | static uint64 extract_rtz4_27_26_25_23_22_21(uint64 instruction) |
89a955e8 AM |
695 | { |
696 | uint64 value = 0; | |
697 | value |= extract_bits(instruction, 21, 3); | |
698 | value |= extract_bits(instruction, 25, 1) << 3; | |
699 | return value; | |
700 | } | |
701 | ||
702 | ||
2dc0c175 | 703 | static uint64 extract_sa_15_14_13_12_11(uint64 instruction) |
89a955e8 AM |
704 | { |
705 | uint64 value = 0; | |
706 | value |= extract_bits(instruction, 11, 5); | |
707 | return value; | |
708 | } | |
709 | ||
710 | ||
2dc0c175 | 711 | static uint64 extract_shift_4_3_2_1_0(uint64 instruction) |
89a955e8 AM |
712 | { |
713 | uint64 value = 0; | |
714 | value |= extract_bits(instruction, 0, 5); | |
715 | return value; | |
716 | } | |
717 | ||
718 | ||
2dc0c175 | 719 | static uint64 extract_shiftx_10_9_8_7__s1(uint64 instruction) |
89a955e8 AM |
720 | { |
721 | uint64 value = 0; | |
722 | value |= extract_bits(instruction, 7, 4) << 1; | |
723 | return value; | |
724 | } | |
725 | ||
726 | ||
2dc0c175 | 727 | static uint64 extract_hint_25_24_23_22_21(uint64 instruction) |
89a955e8 AM |
728 | { |
729 | uint64 value = 0; | |
730 | value |= extract_bits(instruction, 21, 5); | |
731 | return value; | |
732 | } | |
733 | ||
734 | ||
2dc0c175 | 735 | static uint64 extract_count3_14_13_12(uint64 instruction) |
89a955e8 AM |
736 | { |
737 | uint64 value = 0; | |
738 | value |= extract_bits(instruction, 12, 3); | |
739 | return value; | |
740 | } | |
741 | ||
742 | ||
2dc0c175 | 743 | static int64 extract_s__se31_0_11_to_2_20_to_12_s12(uint64 instruction) |
89a955e8 AM |
744 | { |
745 | int64 value = 0; | |
746 | value |= extract_bits(instruction, 0, 1) << 31; | |
747 | value |= extract_bits(instruction, 2, 10) << 21; | |
748 | value |= extract_bits(instruction, 12, 9) << 12; | |
749 | value = sign_extend(value, 31); | |
750 | return value; | |
751 | } | |
752 | ||
753 | ||
2dc0c175 | 754 | static int64 extract_s__se7_0_6_5_4_3_2_1_s1(uint64 instruction) |
89a955e8 AM |
755 | { |
756 | int64 value = 0; | |
757 | value |= extract_bits(instruction, 0, 1) << 7; | |
758 | value |= extract_bits(instruction, 1, 6) << 1; | |
759 | value = sign_extend(value, 7); | |
760 | return value; | |
761 | } | |
762 | ||
763 | ||
2dc0c175 | 764 | static uint64 extract_u2_10_9(uint64 instruction) |
89a955e8 AM |
765 | { |
766 | uint64 value = 0; | |
767 | value |= extract_bits(instruction, 9, 2); | |
768 | return value; | |
769 | } | |
770 | ||
771 | ||
2dc0c175 | 772 | static uint64 extract_code_25_24_23_22_21_20_19_18_17_16(uint64 instruction) |
89a955e8 AM |
773 | { |
774 | uint64 value = 0; | |
775 | value |= extract_bits(instruction, 16, 10); | |
776 | return value; | |
777 | } | |
778 | ||
779 | ||
2dc0c175 | 780 | static uint64 extract_rs_20_19_18_17_16(uint64 instruction) |
89a955e8 AM |
781 | { |
782 | uint64 value = 0; | |
783 | value |= extract_bits(instruction, 16, 5); | |
784 | return value; | |
785 | } | |
786 | ||
787 | ||
2dc0c175 | 788 | static uint64 extract_u_2_1__s1(uint64 instruction) |
89a955e8 AM |
789 | { |
790 | uint64 value = 0; | |
791 | value |= extract_bits(instruction, 1, 2) << 1; | |
792 | return value; | |
793 | } | |
794 | ||
795 | ||
2dc0c175 | 796 | static uint64 extract_stripe_6(uint64 instruction) |
89a955e8 AM |
797 | { |
798 | uint64 value = 0; | |
799 | value |= extract_bits(instruction, 6, 1); | |
800 | return value; | |
801 | } | |
802 | ||
803 | ||
2dc0c175 | 804 | static uint64 extract_ac_15_14(uint64 instruction) |
89a955e8 AM |
805 | { |
806 | uint64 value = 0; | |
807 | value |= extract_bits(instruction, 14, 2); | |
808 | return value; | |
809 | } | |
810 | ||
811 | ||
2dc0c175 | 812 | static uint64 extract_shift_20_19_18_17_16(uint64 instruction) |
89a955e8 AM |
813 | { |
814 | uint64 value = 0; | |
815 | value |= extract_bits(instruction, 16, 5); | |
816 | return value; | |
817 | } | |
818 | ||
819 | ||
2dc0c175 | 820 | static uint64 extract_rdl_25_24(uint64 instruction) |
89a955e8 AM |
821 | { |
822 | uint64 value = 0; | |
823 | value |= extract_bits(instruction, 24, 1); | |
824 | return value; | |
825 | } | |
826 | ||
827 | ||
2dc0c175 | 828 | static int64 extract_s__se10_0_9_8_7_6_5_4_3_2_1_s1(uint64 instruction) |
89a955e8 AM |
829 | { |
830 | int64 value = 0; | |
831 | value |= extract_bits(instruction, 0, 1) << 10; | |
832 | value |= extract_bits(instruction, 1, 9) << 1; | |
833 | value = sign_extend(value, 10); | |
834 | return value; | |
835 | } | |
836 | ||
837 | ||
2dc0c175 | 838 | static uint64 extract_eu_6_5_4_3_2_1_0(uint64 instruction) |
89a955e8 AM |
839 | { |
840 | uint64 value = 0; | |
841 | value |= extract_bits(instruction, 0, 7); | |
842 | return value; | |
843 | } | |
844 | ||
845 | ||
2dc0c175 | 846 | static uint64 extract_shift_5_4_3_2_1_0(uint64 instruction) |
89a955e8 AM |
847 | { |
848 | uint64 value = 0; | |
849 | value |= extract_bits(instruction, 0, 6); | |
850 | return value; | |
851 | } | |
852 | ||
853 | ||
2dc0c175 | 854 | static uint64 extract_count_19_18_17_16(uint64 instruction) |
89a955e8 AM |
855 | { |
856 | uint64 value = 0; | |
857 | value |= extract_bits(instruction, 16, 4); | |
858 | return value; | |
859 | } | |
860 | ||
861 | ||
2dc0c175 | 862 | static uint64 extract_code_2_1_0(uint64 instruction) |
89a955e8 AM |
863 | { |
864 | uint64 value = 0; | |
865 | value |= extract_bits(instruction, 0, 3); | |
866 | return value; | |
867 | } | |
868 | ||
869 | ||
2dc0c175 | 870 | static uint64 extract_u_11_10_9_8_7_6_5_4_3_2_1_0(uint64 instruction) |
89a955e8 AM |
871 | { |
872 | uint64 value = 0; | |
873 | value |= extract_bits(instruction, 0, 12); | |
874 | return value; | |
875 | } | |
876 | ||
877 | ||
2dc0c175 | 878 | static uint64 extract_rs_4_3_2_1_0(uint64 instruction) |
89a955e8 AM |
879 | { |
880 | uint64 value = 0; | |
881 | value |= extract_bits(instruction, 0, 5); | |
882 | return value; | |
883 | } | |
884 | ||
885 | ||
2dc0c175 | 886 | static uint64 extract_u_20_to_3__s3(uint64 instruction) |
89a955e8 AM |
887 | { |
888 | uint64 value = 0; | |
889 | value |= extract_bits(instruction, 3, 18) << 3; | |
890 | return value; | |
891 | } | |
892 | ||
893 | ||
2dc0c175 | 894 | static uint64 extract_u_3_2_1_0__s2(uint64 instruction) |
89a955e8 AM |
895 | { |
896 | uint64 value = 0; | |
897 | value |= extract_bits(instruction, 0, 4) << 2; | |
898 | return value; | |
899 | } | |
900 | ||
901 | ||
2dc0c175 | 902 | static uint64 extract_cofun_25_24_23(uint64 instruction) |
89a955e8 AM |
903 | { |
904 | uint64 value = 0; | |
905 | value |= extract_bits(instruction, 3, 23); | |
906 | return value; | |
907 | } | |
908 | ||
909 | ||
2dc0c175 | 910 | static uint64 extract_u_2_1_0__s2(uint64 instruction) |
89a955e8 AM |
911 | { |
912 | uint64 value = 0; | |
913 | value |= extract_bits(instruction, 0, 3) << 2; | |
914 | return value; | |
915 | } | |
916 | ||
917 | ||
2dc0c175 | 918 | static uint64 extract_rd3_3_2_1(uint64 instruction) |
89a955e8 AM |
919 | { |
920 | uint64 value = 0; | |
921 | value |= extract_bits(instruction, 1, 3); | |
922 | return value; | |
923 | } | |
924 | ||
925 | ||
2dc0c175 | 926 | static uint64 extract_sa_15_14_13_12(uint64 instruction) |
89a955e8 AM |
927 | { |
928 | uint64 value = 0; | |
929 | value |= extract_bits(instruction, 12, 4); | |
930 | return value; | |
931 | } | |
932 | ||
933 | ||
2dc0c175 | 934 | static uint64 extract_rt_25_24_23_22_21(uint64 instruction) |
89a955e8 AM |
935 | { |
936 | uint64 value = 0; | |
937 | value |= extract_bits(instruction, 21, 5); | |
938 | return value; | |
939 | } | |
940 | ||
941 | ||
2dc0c175 | 942 | static uint64 extract_ru_7_6_5_4_3(uint64 instruction) |
89a955e8 AM |
943 | { |
944 | uint64 value = 0; | |
945 | value |= extract_bits(instruction, 3, 5); | |
946 | return value; | |
947 | } | |
948 | ||
949 | ||
2dc0c175 | 950 | static uint64 extract_u_17_to_0(uint64 instruction) |
89a955e8 AM |
951 | { |
952 | uint64 value = 0; | |
953 | value |= extract_bits(instruction, 0, 18); | |
954 | return value; | |
955 | } | |
956 | ||
957 | ||
2dc0c175 | 958 | static uint64 extract_rsz4_4_2_1_0(uint64 instruction) |
89a955e8 AM |
959 | { |
960 | uint64 value = 0; | |
961 | value |= extract_bits(instruction, 0, 3); | |
962 | value |= extract_bits(instruction, 4, 1) << 3; | |
963 | return value; | |
964 | } | |
965 | ||
966 | ||
2dc0c175 | 967 | static int64 extract_s__se21_0_20_to_1_s1(uint64 instruction) |
89a955e8 AM |
968 | { |
969 | int64 value = 0; | |
970 | value |= extract_bits(instruction, 0, 1) << 21; | |
971 | value |= extract_bits(instruction, 1, 20) << 1; | |
972 | value = sign_extend(value, 21); | |
973 | return value; | |
974 | } | |
975 | ||
976 | ||
2dc0c175 | 977 | static uint64 extract_op_25_to_3(uint64 instruction) |
89a955e8 AM |
978 | { |
979 | uint64 value = 0; | |
980 | value |= extract_bits(instruction, 3, 23); | |
981 | return value; | |
982 | } | |
983 | ||
984 | ||
2dc0c175 | 985 | static uint64 extract_rs4_4_2_1_0(uint64 instruction) |
89a955e8 AM |
986 | { |
987 | uint64 value = 0; | |
988 | value |= extract_bits(instruction, 0, 3); | |
989 | value |= extract_bits(instruction, 4, 1) << 3; | |
990 | return value; | |
991 | } | |
992 | ||
993 | ||
2dc0c175 | 994 | static uint64 extract_bit_23_22_21(uint64 instruction) |
89a955e8 AM |
995 | { |
996 | uint64 value = 0; | |
997 | value |= extract_bits(instruction, 21, 3); | |
998 | return value; | |
999 | } | |
1000 | ||
1001 | ||
2dc0c175 | 1002 | static uint64 extract_rt_41_40_39_38_37(uint64 instruction) |
89a955e8 AM |
1003 | { |
1004 | uint64 value = 0; | |
1005 | value |= extract_bits(instruction, 37, 5); | |
1006 | return value; | |
1007 | } | |
1008 | ||
1009 | ||
2dc0c175 | 1010 | static int64 extract_shift__se5_21_20_19_18_17_16(uint64 instruction) |
89a955e8 AM |
1011 | { |
1012 | int64 value = 0; | |
1013 | value |= extract_bits(instruction, 16, 6); | |
1014 | value = sign_extend(value, 5); | |
1015 | return value; | |
1016 | } | |
1017 | ||
1018 | ||
2dc0c175 | 1019 | static uint64 extract_rd2_3_8(uint64 instruction) |
89a955e8 AM |
1020 | { |
1021 | uint64 value = 0; | |
1022 | value |= extract_bits(instruction, 3, 1) << 1; | |
1023 | value |= extract_bits(instruction, 8, 1); | |
1024 | return value; | |
1025 | } | |
1026 | ||
1027 | ||
2dc0c175 | 1028 | static uint64 extract_code_17_to_0(uint64 instruction) |
89a955e8 AM |
1029 | { |
1030 | uint64 value = 0; | |
1031 | value |= extract_bits(instruction, 0, 18); | |
1032 | return value; | |
1033 | } | |
1034 | ||
1035 | ||
2dc0c175 | 1036 | static uint64 extract_size_20_19_18_17_16(uint64 instruction) |
89a955e8 AM |
1037 | { |
1038 | uint64 value = 0; | |
1039 | value |= extract_bits(instruction, 16, 5); | |
1040 | return value; | |
1041 | } | |
1042 | ||
1043 | ||
2dc0c175 | 1044 | static int64 extract_s__se8_15_7_6_5_4_3_2_s2(uint64 instruction) |
89a955e8 AM |
1045 | { |
1046 | int64 value = 0; | |
1047 | value |= extract_bits(instruction, 2, 6) << 2; | |
1048 | value |= extract_bits(instruction, 15, 1) << 8; | |
1049 | value = sign_extend(value, 8); | |
1050 | return value; | |
1051 | } | |
1052 | ||
1053 | ||
2dc0c175 | 1054 | static uint64 extract_u_15_to_0(uint64 instruction) |
89a955e8 AM |
1055 | { |
1056 | uint64 value = 0; | |
1057 | value |= extract_bits(instruction, 0, 16); | |
1058 | return value; | |
1059 | } | |
1060 | ||
1061 | ||
2dc0c175 | 1062 | static uint64 extract_fs_20_19_18_17_16(uint64 instruction) |
89a955e8 AM |
1063 | { |
1064 | uint64 value = 0; | |
1065 | value |= extract_bits(instruction, 16, 5); | |
1066 | return value; | |
1067 | } | |
1068 | ||
1069 | ||
2dc0c175 | 1070 | static int64 extract_s__se8_15_7_6_5_4_3_2_1_0(uint64 instruction) |
89a955e8 AM |
1071 | { |
1072 | int64 value = 0; | |
1073 | value |= extract_bits(instruction, 0, 8); | |
1074 | value |= extract_bits(instruction, 15, 1) << 8; | |
1075 | value = sign_extend(value, 8); | |
1076 | return value; | |
1077 | } | |
1078 | ||
1079 | ||
2dc0c175 | 1080 | static uint64 extract_stype_20_19_18_17_16(uint64 instruction) |
89a955e8 AM |
1081 | { |
1082 | uint64 value = 0; | |
1083 | value |= extract_bits(instruction, 16, 5); | |
1084 | return value; | |
1085 | } | |
1086 | ||
1087 | ||
2dc0c175 | 1088 | static uint64 extract_rtl_11(uint64 instruction) |
89a955e8 AM |
1089 | { |
1090 | uint64 value = 0; | |
1091 | value |= extract_bits(instruction, 9, 1); | |
1092 | return value; | |
1093 | } | |
1094 | ||
1095 | ||
2dc0c175 | 1096 | static uint64 extract_hs_20_19_18_17_16(uint64 instruction) |
89a955e8 AM |
1097 | { |
1098 | uint64 value = 0; | |
1099 | value |= extract_bits(instruction, 16, 5); | |
1100 | return value; | |
1101 | } | |
1102 | ||
1103 | ||
2dc0c175 | 1104 | static uint64 extract_sel_13_12_11(uint64 instruction) |
89a955e8 AM |
1105 | { |
1106 | uint64 value = 0; | |
1107 | value |= extract_bits(instruction, 11, 3); | |
1108 | return value; | |
1109 | } | |
1110 | ||
1111 | ||
2dc0c175 | 1112 | static uint64 extract_lsb_4_3_2_1_0(uint64 instruction) |
89a955e8 AM |
1113 | { |
1114 | uint64 value = 0; | |
1115 | value |= extract_bits(instruction, 0, 5); | |
1116 | return value; | |
1117 | } | |
1118 | ||
1119 | ||
2dc0c175 | 1120 | static uint64 extract_gp_2(uint64 instruction) |
89a955e8 AM |
1121 | { |
1122 | uint64 value = 0; | |
1123 | value |= extract_bits(instruction, 2, 1); | |
1124 | return value; | |
1125 | } | |
1126 | ||
1127 | ||
2dc0c175 | 1128 | static uint64 extract_rt3_9_8_7(uint64 instruction) |
89a955e8 AM |
1129 | { |
1130 | uint64 value = 0; | |
1131 | value |= extract_bits(instruction, 7, 3); | |
1132 | return value; | |
1133 | } | |
1134 | ||
1135 | ||
2dc0c175 | 1136 | static uint64 extract_ft_25_24_23_22_21(uint64 instruction) |
89a955e8 AM |
1137 | { |
1138 | uint64 value = 0; | |
1139 | value |= extract_bits(instruction, 21, 5); | |
1140 | return value; | |
1141 | } | |
1142 | ||
1143 | ||
2dc0c175 | 1144 | static uint64 extract_u_17_16_15_14_13_12_11(uint64 instruction) |
89a955e8 AM |
1145 | { |
1146 | uint64 value = 0; | |
1147 | value |= extract_bits(instruction, 11, 7); | |
1148 | return value; | |
1149 | } | |
1150 | ||
1151 | ||
2dc0c175 | 1152 | static uint64 extract_cs_20_19_18_17_16(uint64 instruction) |
89a955e8 AM |
1153 | { |
1154 | uint64 value = 0; | |
1155 | value |= extract_bits(instruction, 16, 5); | |
1156 | return value; | |
1157 | } | |
1158 | ||
1159 | ||
2dc0c175 | 1160 | static uint64 extract_rt4_9_7_6_5(uint64 instruction) |
89a955e8 AM |
1161 | { |
1162 | uint64 value = 0; | |
1163 | value |= extract_bits(instruction, 5, 3); | |
1164 | value |= extract_bits(instruction, 9, 1) << 3; | |
1165 | return value; | |
1166 | } | |
1167 | ||
1168 | ||
2dc0c175 | 1169 | static uint64 extract_msbt_10_9_8_7_6(uint64 instruction) |
89a955e8 AM |
1170 | { |
1171 | uint64 value = 0; | |
1172 | value |= extract_bits(instruction, 6, 5); | |
1173 | return value; | |
1174 | } | |
1175 | ||
1176 | ||
2dc0c175 | 1177 | static uint64 extract_u_5_4_3_2_1_0__s2(uint64 instruction) |
89a955e8 AM |
1178 | { |
1179 | uint64 value = 0; | |
1180 | value |= extract_bits(instruction, 0, 6) << 2; | |
1181 | return value; | |
1182 | } | |
1183 | ||
1184 | ||
2dc0c175 | 1185 | static uint64 extract_sa_15_14_13(uint64 instruction) |
89a955e8 AM |
1186 | { |
1187 | uint64 value = 0; | |
1188 | value |= extract_bits(instruction, 13, 3); | |
1189 | return value; | |
1190 | } | |
1191 | ||
1192 | ||
2dc0c175 | 1193 | static int64 extract_s__se14_0_13_to_1_s1(uint64 instruction) |
89a955e8 AM |
1194 | { |
1195 | int64 value = 0; | |
1196 | value |= extract_bits(instruction, 0, 1) << 14; | |
1197 | value |= extract_bits(instruction, 1, 13) << 1; | |
1198 | value = sign_extend(value, 14); | |
1199 | return value; | |
1200 | } | |
1201 | ||
1202 | ||
2dc0c175 | 1203 | static uint64 extract_rs3_6_5_4(uint64 instruction) |
89a955e8 AM |
1204 | { |
1205 | uint64 value = 0; | |
1206 | value |= extract_bits(instruction, 4, 3); | |
1207 | return value; | |
1208 | } | |
1209 | ||
1210 | ||
2dc0c175 | 1211 | static uint64 extract_u_31_to_0__s32(uint64 instruction) |
89a955e8 AM |
1212 | { |
1213 | uint64 value = 0; | |
1214 | value |= extract_bits(instruction, 0, 32) << 32; | |
1215 | return value; | |
1216 | } | |
1217 | ||
1218 | ||
2dc0c175 | 1219 | static uint64 extract_shift_10_9_8_7_6(uint64 instruction) |
89a955e8 AM |
1220 | { |
1221 | uint64 value = 0; | |
1222 | value |= extract_bits(instruction, 6, 5); | |
1223 | return value; | |
1224 | } | |
1225 | ||
1226 | ||
2dc0c175 | 1227 | static uint64 extract_cs_25_24_23_22_21(uint64 instruction) |
89a955e8 AM |
1228 | { |
1229 | uint64 value = 0; | |
1230 | value |= extract_bits(instruction, 21, 5); | |
1231 | return value; | |
1232 | } | |
1233 | ||
1234 | ||
2dc0c175 | 1235 | static uint64 extract_shiftx_11_10_9_8_7_6(uint64 instruction) |
89a955e8 AM |
1236 | { |
1237 | uint64 value = 0; | |
1238 | value |= extract_bits(instruction, 6, 6); | |
1239 | return value; | |
1240 | } | |
1241 | ||
1242 | ||
2dc0c175 | 1243 | static uint64 extract_rt_9_8_7_6_5(uint64 instruction) |
89a955e8 AM |
1244 | { |
1245 | uint64 value = 0; | |
1246 | value |= extract_bits(instruction, 5, 5); | |
1247 | return value; | |
1248 | } | |
1249 | ||
1250 | ||
2dc0c175 | 1251 | static uint64 extract_op_25_24_23_22_21(uint64 instruction) |
89a955e8 AM |
1252 | { |
1253 | uint64 value = 0; | |
1254 | value |= extract_bits(instruction, 21, 5); | |
1255 | return value; | |
1256 | } | |
1257 | ||
1258 | ||
2dc0c175 | 1259 | static uint64 extract_u_6_5_4_3_2_1_0__s2(uint64 instruction) |
89a955e8 AM |
1260 | { |
1261 | uint64 value = 0; | |
1262 | value |= extract_bits(instruction, 0, 7) << 2; | |
1263 | return value; | |
1264 | } | |
1265 | ||
1266 | ||
2dc0c175 | 1267 | static uint64 extract_bit_16_15_14_13_12_11(uint64 instruction) |
89a955e8 AM |
1268 | { |
1269 | uint64 value = 0; | |
1270 | value |= extract_bits(instruction, 11, 6); | |
1271 | return value; | |
1272 | } | |
1273 | ||
1274 | ||
2dc0c175 | 1275 | static uint64 extract_mask_20_19_18_17_16_15_14(uint64 instruction) |
89a955e8 AM |
1276 | { |
1277 | uint64 value = 0; | |
1278 | value |= extract_bits(instruction, 14, 7); | |
1279 | return value; | |
1280 | } | |
1281 | ||
1282 | ||
2dc0c175 | 1283 | static uint64 extract_eu_3_2_1_0(uint64 instruction) |
89a955e8 AM |
1284 | { |
1285 | uint64 value = 0; | |
1286 | value |= extract_bits(instruction, 0, 4); | |
1287 | return value; | |
1288 | } | |
1289 | ||
1290 | ||
2dc0c175 | 1291 | static uint64 extract_u_7_6_5_4__s4(uint64 instruction) |
89a955e8 AM |
1292 | { |
1293 | uint64 value = 0; | |
1294 | value |= extract_bits(instruction, 4, 4) << 4; | |
1295 | return value; | |
1296 | } | |
1297 | ||
1298 | ||
2dc0c175 | 1299 | static int64 extract_s__se8_15_7_6_5_4_3_s3(uint64 instruction) |
89a955e8 AM |
1300 | { |
1301 | int64 value = 0; | |
1302 | value |= extract_bits(instruction, 3, 5) << 3; | |
1303 | value |= extract_bits(instruction, 15, 1) << 8; | |
1304 | value = sign_extend(value, 8); | |
1305 | return value; | |
1306 | } | |
1307 | ||
1308 | ||
2dc0c175 | 1309 | static uint64 extract_ft_15_14_13_12_11(uint64 instruction) |
89a955e8 AM |
1310 | { |
1311 | uint64 value = 0; | |
1312 | value |= extract_bits(instruction, 11, 5); | |
1313 | return value; | |
1314 | } | |
1315 | ||
1316 | ||
2dc0c175 | 1317 | static int64 extract_s__se31_15_to_0_31_to_16(uint64 instruction) |
89a955e8 AM |
1318 | { |
1319 | int64 value = 0; | |
1320 | value |= extract_bits(instruction, 0, 16) << 16; | |
1321 | value |= extract_bits(instruction, 16, 16); | |
1322 | value = sign_extend(value, 31); | |
1323 | return value; | |
1324 | } | |
1325 | ||
1326 | ||
2dc0c175 | 1327 | static uint64 extract_u_20_19_18_17_16_15_14_13(uint64 instruction) |
89a955e8 AM |
1328 | { |
1329 | uint64 value = 0; | |
1330 | value |= extract_bits(instruction, 13, 8); | |
1331 | return value; | |
1332 | } | |
1333 | ||
1334 | ||
2dc0c175 | 1335 | static uint64 extract_u_17_to_2__s2(uint64 instruction) |
89a955e8 AM |
1336 | { |
1337 | uint64 value = 0; | |
1338 | value |= extract_bits(instruction, 2, 16) << 2; | |
1339 | return value; | |
1340 | } | |
1341 | ||
1342 | ||
2dc0c175 | 1343 | static uint64 extract_rd_15_14_13_12_11(uint64 instruction) |
89a955e8 AM |
1344 | { |
1345 | uint64 value = 0; | |
1346 | value |= extract_bits(instruction, 11, 5); | |
1347 | return value; | |
1348 | } | |
1349 | ||
1350 | ||
2dc0c175 | 1351 | static uint64 extract_c0s_20_19_18_17_16(uint64 instruction) |
89a955e8 AM |
1352 | { |
1353 | uint64 value = 0; | |
1354 | value |= extract_bits(instruction, 16, 5); | |
1355 | return value; | |
1356 | } | |
1357 | ||
1358 | ||
2dc0c175 | 1359 | static uint64 extract_code_1_0(uint64 instruction) |
89a955e8 AM |
1360 | { |
1361 | uint64 value = 0; | |
1362 | value |= extract_bits(instruction, 0, 2); | |
1363 | return value; | |
1364 | } | |
1365 | ||
1366 | ||
2dc0c175 | 1367 | static int64 extract_s__se25_0_24_to_1_s1(uint64 instruction) |
89a955e8 AM |
1368 | { |
1369 | int64 value = 0; | |
1370 | value |= extract_bits(instruction, 0, 1) << 25; | |
1371 | value |= extract_bits(instruction, 1, 24) << 1; | |
1372 | value = sign_extend(value, 25); | |
1373 | return value; | |
1374 | } | |
1375 | ||
1376 | ||
2dc0c175 | 1377 | static uint64 extract_u_1_0(uint64 instruction) |
89a955e8 AM |
1378 | { |
1379 | uint64 value = 0; | |
1380 | value |= extract_bits(instruction, 0, 2); | |
1381 | return value; | |
1382 | } | |
1383 | ||
1384 | ||
2dc0c175 | 1385 | static uint64 extract_u_3_8__s2(uint64 instruction) |
89a955e8 AM |
1386 | { |
1387 | uint64 value = 0; | |
1388 | value |= extract_bits(instruction, 3, 1) << 3; | |
1389 | value |= extract_bits(instruction, 8, 1) << 2; | |
1390 | return value; | |
1391 | } | |
1392 | ||
1393 | ||
2dc0c175 | 1394 | static uint64 extract_fd_15_14_13_12_11(uint64 instruction) |
89a955e8 AM |
1395 | { |
1396 | uint64 value = 0; | |
1397 | value |= extract_bits(instruction, 11, 5); | |
1398 | return value; | |
1399 | } | |
1400 | ||
1401 | ||
2dc0c175 | 1402 | static uint64 extract_u_4_3_2_1_0__s2(uint64 instruction) |
89a955e8 AM |
1403 | { |
1404 | uint64 value = 0; | |
1405 | value |= extract_bits(instruction, 0, 5) << 2; | |
1406 | return value; | |
1407 | } | |
1408 | ||
1409 | ||
2dc0c175 | 1410 | static uint64 extract_rtz4_9_7_6_5(uint64 instruction) |
89a955e8 AM |
1411 | { |
1412 | uint64 value = 0; | |
1413 | value |= extract_bits(instruction, 5, 3); | |
1414 | value |= extract_bits(instruction, 9, 1) << 3; | |
1415 | return value; | |
1416 | } | |
1417 | ||
1418 | ||
2dc0c175 | 1419 | static uint64 extract_sel_15_14_13_12_11(uint64 instruction) |
89a955e8 AM |
1420 | { |
1421 | uint64 value = 0; | |
1422 | value |= extract_bits(instruction, 11, 5); | |
1423 | return value; | |
1424 | } | |
1425 | ||
1426 | ||
2dc0c175 | 1427 | static uint64 extract_ct_25_24_23_22_21(uint64 instruction) |
89a955e8 AM |
1428 | { |
1429 | uint64 value = 0; | |
1430 | value |= extract_bits(instruction, 21, 5); | |
1431 | return value; | |
1432 | } | |
1433 | ||
1434 | ||
2dc0c175 | 1435 | static uint64 extract_u_20_to_2__s2(uint64 instruction) |
89a955e8 AM |
1436 | { |
1437 | uint64 value = 0; | |
1438 | value |= extract_bits(instruction, 2, 19) << 2; | |
1439 | return value; | |
1440 | } | |
1441 | ||
1442 | ||
2dc0c175 | 1443 | static int64 extract_s__se3_4_2_1_0(uint64 instruction) |
89a955e8 AM |
1444 | { |
1445 | int64 value = 0; | |
1446 | value |= extract_bits(instruction, 0, 3); | |
1447 | value |= extract_bits(instruction, 4, 1) << 3; | |
1448 | value = sign_extend(value, 3); | |
1449 | return value; | |
1450 | } | |
1451 | ||
1452 | ||
2dc0c175 | 1453 | static uint64 extract_u_3_2_1_0__s1(uint64 instruction) |
89a955e8 AM |
1454 | { |
1455 | uint64 value = 0; | |
1456 | value |= extract_bits(instruction, 0, 4) << 1; | |
1457 | return value; | |
1458 | } | |
1459 | ||
1460 | ||
89a955e8 | 1461 | |
655fc22f | 1462 | static bool ADDIU_32__cond(uint64 instruction) |
89a955e8 AM |
1463 | { |
1464 | uint64 rt = extract_rt_25_24_23_22_21(instruction); | |
1465 | return rt != 0; | |
1466 | } | |
1467 | ||
1468 | ||
655fc22f | 1469 | static bool ADDIU_RS5__cond(uint64 instruction) |
89a955e8 AM |
1470 | { |
1471 | uint64 rt = extract_rt_9_8_7_6_5(instruction); | |
1472 | return rt != 0; | |
1473 | } | |
1474 | ||
1475 | ||
655fc22f | 1476 | static bool BALRSC_cond(uint64 instruction) |
89a955e8 AM |
1477 | { |
1478 | uint64 rt = extract_rt_25_24_23_22_21(instruction); | |
1479 | return rt != 0; | |
1480 | } | |
1481 | ||
1482 | ||
655fc22f | 1483 | static bool BEQC_16__cond(uint64 instruction) |
89a955e8 AM |
1484 | { |
1485 | uint64 rs3 = extract_rs3_6_5_4(instruction); | |
1486 | uint64 rt3 = extract_rt3_9_8_7(instruction); | |
11b9732a | 1487 | uint64 u = extract_u_3_2_1_0__s1(instruction); |
89a955e8 AM |
1488 | return rs3 < rt3 && u != 0; |
1489 | } | |
1490 | ||
1491 | ||
655fc22f | 1492 | static bool BNEC_16__cond(uint64 instruction) |
89a955e8 AM |
1493 | { |
1494 | uint64 rs3 = extract_rs3_6_5_4(instruction); | |
1495 | uint64 rt3 = extract_rt3_9_8_7(instruction); | |
11b9732a | 1496 | uint64 u = extract_u_3_2_1_0__s1(instruction); |
89a955e8 AM |
1497 | return rs3 >= rt3 && u != 0; |
1498 | } | |
1499 | ||
1500 | ||
655fc22f | 1501 | static bool MOVE_cond(uint64 instruction) |
89a955e8 AM |
1502 | { |
1503 | uint64 rt = extract_rt_9_8_7_6_5(instruction); | |
1504 | return rt != 0; | |
1505 | } | |
1506 | ||
1507 | ||
655fc22f | 1508 | static bool P16_BR1_cond(uint64 instruction) |
89a955e8 | 1509 | { |
11b9732a | 1510 | uint64 u = extract_u_3_2_1_0__s1(instruction); |
89a955e8 AM |
1511 | return u != 0; |
1512 | } | |
1513 | ||
1514 | ||
655fc22f | 1515 | static bool PREF_S9__cond(uint64 instruction) |
89a955e8 AM |
1516 | { |
1517 | uint64 hint = extract_hint_25_24_23_22_21(instruction); | |
1518 | return hint != 31; | |
1519 | } | |
1520 | ||
1521 | ||
655fc22f | 1522 | static bool PREFE_cond(uint64 instruction) |
89a955e8 AM |
1523 | { |
1524 | uint64 hint = extract_hint_25_24_23_22_21(instruction); | |
1525 | return hint != 31; | |
1526 | } | |
1527 | ||
1528 | ||
655fc22f | 1529 | static bool SLTU_cond(uint64 instruction) |
89a955e8 | 1530 | { |
b4c5d21c | 1531 | uint64 rd = extract_rd_15_14_13_12_11(instruction); |
89a955e8 AM |
1532 | return rd != 0; |
1533 | } | |
1534 | ||
1535 | ||
1536 | ||
1537 | /* | |
1538 | * ABS.D fd, fs - Floating Point Absolute Value | |
1539 | * | |
1540 | * 3 2 1 | |
1541 | * 10987654321098765432109876543210 | |
1542 | * 010001 00000 000101 | |
1543 | * fmt ----- | |
1544 | * fs ----- | |
1545 | * fd ----- | |
1546 | */ | |
7def8a4b | 1547 | static char *ABS_D(uint64 instruction, Dis_info *info) |
89a955e8 | 1548 | { |
17ce2f00 | 1549 | uint64 fd_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 1550 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 1551 | |
3f2aec07 ML |
1552 | const char *fs = FPR(fs_value, info); |
1553 | const char *fd = FPR(fd_value, info); | |
89a955e8 | 1554 | |
c5231692 | 1555 | return img_format("ABS.D %s, %s", fd, fs); |
89a955e8 AM |
1556 | } |
1557 | ||
1558 | ||
1559 | /* | |
1560 | * ABS.S fd, fs - Floating Point Absolute Value | |
1561 | * | |
1562 | * 3 2 1 | |
1563 | * 10987654321098765432109876543210 | |
1564 | * 010001 00000 000101 | |
1565 | * fmt ----- | |
1566 | * fd ----- | |
1567 | * fs ----- | |
1568 | */ | |
7def8a4b | 1569 | static char *ABS_S(uint64 instruction, Dis_info *info) |
89a955e8 | 1570 | { |
17ce2f00 | 1571 | uint64 fd_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 1572 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 1573 | |
3f2aec07 ML |
1574 | const char *fs = FPR(fs_value, info); |
1575 | const char *fd = FPR(fd_value, info); | |
89a955e8 | 1576 | |
c5231692 | 1577 | return img_format("ABS.S %s, %s", fd, fs); |
89a955e8 AM |
1578 | } |
1579 | ||
1580 | ||
1581 | /* | |
fc95c241 AM |
1582 | * [DSP] ABSQ_S.PH rt, rs - Find absolute value of two fractional halfwords |
1583 | * with 16-bit saturation | |
89a955e8 AM |
1584 | * |
1585 | * 3 2 1 | |
1586 | * 10987654321098765432109876543210 | |
1587 | * 001000 0001000100111111 | |
1588 | * rt ----- | |
1589 | * rs ----- | |
1590 | */ | |
7def8a4b | 1591 | static char *ABSQ_S_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
1592 | { |
1593 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
1594 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
1595 | ||
3f2aec07 ML |
1596 | const char *rt = GPR(rt_value, info); |
1597 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 1598 | |
c5231692 | 1599 | return img_format("ABSQ_S.PH %s, %s", rt, rs); |
89a955e8 AM |
1600 | } |
1601 | ||
1602 | ||
1603 | /* | |
fc95c241 AM |
1604 | * [DSP] ABSQ_S.QB rt, rs - Find absolute value of four fractional byte values |
1605 | * with 8-bit saturation | |
89a955e8 AM |
1606 | * |
1607 | * 3 2 1 | |
1608 | * 10987654321098765432109876543210 | |
1609 | * 001000 0000000100111111 | |
1610 | * rt ----- | |
1611 | * rs ----- | |
1612 | */ | |
7def8a4b | 1613 | static char *ABSQ_S_QB(uint64 instruction, Dis_info *info) |
89a955e8 AM |
1614 | { |
1615 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
1616 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
1617 | ||
3f2aec07 ML |
1618 | const char *rt = GPR(rt_value, info); |
1619 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 1620 | |
c5231692 | 1621 | return img_format("ABSQ_S.QB %s, %s", rt, rs); |
89a955e8 AM |
1622 | } |
1623 | ||
1624 | ||
1625 | /* | |
fc95c241 AM |
1626 | * [DSP] ABSQ_S.W rt, rs - Find absolute value of fractional word with 32-bit |
1627 | * saturation | |
89a955e8 AM |
1628 | * |
1629 | * 3 2 1 | |
1630 | * 10987654321098765432109876543210 | |
1631 | * 001000 0010000100111111 | |
1632 | * rt ----- | |
1633 | * rs ----- | |
1634 | */ | |
7def8a4b | 1635 | static char *ABSQ_S_W(uint64 instruction, Dis_info *info) |
89a955e8 AM |
1636 | { |
1637 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
1638 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
1639 | ||
3f2aec07 ML |
1640 | const char *rt = GPR(rt_value, info); |
1641 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 1642 | |
c5231692 | 1643 | return img_format("ABSQ_S.W %s, %s", rt, rs); |
89a955e8 AM |
1644 | } |
1645 | ||
1646 | ||
1647 | /* | |
1648 | * | |
1649 | * | |
1650 | * 3 2 1 | |
1651 | * 10987654321098765432109876543210 | |
1652 | * 001000 0010000100111111 | |
1653 | * rt ----- | |
1654 | * rs ----- | |
1655 | */ | |
7def8a4b | 1656 | static char *ACLR(uint64 instruction, Dis_info *info) |
89a955e8 AM |
1657 | { |
1658 | uint64 bit_value = extract_bit_23_22_21(instruction); | |
89a955e8 | 1659 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 1660 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 1661 | |
3f2aec07 | 1662 | const char *rs = GPR(rs_value, info); |
89a955e8 | 1663 | |
4066c152 ML |
1664 | return img_format("ACLR 0x%" PRIx64 ", %" PRId64 "(%s)", |
1665 | bit_value, s_value, rs); | |
89a955e8 AM |
1666 | } |
1667 | ||
1668 | ||
1669 | /* | |
1670 | * | |
1671 | * | |
1672 | * 3 2 1 | |
1673 | * 10987654321098765432109876543210 | |
1674 | * 001000 0010000100111111 | |
1675 | * rt ----- | |
1676 | * rs ----- | |
1677 | */ | |
7def8a4b | 1678 | static char *ADD(uint64 instruction, Dis_info *info) |
89a955e8 AM |
1679 | { |
1680 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 1681 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 1682 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 1683 | |
3f2aec07 ML |
1684 | const char *rd = GPR(rd_value, info); |
1685 | const char *rs = GPR(rs_value, info); | |
1686 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 1687 | |
c5231692 | 1688 | return img_format("ADD %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
1689 | } |
1690 | ||
1691 | ||
1692 | /* | |
1693 | * ADD.D fd, fs, ft - Floating Point Add | |
1694 | * | |
1695 | * 3 2 1 | |
1696 | * 10987654321098765432109876543210 | |
1697 | * 010001 000101 | |
1698 | * fmt ----- | |
1699 | * ft ----- | |
1700 | * fs ----- | |
1701 | * fd ----- | |
1702 | */ | |
7def8a4b | 1703 | static char *ADD_D(uint64 instruction, Dis_info *info) |
89a955e8 | 1704 | { |
17ce2f00 | 1705 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 1706 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 1707 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 1708 | |
3f2aec07 ML |
1709 | const char *ft = FPR(ft_value, info); |
1710 | const char *fs = FPR(fs_value, info); | |
1711 | const char *fd = FPR(fd_value, info); | |
89a955e8 | 1712 | |
c5231692 | 1713 | return img_format("ADD.D %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
1714 | } |
1715 | ||
1716 | ||
1717 | /* | |
1718 | * ADD.S fd, fs, ft - Floating Point Add | |
1719 | * | |
1720 | * 3 2 1 | |
1721 | * 10987654321098765432109876543210 | |
1722 | * 010001 000101 | |
1723 | * fmt ----- | |
1724 | * ft ----- | |
1725 | * fs ----- | |
1726 | * fd ----- | |
1727 | */ | |
7def8a4b | 1728 | static char *ADD_S(uint64 instruction, Dis_info *info) |
89a955e8 | 1729 | { |
17ce2f00 | 1730 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 1731 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 1732 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 1733 | |
3f2aec07 ML |
1734 | const char *ft = FPR(ft_value, info); |
1735 | const char *fs = FPR(fs_value, info); | |
1736 | const char *fd = FPR(fd_value, info); | |
89a955e8 | 1737 | |
c5231692 | 1738 | return img_format("ADD.S %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
1739 | } |
1740 | ||
1741 | ||
1742 | /* | |
1743 | * | |
1744 | * | |
1745 | * 3 2 1 | |
1746 | * 10987654321098765432109876543210 | |
1747 | * 001000 0010000100111111 | |
1748 | * rt ----- | |
1749 | * rs ----- | |
1750 | */ | |
7def8a4b | 1751 | static char *ADDIU_32_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
1752 | { |
1753 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 1754 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 1755 | uint64 u_value = extract_u_15_to_0(instruction); |
89a955e8 | 1756 | |
3f2aec07 ML |
1757 | const char *rt = GPR(rt_value, info); |
1758 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 1759 | |
4066c152 | 1760 | return img_format("ADDIU %s, %s, 0x%" PRIx64, rt, rs, u_value); |
89a955e8 AM |
1761 | } |
1762 | ||
1763 | ||
1764 | /* | |
1765 | * | |
1766 | * | |
1767 | * 3 2 1 | |
1768 | * 10987654321098765432109876543210 | |
1769 | * 001000 0010000100111111 | |
1770 | * rt ----- | |
1771 | * rs ----- | |
1772 | */ | |
7def8a4b | 1773 | static char *ADDIU_48_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
1774 | { |
1775 | uint64 rt_value = extract_rt_41_40_39_38_37(instruction); | |
d3605cc0 | 1776 | int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction); |
89a955e8 | 1777 | |
3f2aec07 | 1778 | const char *rt = GPR(rt_value, info); |
89a955e8 | 1779 | |
4066c152 | 1780 | return img_format("ADDIU %s, %" PRId64, rt, s_value); |
89a955e8 AM |
1781 | } |
1782 | ||
1783 | ||
1784 | /* | |
1785 | * | |
1786 | * | |
1787 | * 3 2 1 | |
1788 | * 10987654321098765432109876543210 | |
1789 | * 001000 0010000100111111 | |
1790 | * rt ----- | |
1791 | * rs ----- | |
1792 | */ | |
7def8a4b | 1793 | static char *ADDIU_GP48_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
1794 | { |
1795 | uint64 rt_value = extract_rt_41_40_39_38_37(instruction); | |
d3605cc0 | 1796 | int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction); |
89a955e8 | 1797 | |
3f2aec07 | 1798 | const char *rt = GPR(rt_value, info); |
89a955e8 | 1799 | |
4066c152 | 1800 | return img_format("ADDIU %s, $%d, %" PRId64, rt, 28, s_value); |
89a955e8 AM |
1801 | } |
1802 | ||
1803 | ||
1804 | /* | |
1805 | * | |
1806 | * | |
1807 | * 3 2 1 | |
1808 | * 10987654321098765432109876543210 | |
1809 | * 001000 0010000100111111 | |
1810 | * rt ----- | |
1811 | * rs ----- | |
1812 | */ | |
7def8a4b | 1813 | static char *ADDIU_GP_B_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
1814 | { |
1815 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
1816 | uint64 u_value = extract_u_17_to_0(instruction); | |
1817 | ||
3f2aec07 | 1818 | const char *rt = GPR(rt_value, info); |
89a955e8 | 1819 | |
4066c152 | 1820 | return img_format("ADDIU %s, $%d, 0x%" PRIx64, rt, 28, u_value); |
89a955e8 AM |
1821 | } |
1822 | ||
1823 | ||
1824 | /* | |
1825 | * | |
1826 | * | |
1827 | * 3 2 1 | |
1828 | * 10987654321098765432109876543210 | |
1829 | * 001000 0010000100111111 | |
1830 | * rt ----- | |
1831 | * rs ----- | |
1832 | */ | |
7def8a4b | 1833 | static char *ADDIU_GP_W_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
1834 | { |
1835 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
11b9732a | 1836 | uint64 u_value = extract_u_20_to_2__s2(instruction); |
89a955e8 | 1837 | |
3f2aec07 | 1838 | const char *rt = GPR(rt_value, info); |
89a955e8 | 1839 | |
4066c152 | 1840 | return img_format("ADDIU %s, $%d, 0x%" PRIx64, rt, 28, u_value); |
89a955e8 AM |
1841 | } |
1842 | ||
1843 | ||
1844 | /* | |
1845 | * | |
1846 | * | |
1847 | * 3 2 1 | |
1848 | * 10987654321098765432109876543210 | |
1849 | * 001000 0010000100111111 | |
1850 | * rt ----- | |
1851 | * rs ----- | |
1852 | */ | |
7def8a4b | 1853 | static char *ADDIU_NEG_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
1854 | { |
1855 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 1856 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 1857 | uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 1858 | |
3f2aec07 ML |
1859 | const char *rt = GPR(rt_value, info); |
1860 | const char *rs = GPR(rs_value, info); | |
4066c152 | 1861 | int64 u = neg_copy(u_value); |
89a955e8 | 1862 | |
4066c152 | 1863 | return img_format("ADDIU %s, %s, %" PRId64, rt, rs, u); |
89a955e8 AM |
1864 | } |
1865 | ||
1866 | ||
1867 | /* | |
1868 | * | |
1869 | * | |
1870 | * 3 2 1 | |
1871 | * 10987654321098765432109876543210 | |
1872 | * 001000 0010000100111111 | |
1873 | * rt ----- | |
1874 | * rs ----- | |
1875 | */ | |
7def8a4b | 1876 | static char *ADDIU_R1_SP_(uint64 instruction, Dis_info *info) |
89a955e8 | 1877 | { |
11b9732a | 1878 | uint64 u_value = extract_u_5_4_3_2_1_0__s2(instruction); |
89a955e8 AM |
1879 | uint64 rt3_value = extract_rt3_9_8_7(instruction); |
1880 | ||
3f2aec07 | 1881 | const char *rt3 = GPR(decode_gpr_gpr3(rt3_value, info), info); |
89a955e8 | 1882 | |
4066c152 | 1883 | return img_format("ADDIU %s, $%d, 0x%" PRIx64, rt3, 29, u_value); |
89a955e8 AM |
1884 | } |
1885 | ||
1886 | ||
1887 | /* | |
1888 | * | |
1889 | * | |
1890 | * 3 2 1 | |
1891 | * 10987654321098765432109876543210 | |
1892 | * 001000 0010000100111111 | |
1893 | * rt ----- | |
1894 | * rs ----- | |
1895 | */ | |
7def8a4b | 1896 | static char *ADDIU_R2_(uint64 instruction, Dis_info *info) |
89a955e8 | 1897 | { |
89a955e8 AM |
1898 | uint64 rt3_value = extract_rt3_9_8_7(instruction); |
1899 | uint64 rs3_value = extract_rs3_6_5_4(instruction); | |
75199b40 | 1900 | uint64 u_value = extract_u_2_1_0__s2(instruction); |
89a955e8 | 1901 | |
3f2aec07 ML |
1902 | const char *rt3 = GPR(decode_gpr_gpr3(rt3_value, info), info); |
1903 | const char *rs3 = GPR(decode_gpr_gpr3(rs3_value, info), info); | |
89a955e8 | 1904 | |
4066c152 | 1905 | return img_format("ADDIU %s, %s, 0x%" PRIx64, rt3, rs3, u_value); |
89a955e8 AM |
1906 | } |
1907 | ||
1908 | ||
1909 | /* | |
1910 | * ADDIU[RS5] rt, s5 - Add Signed Word and Set Carry Bit | |
1911 | * | |
1912 | * 5432109876543210 | |
1913 | * 100100 1 | |
1914 | * rt ----- | |
1915 | * s - --- | |
1916 | */ | |
7def8a4b | 1917 | static char *ADDIU_RS5_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
1918 | { |
1919 | uint64 rt_value = extract_rt_9_8_7_6_5(instruction); | |
d3605cc0 | 1920 | int64 s_value = extract_s__se3_4_2_1_0(instruction); |
89a955e8 | 1921 | |
3f2aec07 | 1922 | const char *rt = GPR(rt_value, info); |
89a955e8 | 1923 | |
4066c152 | 1924 | return img_format("ADDIU %s, %" PRId64, rt, s_value); |
89a955e8 AM |
1925 | } |
1926 | ||
1927 | ||
1928 | /* | |
1929 | * | |
1930 | * | |
1931 | * 3 2 1 | |
1932 | * 10987654321098765432109876543210 | |
1933 | * 001000 x1110000101 | |
1934 | * rt ----- | |
1935 | * rs ----- | |
1936 | * rd ----- | |
1937 | */ | |
7def8a4b | 1938 | static char *ADDIUPC_32_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
1939 | { |
1940 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
d3605cc0 | 1941 | int64 s_value = extract_s__se21_0_20_to_1_s1(instruction); |
89a955e8 | 1942 | |
3f2aec07 | 1943 | const char *rt = GPR(rt_value, info); |
22e7b52a | 1944 | g_autofree char *s = ADDRESS(s_value, 4, info); |
89a955e8 | 1945 | |
c5231692 | 1946 | return img_format("ADDIUPC %s, %s", rt, s); |
89a955e8 AM |
1947 | } |
1948 | ||
1949 | ||
1950 | /* | |
1951 | * | |
1952 | * | |
1953 | * 3 2 1 | |
1954 | * 10987654321098765432109876543210 | |
1955 | * 001000 x1110000101 | |
1956 | * rt ----- | |
1957 | * rs ----- | |
1958 | * rd ----- | |
1959 | */ | |
7def8a4b | 1960 | static char *ADDIUPC_48_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
1961 | { |
1962 | uint64 rt_value = extract_rt_41_40_39_38_37(instruction); | |
d3605cc0 | 1963 | int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction); |
89a955e8 | 1964 | |
3f2aec07 | 1965 | const char *rt = GPR(rt_value, info); |
22e7b52a | 1966 | g_autofree char *s = ADDRESS(s_value, 6, info); |
89a955e8 | 1967 | |
c5231692 | 1968 | return img_format("ADDIUPC %s, %s", rt, s); |
89a955e8 AM |
1969 | } |
1970 | ||
1971 | ||
1972 | /* | |
fc95c241 | 1973 | * [DSP] ADDQ.PH rd, rt, rs - Add fractional halfword vectors |
89a955e8 AM |
1974 | * |
1975 | * 3 2 1 | |
1976 | * 10987654321098765432109876543210 | |
1977 | * 001000 00000001101 | |
1978 | * rt ----- | |
1979 | * rs ----- | |
1980 | * rd ----- | |
1981 | */ | |
7def8a4b | 1982 | static char *ADDQ_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
1983 | { |
1984 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 1985 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 1986 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 1987 | |
3f2aec07 ML |
1988 | const char *rd = GPR(rd_value, info); |
1989 | const char *rs = GPR(rs_value, info); | |
1990 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 1991 | |
c5231692 | 1992 | return img_format("ADDQ.PH %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
1993 | } |
1994 | ||
1995 | ||
1996 | /* | |
fc95c241 AM |
1997 | * [DSP] ADDQ_S.PH rd, rt, rs - Add fractional halfword vectors with 16-bit |
1998 | * saturation | |
89a955e8 AM |
1999 | * |
2000 | * 3 2 1 | |
2001 | * 10987654321098765432109876543210 | |
2002 | * 001000 10000001101 | |
2003 | * rt ----- | |
2004 | * rs ----- | |
2005 | * rd ----- | |
2006 | */ | |
7def8a4b | 2007 | static char *ADDQ_S_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
2008 | { |
2009 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 2010 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 2011 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 2012 | |
3f2aec07 ML |
2013 | const char *rd = GPR(rd_value, info); |
2014 | const char *rs = GPR(rs_value, info); | |
2015 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 2016 | |
c5231692 | 2017 | return img_format("ADDQ_S.PH %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
2018 | } |
2019 | ||
2020 | ||
2021 | /* | |
fc95c241 | 2022 | * [DSP] ADDQ_S.W rd, rt, rs - Add fractional words with 32-bit saturation |
89a955e8 AM |
2023 | * |
2024 | * 3 2 1 | |
2025 | * 10987654321098765432109876543210 | |
2026 | * 001000 x1100000101 | |
2027 | * rt ----- | |
2028 | * rs ----- | |
2029 | * rd ----- | |
2030 | */ | |
7def8a4b | 2031 | static char *ADDQ_S_W(uint64 instruction, Dis_info *info) |
89a955e8 AM |
2032 | { |
2033 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 2034 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 2035 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 2036 | |
3f2aec07 ML |
2037 | const char *rd = GPR(rd_value, info); |
2038 | const char *rs = GPR(rs_value, info); | |
2039 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 2040 | |
c5231692 | 2041 | return img_format("ADDQ_S.W %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
2042 | } |
2043 | ||
2044 | ||
2045 | /* | |
fc95c241 AM |
2046 | * [DSP] ADDQH.PH rd, rt, rs - Add fractional halfword vectors and shift |
2047 | * right to halve results | |
89a955e8 AM |
2048 | * |
2049 | * 3 2 1 | |
2050 | * 10987654321098765432109876543210 | |
2051 | * 001000 00001001101 | |
2052 | * rt ----- | |
2053 | * rs ----- | |
2054 | * rd ----- | |
2055 | */ | |
7def8a4b | 2056 | static char *ADDQH_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
2057 | { |
2058 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 2059 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 2060 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 2061 | |
3f2aec07 ML |
2062 | const char *rd = GPR(rd_value, info); |
2063 | const char *rs = GPR(rs_value, info); | |
2064 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 2065 | |
c5231692 | 2066 | return img_format("ADDQH.PH %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
2067 | } |
2068 | ||
2069 | ||
2070 | /* | |
fc95c241 AM |
2071 | * [DSP] ADDQH_R.PH rd, rt, rs - Add fractional halfword vectors and shift |
2072 | * right to halve results with rounding | |
89a955e8 AM |
2073 | * |
2074 | * 3 2 1 | |
2075 | * 10987654321098765432109876543210 | |
2076 | * 001000 10001001101 | |
2077 | * rt ----- | |
2078 | * rs ----- | |
2079 | * rd ----- | |
2080 | */ | |
7def8a4b | 2081 | static char *ADDQH_R_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
2082 | { |
2083 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 2084 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 2085 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 2086 | |
3f2aec07 ML |
2087 | const char *rd = GPR(rd_value, info); |
2088 | const char *rs = GPR(rs_value, info); | |
2089 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 2090 | |
c5231692 | 2091 | return img_format("ADDQH_R.PH %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
2092 | } |
2093 | ||
2094 | ||
2095 | /* | |
fc95c241 AM |
2096 | * [DSP] ADDQH_R.W rd, rt, rs - Add fractional words and shift right to halve |
2097 | * results with rounding | |
89a955e8 AM |
2098 | * |
2099 | * 3 2 1 | |
2100 | * 10987654321098765432109876543210 | |
2101 | * 001000 00010001101 | |
2102 | * rt ----- | |
2103 | * rs ----- | |
2104 | * rd ----- | |
2105 | */ | |
7def8a4b | 2106 | static char *ADDQH_R_W(uint64 instruction, Dis_info *info) |
89a955e8 AM |
2107 | { |
2108 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 2109 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 2110 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 2111 | |
3f2aec07 ML |
2112 | const char *rd = GPR(rd_value, info); |
2113 | const char *rs = GPR(rs_value, info); | |
2114 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 2115 | |
c5231692 | 2116 | return img_format("ADDQH_R.W %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
2117 | } |
2118 | ||
2119 | ||
2120 | /* | |
fc95c241 AM |
2121 | * [DSP] ADDQH.W rd, rt, rs - Add fractional words and shift right to halve |
2122 | * results | |
89a955e8 AM |
2123 | * |
2124 | * 3 2 1 | |
2125 | * 10987654321098765432109876543210 | |
2126 | * 001000 10010001101 | |
2127 | * rt ----- | |
2128 | * rs ----- | |
2129 | * rd ----- | |
2130 | */ | |
7def8a4b | 2131 | static char *ADDQH_W(uint64 instruction, Dis_info *info) |
89a955e8 AM |
2132 | { |
2133 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 2134 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 2135 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 2136 | |
3f2aec07 ML |
2137 | const char *rd = GPR(rd_value, info); |
2138 | const char *rs = GPR(rs_value, info); | |
2139 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 2140 | |
c5231692 | 2141 | return img_format("ADDQH.W %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
2142 | } |
2143 | ||
2144 | ||
2145 | /* | |
fc95c241 | 2146 | * [DSP] ADDSC rd, rt, rs - Add two signed words and set carry bit |
89a955e8 AM |
2147 | * |
2148 | * 3 2 1 | |
2149 | * 10987654321098765432109876543210 | |
2150 | * 001000 x1110000101 | |
2151 | * rt ----- | |
2152 | * rs ----- | |
2153 | * rd ----- | |
2154 | */ | |
7def8a4b | 2155 | static char *ADDSC(uint64 instruction, Dis_info *info) |
89a955e8 AM |
2156 | { |
2157 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 2158 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 2159 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 2160 | |
3f2aec07 ML |
2161 | const char *rd = GPR(rd_value, info); |
2162 | const char *rs = GPR(rs_value, info); | |
2163 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 2164 | |
c5231692 | 2165 | return img_format("ADDSC %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
2166 | } |
2167 | ||
2168 | ||
2169 | /* | |
2170 | * ADDU[16] rd3, rs3, rt3 - | |
2171 | * | |
2172 | * 5432109876543210 | |
2173 | * 101100 0 | |
2174 | * rt3 --- | |
2175 | * rs3 --- | |
2176 | * rd3 --- | |
2177 | */ | |
7def8a4b | 2178 | static char *ADDU_16_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
2179 | { |
2180 | uint64 rt3_value = extract_rt3_9_8_7(instruction); | |
2181 | uint64 rs3_value = extract_rs3_6_5_4(instruction); | |
2182 | uint64 rd3_value = extract_rd3_3_2_1(instruction); | |
2183 | ||
3f2aec07 ML |
2184 | const char *rt3 = GPR(decode_gpr_gpr3(rt3_value, info), info); |
2185 | const char *rs3 = GPR(decode_gpr_gpr3(rs3_value, info), info); | |
2186 | const char *rd3 = GPR(decode_gpr_gpr3(rd3_value, info), info); | |
89a955e8 | 2187 | |
c5231692 | 2188 | return img_format("ADDU %s, %s, %s", rd3, rs3, rt3); |
89a955e8 AM |
2189 | } |
2190 | ||
2191 | ||
2192 | /* | |
2193 | * | |
2194 | * | |
2195 | * 3 2 1 | |
2196 | * 10987654321098765432109876543210 | |
2197 | * 001000 x1110000101 | |
2198 | * rt ----- | |
2199 | * rs ----- | |
2200 | * rd ----- | |
2201 | */ | |
7def8a4b | 2202 | static char *ADDU_32_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
2203 | { |
2204 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 2205 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 2206 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 2207 | |
3f2aec07 ML |
2208 | const char *rd = GPR(rd_value, info); |
2209 | const char *rs = GPR(rs_value, info); | |
2210 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 2211 | |
c5231692 | 2212 | return img_format("ADDU %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
2213 | } |
2214 | ||
2215 | ||
2216 | /* | |
2217 | * | |
2218 | * | |
2219 | * 3 2 1 | |
2220 | * 10987654321098765432109876543210 | |
2221 | * 001000 x1110000101 | |
2222 | * rt ----- | |
2223 | * rs ----- | |
2224 | * rd ----- | |
2225 | */ | |
7def8a4b | 2226 | static char *ADDU_4X4_(uint64 instruction, Dis_info *info) |
89a955e8 | 2227 | { |
89a955e8 | 2228 | uint64 rt4_value = extract_rt4_9_7_6_5(instruction); |
86b5f803 | 2229 | uint64 rs4_value = extract_rs4_4_2_1_0(instruction); |
89a955e8 | 2230 | |
3f2aec07 ML |
2231 | const char *rs4 = GPR(decode_gpr_gpr4(rs4_value, info), info); |
2232 | const char *rt4 = GPR(decode_gpr_gpr4(rt4_value, info), info); | |
89a955e8 | 2233 | |
c5231692 | 2234 | return img_format("ADDU %s, %s", rs4, rt4); |
89a955e8 AM |
2235 | } |
2236 | ||
2237 | ||
2238 | /* | |
fc95c241 | 2239 | * [DSP] ADDU.PH rd, rt, rs - Add two pairs of unsigned halfwords |
89a955e8 AM |
2240 | * |
2241 | * 3 2 1 | |
2242 | * 10987654321098765432109876543210 | |
2243 | * 001000 00100001101 | |
2244 | * rt ----- | |
2245 | * rs ----- | |
2246 | * rd ----- | |
2247 | */ | |
7def8a4b | 2248 | static char *ADDU_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
2249 | { |
2250 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 2251 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 2252 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 2253 | |
3f2aec07 ML |
2254 | const char *rd = GPR(rd_value, info); |
2255 | const char *rs = GPR(rs_value, info); | |
2256 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 2257 | |
c5231692 | 2258 | return img_format("ADDU.PH %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
2259 | } |
2260 | ||
2261 | ||
2262 | /* | |
2263 | * ADDU.QB rd, rt, rs - Unsigned Add Quad Byte Vectors | |
2264 | * | |
2265 | * 3 2 1 | |
2266 | * 10987654321098765432109876543210 | |
2267 | * 001000 00011001101 | |
2268 | * rt ----- | |
2269 | * rs ----- | |
2270 | * rd ----- | |
2271 | */ | |
7def8a4b | 2272 | static char *ADDU_QB(uint64 instruction, Dis_info *info) |
89a955e8 AM |
2273 | { |
2274 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 2275 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 2276 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 2277 | |
3f2aec07 ML |
2278 | const char *rd = GPR(rd_value, info); |
2279 | const char *rs = GPR(rs_value, info); | |
2280 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 2281 | |
c5231692 | 2282 | return img_format("ADDU.QB %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
2283 | } |
2284 | ||
2285 | ||
2286 | /* | |
fc95c241 AM |
2287 | * [DSP] ADDU_S.PH rd, rt, rs - Add two pairs of unsigned halfwords with 16-bit |
2288 | * saturation | |
89a955e8 AM |
2289 | * |
2290 | * 3 2 1 | |
2291 | * 10987654321098765432109876543210 | |
2292 | * 001000 10100001101 | |
2293 | * rt ----- | |
2294 | * rs ----- | |
2295 | * rd ----- | |
2296 | */ | |
7def8a4b | 2297 | static char *ADDU_S_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
2298 | { |
2299 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 2300 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 2301 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 2302 | |
3f2aec07 ML |
2303 | const char *rd = GPR(rd_value, info); |
2304 | const char *rs = GPR(rs_value, info); | |
2305 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 2306 | |
c5231692 | 2307 | return img_format("ADDU_S.PH %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
2308 | } |
2309 | ||
2310 | ||
2311 | /* | |
2312 | * ADDU_S.QB rd, rt, rs - Unsigned Add Quad Byte Vectors | |
2313 | * | |
2314 | * 3 2 1 | |
2315 | * 10987654321098765432109876543210 | |
2316 | * 001000 10011001101 | |
2317 | * rt ----- | |
2318 | * rs ----- | |
2319 | * rd ----- | |
2320 | */ | |
7def8a4b | 2321 | static char *ADDU_S_QB(uint64 instruction, Dis_info *info) |
89a955e8 AM |
2322 | { |
2323 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 2324 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 2325 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 2326 | |
3f2aec07 ML |
2327 | const char *rd = GPR(rd_value, info); |
2328 | const char *rs = GPR(rs_value, info); | |
2329 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 2330 | |
c5231692 | 2331 | return img_format("ADDU_S.QB %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
2332 | } |
2333 | ||
2334 | ||
2335 | /* | |
2336 | * ADDUH.QB rd, rt, rs - Unsigned Add Vector Quad-Bytes And Right Shift | |
2337 | * to Halve Results | |
2338 | * | |
2339 | * 3 2 1 | |
2340 | * 10987654321098765432109876543210 | |
2341 | * 001000 00101001101 | |
2342 | * rt ----- | |
2343 | * rs ----- | |
2344 | * rd ----- | |
2345 | */ | |
7def8a4b | 2346 | static char *ADDUH_QB(uint64 instruction, Dis_info *info) |
89a955e8 AM |
2347 | { |
2348 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 2349 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 2350 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 2351 | |
3f2aec07 ML |
2352 | const char *rd = GPR(rd_value, info); |
2353 | const char *rs = GPR(rs_value, info); | |
2354 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 2355 | |
c5231692 | 2356 | return img_format("ADDUH.QB %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
2357 | } |
2358 | ||
2359 | ||
2360 | /* | |
2361 | * ADDUH_R.QB rd, rt, rs - Unsigned Add Vector Quad-Bytes And Right Shift | |
2362 | * to Halve Results | |
2363 | * | |
2364 | * 3 2 1 | |
2365 | * 10987654321098765432109876543210 | |
2366 | * 001000 10101001101 | |
2367 | * rt ----- | |
2368 | * rs ----- | |
2369 | * rd ----- | |
2370 | */ | |
7def8a4b | 2371 | static char *ADDUH_R_QB(uint64 instruction, Dis_info *info) |
89a955e8 AM |
2372 | { |
2373 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 2374 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 2375 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 2376 | |
3f2aec07 ML |
2377 | const char *rd = GPR(rd_value, info); |
2378 | const char *rs = GPR(rs_value, info); | |
2379 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 2380 | |
c5231692 | 2381 | return img_format("ADDUH_R.QB %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
2382 | } |
2383 | ||
2384 | /* | |
2385 | * ADDWC rd, rt, rs - Add Word with Carry Bit | |
2386 | * | |
2387 | * 3 2 1 | |
2388 | * 10987654321098765432109876543210 | |
2389 | * 001000 x1111000101 | |
2390 | * rt ----- | |
2391 | * rs ----- | |
2392 | * rd ----- | |
2393 | */ | |
7def8a4b | 2394 | static char *ADDWC(uint64 instruction, Dis_info *info) |
89a955e8 AM |
2395 | { |
2396 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 2397 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 2398 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 2399 | |
3f2aec07 ML |
2400 | const char *rd = GPR(rd_value, info); |
2401 | const char *rs = GPR(rs_value, info); | |
2402 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 2403 | |
c5231692 | 2404 | return img_format("ADDWC %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
2405 | } |
2406 | ||
2407 | ||
2408 | /* | |
2409 | * | |
2410 | * | |
2411 | * 3 2 1 | |
2412 | * 10987654321098765432109876543210 | |
2413 | * 001000 x1110000101 | |
2414 | * rt ----- | |
2415 | * rs ----- | |
2416 | * rd ----- | |
2417 | */ | |
7def8a4b | 2418 | static char *ALUIPC(uint64 instruction, Dis_info *info) |
89a955e8 AM |
2419 | { |
2420 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
d3605cc0 | 2421 | int64 s_value = extract_s__se31_0_11_to_2_20_to_12_s12(instruction); |
89a955e8 | 2422 | |
3f2aec07 | 2423 | const char *rt = GPR(rt_value, info); |
22e7b52a | 2424 | g_autofree char *s = ADDRESS(s_value, 4, info); |
89a955e8 | 2425 | |
c5231692 | 2426 | return img_format("ALUIPC %s, %%pcrel_hi(%s)", rt, s); |
89a955e8 AM |
2427 | } |
2428 | ||
2429 | ||
2430 | /* | |
2431 | * AND[16] rt3, rs3 - | |
2432 | * | |
2433 | * 5432109876543210 | |
2434 | * 101100 | |
2435 | * rt3 --- | |
2436 | * rs3 --- | |
2437 | * eu ---- | |
2438 | */ | |
7def8a4b | 2439 | static char *AND_16_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
2440 | { |
2441 | uint64 rt3_value = extract_rt3_9_8_7(instruction); | |
2442 | uint64 rs3_value = extract_rs3_6_5_4(instruction); | |
2443 | ||
3f2aec07 ML |
2444 | const char *rt3 = GPR(decode_gpr_gpr3(rt3_value, info), info); |
2445 | const char *rs3 = GPR(decode_gpr_gpr3(rs3_value, info), info); | |
89a955e8 | 2446 | |
c5231692 | 2447 | return img_format("AND %s, %s", rs3, rt3); |
89a955e8 AM |
2448 | } |
2449 | ||
2450 | ||
2451 | /* | |
2452 | * | |
2453 | * | |
2454 | * 3 2 1 | |
2455 | * 10987654321098765432109876543210 | |
2456 | * 001000 x1110000101 | |
2457 | * rt ----- | |
2458 | * rs ----- | |
2459 | * rd ----- | |
2460 | */ | |
7def8a4b | 2461 | static char *AND_32_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
2462 | { |
2463 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 2464 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 2465 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 2466 | |
3f2aec07 ML |
2467 | const char *rd = GPR(rd_value, info); |
2468 | const char *rs = GPR(rs_value, info); | |
2469 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 2470 | |
c5231692 | 2471 | return img_format("AND %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
2472 | } |
2473 | ||
2474 | ||
2475 | /* | |
2476 | * ANDI rt, rs, u - | |
2477 | * | |
2478 | * 5432109876543210 | |
2479 | * 101100 | |
2480 | * rt3 --- | |
2481 | * rs3 --- | |
2482 | * eu ---- | |
2483 | */ | |
7def8a4b | 2484 | static char *ANDI_16_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
2485 | { |
2486 | uint64 rt3_value = extract_rt3_9_8_7(instruction); | |
2487 | uint64 rs3_value = extract_rs3_6_5_4(instruction); | |
2488 | uint64 eu_value = extract_eu_3_2_1_0(instruction); | |
2489 | ||
3f2aec07 ML |
2490 | const char *rt3 = GPR(decode_gpr_gpr3(rt3_value, info), info); |
2491 | const char *rs3 = GPR(decode_gpr_gpr3(rs3_value, info), info); | |
4066c152 | 2492 | uint64 eu = encode_eu_from_u_andi16(eu_value); |
89a955e8 | 2493 | |
4066c152 | 2494 | return img_format("ANDI %s, %s, 0x%" PRIx64, rt3, rs3, eu); |
89a955e8 AM |
2495 | } |
2496 | ||
2497 | ||
2498 | /* | |
2499 | * | |
2500 | * | |
2501 | * 3 2 1 | |
2502 | * 10987654321098765432109876543210 | |
2503 | * 001000 x1110000101 | |
2504 | * rt ----- | |
2505 | * rs ----- | |
2506 | * rd ----- | |
2507 | */ | |
7def8a4b | 2508 | static char *ANDI_32_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
2509 | { |
2510 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 2511 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 2512 | uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 2513 | |
3f2aec07 ML |
2514 | const char *rt = GPR(rt_value, info); |
2515 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 2516 | |
4066c152 | 2517 | return img_format("ANDI %s, %s, 0x%" PRIx64, rt, rs, u_value); |
89a955e8 AM |
2518 | } |
2519 | ||
2520 | ||
2521 | /* | |
2522 | * | |
2523 | * | |
2524 | * 3 2 1 | |
2525 | * 10987654321098765432109876543210 | |
2526 | * 001000 x1110000101 | |
2527 | * rt ----- | |
2528 | * rs ----- | |
2529 | * rd ----- | |
2530 | */ | |
7def8a4b | 2531 | static char *APPEND(uint64 instruction, Dis_info *info) |
89a955e8 AM |
2532 | { |
2533 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 2534 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 2535 | uint64 sa_value = extract_sa_15_14_13_12_11(instruction); |
89a955e8 | 2536 | |
3f2aec07 ML |
2537 | const char *rt = GPR(rt_value, info); |
2538 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 2539 | |
4066c152 | 2540 | return img_format("APPEND %s, %s, 0x%" PRIx64, rt, rs, sa_value); |
89a955e8 AM |
2541 | } |
2542 | ||
2543 | ||
2544 | /* | |
2545 | * | |
2546 | * | |
2547 | * 3 2 1 | |
2548 | * 10987654321098765432109876543210 | |
2549 | * 001000 x1110000101 | |
2550 | * rt ----- | |
2551 | * rs ----- | |
2552 | * rd ----- | |
2553 | */ | |
7def8a4b | 2554 | static char *ASET(uint64 instruction, Dis_info *info) |
89a955e8 AM |
2555 | { |
2556 | uint64 bit_value = extract_bit_23_22_21(instruction); | |
89a955e8 | 2557 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 2558 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 2559 | |
3f2aec07 | 2560 | const char *rs = GPR(rs_value, info); |
89a955e8 | 2561 | |
4066c152 ML |
2562 | return img_format("ASET 0x%" PRIx64 ", %" PRId64 "(%s)", |
2563 | bit_value, s_value, rs); | |
89a955e8 AM |
2564 | } |
2565 | ||
2566 | ||
2567 | /* | |
2568 | * | |
2569 | * | |
2570 | * 3 2 1 | |
2571 | * 10987654321098765432109876543210 | |
2572 | * 001000 x1110000101 | |
2573 | * rt ----- | |
2574 | * rs ----- | |
2575 | * rd ----- | |
2576 | */ | |
7def8a4b | 2577 | static char *BALC_16_(uint64 instruction, Dis_info *info) |
89a955e8 | 2578 | { |
d3605cc0 | 2579 | int64 s_value = extract_s__se10_0_9_8_7_6_5_4_3_2_1_s1(instruction); |
89a955e8 | 2580 | |
22e7b52a | 2581 | g_autofree char *s = ADDRESS(s_value, 2, info); |
89a955e8 | 2582 | |
c5231692 | 2583 | return img_format("BALC %s", s); |
89a955e8 AM |
2584 | } |
2585 | ||
2586 | ||
2587 | /* | |
2588 | * | |
2589 | * | |
2590 | * 3 2 1 | |
2591 | * 10987654321098765432109876543210 | |
2592 | * 001000 x1110000101 | |
2593 | * rt ----- | |
2594 | * rs ----- | |
2595 | * rd ----- | |
2596 | */ | |
7def8a4b | 2597 | static char *BALC_32_(uint64 instruction, Dis_info *info) |
89a955e8 | 2598 | { |
d3605cc0 | 2599 | int64 s_value = extract_s__se25_0_24_to_1_s1(instruction); |
89a955e8 | 2600 | |
22e7b52a | 2601 | g_autofree char *s = ADDRESS(s_value, 4, info); |
89a955e8 | 2602 | |
c5231692 | 2603 | return img_format("BALC %s", s); |
89a955e8 AM |
2604 | } |
2605 | ||
2606 | ||
2607 | /* | |
2608 | * | |
2609 | * | |
2610 | * 3 2 1 | |
2611 | * 10987654321098765432109876543210 | |
2612 | * 001000 x1110000101 | |
2613 | * rt ----- | |
2614 | * rs ----- | |
2615 | * rd ----- | |
2616 | */ | |
7def8a4b | 2617 | static char *BALRSC(uint64 instruction, Dis_info *info) |
89a955e8 AM |
2618 | { |
2619 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
2620 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
2621 | ||
3f2aec07 ML |
2622 | const char *rt = GPR(rt_value, info); |
2623 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 2624 | |
c5231692 | 2625 | return img_format("BALRSC %s, %s", rt, rs); |
89a955e8 AM |
2626 | } |
2627 | ||
2628 | ||
2629 | /* | |
2630 | * | |
2631 | * | |
2632 | * 3 2 1 | |
2633 | * 10987654321098765432109876543210 | |
2634 | * 001000 x1110000101 | |
2635 | * rt ----- | |
2636 | * rs ----- | |
2637 | * rd ----- | |
2638 | */ | |
7def8a4b | 2639 | static char *BBEQZC(uint64 instruction, Dis_info *info) |
89a955e8 AM |
2640 | { |
2641 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
2642 | uint64 bit_value = extract_bit_16_15_14_13_12_11(instruction); | |
d3605cc0 | 2643 | int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction); |
89a955e8 | 2644 | |
3f2aec07 | 2645 | const char *rt = GPR(rt_value, info); |
22e7b52a | 2646 | g_autofree char *s = ADDRESS(s_value, 4, info); |
89a955e8 | 2647 | |
4066c152 | 2648 | return img_format("BBEQZC %s, 0x%" PRIx64 ", %s", rt, bit_value, s); |
89a955e8 AM |
2649 | } |
2650 | ||
2651 | ||
2652 | /* | |
2653 | * | |
2654 | * | |
2655 | * 3 2 1 | |
2656 | * 10987654321098765432109876543210 | |
2657 | * 001000 x1110000101 | |
2658 | * rt ----- | |
2659 | * rs ----- | |
2660 | * rd ----- | |
2661 | */ | |
7def8a4b | 2662 | static char *BBNEZC(uint64 instruction, Dis_info *info) |
89a955e8 AM |
2663 | { |
2664 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
2665 | uint64 bit_value = extract_bit_16_15_14_13_12_11(instruction); | |
d3605cc0 | 2666 | int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction); |
89a955e8 | 2667 | |
3f2aec07 | 2668 | const char *rt = GPR(rt_value, info); |
22e7b52a | 2669 | g_autofree char *s = ADDRESS(s_value, 4, info); |
89a955e8 | 2670 | |
4066c152 | 2671 | return img_format("BBNEZC %s, 0x%" PRIx64 ", %s", rt, bit_value, s); |
89a955e8 AM |
2672 | } |
2673 | ||
2674 | ||
2675 | /* | |
2676 | * | |
2677 | * | |
2678 | * 3 2 1 | |
2679 | * 10987654321098765432109876543210 | |
2680 | * 001000 x1110000101 | |
2681 | * rt ----- | |
2682 | * rs ----- | |
2683 | * rd ----- | |
2684 | */ | |
7def8a4b | 2685 | static char *BC_16_(uint64 instruction, Dis_info *info) |
89a955e8 | 2686 | { |
d3605cc0 | 2687 | int64 s_value = extract_s__se10_0_9_8_7_6_5_4_3_2_1_s1(instruction); |
89a955e8 | 2688 | |
22e7b52a | 2689 | g_autofree char *s = ADDRESS(s_value, 2, info); |
89a955e8 | 2690 | |
c5231692 | 2691 | return img_format("BC %s", s); |
89a955e8 AM |
2692 | } |
2693 | ||
2694 | ||
2695 | /* | |
2696 | * | |
2697 | * | |
2698 | * 3 2 1 | |
2699 | * 10987654321098765432109876543210 | |
2700 | * 001000 x1110000101 | |
2701 | * rt ----- | |
2702 | * rs ----- | |
2703 | * rd ----- | |
2704 | */ | |
7def8a4b | 2705 | static char *BC_32_(uint64 instruction, Dis_info *info) |
89a955e8 | 2706 | { |
d3605cc0 | 2707 | int64 s_value = extract_s__se25_0_24_to_1_s1(instruction); |
89a955e8 | 2708 | |
22e7b52a | 2709 | g_autofree char *s = ADDRESS(s_value, 4, info); |
89a955e8 | 2710 | |
c5231692 | 2711 | return img_format("BC %s", s); |
89a955e8 AM |
2712 | } |
2713 | ||
2714 | ||
2715 | /* | |
2716 | * | |
2717 | * | |
2718 | * 3 2 1 | |
2719 | * 10987654321098765432109876543210 | |
2720 | * 001000 x1110000101 | |
2721 | * rt ----- | |
2722 | * rs ----- | |
2723 | * rd ----- | |
2724 | */ | |
7def8a4b | 2725 | static char *BC1EQZC(uint64 instruction, Dis_info *info) |
89a955e8 | 2726 | { |
17ce2f00 | 2727 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
75199b40 | 2728 | int64 s_value = extract_s__se14_0_13_to_1_s1(instruction); |
89a955e8 | 2729 | |
3f2aec07 | 2730 | const char *ft = FPR(ft_value, info); |
22e7b52a | 2731 | g_autofree char *s = ADDRESS(s_value, 4, info); |
89a955e8 | 2732 | |
c5231692 | 2733 | return img_format("BC1EQZC %s, %s", ft, s); |
89a955e8 AM |
2734 | } |
2735 | ||
2736 | ||
2737 | /* | |
2738 | * | |
2739 | * | |
2740 | * 3 2 1 | |
2741 | * 10987654321098765432109876543210 | |
2742 | * 001000 x1110000101 | |
2743 | * rt ----- | |
2744 | * rs ----- | |
2745 | * rd ----- | |
2746 | */ | |
7def8a4b | 2747 | static char *BC1NEZC(uint64 instruction, Dis_info *info) |
89a955e8 | 2748 | { |
17ce2f00 | 2749 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
75199b40 | 2750 | int64 s_value = extract_s__se14_0_13_to_1_s1(instruction); |
89a955e8 | 2751 | |
3f2aec07 | 2752 | const char *ft = FPR(ft_value, info); |
22e7b52a | 2753 | g_autofree char *s = ADDRESS(s_value, 4, info); |
89a955e8 | 2754 | |
c5231692 | 2755 | return img_format("BC1NEZC %s, %s", ft, s); |
89a955e8 AM |
2756 | } |
2757 | ||
2758 | ||
2759 | /* | |
2760 | * | |
2761 | * | |
2762 | * 3 2 1 | |
2763 | * 10987654321098765432109876543210 | |
2764 | * 001000 x1110000101 | |
2765 | * rt ----- | |
2766 | * rs ----- | |
2767 | * rd ----- | |
2768 | */ | |
7def8a4b | 2769 | static char *BC2EQZC(uint64 instruction, Dis_info *info) |
89a955e8 | 2770 | { |
89a955e8 | 2771 | uint64 ct_value = extract_ct_25_24_23_22_21(instruction); |
75199b40 | 2772 | int64 s_value = extract_s__se14_0_13_to_1_s1(instruction); |
89a955e8 | 2773 | |
22e7b52a | 2774 | g_autofree char *s = ADDRESS(s_value, 4, info); |
89a955e8 | 2775 | |
043dc73c | 2776 | return img_format("BC2EQZC CP%" PRIu64 ", %s", ct_value, s); |
89a955e8 AM |
2777 | } |
2778 | ||
2779 | ||
2780 | /* | |
2781 | * | |
2782 | * | |
2783 | * 3 2 1 | |
2784 | * 10987654321098765432109876543210 | |
2785 | * 001000 x1110000101 | |
2786 | * rt ----- | |
2787 | * rs ----- | |
2788 | * rd ----- | |
2789 | */ | |
7def8a4b | 2790 | static char *BC2NEZC(uint64 instruction, Dis_info *info) |
89a955e8 | 2791 | { |
89a955e8 | 2792 | uint64 ct_value = extract_ct_25_24_23_22_21(instruction); |
75199b40 | 2793 | int64 s_value = extract_s__se14_0_13_to_1_s1(instruction); |
89a955e8 | 2794 | |
22e7b52a | 2795 | g_autofree char *s = ADDRESS(s_value, 4, info); |
89a955e8 | 2796 | |
043dc73c | 2797 | return img_format("BC2NEZC CP%" PRIu64 ", %s", ct_value, s); |
89a955e8 AM |
2798 | } |
2799 | ||
2800 | ||
2801 | /* | |
2802 | * | |
2803 | * | |
2804 | * 3 2 1 | |
2805 | * 10987654321098765432109876543210 | |
2806 | * 001000 x1110000101 | |
2807 | * rt ----- | |
2808 | * rs ----- | |
2809 | * rd ----- | |
2810 | */ | |
7def8a4b | 2811 | static char *BEQC_16_(uint64 instruction, Dis_info *info) |
89a955e8 | 2812 | { |
89a955e8 AM |
2813 | uint64 rt3_value = extract_rt3_9_8_7(instruction); |
2814 | uint64 rs3_value = extract_rs3_6_5_4(instruction); | |
75199b40 | 2815 | uint64 u_value = extract_u_3_2_1_0__s1(instruction); |
89a955e8 | 2816 | |
3f2aec07 ML |
2817 | const char *rs3 = GPR(decode_gpr_gpr3(rs3_value, info), info); |
2818 | const char *rt3 = GPR(decode_gpr_gpr3(rt3_value, info), info); | |
22e7b52a | 2819 | g_autofree char *u = ADDRESS(u_value, 2, info); |
89a955e8 | 2820 | |
c5231692 | 2821 | return img_format("BEQC %s, %s, %s", rs3, rt3, u); |
89a955e8 AM |
2822 | } |
2823 | ||
2824 | ||
2825 | /* | |
2826 | * | |
2827 | * | |
2828 | * 3 2 1 | |
2829 | * 10987654321098765432109876543210 | |
2830 | * 001000 x1110000101 | |
2831 | * rt ----- | |
2832 | * rs ----- | |
2833 | * rd ----- | |
2834 | */ | |
7def8a4b | 2835 | static char *BEQC_32_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
2836 | { |
2837 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 2838 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 2839 | int64 s_value = extract_s__se14_0_13_to_1_s1(instruction); |
89a955e8 | 2840 | |
3f2aec07 ML |
2841 | const char *rs = GPR(rs_value, info); |
2842 | const char *rt = GPR(rt_value, info); | |
22e7b52a | 2843 | g_autofree char *s = ADDRESS(s_value, 4, info); |
89a955e8 | 2844 | |
c5231692 | 2845 | return img_format("BEQC %s, %s, %s", rs, rt, s); |
89a955e8 AM |
2846 | } |
2847 | ||
2848 | ||
2849 | /* | |
2850 | * | |
2851 | * | |
2852 | * 3 2 1 | |
2853 | * 10987654321098765432109876543210 | |
2854 | * 001000 x1110000101 | |
2855 | * rt ----- | |
2856 | * rs ----- | |
2857 | * rd ----- | |
2858 | */ | |
7def8a4b | 2859 | static char *BEQIC(uint64 instruction, Dis_info *info) |
89a955e8 AM |
2860 | { |
2861 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 2862 | uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction); |
75199b40 | 2863 | int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction); |
89a955e8 | 2864 | |
3f2aec07 | 2865 | const char *rt = GPR(rt_value, info); |
22e7b52a | 2866 | g_autofree char *s = ADDRESS(s_value, 4, info); |
89a955e8 | 2867 | |
4066c152 | 2868 | return img_format("BEQIC %s, 0x%" PRIx64 ", %s", rt, u_value, s); |
89a955e8 AM |
2869 | } |
2870 | ||
2871 | ||
2872 | /* | |
2873 | * | |
2874 | * | |
2875 | * 3 2 1 | |
2876 | * 10987654321098765432109876543210 | |
2877 | * 001000 x1110000101 | |
2878 | * rt ----- | |
2879 | * rs ----- | |
2880 | * rd ----- | |
2881 | */ | |
7def8a4b | 2882 | static char *BEQZC_16_(uint64 instruction, Dis_info *info) |
89a955e8 | 2883 | { |
89a955e8 | 2884 | uint64 rt3_value = extract_rt3_9_8_7(instruction); |
75199b40 | 2885 | int64 s_value = extract_s__se7_0_6_5_4_3_2_1_s1(instruction); |
89a955e8 | 2886 | |
3f2aec07 | 2887 | const char *rt3 = GPR(decode_gpr_gpr3(rt3_value, info), info); |
22e7b52a | 2888 | g_autofree char *s = ADDRESS(s_value, 2, info); |
89a955e8 | 2889 | |
c5231692 | 2890 | return img_format("BEQZC %s, %s", rt3, s); |
89a955e8 AM |
2891 | } |
2892 | ||
2893 | ||
2894 | /* | |
2895 | * | |
2896 | * | |
2897 | * 3 2 1 | |
2898 | * 10987654321098765432109876543210 | |
2899 | * 001000 x1110000101 | |
2900 | * rt ----- | |
2901 | * rs ----- | |
2902 | * rd ----- | |
2903 | */ | |
7def8a4b | 2904 | static char *BGEC(uint64 instruction, Dis_info *info) |
89a955e8 AM |
2905 | { |
2906 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 2907 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 2908 | int64 s_value = extract_s__se14_0_13_to_1_s1(instruction); |
89a955e8 | 2909 | |
3f2aec07 ML |
2910 | const char *rs = GPR(rs_value, info); |
2911 | const char *rt = GPR(rt_value, info); | |
22e7b52a | 2912 | g_autofree char *s = ADDRESS(s_value, 4, info); |
89a955e8 | 2913 | |
c5231692 | 2914 | return img_format("BGEC %s, %s, %s", rs, rt, s); |
89a955e8 AM |
2915 | } |
2916 | ||
2917 | ||
2918 | /* | |
2919 | * | |
2920 | * | |
2921 | * 3 2 1 | |
2922 | * 10987654321098765432109876543210 | |
2923 | * 001000 x1110000101 | |
2924 | * rt ----- | |
2925 | * rs ----- | |
2926 | * rd ----- | |
2927 | */ | |
7def8a4b | 2928 | static char *BGEIC(uint64 instruction, Dis_info *info) |
89a955e8 AM |
2929 | { |
2930 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 2931 | uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction); |
75199b40 | 2932 | int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction); |
89a955e8 | 2933 | |
3f2aec07 | 2934 | const char *rt = GPR(rt_value, info); |
22e7b52a | 2935 | g_autofree char *s = ADDRESS(s_value, 4, info); |
89a955e8 | 2936 | |
4066c152 | 2937 | return img_format("BGEIC %s, 0x%" PRIx64 ", %s", rt, u_value, s); |
89a955e8 AM |
2938 | } |
2939 | ||
2940 | ||
2941 | /* | |
2942 | * | |
2943 | * | |
2944 | * 3 2 1 | |
2945 | * 10987654321098765432109876543210 | |
2946 | * 001000 x1110000101 | |
2947 | * rt ----- | |
2948 | * rs ----- | |
2949 | * rd ----- | |
2950 | */ | |
7def8a4b | 2951 | static char *BGEIUC(uint64 instruction, Dis_info *info) |
89a955e8 AM |
2952 | { |
2953 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 2954 | uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction); |
75199b40 | 2955 | int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction); |
89a955e8 | 2956 | |
3f2aec07 | 2957 | const char *rt = GPR(rt_value, info); |
22e7b52a | 2958 | g_autofree char *s = ADDRESS(s_value, 4, info); |
89a955e8 | 2959 | |
4066c152 | 2960 | return img_format("BGEIUC %s, 0x%" PRIx64 ", %s", rt, u_value, s); |
89a955e8 AM |
2961 | } |
2962 | ||
2963 | ||
2964 | /* | |
2965 | * | |
2966 | * | |
2967 | * 3 2 1 | |
2968 | * 10987654321098765432109876543210 | |
2969 | * 001000 x1110000101 | |
2970 | * rt ----- | |
2971 | * rs ----- | |
2972 | * rd ----- | |
2973 | */ | |
7def8a4b | 2974 | static char *BGEUC(uint64 instruction, Dis_info *info) |
89a955e8 AM |
2975 | { |
2976 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 2977 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 2978 | int64 s_value = extract_s__se14_0_13_to_1_s1(instruction); |
89a955e8 | 2979 | |
3f2aec07 ML |
2980 | const char *rs = GPR(rs_value, info); |
2981 | const char *rt = GPR(rt_value, info); | |
22e7b52a | 2982 | g_autofree char *s = ADDRESS(s_value, 4, info); |
89a955e8 | 2983 | |
c5231692 | 2984 | return img_format("BGEUC %s, %s, %s", rs, rt, s); |
89a955e8 AM |
2985 | } |
2986 | ||
2987 | ||
2988 | /* | |
2989 | * | |
2990 | * | |
2991 | * 3 2 1 | |
2992 | * 10987654321098765432109876543210 | |
2993 | * 001000 x1110000101 | |
2994 | * rt ----- | |
2995 | * rs ----- | |
2996 | * rd ----- | |
2997 | */ | |
7def8a4b | 2998 | static char *BLTC(uint64 instruction, Dis_info *info) |
89a955e8 AM |
2999 | { |
3000 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 3001 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 3002 | int64 s_value = extract_s__se14_0_13_to_1_s1(instruction); |
89a955e8 | 3003 | |
3f2aec07 ML |
3004 | const char *rs = GPR(rs_value, info); |
3005 | const char *rt = GPR(rt_value, info); | |
22e7b52a | 3006 | g_autofree char *s = ADDRESS(s_value, 4, info); |
89a955e8 | 3007 | |
c5231692 | 3008 | return img_format("BLTC %s, %s, %s", rs, rt, s); |
89a955e8 AM |
3009 | } |
3010 | ||
3011 | ||
3012 | /* | |
3013 | * | |
3014 | * | |
3015 | * 3 2 1 | |
3016 | * 10987654321098765432109876543210 | |
3017 | * 001000 x1110000101 | |
3018 | * rt ----- | |
3019 | * rs ----- | |
3020 | * rd ----- | |
3021 | */ | |
7def8a4b | 3022 | static char *BLTIC(uint64 instruction, Dis_info *info) |
89a955e8 AM |
3023 | { |
3024 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 3025 | uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction); |
75199b40 | 3026 | int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction); |
89a955e8 | 3027 | |
3f2aec07 | 3028 | const char *rt = GPR(rt_value, info); |
22e7b52a | 3029 | g_autofree char *s = ADDRESS(s_value, 4, info); |
89a955e8 | 3030 | |
4066c152 | 3031 | return img_format("BLTIC %s, 0x%" PRIx64 ", %s", rt, u_value, s); |
89a955e8 AM |
3032 | } |
3033 | ||
3034 | ||
3035 | /* | |
3036 | * | |
3037 | * | |
3038 | * 3 2 1 | |
3039 | * 10987654321098765432109876543210 | |
3040 | * 001000 x1110000101 | |
3041 | * rt ----- | |
3042 | * rs ----- | |
3043 | * rd ----- | |
3044 | */ | |
7def8a4b | 3045 | static char *BLTIUC(uint64 instruction, Dis_info *info) |
89a955e8 AM |
3046 | { |
3047 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 3048 | uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction); |
75199b40 | 3049 | int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction); |
89a955e8 | 3050 | |
3f2aec07 | 3051 | const char *rt = GPR(rt_value, info); |
22e7b52a | 3052 | g_autofree char *s = ADDRESS(s_value, 4, info); |
89a955e8 | 3053 | |
4066c152 | 3054 | return img_format("BLTIUC %s, 0x%" PRIx64 ", %s", rt, u_value, s); |
89a955e8 AM |
3055 | } |
3056 | ||
3057 | ||
3058 | /* | |
3059 | * | |
3060 | * | |
3061 | * 3 2 1 | |
3062 | * 10987654321098765432109876543210 | |
3063 | * 001000 x1110000101 | |
3064 | * rt ----- | |
3065 | * rs ----- | |
3066 | * rd ----- | |
3067 | */ | |
7def8a4b | 3068 | static char *BLTUC(uint64 instruction, Dis_info *info) |
89a955e8 AM |
3069 | { |
3070 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 3071 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 3072 | int64 s_value = extract_s__se14_0_13_to_1_s1(instruction); |
89a955e8 | 3073 | |
3f2aec07 ML |
3074 | const char *rs = GPR(rs_value, info); |
3075 | const char *rt = GPR(rt_value, info); | |
22e7b52a | 3076 | g_autofree char *s = ADDRESS(s_value, 4, info); |
89a955e8 | 3077 | |
c5231692 | 3078 | return img_format("BLTUC %s, %s, %s", rs, rt, s); |
89a955e8 AM |
3079 | } |
3080 | ||
3081 | ||
3082 | /* | |
3083 | * | |
3084 | * | |
3085 | * 3 2 1 | |
3086 | * 10987654321098765432109876543210 | |
3087 | * 001000 x1110000101 | |
3088 | * rt ----- | |
3089 | * rs ----- | |
3090 | * rd ----- | |
3091 | */ | |
7def8a4b | 3092 | static char *BNEC_16_(uint64 instruction, Dis_info *info) |
89a955e8 | 3093 | { |
89a955e8 AM |
3094 | uint64 rt3_value = extract_rt3_9_8_7(instruction); |
3095 | uint64 rs3_value = extract_rs3_6_5_4(instruction); | |
75199b40 | 3096 | uint64 u_value = extract_u_3_2_1_0__s1(instruction); |
89a955e8 | 3097 | |
3f2aec07 ML |
3098 | const char *rs3 = GPR(decode_gpr_gpr3(rs3_value, info), info); |
3099 | const char *rt3 = GPR(decode_gpr_gpr3(rt3_value, info), info); | |
22e7b52a | 3100 | g_autofree char *u = ADDRESS(u_value, 2, info); |
89a955e8 | 3101 | |
c5231692 | 3102 | return img_format("BNEC %s, %s, %s", rs3, rt3, u); |
89a955e8 AM |
3103 | } |
3104 | ||
3105 | ||
3106 | /* | |
3107 | * | |
3108 | * | |
3109 | * 3 2 1 | |
3110 | * 10987654321098765432109876543210 | |
3111 | * 001000 x1110000101 | |
3112 | * rt ----- | |
3113 | * rs ----- | |
3114 | * rd ----- | |
3115 | */ | |
7def8a4b | 3116 | static char *BNEC_32_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
3117 | { |
3118 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 3119 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 3120 | int64 s_value = extract_s__se14_0_13_to_1_s1(instruction); |
89a955e8 | 3121 | |
3f2aec07 ML |
3122 | const char *rs = GPR(rs_value, info); |
3123 | const char *rt = GPR(rt_value, info); | |
22e7b52a | 3124 | g_autofree char *s = ADDRESS(s_value, 4, info); |
89a955e8 | 3125 | |
c5231692 | 3126 | return img_format("BNEC %s, %s, %s", rs, rt, s); |
89a955e8 AM |
3127 | } |
3128 | ||
3129 | ||
3130 | /* | |
3131 | * | |
3132 | * | |
3133 | * 3 2 1 | |
3134 | * 10987654321098765432109876543210 | |
3135 | * 001000 x1110000101 | |
3136 | * rt ----- | |
3137 | * rs ----- | |
3138 | * rd ----- | |
3139 | */ | |
7def8a4b | 3140 | static char *BNEIC(uint64 instruction, Dis_info *info) |
89a955e8 AM |
3141 | { |
3142 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 3143 | uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction); |
75199b40 | 3144 | int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction); |
89a955e8 | 3145 | |
3f2aec07 | 3146 | const char *rt = GPR(rt_value, info); |
22e7b52a | 3147 | g_autofree char *s = ADDRESS(s_value, 4, info); |
89a955e8 | 3148 | |
4066c152 | 3149 | return img_format("BNEIC %s, 0x%" PRIx64 ", %s", rt, u_value, s); |
89a955e8 AM |
3150 | } |
3151 | ||
3152 | ||
3153 | /* | |
3154 | * | |
3155 | * | |
3156 | * 3 2 1 | |
3157 | * 10987654321098765432109876543210 | |
3158 | * 001000 x1110000101 | |
3159 | * rt ----- | |
3160 | * rs ----- | |
3161 | * rd ----- | |
3162 | */ | |
7def8a4b | 3163 | static char *BNEZC_16_(uint64 instruction, Dis_info *info) |
89a955e8 | 3164 | { |
89a955e8 | 3165 | uint64 rt3_value = extract_rt3_9_8_7(instruction); |
75199b40 | 3166 | int64 s_value = extract_s__se7_0_6_5_4_3_2_1_s1(instruction); |
89a955e8 | 3167 | |
3f2aec07 | 3168 | const char *rt3 = GPR(decode_gpr_gpr3(rt3_value, info), info); |
22e7b52a | 3169 | g_autofree char *s = ADDRESS(s_value, 2, info); |
89a955e8 | 3170 | |
c5231692 | 3171 | return img_format("BNEZC %s, %s", rt3, s); |
89a955e8 AM |
3172 | } |
3173 | ||
3174 | ||
3175 | /* | |
5c65eed6 AM |
3176 | * [DSP] BPOSGE32C offset - Branch on greater than or equal to value 32 in |
3177 | * DSPControl Pos field | |
89a955e8 AM |
3178 | * |
3179 | * 3 2 1 | |
3180 | * 10987654321098765432109876543210 | |
5c65eed6 AM |
3181 | * 100010xxxxx0010001 |
3182 | * s[13:1] ------------- | |
3183 | * s[14] - | |
89a955e8 | 3184 | */ |
7def8a4b | 3185 | static char *BPOSGE32C(uint64 instruction, Dis_info *info) |
89a955e8 | 3186 | { |
d3605cc0 | 3187 | int64 s_value = extract_s__se14_0_13_to_1_s1(instruction); |
89a955e8 | 3188 | |
22e7b52a | 3189 | g_autofree char *s = ADDRESS(s_value, 4, info); |
89a955e8 | 3190 | |
c5231692 | 3191 | return img_format("BPOSGE32C %s", s); |
89a955e8 AM |
3192 | } |
3193 | ||
3194 | ||
3195 | /* | |
3196 | * | |
3197 | * | |
3198 | * 3 2 1 | |
3199 | * 10987654321098765432109876543210 | |
3200 | * 001000 x1110000101 | |
3201 | * rt ----- | |
3202 | * rs ----- | |
3203 | * rd ----- | |
3204 | */ | |
7def8a4b | 3205 | static char *BREAK_16_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
3206 | { |
3207 | uint64 code_value = extract_code_2_1_0(instruction); | |
3208 | ||
89a955e8 | 3209 | |
4066c152 | 3210 | return img_format("BREAK 0x%" PRIx64, code_value); |
89a955e8 AM |
3211 | } |
3212 | ||
3213 | ||
3214 | /* | |
3215 | * BREAK code - Break. Cause a Breakpoint exception | |
3216 | * | |
3217 | * 3 2 1 | |
3218 | * 10987654321098765432109876543210 | |
3219 | * 001000 x1110000101 | |
3220 | * rt ----- | |
3221 | * rs ----- | |
3222 | * rd ----- | |
3223 | */ | |
7def8a4b | 3224 | static char *BREAK_32_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
3225 | { |
3226 | uint64 code_value = extract_code_18_to_0(instruction); | |
3227 | ||
89a955e8 | 3228 | |
4066c152 | 3229 | return img_format("BREAK 0x%" PRIx64, code_value); |
89a955e8 AM |
3230 | } |
3231 | ||
3232 | ||
3233 | /* | |
3234 | * | |
3235 | * | |
3236 | * 3 2 1 | |
3237 | * 10987654321098765432109876543210 | |
3238 | * 001000 x1110000101 | |
3239 | * rt ----- | |
3240 | * rs ----- | |
3241 | * rd ----- | |
3242 | */ | |
7def8a4b | 3243 | static char *BRSC(uint64 instruction, Dis_info *info) |
89a955e8 AM |
3244 | { |
3245 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
3246 | ||
3f2aec07 | 3247 | const char *rs = GPR(rs_value, info); |
89a955e8 | 3248 | |
c5231692 | 3249 | return img_format("BRSC %s", rs); |
89a955e8 AM |
3250 | } |
3251 | ||
3252 | ||
3253 | /* | |
3254 | * | |
3255 | * | |
3256 | * 3 2 1 | |
3257 | * 10987654321098765432109876543210 | |
3258 | * 001000 x1110000101 | |
3259 | * rt ----- | |
3260 | * rs ----- | |
3261 | * rd ----- | |
3262 | */ | |
7def8a4b | 3263 | static char *CACHE(uint64 instruction, Dis_info *info) |
89a955e8 | 3264 | { |
89a955e8 AM |
3265 | uint64 op_value = extract_op_25_24_23_22_21(instruction); |
3266 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
75199b40 | 3267 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 3268 | |
3f2aec07 | 3269 | const char *rs = GPR(rs_value, info); |
89a955e8 | 3270 | |
4066c152 | 3271 | return img_format("CACHE 0x%" PRIx64 ", %s(%s)", op_value, s_value, rs); |
89a955e8 AM |
3272 | } |
3273 | ||
3274 | ||
3275 | /* | |
3276 | * | |
3277 | * | |
3278 | * 3 2 1 | |
3279 | * 10987654321098765432109876543210 | |
3280 | * 001000 x1110000101 | |
3281 | * rt ----- | |
3282 | * rs ----- | |
3283 | * rd ----- | |
3284 | */ | |
7def8a4b | 3285 | static char *CACHEE(uint64 instruction, Dis_info *info) |
89a955e8 | 3286 | { |
89a955e8 AM |
3287 | uint64 op_value = extract_op_25_24_23_22_21(instruction); |
3288 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
75199b40 | 3289 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 3290 | |
3f2aec07 | 3291 | const char *rs = GPR(rs_value, info); |
89a955e8 | 3292 | |
4066c152 | 3293 | return img_format("CACHEE 0x%" PRIx64 ", %s(%s)", op_value, s_value, rs); |
89a955e8 AM |
3294 | } |
3295 | ||
3296 | ||
3297 | /* | |
3298 | * | |
3299 | * | |
3300 | * 3 2 1 | |
3301 | * 10987654321098765432109876543210 | |
3302 | * 001000 x1110000101 | |
3303 | * rt ----- | |
3304 | * rs ----- | |
3305 | * rd ----- | |
3306 | */ | |
7def8a4b | 3307 | static char *CEIL_L_D(uint64 instruction, Dis_info *info) |
89a955e8 | 3308 | { |
17ce2f00 | 3309 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 3310 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 3311 | |
3f2aec07 ML |
3312 | const char *ft = FPR(ft_value, info); |
3313 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 3314 | |
c5231692 | 3315 | return img_format("CEIL.L.D %s, %s", ft, fs); |
89a955e8 AM |
3316 | } |
3317 | ||
3318 | ||
3319 | /* | |
3320 | * | |
3321 | * | |
3322 | * 3 2 1 | |
3323 | * 10987654321098765432109876543210 | |
3324 | * 001000 x1110000101 | |
3325 | * rt ----- | |
3326 | * rs ----- | |
3327 | * rd ----- | |
3328 | */ | |
7def8a4b | 3329 | static char *CEIL_L_S(uint64 instruction, Dis_info *info) |
89a955e8 | 3330 | { |
17ce2f00 | 3331 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 3332 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 3333 | |
3f2aec07 ML |
3334 | const char *ft = FPR(ft_value, info); |
3335 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 3336 | |
c5231692 | 3337 | return img_format("CEIL.L.S %s, %s", ft, fs); |
89a955e8 AM |
3338 | } |
3339 | ||
3340 | ||
3341 | /* | |
3342 | * | |
3343 | * | |
3344 | * 3 2 1 | |
3345 | * 10987654321098765432109876543210 | |
3346 | * 001000 x1110000101 | |
3347 | * rt ----- | |
3348 | * rs ----- | |
3349 | * rd ----- | |
3350 | */ | |
7def8a4b | 3351 | static char *CEIL_W_D(uint64 instruction, Dis_info *info) |
89a955e8 | 3352 | { |
17ce2f00 | 3353 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 3354 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 3355 | |
3f2aec07 ML |
3356 | const char *ft = FPR(ft_value, info); |
3357 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 3358 | |
c5231692 | 3359 | return img_format("CEIL.W.D %s, %s", ft, fs); |
89a955e8 AM |
3360 | } |
3361 | ||
3362 | ||
3363 | /* | |
3364 | * | |
3365 | * | |
3366 | * 3 2 1 | |
3367 | * 10987654321098765432109876543210 | |
3368 | * 001000 x1110000101 | |
3369 | * rt ----- | |
3370 | * rs ----- | |
3371 | * rd ----- | |
3372 | */ | |
7def8a4b | 3373 | static char *CEIL_W_S(uint64 instruction, Dis_info *info) |
89a955e8 | 3374 | { |
17ce2f00 | 3375 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 3376 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 3377 | |
3f2aec07 ML |
3378 | const char *ft = FPR(ft_value, info); |
3379 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 3380 | |
c5231692 | 3381 | return img_format("CEIL.W.S %s, %s", ft, fs); |
89a955e8 AM |
3382 | } |
3383 | ||
3384 | ||
3385 | /* | |
3386 | * | |
3387 | * | |
3388 | * 3 2 1 | |
3389 | * 10987654321098765432109876543210 | |
3390 | * 001000 x1110000101 | |
3391 | * rt ----- | |
3392 | * rs ----- | |
3393 | * rd ----- | |
3394 | */ | |
7def8a4b | 3395 | static char *CFC1(uint64 instruction, Dis_info *info) |
89a955e8 | 3396 | { |
89a955e8 | 3397 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
86b5f803 | 3398 | uint64 cs_value = extract_cs_20_19_18_17_16(instruction); |
89a955e8 | 3399 | |
3f2aec07 | 3400 | const char *rt = GPR(rt_value, info); |
89a955e8 | 3401 | |
043dc73c | 3402 | return img_format("CFC1 %s, CP%" PRIu64, rt, cs_value); |
89a955e8 AM |
3403 | } |
3404 | ||
3405 | ||
3406 | /* | |
3407 | * | |
3408 | * | |
3409 | * 3 2 1 | |
3410 | * 10987654321098765432109876543210 | |
3411 | * 001000 x1110000101 | |
3412 | * rt ----- | |
3413 | * rs ----- | |
3414 | * rd ----- | |
3415 | */ | |
7def8a4b | 3416 | static char *CFC2(uint64 instruction, Dis_info *info) |
89a955e8 | 3417 | { |
89a955e8 | 3418 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
86b5f803 | 3419 | uint64 cs_value = extract_cs_20_19_18_17_16(instruction); |
89a955e8 | 3420 | |
3f2aec07 | 3421 | const char *rt = GPR(rt_value, info); |
89a955e8 | 3422 | |
043dc73c | 3423 | return img_format("CFC2 %s, CP%" PRIu64, rt, cs_value); |
89a955e8 AM |
3424 | } |
3425 | ||
3426 | ||
3427 | /* | |
3428 | * | |
3429 | * | |
3430 | * 3 2 1 | |
3431 | * 10987654321098765432109876543210 | |
3432 | * 001000 x1110000101 | |
3433 | * rt ----- | |
3434 | * rs ----- | |
3435 | * rd ----- | |
3436 | */ | |
7def8a4b | 3437 | static char *CLASS_D(uint64 instruction, Dis_info *info) |
89a955e8 | 3438 | { |
17ce2f00 | 3439 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 3440 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 3441 | |
3f2aec07 ML |
3442 | const char *ft = FPR(ft_value, info); |
3443 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 3444 | |
c5231692 | 3445 | return img_format("CLASS.D %s, %s", ft, fs); |
89a955e8 AM |
3446 | } |
3447 | ||
3448 | ||
3449 | /* | |
3450 | * | |
3451 | * | |
3452 | * 3 2 1 | |
3453 | * 10987654321098765432109876543210 | |
3454 | * 001000 x1110000101 | |
3455 | * rt ----- | |
3456 | * rs ----- | |
3457 | * rd ----- | |
3458 | */ | |
7def8a4b | 3459 | static char *CLASS_S(uint64 instruction, Dis_info *info) |
89a955e8 | 3460 | { |
17ce2f00 | 3461 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 3462 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 3463 | |
3f2aec07 ML |
3464 | const char *ft = FPR(ft_value, info); |
3465 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 3466 | |
c5231692 | 3467 | return img_format("CLASS.S %s, %s", ft, fs); |
89a955e8 AM |
3468 | } |
3469 | ||
3470 | ||
3471 | /* | |
3472 | * | |
3473 | * | |
3474 | * 3 2 1 | |
3475 | * 10987654321098765432109876543210 | |
3476 | * 001000 x1110000101 | |
3477 | * rt ----- | |
3478 | * rs ----- | |
3479 | * rd ----- | |
3480 | */ | |
7def8a4b | 3481 | static char *CLO(uint64 instruction, Dis_info *info) |
89a955e8 AM |
3482 | { |
3483 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
3484 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
3485 | ||
3f2aec07 ML |
3486 | const char *rt = GPR(rt_value, info); |
3487 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 3488 | |
c5231692 | 3489 | return img_format("CLO %s, %s", rt, rs); |
89a955e8 AM |
3490 | } |
3491 | ||
3492 | ||
3493 | /* | |
3494 | * | |
3495 | * | |
3496 | * 3 2 1 | |
3497 | * 10987654321098765432109876543210 | |
3498 | * 001000 x1110000101 | |
3499 | * rt ----- | |
3500 | * rs ----- | |
3501 | * rd ----- | |
3502 | */ | |
7def8a4b | 3503 | static char *CLZ(uint64 instruction, Dis_info *info) |
89a955e8 AM |
3504 | { |
3505 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
3506 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
3507 | ||
3f2aec07 ML |
3508 | const char *rt = GPR(rt_value, info); |
3509 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 3510 | |
c5231692 | 3511 | return img_format("CLZ %s, %s", rt, rs); |
89a955e8 AM |
3512 | } |
3513 | ||
3514 | ||
3515 | /* | |
3516 | * | |
3517 | * | |
3518 | * 3 2 1 | |
3519 | * 10987654321098765432109876543210 | |
3520 | * 001000 x1110000101 | |
3521 | * rt ----- | |
3522 | * rs ----- | |
3523 | * rd ----- | |
3524 | */ | |
7def8a4b | 3525 | static char *CMP_AF_D(uint64 instruction, Dis_info *info) |
89a955e8 | 3526 | { |
17ce2f00 | 3527 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 3528 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 3529 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 3530 | |
3f2aec07 ML |
3531 | const char *fd = FPR(fd_value, info); |
3532 | const char *fs = FPR(fs_value, info); | |
3533 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 3534 | |
c5231692 | 3535 | return img_format("CMP.AF.D %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
3536 | } |
3537 | ||
3538 | ||
3539 | /* | |
3540 | * | |
3541 | * | |
3542 | * 3 2 1 | |
3543 | * 10987654321098765432109876543210 | |
3544 | * 001000 x1110000101 | |
3545 | * rt ----- | |
3546 | * rs ----- | |
3547 | * rd ----- | |
3548 | */ | |
7def8a4b | 3549 | static char *CMP_AF_S(uint64 instruction, Dis_info *info) |
89a955e8 | 3550 | { |
17ce2f00 | 3551 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 3552 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 3553 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 3554 | |
3f2aec07 ML |
3555 | const char *fd = FPR(fd_value, info); |
3556 | const char *fs = FPR(fs_value, info); | |
3557 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 3558 | |
c5231692 | 3559 | return img_format("CMP.AF.S %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
3560 | } |
3561 | ||
3562 | ||
3563 | /* | |
3564 | * | |
3565 | * | |
3566 | * 3 2 1 | |
3567 | * 10987654321098765432109876543210 | |
3568 | * 001000 x1110000101 | |
3569 | * rt ----- | |
3570 | * rs ----- | |
3571 | * rd ----- | |
3572 | */ | |
7def8a4b | 3573 | static char *CMP_EQ_D(uint64 instruction, Dis_info *info) |
89a955e8 | 3574 | { |
17ce2f00 | 3575 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 3576 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 3577 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 3578 | |
3f2aec07 ML |
3579 | const char *fd = FPR(fd_value, info); |
3580 | const char *fs = FPR(fs_value, info); | |
3581 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 3582 | |
c5231692 | 3583 | return img_format("CMP.EQ.D %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
3584 | } |
3585 | ||
3586 | ||
3587 | /* | |
5c65eed6 | 3588 | * [DSP] CMP.EQ.PH rs, rt - Compare vectors of signed integer halfword values |
89a955e8 AM |
3589 | * |
3590 | * 3 2 1 | |
3591 | * 10987654321098765432109876543210 | |
5c65eed6 | 3592 | * 001000 xxxxxx0000000101 |
89a955e8 AM |
3593 | * rt ----- |
3594 | * rs ----- | |
89a955e8 | 3595 | */ |
7def8a4b | 3596 | static char *CMP_EQ_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
3597 | { |
3598 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
3599 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
3600 | ||
3f2aec07 ML |
3601 | const char *rs = GPR(rs_value, info); |
3602 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 3603 | |
c5231692 | 3604 | return img_format("CMP.EQ.PH %s, %s", rs, rt); |
89a955e8 AM |
3605 | } |
3606 | ||
3607 | ||
3608 | /* | |
3609 | * | |
3610 | * | |
3611 | * 3 2 1 | |
3612 | * 10987654321098765432109876543210 | |
3613 | * 001000 x1110000101 | |
3614 | * rt ----- | |
3615 | * rs ----- | |
3616 | * rd ----- | |
3617 | */ | |
7def8a4b | 3618 | static char *CMP_EQ_S(uint64 instruction, Dis_info *info) |
89a955e8 | 3619 | { |
17ce2f00 | 3620 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 3621 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 3622 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 3623 | |
3f2aec07 ML |
3624 | const char *fd = FPR(fd_value, info); |
3625 | const char *fs = FPR(fs_value, info); | |
3626 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 3627 | |
c5231692 | 3628 | return img_format("CMP.EQ.S %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
3629 | } |
3630 | ||
3631 | ||
3632 | /* | |
3633 | * | |
3634 | * | |
3635 | * 3 2 1 | |
3636 | * 10987654321098765432109876543210 | |
3637 | * 001000 x1110000101 | |
3638 | * rt ----- | |
3639 | * rs ----- | |
3640 | * rd ----- | |
3641 | */ | |
7def8a4b | 3642 | static char *CMP_LE_D(uint64 instruction, Dis_info *info) |
89a955e8 | 3643 | { |
17ce2f00 | 3644 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 3645 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 3646 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 3647 | |
3f2aec07 ML |
3648 | const char *fd = FPR(fd_value, info); |
3649 | const char *fs = FPR(fs_value, info); | |
3650 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 3651 | |
c5231692 | 3652 | return img_format("CMP.LE.D %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
3653 | } |
3654 | ||
3655 | ||
3656 | /* | |
5c65eed6 | 3657 | * [DSP] CMP.LE.PH rs, rt - Compare vectors of signed integer halfword values |
89a955e8 AM |
3658 | * |
3659 | * 3 2 1 | |
3660 | * 10987654321098765432109876543210 | |
5c65eed6 | 3661 | * 001000 xxxxxx0010000101 |
89a955e8 AM |
3662 | * rt ----- |
3663 | * rs ----- | |
89a955e8 | 3664 | */ |
7def8a4b | 3665 | static char *CMP_LE_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
3666 | { |
3667 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
3668 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
3669 | ||
3f2aec07 ML |
3670 | const char *rs = GPR(rs_value, info); |
3671 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 3672 | |
c5231692 | 3673 | return img_format("CMP.LE.PH %s, %s", rs, rt); |
89a955e8 AM |
3674 | } |
3675 | ||
3676 | ||
3677 | /* | |
3678 | * | |
3679 | * | |
3680 | * 3 2 1 | |
3681 | * 10987654321098765432109876543210 | |
3682 | * 001000 x1110000101 | |
3683 | * rt ----- | |
3684 | * rs ----- | |
3685 | * rd ----- | |
3686 | */ | |
7def8a4b | 3687 | static char *CMP_LE_S(uint64 instruction, Dis_info *info) |
89a955e8 | 3688 | { |
17ce2f00 | 3689 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 3690 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 3691 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 3692 | |
3f2aec07 ML |
3693 | const char *fd = FPR(fd_value, info); |
3694 | const char *fs = FPR(fs_value, info); | |
3695 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 3696 | |
c5231692 | 3697 | return img_format("CMP.LE.S %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
3698 | } |
3699 | ||
3700 | ||
3701 | /* | |
3702 | * | |
3703 | * | |
3704 | * 3 2 1 | |
3705 | * 10987654321098765432109876543210 | |
3706 | * 001000 x1110000101 | |
3707 | * rt ----- | |
3708 | * rs ----- | |
3709 | * rd ----- | |
3710 | */ | |
7def8a4b | 3711 | static char *CMP_LT_D(uint64 instruction, Dis_info *info) |
89a955e8 | 3712 | { |
17ce2f00 | 3713 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 3714 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 3715 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 3716 | |
3f2aec07 ML |
3717 | const char *fd = FPR(fd_value, info); |
3718 | const char *fs = FPR(fs_value, info); | |
3719 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 3720 | |
c5231692 | 3721 | return img_format("CMP.LT.D %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
3722 | } |
3723 | ||
3724 | ||
3725 | /* | |
5c65eed6 | 3726 | * [DSP] CMP.LT.PH rs, rt - Compare vectors of signed integer halfword values |
89a955e8 AM |
3727 | * |
3728 | * 3 2 1 | |
3729 | * 10987654321098765432109876543210 | |
5c65eed6 | 3730 | * 001000 xxxxxx0001000101 |
89a955e8 AM |
3731 | * rt ----- |
3732 | * rs ----- | |
89a955e8 | 3733 | */ |
7def8a4b | 3734 | static char *CMP_LT_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
3735 | { |
3736 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
3737 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
3738 | ||
3f2aec07 ML |
3739 | const char *rs = GPR(rs_value, info); |
3740 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 3741 | |
c5231692 | 3742 | return img_format("CMP.LT.PH %s, %s", rs, rt); |
89a955e8 AM |
3743 | } |
3744 | ||
3745 | ||
3746 | /* | |
3747 | * | |
3748 | * | |
3749 | * 3 2 1 | |
3750 | * 10987654321098765432109876543210 | |
3751 | * 001000 x1110000101 | |
3752 | * rt ----- | |
3753 | * rs ----- | |
3754 | * rd ----- | |
3755 | */ | |
7def8a4b | 3756 | static char *CMP_LT_S(uint64 instruction, Dis_info *info) |
89a955e8 | 3757 | { |
17ce2f00 | 3758 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 3759 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 3760 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 3761 | |
3f2aec07 ML |
3762 | const char *fd = FPR(fd_value, info); |
3763 | const char *fs = FPR(fs_value, info); | |
3764 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 3765 | |
c5231692 | 3766 | return img_format("CMP.LT.S %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
3767 | } |
3768 | ||
3769 | ||
3770 | /* | |
3771 | * | |
3772 | * | |
3773 | * 3 2 1 | |
3774 | * 10987654321098765432109876543210 | |
3775 | * 001000 x1110000101 | |
3776 | * rt ----- | |
3777 | * rs ----- | |
3778 | * rd ----- | |
3779 | */ | |
7def8a4b | 3780 | static char *CMP_NE_D(uint64 instruction, Dis_info *info) |
89a955e8 | 3781 | { |
17ce2f00 | 3782 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 3783 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 3784 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 3785 | |
3f2aec07 ML |
3786 | const char *fd = FPR(fd_value, info); |
3787 | const char *fs = FPR(fs_value, info); | |
3788 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 3789 | |
c5231692 | 3790 | return img_format("CMP.NE.D %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
3791 | } |
3792 | ||
3793 | ||
3794 | /* | |
3795 | * | |
3796 | * | |
3797 | * 3 2 1 | |
3798 | * 10987654321098765432109876543210 | |
3799 | * 001000 x1110000101 | |
3800 | * rt ----- | |
3801 | * rs ----- | |
3802 | * rd ----- | |
3803 | */ | |
7def8a4b | 3804 | static char *CMP_NE_S(uint64 instruction, Dis_info *info) |
89a955e8 | 3805 | { |
17ce2f00 | 3806 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 3807 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 3808 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 3809 | |
3f2aec07 ML |
3810 | const char *fd = FPR(fd_value, info); |
3811 | const char *fs = FPR(fs_value, info); | |
3812 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 3813 | |
c5231692 | 3814 | return img_format("CMP.NE.S %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
3815 | } |
3816 | ||
3817 | ||
3818 | /* | |
3819 | * | |
3820 | * | |
3821 | * 3 2 1 | |
3822 | * 10987654321098765432109876543210 | |
3823 | * 001000 x1110000101 | |
3824 | * rt ----- | |
3825 | * rs ----- | |
3826 | * rd ----- | |
3827 | */ | |
7def8a4b | 3828 | static char *CMP_OR_D(uint64 instruction, Dis_info *info) |
89a955e8 | 3829 | { |
17ce2f00 | 3830 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 3831 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 3832 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 3833 | |
3f2aec07 ML |
3834 | const char *fd = FPR(fd_value, info); |
3835 | const char *fs = FPR(fs_value, info); | |
3836 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 3837 | |
c5231692 | 3838 | return img_format("CMP.OR.D %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
3839 | } |
3840 | ||
3841 | ||
3842 | /* | |
3843 | * | |
3844 | * | |
3845 | * 3 2 1 | |
3846 | * 10987654321098765432109876543210 | |
3847 | * 001000 x1110000101 | |
3848 | * rt ----- | |
3849 | * rs ----- | |
3850 | * rd ----- | |
3851 | */ | |
7def8a4b | 3852 | static char *CMP_OR_S(uint64 instruction, Dis_info *info) |
89a955e8 | 3853 | { |
17ce2f00 | 3854 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 3855 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 3856 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 3857 | |
3f2aec07 ML |
3858 | const char *fd = FPR(fd_value, info); |
3859 | const char *fs = FPR(fs_value, info); | |
3860 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 3861 | |
c5231692 | 3862 | return img_format("CMP.OR.S %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
3863 | } |
3864 | ||
3865 | ||
3866 | /* | |
3867 | * | |
3868 | * | |
3869 | * 3 2 1 | |
3870 | * 10987654321098765432109876543210 | |
3871 | * 001000 x1110000101 | |
3872 | * rt ----- | |
3873 | * rs ----- | |
3874 | * rd ----- | |
3875 | */ | |
7def8a4b | 3876 | static char *CMP_SAF_D(uint64 instruction, Dis_info *info) |
89a955e8 | 3877 | { |
17ce2f00 | 3878 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 3879 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 3880 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 3881 | |
3f2aec07 ML |
3882 | const char *fd = FPR(fd_value, info); |
3883 | const char *fs = FPR(fs_value, info); | |
3884 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 3885 | |
c5231692 | 3886 | return img_format("CMP.SAF.D %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
3887 | } |
3888 | ||
3889 | ||
3890 | /* | |
3891 | * | |
3892 | * | |
3893 | * 3 2 1 | |
3894 | * 10987654321098765432109876543210 | |
3895 | * 001000 x1110000101 | |
3896 | * rt ----- | |
3897 | * rs ----- | |
3898 | * rd ----- | |
3899 | */ | |
7def8a4b | 3900 | static char *CMP_SAF_S(uint64 instruction, Dis_info *info) |
89a955e8 | 3901 | { |
17ce2f00 | 3902 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 3903 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 3904 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 3905 | |
3f2aec07 ML |
3906 | const char *fd = FPR(fd_value, info); |
3907 | const char *fs = FPR(fs_value, info); | |
3908 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 3909 | |
c5231692 | 3910 | return img_format("CMP.SAF.S %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
3911 | } |
3912 | ||
3913 | ||
3914 | /* | |
3915 | * | |
3916 | * | |
3917 | * 3 2 1 | |
3918 | * 10987654321098765432109876543210 | |
3919 | * 001000 x1110000101 | |
3920 | * rt ----- | |
3921 | * rs ----- | |
3922 | * rd ----- | |
3923 | */ | |
7def8a4b | 3924 | static char *CMP_SEQ_D(uint64 instruction, Dis_info *info) |
89a955e8 | 3925 | { |
17ce2f00 | 3926 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 3927 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 3928 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 3929 | |
3f2aec07 ML |
3930 | const char *fd = FPR(fd_value, info); |
3931 | const char *fs = FPR(fs_value, info); | |
3932 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 3933 | |
c5231692 | 3934 | return img_format("CMP.SEQ.D %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
3935 | } |
3936 | ||
3937 | ||
3938 | /* | |
3939 | * | |
3940 | * | |
3941 | * 3 2 1 | |
3942 | * 10987654321098765432109876543210 | |
3943 | * 001000 x1110000101 | |
3944 | * rt ----- | |
3945 | * rs ----- | |
3946 | * rd ----- | |
3947 | */ | |
7def8a4b | 3948 | static char *CMP_SEQ_S(uint64 instruction, Dis_info *info) |
89a955e8 | 3949 | { |
17ce2f00 | 3950 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 3951 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 3952 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 3953 | |
3f2aec07 ML |
3954 | const char *fd = FPR(fd_value, info); |
3955 | const char *fs = FPR(fs_value, info); | |
3956 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 3957 | |
c5231692 | 3958 | return img_format("CMP.SEQ.S %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
3959 | } |
3960 | ||
3961 | ||
3962 | /* | |
3963 | * | |
3964 | * | |
3965 | * 3 2 1 | |
3966 | * 10987654321098765432109876543210 | |
3967 | * 001000 x1110000101 | |
3968 | * rt ----- | |
3969 | * rs ----- | |
3970 | * rd ----- | |
3971 | */ | |
7def8a4b | 3972 | static char *CMP_SLE_D(uint64 instruction, Dis_info *info) |
89a955e8 | 3973 | { |
17ce2f00 | 3974 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 3975 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 3976 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 3977 | |
3f2aec07 ML |
3978 | const char *fd = FPR(fd_value, info); |
3979 | const char *fs = FPR(fs_value, info); | |
3980 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 3981 | |
c5231692 | 3982 | return img_format("CMP.SLE.D %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
3983 | } |
3984 | ||
3985 | ||
3986 | /* | |
3987 | * | |
3988 | * | |
3989 | * 3 2 1 | |
3990 | * 10987654321098765432109876543210 | |
3991 | * 001000 x1110000101 | |
3992 | * rt ----- | |
3993 | * rs ----- | |
3994 | * rd ----- | |
3995 | */ | |
7def8a4b | 3996 | static char *CMP_SLE_S(uint64 instruction, Dis_info *info) |
89a955e8 | 3997 | { |
17ce2f00 | 3998 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 3999 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 4000 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 4001 | |
3f2aec07 ML |
4002 | const char *fd = FPR(fd_value, info); |
4003 | const char *fs = FPR(fs_value, info); | |
4004 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 4005 | |
c5231692 | 4006 | return img_format("CMP.SLE.S %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
4007 | } |
4008 | ||
4009 | ||
4010 | /* | |
4011 | * | |
4012 | * | |
4013 | * 3 2 1 | |
4014 | * 10987654321098765432109876543210 | |
4015 | * 001000 x1110000101 | |
4016 | * rt ----- | |
4017 | * rs ----- | |
4018 | * rd ----- | |
4019 | */ | |
7def8a4b | 4020 | static char *CMP_SLT_D(uint64 instruction, Dis_info *info) |
89a955e8 | 4021 | { |
17ce2f00 | 4022 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 4023 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 4024 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 4025 | |
3f2aec07 ML |
4026 | const char *fd = FPR(fd_value, info); |
4027 | const char *fs = FPR(fs_value, info); | |
4028 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 4029 | |
c5231692 | 4030 | return img_format("CMP.SLT.D %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
4031 | } |
4032 | ||
4033 | ||
4034 | /* | |
4035 | * | |
4036 | * | |
4037 | * 3 2 1 | |
4038 | * 10987654321098765432109876543210 | |
4039 | * 001000 x1110000101 | |
4040 | * rt ----- | |
4041 | * rs ----- | |
4042 | * rd ----- | |
4043 | */ | |
7def8a4b | 4044 | static char *CMP_SLT_S(uint64 instruction, Dis_info *info) |
89a955e8 | 4045 | { |
17ce2f00 | 4046 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 4047 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 4048 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 4049 | |
3f2aec07 ML |
4050 | const char *fd = FPR(fd_value, info); |
4051 | const char *fs = FPR(fs_value, info); | |
4052 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 4053 | |
c5231692 | 4054 | return img_format("CMP.SLT.S %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
4055 | } |
4056 | ||
4057 | ||
4058 | /* | |
4059 | * | |
4060 | * | |
4061 | * 3 2 1 | |
4062 | * 10987654321098765432109876543210 | |
4063 | * 001000 x1110000101 | |
4064 | * rt ----- | |
4065 | * rs ----- | |
4066 | * rd ----- | |
4067 | */ | |
7def8a4b | 4068 | static char *CMP_SNE_D(uint64 instruction, Dis_info *info) |
89a955e8 | 4069 | { |
17ce2f00 | 4070 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 4071 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 4072 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 4073 | |
3f2aec07 ML |
4074 | const char *fd = FPR(fd_value, info); |
4075 | const char *fs = FPR(fs_value, info); | |
4076 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 4077 | |
c5231692 | 4078 | return img_format("CMP.SNE.D %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
4079 | } |
4080 | ||
4081 | ||
4082 | /* | |
4083 | * | |
4084 | * | |
4085 | * 3 2 1 | |
4086 | * 10987654321098765432109876543210 | |
4087 | * 001000 x1110000101 | |
4088 | * rt ----- | |
4089 | * rs ----- | |
4090 | * rd ----- | |
4091 | */ | |
7def8a4b | 4092 | static char *CMP_SNE_S(uint64 instruction, Dis_info *info) |
89a955e8 | 4093 | { |
17ce2f00 | 4094 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 4095 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 4096 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 4097 | |
3f2aec07 ML |
4098 | const char *fd = FPR(fd_value, info); |
4099 | const char *fs = FPR(fs_value, info); | |
4100 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 4101 | |
c5231692 | 4102 | return img_format("CMP.SNE.S %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
4103 | } |
4104 | ||
4105 | ||
4106 | /* | |
4107 | * | |
4108 | * | |
4109 | * 3 2 1 | |
4110 | * 10987654321098765432109876543210 | |
4111 | * 001000 x1110000101 | |
4112 | * rt ----- | |
4113 | * rs ----- | |
4114 | * rd ----- | |
4115 | */ | |
7def8a4b | 4116 | static char *CMP_SOR_D(uint64 instruction, Dis_info *info) |
89a955e8 | 4117 | { |
17ce2f00 | 4118 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 4119 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 4120 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 4121 | |
3f2aec07 ML |
4122 | const char *fd = FPR(fd_value, info); |
4123 | const char *fs = FPR(fs_value, info); | |
4124 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 4125 | |
c5231692 | 4126 | return img_format("CMP.SOR.D %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
4127 | } |
4128 | ||
4129 | ||
4130 | /* | |
4131 | * | |
4132 | * | |
4133 | * 3 2 1 | |
4134 | * 10987654321098765432109876543210 | |
4135 | * 001000 x1110000101 | |
4136 | * rt ----- | |
4137 | * rs ----- | |
4138 | * rd ----- | |
4139 | */ | |
7def8a4b | 4140 | static char *CMP_SOR_S(uint64 instruction, Dis_info *info) |
89a955e8 | 4141 | { |
17ce2f00 | 4142 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 4143 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 4144 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 4145 | |
3f2aec07 ML |
4146 | const char *fd = FPR(fd_value, info); |
4147 | const char *fs = FPR(fs_value, info); | |
4148 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 4149 | |
c5231692 | 4150 | return img_format("CMP.SOR.S %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
4151 | } |
4152 | ||
4153 | ||
4154 | /* | |
4155 | * | |
4156 | * | |
4157 | * 3 2 1 | |
4158 | * 10987654321098765432109876543210 | |
4159 | * 001000 x1110000101 | |
4160 | * rt ----- | |
4161 | * rs ----- | |
4162 | * rd ----- | |
4163 | */ | |
7def8a4b | 4164 | static char *CMP_SUEQ_D(uint64 instruction, Dis_info *info) |
89a955e8 | 4165 | { |
17ce2f00 | 4166 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 4167 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 4168 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 4169 | |
3f2aec07 ML |
4170 | const char *fd = FPR(fd_value, info); |
4171 | const char *fs = FPR(fs_value, info); | |
4172 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 4173 | |
c5231692 | 4174 | return img_format("CMP.SUEQ.D %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
4175 | } |
4176 | ||
4177 | ||
4178 | /* | |
4179 | * | |
4180 | * | |
4181 | * 3 2 1 | |
4182 | * 10987654321098765432109876543210 | |
4183 | * 001000 x1110000101 | |
4184 | * rt ----- | |
4185 | * rs ----- | |
4186 | * rd ----- | |
4187 | */ | |
7def8a4b | 4188 | static char *CMP_SUEQ_S(uint64 instruction, Dis_info *info) |
89a955e8 | 4189 | { |
17ce2f00 | 4190 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 4191 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 4192 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 4193 | |
3f2aec07 ML |
4194 | const char *fd = FPR(fd_value, info); |
4195 | const char *fs = FPR(fs_value, info); | |
4196 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 4197 | |
c5231692 | 4198 | return img_format("CMP.SUEQ.S %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
4199 | } |
4200 | ||
4201 | ||
4202 | /* | |
4203 | * | |
4204 | * | |
4205 | * 3 2 1 | |
4206 | * 10987654321098765432109876543210 | |
4207 | * 001000 x1110000101 | |
4208 | * rt ----- | |
4209 | * rs ----- | |
4210 | * rd ----- | |
4211 | */ | |
7def8a4b | 4212 | static char *CMP_SULE_D(uint64 instruction, Dis_info *info) |
89a955e8 | 4213 | { |
17ce2f00 | 4214 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 4215 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 4216 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 4217 | |
3f2aec07 ML |
4218 | const char *fd = FPR(fd_value, info); |
4219 | const char *fs = FPR(fs_value, info); | |
4220 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 4221 | |
c5231692 | 4222 | return img_format("CMP.SULE.D %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
4223 | } |
4224 | ||
4225 | ||
4226 | /* | |
4227 | * | |
4228 | * | |
4229 | * 3 2 1 | |
4230 | * 10987654321098765432109876543210 | |
4231 | * 001000 x1110000101 | |
4232 | * rt ----- | |
4233 | * rs ----- | |
4234 | * rd ----- | |
4235 | */ | |
7def8a4b | 4236 | static char *CMP_SULE_S(uint64 instruction, Dis_info *info) |
89a955e8 | 4237 | { |
17ce2f00 | 4238 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 4239 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 4240 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 4241 | |
3f2aec07 ML |
4242 | const char *fd = FPR(fd_value, info); |
4243 | const char *fs = FPR(fs_value, info); | |
4244 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 4245 | |
c5231692 | 4246 | return img_format("CMP.SULE.S %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
4247 | } |
4248 | ||
4249 | ||
4250 | /* | |
4251 | * | |
4252 | * | |
4253 | * 3 2 1 | |
4254 | * 10987654321098765432109876543210 | |
4255 | * 001000 x1110000101 | |
4256 | * rt ----- | |
4257 | * rs ----- | |
4258 | * rd ----- | |
4259 | */ | |
7def8a4b | 4260 | static char *CMP_SULT_D(uint64 instruction, Dis_info *info) |
89a955e8 | 4261 | { |
17ce2f00 | 4262 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 4263 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 4264 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 4265 | |
3f2aec07 ML |
4266 | const char *fd = FPR(fd_value, info); |
4267 | const char *fs = FPR(fs_value, info); | |
4268 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 4269 | |
c5231692 | 4270 | return img_format("CMP.SULT.D %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
4271 | } |
4272 | ||
4273 | ||
4274 | /* | |
4275 | * | |
4276 | * | |
4277 | * 3 2 1 | |
4278 | * 10987654321098765432109876543210 | |
4279 | * 001000 x1110000101 | |
4280 | * rt ----- | |
4281 | * rs ----- | |
4282 | * rd ----- | |
4283 | */ | |
7def8a4b | 4284 | static char *CMP_SULT_S(uint64 instruction, Dis_info *info) |
89a955e8 | 4285 | { |
17ce2f00 | 4286 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 4287 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 4288 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 4289 | |
3f2aec07 ML |
4290 | const char *fd = FPR(fd_value, info); |
4291 | const char *fs = FPR(fs_value, info); | |
4292 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 4293 | |
c5231692 | 4294 | return img_format("CMP.SULT.S %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
4295 | } |
4296 | ||
4297 | ||
4298 | /* | |
4299 | * | |
4300 | * | |
4301 | * 3 2 1 | |
4302 | * 10987654321098765432109876543210 | |
4303 | * 001000 x1110000101 | |
4304 | * rt ----- | |
4305 | * rs ----- | |
4306 | * rd ----- | |
4307 | */ | |
7def8a4b | 4308 | static char *CMP_SUN_D(uint64 instruction, Dis_info *info) |
89a955e8 | 4309 | { |
17ce2f00 | 4310 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 4311 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 4312 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 4313 | |
3f2aec07 ML |
4314 | const char *fd = FPR(fd_value, info); |
4315 | const char *fs = FPR(fs_value, info); | |
4316 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 4317 | |
c5231692 | 4318 | return img_format("CMP.SUN.D %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
4319 | } |
4320 | ||
4321 | ||
4322 | /* | |
4323 | * | |
4324 | * | |
4325 | * 3 2 1 | |
4326 | * 10987654321098765432109876543210 | |
4327 | * 001000 x1110000101 | |
4328 | * rt ----- | |
4329 | * rs ----- | |
4330 | * rd ----- | |
4331 | */ | |
7def8a4b | 4332 | static char *CMP_SUNE_D(uint64 instruction, Dis_info *info) |
89a955e8 | 4333 | { |
17ce2f00 | 4334 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 4335 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 4336 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 4337 | |
3f2aec07 ML |
4338 | const char *fd = FPR(fd_value, info); |
4339 | const char *fs = FPR(fs_value, info); | |
4340 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 4341 | |
c5231692 | 4342 | return img_format("CMP.SUNE.D %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
4343 | } |
4344 | ||
4345 | ||
4346 | /* | |
4347 | * | |
4348 | * | |
4349 | * 3 2 1 | |
4350 | * 10987654321098765432109876543210 | |
4351 | * 001000 x1110000101 | |
4352 | * rt ----- | |
4353 | * rs ----- | |
4354 | * rd ----- | |
4355 | */ | |
7def8a4b | 4356 | static char *CMP_SUNE_S(uint64 instruction, Dis_info *info) |
89a955e8 | 4357 | { |
17ce2f00 | 4358 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 4359 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 4360 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 4361 | |
3f2aec07 ML |
4362 | const char *fd = FPR(fd_value, info); |
4363 | const char *fs = FPR(fs_value, info); | |
4364 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 4365 | |
c5231692 | 4366 | return img_format("CMP.SUNE.S %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
4367 | } |
4368 | ||
4369 | ||
4370 | /* | |
4371 | * | |
4372 | * | |
4373 | * 3 2 1 | |
4374 | * 10987654321098765432109876543210 | |
4375 | * 001000 x1110000101 | |
4376 | * rt ----- | |
4377 | * rs ----- | |
4378 | * rd ----- | |
4379 | */ | |
7def8a4b | 4380 | static char *CMP_SUN_S(uint64 instruction, Dis_info *info) |
89a955e8 | 4381 | { |
17ce2f00 | 4382 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 4383 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 4384 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 4385 | |
3f2aec07 ML |
4386 | const char *fd = FPR(fd_value, info); |
4387 | const char *fs = FPR(fs_value, info); | |
4388 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 4389 | |
c5231692 | 4390 | return img_format("CMP.SUN.S %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
4391 | } |
4392 | ||
4393 | ||
4394 | /* | |
4395 | * | |
4396 | * | |
4397 | * 3 2 1 | |
4398 | * 10987654321098765432109876543210 | |
4399 | * 001000 x1110000101 | |
4400 | * rt ----- | |
4401 | * rs ----- | |
4402 | * rd ----- | |
4403 | */ | |
7def8a4b | 4404 | static char *CMP_UEQ_D(uint64 instruction, Dis_info *info) |
89a955e8 | 4405 | { |
17ce2f00 | 4406 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 4407 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 4408 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 4409 | |
3f2aec07 ML |
4410 | const char *fd = FPR(fd_value, info); |
4411 | const char *fs = FPR(fs_value, info); | |
4412 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 4413 | |
c5231692 | 4414 | return img_format("CMP.UEQ.D %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
4415 | } |
4416 | ||
4417 | ||
4418 | /* | |
4419 | * | |
4420 | * | |
4421 | * 3 2 1 | |
4422 | * 10987654321098765432109876543210 | |
4423 | * 001000 x1110000101 | |
4424 | * rt ----- | |
4425 | * rs ----- | |
4426 | * rd ----- | |
4427 | */ | |
7def8a4b | 4428 | static char *CMP_UEQ_S(uint64 instruction, Dis_info *info) |
89a955e8 | 4429 | { |
17ce2f00 | 4430 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 4431 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 4432 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 4433 | |
3f2aec07 ML |
4434 | const char *fd = FPR(fd_value, info); |
4435 | const char *fs = FPR(fs_value, info); | |
4436 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 4437 | |
c5231692 | 4438 | return img_format("CMP.UEQ.S %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
4439 | } |
4440 | ||
4441 | ||
4442 | /* | |
4443 | * | |
4444 | * | |
4445 | * 3 2 1 | |
4446 | * 10987654321098765432109876543210 | |
4447 | * 001000 x1110000101 | |
4448 | * rt ----- | |
4449 | * rs ----- | |
4450 | * rd ----- | |
4451 | */ | |
7def8a4b | 4452 | static char *CMP_ULE_D(uint64 instruction, Dis_info *info) |
89a955e8 | 4453 | { |
17ce2f00 | 4454 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 4455 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 4456 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 4457 | |
3f2aec07 ML |
4458 | const char *fd = FPR(fd_value, info); |
4459 | const char *fs = FPR(fs_value, info); | |
4460 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 4461 | |
c5231692 | 4462 | return img_format("CMP.ULE.D %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
4463 | } |
4464 | ||
4465 | ||
4466 | /* | |
4467 | * | |
4468 | * | |
4469 | * 3 2 1 | |
4470 | * 10987654321098765432109876543210 | |
4471 | * 001000 x1110000101 | |
4472 | * rt ----- | |
4473 | * rs ----- | |
4474 | * rd ----- | |
4475 | */ | |
7def8a4b | 4476 | static char *CMP_ULE_S(uint64 instruction, Dis_info *info) |
89a955e8 | 4477 | { |
17ce2f00 | 4478 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 4479 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 4480 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 4481 | |
3f2aec07 ML |
4482 | const char *fd = FPR(fd_value, info); |
4483 | const char *fs = FPR(fs_value, info); | |
4484 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 4485 | |
c5231692 | 4486 | return img_format("CMP.ULE.S %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
4487 | } |
4488 | ||
4489 | ||
4490 | /* | |
4491 | * | |
4492 | * | |
4493 | * 3 2 1 | |
4494 | * 10987654321098765432109876543210 | |
4495 | * 001000 x1110000101 | |
4496 | * rt ----- | |
4497 | * rs ----- | |
4498 | * rd ----- | |
4499 | */ | |
7def8a4b | 4500 | static char *CMP_ULT_D(uint64 instruction, Dis_info *info) |
89a955e8 | 4501 | { |
17ce2f00 | 4502 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 4503 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 4504 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 4505 | |
3f2aec07 ML |
4506 | const char *fd = FPR(fd_value, info); |
4507 | const char *fs = FPR(fs_value, info); | |
4508 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 4509 | |
c5231692 | 4510 | return img_format("CMP.ULT.D %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
4511 | } |
4512 | ||
4513 | ||
4514 | /* | |
4515 | * | |
4516 | * | |
4517 | * 3 2 1 | |
4518 | * 10987654321098765432109876543210 | |
4519 | * 001000 x1110000101 | |
4520 | * rt ----- | |
4521 | * rs ----- | |
4522 | * rd ----- | |
4523 | */ | |
7def8a4b | 4524 | static char *CMP_ULT_S(uint64 instruction, Dis_info *info) |
89a955e8 | 4525 | { |
17ce2f00 | 4526 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 4527 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 4528 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 4529 | |
3f2aec07 ML |
4530 | const char *fd = FPR(fd_value, info); |
4531 | const char *fs = FPR(fs_value, info); | |
4532 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 4533 | |
c5231692 | 4534 | return img_format("CMP.ULT.S %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
4535 | } |
4536 | ||
4537 | ||
4538 | /* | |
4539 | * | |
4540 | * | |
4541 | * 3 2 1 | |
4542 | * 10987654321098765432109876543210 | |
4543 | * 001000 x1110000101 | |
4544 | * rt ----- | |
4545 | * rs ----- | |
4546 | * rd ----- | |
4547 | */ | |
7def8a4b | 4548 | static char *CMP_UN_D(uint64 instruction, Dis_info *info) |
89a955e8 | 4549 | { |
17ce2f00 | 4550 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 4551 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 4552 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 4553 | |
3f2aec07 ML |
4554 | const char *fd = FPR(fd_value, info); |
4555 | const char *fs = FPR(fs_value, info); | |
4556 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 4557 | |
c5231692 | 4558 | return img_format("CMP.UN.D %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
4559 | } |
4560 | ||
4561 | ||
4562 | /* | |
4563 | * | |
4564 | * | |
4565 | * 3 2 1 | |
4566 | * 10987654321098765432109876543210 | |
4567 | * 001000 x1110000101 | |
4568 | * rt ----- | |
4569 | * rs ----- | |
4570 | * rd ----- | |
4571 | */ | |
7def8a4b | 4572 | static char *CMP_UNE_D(uint64 instruction, Dis_info *info) |
89a955e8 | 4573 | { |
17ce2f00 | 4574 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 4575 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 4576 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 4577 | |
3f2aec07 ML |
4578 | const char *fd = FPR(fd_value, info); |
4579 | const char *fs = FPR(fs_value, info); | |
4580 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 4581 | |
c5231692 | 4582 | return img_format("CMP.UNE.D %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
4583 | } |
4584 | ||
4585 | ||
4586 | /* | |
4587 | * | |
4588 | * | |
4589 | * 3 2 1 | |
4590 | * 10987654321098765432109876543210 | |
4591 | * 001000 x1110000101 | |
4592 | * rt ----- | |
4593 | * rs ----- | |
4594 | * rd ----- | |
4595 | */ | |
7def8a4b | 4596 | static char *CMP_UNE_S(uint64 instruction, Dis_info *info) |
89a955e8 | 4597 | { |
17ce2f00 | 4598 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 4599 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 4600 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 4601 | |
3f2aec07 ML |
4602 | const char *fd = FPR(fd_value, info); |
4603 | const char *fs = FPR(fs_value, info); | |
4604 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 4605 | |
c5231692 | 4606 | return img_format("CMP.UNE.S %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
4607 | } |
4608 | ||
4609 | ||
4610 | /* | |
4611 | * | |
4612 | * | |
4613 | * 3 2 1 | |
4614 | * 10987654321098765432109876543210 | |
4615 | * 001000 x1110000101 | |
4616 | * rt ----- | |
4617 | * rs ----- | |
4618 | * rd ----- | |
4619 | */ | |
7def8a4b | 4620 | static char *CMP_UN_S(uint64 instruction, Dis_info *info) |
89a955e8 | 4621 | { |
17ce2f00 | 4622 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 4623 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 4624 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 4625 | |
3f2aec07 ML |
4626 | const char *fd = FPR(fd_value, info); |
4627 | const char *fs = FPR(fs_value, info); | |
4628 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 4629 | |
c5231692 | 4630 | return img_format("CMP.UN.S %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
4631 | } |
4632 | ||
4633 | ||
4634 | /* | |
5c65eed6 AM |
4635 | * [DSP] CMPGDU.EQ.QB rd, rs, rt - Compare unsigned vector of |
4636 | * four bytes and write result to GPR and DSPControl | |
89a955e8 AM |
4637 | * |
4638 | * 3 2 1 | |
4639 | * 10987654321098765432109876543210 | |
5c65eed6 | 4640 | * 001000 x0110000101 |
89a955e8 AM |
4641 | * rt ----- |
4642 | * rs ----- | |
4643 | * rd ----- | |
4644 | */ | |
7def8a4b | 4645 | static char *CMPGDU_EQ_QB(uint64 instruction, Dis_info *info) |
89a955e8 AM |
4646 | { |
4647 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 4648 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 4649 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 4650 | |
3f2aec07 ML |
4651 | const char *rd = GPR(rd_value, info); |
4652 | const char *rs = GPR(rs_value, info); | |
4653 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 4654 | |
c5231692 | 4655 | return img_format("CMPGDU.EQ.QB %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
4656 | } |
4657 | ||
4658 | ||
4659 | /* | |
5c65eed6 AM |
4660 | * [DSP] CMPGDU.LE.QB rd, rs, rt - Compare unsigned vector of |
4661 | * four bytes and write result to GPR and DSPControl | |
89a955e8 AM |
4662 | * |
4663 | * 3 2 1 | |
4664 | * 10987654321098765432109876543210 | |
5c65eed6 | 4665 | * 001000 x1000000101 |
89a955e8 AM |
4666 | * rt ----- |
4667 | * rs ----- | |
4668 | * rd ----- | |
4669 | */ | |
7def8a4b | 4670 | static char *CMPGDU_LE_QB(uint64 instruction, Dis_info *info) |
89a955e8 AM |
4671 | { |
4672 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 4673 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 4674 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 4675 | |
3f2aec07 ML |
4676 | const char *rd = GPR(rd_value, info); |
4677 | const char *rs = GPR(rs_value, info); | |
4678 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 4679 | |
c5231692 | 4680 | return img_format("CMPGDU.LE.QB %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
4681 | } |
4682 | ||
4683 | ||
4684 | /* | |
5c65eed6 AM |
4685 | * [DSP] CMPGDU.EQ.QB rd, rs, rt - Compare unsigned vector of |
4686 | * four bytes and write result to GPR and DSPControl | |
89a955e8 AM |
4687 | * |
4688 | * 3 2 1 | |
4689 | * 10987654321098765432109876543210 | |
5c65eed6 | 4690 | * 001000 x0111000101 |
89a955e8 AM |
4691 | * rt ----- |
4692 | * rs ----- | |
4693 | * rd ----- | |
4694 | */ | |
7def8a4b | 4695 | static char *CMPGDU_LT_QB(uint64 instruction, Dis_info *info) |
89a955e8 AM |
4696 | { |
4697 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 4698 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 4699 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 4700 | |
3f2aec07 ML |
4701 | const char *rd = GPR(rd_value, info); |
4702 | const char *rs = GPR(rs_value, info); | |
4703 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 4704 | |
c5231692 | 4705 | return img_format("CMPGDU.LT.QB %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
4706 | } |
4707 | ||
4708 | ||
4709 | /* | |
5c65eed6 AM |
4710 | * [DSP] CMPGU.EQ.QB rd, rs, rt - Compare vectors of unsigned |
4711 | * byte values and write result to a GPR | |
89a955e8 AM |
4712 | * |
4713 | * 3 2 1 | |
4714 | * 10987654321098765432109876543210 | |
5c65eed6 | 4715 | * 001000 x0011000101 |
89a955e8 AM |
4716 | * rt ----- |
4717 | * rs ----- | |
4718 | * rd ----- | |
4719 | */ | |
7def8a4b | 4720 | static char *CMPGU_EQ_QB(uint64 instruction, Dis_info *info) |
89a955e8 AM |
4721 | { |
4722 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 4723 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 4724 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 4725 | |
3f2aec07 ML |
4726 | const char *rd = GPR(rd_value, info); |
4727 | const char *rs = GPR(rs_value, info); | |
4728 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 4729 | |
c5231692 | 4730 | return img_format("CMPGU.EQ.QB %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
4731 | } |
4732 | ||
4733 | ||
4734 | /* | |
5c65eed6 AM |
4735 | * [DSP] CMPGU.LE.QB rd, rs, rt - Compare vectors of unsigned |
4736 | * byte values and write result to a GPR | |
89a955e8 AM |
4737 | * |
4738 | * 3 2 1 | |
4739 | * 10987654321098765432109876543210 | |
5c65eed6 | 4740 | * 001000 x0101000101 |
89a955e8 AM |
4741 | * rt ----- |
4742 | * rs ----- | |
4743 | * rd ----- | |
4744 | */ | |
7def8a4b | 4745 | static char *CMPGU_LE_QB(uint64 instruction, Dis_info *info) |
89a955e8 AM |
4746 | { |
4747 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 4748 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 4749 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 4750 | |
3f2aec07 ML |
4751 | const char *rd = GPR(rd_value, info); |
4752 | const char *rs = GPR(rs_value, info); | |
4753 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 4754 | |
c5231692 | 4755 | return img_format("CMPGU.LE.QB %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
4756 | } |
4757 | ||
4758 | ||
4759 | /* | |
5c65eed6 AM |
4760 | * [DSP] CMPGU.LT.QB rd, rs, rt - Compare vectors of unsigned |
4761 | * byte values and write result to a GPR | |
89a955e8 AM |
4762 | * |
4763 | * 3 2 1 | |
4764 | * 10987654321098765432109876543210 | |
5c65eed6 | 4765 | * 001000 x0100000101 |
89a955e8 AM |
4766 | * rt ----- |
4767 | * rs ----- | |
4768 | * rd ----- | |
4769 | */ | |
7def8a4b | 4770 | static char *CMPGU_LT_QB(uint64 instruction, Dis_info *info) |
89a955e8 AM |
4771 | { |
4772 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 4773 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 4774 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 4775 | |
3f2aec07 ML |
4776 | const char *rd = GPR(rd_value, info); |
4777 | const char *rs = GPR(rs_value, info); | |
4778 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 4779 | |
c5231692 | 4780 | return img_format("CMPGU.LT.QB %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
4781 | } |
4782 | ||
4783 | ||
4784 | /* | |
5c65eed6 AM |
4785 | * [DSP] CMPU.EQ.QB rd, rs, rt - Compare vectors of unsigned |
4786 | * byte values | |
89a955e8 AM |
4787 | * |
4788 | * 3 2 1 | |
4789 | * 10987654321098765432109876543210 | |
5c65eed6 | 4790 | * 001000 xxxxxx1001000101 |
89a955e8 AM |
4791 | * rt ----- |
4792 | * rs ----- | |
89a955e8 | 4793 | */ |
7def8a4b | 4794 | static char *CMPU_EQ_QB(uint64 instruction, Dis_info *info) |
89a955e8 AM |
4795 | { |
4796 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
4797 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
4798 | ||
3f2aec07 ML |
4799 | const char *rs = GPR(rs_value, info); |
4800 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 4801 | |
c5231692 | 4802 | return img_format("CMPU.EQ.QB %s, %s", rs, rt); |
89a955e8 AM |
4803 | } |
4804 | ||
4805 | ||
4806 | /* | |
5c65eed6 AM |
4807 | * [DSP] CMPU.LE.QB rd, rs, rt - Compare vectors of unsigned |
4808 | * byte values | |
89a955e8 AM |
4809 | * |
4810 | * 3 2 1 | |
4811 | * 10987654321098765432109876543210 | |
5c65eed6 | 4812 | * 001000 xxxxxx1011000101 |
89a955e8 AM |
4813 | * rt ----- |
4814 | * rs ----- | |
89a955e8 | 4815 | */ |
7def8a4b | 4816 | static char *CMPU_LE_QB(uint64 instruction, Dis_info *info) |
89a955e8 AM |
4817 | { |
4818 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
4819 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
4820 | ||
3f2aec07 ML |
4821 | const char *rs = GPR(rs_value, info); |
4822 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 4823 | |
c5231692 | 4824 | return img_format("CMPU.LE.QB %s, %s", rs, rt); |
89a955e8 AM |
4825 | } |
4826 | ||
4827 | ||
4828 | /* | |
5c65eed6 AM |
4829 | * [DSP] CMPU.LT.QB rd, rs, rt - Compare vectors of unsigned |
4830 | * byte values | |
89a955e8 AM |
4831 | * |
4832 | * 3 2 1 | |
4833 | * 10987654321098765432109876543210 | |
5c65eed6 | 4834 | * 001000 xxxxxx1010000101 |
89a955e8 AM |
4835 | * rt ----- |
4836 | * rs ----- | |
89a955e8 | 4837 | */ |
7def8a4b | 4838 | static char *CMPU_LT_QB(uint64 instruction, Dis_info *info) |
89a955e8 AM |
4839 | { |
4840 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
4841 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
4842 | ||
3f2aec07 ML |
4843 | const char *rs = GPR(rs_value, info); |
4844 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 4845 | |
c5231692 | 4846 | return img_format("CMPU.LT.QB %s, %s", rs, rt); |
89a955e8 AM |
4847 | } |
4848 | ||
4849 | ||
4850 | /* | |
4851 | * | |
4852 | * | |
4853 | * 3 2 1 | |
4854 | * 10987654321098765432109876543210 | |
4855 | * 001000 x1110000101 | |
4856 | * rt ----- | |
4857 | * rs ----- | |
4858 | * rd ----- | |
4859 | */ | |
7def8a4b | 4860 | static char *COP2_1(uint64 instruction, Dis_info *info) |
89a955e8 AM |
4861 | { |
4862 | uint64 cofun_value = extract_cofun_25_24_23(instruction); | |
4863 | ||
89a955e8 | 4864 | |
4066c152 | 4865 | return img_format("COP2_1 0x%" PRIx64, cofun_value); |
89a955e8 AM |
4866 | } |
4867 | ||
4868 | ||
4869 | /* | |
4870 | * | |
4871 | * | |
4872 | * 3 2 1 | |
4873 | * 10987654321098765432109876543210 | |
4874 | * 001000 x1110000101 | |
4875 | * rt ----- | |
4876 | * rs ----- | |
4877 | * rd ----- | |
4878 | */ | |
7def8a4b | 4879 | static char *CTC1(uint64 instruction, Dis_info *info) |
89a955e8 | 4880 | { |
89a955e8 | 4881 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
86b5f803 | 4882 | uint64 cs_value = extract_cs_20_19_18_17_16(instruction); |
89a955e8 | 4883 | |
3f2aec07 | 4884 | const char *rt = GPR(rt_value, info); |
89a955e8 | 4885 | |
043dc73c | 4886 | return img_format("CTC1 %s, CP%" PRIu64, rt, cs_value); |
89a955e8 AM |
4887 | } |
4888 | ||
4889 | ||
4890 | /* | |
4891 | * | |
4892 | * | |
4893 | * 3 2 1 | |
4894 | * 10987654321098765432109876543210 | |
4895 | * 001000 x1110000101 | |
4896 | * rt ----- | |
4897 | * rs ----- | |
4898 | * rd ----- | |
4899 | */ | |
7def8a4b | 4900 | static char *CTC2(uint64 instruction, Dis_info *info) |
89a955e8 | 4901 | { |
89a955e8 | 4902 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
86b5f803 | 4903 | uint64 cs_value = extract_cs_20_19_18_17_16(instruction); |
89a955e8 | 4904 | |
3f2aec07 | 4905 | const char *rt = GPR(rt_value, info); |
89a955e8 | 4906 | |
043dc73c | 4907 | return img_format("CTC2 %s, CP%" PRIu64, rt, cs_value); |
89a955e8 AM |
4908 | } |
4909 | ||
4910 | ||
4911 | /* | |
4912 | * | |
4913 | * | |
4914 | * 3 2 1 | |
4915 | * 10987654321098765432109876543210 | |
4916 | * 001000 x1110000101 | |
4917 | * rt ----- | |
4918 | * rs ----- | |
4919 | * rd ----- | |
4920 | */ | |
7def8a4b | 4921 | static char *CVT_D_L(uint64 instruction, Dis_info *info) |
89a955e8 | 4922 | { |
17ce2f00 | 4923 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 4924 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 4925 | |
3f2aec07 ML |
4926 | const char *ft = FPR(ft_value, info); |
4927 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 4928 | |
c5231692 | 4929 | return img_format("CVT.D.L %s, %s", ft, fs); |
89a955e8 AM |
4930 | } |
4931 | ||
4932 | ||
4933 | /* | |
4934 | * | |
4935 | * | |
4936 | * 3 2 1 | |
4937 | * 10987654321098765432109876543210 | |
4938 | * 001000 x1110000101 | |
4939 | * rt ----- | |
4940 | * rs ----- | |
4941 | * rd ----- | |
4942 | */ | |
7def8a4b | 4943 | static char *CVT_D_S(uint64 instruction, Dis_info *info) |
89a955e8 | 4944 | { |
17ce2f00 | 4945 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 4946 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 4947 | |
3f2aec07 ML |
4948 | const char *ft = FPR(ft_value, info); |
4949 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 4950 | |
c5231692 | 4951 | return img_format("CVT.D.S %s, %s", ft, fs); |
89a955e8 AM |
4952 | } |
4953 | ||
4954 | ||
4955 | /* | |
4956 | * | |
4957 | * | |
4958 | * 3 2 1 | |
4959 | * 10987654321098765432109876543210 | |
4960 | * 001000 x1110000101 | |
4961 | * rt ----- | |
4962 | * rs ----- | |
4963 | * rd ----- | |
4964 | */ | |
7def8a4b | 4965 | static char *CVT_D_W(uint64 instruction, Dis_info *info) |
89a955e8 | 4966 | { |
17ce2f00 | 4967 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 4968 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 4969 | |
3f2aec07 ML |
4970 | const char *ft = FPR(ft_value, info); |
4971 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 4972 | |
c5231692 | 4973 | return img_format("CVT.D.W %s, %s", ft, fs); |
89a955e8 AM |
4974 | } |
4975 | ||
4976 | ||
4977 | /* | |
4978 | * | |
4979 | * | |
4980 | * 3 2 1 | |
4981 | * 10987654321098765432109876543210 | |
4982 | * 001000 x1110000101 | |
4983 | * rt ----- | |
4984 | * rs ----- | |
4985 | * rd ----- | |
4986 | */ | |
7def8a4b | 4987 | static char *CVT_L_D(uint64 instruction, Dis_info *info) |
89a955e8 | 4988 | { |
17ce2f00 | 4989 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 4990 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 4991 | |
3f2aec07 ML |
4992 | const char *ft = FPR(ft_value, info); |
4993 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 4994 | |
c5231692 | 4995 | return img_format("CVT.L.D %s, %s", ft, fs); |
89a955e8 AM |
4996 | } |
4997 | ||
4998 | ||
4999 | /* | |
5000 | * | |
5001 | * | |
5002 | * 3 2 1 | |
5003 | * 10987654321098765432109876543210 | |
5004 | * 001000 x1110000101 | |
5005 | * rt ----- | |
5006 | * rs ----- | |
5007 | * rd ----- | |
5008 | */ | |
7def8a4b | 5009 | static char *CVT_L_S(uint64 instruction, Dis_info *info) |
89a955e8 | 5010 | { |
17ce2f00 | 5011 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 5012 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 5013 | |
3f2aec07 ML |
5014 | const char *ft = FPR(ft_value, info); |
5015 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 5016 | |
c5231692 | 5017 | return img_format("CVT.L.S %s, %s", ft, fs); |
89a955e8 AM |
5018 | } |
5019 | ||
5020 | ||
5021 | /* | |
5022 | * | |
5023 | * | |
5024 | * 3 2 1 | |
5025 | * 10987654321098765432109876543210 | |
5026 | * 001000 x1110000101 | |
5027 | * rt ----- | |
5028 | * rs ----- | |
5029 | * rd ----- | |
5030 | */ | |
7def8a4b | 5031 | static char *CVT_S_D(uint64 instruction, Dis_info *info) |
89a955e8 | 5032 | { |
17ce2f00 | 5033 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 5034 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 5035 | |
3f2aec07 ML |
5036 | const char *ft = FPR(ft_value, info); |
5037 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 5038 | |
c5231692 | 5039 | return img_format("CVT.S.D %s, %s", ft, fs); |
89a955e8 AM |
5040 | } |
5041 | ||
5042 | ||
5043 | /* | |
5044 | * | |
5045 | * | |
5046 | * 3 2 1 | |
5047 | * 10987654321098765432109876543210 | |
5048 | * 001000 x1110000101 | |
5049 | * rt ----- | |
5050 | * rs ----- | |
5051 | * rd ----- | |
5052 | */ | |
7def8a4b | 5053 | static char *CVT_S_L(uint64 instruction, Dis_info *info) |
89a955e8 | 5054 | { |
17ce2f00 | 5055 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 5056 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 5057 | |
3f2aec07 ML |
5058 | const char *ft = FPR(ft_value, info); |
5059 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 5060 | |
c5231692 | 5061 | return img_format("CVT.S.L %s, %s", ft, fs); |
89a955e8 AM |
5062 | } |
5063 | ||
5064 | ||
5065 | /* | |
5066 | * | |
5067 | * | |
5068 | * 3 2 1 | |
5069 | * 10987654321098765432109876543210 | |
5070 | * 001000 x1110000101 | |
5071 | * rt ----- | |
5072 | * rs ----- | |
5073 | * rd ----- | |
5074 | */ | |
7def8a4b | 5075 | static char *CVT_S_PL(uint64 instruction, Dis_info *info) |
89a955e8 | 5076 | { |
17ce2f00 | 5077 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 5078 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 5079 | |
3f2aec07 ML |
5080 | const char *ft = FPR(ft_value, info); |
5081 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 5082 | |
c5231692 | 5083 | return img_format("CVT.S.PL %s, %s", ft, fs); |
89a955e8 AM |
5084 | } |
5085 | ||
5086 | ||
5087 | /* | |
5088 | * | |
5089 | * | |
5090 | * 3 2 1 | |
5091 | * 10987654321098765432109876543210 | |
5092 | * 001000 x1110000101 | |
5093 | * rt ----- | |
5094 | * rs ----- | |
5095 | * rd ----- | |
5096 | */ | |
7def8a4b | 5097 | static char *CVT_S_PU(uint64 instruction, Dis_info *info) |
89a955e8 | 5098 | { |
17ce2f00 | 5099 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 5100 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 5101 | |
3f2aec07 ML |
5102 | const char *ft = FPR(ft_value, info); |
5103 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 5104 | |
c5231692 | 5105 | return img_format("CVT.S.PU %s, %s", ft, fs); |
89a955e8 AM |
5106 | } |
5107 | ||
5108 | ||
5109 | /* | |
5110 | * | |
5111 | * | |
5112 | * 3 2 1 | |
5113 | * 10987654321098765432109876543210 | |
5114 | * 001000 x1110000101 | |
5115 | * rt ----- | |
5116 | * rs ----- | |
5117 | * rd ----- | |
5118 | */ | |
7def8a4b | 5119 | static char *CVT_S_W(uint64 instruction, Dis_info *info) |
89a955e8 | 5120 | { |
17ce2f00 | 5121 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 5122 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 5123 | |
3f2aec07 ML |
5124 | const char *ft = FPR(ft_value, info); |
5125 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 5126 | |
c5231692 | 5127 | return img_format("CVT.S.W %s, %s", ft, fs); |
89a955e8 AM |
5128 | } |
5129 | ||
5130 | ||
5131 | /* | |
5132 | * | |
5133 | * | |
5134 | * 3 2 1 | |
5135 | * 10987654321098765432109876543210 | |
5136 | * 001000 x1110000101 | |
5137 | * rt ----- | |
5138 | * rs ----- | |
5139 | * rd ----- | |
5140 | */ | |
7def8a4b | 5141 | static char *CVT_W_D(uint64 instruction, Dis_info *info) |
89a955e8 | 5142 | { |
17ce2f00 | 5143 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 5144 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 5145 | |
3f2aec07 ML |
5146 | const char *ft = FPR(ft_value, info); |
5147 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 5148 | |
c5231692 | 5149 | return img_format("CVT.W.D %s, %s", ft, fs); |
89a955e8 AM |
5150 | } |
5151 | ||
5152 | ||
5153 | /* | |
5154 | * | |
5155 | * | |
5156 | * 3 2 1 | |
5157 | * 10987654321098765432109876543210 | |
5158 | * 001000 x1110000101 | |
5159 | * rt ----- | |
5160 | * rs ----- | |
5161 | * rd ----- | |
5162 | */ | |
7def8a4b | 5163 | static char *CVT_W_S(uint64 instruction, Dis_info *info) |
89a955e8 | 5164 | { |
17ce2f00 | 5165 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 5166 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 5167 | |
3f2aec07 ML |
5168 | const char *ft = FPR(ft_value, info); |
5169 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 5170 | |
c5231692 | 5171 | return img_format("CVT.W.S %s, %s", ft, fs); |
89a955e8 AM |
5172 | } |
5173 | ||
5174 | ||
5175 | /* | |
5176 | * | |
5177 | * | |
5178 | * 3 2 1 | |
5179 | * 10987654321098765432109876543210 | |
5180 | * 001000 x1110000101 | |
5181 | * rt ----- | |
5182 | * rs ----- | |
5183 | * rd ----- | |
5184 | */ | |
7def8a4b | 5185 | static char *DADDIU_48_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
5186 | { |
5187 | uint64 rt_value = extract_rt_41_40_39_38_37(instruction); | |
d3605cc0 | 5188 | int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction); |
89a955e8 | 5189 | |
3f2aec07 | 5190 | const char *rt = GPR(rt_value, info); |
89a955e8 | 5191 | |
4066c152 | 5192 | return img_format("DADDIU %s, %s", rt, s_value); |
89a955e8 AM |
5193 | } |
5194 | ||
5195 | ||
5196 | /* | |
5197 | * | |
5198 | * | |
5199 | * 3 2 1 | |
5200 | * 10987654321098765432109876543210 | |
5201 | * 001000 x1110000101 | |
5202 | * rt ----- | |
5203 | * rs ----- | |
5204 | * rd ----- | |
5205 | */ | |
7def8a4b | 5206 | static char *DADDIU_NEG_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
5207 | { |
5208 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 5209 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 5210 | uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 5211 | |
3f2aec07 ML |
5212 | const char *rt = GPR(rt_value, info); |
5213 | const char *rs = GPR(rs_value, info); | |
4066c152 | 5214 | int64 u = neg_copy(u_value); |
89a955e8 | 5215 | |
4066c152 | 5216 | return img_format("DADDIU %s, %s, %" PRId64, rt, rs, u); |
89a955e8 AM |
5217 | } |
5218 | ||
5219 | ||
5220 | /* | |
5221 | * | |
5222 | * | |
5223 | * 3 2 1 | |
5224 | * 10987654321098765432109876543210 | |
5225 | * 001000 x1110000101 | |
5226 | * rt ----- | |
5227 | * rs ----- | |
5228 | * rd ----- | |
5229 | */ | |
7def8a4b | 5230 | static char *DADDIU_U12_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
5231 | { |
5232 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 5233 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 5234 | uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 5235 | |
3f2aec07 ML |
5236 | const char *rt = GPR(rt_value, info); |
5237 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 5238 | |
4066c152 | 5239 | return img_format("DADDIU %s, %s, 0x%" PRIx64, rt, rs, u_value); |
89a955e8 AM |
5240 | } |
5241 | ||
5242 | ||
5243 | /* | |
5244 | * | |
5245 | * | |
5246 | * 3 2 1 | |
5247 | * 10987654321098765432109876543210 | |
5248 | * 001000 x1110000101 | |
5249 | * rt ----- | |
5250 | * rs ----- | |
5251 | * rd ----- | |
5252 | */ | |
7def8a4b | 5253 | static char *DADD(uint64 instruction, Dis_info *info) |
89a955e8 AM |
5254 | { |
5255 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 5256 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 5257 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 5258 | |
3f2aec07 ML |
5259 | const char *rd = GPR(rd_value, info); |
5260 | const char *rs = GPR(rs_value, info); | |
5261 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 5262 | |
c5231692 | 5263 | return img_format("DADD %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
5264 | } |
5265 | ||
5266 | ||
5267 | /* | |
5268 | * | |
5269 | * | |
5270 | * 3 2 1 | |
5271 | * 10987654321098765432109876543210 | |
5272 | * 001000 x1110000101 | |
5273 | * rt ----- | |
5274 | * rs ----- | |
5275 | * rd ----- | |
5276 | */ | |
7def8a4b | 5277 | static char *DADDU(uint64 instruction, Dis_info *info) |
89a955e8 AM |
5278 | { |
5279 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 5280 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 5281 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 5282 | |
3f2aec07 ML |
5283 | const char *rd = GPR(rd_value, info); |
5284 | const char *rs = GPR(rs_value, info); | |
5285 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 5286 | |
c5231692 | 5287 | return img_format("DADDU %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
5288 | } |
5289 | ||
5290 | ||
5291 | /* | |
5292 | * | |
5293 | * | |
5294 | * 3 2 1 | |
5295 | * 10987654321098765432109876543210 | |
5296 | * 001000 x1110000101 | |
5297 | * rt ----- | |
5298 | * rs ----- | |
5299 | * rd ----- | |
5300 | */ | |
7def8a4b | 5301 | static char *DCLO(uint64 instruction, Dis_info *info) |
89a955e8 AM |
5302 | { |
5303 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
5304 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
5305 | ||
3f2aec07 ML |
5306 | const char *rt = GPR(rt_value, info); |
5307 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 5308 | |
c5231692 | 5309 | return img_format("DCLO %s, %s", rt, rs); |
89a955e8 AM |
5310 | } |
5311 | ||
5312 | ||
5313 | /* | |
5314 | * | |
5315 | * | |
5316 | * 3 2 1 | |
5317 | * 10987654321098765432109876543210 | |
5318 | * 001000 x1110000101 | |
5319 | * rt ----- | |
5320 | * rs ----- | |
5321 | * rd ----- | |
5322 | */ | |
7def8a4b | 5323 | static char *DCLZ(uint64 instruction, Dis_info *info) |
89a955e8 AM |
5324 | { |
5325 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
5326 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
5327 | ||
3f2aec07 ML |
5328 | const char *rt = GPR(rt_value, info); |
5329 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 5330 | |
c5231692 | 5331 | return img_format("DCLZ %s, %s", rt, rs); |
89a955e8 AM |
5332 | } |
5333 | ||
5334 | ||
5335 | /* | |
5336 | * | |
5337 | * | |
5338 | * 3 2 1 | |
5339 | * 10987654321098765432109876543210 | |
5340 | * 001000 x1110000101 | |
5341 | * rt ----- | |
5342 | * rs ----- | |
5343 | * rd ----- | |
5344 | */ | |
7def8a4b | 5345 | static char *DDIV(uint64 instruction, Dis_info *info) |
89a955e8 AM |
5346 | { |
5347 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 5348 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 5349 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 5350 | |
3f2aec07 ML |
5351 | const char *rd = GPR(rd_value, info); |
5352 | const char *rs = GPR(rs_value, info); | |
5353 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 5354 | |
c5231692 | 5355 | return img_format("DDIV %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
5356 | } |
5357 | ||
5358 | ||
5359 | /* | |
5360 | * | |
5361 | * | |
5362 | * 3 2 1 | |
5363 | * 10987654321098765432109876543210 | |
5364 | * 001000 x1110000101 | |
5365 | * rt ----- | |
5366 | * rs ----- | |
5367 | * rd ----- | |
5368 | */ | |
7def8a4b | 5369 | static char *DDIVU(uint64 instruction, Dis_info *info) |
89a955e8 AM |
5370 | { |
5371 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 5372 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 5373 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 5374 | |
3f2aec07 ML |
5375 | const char *rd = GPR(rd_value, info); |
5376 | const char *rs = GPR(rs_value, info); | |
5377 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 5378 | |
c5231692 | 5379 | return img_format("DDIVU %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
5380 | } |
5381 | ||
5382 | ||
5383 | /* | |
5384 | * | |
5385 | * | |
5386 | * 3 2 1 | |
5387 | * 10987654321098765432109876543210 | |
5388 | * 001000 x1110000101 | |
5389 | * rt ----- | |
5390 | * rs ----- | |
5391 | * rd ----- | |
5392 | */ | |
7def8a4b | 5393 | static char *DERET(uint64 instruction, Dis_info *info) |
89a955e8 AM |
5394 | { |
5395 | (void)instruction; | |
5396 | ||
7def8a4b | 5397 | return g_strdup("DERET "); |
89a955e8 AM |
5398 | } |
5399 | ||
5400 | ||
5401 | /* | |
5402 | * | |
5403 | * | |
5404 | * 3 2 1 | |
5405 | * 10987654321098765432109876543210 | |
5406 | * 001000 x1110000101 | |
5407 | * rt ----- | |
5408 | * rs ----- | |
5409 | * rd ----- | |
5410 | */ | |
7def8a4b | 5411 | static char *DEXTM(uint64 instruction, Dis_info *info) |
89a955e8 AM |
5412 | { |
5413 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
86b5f803 | 5414 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
89a955e8 AM |
5415 | uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction); |
5416 | uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction); | |
89a955e8 | 5417 | |
3f2aec07 ML |
5418 | const char *rt = GPR(rt_value, info); |
5419 | const char *rs = GPR(rs_value, info); | |
4066c152 | 5420 | uint64 msbd = encode_msbd_from_size(msbd_value); |
89a955e8 | 5421 | |
4066c152 ML |
5422 | return img_format("DEXTM %s, %s, 0x%" PRIx64 ", 0x%" PRIx64, |
5423 | rt, rs, lsb_value, msbd); | |
89a955e8 AM |
5424 | } |
5425 | ||
5426 | ||
5427 | /* | |
5428 | * | |
5429 | * | |
5430 | * 3 2 1 | |
5431 | * 10987654321098765432109876543210 | |
5432 | * 001000 x1110000101 | |
5433 | * rt ----- | |
5434 | * rs ----- | |
5435 | * rd ----- | |
5436 | */ | |
7def8a4b | 5437 | static char *DEXT(uint64 instruction, Dis_info *info) |
89a955e8 AM |
5438 | { |
5439 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
86b5f803 | 5440 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
89a955e8 AM |
5441 | uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction); |
5442 | uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction); | |
89a955e8 | 5443 | |
3f2aec07 ML |
5444 | const char *rt = GPR(rt_value, info); |
5445 | const char *rs = GPR(rs_value, info); | |
4066c152 | 5446 | uint64 msbd = encode_msbd_from_size(msbd_value); |
89a955e8 | 5447 | |
4066c152 ML |
5448 | return img_format("DEXT %s, %s, 0x%" PRIx64 ", 0x%" PRIx64, |
5449 | rt, rs, lsb_value, msbd); | |
89a955e8 AM |
5450 | } |
5451 | ||
5452 | ||
5453 | /* | |
5454 | * | |
5455 | * | |
5456 | * 3 2 1 | |
5457 | * 10987654321098765432109876543210 | |
5458 | * 001000 x1110000101 | |
5459 | * rt ----- | |
5460 | * rs ----- | |
5461 | * rd ----- | |
5462 | */ | |
7def8a4b | 5463 | static char *DEXTU(uint64 instruction, Dis_info *info) |
89a955e8 AM |
5464 | { |
5465 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
86b5f803 | 5466 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
89a955e8 AM |
5467 | uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction); |
5468 | uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction); | |
89a955e8 | 5469 | |
3f2aec07 ML |
5470 | const char *rt = GPR(rt_value, info); |
5471 | const char *rs = GPR(rs_value, info); | |
4066c152 | 5472 | uint64 msbd = encode_msbd_from_size(msbd_value); |
89a955e8 | 5473 | |
4066c152 ML |
5474 | return img_format("DEXTU %s, %s, 0x%" PRIx64 ", 0x%" PRIx64, |
5475 | rt, rs, lsb_value, msbd); | |
89a955e8 AM |
5476 | } |
5477 | ||
5478 | ||
5479 | /* | |
5480 | * | |
5481 | * | |
5482 | * 3 2 1 | |
5483 | * 10987654321098765432109876543210 | |
5484 | * 001000 x1110000101 | |
5485 | * rt ----- | |
5486 | * rs ----- | |
5487 | * rd ----- | |
5488 | */ | |
7def8a4b | 5489 | static char *DINSM(uint64 instruction, Dis_info *info) |
89a955e8 AM |
5490 | { |
5491 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
86b5f803 | 5492 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
89a955e8 AM |
5493 | uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction); |
5494 | uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction); | |
89a955e8 | 5495 | |
3f2aec07 ML |
5496 | const char *rt = GPR(rt_value, info); |
5497 | const char *rs = GPR(rs_value, info); | |
89a955e8 AM |
5498 | /* !!!!!!!!!! - no conversion function */ |
5499 | ||
4066c152 ML |
5500 | return img_format("DINSM %s, %s, 0x%" PRIx64 ", 0x%" PRIx64, |
5501 | rt, rs, lsb_value, msbd_value); | |
89a955e8 AM |
5502 | /* hand edited */ |
5503 | } | |
5504 | ||
5505 | ||
5506 | /* | |
5507 | * | |
5508 | * | |
5509 | * 3 2 1 | |
5510 | * 10987654321098765432109876543210 | |
5511 | * 001000 x1110000101 | |
5512 | * rt ----- | |
5513 | * rs ----- | |
5514 | * rd ----- | |
5515 | */ | |
7def8a4b | 5516 | static char *DINS(uint64 instruction, Dis_info *info) |
89a955e8 AM |
5517 | { |
5518 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
86b5f803 | 5519 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
89a955e8 AM |
5520 | uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction); |
5521 | uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction); | |
89a955e8 | 5522 | |
3f2aec07 ML |
5523 | const char *rt = GPR(rt_value, info); |
5524 | const char *rs = GPR(rs_value, info); | |
89a955e8 AM |
5525 | /* !!!!!!!!!! - no conversion function */ |
5526 | ||
4066c152 ML |
5527 | return img_format("DINS %s, %s, 0x%" PRIx64 ", 0x%" PRIx64, |
5528 | rt, rs, lsb_value, msbd_value); | |
89a955e8 AM |
5529 | /* hand edited */ |
5530 | } | |
5531 | ||
5532 | ||
5533 | /* | |
5534 | * | |
5535 | * | |
5536 | * 3 2 1 | |
5537 | * 10987654321098765432109876543210 | |
5538 | * 001000 x1110000101 | |
5539 | * rt ----- | |
5540 | * rs ----- | |
5541 | * rd ----- | |
5542 | */ | |
7def8a4b | 5543 | static char *DINSU(uint64 instruction, Dis_info *info) |
89a955e8 AM |
5544 | { |
5545 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
86b5f803 | 5546 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
89a955e8 AM |
5547 | uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction); |
5548 | uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction); | |
89a955e8 | 5549 | |
3f2aec07 ML |
5550 | const char *rt = GPR(rt_value, info); |
5551 | const char *rs = GPR(rs_value, info); | |
89a955e8 AM |
5552 | /* !!!!!!!!!! - no conversion function */ |
5553 | ||
4066c152 ML |
5554 | return img_format("DINSU %s, %s, 0x%" PRIx64 ", 0x%" PRIx64, |
5555 | rt, rs, lsb_value, msbd_value); | |
89a955e8 AM |
5556 | /* hand edited */ |
5557 | } | |
5558 | ||
5559 | ||
5560 | /* | |
5561 | * | |
5562 | * | |
5563 | * 3 2 1 | |
5564 | * 10987654321098765432109876543210 | |
5565 | * 001000 x1110000101 | |
5566 | * rt ----- | |
5567 | * rs ----- | |
5568 | * rd ----- | |
5569 | */ | |
7def8a4b | 5570 | static char *DI(uint64 instruction, Dis_info *info) |
89a955e8 AM |
5571 | { |
5572 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
5573 | ||
3f2aec07 | 5574 | const char *rt = GPR(rt_value, info); |
89a955e8 | 5575 | |
c5231692 | 5576 | return img_format("DI %s", rt); |
89a955e8 AM |
5577 | } |
5578 | ||
5579 | ||
5580 | /* | |
5581 | * | |
5582 | * | |
5583 | * 3 2 1 | |
5584 | * 10987654321098765432109876543210 | |
5585 | * 001000 x1110000101 | |
5586 | * rt ----- | |
5587 | * rs ----- | |
5588 | * rd ----- | |
5589 | */ | |
7def8a4b | 5590 | static char *DIV(uint64 instruction, Dis_info *info) |
89a955e8 AM |
5591 | { |
5592 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 5593 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 5594 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 5595 | |
3f2aec07 ML |
5596 | const char *rd = GPR(rd_value, info); |
5597 | const char *rs = GPR(rs_value, info); | |
5598 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 5599 | |
c5231692 | 5600 | return img_format("DIV %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
5601 | } |
5602 | ||
5603 | ||
5604 | /* | |
5605 | * | |
5606 | * | |
5607 | * 3 2 1 | |
5608 | * 10987654321098765432109876543210 | |
5609 | * 001000 x1110000101 | |
5610 | * rt ----- | |
5611 | * rs ----- | |
5612 | * rd ----- | |
5613 | */ | |
7def8a4b | 5614 | static char *DIV_D(uint64 instruction, Dis_info *info) |
89a955e8 | 5615 | { |
17ce2f00 | 5616 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 5617 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 5618 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 5619 | |
3f2aec07 ML |
5620 | const char *fd = FPR(fd_value, info); |
5621 | const char *fs = FPR(fs_value, info); | |
5622 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 5623 | |
c5231692 | 5624 | return img_format("DIV.D %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
5625 | } |
5626 | ||
5627 | ||
5628 | /* | |
5629 | * | |
5630 | * | |
5631 | * 3 2 1 | |
5632 | * 10987654321098765432109876543210 | |
5633 | * 001000 x1110000101 | |
5634 | * rt ----- | |
5635 | * rs ----- | |
5636 | * rd ----- | |
5637 | */ | |
7def8a4b | 5638 | static char *DIV_S(uint64 instruction, Dis_info *info) |
89a955e8 | 5639 | { |
17ce2f00 | 5640 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 5641 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 5642 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 5643 | |
3f2aec07 ML |
5644 | const char *fd = FPR(fd_value, info); |
5645 | const char *fs = FPR(fs_value, info); | |
5646 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 5647 | |
c5231692 | 5648 | return img_format("DIV.S %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
5649 | } |
5650 | ||
5651 | ||
5652 | /* | |
5653 | * | |
5654 | * | |
5655 | * 3 2 1 | |
5656 | * 10987654321098765432109876543210 | |
5657 | * 001000 x1110000101 | |
5658 | * rt ----- | |
5659 | * rs ----- | |
5660 | * rd ----- | |
5661 | */ | |
7def8a4b | 5662 | static char *DIVU(uint64 instruction, Dis_info *info) |
89a955e8 AM |
5663 | { |
5664 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 5665 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 5666 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 5667 | |
3f2aec07 ML |
5668 | const char *rd = GPR(rd_value, info); |
5669 | const char *rs = GPR(rs_value, info); | |
5670 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 5671 | |
c5231692 | 5672 | return img_format("DIVU %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
5673 | } |
5674 | ||
5675 | ||
5676 | /* | |
5677 | * | |
5678 | * | |
5679 | * 3 2 1 | |
5680 | * 10987654321098765432109876543210 | |
5681 | * 001000 x1110000101 | |
5682 | * rt ----- | |
5683 | * rs ----- | |
5684 | * rd ----- | |
5685 | */ | |
7def8a4b | 5686 | static char *DLSA(uint64 instruction, Dis_info *info) |
89a955e8 AM |
5687 | { |
5688 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
86b5f803 | 5689 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
b4c5d21c | 5690 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 5691 | uint64 u2_value = extract_u2_10_9(instruction); |
89a955e8 | 5692 | |
3f2aec07 ML |
5693 | const char *rd = GPR(rd_value, info); |
5694 | const char *rs = GPR(rs_value, info); | |
5695 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 5696 | |
4066c152 | 5697 | return img_format("DLSA %s, %s, %s, 0x%" PRIx64, rd, rs, rt, u2_value); |
89a955e8 AM |
5698 | } |
5699 | ||
5700 | ||
5701 | /* | |
5702 | * | |
5703 | * | |
5704 | * 3 2 1 | |
5705 | * 10987654321098765432109876543210 | |
5706 | * 001000 x1110000101 | |
5707 | * rt ----- | |
5708 | * rs ----- | |
5709 | * rd ----- | |
5710 | */ | |
7def8a4b | 5711 | static char *DLUI_48_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
5712 | { |
5713 | uint64 rt_value = extract_rt_41_40_39_38_37(instruction); | |
11b9732a | 5714 | uint64 u_value = extract_u_31_to_0__s32(instruction); |
89a955e8 | 5715 | |
3f2aec07 | 5716 | const char *rt = GPR(rt_value, info); |
89a955e8 | 5717 | |
4066c152 | 5718 | return img_format("DLUI %s, 0x%" PRIx64, rt, u_value); |
89a955e8 AM |
5719 | } |
5720 | ||
5721 | ||
5722 | /* | |
5723 | * | |
5724 | * | |
5725 | * 3 2 1 | |
5726 | * 10987654321098765432109876543210 | |
5727 | * 001000 x1110000101 | |
5728 | * rt ----- | |
5729 | * rs ----- | |
5730 | * rd ----- | |
5731 | */ | |
7def8a4b | 5732 | static char *DMFC0(uint64 instruction, Dis_info *info) |
89a955e8 AM |
5733 | { |
5734 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
5735 | uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction); | |
5736 | uint64 sel_value = extract_sel_15_14_13_12_11(instruction); | |
5737 | ||
3f2aec07 | 5738 | const char *rt = GPR(rt_value, info); |
89a955e8 | 5739 | |
043dc73c ML |
5740 | return img_format("DMFC0 %s, CP%" PRIu64 ", 0x%" PRIx64, |
5741 | rt, c0s_value, sel_value); | |
89a955e8 AM |
5742 | } |
5743 | ||
5744 | ||
5745 | /* | |
5746 | * | |
5747 | * | |
5748 | * 3 2 1 | |
5749 | * 10987654321098765432109876543210 | |
5750 | * 001000 x1110000101 | |
5751 | * rt ----- | |
5752 | * rs ----- | |
5753 | * rd ----- | |
5754 | */ | |
7def8a4b | 5755 | static char *DMFC1(uint64 instruction, Dis_info *info) |
89a955e8 AM |
5756 | { |
5757 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
52a96d22 | 5758 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 5759 | |
3f2aec07 ML |
5760 | const char *rt = GPR(rt_value, info); |
5761 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 5762 | |
c5231692 | 5763 | return img_format("DMFC1 %s, %s", rt, fs); |
89a955e8 AM |
5764 | } |
5765 | ||
5766 | ||
5767 | /* | |
5768 | * | |
5769 | * | |
5770 | * 3 2 1 | |
5771 | * 10987654321098765432109876543210 | |
5772 | * 001000 x1110000101 | |
5773 | * rt ----- | |
5774 | * rs ----- | |
5775 | * rd ----- | |
5776 | */ | |
7def8a4b | 5777 | static char *DMFC2(uint64 instruction, Dis_info *info) |
89a955e8 | 5778 | { |
89a955e8 | 5779 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
86b5f803 | 5780 | uint64 cs_value = extract_cs_20_19_18_17_16(instruction); |
89a955e8 | 5781 | |
3f2aec07 | 5782 | const char *rt = GPR(rt_value, info); |
89a955e8 | 5783 | |
043dc73c | 5784 | return img_format("DMFC2 %s, CP%" PRIu64, rt, cs_value); |
89a955e8 AM |
5785 | } |
5786 | ||
5787 | ||
5788 | /* | |
5789 | * | |
5790 | * | |
5791 | * 3 2 1 | |
5792 | * 10987654321098765432109876543210 | |
5793 | * 001000 x1110000101 | |
5794 | * rt ----- | |
5795 | * rs ----- | |
5796 | * rd ----- | |
5797 | */ | |
7def8a4b | 5798 | static char *DMFGC0(uint64 instruction, Dis_info *info) |
89a955e8 AM |
5799 | { |
5800 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
5801 | uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction); | |
5802 | uint64 sel_value = extract_sel_15_14_13_12_11(instruction); | |
5803 | ||
3f2aec07 | 5804 | const char *rt = GPR(rt_value, info); |
89a955e8 | 5805 | |
043dc73c ML |
5806 | return img_format("DMFGC0 %s, CP%" PRIu64 ", 0x%" PRIx64, |
5807 | rt, c0s_value, sel_value); | |
89a955e8 AM |
5808 | } |
5809 | ||
5810 | ||
5811 | /* | |
5812 | * | |
5813 | * | |
5814 | * 3 2 1 | |
5815 | * 10987654321098765432109876543210 | |
5816 | * 001000 x1110000101 | |
5817 | * rt ----- | |
5818 | * rs ----- | |
5819 | * rd ----- | |
5820 | */ | |
7def8a4b | 5821 | static char *DMOD(uint64 instruction, Dis_info *info) |
89a955e8 AM |
5822 | { |
5823 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 5824 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 5825 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 5826 | |
3f2aec07 ML |
5827 | const char *rd = GPR(rd_value, info); |
5828 | const char *rs = GPR(rs_value, info); | |
5829 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 5830 | |
c5231692 | 5831 | return img_format("DMOD %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
5832 | } |
5833 | ||
5834 | ||
5835 | /* | |
5836 | * | |
5837 | * | |
5838 | * 3 2 1 | |
5839 | * 10987654321098765432109876543210 | |
5840 | * 001000 x1110000101 | |
5841 | * rt ----- | |
5842 | * rs ----- | |
5843 | * rd ----- | |
5844 | */ | |
7def8a4b | 5845 | static char *DMODU(uint64 instruction, Dis_info *info) |
89a955e8 AM |
5846 | { |
5847 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 5848 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 5849 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 5850 | |
3f2aec07 ML |
5851 | const char *rd = GPR(rd_value, info); |
5852 | const char *rs = GPR(rs_value, info); | |
5853 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 5854 | |
c5231692 | 5855 | return img_format("DMODU %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
5856 | } |
5857 | ||
5858 | ||
5859 | /* | |
5860 | * | |
5861 | * | |
5862 | * 3 2 1 | |
5863 | * 10987654321098765432109876543210 | |
5864 | * 001000 x1110000101 | |
5865 | * rt ----- | |
5866 | * rs ----- | |
5867 | * rd ----- | |
5868 | */ | |
7def8a4b | 5869 | static char *DMTC0(uint64 instruction, Dis_info *info) |
89a955e8 AM |
5870 | { |
5871 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
5872 | uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction); | |
5873 | uint64 sel_value = extract_sel_15_14_13_12_11(instruction); | |
5874 | ||
3f2aec07 | 5875 | const char *rt = GPR(rt_value, info); |
89a955e8 | 5876 | |
043dc73c ML |
5877 | return img_format("DMTC0 %s, CP%" PRIu64 ", 0x%" PRIx64, |
5878 | rt, c0s_value, sel_value); | |
89a955e8 AM |
5879 | } |
5880 | ||
5881 | ||
5882 | /* | |
5883 | * | |
5884 | * | |
5885 | * 3 2 1 | |
5886 | * 10987654321098765432109876543210 | |
5887 | * 001000 x1110000101 | |
5888 | * rt ----- | |
5889 | * rs ----- | |
5890 | * rd ----- | |
5891 | */ | |
7def8a4b | 5892 | static char *DMTC1(uint64 instruction, Dis_info *info) |
89a955e8 AM |
5893 | { |
5894 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
52a96d22 | 5895 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 5896 | |
3f2aec07 ML |
5897 | const char *rt = GPR(rt_value, info); |
5898 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 5899 | |
c5231692 | 5900 | return img_format("DMTC1 %s, %s", rt, fs); |
89a955e8 AM |
5901 | } |
5902 | ||
5903 | ||
5904 | /* | |
5905 | * | |
5906 | * | |
5907 | * 3 2 1 | |
5908 | * 10987654321098765432109876543210 | |
5909 | * 001000 x1110000101 | |
5910 | * rt ----- | |
5911 | * rs ----- | |
5912 | * rd ----- | |
5913 | */ | |
7def8a4b | 5914 | static char *DMTC2(uint64 instruction, Dis_info *info) |
89a955e8 | 5915 | { |
89a955e8 | 5916 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
86b5f803 | 5917 | uint64 cs_value = extract_cs_20_19_18_17_16(instruction); |
89a955e8 | 5918 | |
3f2aec07 | 5919 | const char *rt = GPR(rt_value, info); |
89a955e8 | 5920 | |
043dc73c | 5921 | return img_format("DMTC2 %s, CP%" PRIu64, rt, cs_value); |
89a955e8 AM |
5922 | } |
5923 | ||
5924 | ||
5925 | /* | |
5926 | * | |
5927 | * | |
5928 | * 3 2 1 | |
5929 | * 10987654321098765432109876543210 | |
5930 | * 001000 x1110000101 | |
5931 | * rt ----- | |
5932 | * rs ----- | |
5933 | * rd ----- | |
5934 | */ | |
7def8a4b | 5935 | static char *DMTGC0(uint64 instruction, Dis_info *info) |
89a955e8 AM |
5936 | { |
5937 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
5938 | uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction); | |
5939 | uint64 sel_value = extract_sel_15_14_13_12_11(instruction); | |
5940 | ||
3f2aec07 | 5941 | const char *rt = GPR(rt_value, info); |
89a955e8 | 5942 | |
043dc73c ML |
5943 | return img_format("DMTGC0 %s, CP%" PRIu64 ", 0x%" PRIx64, |
5944 | rt, c0s_value, sel_value); | |
89a955e8 AM |
5945 | } |
5946 | ||
5947 | ||
5948 | /* | |
5949 | * | |
5950 | * | |
5951 | * 3 2 1 | |
5952 | * 10987654321098765432109876543210 | |
5953 | * 001000 x1110000101 | |
5954 | * rt ----- | |
5955 | * rs ----- | |
5956 | * rd ----- | |
5957 | */ | |
7def8a4b | 5958 | static char *DMT(uint64 instruction, Dis_info *info) |
89a955e8 AM |
5959 | { |
5960 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
5961 | ||
3f2aec07 | 5962 | const char *rt = GPR(rt_value, info); |
89a955e8 | 5963 | |
c5231692 | 5964 | return img_format("DMT %s", rt); |
89a955e8 AM |
5965 | } |
5966 | ||
5967 | ||
5968 | /* | |
5969 | * | |
5970 | * | |
5971 | * 3 2 1 | |
5972 | * 10987654321098765432109876543210 | |
5973 | * 001000 x1110000101 | |
5974 | * rt ----- | |
5975 | * rs ----- | |
5976 | * rd ----- | |
5977 | */ | |
7def8a4b | 5978 | static char *DMUH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
5979 | { |
5980 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 5981 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 5982 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 5983 | |
3f2aec07 ML |
5984 | const char *rd = GPR(rd_value, info); |
5985 | const char *rs = GPR(rs_value, info); | |
5986 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 5987 | |
c5231692 | 5988 | return img_format("DMUH %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
5989 | } |
5990 | ||
5991 | ||
5992 | /* | |
5993 | * | |
5994 | * | |
5995 | * 3 2 1 | |
5996 | * 10987654321098765432109876543210 | |
5997 | * 001000 x1110000101 | |
5998 | * rt ----- | |
5999 | * rs ----- | |
6000 | * rd ----- | |
6001 | */ | |
7def8a4b | 6002 | static char *DMUHU(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6003 | { |
6004 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 6005 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 6006 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 6007 | |
3f2aec07 ML |
6008 | const char *rd = GPR(rd_value, info); |
6009 | const char *rs = GPR(rs_value, info); | |
6010 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 6011 | |
c5231692 | 6012 | return img_format("DMUHU %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
6013 | } |
6014 | ||
6015 | ||
6016 | /* | |
6017 | * | |
6018 | * | |
6019 | * 3 2 1 | |
6020 | * 10987654321098765432109876543210 | |
6021 | * 001000 x1110000101 | |
6022 | * rt ----- | |
6023 | * rs ----- | |
6024 | * rd ----- | |
6025 | */ | |
7def8a4b | 6026 | static char *DMUL(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6027 | { |
6028 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 6029 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 6030 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 6031 | |
3f2aec07 ML |
6032 | const char *rd = GPR(rd_value, info); |
6033 | const char *rs = GPR(rs_value, info); | |
6034 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 6035 | |
c5231692 | 6036 | return img_format("DMUL %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
6037 | } |
6038 | ||
6039 | ||
6040 | /* | |
6041 | * | |
6042 | * | |
6043 | * 3 2 1 | |
6044 | * 10987654321098765432109876543210 | |
6045 | * 001000 x1110000101 | |
6046 | * rt ----- | |
6047 | * rs ----- | |
6048 | * rd ----- | |
6049 | */ | |
7def8a4b | 6050 | static char *DMULU(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6051 | { |
6052 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 6053 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 6054 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 6055 | |
3f2aec07 ML |
6056 | const char *rd = GPR(rd_value, info); |
6057 | const char *rs = GPR(rs_value, info); | |
6058 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 6059 | |
c5231692 | 6060 | return img_format("DMULU %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
6061 | } |
6062 | ||
6063 | ||
6064 | /* | |
5c65eed6 AM |
6065 | * [DSP] DPA.W.PH ac, rs, rt - Dot product with accumulate on |
6066 | * vector integer halfword elements | |
89a955e8 AM |
6067 | * |
6068 | * 3 2 1 | |
6069 | * 10987654321098765432109876543210 | |
5c65eed6 | 6070 | * 001000 00000010111111 |
89a955e8 AM |
6071 | * rt ----- |
6072 | * rs ----- | |
5c65eed6 | 6073 | * ac -- |
89a955e8 | 6074 | */ |
7def8a4b | 6075 | static char *DPA_W_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6076 | { |
6077 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 6078 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
0f74e61d | 6079 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 6080 | |
3f2aec07 ML |
6081 | const char *ac = AC(ac_value, info); |
6082 | const char *rs = GPR(rs_value, info); | |
6083 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 6084 | |
c5231692 | 6085 | return img_format("DPA.W.PH %s, %s, %s", ac, rs, rt); |
89a955e8 AM |
6086 | } |
6087 | ||
6088 | ||
6089 | /* | |
6090 | * | |
6091 | * | |
6092 | * 3 2 1 | |
6093 | * 10987654321098765432109876543210 | |
6094 | * 001000 x1110000101 | |
6095 | * rt ----- | |
6096 | * rs ----- | |
6097 | * rd ----- | |
6098 | */ | |
7def8a4b | 6099 | static char *DPAQ_SA_L_W(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6100 | { |
6101 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 6102 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
0f74e61d | 6103 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 6104 | |
3f2aec07 ML |
6105 | const char *ac = AC(ac_value, info); |
6106 | const char *rs = GPR(rs_value, info); | |
6107 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 6108 | |
c5231692 | 6109 | return img_format("DPAQ_SA.L.W %s, %s, %s", ac, rs, rt); |
89a955e8 AM |
6110 | } |
6111 | ||
6112 | ||
6113 | /* | |
6114 | * | |
6115 | * | |
6116 | * 3 2 1 | |
6117 | * 10987654321098765432109876543210 | |
6118 | * 001000 x1110000101 | |
6119 | * rt ----- | |
6120 | * rs ----- | |
6121 | * rd ----- | |
6122 | */ | |
7def8a4b | 6123 | static char *DPAQ_S_W_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6124 | { |
6125 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 6126 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
0f74e61d | 6127 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 6128 | |
3f2aec07 ML |
6129 | const char *ac = AC(ac_value, info); |
6130 | const char *rs = GPR(rs_value, info); | |
6131 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 6132 | |
c5231692 | 6133 | return img_format("DPAQ_S.W.PH %s, %s, %s", ac, rs, rt); |
89a955e8 AM |
6134 | } |
6135 | ||
6136 | ||
6137 | /* | |
6138 | * | |
6139 | * | |
6140 | * 3 2 1 | |
6141 | * 10987654321098765432109876543210 | |
6142 | * 001000 x1110000101 | |
6143 | * rt ----- | |
6144 | * rs ----- | |
6145 | * rd ----- | |
6146 | */ | |
7def8a4b | 6147 | static char *DPAQX_SA_W_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6148 | { |
6149 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 6150 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
0f74e61d | 6151 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 6152 | |
3f2aec07 ML |
6153 | const char *ac = AC(ac_value, info); |
6154 | const char *rs = GPR(rs_value, info); | |
6155 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 6156 | |
c5231692 | 6157 | return img_format("DPAQX_SA.W.PH %s, %s, %s", ac, rs, rt); |
89a955e8 AM |
6158 | } |
6159 | ||
6160 | ||
6161 | /* | |
6162 | * | |
6163 | * | |
6164 | * 3 2 1 | |
6165 | * 10987654321098765432109876543210 | |
6166 | * 001000 x1110000101 | |
6167 | * rt ----- | |
6168 | * rs ----- | |
6169 | * rd ----- | |
6170 | */ | |
7def8a4b | 6171 | static char *DPAQX_S_W_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6172 | { |
6173 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 6174 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
0f74e61d | 6175 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 6176 | |
3f2aec07 ML |
6177 | const char *ac = AC(ac_value, info); |
6178 | const char *rs = GPR(rs_value, info); | |
6179 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 6180 | |
c5231692 | 6181 | return img_format("DPAQX_S.W.PH %s, %s, %s", ac, rs, rt); |
89a955e8 AM |
6182 | } |
6183 | ||
6184 | ||
6185 | /* | |
6186 | * | |
6187 | * | |
6188 | * 3 2 1 | |
6189 | * 10987654321098765432109876543210 | |
6190 | * 001000 x1110000101 | |
6191 | * rt ----- | |
6192 | * rs ----- | |
6193 | * rd ----- | |
6194 | */ | |
7def8a4b | 6195 | static char *DPAU_H_QBL(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6196 | { |
6197 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 6198 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
0f74e61d | 6199 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 6200 | |
3f2aec07 ML |
6201 | const char *ac = AC(ac_value, info); |
6202 | const char *rs = GPR(rs_value, info); | |
6203 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 6204 | |
c5231692 | 6205 | return img_format("DPAU.H.QBL %s, %s, %s", ac, rs, rt); |
89a955e8 AM |
6206 | } |
6207 | ||
6208 | ||
6209 | /* | |
6210 | * | |
6211 | * | |
6212 | * 3 2 1 | |
6213 | * 10987654321098765432109876543210 | |
6214 | * 001000 x1110000101 | |
6215 | * rt ----- | |
6216 | * rs ----- | |
6217 | * rd ----- | |
6218 | */ | |
7def8a4b | 6219 | static char *DPAU_H_QBR(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6220 | { |
6221 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 6222 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
0f74e61d | 6223 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 6224 | |
3f2aec07 ML |
6225 | const char *ac = AC(ac_value, info); |
6226 | const char *rs = GPR(rs_value, info); | |
6227 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 6228 | |
c5231692 | 6229 | return img_format("DPAU.H.QBR %s, %s, %s", ac, rs, rt); |
89a955e8 AM |
6230 | } |
6231 | ||
6232 | ||
6233 | /* | |
6234 | * | |
6235 | * | |
6236 | * 3 2 1 | |
6237 | * 10987654321098765432109876543210 | |
6238 | * 001000 x1110000101 | |
6239 | * rt ----- | |
6240 | * rs ----- | |
6241 | * rd ----- | |
6242 | */ | |
7def8a4b | 6243 | static char *DPAX_W_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6244 | { |
6245 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 6246 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
0f74e61d | 6247 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 6248 | |
3f2aec07 ML |
6249 | const char *ac = AC(ac_value, info); |
6250 | const char *rs = GPR(rs_value, info); | |
6251 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 6252 | |
c5231692 | 6253 | return img_format("DPAX.W.PH %s, %s, %s", ac, rs, rt); |
89a955e8 AM |
6254 | } |
6255 | ||
6256 | ||
6257 | /* | |
6258 | * | |
6259 | * | |
6260 | * 3 2 1 | |
6261 | * 10987654321098765432109876543210 | |
6262 | * 001000 x1110000101 | |
6263 | * rt ----- | |
6264 | * rs ----- | |
6265 | * rd ----- | |
6266 | */ | |
7def8a4b | 6267 | static char *DPS_W_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6268 | { |
6269 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 6270 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
0f74e61d | 6271 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 6272 | |
3f2aec07 ML |
6273 | const char *ac = AC(ac_value, info); |
6274 | const char *rs = GPR(rs_value, info); | |
6275 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 6276 | |
c5231692 | 6277 | return img_format("DPS.W.PH %s, %s, %s", ac, rs, rt); |
89a955e8 AM |
6278 | } |
6279 | ||
6280 | ||
6281 | /* | |
6282 | * | |
6283 | * | |
6284 | * 3 2 1 | |
6285 | * 10987654321098765432109876543210 | |
6286 | * 001000 x1110000101 | |
6287 | * rt ----- | |
6288 | * rs ----- | |
6289 | * rd ----- | |
6290 | */ | |
7def8a4b | 6291 | static char *DPSQ_SA_L_W(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6292 | { |
6293 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 6294 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
0f74e61d | 6295 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 6296 | |
3f2aec07 ML |
6297 | const char *ac = AC(ac_value, info); |
6298 | const char *rs = GPR(rs_value, info); | |
6299 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 6300 | |
c5231692 | 6301 | return img_format("DPSQ_SA.L.W %s, %s, %s", ac, rs, rt); |
89a955e8 AM |
6302 | } |
6303 | ||
6304 | ||
6305 | /* | |
6306 | * | |
6307 | * | |
6308 | * 3 2 1 | |
6309 | * 10987654321098765432109876543210 | |
6310 | * 001000 x1110000101 | |
6311 | * rt ----- | |
6312 | * rs ----- | |
6313 | * rd ----- | |
6314 | */ | |
7def8a4b | 6315 | static char *DPSQ_S_W_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6316 | { |
6317 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 6318 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
0f74e61d | 6319 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 6320 | |
3f2aec07 ML |
6321 | const char *ac = AC(ac_value, info); |
6322 | const char *rs = GPR(rs_value, info); | |
6323 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 6324 | |
c5231692 | 6325 | return img_format("DPSQ_S.W.PH %s, %s, %s", ac, rs, rt); |
89a955e8 AM |
6326 | } |
6327 | ||
6328 | ||
6329 | /* | |
6330 | * | |
6331 | * | |
6332 | * 3 2 1 | |
6333 | * 10987654321098765432109876543210 | |
6334 | * 001000 x1110000101 | |
6335 | * rt ----- | |
6336 | * rs ----- | |
6337 | * rd ----- | |
6338 | */ | |
7def8a4b | 6339 | static char *DPSQX_SA_W_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6340 | { |
6341 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 6342 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
0f74e61d | 6343 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 6344 | |
3f2aec07 ML |
6345 | const char *ac = AC(ac_value, info); |
6346 | const char *rs = GPR(rs_value, info); | |
6347 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 6348 | |
c5231692 | 6349 | return img_format("DPSQX_SA.W.PH %s, %s, %s", ac, rs, rt); |
89a955e8 AM |
6350 | } |
6351 | ||
6352 | ||
6353 | /* | |
6354 | * | |
6355 | * | |
6356 | * 3 2 1 | |
6357 | * 10987654321098765432109876543210 | |
6358 | * 001000 x1110000101 | |
6359 | * rt ----- | |
6360 | * rs ----- | |
6361 | * rd ----- | |
6362 | */ | |
7def8a4b | 6363 | static char *DPSQX_S_W_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6364 | { |
6365 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 6366 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
0f74e61d | 6367 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 6368 | |
3f2aec07 ML |
6369 | const char *ac = AC(ac_value, info); |
6370 | const char *rs = GPR(rs_value, info); | |
6371 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 6372 | |
c5231692 | 6373 | return img_format("DPSQX_S.W.PH %s, %s, %s", ac, rs, rt); |
89a955e8 AM |
6374 | } |
6375 | ||
6376 | ||
6377 | /* | |
6378 | * | |
6379 | * | |
6380 | * 3 2 1 | |
6381 | * 10987654321098765432109876543210 | |
6382 | * 001000 x1110000101 | |
6383 | * rt ----- | |
6384 | * rs ----- | |
6385 | * rd ----- | |
6386 | */ | |
7def8a4b | 6387 | static char *DPSU_H_QBL(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6388 | { |
6389 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 6390 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
0f74e61d | 6391 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 6392 | |
3f2aec07 ML |
6393 | const char *ac = AC(ac_value, info); |
6394 | const char *rs = GPR(rs_value, info); | |
6395 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 6396 | |
c5231692 | 6397 | return img_format("DPSU.H.QBL %s, %s, %s", ac, rs, rt); |
89a955e8 AM |
6398 | } |
6399 | ||
6400 | ||
6401 | /* | |
6402 | * | |
6403 | * | |
6404 | * 3 2 1 | |
6405 | * 10987654321098765432109876543210 | |
6406 | * 001000 x1110000101 | |
6407 | * rt ----- | |
6408 | * rs ----- | |
6409 | * rd ----- | |
6410 | */ | |
7def8a4b | 6411 | static char *DPSU_H_QBR(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6412 | { |
6413 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 6414 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
0f74e61d | 6415 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 6416 | |
3f2aec07 ML |
6417 | const char *ac = AC(ac_value, info); |
6418 | const char *rs = GPR(rs_value, info); | |
6419 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 6420 | |
c5231692 | 6421 | return img_format("DPSU.H.QBR %s, %s, %s", ac, rs, rt); |
89a955e8 AM |
6422 | } |
6423 | ||
6424 | ||
6425 | /* | |
6426 | * | |
6427 | * | |
6428 | * 3 2 1 | |
6429 | * 10987654321098765432109876543210 | |
6430 | * 001000 x1110000101 | |
6431 | * rt ----- | |
6432 | * rs ----- | |
6433 | * rd ----- | |
6434 | */ | |
7def8a4b | 6435 | static char *DPSX_W_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6436 | { |
6437 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 6438 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
0f74e61d | 6439 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 6440 | |
3f2aec07 ML |
6441 | const char *ac = AC(ac_value, info); |
6442 | const char *rs = GPR(rs_value, info); | |
6443 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 6444 | |
c5231692 | 6445 | return img_format("DPSX.W.PH %s, %s, %s", ac, rs, rt); |
89a955e8 AM |
6446 | } |
6447 | ||
6448 | ||
6449 | /* | |
6450 | * DROTR - | |
6451 | * | |
6452 | * 3 2 1 | |
6453 | * 10987654321098765432109876543210 | |
6454 | * 001000 x1110000101 | |
6455 | * rt ----- | |
6456 | * rs ----- | |
6457 | * rd ----- | |
6458 | */ | |
7def8a4b | 6459 | static char *DROTR(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6460 | { |
6461 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 6462 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 6463 | uint64 shift_value = extract_shift_4_3_2_1_0(instruction); |
89a955e8 | 6464 | |
3f2aec07 ML |
6465 | const char *rt = GPR(rt_value, info); |
6466 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 6467 | |
4066c152 | 6468 | return img_format("DROTR %s, %s, 0x%" PRIx64, rt, rs, shift_value); |
89a955e8 AM |
6469 | } |
6470 | ||
6471 | ||
6472 | /* | |
6473 | * DROTR[32] - | |
6474 | * | |
6475 | * 3 2 1 | |
6476 | * 10987654321098765432109876543210 | |
6477 | * 10o000 1100xxx0110 | |
6478 | * rt ----- | |
6479 | * rs ----- | |
6480 | * shift ----- | |
6481 | */ | |
7def8a4b | 6482 | static char *DROTR32(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6483 | { |
6484 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 6485 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 6486 | uint64 shift_value = extract_shift_4_3_2_1_0(instruction); |
89a955e8 | 6487 | |
3f2aec07 ML |
6488 | const char *rt = GPR(rt_value, info); |
6489 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 6490 | |
4066c152 | 6491 | return img_format("DROTR32 %s, %s, 0x%" PRIx64, rt, rs, shift_value); |
89a955e8 AM |
6492 | } |
6493 | ||
6494 | ||
6495 | /* | |
6496 | * | |
6497 | * | |
6498 | * 3 2 1 | |
6499 | * 10987654321098765432109876543210 | |
6500 | * 001000 x1110000101 | |
6501 | * rt ----- | |
6502 | * rs ----- | |
6503 | * rd ----- | |
6504 | */ | |
7def8a4b | 6505 | static char *DROTRV(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6506 | { |
6507 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 6508 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 6509 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 6510 | |
3f2aec07 ML |
6511 | const char *rd = GPR(rd_value, info); |
6512 | const char *rs = GPR(rs_value, info); | |
6513 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 6514 | |
c5231692 | 6515 | return img_format("DROTRV %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
6516 | } |
6517 | ||
6518 | ||
6519 | /* | |
6520 | * | |
6521 | * | |
6522 | * 3 2 1 | |
6523 | * 10987654321098765432109876543210 | |
6524 | * 001000 x1110000101 | |
6525 | * rt ----- | |
6526 | * rs ----- | |
6527 | * rd ----- | |
6528 | */ | |
7def8a4b | 6529 | static char *DROTX(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6530 | { |
6531 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 6532 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 AM |
6533 | uint64 shiftx_value = extract_shiftx_11_10_9_8_7_6(instruction); |
6534 | uint64 shift_value = extract_shift_5_4_3_2_1_0(instruction); | |
89a955e8 | 6535 | |
3f2aec07 ML |
6536 | const char *rt = GPR(rt_value, info); |
6537 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 6538 | |
4066c152 ML |
6539 | return img_format("DROTX %s, %s, 0x%" PRIx64 ", 0x%" PRIx64, |
6540 | rt, rs, shift_value, shiftx_value); | |
89a955e8 AM |
6541 | } |
6542 | ||
6543 | ||
6544 | /* | |
6545 | * DSLL - | |
6546 | * | |
6547 | * 3 2 1 | |
6548 | * 10987654321098765432109876543210 | |
6549 | * 10o000 1100xxx0000 | |
6550 | * rt ----- | |
6551 | * rs ----- | |
6552 | * shift ----- | |
6553 | */ | |
7def8a4b | 6554 | static char *DSLL(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6555 | { |
6556 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 6557 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 6558 | uint64 shift_value = extract_shift_4_3_2_1_0(instruction); |
89a955e8 | 6559 | |
3f2aec07 ML |
6560 | const char *rt = GPR(rt_value, info); |
6561 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 6562 | |
4066c152 | 6563 | return img_format("DSLL %s, %s, 0x%" PRIx64, rt, rs, shift_value); |
89a955e8 AM |
6564 | } |
6565 | ||
6566 | ||
6567 | /* | |
6568 | * DSLL[32] - | |
6569 | * | |
6570 | * 3 2 1 | |
6571 | * 10987654321098765432109876543210 | |
6572 | * 10o000 1100xxx0000 | |
6573 | * rt ----- | |
6574 | * rs ----- | |
6575 | * shift ----- | |
6576 | */ | |
7def8a4b | 6577 | static char *DSLL32(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6578 | { |
6579 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 6580 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 6581 | uint64 shift_value = extract_shift_4_3_2_1_0(instruction); |
89a955e8 | 6582 | |
3f2aec07 ML |
6583 | const char *rt = GPR(rt_value, info); |
6584 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 6585 | |
4066c152 | 6586 | return img_format("DSLL32 %s, %s, 0x%" PRIx64, rt, rs, shift_value); |
89a955e8 AM |
6587 | } |
6588 | ||
6589 | ||
6590 | /* | |
6591 | * | |
6592 | * | |
6593 | * 3 2 1 | |
6594 | * 10987654321098765432109876543210 | |
6595 | * 001000 x1110000101 | |
6596 | * rt ----- | |
6597 | * rs ----- | |
6598 | * rd ----- | |
6599 | */ | |
7def8a4b | 6600 | static char *DSLLV(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6601 | { |
6602 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 6603 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 6604 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 6605 | |
3f2aec07 ML |
6606 | const char *rd = GPR(rd_value, info); |
6607 | const char *rs = GPR(rs_value, info); | |
6608 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 6609 | |
c5231692 | 6610 | return img_format("DSLLV %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
6611 | } |
6612 | ||
6613 | ||
6614 | /* | |
6615 | * DSRA - | |
6616 | * | |
6617 | * 3 2 1 | |
6618 | * 10987654321098765432109876543210 | |
6619 | * 10o000 1100xxx0100 | |
6620 | * rt ----- | |
6621 | * rs ----- | |
6622 | * shift ----- | |
6623 | */ | |
7def8a4b | 6624 | static char *DSRA(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6625 | { |
6626 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 6627 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 6628 | uint64 shift_value = extract_shift_4_3_2_1_0(instruction); |
89a955e8 | 6629 | |
3f2aec07 ML |
6630 | const char *rt = GPR(rt_value, info); |
6631 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 6632 | |
4066c152 | 6633 | return img_format("DSRA %s, %s, 0x%" PRIx64, rt, rs, shift_value); |
89a955e8 AM |
6634 | } |
6635 | ||
6636 | ||
6637 | /* | |
6638 | * DSRA[32] - | |
6639 | * | |
6640 | * 3 2 1 | |
6641 | * 10987654321098765432109876543210 | |
6642 | * 10o000 1100xxx0100 | |
6643 | * rt ----- | |
6644 | * rs ----- | |
6645 | * shift ----- | |
6646 | */ | |
7def8a4b | 6647 | static char *DSRA32(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6648 | { |
6649 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 6650 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 6651 | uint64 shift_value = extract_shift_4_3_2_1_0(instruction); |
89a955e8 | 6652 | |
3f2aec07 ML |
6653 | const char *rt = GPR(rt_value, info); |
6654 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 6655 | |
4066c152 | 6656 | return img_format("DSRA32 %s, %s, 0x%" PRIx64, rt, rs, shift_value); |
89a955e8 AM |
6657 | } |
6658 | ||
6659 | ||
6660 | /* | |
6661 | * | |
6662 | * | |
6663 | * 3 2 1 | |
6664 | * 10987654321098765432109876543210 | |
6665 | * 001000 x1110000101 | |
6666 | * rt ----- | |
6667 | * rs ----- | |
6668 | * rd ----- | |
6669 | */ | |
7def8a4b | 6670 | static char *DSRAV(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6671 | { |
6672 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 6673 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 6674 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 6675 | |
3f2aec07 ML |
6676 | const char *rd = GPR(rd_value, info); |
6677 | const char *rs = GPR(rs_value, info); | |
6678 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 6679 | |
c5231692 | 6680 | return img_format("DSRAV %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
6681 | } |
6682 | ||
6683 | ||
6684 | /* | |
6685 | * DSRL - | |
6686 | * | |
6687 | * 3 2 1 | |
6688 | * 10987654321098765432109876543210 | |
6689 | * 10o000 1100xxx0100 | |
6690 | * rt ----- | |
6691 | * rs ----- | |
6692 | * shift ----- | |
6693 | */ | |
7def8a4b | 6694 | static char *DSRL(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6695 | { |
6696 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 6697 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 6698 | uint64 shift_value = extract_shift_4_3_2_1_0(instruction); |
89a955e8 | 6699 | |
3f2aec07 ML |
6700 | const char *rt = GPR(rt_value, info); |
6701 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 6702 | |
4066c152 | 6703 | return img_format("DSRL %s, %s, 0x%" PRIx64, rt, rs, shift_value); |
89a955e8 AM |
6704 | } |
6705 | ||
6706 | ||
6707 | /* | |
6708 | * DSRL[32] - | |
6709 | * | |
6710 | * 3 2 1 | |
6711 | * 10987654321098765432109876543210 | |
6712 | * 10o000 1100xxx0010 | |
6713 | * rt ----- | |
6714 | * rs ----- | |
6715 | * shift ----- | |
6716 | */ | |
7def8a4b | 6717 | static char *DSRL32(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6718 | { |
6719 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 6720 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 6721 | uint64 shift_value = extract_shift_4_3_2_1_0(instruction); |
89a955e8 | 6722 | |
3f2aec07 ML |
6723 | const char *rt = GPR(rt_value, info); |
6724 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 6725 | |
4066c152 | 6726 | return img_format("DSRL32 %s, %s, 0x%" PRIx64, rt, rs, shift_value); |
89a955e8 AM |
6727 | } |
6728 | ||
6729 | ||
6730 | /* | |
6731 | * | |
6732 | * | |
6733 | * 3 2 1 | |
6734 | * 10987654321098765432109876543210 | |
6735 | * 001000 x1110000101 | |
6736 | * rt ----- | |
6737 | * rs ----- | |
6738 | * rd ----- | |
6739 | */ | |
7def8a4b | 6740 | static char *DSRLV(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6741 | { |
6742 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 6743 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 6744 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 6745 | |
3f2aec07 ML |
6746 | const char *rd = GPR(rd_value, info); |
6747 | const char *rs = GPR(rs_value, info); | |
6748 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 6749 | |
c5231692 | 6750 | return img_format("DSRLV %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
6751 | } |
6752 | ||
6753 | ||
6754 | /* | |
6755 | * | |
6756 | * | |
6757 | * 3 2 1 | |
6758 | * 10987654321098765432109876543210 | |
6759 | * 001000 x1110000101 | |
6760 | * rt ----- | |
6761 | * rs ----- | |
6762 | * rd ----- | |
6763 | */ | |
7def8a4b | 6764 | static char *DSUB(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6765 | { |
6766 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 6767 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 6768 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 6769 | |
3f2aec07 ML |
6770 | const char *rd = GPR(rd_value, info); |
6771 | const char *rs = GPR(rs_value, info); | |
6772 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 6773 | |
c5231692 | 6774 | return img_format("DSUB %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
6775 | } |
6776 | ||
6777 | ||
6778 | /* | |
6779 | * | |
6780 | * | |
6781 | * 3 2 1 | |
6782 | * 10987654321098765432109876543210 | |
6783 | * 001000 x1110000101 | |
6784 | * rt ----- | |
6785 | * rs ----- | |
6786 | * rd ----- | |
6787 | */ | |
7def8a4b | 6788 | static char *DSUBU(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6789 | { |
6790 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 6791 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 6792 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 6793 | |
3f2aec07 ML |
6794 | const char *rd = GPR(rd_value, info); |
6795 | const char *rs = GPR(rs_value, info); | |
6796 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 6797 | |
c5231692 | 6798 | return img_format("DSUBU %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
6799 | } |
6800 | ||
6801 | ||
6802 | /* | |
6803 | * | |
6804 | * | |
6805 | * 3 2 1 | |
6806 | * 10987654321098765432109876543210 | |
6807 | * 001000 x1110000101 | |
6808 | * rt ----- | |
6809 | * rs ----- | |
6810 | * rd ----- | |
6811 | */ | |
7def8a4b | 6812 | static char *DVPE(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6813 | { |
6814 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
6815 | ||
3f2aec07 | 6816 | const char *rt = GPR(rt_value, info); |
89a955e8 | 6817 | |
c5231692 | 6818 | return img_format("DVPE %s", rt); |
89a955e8 AM |
6819 | } |
6820 | ||
6821 | ||
6822 | /* | |
6823 | * | |
6824 | * | |
6825 | * 3 2 1 | |
6826 | * 10987654321098765432109876543210 | |
6827 | * 001000 x1110000101 | |
6828 | * rt ----- | |
6829 | * rs ----- | |
6830 | * rd ----- | |
6831 | */ | |
7def8a4b | 6832 | static char *DVP(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6833 | { |
6834 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
6835 | ||
3f2aec07 | 6836 | const char *rt = GPR(rt_value, info); |
89a955e8 | 6837 | |
c5231692 | 6838 | return img_format("DVP %s", rt); |
89a955e8 AM |
6839 | } |
6840 | ||
6841 | ||
6842 | /* | |
6843 | * | |
6844 | * | |
6845 | * 3 2 1 | |
6846 | * 10987654321098765432109876543210 | |
6847 | * 001000 x1110000101 | |
6848 | * rt ----- | |
6849 | * rs ----- | |
6850 | * rd ----- | |
6851 | */ | |
7def8a4b | 6852 | static char *EHB(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6853 | { |
6854 | (void)instruction; | |
6855 | ||
7def8a4b | 6856 | return g_strdup("EHB "); |
89a955e8 AM |
6857 | } |
6858 | ||
6859 | ||
6860 | /* | |
6861 | * | |
6862 | * | |
6863 | * 3 2 1 | |
6864 | * 10987654321098765432109876543210 | |
6865 | * 001000 x1110000101 | |
6866 | * rt ----- | |
6867 | * rs ----- | |
6868 | * rd ----- | |
6869 | */ | |
7def8a4b | 6870 | static char *EI(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6871 | { |
6872 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
6873 | ||
3f2aec07 | 6874 | const char *rt = GPR(rt_value, info); |
89a955e8 | 6875 | |
c5231692 | 6876 | return img_format("EI %s", rt); |
89a955e8 AM |
6877 | } |
6878 | ||
6879 | ||
6880 | /* | |
6881 | * | |
6882 | * | |
6883 | * 3 2 1 | |
6884 | * 10987654321098765432109876543210 | |
6885 | * 001000 x1110000101 | |
6886 | * rt ----- | |
6887 | * rs ----- | |
6888 | * rd ----- | |
6889 | */ | |
7def8a4b | 6890 | static char *EMT(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6891 | { |
6892 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
6893 | ||
3f2aec07 | 6894 | const char *rt = GPR(rt_value, info); |
89a955e8 | 6895 | |
c5231692 | 6896 | return img_format("EMT %s", rt); |
89a955e8 AM |
6897 | } |
6898 | ||
6899 | ||
6900 | /* | |
6901 | * | |
6902 | * | |
6903 | * 3 2 1 | |
6904 | * 10987654321098765432109876543210 | |
6905 | * 001000 x1110000101 | |
6906 | * rt ----- | |
6907 | * rs ----- | |
6908 | * rd ----- | |
6909 | */ | |
7def8a4b | 6910 | static char *ERET(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6911 | { |
6912 | (void)instruction; | |
6913 | ||
7def8a4b | 6914 | return g_strdup("ERET "); |
89a955e8 AM |
6915 | } |
6916 | ||
6917 | ||
6918 | /* | |
6919 | * | |
6920 | * | |
6921 | * 3 2 1 | |
6922 | * 10987654321098765432109876543210 | |
6923 | * 001000 x1110000101 | |
6924 | * rt ----- | |
6925 | * rs ----- | |
6926 | * rd ----- | |
6927 | */ | |
7def8a4b | 6928 | static char *ERETNC(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6929 | { |
6930 | (void)instruction; | |
6931 | ||
7def8a4b | 6932 | return g_strdup("ERETNC "); |
89a955e8 AM |
6933 | } |
6934 | ||
6935 | ||
6936 | /* | |
6937 | * | |
6938 | * | |
6939 | * 3 2 1 | |
6940 | * 10987654321098765432109876543210 | |
6941 | * 001000 x1110000101 | |
6942 | * rt ----- | |
6943 | * rs ----- | |
6944 | * rd ----- | |
6945 | */ | |
7def8a4b | 6946 | static char *EVP(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6947 | { |
6948 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
6949 | ||
3f2aec07 | 6950 | const char *rt = GPR(rt_value, info); |
89a955e8 | 6951 | |
c5231692 | 6952 | return img_format("EVP %s", rt); |
89a955e8 AM |
6953 | } |
6954 | ||
6955 | ||
6956 | /* | |
6957 | * | |
6958 | * | |
6959 | * 3 2 1 | |
6960 | * 10987654321098765432109876543210 | |
6961 | * 001000 x1110000101 | |
6962 | * rt ----- | |
6963 | * rs ----- | |
6964 | * rd ----- | |
6965 | */ | |
7def8a4b | 6966 | static char *EVPE(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6967 | { |
6968 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
6969 | ||
3f2aec07 | 6970 | const char *rt = GPR(rt_value, info); |
89a955e8 | 6971 | |
c5231692 | 6972 | return img_format("EVPE %s", rt); |
89a955e8 AM |
6973 | } |
6974 | ||
6975 | ||
6976 | /* | |
6977 | * | |
6978 | * | |
6979 | * 3 2 1 | |
6980 | * 10987654321098765432109876543210 | |
6981 | * 001000 x1110000101 | |
6982 | * rt ----- | |
6983 | * rs ----- | |
6984 | * rd ----- | |
6985 | */ | |
7def8a4b | 6986 | static char *EXT(uint64 instruction, Dis_info *info) |
89a955e8 AM |
6987 | { |
6988 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
75199b40 | 6989 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
89a955e8 AM |
6990 | uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction); |
6991 | uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction); | |
89a955e8 | 6992 | |
3f2aec07 ML |
6993 | const char *rt = GPR(rt_value, info); |
6994 | const char *rs = GPR(rs_value, info); | |
4066c152 | 6995 | uint64 msbd = encode_msbd_from_size(msbd_value); |
89a955e8 | 6996 | |
4066c152 ML |
6997 | return img_format("EXT %s, %s, 0x%" PRIx64 ", 0x%" PRIx64, |
6998 | rt, rs, lsb_value, msbd); | |
89a955e8 AM |
6999 | } |
7000 | ||
7001 | ||
7002 | /* | |
7003 | * | |
7004 | * | |
7005 | * 3 2 1 | |
7006 | * 10987654321098765432109876543210 | |
7007 | * 001000 x1110000101 | |
7008 | * rt ----- | |
7009 | * rs ----- | |
7010 | * rd ----- | |
7011 | */ | |
7def8a4b | 7012 | static char *EXTD(uint64 instruction, Dis_info *info) |
89a955e8 AM |
7013 | { |
7014 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 7015 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 7016 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
75199b40 | 7017 | uint64 shift_value = extract_shift_10_9_8_7_6(instruction); |
89a955e8 | 7018 | |
3f2aec07 ML |
7019 | const char *rd = GPR(rd_value, info); |
7020 | const char *rs = GPR(rs_value, info); | |
7021 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 7022 | |
4066c152 | 7023 | return img_format("EXTD %s, %s, %s, 0x%" PRIx64, rd, rs, rt, shift_value); |
89a955e8 AM |
7024 | } |
7025 | ||
7026 | ||
7027 | /* | |
7028 | * | |
7029 | * | |
7030 | * 3 2 1 | |
7031 | * 10987654321098765432109876543210 | |
7032 | * 001000 x1110000101 | |
7033 | * rt ----- | |
7034 | * rs ----- | |
7035 | * rd ----- | |
7036 | */ | |
7def8a4b | 7037 | static char *EXTD32(uint64 instruction, Dis_info *info) |
89a955e8 AM |
7038 | { |
7039 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 7040 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 7041 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
75199b40 | 7042 | uint64 shift_value = extract_shift_10_9_8_7_6(instruction); |
89a955e8 | 7043 | |
3f2aec07 ML |
7044 | const char *rd = GPR(rd_value, info); |
7045 | const char *rs = GPR(rs_value, info); | |
7046 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 7047 | |
4066c152 | 7048 | return img_format("EXTD32 %s, %s, %s, 0x%" PRIx64, rd, rs, rt, shift_value); |
89a955e8 AM |
7049 | } |
7050 | ||
7051 | ||
7052 | /* | |
7053 | * | |
7054 | * | |
7055 | * 3 2 1 | |
7056 | * 10987654321098765432109876543210 | |
7057 | * 001000 x1110000101 | |
7058 | * rt ----- | |
7059 | * rs ----- | |
7060 | * rd ----- | |
7061 | */ | |
7def8a4b | 7062 | static char *EXTPDP(uint64 instruction, Dis_info *info) |
89a955e8 AM |
7063 | { |
7064 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 7065 | uint64 size_value = extract_size_20_19_18_17_16(instruction); |
0f74e61d | 7066 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 7067 | |
3f2aec07 ML |
7068 | const char *rt = GPR(rt_value, info); |
7069 | const char *ac = AC(ac_value, info); | |
89a955e8 | 7070 | |
4066c152 | 7071 | return img_format("EXTPDP %s, %s, 0x%" PRIx64, rt, ac, size_value); |
89a955e8 AM |
7072 | } |
7073 | ||
7074 | ||
7075 | /* | |
7076 | * | |
7077 | * | |
7078 | * 3 2 1 | |
7079 | * 10987654321098765432109876543210 | |
7080 | * 001000 x1110000101 | |
7081 | * rt ----- | |
7082 | * rs ----- | |
7083 | * rd ----- | |
7084 | */ | |
7def8a4b | 7085 | static char *EXTPDPV(uint64 instruction, Dis_info *info) |
89a955e8 AM |
7086 | { |
7087 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 7088 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
0f74e61d | 7089 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 7090 | |
3f2aec07 ML |
7091 | const char *rt = GPR(rt_value, info); |
7092 | const char *ac = AC(ac_value, info); | |
7093 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 7094 | |
c5231692 | 7095 | return img_format("EXTPDPV %s, %s, %s", rt, ac, rs); |
89a955e8 AM |
7096 | } |
7097 | ||
7098 | ||
7099 | /* | |
7100 | * | |
7101 | * | |
7102 | * 3 2 1 | |
7103 | * 10987654321098765432109876543210 | |
7104 | * 001000 x1110000101 | |
7105 | * rt ----- | |
7106 | * rs ----- | |
7107 | * rd ----- | |
7108 | */ | |
7def8a4b | 7109 | static char *EXTP(uint64 instruction, Dis_info *info) |
89a955e8 AM |
7110 | { |
7111 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 7112 | uint64 size_value = extract_size_20_19_18_17_16(instruction); |
0f74e61d | 7113 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 7114 | |
3f2aec07 ML |
7115 | const char *rt = GPR(rt_value, info); |
7116 | const char *ac = AC(ac_value, info); | |
89a955e8 | 7117 | |
4066c152 | 7118 | return img_format("EXTP %s, %s, 0x%" PRIx64, rt, ac, size_value); |
89a955e8 AM |
7119 | } |
7120 | ||
7121 | ||
7122 | /* | |
7123 | * | |
7124 | * | |
7125 | * 3 2 1 | |
7126 | * 10987654321098765432109876543210 | |
7127 | * 001000 x1110000101 | |
7128 | * rt ----- | |
7129 | * rs ----- | |
7130 | * rd ----- | |
7131 | */ | |
7def8a4b | 7132 | static char *EXTPV(uint64 instruction, Dis_info *info) |
89a955e8 AM |
7133 | { |
7134 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 7135 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
0f74e61d | 7136 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 7137 | |
3f2aec07 ML |
7138 | const char *rt = GPR(rt_value, info); |
7139 | const char *ac = AC(ac_value, info); | |
7140 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 7141 | |
c5231692 | 7142 | return img_format("EXTPV %s, %s, %s", rt, ac, rs); |
89a955e8 AM |
7143 | } |
7144 | ||
7145 | ||
7146 | /* | |
5c65eed6 AM |
7147 | * [DSP] EXTR_RS.W rt, ac, shift - Extract word value from accumulator to GPR |
7148 | * with right shift | |
89a955e8 AM |
7149 | * |
7150 | * 3 2 1 | |
7151 | * 10987654321098765432109876543210 | |
5c65eed6 | 7152 | * 001000 10111001111111 |
89a955e8 | 7153 | * rt ----- |
5c65eed6 AM |
7154 | * shift ----- |
7155 | * ac -- | |
89a955e8 | 7156 | */ |
7def8a4b | 7157 | static char *EXTR_RS_W(uint64 instruction, Dis_info *info) |
89a955e8 AM |
7158 | { |
7159 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
7160 | uint64 shift_value = extract_shift_20_19_18_17_16(instruction); | |
0f74e61d | 7161 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 7162 | |
3f2aec07 ML |
7163 | const char *rt = GPR(rt_value, info); |
7164 | const char *ac = AC(ac_value, info); | |
89a955e8 | 7165 | |
4066c152 | 7166 | return img_format("EXTR_RS.W %s, %s, 0x%" PRIx64, rt, ac, shift_value); |
89a955e8 AM |
7167 | } |
7168 | ||
7169 | ||
7170 | /* | |
5c65eed6 AM |
7171 | * [DSP] EXTR_R.W rt, ac, shift - Extract word value from accumulator to GPR |
7172 | * with right shift | |
89a955e8 AM |
7173 | * |
7174 | * 3 2 1 | |
7175 | * 10987654321098765432109876543210 | |
5c65eed6 | 7176 | * 001000 01111001111111 |
89a955e8 | 7177 | * rt ----- |
5c65eed6 AM |
7178 | * shift ----- |
7179 | * ac -- | |
89a955e8 | 7180 | */ |
7def8a4b | 7181 | static char *EXTR_R_W(uint64 instruction, Dis_info *info) |
89a955e8 AM |
7182 | { |
7183 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
7184 | uint64 shift_value = extract_shift_20_19_18_17_16(instruction); | |
0f74e61d | 7185 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 7186 | |
3f2aec07 ML |
7187 | const char *rt = GPR(rt_value, info); |
7188 | const char *ac = AC(ac_value, info); | |
89a955e8 | 7189 | |
4066c152 | 7190 | return img_format("EXTR_R.W %s, %s, 0x%" PRIx64, rt, ac, shift_value); |
89a955e8 AM |
7191 | } |
7192 | ||
7193 | ||
7194 | /* | |
5c65eed6 AM |
7195 | * [DSP] EXTR_S.H rt, ac, shift - Extract halfword value from accumulator |
7196 | * to GPR with right shift and saturate | |
89a955e8 AM |
7197 | * |
7198 | * 3 2 1 | |
7199 | * 10987654321098765432109876543210 | |
5c65eed6 | 7200 | * 001000 11111001111111 |
89a955e8 | 7201 | * rt ----- |
5c65eed6 AM |
7202 | * shift ----- |
7203 | * ac -- | |
89a955e8 | 7204 | */ |
7def8a4b | 7205 | static char *EXTR_S_H(uint64 instruction, Dis_info *info) |
89a955e8 AM |
7206 | { |
7207 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
7208 | uint64 shift_value = extract_shift_20_19_18_17_16(instruction); | |
0f74e61d | 7209 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 7210 | |
3f2aec07 ML |
7211 | const char *rt = GPR(rt_value, info); |
7212 | const char *ac = AC(ac_value, info); | |
89a955e8 | 7213 | |
4066c152 | 7214 | return img_format("EXTR_S.H %s, %s, 0x%" PRIx64, rt, ac, shift_value); |
89a955e8 AM |
7215 | } |
7216 | ||
7217 | ||
7218 | /* | |
5c65eed6 AM |
7219 | * [DSP] EXTR.W rt, ac, shift - Extract word value from accumulator to GPR |
7220 | * with right shift | |
89a955e8 AM |
7221 | * |
7222 | * 3 2 1 | |
7223 | * 10987654321098765432109876543210 | |
5c65eed6 | 7224 | * 001000 00111001111111 |
89a955e8 | 7225 | * rt ----- |
5c65eed6 AM |
7226 | * shift ----- |
7227 | * ac -- | |
89a955e8 | 7228 | */ |
7def8a4b | 7229 | static char *EXTR_W(uint64 instruction, Dis_info *info) |
89a955e8 AM |
7230 | { |
7231 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
7232 | uint64 shift_value = extract_shift_20_19_18_17_16(instruction); | |
0f74e61d | 7233 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 7234 | |
3f2aec07 ML |
7235 | const char *rt = GPR(rt_value, info); |
7236 | const char *ac = AC(ac_value, info); | |
89a955e8 | 7237 | |
4066c152 | 7238 | return img_format("EXTR.W %s, %s, 0x%" PRIx64, rt, ac, shift_value); |
89a955e8 AM |
7239 | } |
7240 | ||
7241 | ||
7242 | /* | |
5c65eed6 AM |
7243 | * [DSP] EXTRV_RS.W rt, ac, rs - Extract word value with variable |
7244 | * right shift from accumulator to GPR | |
89a955e8 AM |
7245 | * |
7246 | * 3 2 1 | |
7247 | * 10987654321098765432109876543210 | |
5c65eed6 | 7248 | * 001000 10111010111111 |
89a955e8 AM |
7249 | * rt ----- |
7250 | * rs ----- | |
5c65eed6 | 7251 | * ac -- |
89a955e8 | 7252 | */ |
7def8a4b | 7253 | static char *EXTRV_RS_W(uint64 instruction, Dis_info *info) |
89a955e8 AM |
7254 | { |
7255 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 7256 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
0f74e61d | 7257 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 7258 | |
3f2aec07 ML |
7259 | const char *rt = GPR(rt_value, info); |
7260 | const char *ac = AC(ac_value, info); | |
7261 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 7262 | |
c5231692 | 7263 | return img_format("EXTRV_RS.W %s, %s, %s", rt, ac, rs); |
89a955e8 AM |
7264 | } |
7265 | ||
7266 | ||
7267 | /* | |
5c65eed6 AM |
7268 | * [DSP] EXTRV_R.W rt, ac, rs - Extract word value with variable |
7269 | * right shift from accumulator to GPR | |
89a955e8 AM |
7270 | * |
7271 | * 3 2 1 | |
7272 | * 10987654321098765432109876543210 | |
5c65eed6 | 7273 | * 001000 01111010111111 |
89a955e8 AM |
7274 | * rt ----- |
7275 | * rs ----- | |
5c65eed6 | 7276 | * ac -- |
89a955e8 | 7277 | */ |
7def8a4b | 7278 | static char *EXTRV_R_W(uint64 instruction, Dis_info *info) |
89a955e8 AM |
7279 | { |
7280 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 7281 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
0f74e61d | 7282 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 7283 | |
3f2aec07 ML |
7284 | const char *rt = GPR(rt_value, info); |
7285 | const char *ac = AC(ac_value, info); | |
7286 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 7287 | |
c5231692 | 7288 | return img_format("EXTRV_R.W %s, %s, %s", rt, ac, rs); |
89a955e8 AM |
7289 | } |
7290 | ||
7291 | ||
7292 | /* | |
5c65eed6 AM |
7293 | * [DSP] EXTRV_S.H rt, ac, rs - Extract halfword value variable from |
7294 | * accumulator to GPR with right shift and saturate | |
89a955e8 AM |
7295 | * |
7296 | * 3 2 1 | |
7297 | * 10987654321098765432109876543210 | |
5c65eed6 | 7298 | * 001000 11111010111111 |
89a955e8 AM |
7299 | * rt ----- |
7300 | * rs ----- | |
5c65eed6 | 7301 | * ac -- |
89a955e8 | 7302 | */ |
7def8a4b | 7303 | static char *EXTRV_S_H(uint64 instruction, Dis_info *info) |
89a955e8 AM |
7304 | { |
7305 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 7306 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
0f74e61d | 7307 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 7308 | |
3f2aec07 ML |
7309 | const char *rt = GPR(rt_value, info); |
7310 | const char *ac = AC(ac_value, info); | |
7311 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 7312 | |
c5231692 | 7313 | return img_format("EXTRV_S.H %s, %s, %s", rt, ac, rs); |
89a955e8 AM |
7314 | } |
7315 | ||
7316 | ||
7317 | /* | |
5c65eed6 AM |
7318 | * [DSP] EXTRV.W rt, ac, rs - Extract word value with variable |
7319 | * right shift from accumulator to GPR | |
89a955e8 AM |
7320 | * |
7321 | * 3 2 1 | |
7322 | * 10987654321098765432109876543210 | |
5c65eed6 | 7323 | * 001000 00111010111111 |
89a955e8 AM |
7324 | * rt ----- |
7325 | * rs ----- | |
5c65eed6 | 7326 | * ac -- |
89a955e8 | 7327 | */ |
7def8a4b | 7328 | static char *EXTRV_W(uint64 instruction, Dis_info *info) |
89a955e8 AM |
7329 | { |
7330 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 7331 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
0f74e61d | 7332 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 7333 | |
3f2aec07 ML |
7334 | const char *rt = GPR(rt_value, info); |
7335 | const char *ac = AC(ac_value, info); | |
7336 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 7337 | |
c5231692 | 7338 | return img_format("EXTRV.W %s, %s, %s", rt, ac, rs); |
89a955e8 AM |
7339 | } |
7340 | ||
7341 | ||
7342 | /* | |
7343 | * EXTW - Extract Word | |
7344 | * | |
7345 | * 3 2 1 | |
7346 | * 10987654321098765432109876543210 | |
7347 | * 001000 011111 | |
7348 | * rt ----- | |
7349 | * rs ----- | |
7350 | * rd ----- | |
7351 | * shift ----- | |
7352 | */ | |
7def8a4b | 7353 | static char *EXTW(uint64 instruction, Dis_info *info) |
89a955e8 AM |
7354 | { |
7355 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 7356 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 7357 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
75199b40 | 7358 | uint64 shift_value = extract_shift_10_9_8_7_6(instruction); |
89a955e8 | 7359 | |
3f2aec07 ML |
7360 | const char *rd = GPR(rd_value, info); |
7361 | const char *rs = GPR(rs_value, info); | |
7362 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 7363 | |
4066c152 | 7364 | return img_format("EXTW %s, %s, %s, 0x%" PRIx64, rd, rs, rt, shift_value); |
89a955e8 AM |
7365 | } |
7366 | ||
7367 | ||
7368 | /* | |
7369 | * | |
7370 | * | |
7371 | * 3 2 1 | |
7372 | * 10987654321098765432109876543210 | |
7373 | * 001000 x1110000101 | |
7374 | * rt ----- | |
7375 | * rs ----- | |
7376 | * rd ----- | |
7377 | */ | |
7def8a4b | 7378 | static char *FLOOR_L_D(uint64 instruction, Dis_info *info) |
89a955e8 | 7379 | { |
17ce2f00 | 7380 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 7381 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 7382 | |
3f2aec07 ML |
7383 | const char *ft = FPR(ft_value, info); |
7384 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 7385 | |
c5231692 | 7386 | return img_format("FLOOR.L.D %s, %s", ft, fs); |
89a955e8 AM |
7387 | } |
7388 | ||
7389 | ||
7390 | /* | |
7391 | * | |
7392 | * | |
7393 | * 3 2 1 | |
7394 | * 10987654321098765432109876543210 | |
7395 | * 001000 x1110000101 | |
7396 | * rt ----- | |
7397 | * rs ----- | |
7398 | * rd ----- | |
7399 | */ | |
7def8a4b | 7400 | static char *FLOOR_L_S(uint64 instruction, Dis_info *info) |
89a955e8 | 7401 | { |
17ce2f00 | 7402 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 7403 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 7404 | |
3f2aec07 ML |
7405 | const char *ft = FPR(ft_value, info); |
7406 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 7407 | |
c5231692 | 7408 | return img_format("FLOOR.L.S %s, %s", ft, fs); |
89a955e8 AM |
7409 | } |
7410 | ||
7411 | ||
7412 | /* | |
7413 | * | |
7414 | * | |
7415 | * 3 2 1 | |
7416 | * 10987654321098765432109876543210 | |
7417 | * 001000 x1110000101 | |
7418 | * rt ----- | |
7419 | * rs ----- | |
7420 | * rd ----- | |
7421 | */ | |
7def8a4b | 7422 | static char *FLOOR_W_D(uint64 instruction, Dis_info *info) |
89a955e8 | 7423 | { |
17ce2f00 | 7424 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 7425 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 7426 | |
3f2aec07 ML |
7427 | const char *ft = FPR(ft_value, info); |
7428 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 7429 | |
c5231692 | 7430 | return img_format("FLOOR.W.D %s, %s", ft, fs); |
89a955e8 AM |
7431 | } |
7432 | ||
7433 | ||
7434 | /* | |
7435 | * | |
7436 | * | |
7437 | * 3 2 1 | |
7438 | * 10987654321098765432109876543210 | |
7439 | * 001000 x1110000101 | |
7440 | * rt ----- | |
7441 | * rs ----- | |
7442 | * rd ----- | |
7443 | */ | |
7def8a4b | 7444 | static char *FLOOR_W_S(uint64 instruction, Dis_info *info) |
89a955e8 | 7445 | { |
17ce2f00 | 7446 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 7447 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 7448 | |
3f2aec07 ML |
7449 | const char *ft = FPR(ft_value, info); |
7450 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 7451 | |
c5231692 | 7452 | return img_format("FLOOR.W.S %s, %s", ft, fs); |
89a955e8 AM |
7453 | } |
7454 | ||
7455 | ||
7456 | /* | |
7457 | * | |
7458 | * | |
7459 | * 3 2 1 | |
7460 | * 10987654321098765432109876543210 | |
7461 | * 001000 x1110000101 | |
7462 | * rt ----- | |
7463 | * rs ----- | |
7464 | * rd ----- | |
7465 | */ | |
7def8a4b | 7466 | static char *FORK(uint64 instruction, Dis_info *info) |
89a955e8 AM |
7467 | { |
7468 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 7469 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 7470 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 7471 | |
3f2aec07 ML |
7472 | const char *rd = GPR(rd_value, info); |
7473 | const char *rs = GPR(rs_value, info); | |
7474 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 7475 | |
c5231692 | 7476 | return img_format("FORK %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
7477 | } |
7478 | ||
7479 | ||
7480 | /* | |
7481 | * | |
7482 | * | |
7483 | * 3 2 1 | |
7484 | * 10987654321098765432109876543210 | |
7485 | * 001000 x1110000101 | |
7486 | * rt ----- | |
7487 | * rs ----- | |
7488 | * rd ----- | |
7489 | */ | |
7def8a4b | 7490 | static char *HYPCALL(uint64 instruction, Dis_info *info) |
89a955e8 AM |
7491 | { |
7492 | uint64 code_value = extract_code_17_to_0(instruction); | |
7493 | ||
89a955e8 | 7494 | |
4066c152 | 7495 | return img_format("HYPCALL 0x%" PRIx64, code_value); |
89a955e8 AM |
7496 | } |
7497 | ||
7498 | ||
7499 | /* | |
7500 | * | |
7501 | * | |
7502 | * 3 2 1 | |
7503 | * 10987654321098765432109876543210 | |
7504 | * 001000 x1110000101 | |
7505 | * rt ----- | |
7506 | * rs ----- | |
7507 | * rd ----- | |
7508 | */ | |
7def8a4b | 7509 | static char *HYPCALL_16_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
7510 | { |
7511 | uint64 code_value = extract_code_1_0(instruction); | |
7512 | ||
89a955e8 | 7513 | |
4066c152 | 7514 | return img_format("HYPCALL 0x%" PRIx64, code_value); |
89a955e8 AM |
7515 | } |
7516 | ||
7517 | ||
7518 | /* | |
7519 | * | |
7520 | * | |
7521 | * 3 2 1 | |
7522 | * 10987654321098765432109876543210 | |
7523 | * 001000 x1110000101 | |
7524 | * rt ----- | |
7525 | * rs ----- | |
7526 | * rd ----- | |
7527 | */ | |
7def8a4b | 7528 | static char *INS(uint64 instruction, Dis_info *info) |
89a955e8 AM |
7529 | { |
7530 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
75199b40 | 7531 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
89a955e8 AM |
7532 | uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction); |
7533 | uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction); | |
89a955e8 | 7534 | |
3f2aec07 ML |
7535 | const char *rt = GPR(rt_value, info); |
7536 | const char *rs = GPR(rs_value, info); | |
89a955e8 AM |
7537 | /* !!!!!!!!!! - no conversion function */ |
7538 | ||
4066c152 ML |
7539 | return img_format("INS %s, %s, 0x%" PRIx64 ", 0x%" PRIx64, |
7540 | rt, rs, lsb_value, msbd_value); | |
89a955e8 AM |
7541 | /* hand edited */ |
7542 | } | |
7543 | ||
7544 | ||
7545 | /* | |
5c65eed6 | 7546 | * [DSP] INSV rt, rs - Insert bit field variable |
89a955e8 AM |
7547 | * |
7548 | * 3 2 1 | |
7549 | * 10987654321098765432109876543210 | |
5c65eed6 | 7550 | * 001000 0100000100111111 |
89a955e8 AM |
7551 | * rt ----- |
7552 | * rs ----- | |
89a955e8 | 7553 | */ |
7def8a4b | 7554 | static char *INSV(uint64 instruction, Dis_info *info) |
89a955e8 AM |
7555 | { |
7556 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
7557 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
7558 | ||
3f2aec07 ML |
7559 | const char *rt = GPR(rt_value, info); |
7560 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 7561 | |
c5231692 | 7562 | return img_format("INSV %s, %s", rt, rs); |
89a955e8 AM |
7563 | } |
7564 | ||
7565 | ||
7566 | /* | |
7567 | * | |
7568 | * | |
7569 | * 3 2 1 | |
7570 | * 10987654321098765432109876543210 | |
7571 | * 001000 x1110000101 | |
7572 | * rt ----- | |
7573 | * rs ----- | |
7574 | * rd ----- | |
7575 | */ | |
7def8a4b | 7576 | static char *IRET(uint64 instruction, Dis_info *info) |
89a955e8 AM |
7577 | { |
7578 | (void)instruction; | |
7579 | ||
7def8a4b | 7580 | return g_strdup("IRET "); |
89a955e8 AM |
7581 | } |
7582 | ||
7583 | ||
7584 | /* | |
7585 | * | |
7586 | * | |
7587 | * 3 2 1 | |
7588 | * 10987654321098765432109876543210 | |
7589 | * 001000 x1110000101 | |
7590 | * rt ----- | |
7591 | * rs ----- | |
7592 | * rd ----- | |
7593 | */ | |
7def8a4b | 7594 | static char *JALRC_16_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
7595 | { |
7596 | uint64 rt_value = extract_rt_9_8_7_6_5(instruction); | |
7597 | ||
3f2aec07 | 7598 | const char *rt = GPR(rt_value, info); |
89a955e8 | 7599 | |
c5231692 | 7600 | return img_format("JALRC $%d, %s", 31, rt); |
89a955e8 AM |
7601 | } |
7602 | ||
7603 | ||
7604 | /* | |
7605 | * | |
7606 | * | |
7607 | * 3 2 1 | |
7608 | * 10987654321098765432109876543210 | |
7609 | * 001000 x1110000101 | |
7610 | * rt ----- | |
7611 | * rs ----- | |
7612 | * rd ----- | |
7613 | */ | |
7def8a4b | 7614 | static char *JALRC_32_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
7615 | { |
7616 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
7617 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
7618 | ||
3f2aec07 ML |
7619 | const char *rt = GPR(rt_value, info); |
7620 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 7621 | |
c5231692 | 7622 | return img_format("JALRC %s, %s", rt, rs); |
89a955e8 AM |
7623 | } |
7624 | ||
7625 | ||
7626 | /* | |
7627 | * | |
7628 | * | |
7629 | * 3 2 1 | |
7630 | * 10987654321098765432109876543210 | |
7631 | * 001000 x1110000101 | |
7632 | * rt ----- | |
7633 | * rs ----- | |
7634 | * rd ----- | |
7635 | */ | |
7def8a4b | 7636 | static char *JALRC_HB(uint64 instruction, Dis_info *info) |
89a955e8 AM |
7637 | { |
7638 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
7639 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
7640 | ||
3f2aec07 ML |
7641 | const char *rt = GPR(rt_value, info); |
7642 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 7643 | |
c5231692 | 7644 | return img_format("JALRC.HB %s, %s", rt, rs); |
89a955e8 AM |
7645 | } |
7646 | ||
7647 | ||
7648 | /* | |
7649 | * | |
7650 | * | |
7651 | * 3 2 1 | |
7652 | * 10987654321098765432109876543210 | |
7653 | * 001000 x1110000101 | |
7654 | * rt ----- | |
7655 | * rs ----- | |
7656 | * rd ----- | |
7657 | */ | |
7def8a4b | 7658 | static char *JRC(uint64 instruction, Dis_info *info) |
89a955e8 AM |
7659 | { |
7660 | uint64 rt_value = extract_rt_9_8_7_6_5(instruction); | |
7661 | ||
3f2aec07 | 7662 | const char *rt = GPR(rt_value, info); |
89a955e8 | 7663 | |
c5231692 | 7664 | return img_format("JRC %s", rt); |
89a955e8 AM |
7665 | } |
7666 | ||
7667 | ||
7668 | /* | |
7669 | * | |
7670 | * | |
7671 | * 3 2 1 | |
7672 | * 10987654321098765432109876543210 | |
7673 | * 001000 x1110000101 | |
7674 | * rt ----- | |
7675 | * rs ----- | |
7676 | * rd ----- | |
7677 | */ | |
7def8a4b | 7678 | static char *LB_16_(uint64 instruction, Dis_info *info) |
89a955e8 | 7679 | { |
89a955e8 AM |
7680 | uint64 rt3_value = extract_rt3_9_8_7(instruction); |
7681 | uint64 rs3_value = extract_rs3_6_5_4(instruction); | |
75199b40 | 7682 | uint64 u_value = extract_u_1_0(instruction); |
89a955e8 | 7683 | |
3f2aec07 ML |
7684 | const char *rt3 = GPR(decode_gpr_gpr3(rt3_value, info), info); |
7685 | const char *rs3 = GPR(decode_gpr_gpr3(rs3_value, info), info); | |
89a955e8 | 7686 | |
4066c152 | 7687 | return img_format("LB %s, 0x%" PRIx64 "(%s)", rt3, u_value, rs3); |
89a955e8 AM |
7688 | } |
7689 | ||
7690 | ||
7691 | /* | |
7692 | * | |
7693 | * | |
7694 | * 3 2 1 | |
7695 | * 10987654321098765432109876543210 | |
7696 | * 001000 x1110000101 | |
7697 | * rt ----- | |
7698 | * rs ----- | |
7699 | * rd ----- | |
7700 | */ | |
7def8a4b | 7701 | static char *LB_GP_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
7702 | { |
7703 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
7704 | uint64 u_value = extract_u_17_to_0(instruction); | |
7705 | ||
3f2aec07 | 7706 | const char *rt = GPR(rt_value, info); |
89a955e8 | 7707 | |
4066c152 | 7708 | return img_format("LB %s, 0x%" PRIx64 "($%d)", rt, u_value, 28); |
89a955e8 AM |
7709 | } |
7710 | ||
7711 | ||
7712 | /* | |
7713 | * | |
7714 | * | |
7715 | * 3 2 1 | |
7716 | * 10987654321098765432109876543210 | |
7717 | * 001000 x1110000101 | |
7718 | * rt ----- | |
7719 | * rs ----- | |
7720 | * rd ----- | |
7721 | */ | |
7def8a4b | 7722 | static char *LB_S9_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
7723 | { |
7724 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 7725 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 7726 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 7727 | |
3f2aec07 ML |
7728 | const char *rt = GPR(rt_value, info); |
7729 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 7730 | |
4066c152 | 7731 | return img_format("LB %s, %" PRId64 "(%s)", rt, s_value, rs); |
89a955e8 AM |
7732 | } |
7733 | ||
7734 | ||
7735 | /* | |
7736 | * | |
7737 | * | |
7738 | * 3 2 1 | |
7739 | * 10987654321098765432109876543210 | |
7740 | * 001000 x1110000101 | |
7741 | * rt ----- | |
7742 | * rs ----- | |
7743 | * rd ----- | |
7744 | */ | |
7def8a4b | 7745 | static char *LB_U12_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
7746 | { |
7747 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 7748 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 7749 | uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 7750 | |
3f2aec07 ML |
7751 | const char *rt = GPR(rt_value, info); |
7752 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 7753 | |
4066c152 | 7754 | return img_format("LB %s, 0x%" PRIx64 "(%s)", rt, u_value, rs); |
89a955e8 AM |
7755 | } |
7756 | ||
7757 | ||
7758 | /* | |
7759 | * | |
7760 | * | |
7761 | * 3 2 1 | |
7762 | * 10987654321098765432109876543210 | |
7763 | * 001000 x1110000101 | |
7764 | * rt ----- | |
7765 | * rs ----- | |
7766 | * rd ----- | |
7767 | */ | |
7def8a4b | 7768 | static char *LBE(uint64 instruction, Dis_info *info) |
89a955e8 AM |
7769 | { |
7770 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 7771 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 7772 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 7773 | |
3f2aec07 ML |
7774 | const char *rt = GPR(rt_value, info); |
7775 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 7776 | |
4066c152 | 7777 | return img_format("LBE %s, %" PRId64 "(%s)", rt, s_value, rs); |
89a955e8 AM |
7778 | } |
7779 | ||
7780 | ||
7781 | /* | |
7782 | * | |
7783 | * | |
7784 | * 3 2 1 | |
7785 | * 10987654321098765432109876543210 | |
7786 | * 001000 x1110000101 | |
7787 | * rt ----- | |
7788 | * rs ----- | |
7789 | * rd ----- | |
7790 | */ | |
7def8a4b | 7791 | static char *LBU_16_(uint64 instruction, Dis_info *info) |
89a955e8 | 7792 | { |
89a955e8 AM |
7793 | uint64 rt3_value = extract_rt3_9_8_7(instruction); |
7794 | uint64 rs3_value = extract_rs3_6_5_4(instruction); | |
75199b40 | 7795 | uint64 u_value = extract_u_1_0(instruction); |
89a955e8 | 7796 | |
3f2aec07 ML |
7797 | const char *rt3 = GPR(decode_gpr_gpr3(rt3_value, info), info); |
7798 | const char *rs3 = GPR(decode_gpr_gpr3(rs3_value, info), info); | |
89a955e8 | 7799 | |
4066c152 | 7800 | return img_format("LBU %s, 0x%" PRIx64 "(%s)", rt3, u_value, rs3); |
89a955e8 AM |
7801 | } |
7802 | ||
7803 | ||
7804 | /* | |
7805 | * | |
7806 | * | |
7807 | * 3 2 1 | |
7808 | * 10987654321098765432109876543210 | |
7809 | * 001000 x1110000101 | |
7810 | * rt ----- | |
7811 | * rs ----- | |
7812 | * rd ----- | |
7813 | */ | |
7def8a4b | 7814 | static char *LBU_GP_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
7815 | { |
7816 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
7817 | uint64 u_value = extract_u_17_to_0(instruction); | |
7818 | ||
3f2aec07 | 7819 | const char *rt = GPR(rt_value, info); |
89a955e8 | 7820 | |
4066c152 | 7821 | return img_format("LBU %s, 0x%" PRIx64 "($%d)", rt, u_value, 28); |
89a955e8 AM |
7822 | } |
7823 | ||
7824 | ||
7825 | /* | |
7826 | * | |
7827 | * | |
7828 | * 3 2 1 | |
7829 | * 10987654321098765432109876543210 | |
7830 | * 001000 x1110000101 | |
7831 | * rt ----- | |
7832 | * rs ----- | |
7833 | * rd ----- | |
7834 | */ | |
7def8a4b | 7835 | static char *LBU_S9_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
7836 | { |
7837 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 7838 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 7839 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 7840 | |
3f2aec07 ML |
7841 | const char *rt = GPR(rt_value, info); |
7842 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 7843 | |
4066c152 | 7844 | return img_format("LBU %s, %" PRId64 "(%s)", rt, s_value, rs); |
89a955e8 AM |
7845 | } |
7846 | ||
7847 | ||
7848 | /* | |
7849 | * | |
7850 | * | |
7851 | * 3 2 1 | |
7852 | * 10987654321098765432109876543210 | |
7853 | * 001000 x1110000101 | |
7854 | * rt ----- | |
7855 | * rs ----- | |
7856 | * rd ----- | |
7857 | */ | |
7def8a4b | 7858 | static char *LBU_U12_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
7859 | { |
7860 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 7861 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 7862 | uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 7863 | |
3f2aec07 ML |
7864 | const char *rt = GPR(rt_value, info); |
7865 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 7866 | |
4066c152 | 7867 | return img_format("LBU %s, 0x%" PRIx64 "(%s)", rt, u_value, rs); |
89a955e8 AM |
7868 | } |
7869 | ||
7870 | ||
7871 | /* | |
7872 | * | |
7873 | * | |
7874 | * 3 2 1 | |
7875 | * 10987654321098765432109876543210 | |
7876 | * 001000 x1110000101 | |
7877 | * rt ----- | |
7878 | * rs ----- | |
7879 | * rd ----- | |
7880 | */ | |
7def8a4b | 7881 | static char *LBUE(uint64 instruction, Dis_info *info) |
89a955e8 AM |
7882 | { |
7883 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 7884 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 7885 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 7886 | |
3f2aec07 ML |
7887 | const char *rt = GPR(rt_value, info); |
7888 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 7889 | |
4066c152 | 7890 | return img_format("LBUE %s, %" PRId64 "(%s)", rt, s_value, rs); |
89a955e8 AM |
7891 | } |
7892 | ||
7893 | ||
7894 | /* | |
7895 | * | |
7896 | * | |
7897 | * 3 2 1 | |
7898 | * 10987654321098765432109876543210 | |
7899 | * 001000 x1110000101 | |
7900 | * rt ----- | |
7901 | * rs ----- | |
7902 | * rd ----- | |
7903 | */ | |
7def8a4b | 7904 | static char *LBUX(uint64 instruction, Dis_info *info) |
89a955e8 AM |
7905 | { |
7906 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 7907 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 7908 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 7909 | |
3f2aec07 ML |
7910 | const char *rd = GPR(rd_value, info); |
7911 | const char *rs = GPR(rs_value, info); | |
7912 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 7913 | |
c5231692 | 7914 | return img_format("LBUX %s, %s(%s)", rd, rs, rt); |
89a955e8 AM |
7915 | } |
7916 | ||
7917 | ||
7918 | /* | |
7919 | * | |
7920 | * | |
7921 | * 3 2 1 | |
7922 | * 10987654321098765432109876543210 | |
7923 | * 001000 x1110000101 | |
7924 | * rt ----- | |
7925 | * rs ----- | |
7926 | * rd ----- | |
7927 | */ | |
7def8a4b | 7928 | static char *LBX(uint64 instruction, Dis_info *info) |
89a955e8 AM |
7929 | { |
7930 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 7931 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 7932 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 7933 | |
3f2aec07 ML |
7934 | const char *rd = GPR(rd_value, info); |
7935 | const char *rs = GPR(rs_value, info); | |
7936 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 7937 | |
c5231692 | 7938 | return img_format("LBX %s, %s(%s)", rd, rs, rt); |
89a955e8 AM |
7939 | } |
7940 | ||
7941 | ||
7942 | /* | |
7943 | * | |
7944 | * | |
7945 | * 3 2 1 | |
7946 | * 10987654321098765432109876543210 | |
7947 | * 001000 x1110000101 | |
7948 | * rt ----- | |
7949 | * rs ----- | |
7950 | * rd ----- | |
7951 | */ | |
7def8a4b | 7952 | static char *LD_GP_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
7953 | { |
7954 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
11b9732a | 7955 | uint64 u_value = extract_u_20_to_3__s3(instruction); |
89a955e8 | 7956 | |
3f2aec07 | 7957 | const char *rt = GPR(rt_value, info); |
89a955e8 | 7958 | |
4066c152 | 7959 | return img_format("LD %s, 0x%" PRIx64 "($%d)", rt, u_value, 28); |
89a955e8 AM |
7960 | } |
7961 | ||
7962 | ||
7963 | /* | |
7964 | * | |
7965 | * | |
7966 | * 3 2 1 | |
7967 | * 10987654321098765432109876543210 | |
7968 | * 001000 x1110000101 | |
7969 | * rt ----- | |
7970 | * rs ----- | |
7971 | * rd ----- | |
7972 | */ | |
7def8a4b | 7973 | static char *LD_S9_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
7974 | { |
7975 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 7976 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 7977 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 7978 | |
3f2aec07 ML |
7979 | const char *rt = GPR(rt_value, info); |
7980 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 7981 | |
4066c152 | 7982 | return img_format("LD %s, %" PRId64 "(%s)", rt, s_value, rs); |
89a955e8 AM |
7983 | } |
7984 | ||
7985 | ||
7986 | /* | |
7987 | * | |
7988 | * | |
7989 | * 3 2 1 | |
7990 | * 10987654321098765432109876543210 | |
7991 | * 001000 x1110000101 | |
7992 | * rt ----- | |
7993 | * rs ----- | |
7994 | * rd ----- | |
7995 | */ | |
7def8a4b | 7996 | static char *LD_U12_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
7997 | { |
7998 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 7999 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 8000 | uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 8001 | |
3f2aec07 ML |
8002 | const char *rt = GPR(rt_value, info); |
8003 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 8004 | |
4066c152 | 8005 | return img_format("LD %s, 0x%" PRIx64 "(%s)", rt, u_value, rs); |
89a955e8 AM |
8006 | } |
8007 | ||
8008 | ||
8009 | /* | |
8010 | * | |
8011 | * | |
8012 | * 3 2 1 | |
8013 | * 10987654321098765432109876543210 | |
8014 | * 001000 x1110000101 | |
8015 | * rt ----- | |
8016 | * rs ----- | |
8017 | * rd ----- | |
8018 | */ | |
7def8a4b | 8019 | static char *LDC1_GP_(uint64 instruction, Dis_info *info) |
89a955e8 | 8020 | { |
17ce2f00 | 8021 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
11b9732a | 8022 | uint64 u_value = extract_u_17_to_2__s2(instruction); |
89a955e8 | 8023 | |
3f2aec07 | 8024 | const char *ft = FPR(ft_value, info); |
89a955e8 | 8025 | |
4066c152 | 8026 | return img_format("LDC1 %s, 0x%" PRIx64 "($%d)", ft, u_value, 28); |
89a955e8 AM |
8027 | } |
8028 | ||
8029 | ||
8030 | /* | |
8031 | * | |
8032 | * | |
8033 | * 3 2 1 | |
8034 | * 10987654321098765432109876543210 | |
8035 | * 001000 x1110000101 | |
8036 | * rt ----- | |
8037 | * rs ----- | |
8038 | * rd ----- | |
8039 | */ | |
7def8a4b | 8040 | static char *LDC1_S9_(uint64 instruction, Dis_info *info) |
89a955e8 | 8041 | { |
17ce2f00 | 8042 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
89a955e8 | 8043 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 8044 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 8045 | |
3f2aec07 ML |
8046 | const char *ft = FPR(ft_value, info); |
8047 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 8048 | |
4066c152 | 8049 | return img_format("LDC1 %s, %" PRId64 "(%s)", ft, s_value, rs); |
89a955e8 AM |
8050 | } |
8051 | ||
8052 | ||
8053 | /* | |
8054 | * | |
8055 | * | |
8056 | * 3 2 1 | |
8057 | * 10987654321098765432109876543210 | |
8058 | * 001000 x1110000101 | |
8059 | * rt ----- | |
8060 | * rs ----- | |
8061 | * rd ----- | |
8062 | */ | |
7def8a4b | 8063 | static char *LDC1_U12_(uint64 instruction, Dis_info *info) |
89a955e8 | 8064 | { |
17ce2f00 | 8065 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
89a955e8 | 8066 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 8067 | uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 8068 | |
3f2aec07 ML |
8069 | const char *ft = FPR(ft_value, info); |
8070 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 8071 | |
4066c152 | 8072 | return img_format("LDC1 %s, 0x%" PRIx64 "(%s)", ft, u_value, rs); |
89a955e8 AM |
8073 | } |
8074 | ||
8075 | ||
8076 | /* | |
8077 | * | |
8078 | * | |
8079 | * 3 2 1 | |
8080 | * 10987654321098765432109876543210 | |
8081 | * 001000 x1110000101 | |
8082 | * rt ----- | |
8083 | * rs ----- | |
8084 | * rd ----- | |
8085 | */ | |
7def8a4b | 8086 | static char *LDC1XS(uint64 instruction, Dis_info *info) |
89a955e8 AM |
8087 | { |
8088 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 8089 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 8090 | uint64 ft_value = extract_ft_15_14_13_12_11(instruction); |
89a955e8 | 8091 | |
3f2aec07 ML |
8092 | const char *ft = FPR(ft_value, info); |
8093 | const char *rs = GPR(rs_value, info); | |
8094 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 8095 | |
c5231692 | 8096 | return img_format("LDC1XS %s, %s(%s)", ft, rs, rt); |
89a955e8 AM |
8097 | } |
8098 | ||
8099 | ||
8100 | /* | |
8101 | * | |
8102 | * | |
8103 | * 3 2 1 | |
8104 | * 10987654321098765432109876543210 | |
8105 | * 001000 x1110000101 | |
8106 | * rt ----- | |
8107 | * rs ----- | |
8108 | * rd ----- | |
8109 | */ | |
7def8a4b | 8110 | static char *LDC1X(uint64 instruction, Dis_info *info) |
89a955e8 AM |
8111 | { |
8112 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 8113 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 8114 | uint64 ft_value = extract_ft_15_14_13_12_11(instruction); |
89a955e8 | 8115 | |
3f2aec07 ML |
8116 | const char *ft = FPR(ft_value, info); |
8117 | const char *rs = GPR(rs_value, info); | |
8118 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 8119 | |
c5231692 | 8120 | return img_format("LDC1X %s, %s(%s)", ft, rs, rt); |
89a955e8 AM |
8121 | } |
8122 | ||
8123 | ||
8124 | /* | |
8125 | * | |
8126 | * | |
8127 | * 3 2 1 | |
8128 | * 10987654321098765432109876543210 | |
8129 | * 001000 x1110000101 | |
8130 | * rt ----- | |
8131 | * rs ----- | |
8132 | * rd ----- | |
8133 | */ | |
7def8a4b | 8134 | static char *LDC2(uint64 instruction, Dis_info *info) |
89a955e8 | 8135 | { |
89a955e8 AM |
8136 | uint64 ct_value = extract_ct_25_24_23_22_21(instruction); |
8137 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
75199b40 | 8138 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 8139 | |
3f2aec07 | 8140 | const char *rs = GPR(rs_value, info); |
89a955e8 | 8141 | |
043dc73c ML |
8142 | return img_format("LDC2 CP%" PRIu64 ", %" PRId64 "(%s)", |
8143 | ct_value, s_value, rs); | |
89a955e8 AM |
8144 | } |
8145 | ||
8146 | ||
8147 | /* | |
8148 | * | |
8149 | * | |
8150 | * 3 2 1 | |
8151 | * 10987654321098765432109876543210 | |
8152 | * 001000 x1110000101 | |
8153 | * rt ----- | |
8154 | * rs ----- | |
8155 | * rd ----- | |
8156 | */ | |
7def8a4b | 8157 | static char *LDM(uint64 instruction, Dis_info *info) |
89a955e8 AM |
8158 | { |
8159 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 8160 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 AM |
8161 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
8162 | uint64 count3_value = extract_count3_14_13_12(instruction); | |
89a955e8 | 8163 | |
3f2aec07 ML |
8164 | const char *rt = GPR(rt_value, info); |
8165 | const char *rs = GPR(rs_value, info); | |
4066c152 | 8166 | uint64 count3 = encode_count3_from_count(count3_value); |
89a955e8 | 8167 | |
4066c152 ML |
8168 | return img_format("LDM %s, %" PRId64 "(%s), 0x%" PRIx64, |
8169 | rt, s_value, rs, count3); | |
89a955e8 AM |
8170 | } |
8171 | ||
8172 | ||
8173 | /* | |
8174 | * | |
8175 | * | |
8176 | * 3 2 1 | |
8177 | * 10987654321098765432109876543210 | |
8178 | * 001000 x1110000101 | |
8179 | * rt ----- | |
8180 | * rs ----- | |
8181 | * rd ----- | |
8182 | */ | |
7def8a4b | 8183 | static char *LDPC_48_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
8184 | { |
8185 | uint64 rt_value = extract_rt_41_40_39_38_37(instruction); | |
d3605cc0 | 8186 | int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction); |
89a955e8 | 8187 | |
3f2aec07 | 8188 | const char *rt = GPR(rt_value, info); |
22e7b52a | 8189 | g_autofree char *s = ADDRESS(s_value, 6, info); |
89a955e8 | 8190 | |
c5231692 | 8191 | return img_format("LDPC %s, %s", rt, s); |
89a955e8 AM |
8192 | } |
8193 | ||
8194 | ||
8195 | /* | |
8196 | * | |
8197 | * | |
8198 | * 3 2 1 | |
8199 | * 10987654321098765432109876543210 | |
8200 | * 001000 x1110000101 | |
8201 | * rt ----- | |
8202 | * rs ----- | |
8203 | * rd ----- | |
8204 | */ | |
7def8a4b | 8205 | static char *LDX(uint64 instruction, Dis_info *info) |
89a955e8 AM |
8206 | { |
8207 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 8208 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 8209 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 8210 | |
3f2aec07 ML |
8211 | const char *rd = GPR(rd_value, info); |
8212 | const char *rs = GPR(rs_value, info); | |
8213 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 8214 | |
c5231692 | 8215 | return img_format("LDX %s, %s(%s)", rd, rs, rt); |
89a955e8 AM |
8216 | } |
8217 | ||
8218 | ||
8219 | /* | |
8220 | * | |
8221 | * | |
8222 | * 3 2 1 | |
8223 | * 10987654321098765432109876543210 | |
8224 | * 001000 x1110000101 | |
8225 | * rt ----- | |
8226 | * rs ----- | |
8227 | * rd ----- | |
8228 | */ | |
7def8a4b | 8229 | static char *LDXS(uint64 instruction, Dis_info *info) |
89a955e8 AM |
8230 | { |
8231 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 8232 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 8233 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 8234 | |
3f2aec07 ML |
8235 | const char *rd = GPR(rd_value, info); |
8236 | const char *rs = GPR(rs_value, info); | |
8237 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 8238 | |
c5231692 | 8239 | return img_format("LDXS %s, %s(%s)", rd, rs, rt); |
89a955e8 AM |
8240 | } |
8241 | ||
8242 | ||
8243 | /* | |
8244 | * | |
8245 | * | |
8246 | * 3 2 1 | |
8247 | * 10987654321098765432109876543210 | |
8248 | * 001000 x1110000101 | |
8249 | * rt ----- | |
8250 | * rs ----- | |
8251 | * rd ----- | |
8252 | */ | |
7def8a4b | 8253 | static char *LH_16_(uint64 instruction, Dis_info *info) |
89a955e8 | 8254 | { |
89a955e8 AM |
8255 | uint64 rt3_value = extract_rt3_9_8_7(instruction); |
8256 | uint64 rs3_value = extract_rs3_6_5_4(instruction); | |
75199b40 | 8257 | uint64 u_value = extract_u_2_1__s1(instruction); |
89a955e8 | 8258 | |
3f2aec07 ML |
8259 | const char *rt3 = GPR(decode_gpr_gpr3(rt3_value, info), info); |
8260 | const char *rs3 = GPR(decode_gpr_gpr3(rs3_value, info), info); | |
89a955e8 | 8261 | |
4066c152 | 8262 | return img_format("LH %s, 0x%" PRIx64 "(%s)", rt3, u_value, rs3); |
89a955e8 AM |
8263 | } |
8264 | ||
8265 | ||
8266 | /* | |
8267 | * | |
8268 | * | |
8269 | * 3 2 1 | |
8270 | * 10987654321098765432109876543210 | |
8271 | * 001000 x1110000101 | |
8272 | * rt ----- | |
8273 | * rs ----- | |
8274 | * rd ----- | |
8275 | */ | |
7def8a4b | 8276 | static char *LH_GP_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
8277 | { |
8278 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
11b9732a | 8279 | uint64 u_value = extract_u_17_to_1__s1(instruction); |
89a955e8 | 8280 | |
3f2aec07 | 8281 | const char *rt = GPR(rt_value, info); |
89a955e8 | 8282 | |
4066c152 | 8283 | return img_format("LH %s, 0x%" PRIx64 "($%d)", rt, u_value, 28); |
89a955e8 AM |
8284 | } |
8285 | ||
8286 | ||
8287 | /* | |
8288 | * | |
8289 | * | |
8290 | * 3 2 1 | |
8291 | * 10987654321098765432109876543210 | |
8292 | * 001000 x1110000101 | |
8293 | * rt ----- | |
8294 | * rs ----- | |
8295 | * rd ----- | |
8296 | */ | |
7def8a4b | 8297 | static char *LH_S9_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
8298 | { |
8299 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 8300 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 8301 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 8302 | |
3f2aec07 ML |
8303 | const char *rt = GPR(rt_value, info); |
8304 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 8305 | |
4066c152 | 8306 | return img_format("LH %s, %" PRId64 "(%s)", rt, s_value, rs); |
89a955e8 AM |
8307 | } |
8308 | ||
8309 | ||
8310 | /* | |
8311 | * | |
8312 | * | |
8313 | * 3 2 1 | |
8314 | * 10987654321098765432109876543210 | |
8315 | * 001000 x1110000101 | |
8316 | * rt ----- | |
8317 | * rs ----- | |
8318 | * rd ----- | |
8319 | */ | |
7def8a4b | 8320 | static char *LH_U12_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
8321 | { |
8322 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 8323 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 8324 | uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 8325 | |
3f2aec07 ML |
8326 | const char *rt = GPR(rt_value, info); |
8327 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 8328 | |
4066c152 | 8329 | return img_format("LH %s, 0x%" PRIx64 "(%s)", rt, u_value, rs); |
89a955e8 AM |
8330 | } |
8331 | ||
8332 | ||
8333 | /* | |
8334 | * | |
8335 | * | |
8336 | * 3 2 1 | |
8337 | * 10987654321098765432109876543210 | |
8338 | * 001000 x1110000101 | |
8339 | * rt ----- | |
8340 | * rs ----- | |
8341 | * rd ----- | |
8342 | */ | |
7def8a4b | 8343 | static char *LHE(uint64 instruction, Dis_info *info) |
89a955e8 AM |
8344 | { |
8345 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 8346 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 8347 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 8348 | |
3f2aec07 ML |
8349 | const char *rt = GPR(rt_value, info); |
8350 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 8351 | |
4066c152 | 8352 | return img_format("LHE %s, %" PRId64 "(%s)", rt, s_value, rs); |
89a955e8 AM |
8353 | } |
8354 | ||
8355 | ||
8356 | /* | |
8357 | * | |
8358 | * | |
8359 | * 3 2 1 | |
8360 | * 10987654321098765432109876543210 | |
8361 | * 001000 x1110000101 | |
8362 | * rt ----- | |
8363 | * rs ----- | |
8364 | * rd ----- | |
8365 | */ | |
7def8a4b | 8366 | static char *LHU_16_(uint64 instruction, Dis_info *info) |
89a955e8 | 8367 | { |
89a955e8 AM |
8368 | uint64 rt3_value = extract_rt3_9_8_7(instruction); |
8369 | uint64 rs3_value = extract_rs3_6_5_4(instruction); | |
75199b40 | 8370 | uint64 u_value = extract_u_2_1__s1(instruction); |
89a955e8 | 8371 | |
3f2aec07 ML |
8372 | const char *rt3 = GPR(decode_gpr_gpr3(rt3_value, info), info); |
8373 | const char *rs3 = GPR(decode_gpr_gpr3(rs3_value, info), info); | |
89a955e8 | 8374 | |
4066c152 | 8375 | return img_format("LHU %s, 0x%" PRIx64 "(%s)", rt3, u_value, rs3); |
89a955e8 AM |
8376 | } |
8377 | ||
8378 | ||
8379 | /* | |
8380 | * | |
8381 | * | |
8382 | * 3 2 1 | |
8383 | * 10987654321098765432109876543210 | |
8384 | * 001000 x1110000101 | |
8385 | * rt ----- | |
8386 | * rs ----- | |
8387 | * rd ----- | |
8388 | */ | |
7def8a4b | 8389 | static char *LHU_GP_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
8390 | { |
8391 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
11b9732a | 8392 | uint64 u_value = extract_u_17_to_1__s1(instruction); |
89a955e8 | 8393 | |
3f2aec07 | 8394 | const char *rt = GPR(rt_value, info); |
89a955e8 | 8395 | |
4066c152 | 8396 | return img_format("LHU %s, 0x%" PRIx64 "($%d)", rt, u_value, 28); |
89a955e8 AM |
8397 | } |
8398 | ||
8399 | ||
8400 | /* | |
8401 | * | |
8402 | * | |
8403 | * 3 2 1 | |
8404 | * 10987654321098765432109876543210 | |
8405 | * 001000 x1110000101 | |
8406 | * rt ----- | |
8407 | * rs ----- | |
8408 | * rd ----- | |
8409 | */ | |
7def8a4b | 8410 | static char *LHU_S9_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
8411 | { |
8412 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 8413 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 8414 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 8415 | |
3f2aec07 ML |
8416 | const char *rt = GPR(rt_value, info); |
8417 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 8418 | |
4066c152 | 8419 | return img_format("LHU %s, %" PRId64 "(%s)", rt, s_value, rs); |
89a955e8 AM |
8420 | } |
8421 | ||
8422 | ||
8423 | /* | |
8424 | * | |
8425 | * | |
8426 | * 3 2 1 | |
8427 | * 10987654321098765432109876543210 | |
8428 | * 001000 x1110000101 | |
8429 | * rt ----- | |
8430 | * rs ----- | |
8431 | * rd ----- | |
8432 | */ | |
7def8a4b | 8433 | static char *LHU_U12_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
8434 | { |
8435 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 8436 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 8437 | uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 8438 | |
3f2aec07 ML |
8439 | const char *rt = GPR(rt_value, info); |
8440 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 8441 | |
4066c152 | 8442 | return img_format("LHU %s, 0x%" PRIx64 "(%s)", rt, u_value, rs); |
89a955e8 AM |
8443 | } |
8444 | ||
8445 | ||
8446 | /* | |
8447 | * | |
8448 | * | |
8449 | * 3 2 1 | |
8450 | * 10987654321098765432109876543210 | |
8451 | * 001000 x1110000101 | |
8452 | * rt ----- | |
8453 | * rs ----- | |
8454 | * rd ----- | |
8455 | */ | |
7def8a4b | 8456 | static char *LHUE(uint64 instruction, Dis_info *info) |
89a955e8 AM |
8457 | { |
8458 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 8459 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 8460 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 8461 | |
3f2aec07 ML |
8462 | const char *rt = GPR(rt_value, info); |
8463 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 8464 | |
4066c152 | 8465 | return img_format("LHUE %s, %" PRId64 "(%s)", rt, s_value, rs); |
89a955e8 AM |
8466 | } |
8467 | ||
8468 | ||
8469 | /* | |
8470 | * | |
8471 | * | |
8472 | * 3 2 1 | |
8473 | * 10987654321098765432109876543210 | |
8474 | * 001000 x1110000101 | |
8475 | * rt ----- | |
8476 | * rs ----- | |
8477 | * rd ----- | |
8478 | */ | |
7def8a4b | 8479 | static char *LHUX(uint64 instruction, Dis_info *info) |
89a955e8 AM |
8480 | { |
8481 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 8482 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 8483 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 8484 | |
3f2aec07 ML |
8485 | const char *rd = GPR(rd_value, info); |
8486 | const char *rs = GPR(rs_value, info); | |
8487 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 8488 | |
c5231692 | 8489 | return img_format("LHUX %s, %s(%s)", rd, rs, rt); |
89a955e8 AM |
8490 | } |
8491 | ||
8492 | ||
8493 | /* | |
8494 | * | |
8495 | * | |
8496 | * 3 2 1 | |
8497 | * 10987654321098765432109876543210 | |
8498 | * 001000 x1110000101 | |
8499 | * rt ----- | |
8500 | * rs ----- | |
8501 | * rd ----- | |
8502 | */ | |
7def8a4b | 8503 | static char *LHUXS(uint64 instruction, Dis_info *info) |
89a955e8 AM |
8504 | { |
8505 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 8506 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 8507 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 8508 | |
3f2aec07 ML |
8509 | const char *rd = GPR(rd_value, info); |
8510 | const char *rs = GPR(rs_value, info); | |
8511 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 8512 | |
c5231692 | 8513 | return img_format("LHUXS %s, %s(%s)", rd, rs, rt); |
89a955e8 AM |
8514 | } |
8515 | ||
8516 | ||
8517 | /* | |
8518 | * | |
8519 | * | |
8520 | * 3 2 1 | |
8521 | * 10987654321098765432109876543210 | |
8522 | * 001000 x1110000101 | |
8523 | * rt ----- | |
8524 | * rs ----- | |
8525 | * rd ----- | |
8526 | */ | |
7def8a4b | 8527 | static char *LHXS(uint64 instruction, Dis_info *info) |
89a955e8 AM |
8528 | { |
8529 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 8530 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 8531 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 8532 | |
3f2aec07 ML |
8533 | const char *rd = GPR(rd_value, info); |
8534 | const char *rs = GPR(rs_value, info); | |
8535 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 8536 | |
c5231692 | 8537 | return img_format("LHXS %s, %s(%s)", rd, rs, rt); |
89a955e8 AM |
8538 | } |
8539 | ||
8540 | ||
8541 | /* | |
8542 | * | |
8543 | * | |
8544 | * 3 2 1 | |
8545 | * 10987654321098765432109876543210 | |
8546 | * 001000 x1110000101 | |
8547 | * rt ----- | |
8548 | * rs ----- | |
8549 | * rd ----- | |
8550 | */ | |
7def8a4b | 8551 | static char *LHX(uint64 instruction, Dis_info *info) |
89a955e8 AM |
8552 | { |
8553 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 8554 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 8555 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 8556 | |
3f2aec07 ML |
8557 | const char *rd = GPR(rd_value, info); |
8558 | const char *rs = GPR(rs_value, info); | |
8559 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 8560 | |
c5231692 | 8561 | return img_format("LHX %s, %s(%s)", rd, rs, rt); |
89a955e8 AM |
8562 | } |
8563 | ||
8564 | ||
8565 | /* | |
8566 | * | |
8567 | * | |
8568 | * 3 2 1 | |
8569 | * 10987654321098765432109876543210 | |
8570 | * 001000 x1110000101 | |
8571 | * rt ----- | |
8572 | * rs ----- | |
8573 | * rd ----- | |
8574 | */ | |
7def8a4b | 8575 | static char *LI_16_(uint64 instruction, Dis_info *info) |
89a955e8 | 8576 | { |
89a955e8 | 8577 | uint64 rt3_value = extract_rt3_9_8_7(instruction); |
75199b40 | 8578 | uint64 eu_value = extract_eu_6_5_4_3_2_1_0(instruction); |
89a955e8 | 8579 | |
3f2aec07 | 8580 | const char *rt3 = GPR(decode_gpr_gpr3(rt3_value, info), info); |
4066c152 | 8581 | int64 eu = encode_eu_from_s_li16(eu_value); |
89a955e8 | 8582 | |
4066c152 | 8583 | return img_format("LI %s, %" PRId64, rt3, eu); |
89a955e8 AM |
8584 | } |
8585 | ||
8586 | ||
8587 | /* | |
8588 | * | |
8589 | * | |
8590 | * 3 2 1 | |
8591 | * 10987654321098765432109876543210 | |
8592 | * 001000 x1110000101 | |
8593 | * rt ----- | |
8594 | * rs ----- | |
8595 | * rd ----- | |
8596 | */ | |
7def8a4b | 8597 | static char *LI_48_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
8598 | { |
8599 | uint64 rt_value = extract_rt_41_40_39_38_37(instruction); | |
d3605cc0 | 8600 | int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction); |
89a955e8 | 8601 | |
3f2aec07 | 8602 | const char *rt = GPR(rt_value, info); |
89a955e8 | 8603 | |
4066c152 | 8604 | return img_format("LI %s, %" PRId64, rt, s_value); |
89a955e8 AM |
8605 | } |
8606 | ||
8607 | ||
8608 | /* | |
8609 | * | |
8610 | * | |
8611 | * 3 2 1 | |
8612 | * 10987654321098765432109876543210 | |
8613 | * 001000 x1110000101 | |
8614 | * rt ----- | |
8615 | * rs ----- | |
8616 | * rd ----- | |
8617 | */ | |
7def8a4b | 8618 | static char *LL(uint64 instruction, Dis_info *info) |
89a955e8 AM |
8619 | { |
8620 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 8621 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 8622 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_s2(instruction); |
89a955e8 | 8623 | |
3f2aec07 ML |
8624 | const char *rt = GPR(rt_value, info); |
8625 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 8626 | |
4066c152 | 8627 | return img_format("LL %s, %" PRId64 "(%s)", rt, s_value, rs); |
89a955e8 AM |
8628 | } |
8629 | ||
8630 | ||
8631 | /* | |
8632 | * | |
8633 | * | |
8634 | * 3 2 1 | |
8635 | * 10987654321098765432109876543210 | |
8636 | * 001000 x1110000101 | |
8637 | * rt ----- | |
8638 | * rs ----- | |
8639 | * rd ----- | |
8640 | */ | |
7def8a4b | 8641 | static char *LLD(uint64 instruction, Dis_info *info) |
89a955e8 AM |
8642 | { |
8643 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 8644 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 8645 | int64 s_value = extract_s__se8_15_7_6_5_4_3_s3(instruction); |
89a955e8 | 8646 | |
3f2aec07 ML |
8647 | const char *rt = GPR(rt_value, info); |
8648 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 8649 | |
4066c152 | 8650 | return img_format("LLD %s, %" PRId64 "(%s)", rt, s_value, rs); |
89a955e8 AM |
8651 | } |
8652 | ||
8653 | ||
8654 | /* | |
8655 | * | |
8656 | * | |
8657 | * 3 2 1 | |
8658 | * 10987654321098765432109876543210 | |
8659 | * 001000 x1110000101 | |
8660 | * rt ----- | |
8661 | * rs ----- | |
8662 | * rd ----- | |
8663 | */ | |
7def8a4b | 8664 | static char *LLDP(uint64 instruction, Dis_info *info) |
89a955e8 AM |
8665 | { |
8666 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 8667 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 8668 | uint64 ru_value = extract_ru_7_6_5_4_3(instruction); |
89a955e8 | 8669 | |
3f2aec07 ML |
8670 | const char *rt = GPR(rt_value, info); |
8671 | const char *ru = GPR(ru_value, info); | |
8672 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 8673 | |
c5231692 | 8674 | return img_format("LLDP %s, %s, (%s)", rt, ru, rs); |
89a955e8 AM |
8675 | } |
8676 | ||
8677 | ||
8678 | /* | |
8679 | * | |
8680 | * | |
8681 | * 3 2 1 | |
8682 | * 10987654321098765432109876543210 | |
8683 | * 001000 x1110000101 | |
8684 | * rt ----- | |
8685 | * rs ----- | |
8686 | * rd ----- | |
8687 | */ | |
7def8a4b | 8688 | static char *LLE(uint64 instruction, Dis_info *info) |
89a955e8 AM |
8689 | { |
8690 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 8691 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 8692 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_s2(instruction); |
89a955e8 | 8693 | |
3f2aec07 ML |
8694 | const char *rt = GPR(rt_value, info); |
8695 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 8696 | |
4066c152 | 8697 | return img_format("LLE %s, %" PRId64 "(%s)", rt, s_value, rs); |
89a955e8 AM |
8698 | } |
8699 | ||
8700 | ||
8701 | /* | |
8702 | * | |
8703 | * | |
8704 | * 3 2 1 | |
8705 | * 10987654321098765432109876543210 | |
8706 | * 001000 x1110000101 | |
8707 | * rt ----- | |
8708 | * rs ----- | |
8709 | * rd ----- | |
8710 | */ | |
7def8a4b | 8711 | static char *LLWP(uint64 instruction, Dis_info *info) |
89a955e8 AM |
8712 | { |
8713 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 8714 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 8715 | uint64 ru_value = extract_ru_7_6_5_4_3(instruction); |
89a955e8 | 8716 | |
3f2aec07 ML |
8717 | const char *rt = GPR(rt_value, info); |
8718 | const char *ru = GPR(ru_value, info); | |
8719 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 8720 | |
c5231692 | 8721 | return img_format("LLWP %s, %s, (%s)", rt, ru, rs); |
89a955e8 AM |
8722 | } |
8723 | ||
8724 | ||
8725 | /* | |
8726 | * | |
8727 | * | |
8728 | * 3 2 1 | |
8729 | * 10987654321098765432109876543210 | |
8730 | * 001000 x1110000101 | |
8731 | * rt ----- | |
8732 | * rs ----- | |
8733 | * rd ----- | |
8734 | */ | |
7def8a4b | 8735 | static char *LLWPE(uint64 instruction, Dis_info *info) |
89a955e8 AM |
8736 | { |
8737 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 8738 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 8739 | uint64 ru_value = extract_ru_7_6_5_4_3(instruction); |
89a955e8 | 8740 | |
3f2aec07 ML |
8741 | const char *rt = GPR(rt_value, info); |
8742 | const char *ru = GPR(ru_value, info); | |
8743 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 8744 | |
c5231692 | 8745 | return img_format("LLWPE %s, %s, (%s)", rt, ru, rs); |
89a955e8 AM |
8746 | } |
8747 | ||
8748 | ||
8749 | /* | |
8750 | * | |
8751 | * | |
8752 | * 3 2 1 | |
8753 | * 10987654321098765432109876543210 | |
8754 | * 001000 x1110000101 | |
8755 | * rt ----- | |
8756 | * rs ----- | |
8757 | * rd ----- | |
8758 | */ | |
7def8a4b | 8759 | static char *LSA(uint64 instruction, Dis_info *info) |
89a955e8 AM |
8760 | { |
8761 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
75199b40 | 8762 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
b4c5d21c | 8763 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 8764 | uint64 u2_value = extract_u2_10_9(instruction); |
89a955e8 | 8765 | |
3f2aec07 ML |
8766 | const char *rd = GPR(rd_value, info); |
8767 | const char *rs = GPR(rs_value, info); | |
8768 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 8769 | |
4066c152 | 8770 | return img_format("LSA %s, %s, %s, 0x%" PRIx64, rd, rs, rt, u2_value); |
89a955e8 AM |
8771 | } |
8772 | ||
8773 | ||
8774 | /* | |
8775 | * | |
8776 | * | |
8777 | * 3 2 1 | |
8778 | * 10987654321098765432109876543210 | |
8779 | * 001000 x1110000101 | |
8780 | * rt ----- | |
8781 | * rs ----- | |
8782 | * rd ----- | |
8783 | */ | |
7def8a4b | 8784 | static char *LUI(uint64 instruction, Dis_info *info) |
89a955e8 AM |
8785 | { |
8786 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
d3605cc0 | 8787 | int64 s_value = extract_s__se31_0_11_to_2_20_to_12_s12(instruction); |
89a955e8 | 8788 | |
3f2aec07 | 8789 | const char *rt = GPR(rt_value, info); |
89a955e8 | 8790 | |
4066c152 | 8791 | return img_format("LUI %s, %%hi(%" PRId64 ")", rt, s_value); |
89a955e8 AM |
8792 | } |
8793 | ||
8794 | ||
8795 | /* | |
8796 | * | |
8797 | * | |
8798 | * 3 2 1 | |
8799 | * 10987654321098765432109876543210 | |
8800 | * 001000 x1110000101 | |
8801 | * rt ----- | |
8802 | * rs ----- | |
8803 | * rd ----- | |
8804 | */ | |
7def8a4b | 8805 | static char *LW_16_(uint64 instruction, Dis_info *info) |
89a955e8 | 8806 | { |
89a955e8 AM |
8807 | uint64 rt3_value = extract_rt3_9_8_7(instruction); |
8808 | uint64 rs3_value = extract_rs3_6_5_4(instruction); | |
75199b40 | 8809 | uint64 u_value = extract_u_3_2_1_0__s2(instruction); |
89a955e8 | 8810 | |
3f2aec07 ML |
8811 | const char *rt3 = GPR(decode_gpr_gpr3(rt3_value, info), info); |
8812 | const char *rs3 = GPR(decode_gpr_gpr3(rs3_value, info), info); | |
89a955e8 | 8813 | |
4066c152 | 8814 | return img_format("LW %s, 0x%" PRIx64 "(%s)", rt3, u_value, rs3); |
89a955e8 AM |
8815 | } |
8816 | ||
8817 | ||
8818 | /* | |
8819 | * | |
8820 | * | |
8821 | * 3 2 1 | |
8822 | * 10987654321098765432109876543210 | |
8823 | * 001000 x1110000101 | |
8824 | * rt ----- | |
8825 | * rs ----- | |
8826 | * rd ----- | |
8827 | */ | |
7def8a4b | 8828 | static char *LW_4X4_(uint64 instruction, Dis_info *info) |
89a955e8 | 8829 | { |
89a955e8 | 8830 | uint64 rt4_value = extract_rt4_9_7_6_5(instruction); |
75199b40 | 8831 | uint64 rs4_value = extract_rs4_4_2_1_0(instruction); |
11b9732a | 8832 | uint64 u_value = extract_u_3_8__s2(instruction); |
89a955e8 | 8833 | |
3f2aec07 ML |
8834 | const char *rt4 = GPR(decode_gpr_gpr4(rt4_value, info), info); |
8835 | const char *rs4 = GPR(decode_gpr_gpr4(rs4_value, info), info); | |
89a955e8 | 8836 | |
4066c152 | 8837 | return img_format("LW %s, 0x%" PRIx64 "(%s)", rt4, u_value, rs4); |
89a955e8 AM |
8838 | } |
8839 | ||
8840 | ||
8841 | /* | |
8842 | * | |
8843 | * | |
8844 | * 3 2 1 | |
8845 | * 10987654321098765432109876543210 | |
8846 | * 001000 x1110000101 | |
8847 | * rt ----- | |
8848 | * rs ----- | |
8849 | * rd ----- | |
8850 | */ | |
7def8a4b | 8851 | static char *LW_GP_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
8852 | { |
8853 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
11b9732a | 8854 | uint64 u_value = extract_u_20_to_2__s2(instruction); |
89a955e8 | 8855 | |
3f2aec07 | 8856 | const char *rt = GPR(rt_value, info); |
89a955e8 | 8857 | |
4066c152 | 8858 | return img_format("LW %s, 0x%" PRIx64 "($%d)", rt, u_value, 28); |
89a955e8 AM |
8859 | } |
8860 | ||
8861 | ||
8862 | /* | |
8863 | * | |
8864 | * | |
8865 | * 3 2 1 | |
8866 | * 10987654321098765432109876543210 | |
8867 | * 001000 x1110000101 | |
8868 | * rt ----- | |
8869 | * rs ----- | |
8870 | * rd ----- | |
8871 | */ | |
7def8a4b | 8872 | static char *LW_GP16_(uint64 instruction, Dis_info *info) |
89a955e8 | 8873 | { |
89a955e8 | 8874 | uint64 rt3_value = extract_rt3_9_8_7(instruction); |
75199b40 | 8875 | uint64 u_value = extract_u_6_5_4_3_2_1_0__s2(instruction); |
89a955e8 | 8876 | |
3f2aec07 | 8877 | const char *rt3 = GPR(decode_gpr_gpr3(rt3_value, info), info); |
89a955e8 | 8878 | |
4066c152 | 8879 | return img_format("LW %s, 0x%" PRIx64 "($%d)", rt3, u_value, 28); |
89a955e8 AM |
8880 | } |
8881 | ||
8882 | ||
8883 | /* | |
8884 | * | |
8885 | * | |
8886 | * 3 2 1 | |
8887 | * 10987654321098765432109876543210 | |
8888 | * 001000 x1110000101 | |
8889 | * rt ----- | |
8890 | * rs ----- | |
8891 | * rd ----- | |
8892 | */ | |
7def8a4b | 8893 | static char *LW_S9_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
8894 | { |
8895 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 8896 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 8897 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 8898 | |
3f2aec07 ML |
8899 | const char *rt = GPR(rt_value, info); |
8900 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 8901 | |
4066c152 | 8902 | return img_format("LW %s, %" PRId64 "(%s)", rt, s_value, rs); |
89a955e8 AM |
8903 | } |
8904 | ||
8905 | ||
8906 | /* | |
8907 | * | |
8908 | * | |
8909 | * 3 2 1 | |
8910 | * 10987654321098765432109876543210 | |
8911 | * 001000 x1110000101 | |
8912 | * rt ----- | |
8913 | * rs ----- | |
8914 | * rd ----- | |
8915 | */ | |
7def8a4b | 8916 | static char *LW_SP_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
8917 | { |
8918 | uint64 rt_value = extract_rt_9_8_7_6_5(instruction); | |
11b9732a | 8919 | uint64 u_value = extract_u_4_3_2_1_0__s2(instruction); |
89a955e8 | 8920 | |
3f2aec07 | 8921 | const char *rt = GPR(rt_value, info); |
89a955e8 | 8922 | |
4066c152 | 8923 | return img_format("LW %s, 0x%" PRIx64 "($%d)", rt, u_value, 29); |
89a955e8 AM |
8924 | } |
8925 | ||
8926 | ||
8927 | /* | |
8928 | * | |
8929 | * | |
8930 | * 3 2 1 | |
8931 | * 10987654321098765432109876543210 | |
8932 | * 001000 x1110000101 | |
8933 | * rt ----- | |
8934 | * rs ----- | |
8935 | * rd ----- | |
8936 | */ | |
7def8a4b | 8937 | static char *LW_U12_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
8938 | { |
8939 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 8940 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 8941 | uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 8942 | |
3f2aec07 ML |
8943 | const char *rt = GPR(rt_value, info); |
8944 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 8945 | |
4066c152 | 8946 | return img_format("LW %s, 0x%" PRIx64 "(%s)", rt, u_value, rs); |
89a955e8 AM |
8947 | } |
8948 | ||
8949 | ||
8950 | /* | |
8951 | * | |
8952 | * | |
8953 | * 3 2 1 | |
8954 | * 10987654321098765432109876543210 | |
8955 | * 001000 x1110000101 | |
8956 | * rt ----- | |
8957 | * rs ----- | |
8958 | * rd ----- | |
8959 | */ | |
7def8a4b | 8960 | static char *LWC1_GP_(uint64 instruction, Dis_info *info) |
89a955e8 | 8961 | { |
17ce2f00 | 8962 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
11b9732a | 8963 | uint64 u_value = extract_u_17_to_2__s2(instruction); |
89a955e8 | 8964 | |
3f2aec07 | 8965 | const char *ft = FPR(ft_value, info); |
89a955e8 | 8966 | |
4066c152 | 8967 | return img_format("LWC1 %s, 0x%" PRIx64 "($%d)", ft, u_value, 28); |
89a955e8 AM |
8968 | } |
8969 | ||
8970 | ||
8971 | /* | |
8972 | * | |
8973 | * | |
8974 | * 3 2 1 | |
8975 | * 10987654321098765432109876543210 | |
8976 | * 001000 x1110000101 | |
8977 | * rt ----- | |
8978 | * rs ----- | |
8979 | * rd ----- | |
8980 | */ | |
7def8a4b | 8981 | static char *LWC1_S9_(uint64 instruction, Dis_info *info) |
89a955e8 | 8982 | { |
17ce2f00 | 8983 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
89a955e8 | 8984 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 8985 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 8986 | |
3f2aec07 ML |
8987 | const char *ft = FPR(ft_value, info); |
8988 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 8989 | |
4066c152 | 8990 | return img_format("LWC1 %s, %" PRId64 "(%s)", ft, s_value, rs); |
89a955e8 AM |
8991 | } |
8992 | ||
8993 | ||
8994 | /* | |
8995 | * | |
8996 | * | |
8997 | * 3 2 1 | |
8998 | * 10987654321098765432109876543210 | |
8999 | * 001000 x1110000101 | |
9000 | * rt ----- | |
9001 | * rs ----- | |
9002 | * rd ----- | |
9003 | */ | |
7def8a4b | 9004 | static char *LWC1_U12_(uint64 instruction, Dis_info *info) |
89a955e8 | 9005 | { |
17ce2f00 | 9006 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
89a955e8 | 9007 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 9008 | uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 9009 | |
3f2aec07 ML |
9010 | const char *ft = FPR(ft_value, info); |
9011 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 9012 | |
4066c152 | 9013 | return img_format("LWC1 %s, 0x%" PRIx64 "(%s)", ft, u_value, rs); |
89a955e8 AM |
9014 | } |
9015 | ||
9016 | ||
9017 | /* | |
9018 | * | |
9019 | * | |
9020 | * 3 2 1 | |
9021 | * 10987654321098765432109876543210 | |
9022 | * 001000 x1110000101 | |
9023 | * rt ----- | |
9024 | * rs ----- | |
9025 | * rd ----- | |
9026 | */ | |
7def8a4b | 9027 | static char *LWC1X(uint64 instruction, Dis_info *info) |
89a955e8 AM |
9028 | { |
9029 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 9030 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 9031 | uint64 ft_value = extract_ft_15_14_13_12_11(instruction); |
89a955e8 | 9032 | |
3f2aec07 ML |
9033 | const char *ft = FPR(ft_value, info); |
9034 | const char *rs = GPR(rs_value, info); | |
9035 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 9036 | |
c5231692 | 9037 | return img_format("LWC1X %s, %s(%s)", ft, rs, rt); |
89a955e8 AM |
9038 | } |
9039 | ||
9040 | ||
9041 | /* | |
9042 | * | |
9043 | * | |
9044 | * 3 2 1 | |
9045 | * 10987654321098765432109876543210 | |
9046 | * 001000 x1110000101 | |
9047 | * rt ----- | |
9048 | * rs ----- | |
9049 | * rd ----- | |
9050 | */ | |
7def8a4b | 9051 | static char *LWC1XS(uint64 instruction, Dis_info *info) |
89a955e8 AM |
9052 | { |
9053 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 9054 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 9055 | uint64 ft_value = extract_ft_15_14_13_12_11(instruction); |
89a955e8 | 9056 | |
3f2aec07 ML |
9057 | const char *ft = FPR(ft_value, info); |
9058 | const char *rs = GPR(rs_value, info); | |
9059 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 9060 | |
c5231692 | 9061 | return img_format("LWC1XS %s, %s(%s)", ft, rs, rt); |
89a955e8 AM |
9062 | } |
9063 | ||
9064 | ||
9065 | /* | |
9066 | * | |
9067 | * | |
9068 | * 3 2 1 | |
9069 | * 10987654321098765432109876543210 | |
9070 | * 001000 x1110000101 | |
9071 | * rt ----- | |
9072 | * rs ----- | |
9073 | * rd ----- | |
9074 | */ | |
7def8a4b | 9075 | static char *LWC2(uint64 instruction, Dis_info *info) |
89a955e8 | 9076 | { |
89a955e8 AM |
9077 | uint64 ct_value = extract_ct_25_24_23_22_21(instruction); |
9078 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
75199b40 | 9079 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 9080 | |
3f2aec07 | 9081 | const char *rs = GPR(rs_value, info); |
89a955e8 | 9082 | |
043dc73c ML |
9083 | return img_format("LWC2 CP%" PRIu64 ", %" PRId64 "(%s)", |
9084 | ct_value, s_value, rs); | |
89a955e8 AM |
9085 | } |
9086 | ||
9087 | ||
9088 | /* | |
9089 | * | |
9090 | * | |
9091 | * 3 2 1 | |
9092 | * 10987654321098765432109876543210 | |
9093 | * 001000 x1110000101 | |
9094 | * rt ----- | |
9095 | * rs ----- | |
9096 | * rd ----- | |
9097 | */ | |
7def8a4b | 9098 | static char *LWE(uint64 instruction, Dis_info *info) |
89a955e8 AM |
9099 | { |
9100 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 9101 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 9102 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 9103 | |
3f2aec07 ML |
9104 | const char *rt = GPR(rt_value, info); |
9105 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 9106 | |
4066c152 | 9107 | return img_format("LWE %s, %" PRId64 "(%s)", rt, s_value, rs); |
89a955e8 AM |
9108 | } |
9109 | ||
9110 | ||
9111 | /* | |
9112 | * | |
9113 | * | |
9114 | * 3 2 1 | |
9115 | * 10987654321098765432109876543210 | |
9116 | * 001000 x1110000101 | |
9117 | * rt ----- | |
9118 | * rs ----- | |
9119 | * rd ----- | |
9120 | */ | |
7def8a4b | 9121 | static char *LWM(uint64 instruction, Dis_info *info) |
89a955e8 AM |
9122 | { |
9123 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 9124 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 AM |
9125 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
9126 | uint64 count3_value = extract_count3_14_13_12(instruction); | |
89a955e8 | 9127 | |
3f2aec07 ML |
9128 | const char *rt = GPR(rt_value, info); |
9129 | const char *rs = GPR(rs_value, info); | |
4066c152 | 9130 | uint64 count3 = encode_count3_from_count(count3_value); |
89a955e8 | 9131 | |
4066c152 ML |
9132 | return img_format("LWM %s, %" PRId64 "(%s), 0x%" PRIx64, |
9133 | rt, s_value, rs, count3); | |
89a955e8 AM |
9134 | } |
9135 | ||
9136 | ||
9137 | /* | |
9138 | * | |
9139 | * | |
9140 | * 3 2 1 | |
9141 | * 10987654321098765432109876543210 | |
9142 | * 001000 x1110000101 | |
9143 | * rt ----- | |
9144 | * rs ----- | |
9145 | * rd ----- | |
9146 | */ | |
7def8a4b | 9147 | static char *LWPC_48_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
9148 | { |
9149 | uint64 rt_value = extract_rt_41_40_39_38_37(instruction); | |
d3605cc0 | 9150 | int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction); |
89a955e8 | 9151 | |
3f2aec07 | 9152 | const char *rt = GPR(rt_value, info); |
22e7b52a | 9153 | g_autofree char *s = ADDRESS(s_value, 6, info); |
89a955e8 | 9154 | |
c5231692 | 9155 | return img_format("LWPC %s, %s", rt, s); |
89a955e8 AM |
9156 | } |
9157 | ||
9158 | ||
9159 | /* | |
9160 | * | |
9161 | * | |
9162 | * 3 2 1 | |
9163 | * 10987654321098765432109876543210 | |
9164 | * 001000 x1110000101 | |
9165 | * rt ----- | |
9166 | * rs ----- | |
9167 | * rd ----- | |
9168 | */ | |
7def8a4b | 9169 | static char *LWU_GP_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
9170 | { |
9171 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
11b9732a | 9172 | uint64 u_value = extract_u_17_to_2__s2(instruction); |
89a955e8 | 9173 | |
3f2aec07 | 9174 | const char *rt = GPR(rt_value, info); |
89a955e8 | 9175 | |
4066c152 | 9176 | return img_format("LWU %s, 0x%" PRIx64 "($%d)", rt, u_value, 28); |
89a955e8 AM |
9177 | } |
9178 | ||
9179 | ||
9180 | /* | |
9181 | * | |
9182 | * | |
9183 | * 3 2 1 | |
9184 | * 10987654321098765432109876543210 | |
9185 | * 001000 x1110000101 | |
9186 | * rt ----- | |
9187 | * rs ----- | |
9188 | * rd ----- | |
9189 | */ | |
7def8a4b | 9190 | static char *LWU_S9_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
9191 | { |
9192 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 9193 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 9194 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 9195 | |
3f2aec07 ML |
9196 | const char *rt = GPR(rt_value, info); |
9197 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 9198 | |
4066c152 | 9199 | return img_format("LWU %s, %" PRId64 "(%s)", rt, s_value, rs); |
89a955e8 AM |
9200 | } |
9201 | ||
9202 | ||
9203 | /* | |
9204 | * | |
9205 | * | |
9206 | * 3 2 1 | |
9207 | * 10987654321098765432109876543210 | |
9208 | * 001000 x1110000101 | |
9209 | * rt ----- | |
9210 | * rs ----- | |
9211 | * rd ----- | |
9212 | */ | |
7def8a4b | 9213 | static char *LWU_U12_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
9214 | { |
9215 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 9216 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 9217 | uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 9218 | |
3f2aec07 ML |
9219 | const char *rt = GPR(rt_value, info); |
9220 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 9221 | |
4066c152 | 9222 | return img_format("LWU %s, 0x%" PRIx64 "(%s)", rt, u_value, rs); |
89a955e8 AM |
9223 | } |
9224 | ||
9225 | ||
9226 | /* | |
9227 | * | |
9228 | * | |
9229 | * 3 2 1 | |
9230 | * 10987654321098765432109876543210 | |
9231 | * 001000 x1110000101 | |
9232 | * rt ----- | |
9233 | * rs ----- | |
9234 | * rd ----- | |
9235 | */ | |
7def8a4b | 9236 | static char *LWUX(uint64 instruction, Dis_info *info) |
89a955e8 AM |
9237 | { |
9238 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 9239 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 9240 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 9241 | |
3f2aec07 ML |
9242 | const char *rd = GPR(rd_value, info); |
9243 | const char *rs = GPR(rs_value, info); | |
9244 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 9245 | |
c5231692 | 9246 | return img_format("LWUX %s, %s(%s)", rd, rs, rt); |
89a955e8 AM |
9247 | } |
9248 | ||
9249 | ||
9250 | /* | |
9251 | * | |
9252 | * | |
9253 | * 3 2 1 | |
9254 | * 10987654321098765432109876543210 | |
9255 | * 001000 x1110000101 | |
9256 | * rt ----- | |
9257 | * rs ----- | |
9258 | * rd ----- | |
9259 | */ | |
7def8a4b | 9260 | static char *LWUXS(uint64 instruction, Dis_info *info) |
89a955e8 AM |
9261 | { |
9262 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 9263 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 9264 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 9265 | |
3f2aec07 ML |
9266 | const char *rd = GPR(rd_value, info); |
9267 | const char *rs = GPR(rs_value, info); | |
9268 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 9269 | |
c5231692 | 9270 | return img_format("LWUXS %s, %s(%s)", rd, rs, rt); |
89a955e8 AM |
9271 | } |
9272 | ||
9273 | ||
9274 | /* | |
9275 | * | |
9276 | * | |
9277 | * 3 2 1 | |
9278 | * 10987654321098765432109876543210 | |
9279 | * 001000 x1110000101 | |
9280 | * rt ----- | |
9281 | * rs ----- | |
9282 | * rd ----- | |
9283 | */ | |
7def8a4b | 9284 | static char *LWX(uint64 instruction, Dis_info *info) |
89a955e8 AM |
9285 | { |
9286 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 9287 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 9288 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 9289 | |
3f2aec07 ML |
9290 | const char *rd = GPR(rd_value, info); |
9291 | const char *rs = GPR(rs_value, info); | |
9292 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 9293 | |
c5231692 | 9294 | return img_format("LWX %s, %s(%s)", rd, rs, rt); |
89a955e8 AM |
9295 | } |
9296 | ||
9297 | ||
9298 | /* | |
9299 | * | |
9300 | * | |
9301 | * 3 2 1 | |
9302 | * 10987654321098765432109876543210 | |
9303 | * 001000 x1110000101 | |
9304 | * rt ----- | |
9305 | * rs ----- | |
9306 | * rd ----- | |
9307 | */ | |
7def8a4b | 9308 | static char *LWXS_16_(uint64 instruction, Dis_info *info) |
89a955e8 | 9309 | { |
89a955e8 AM |
9310 | uint64 rt3_value = extract_rt3_9_8_7(instruction); |
9311 | uint64 rs3_value = extract_rs3_6_5_4(instruction); | |
86b5f803 | 9312 | uint64 rd3_value = extract_rd3_3_2_1(instruction); |
89a955e8 | 9313 | |
3f2aec07 ML |
9314 | const char *rd3 = GPR(decode_gpr_gpr3(rd3_value, info), info); |
9315 | const char *rs3 = GPR(decode_gpr_gpr3(rs3_value, info), info); | |
9316 | uint64 rt3 = decode_gpr_gpr3(rt3_value, info); | |
89a955e8 | 9317 | |
4066c152 | 9318 | return img_format("LWXS %s, %s(0x%" PRIx64 ")", rd3, rs3, rt3); |
89a955e8 AM |
9319 | } |
9320 | ||
9321 | ||
9322 | /* | |
9323 | * | |
9324 | * | |
9325 | * 3 2 1 | |
9326 | * 10987654321098765432109876543210 | |
9327 | * 001000 x1110000101 | |
9328 | * rt ----- | |
9329 | * rs ----- | |
9330 | * rd ----- | |
9331 | */ | |
7def8a4b | 9332 | static char *LWXS_32_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
9333 | { |
9334 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 9335 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 9336 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 9337 | |
3f2aec07 ML |
9338 | const char *rd = GPR(rd_value, info); |
9339 | const char *rs = GPR(rs_value, info); | |
9340 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 9341 | |
c5231692 | 9342 | return img_format("LWXS %s, %s(%s)", rd, rs, rt); |
89a955e8 AM |
9343 | } |
9344 | ||
9345 | ||
9346 | /* | |
fc95c241 AM |
9347 | * [DSP] MADD ac, rs, rt - Multiply two words and add to the specified |
9348 | * accumulator | |
89a955e8 AM |
9349 | * |
9350 | * 3 2 1 | |
9351 | * 10987654321098765432109876543210 | |
9352 | * 001000 x1110000101 | |
9353 | * rt ----- | |
9354 | * rs ----- | |
9355 | * rd ----- | |
9356 | */ | |
7def8a4b | 9357 | static char *MADD_DSP_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
9358 | { |
9359 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 9360 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
0f74e61d | 9361 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 9362 | |
3f2aec07 ML |
9363 | const char *ac = AC(ac_value, info); |
9364 | const char *rs = GPR(rs_value, info); | |
9365 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 9366 | |
c5231692 | 9367 | return img_format("MADD %s, %s, %s", ac, rs, rt); |
89a955e8 AM |
9368 | } |
9369 | ||
9370 | ||
9371 | /* | |
9372 | * | |
9373 | * | |
9374 | * 3 2 1 | |
9375 | * 10987654321098765432109876543210 | |
9376 | * 001000 x1110000101 | |
9377 | * rt ----- | |
9378 | * rs ----- | |
9379 | * rd ----- | |
9380 | */ | |
7def8a4b | 9381 | static char *MADDF_D(uint64 instruction, Dis_info *info) |
89a955e8 | 9382 | { |
17ce2f00 | 9383 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 9384 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 9385 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 9386 | |
3f2aec07 ML |
9387 | const char *fd = FPR(fd_value, info); |
9388 | const char *fs = FPR(fs_value, info); | |
9389 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 9390 | |
c5231692 | 9391 | return img_format("MADDF.D %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
9392 | } |
9393 | ||
9394 | ||
9395 | /* | |
9396 | * | |
9397 | * | |
9398 | * 3 2 1 | |
9399 | * 10987654321098765432109876543210 | |
9400 | * 001000 x1110000101 | |
9401 | * rt ----- | |
9402 | * rs ----- | |
9403 | * rd ----- | |
9404 | */ | |
7def8a4b | 9405 | static char *MADDF_S(uint64 instruction, Dis_info *info) |
89a955e8 | 9406 | { |
17ce2f00 | 9407 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 9408 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 9409 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 9410 | |
3f2aec07 ML |
9411 | const char *fd = FPR(fd_value, info); |
9412 | const char *fs = FPR(fs_value, info); | |
9413 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 9414 | |
c5231692 | 9415 | return img_format("MADDF.S %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
9416 | } |
9417 | ||
9418 | ||
9419 | /* | |
fc95c241 AM |
9420 | * [DSP] MADDU ac, rs, rt - Multiply two unsigned words and add to the |
9421 | * specified accumulator | |
89a955e8 AM |
9422 | * |
9423 | * 3 2 1 | |
9424 | * 10987654321098765432109876543210 | |
9425 | * 001000 x1110000101 | |
9426 | * rt ----- | |
9427 | * rs ----- | |
9428 | * rd ----- | |
9429 | */ | |
7def8a4b | 9430 | static char *MADDU_DSP_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
9431 | { |
9432 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 9433 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
0f74e61d | 9434 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 9435 | |
3f2aec07 ML |
9436 | const char *ac = AC(ac_value, info); |
9437 | const char *rs = GPR(rs_value, info); | |
9438 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 9439 | |
c5231692 | 9440 | return img_format("MADDU %s, %s, %s", ac, rs, rt); |
89a955e8 AM |
9441 | } |
9442 | ||
9443 | ||
9444 | /* | |
fc95c241 AM |
9445 | * [DSP] MAQ_S.W.PHL ac, rs, rt - Multiply the left-most single vector |
9446 | * fractional halfword elements with accumulation | |
89a955e8 AM |
9447 | * |
9448 | * 3 2 1 | |
9449 | * 10987654321098765432109876543210 | |
9450 | * 001000 x1110000101 | |
9451 | * rt ----- | |
9452 | * rs ----- | |
9453 | * rd ----- | |
9454 | */ | |
7def8a4b | 9455 | static char *MAQ_S_W_PHL(uint64 instruction, Dis_info *info) |
89a955e8 AM |
9456 | { |
9457 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 9458 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
0f74e61d | 9459 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 9460 | |
3f2aec07 ML |
9461 | const char *ac = AC(ac_value, info); |
9462 | const char *rs = GPR(rs_value, info); | |
9463 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 9464 | |
c5231692 | 9465 | return img_format("MAQ_S.W.PHL %s, %s, %s", ac, rs, rt); |
89a955e8 AM |
9466 | } |
9467 | ||
9468 | ||
9469 | /* | |
fc95c241 AM |
9470 | * [DSP] MAQ_S.W.PHR ac, rs, rt - Multiply the right-most single vector |
9471 | * fractional halfword elements with accumulation | |
89a955e8 AM |
9472 | * |
9473 | * 3 2 1 | |
9474 | * 10987654321098765432109876543210 | |
9475 | * 001000 x1110000101 | |
9476 | * rt ----- | |
9477 | * rs ----- | |
9478 | * rd ----- | |
9479 | */ | |
7def8a4b | 9480 | static char *MAQ_S_W_PHR(uint64 instruction, Dis_info *info) |
89a955e8 AM |
9481 | { |
9482 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 9483 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
0f74e61d | 9484 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 9485 | |
3f2aec07 ML |
9486 | const char *ac = AC(ac_value, info); |
9487 | const char *rs = GPR(rs_value, info); | |
9488 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 9489 | |
c5231692 | 9490 | return img_format("MAQ_S.W.PHR %s, %s, %s", ac, rs, rt); |
89a955e8 AM |
9491 | } |
9492 | ||
9493 | ||
9494 | /* | |
fc95c241 AM |
9495 | * [DSP] MAQ_SA.W.PHL ac, rs, rt - Multiply the left-most single vector |
9496 | * fractional halfword elements with saturating accumulation | |
89a955e8 AM |
9497 | * |
9498 | * 3 2 1 | |
9499 | * 10987654321098765432109876543210 | |
9500 | * 001000 x1110000101 | |
9501 | * rt ----- | |
9502 | * rs ----- | |
9503 | * rd ----- | |
9504 | */ | |
7def8a4b | 9505 | static char *MAQ_SA_W_PHL(uint64 instruction, Dis_info *info) |
89a955e8 AM |
9506 | { |
9507 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 9508 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
0f74e61d | 9509 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 9510 | |
3f2aec07 ML |
9511 | const char *ac = AC(ac_value, info); |
9512 | const char *rs = GPR(rs_value, info); | |
9513 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 9514 | |
c5231692 | 9515 | return img_format("MAQ_SA.W.PHL %s, %s, %s", ac, rs, rt); |
89a955e8 AM |
9516 | } |
9517 | ||
9518 | ||
9519 | /* | |
fc95c241 AM |
9520 | * [DSP] MAQ_SA.W.PHR ac, rs, rt - Multiply the right-most single vector |
9521 | * fractional halfword elements with saturating accumulation | |
89a955e8 AM |
9522 | * |
9523 | * 3 2 1 | |
9524 | * 10987654321098765432109876543210 | |
9525 | * 001000 x1110000101 | |
9526 | * rt ----- | |
9527 | * rs ----- | |
9528 | * rd ----- | |
9529 | */ | |
7def8a4b | 9530 | static char *MAQ_SA_W_PHR(uint64 instruction, Dis_info *info) |
89a955e8 AM |
9531 | { |
9532 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 9533 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
0f74e61d | 9534 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 9535 | |
3f2aec07 ML |
9536 | const char *ac = AC(ac_value, info); |
9537 | const char *rs = GPR(rs_value, info); | |
9538 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 9539 | |
c5231692 | 9540 | return img_format("MAQ_SA.W.PHR %s, %s, %s", ac, rs, rt); |
89a955e8 AM |
9541 | } |
9542 | ||
9543 | ||
9544 | /* | |
9545 | * | |
9546 | * | |
9547 | * 3 2 1 | |
9548 | * 10987654321098765432109876543210 | |
9549 | * 001000 x1110000101 | |
9550 | * rt ----- | |
9551 | * rs ----- | |
9552 | * rd ----- | |
9553 | */ | |
7def8a4b | 9554 | static char *MAX_D(uint64 instruction, Dis_info *info) |
89a955e8 | 9555 | { |
17ce2f00 | 9556 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 9557 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 9558 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 9559 | |
3f2aec07 ML |
9560 | const char *fd = FPR(fd_value, info); |
9561 | const char *fs = FPR(fs_value, info); | |
9562 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 9563 | |
c5231692 | 9564 | return img_format("MAX.D %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
9565 | } |
9566 | ||
9567 | ||
9568 | /* | |
9569 | * | |
9570 | * | |
9571 | * 3 2 1 | |
9572 | * 10987654321098765432109876543210 | |
9573 | * 001000 x1110000101 | |
9574 | * rt ----- | |
9575 | * rs ----- | |
9576 | * rd ----- | |
9577 | */ | |
7def8a4b | 9578 | static char *MAX_S(uint64 instruction, Dis_info *info) |
89a955e8 | 9579 | { |
17ce2f00 | 9580 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 9581 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 9582 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 9583 | |
3f2aec07 ML |
9584 | const char *fd = FPR(fd_value, info); |
9585 | const char *fs = FPR(fs_value, info); | |
9586 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 9587 | |
c5231692 | 9588 | return img_format("MAX.S %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
9589 | } |
9590 | ||
9591 | ||
9592 | /* | |
9593 | * | |
9594 | * | |
9595 | * 3 2 1 | |
9596 | * 10987654321098765432109876543210 | |
9597 | * 001000 x1110000101 | |
9598 | * rt ----- | |
9599 | * rs ----- | |
9600 | * rd ----- | |
9601 | */ | |
7def8a4b | 9602 | static char *MAXA_D(uint64 instruction, Dis_info *info) |
89a955e8 | 9603 | { |
17ce2f00 | 9604 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 9605 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 9606 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 9607 | |
3f2aec07 ML |
9608 | const char *fd = FPR(fd_value, info); |
9609 | const char *fs = FPR(fs_value, info); | |
9610 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 9611 | |
c5231692 | 9612 | return img_format("MAXA.D %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
9613 | } |
9614 | ||
9615 | ||
9616 | /* | |
9617 | * | |
9618 | * | |
9619 | * 3 2 1 | |
9620 | * 10987654321098765432109876543210 | |
9621 | * 001000 x1110000101 | |
9622 | * rt ----- | |
9623 | * rs ----- | |
9624 | * rd ----- | |
9625 | */ | |
7def8a4b | 9626 | static char *MAXA_S(uint64 instruction, Dis_info *info) |
89a955e8 | 9627 | { |
17ce2f00 | 9628 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 9629 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 9630 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 9631 | |
3f2aec07 ML |
9632 | const char *fd = FPR(fd_value, info); |
9633 | const char *fs = FPR(fs_value, info); | |
9634 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 9635 | |
c5231692 | 9636 | return img_format("MAXA.S %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
9637 | } |
9638 | ||
9639 | ||
9640 | /* | |
9641 | * | |
9642 | * | |
9643 | * 3 2 1 | |
9644 | * 10987654321098765432109876543210 | |
9645 | * 001000 x1110000101 | |
9646 | * rt ----- | |
9647 | * rs ----- | |
9648 | * rd ----- | |
9649 | */ | |
7def8a4b | 9650 | static char *MFC0(uint64 instruction, Dis_info *info) |
89a955e8 AM |
9651 | { |
9652 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
9653 | uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction); | |
9654 | uint64 sel_value = extract_sel_15_14_13_12_11(instruction); | |
9655 | ||
3f2aec07 | 9656 | const char *rt = GPR(rt_value, info); |
89a955e8 | 9657 | |
043dc73c ML |
9658 | return img_format("MFC0 %s, CP%" PRIu64 ", 0x%" PRIx64, |
9659 | rt, c0s_value, sel_value); | |
89a955e8 AM |
9660 | } |
9661 | ||
9662 | ||
9663 | /* | |
9664 | * | |
9665 | * | |
9666 | * 3 2 1 | |
9667 | * 10987654321098765432109876543210 | |
9668 | * 001000 x1110000101 | |
9669 | * rt ----- | |
9670 | * rs ----- | |
9671 | * rd ----- | |
9672 | */ | |
7def8a4b | 9673 | static char *MFC1(uint64 instruction, Dis_info *info) |
89a955e8 AM |
9674 | { |
9675 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
52a96d22 | 9676 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 9677 | |
3f2aec07 ML |
9678 | const char *rt = GPR(rt_value, info); |
9679 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 9680 | |
c5231692 | 9681 | return img_format("MFC1 %s, %s", rt, fs); |
89a955e8 AM |
9682 | } |
9683 | ||
9684 | ||
9685 | /* | |
9686 | * | |
9687 | * | |
9688 | * 3 2 1 | |
9689 | * 10987654321098765432109876543210 | |
9690 | * 001000 x1110000101 | |
9691 | * rt ----- | |
9692 | * rs ----- | |
9693 | * rd ----- | |
9694 | */ | |
7def8a4b | 9695 | static char *MFC2(uint64 instruction, Dis_info *info) |
89a955e8 | 9696 | { |
89a955e8 | 9697 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
86b5f803 | 9698 | uint64 cs_value = extract_cs_20_19_18_17_16(instruction); |
89a955e8 | 9699 | |
3f2aec07 | 9700 | const char *rt = GPR(rt_value, info); |
89a955e8 | 9701 | |
043dc73c | 9702 | return img_format("MFC2 %s, CP%" PRIu64, rt, cs_value); |
89a955e8 AM |
9703 | } |
9704 | ||
9705 | ||
9706 | /* | |
9707 | * | |
9708 | * | |
9709 | * 3 2 1 | |
9710 | * 10987654321098765432109876543210 | |
9711 | * 001000 x1110000101 | |
9712 | * rt ----- | |
9713 | * rs ----- | |
9714 | * rd ----- | |
9715 | */ | |
7def8a4b | 9716 | static char *MFGC0(uint64 instruction, Dis_info *info) |
89a955e8 AM |
9717 | { |
9718 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
9719 | uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction); | |
9720 | uint64 sel_value = extract_sel_15_14_13_12_11(instruction); | |
9721 | ||
3f2aec07 | 9722 | const char *rt = GPR(rt_value, info); |
89a955e8 | 9723 | |
043dc73c ML |
9724 | return img_format("MFGC0 %s, CP%" PRIu64 ", 0x%" PRIx64, |
9725 | rt, c0s_value, sel_value); | |
89a955e8 AM |
9726 | } |
9727 | ||
9728 | ||
9729 | /* | |
9730 | * | |
9731 | * | |
9732 | * 3 2 1 | |
9733 | * 10987654321098765432109876543210 | |
9734 | * 001000 x1110000101 | |
9735 | * rt ----- | |
9736 | * rs ----- | |
9737 | * rd ----- | |
9738 | */ | |
7def8a4b | 9739 | static char *MFHC0(uint64 instruction, Dis_info *info) |
89a955e8 AM |
9740 | { |
9741 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
9742 | uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction); | |
9743 | uint64 sel_value = extract_sel_15_14_13_12_11(instruction); | |
9744 | ||
3f2aec07 | 9745 | const char *rt = GPR(rt_value, info); |
89a955e8 | 9746 | |
043dc73c ML |
9747 | return img_format("MFHC0 %s, CP%" PRIu64 ", 0x%" PRIx64, |
9748 | rt, c0s_value, sel_value); | |
89a955e8 AM |
9749 | } |
9750 | ||
9751 | ||
9752 | /* | |
9753 | * | |
9754 | * | |
9755 | * 3 2 1 | |
9756 | * 10987654321098765432109876543210 | |
9757 | * 001000 x1110000101 | |
9758 | * rt ----- | |
9759 | * rs ----- | |
9760 | * rd ----- | |
9761 | */ | |
7def8a4b | 9762 | static char *MFHC1(uint64 instruction, Dis_info *info) |
89a955e8 AM |
9763 | { |
9764 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
52a96d22 | 9765 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 9766 | |
3f2aec07 ML |
9767 | const char *rt = GPR(rt_value, info); |
9768 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 9769 | |
c5231692 | 9770 | return img_format("MFHC1 %s, %s", rt, fs); |
89a955e8 AM |
9771 | } |
9772 | ||
9773 | ||
9774 | /* | |
9775 | * | |
9776 | * | |
9777 | * 3 2 1 | |
9778 | * 10987654321098765432109876543210 | |
9779 | * 001000 x1110000101 | |
9780 | * rt ----- | |
9781 | * rs ----- | |
9782 | * rd ----- | |
9783 | */ | |
7def8a4b | 9784 | static char *MFHC2(uint64 instruction, Dis_info *info) |
89a955e8 | 9785 | { |
89a955e8 | 9786 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
86b5f803 | 9787 | uint64 cs_value = extract_cs_20_19_18_17_16(instruction); |
89a955e8 | 9788 | |
3f2aec07 | 9789 | const char *rt = GPR(rt_value, info); |
89a955e8 | 9790 | |
043dc73c | 9791 | return img_format("MFHC2 %s, CP%" PRIu64, rt, cs_value); |
89a955e8 AM |
9792 | } |
9793 | ||
9794 | ||
9795 | /* | |
9796 | * | |
9797 | * | |
9798 | * 3 2 1 | |
9799 | * 10987654321098765432109876543210 | |
9800 | * 001000 x1110000101 | |
9801 | * rt ----- | |
9802 | * rs ----- | |
9803 | * rd ----- | |
9804 | */ | |
7def8a4b | 9805 | static char *MFHGC0(uint64 instruction, Dis_info *info) |
89a955e8 AM |
9806 | { |
9807 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
9808 | uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction); | |
9809 | uint64 sel_value = extract_sel_15_14_13_12_11(instruction); | |
9810 | ||
3f2aec07 | 9811 | const char *rt = GPR(rt_value, info); |
89a955e8 | 9812 | |
043dc73c ML |
9813 | return img_format("MFHGC0 %s, CP%" PRIu64 ", 0x%" PRIx64, |
9814 | rt, c0s_value, sel_value); | |
89a955e8 AM |
9815 | } |
9816 | ||
9817 | ||
9818 | /* | |
5c65eed6 | 9819 | * [DSP] MFHI rs, ac - Move from HI register |
89a955e8 AM |
9820 | * |
9821 | * 3 2 1 | |
9822 | * 10987654321098765432109876543210 | |
5c65eed6 | 9823 | * 001000 xxxxx 00000001111111 |
89a955e8 | 9824 | * rt ----- |
5c65eed6 | 9825 | * ac -- |
89a955e8 | 9826 | */ |
7def8a4b | 9827 | static char *MFHI_DSP_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
9828 | { |
9829 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
0f74e61d | 9830 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 9831 | |
3f2aec07 ML |
9832 | const char *rt = GPR(rt_value, info); |
9833 | const char *ac = AC(ac_value, info); | |
89a955e8 | 9834 | |
c5231692 | 9835 | return img_format("MFHI %s, %s", rt, ac); |
89a955e8 AM |
9836 | } |
9837 | ||
9838 | ||
9839 | /* | |
9840 | * | |
9841 | * | |
9842 | * 3 2 1 | |
9843 | * 10987654321098765432109876543210 | |
9844 | * 001000 x1110000101 | |
9845 | * rt ----- | |
9846 | * rs ----- | |
9847 | * rd ----- | |
9848 | */ | |
7def8a4b | 9849 | static char *MFHTR(uint64 instruction, Dis_info *info) |
89a955e8 AM |
9850 | { |
9851 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
9852 | uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction); | |
9853 | uint64 sel_value = extract_sel_15_14_13_12_11(instruction); | |
9854 | uint64 u_value = extract_u_10(instruction); | |
9855 | ||
3f2aec07 | 9856 | const char *rt = GPR(rt_value, info); |
89a955e8 | 9857 | |
4066c152 ML |
9858 | return img_format("MFHTR %s, 0x%" PRIx64 ", 0x%" PRIx64 ", 0x%" PRIx64, |
9859 | rt, c0s_value, u_value, sel_value); | |
89a955e8 AM |
9860 | } |
9861 | ||
9862 | ||
9863 | /* | |
5c65eed6 | 9864 | * [DSP] MFLO rs, ac - Move from HI register |
89a955e8 AM |
9865 | * |
9866 | * 3 2 1 | |
9867 | * 10987654321098765432109876543210 | |
5c65eed6 | 9868 | * 001000 xxxxx 01000001111111 |
89a955e8 | 9869 | * rt ----- |
5c65eed6 | 9870 | * ac -- |
89a955e8 | 9871 | */ |
7def8a4b | 9872 | static char *MFLO_DSP_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
9873 | { |
9874 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
0f74e61d | 9875 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 9876 | |
3f2aec07 ML |
9877 | const char *rt = GPR(rt_value, info); |
9878 | const char *ac = AC(ac_value, info); | |
89a955e8 | 9879 | |
c5231692 | 9880 | return img_format("MFLO %s, %s", rt, ac); |
89a955e8 AM |
9881 | } |
9882 | ||
9883 | ||
9884 | /* | |
9885 | * | |
9886 | * | |
9887 | * 3 2 1 | |
9888 | * 10987654321098765432109876543210 | |
9889 | * 001000 x1110000101 | |
9890 | * rt ----- | |
9891 | * rs ----- | |
9892 | * rd ----- | |
9893 | */ | |
7def8a4b | 9894 | static char *MFTR(uint64 instruction, Dis_info *info) |
89a955e8 AM |
9895 | { |
9896 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
9897 | uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction); | |
9898 | uint64 sel_value = extract_sel_15_14_13_12_11(instruction); | |
9899 | uint64 u_value = extract_u_10(instruction); | |
9900 | ||
3f2aec07 | 9901 | const char *rt = GPR(rt_value, info); |
89a955e8 | 9902 | |
4066c152 ML |
9903 | return img_format("MFTR %s, 0x%" PRIx64 ", 0x%" PRIx64 ", 0x%" PRIx64, |
9904 | rt, c0s_value, u_value, sel_value); | |
89a955e8 AM |
9905 | } |
9906 | ||
9907 | ||
9908 | /* | |
9909 | * | |
9910 | * | |
9911 | * 3 2 1 | |
9912 | * 10987654321098765432109876543210 | |
9913 | * 001000 x1110000101 | |
9914 | * rt ----- | |
9915 | * rs ----- | |
9916 | * rd ----- | |
9917 | */ | |
7def8a4b | 9918 | static char *MIN_D(uint64 instruction, Dis_info *info) |
89a955e8 | 9919 | { |
17ce2f00 | 9920 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 9921 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 9922 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 9923 | |
3f2aec07 ML |
9924 | const char *fd = FPR(fd_value, info); |
9925 | const char *fs = FPR(fs_value, info); | |
9926 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 9927 | |
c5231692 | 9928 | return img_format("MIN.D %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
9929 | } |
9930 | ||
9931 | ||
9932 | /* | |
9933 | * | |
9934 | * | |
9935 | * 3 2 1 | |
9936 | * 10987654321098765432109876543210 | |
9937 | * 001000 x1110000101 | |
9938 | * rt ----- | |
9939 | * rs ----- | |
9940 | * rd ----- | |
9941 | */ | |
7def8a4b | 9942 | static char *MIN_S(uint64 instruction, Dis_info *info) |
89a955e8 | 9943 | { |
17ce2f00 | 9944 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 9945 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 9946 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 9947 | |
3f2aec07 ML |
9948 | const char *fd = FPR(fd_value, info); |
9949 | const char *fs = FPR(fs_value, info); | |
9950 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 9951 | |
c5231692 | 9952 | return img_format("MIN.S %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
9953 | } |
9954 | ||
9955 | ||
9956 | /* | |
9957 | * | |
9958 | * | |
9959 | * 3 2 1 | |
9960 | * 10987654321098765432109876543210 | |
9961 | * 001000 x1110000101 | |
9962 | * rt ----- | |
9963 | * rs ----- | |
9964 | * rd ----- | |
9965 | */ | |
7def8a4b | 9966 | static char *MINA_D(uint64 instruction, Dis_info *info) |
89a955e8 | 9967 | { |
17ce2f00 | 9968 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 9969 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 9970 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 9971 | |
3f2aec07 ML |
9972 | const char *fd = FPR(fd_value, info); |
9973 | const char *fs = FPR(fs_value, info); | |
9974 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 9975 | |
c5231692 | 9976 | return img_format("MINA.D %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
9977 | } |
9978 | ||
9979 | ||
9980 | /* | |
9981 | * | |
9982 | * | |
9983 | * 3 2 1 | |
9984 | * 10987654321098765432109876543210 | |
9985 | * 001000 x1110000101 | |
9986 | * rt ----- | |
9987 | * rs ----- | |
9988 | * rd ----- | |
9989 | */ | |
7def8a4b | 9990 | static char *MINA_S(uint64 instruction, Dis_info *info) |
89a955e8 | 9991 | { |
17ce2f00 | 9992 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 9993 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 9994 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 9995 | |
3f2aec07 ML |
9996 | const char *fd = FPR(fd_value, info); |
9997 | const char *fs = FPR(fs_value, info); | |
9998 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 9999 | |
c5231692 | 10000 | return img_format("MINA.S %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
10001 | } |
10002 | ||
10003 | ||
10004 | /* | |
10005 | * | |
10006 | * | |
10007 | * 3 2 1 | |
10008 | * 10987654321098765432109876543210 | |
10009 | * 001000 x1110000101 | |
10010 | * rt ----- | |
10011 | * rs ----- | |
10012 | * rd ----- | |
10013 | */ | |
7def8a4b | 10014 | static char *MOD(uint64 instruction, Dis_info *info) |
89a955e8 AM |
10015 | { |
10016 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 10017 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 10018 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 10019 | |
3f2aec07 ML |
10020 | const char *rd = GPR(rd_value, info); |
10021 | const char *rs = GPR(rs_value, info); | |
10022 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 10023 | |
c5231692 | 10024 | return img_format("MOD %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
10025 | } |
10026 | ||
10027 | ||
10028 | /* | |
5c65eed6 | 10029 | * [DSP] MODSUB rd, rs, rt - Modular subtraction on an index value |
89a955e8 AM |
10030 | * |
10031 | * 3 2 1 | |
10032 | * 10987654321098765432109876543210 | |
10033 | * 001000 x1110000101 | |
10034 | * rt ----- | |
10035 | * rs ----- | |
10036 | * rd ----- | |
10037 | */ | |
7def8a4b | 10038 | static char *MODSUB(uint64 instruction, Dis_info *info) |
89a955e8 AM |
10039 | { |
10040 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 10041 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 10042 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 10043 | |
3f2aec07 ML |
10044 | const char *rd = GPR(rd_value, info); |
10045 | const char *rs = GPR(rs_value, info); | |
10046 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 10047 | |
c5231692 | 10048 | return img_format("MODSUB %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
10049 | } |
10050 | ||
10051 | ||
10052 | /* | |
10053 | * | |
10054 | * | |
10055 | * 3 2 1 | |
10056 | * 10987654321098765432109876543210 | |
5c65eed6 | 10057 | * 001000 x1010010101 |
89a955e8 AM |
10058 | * rt ----- |
10059 | * rs ----- | |
10060 | * rd ----- | |
10061 | */ | |
7def8a4b | 10062 | static char *MODU(uint64 instruction, Dis_info *info) |
89a955e8 AM |
10063 | { |
10064 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 10065 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 10066 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 10067 | |
3f2aec07 ML |
10068 | const char *rd = GPR(rd_value, info); |
10069 | const char *rs = GPR(rs_value, info); | |
10070 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 10071 | |
c5231692 | 10072 | return img_format("MODU %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
10073 | } |
10074 | ||
10075 | ||
10076 | /* | |
10077 | * | |
10078 | * | |
10079 | * 3 2 1 | |
10080 | * 10987654321098765432109876543210 | |
10081 | * 001000 x1110000101 | |
10082 | * rt ----- | |
10083 | * rs ----- | |
10084 | * rd ----- | |
10085 | */ | |
7def8a4b | 10086 | static char *MOV_D(uint64 instruction, Dis_info *info) |
89a955e8 | 10087 | { |
17ce2f00 | 10088 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 10089 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 10090 | |
3f2aec07 ML |
10091 | const char *ft = FPR(ft_value, info); |
10092 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 10093 | |
c5231692 | 10094 | return img_format("MOV.D %s, %s", ft, fs); |
89a955e8 AM |
10095 | } |
10096 | ||
10097 | ||
10098 | /* | |
10099 | * | |
10100 | * | |
10101 | * 3 2 1 | |
10102 | * 10987654321098765432109876543210 | |
10103 | * 001000 x1110000101 | |
10104 | * rt ----- | |
10105 | * rs ----- | |
10106 | * rd ----- | |
10107 | */ | |
7def8a4b | 10108 | static char *MOV_S(uint64 instruction, Dis_info *info) |
89a955e8 | 10109 | { |
17ce2f00 | 10110 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 10111 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 10112 | |
3f2aec07 ML |
10113 | const char *ft = FPR(ft_value, info); |
10114 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 10115 | |
c5231692 | 10116 | return img_format("MOV.S %s, %s", ft, fs); |
89a955e8 AM |
10117 | } |
10118 | ||
10119 | ||
10120 | /* | |
10121 | * | |
10122 | * | |
10123 | * 3 2 1 | |
10124 | * 10987654321098765432109876543210 | |
10125 | * 001000 x1110000101 | |
10126 | * rt ----- | |
10127 | * rs ----- | |
10128 | * rd ----- | |
10129 | */ | |
7def8a4b | 10130 | static char *MOVE_BALC(uint64 instruction, Dis_info *info) |
89a955e8 | 10131 | { |
86b5f803 | 10132 | uint64 rtz4_value = extract_rtz4_27_26_25_23_22_21(instruction); |
89a955e8 | 10133 | uint64 rd1_value = extract_rdl_25_24(instruction); |
d3605cc0 | 10134 | int64 s_value = extract_s__se21_0_20_to_1_s1(instruction); |
89a955e8 | 10135 | |
3f2aec07 ML |
10136 | const char *rd1 = GPR(decode_gpr_gpr1(rd1_value, info), info); |
10137 | const char *rtz4 = GPR(decode_gpr_gpr4_zero(rtz4_value, info), info); | |
22e7b52a | 10138 | g_autofree char *s = ADDRESS(s_value, 4, info); |
89a955e8 | 10139 | |
c5231692 | 10140 | return img_format("MOVE.BALC %s, %s, %s", rd1, rtz4, s); |
89a955e8 AM |
10141 | } |
10142 | ||
10143 | ||
10144 | /* | |
10145 | * | |
10146 | * | |
10147 | * 3 2 1 | |
10148 | * 10987654321098765432109876543210 | |
10149 | * 001000 x1110000101 | |
10150 | * rt ----- | |
10151 | * rs ----- | |
10152 | * rd ----- | |
10153 | */ | |
7def8a4b | 10154 | static char *MOVEP(uint64 instruction, Dis_info *info) |
89a955e8 | 10155 | { |
89a955e8 AM |
10156 | uint64 rtz4_value = extract_rtz4_9_7_6_5(instruction); |
10157 | uint64 rd2_value = extract_rd2_3_8(instruction); | |
75199b40 | 10158 | uint64 rsz4_value = extract_rsz4_4_2_1_0(instruction); |
89a955e8 | 10159 | |
3f2aec07 ML |
10160 | const char *rd2 = GPR(decode_gpr_gpr2_reg1(rd2_value, info), info); |
10161 | const char *re2 = GPR(decode_gpr_gpr2_reg2(rd2_value, info), info); | |
89a955e8 | 10162 | /* !!!!!!!!!! - no conversion function */ |
3f2aec07 ML |
10163 | const char *rsz4 = GPR(decode_gpr_gpr4_zero(rsz4_value, info), info); |
10164 | const char *rtz4 = GPR(decode_gpr_gpr4_zero(rtz4_value, info), info); | |
89a955e8 | 10165 | |
c5231692 | 10166 | return img_format("MOVEP %s, %s, %s, %s", rd2, re2, rsz4, rtz4); |
89a955e8 AM |
10167 | /* hand edited */ |
10168 | } | |
10169 | ||
10170 | ||
10171 | /* | |
10172 | * | |
10173 | * | |
10174 | * 3 2 1 | |
10175 | * 10987654321098765432109876543210 | |
10176 | * 001000 x1110000101 | |
10177 | * rt ----- | |
10178 | * rs ----- | |
10179 | * rd ----- | |
10180 | */ | |
7def8a4b | 10181 | static char *MOVEP_REV_(uint64 instruction, Dis_info *info) |
89a955e8 | 10182 | { |
89a955e8 AM |
10183 | uint64 rt4_value = extract_rt4_9_7_6_5(instruction); |
10184 | uint64 rd2_value = extract_rd2_3_8(instruction); | |
75199b40 | 10185 | uint64 rs4_value = extract_rs4_4_2_1_0(instruction); |
89a955e8 | 10186 | |
3f2aec07 ML |
10187 | const char *rs4 = GPR(decode_gpr_gpr4(rs4_value, info), info); |
10188 | const char *rt4 = GPR(decode_gpr_gpr4(rt4_value, info), info); | |
10189 | const char *rd2 = GPR(decode_gpr_gpr2_reg1(rd2_value, info), info); | |
10190 | const char *rs2 = GPR(decode_gpr_gpr2_reg2(rd2_value, info), info); | |
89a955e8 AM |
10191 | /* !!!!!!!!!! - no conversion function */ |
10192 | ||
c5231692 | 10193 | return img_format("MOVEP %s, %s, %s, %s", rs4, rt4, rd2, rs2); |
89a955e8 AM |
10194 | /* hand edited */ |
10195 | } | |
10196 | ||
10197 | ||
10198 | /* | |
10199 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
10200 | * | |
10201 | * 3 2 1 | |
10202 | * 10987654321098765432109876543210 | |
10203 | * 001000 00010001101 | |
10204 | * rt ----- | |
10205 | * rs ----- | |
10206 | * rd ----- | |
10207 | */ | |
7def8a4b | 10208 | static char *MOVE(uint64 instruction, Dis_info *info) |
89a955e8 AM |
10209 | { |
10210 | uint64 rt_value = extract_rt_9_8_7_6_5(instruction); | |
10211 | uint64 rs_value = extract_rs_4_3_2_1_0(instruction); | |
10212 | ||
3f2aec07 ML |
10213 | const char *rt = GPR(rt_value, info); |
10214 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 10215 | |
c5231692 | 10216 | return img_format("MOVE %s, %s", rt, rs); |
89a955e8 AM |
10217 | } |
10218 | ||
10219 | ||
10220 | /* | |
10221 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
10222 | * | |
10223 | * 3 2 1 | |
10224 | * 10987654321098765432109876543210 | |
10225 | * 001000 00010001101 | |
10226 | * rt ----- | |
10227 | * rs ----- | |
10228 | * rd ----- | |
10229 | */ | |
7def8a4b | 10230 | static char *MOVN(uint64 instruction, Dis_info *info) |
89a955e8 AM |
10231 | { |
10232 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 10233 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 10234 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 10235 | |
3f2aec07 ML |
10236 | const char *rd = GPR(rd_value, info); |
10237 | const char *rs = GPR(rs_value, info); | |
10238 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 10239 | |
c5231692 | 10240 | return img_format("MOVN %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
10241 | } |
10242 | ||
10243 | ||
10244 | /* | |
10245 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
10246 | * | |
10247 | * 3 2 1 | |
10248 | * 10987654321098765432109876543210 | |
10249 | * 001000 00010001101 | |
10250 | * rt ----- | |
10251 | * rs ----- | |
10252 | * rd ----- | |
10253 | */ | |
7def8a4b | 10254 | static char *MOVZ(uint64 instruction, Dis_info *info) |
89a955e8 AM |
10255 | { |
10256 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 10257 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 10258 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 10259 | |
3f2aec07 ML |
10260 | const char *rd = GPR(rd_value, info); |
10261 | const char *rs = GPR(rs_value, info); | |
10262 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 10263 | |
c5231692 | 10264 | return img_format("MOVZ %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
10265 | } |
10266 | ||
10267 | ||
10268 | /* | |
5c65eed6 | 10269 | * [DSP] MSUB ac, rs, rt - Multiply word and subtract from accumulator |
89a955e8 AM |
10270 | * |
10271 | * 3 2 1 | |
10272 | * 10987654321098765432109876543210 | |
5c65eed6 | 10273 | * 001000 10101010111111 |
89a955e8 AM |
10274 | * rt ----- |
10275 | * rs ----- | |
5c65eed6 | 10276 | * ac -- |
89a955e8 | 10277 | */ |
7def8a4b | 10278 | static char *MSUB_DSP_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
10279 | { |
10280 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 10281 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
0f74e61d | 10282 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 10283 | |
3f2aec07 ML |
10284 | const char *ac = AC(ac_value, info); |
10285 | const char *rs = GPR(rs_value, info); | |
10286 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 10287 | |
c5231692 | 10288 | return img_format("MSUB %s, %s, %s", ac, rs, rt); |
89a955e8 AM |
10289 | } |
10290 | ||
10291 | ||
10292 | /* | |
10293 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
10294 | * | |
10295 | * 3 2 1 | |
10296 | * 10987654321098765432109876543210 | |
10297 | * 001000 00010001101 | |
10298 | * rt ----- | |
10299 | * rs ----- | |
10300 | * rd ----- | |
10301 | */ | |
7def8a4b | 10302 | static char *MSUBF_D(uint64 instruction, Dis_info *info) |
89a955e8 | 10303 | { |
17ce2f00 | 10304 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 10305 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 10306 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 10307 | |
3f2aec07 ML |
10308 | const char *fd = FPR(fd_value, info); |
10309 | const char *fs = FPR(fs_value, info); | |
10310 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 10311 | |
c5231692 | 10312 | return img_format("MSUBF.D %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
10313 | } |
10314 | ||
10315 | ||
10316 | /* | |
10317 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
10318 | * | |
10319 | * 3 2 1 | |
10320 | * 10987654321098765432109876543210 | |
10321 | * 001000 00010001101 | |
10322 | * rt ----- | |
10323 | * rs ----- | |
10324 | * rd ----- | |
10325 | */ | |
7def8a4b | 10326 | static char *MSUBF_S(uint64 instruction, Dis_info *info) |
89a955e8 | 10327 | { |
17ce2f00 | 10328 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 10329 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 10330 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 10331 | |
3f2aec07 ML |
10332 | const char *fd = FPR(fd_value, info); |
10333 | const char *fs = FPR(fs_value, info); | |
10334 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 10335 | |
c5231692 | 10336 | return img_format("MSUBF.S %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
10337 | } |
10338 | ||
10339 | ||
10340 | /* | |
5c65eed6 | 10341 | * [DSP] MSUBU ac, rs, rt - Multiply word and add to accumulator |
89a955e8 AM |
10342 | * |
10343 | * 3 2 1 | |
10344 | * 10987654321098765432109876543210 | |
5c65eed6 | 10345 | * 001000 11101010111111 |
89a955e8 AM |
10346 | * rt ----- |
10347 | * rs ----- | |
5c65eed6 | 10348 | * ac -- |
89a955e8 | 10349 | */ |
7def8a4b | 10350 | static char *MSUBU_DSP_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
10351 | { |
10352 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 10353 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
0f74e61d | 10354 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 10355 | |
3f2aec07 ML |
10356 | const char *ac = AC(ac_value, info); |
10357 | const char *rs = GPR(rs_value, info); | |
10358 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 10359 | |
c5231692 | 10360 | return img_format("MSUBU %s, %s, %s", ac, rs, rt); |
89a955e8 AM |
10361 | } |
10362 | ||
10363 | ||
10364 | /* | |
10365 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
10366 | * | |
10367 | * 3 2 1 | |
10368 | * 10987654321098765432109876543210 | |
10369 | * 001000 00010001101 | |
10370 | * rt ----- | |
10371 | * rs ----- | |
10372 | * rd ----- | |
10373 | */ | |
7def8a4b | 10374 | static char *MTC0(uint64 instruction, Dis_info *info) |
89a955e8 AM |
10375 | { |
10376 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
10377 | uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction); | |
10378 | uint64 sel_value = extract_sel_15_14_13_12_11(instruction); | |
10379 | ||
3f2aec07 | 10380 | const char *rt = GPR(rt_value, info); |
89a955e8 | 10381 | |
043dc73c ML |
10382 | return img_format("MTC0 %s, CP%" PRIu64 ", 0x%" PRIx64, |
10383 | rt, c0s_value, sel_value); | |
89a955e8 AM |
10384 | } |
10385 | ||
10386 | ||
10387 | /* | |
10388 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
10389 | * | |
10390 | * 3 2 1 | |
10391 | * 10987654321098765432109876543210 | |
10392 | * 001000 00010001101 | |
10393 | * rt ----- | |
10394 | * rs ----- | |
10395 | * rd ----- | |
10396 | */ | |
7def8a4b | 10397 | static char *MTC1(uint64 instruction, Dis_info *info) |
89a955e8 AM |
10398 | { |
10399 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
52a96d22 | 10400 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 10401 | |
3f2aec07 ML |
10402 | const char *rt = GPR(rt_value, info); |
10403 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 10404 | |
c5231692 | 10405 | return img_format("MTC1 %s, %s", rt, fs); |
89a955e8 AM |
10406 | } |
10407 | ||
10408 | ||
10409 | /* | |
10410 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
10411 | * | |
10412 | * 3 2 1 | |
10413 | * 10987654321098765432109876543210 | |
10414 | * 001000 00010001101 | |
10415 | * rt ----- | |
10416 | * rs ----- | |
10417 | * rd ----- | |
10418 | */ | |
7def8a4b | 10419 | static char *MTC2(uint64 instruction, Dis_info *info) |
89a955e8 | 10420 | { |
89a955e8 | 10421 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
86b5f803 | 10422 | uint64 cs_value = extract_cs_20_19_18_17_16(instruction); |
89a955e8 | 10423 | |
3f2aec07 | 10424 | const char *rt = GPR(rt_value, info); |
89a955e8 | 10425 | |
043dc73c | 10426 | return img_format("MTC2 %s, CP%" PRIu64, rt, cs_value); |
89a955e8 AM |
10427 | } |
10428 | ||
10429 | ||
10430 | /* | |
10431 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
10432 | * | |
10433 | * 3 2 1 | |
10434 | * 10987654321098765432109876543210 | |
10435 | * 001000 00010001101 | |
10436 | * rt ----- | |
10437 | * rs ----- | |
10438 | * rd ----- | |
10439 | */ | |
7def8a4b | 10440 | static char *MTGC0(uint64 instruction, Dis_info *info) |
89a955e8 AM |
10441 | { |
10442 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
10443 | uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction); | |
10444 | uint64 sel_value = extract_sel_15_14_13_12_11(instruction); | |
10445 | ||
3f2aec07 | 10446 | const char *rt = GPR(rt_value, info); |
89a955e8 | 10447 | |
043dc73c ML |
10448 | return img_format("MTGC0 %s, CP%" PRIu64 ", 0x%" PRIx64, |
10449 | rt, c0s_value, sel_value); | |
89a955e8 AM |
10450 | } |
10451 | ||
10452 | ||
10453 | /* | |
10454 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
10455 | * | |
10456 | * 3 2 1 | |
10457 | * 10987654321098765432109876543210 | |
10458 | * 001000 00010001101 | |
10459 | * rt ----- | |
10460 | * rs ----- | |
10461 | * rd ----- | |
10462 | */ | |
7def8a4b | 10463 | static char *MTHC0(uint64 instruction, Dis_info *info) |
89a955e8 AM |
10464 | { |
10465 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
10466 | uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction); | |
10467 | uint64 sel_value = extract_sel_15_14_13_12_11(instruction); | |
10468 | ||
3f2aec07 | 10469 | const char *rt = GPR(rt_value, info); |
89a955e8 | 10470 | |
043dc73c ML |
10471 | return img_format("MTHC0 %s, CP%" PRIu64 ", 0x%" PRIx64, |
10472 | rt, c0s_value, sel_value); | |
89a955e8 AM |
10473 | } |
10474 | ||
10475 | ||
10476 | /* | |
10477 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
10478 | * | |
10479 | * 3 2 1 | |
10480 | * 10987654321098765432109876543210 | |
10481 | * 001000 00010001101 | |
10482 | * rt ----- | |
10483 | * rs ----- | |
10484 | * rd ----- | |
10485 | */ | |
7def8a4b | 10486 | static char *MTHC1(uint64 instruction, Dis_info *info) |
89a955e8 AM |
10487 | { |
10488 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
52a96d22 | 10489 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 10490 | |
3f2aec07 ML |
10491 | const char *rt = GPR(rt_value, info); |
10492 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 10493 | |
c5231692 | 10494 | return img_format("MTHC1 %s, %s", rt, fs); |
89a955e8 AM |
10495 | } |
10496 | ||
10497 | ||
10498 | /* | |
10499 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
10500 | * | |
10501 | * 3 2 1 | |
10502 | * 10987654321098765432109876543210 | |
10503 | * 001000 00010001101 | |
10504 | * rt ----- | |
10505 | * rs ----- | |
10506 | * rd ----- | |
10507 | */ | |
7def8a4b | 10508 | static char *MTHC2(uint64 instruction, Dis_info *info) |
89a955e8 | 10509 | { |
89a955e8 | 10510 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
86b5f803 | 10511 | uint64 cs_value = extract_cs_20_19_18_17_16(instruction); |
89a955e8 | 10512 | |
3f2aec07 | 10513 | const char *rt = GPR(rt_value, info); |
89a955e8 | 10514 | |
043dc73c | 10515 | return img_format("MTHC2 %s, CP%" PRIu64, rt, cs_value); |
89a955e8 AM |
10516 | } |
10517 | ||
10518 | ||
10519 | /* | |
10520 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
10521 | * | |
10522 | * 3 2 1 | |
10523 | * 10987654321098765432109876543210 | |
10524 | * 001000 00010001101 | |
10525 | * rt ----- | |
10526 | * rs ----- | |
10527 | * rd ----- | |
10528 | */ | |
7def8a4b | 10529 | static char *MTHGC0(uint64 instruction, Dis_info *info) |
89a955e8 AM |
10530 | { |
10531 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
10532 | uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction); | |
10533 | uint64 sel_value = extract_sel_15_14_13_12_11(instruction); | |
10534 | ||
3f2aec07 | 10535 | const char *rt = GPR(rt_value, info); |
89a955e8 | 10536 | |
043dc73c ML |
10537 | return img_format("MTHGC0 %s, CP%" PRIu64 ", 0x%" PRIx64, |
10538 | rt, c0s_value, sel_value); | |
89a955e8 AM |
10539 | } |
10540 | ||
10541 | ||
10542 | /* | |
5c65eed6 | 10543 | * [DSP] MTHI rs, ac - Move to HI register |
89a955e8 AM |
10544 | * |
10545 | * 3 2 1 | |
10546 | * 10987654321098765432109876543210 | |
5c65eed6 | 10547 | * 001000xxxxx 10000001111111 |
89a955e8 | 10548 | * rs ----- |
5c65eed6 | 10549 | * ac -- |
89a955e8 | 10550 | */ |
7def8a4b | 10551 | static char *MTHI_DSP_(uint64 instruction, Dis_info *info) |
89a955e8 | 10552 | { |
89a955e8 | 10553 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
0f74e61d | 10554 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 10555 | |
3f2aec07 ML |
10556 | const char *rs = GPR(rs_value, info); |
10557 | const char *ac = AC(ac_value, info); | |
89a955e8 | 10558 | |
c5231692 | 10559 | return img_format("MTHI %s, %s", rs, ac); |
89a955e8 AM |
10560 | } |
10561 | ||
10562 | ||
10563 | /* | |
5c65eed6 | 10564 | * [DSP] MTHLIP rs, ac - Copy LO to HI and a GPR to LO and increment pos by 32 |
89a955e8 AM |
10565 | * |
10566 | * 3 2 1 | |
10567 | * 10987654321098765432109876543210 | |
5c65eed6 | 10568 | * 001000xxxxx 00001001111111 |
89a955e8 | 10569 | * rs ----- |
5c65eed6 | 10570 | * ac -- |
89a955e8 | 10571 | */ |
7def8a4b | 10572 | static char *MTHLIP(uint64 instruction, Dis_info *info) |
89a955e8 | 10573 | { |
89a955e8 | 10574 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
0f74e61d | 10575 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 10576 | |
3f2aec07 ML |
10577 | const char *rs = GPR(rs_value, info); |
10578 | const char *ac = AC(ac_value, info); | |
89a955e8 | 10579 | |
c5231692 | 10580 | return img_format("MTHLIP %s, %s", rs, ac); |
89a955e8 AM |
10581 | } |
10582 | ||
10583 | ||
10584 | /* | |
10585 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
10586 | * | |
10587 | * 3 2 1 | |
10588 | * 10987654321098765432109876543210 | |
10589 | * 001000 00010001101 | |
10590 | * rt ----- | |
10591 | * rs ----- | |
10592 | * rd ----- | |
10593 | */ | |
7def8a4b | 10594 | static char *MTHTR(uint64 instruction, Dis_info *info) |
89a955e8 AM |
10595 | { |
10596 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
10597 | uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction); | |
10598 | uint64 sel_value = extract_sel_15_14_13_12_11(instruction); | |
10599 | uint64 u_value = extract_u_10(instruction); | |
10600 | ||
3f2aec07 | 10601 | const char *rt = GPR(rt_value, info); |
89a955e8 | 10602 | |
4066c152 ML |
10603 | return img_format("MTHTR %s, 0x%" PRIx64 ", 0x%" PRIx64 ", 0x%" PRIx64, |
10604 | rt, c0s_value, u_value, sel_value); | |
89a955e8 AM |
10605 | } |
10606 | ||
10607 | ||
10608 | /* | |
5c65eed6 | 10609 | * [DSP] MTLO rs, ac - Move to LO register |
89a955e8 AM |
10610 | * |
10611 | * 3 2 1 | |
10612 | * 10987654321098765432109876543210 | |
5c65eed6 | 10613 | * 001000xxxxx 11000001111111 |
89a955e8 | 10614 | * rs ----- |
5c65eed6 | 10615 | * ac -- |
89a955e8 | 10616 | */ |
7def8a4b | 10617 | static char *MTLO_DSP_(uint64 instruction, Dis_info *info) |
89a955e8 | 10618 | { |
89a955e8 | 10619 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
0f74e61d | 10620 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 10621 | |
3f2aec07 ML |
10622 | const char *rs = GPR(rs_value, info); |
10623 | const char *ac = AC(ac_value, info); | |
89a955e8 | 10624 | |
c5231692 | 10625 | return img_format("MTLO %s, %s", rs, ac); |
89a955e8 AM |
10626 | } |
10627 | ||
10628 | ||
10629 | /* | |
10630 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
10631 | * | |
10632 | * 3 2 1 | |
10633 | * 10987654321098765432109876543210 | |
10634 | * 001000 00010001101 | |
10635 | * rt ----- | |
10636 | * rs ----- | |
10637 | * rd ----- | |
10638 | */ | |
7def8a4b | 10639 | static char *MTTR(uint64 instruction, Dis_info *info) |
89a955e8 AM |
10640 | { |
10641 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
10642 | uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction); | |
10643 | uint64 sel_value = extract_sel_15_14_13_12_11(instruction); | |
10644 | uint64 u_value = extract_u_10(instruction); | |
10645 | ||
3f2aec07 | 10646 | const char *rt = GPR(rt_value, info); |
89a955e8 | 10647 | |
4066c152 ML |
10648 | return img_format("MTTR %s, 0x%" PRIx64 ", 0x%" PRIx64 ", 0x%" PRIx64, |
10649 | rt, c0s_value, u_value, sel_value); | |
89a955e8 AM |
10650 | } |
10651 | ||
10652 | ||
10653 | /* | |
10654 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
10655 | * | |
10656 | * 3 2 1 | |
10657 | * 10987654321098765432109876543210 | |
10658 | * 001000 00010001101 | |
10659 | * rt ----- | |
10660 | * rs ----- | |
10661 | * rd ----- | |
10662 | */ | |
7def8a4b | 10663 | static char *MUH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
10664 | { |
10665 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 10666 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 10667 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 10668 | |
3f2aec07 ML |
10669 | const char *rd = GPR(rd_value, info); |
10670 | const char *rs = GPR(rs_value, info); | |
10671 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 10672 | |
c5231692 | 10673 | return img_format("MUH %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
10674 | } |
10675 | ||
10676 | ||
10677 | /* | |
10678 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
10679 | * | |
10680 | * 3 2 1 | |
10681 | * 10987654321098765432109876543210 | |
10682 | * 001000 00010001101 | |
10683 | * rt ----- | |
10684 | * rs ----- | |
10685 | * rd ----- | |
10686 | */ | |
7def8a4b | 10687 | static char *MUHU(uint64 instruction, Dis_info *info) |
89a955e8 AM |
10688 | { |
10689 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 10690 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 10691 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 10692 | |
3f2aec07 ML |
10693 | const char *rd = GPR(rd_value, info); |
10694 | const char *rs = GPR(rs_value, info); | |
10695 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 10696 | |
c5231692 | 10697 | return img_format("MUHU %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
10698 | } |
10699 | ||
10700 | ||
10701 | /* | |
10702 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
10703 | * | |
10704 | * 3 2 1 | |
10705 | * 10987654321098765432109876543210 | |
10706 | * 001000 00010001101 | |
10707 | * rt ----- | |
10708 | * rs ----- | |
10709 | * rd ----- | |
10710 | */ | |
7def8a4b | 10711 | static char *MUL_32_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
10712 | { |
10713 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 10714 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 10715 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 10716 | |
3f2aec07 ML |
10717 | const char *rd = GPR(rd_value, info); |
10718 | const char *rs = GPR(rs_value, info); | |
10719 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 10720 | |
c5231692 | 10721 | return img_format("MUL %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
10722 | } |
10723 | ||
10724 | ||
10725 | /* | |
10726 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
10727 | * | |
10728 | * 3 2 1 | |
10729 | * 10987654321098765432109876543210 | |
10730 | * 001000 00010001101 | |
10731 | * rt ----- | |
10732 | * rs ----- | |
10733 | * rd ----- | |
10734 | */ | |
7def8a4b | 10735 | static char *MUL_4X4_(uint64 instruction, Dis_info *info) |
89a955e8 | 10736 | { |
89a955e8 | 10737 | uint64 rt4_value = extract_rt4_9_7_6_5(instruction); |
75199b40 | 10738 | uint64 rs4_value = extract_rs4_4_2_1_0(instruction); |
89a955e8 | 10739 | |
3f2aec07 ML |
10740 | const char *rs4 = GPR(decode_gpr_gpr4(rs4_value, info), info); |
10741 | const char *rt4 = GPR(decode_gpr_gpr4(rt4_value, info), info); | |
89a955e8 | 10742 | |
c5231692 | 10743 | return img_format("MUL %s, %s", rs4, rt4); |
89a955e8 AM |
10744 | } |
10745 | ||
10746 | ||
10747 | /* | |
10748 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
10749 | * | |
10750 | * 3 2 1 | |
10751 | * 10987654321098765432109876543210 | |
10752 | * 001000 00010001101 | |
10753 | * rt ----- | |
10754 | * rs ----- | |
10755 | * rd ----- | |
10756 | */ | |
7def8a4b | 10757 | static char *MUL_D(uint64 instruction, Dis_info *info) |
89a955e8 | 10758 | { |
17ce2f00 | 10759 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 10760 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 10761 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 10762 | |
3f2aec07 ML |
10763 | const char *fd = FPR(fd_value, info); |
10764 | const char *fs = FPR(fs_value, info); | |
10765 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 10766 | |
c5231692 | 10767 | return img_format("MUL.D %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
10768 | } |
10769 | ||
10770 | ||
10771 | /* | |
5c65eed6 AM |
10772 | * [DSP] MUL.PH rd, rs, rt - Multiply vector integer half words to same size |
10773 | * products | |
89a955e8 AM |
10774 | * |
10775 | * 3 2 1 | |
10776 | * 10987654321098765432109876543210 | |
5c65eed6 | 10777 | * 001000 00000101101 |
89a955e8 AM |
10778 | * rt ----- |
10779 | * rs ----- | |
10780 | * rd ----- | |
10781 | */ | |
7def8a4b | 10782 | static char *MUL_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
10783 | { |
10784 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 10785 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 10786 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 10787 | |
3f2aec07 ML |
10788 | const char *rd = GPR(rd_value, info); |
10789 | const char *rs = GPR(rs_value, info); | |
10790 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 10791 | |
c5231692 | 10792 | return img_format("MUL.PH %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
10793 | } |
10794 | ||
10795 | ||
10796 | /* | |
5c65eed6 AM |
10797 | * [DSP] MUL_S.PH rd, rs, rt - Multiply vector integer half words to same size |
10798 | * products (saturated) | |
89a955e8 AM |
10799 | * |
10800 | * 3 2 1 | |
10801 | * 10987654321098765432109876543210 | |
5c65eed6 | 10802 | * 001000 10000101101 |
89a955e8 AM |
10803 | * rt ----- |
10804 | * rs ----- | |
10805 | * rd ----- | |
10806 | */ | |
7def8a4b | 10807 | static char *MUL_S_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
10808 | { |
10809 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 10810 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 10811 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 10812 | |
3f2aec07 ML |
10813 | const char *rd = GPR(rd_value, info); |
10814 | const char *rs = GPR(rs_value, info); | |
10815 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 10816 | |
c5231692 | 10817 | return img_format("MUL_S.PH %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
10818 | } |
10819 | ||
10820 | ||
10821 | /* | |
10822 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
10823 | * | |
10824 | * 3 2 1 | |
10825 | * 10987654321098765432109876543210 | |
10826 | * 001000 00010001101 | |
10827 | * rt ----- | |
10828 | * rs ----- | |
10829 | * rd ----- | |
10830 | */ | |
7def8a4b | 10831 | static char *MUL_S(uint64 instruction, Dis_info *info) |
89a955e8 | 10832 | { |
17ce2f00 | 10833 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 10834 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 10835 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 10836 | |
3f2aec07 ML |
10837 | const char *fd = FPR(fd_value, info); |
10838 | const char *fs = FPR(fs_value, info); | |
10839 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 10840 | |
c5231692 | 10841 | return img_format("MUL.S %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
10842 | } |
10843 | ||
10844 | ||
10845 | /* | |
5c65eed6 AM |
10846 | * [DSP] MULEQ_S.W.PHL rd, rs, rt - Multiply vector fractional left halfwords |
10847 | * to expanded width products | |
89a955e8 AM |
10848 | * |
10849 | * 3 2 1 | |
10850 | * 10987654321098765432109876543210 | |
5c65eed6 | 10851 | * 001000 x0000100101 |
89a955e8 AM |
10852 | * rt ----- |
10853 | * rs ----- | |
10854 | * rd ----- | |
10855 | */ | |
7def8a4b | 10856 | static char *MULEQ_S_W_PHL(uint64 instruction, Dis_info *info) |
89a955e8 AM |
10857 | { |
10858 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 10859 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 10860 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 10861 | |
3f2aec07 ML |
10862 | const char *rd = GPR(rd_value, info); |
10863 | const char *rs = GPR(rs_value, info); | |
10864 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 10865 | |
c5231692 | 10866 | return img_format("MULEQ_S.W.PHL %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
10867 | } |
10868 | ||
10869 | ||
10870 | /* | |
5c65eed6 AM |
10871 | * [DSP] MULEQ_S.W.PHR rd, rs, rt - Multiply vector fractional right halfwords |
10872 | * to expanded width products | |
89a955e8 AM |
10873 | * |
10874 | * 3 2 1 | |
10875 | * 10987654321098765432109876543210 | |
5c65eed6 | 10876 | * 001000 x0001100101 |
89a955e8 AM |
10877 | * rt ----- |
10878 | * rs ----- | |
10879 | * rd ----- | |
10880 | */ | |
7def8a4b | 10881 | static char *MULEQ_S_W_PHR(uint64 instruction, Dis_info *info) |
89a955e8 AM |
10882 | { |
10883 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 10884 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 10885 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 10886 | |
3f2aec07 ML |
10887 | const char *rd = GPR(rd_value, info); |
10888 | const char *rs = GPR(rs_value, info); | |
10889 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 10890 | |
c5231692 | 10891 | return img_format("MULEQ_S.W.PHR %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
10892 | } |
10893 | ||
10894 | ||
10895 | /* | |
5c65eed6 AM |
10896 | * [DSP] MULEU_S.PH.QBL rd, rs, rt - Multiply vector fractional left bytes |
10897 | * by halfwords to halfword products | |
89a955e8 AM |
10898 | * |
10899 | * 3 2 1 | |
10900 | * 10987654321098765432109876543210 | |
5c65eed6 | 10901 | * 001000 x0010010101 |
89a955e8 AM |
10902 | * rt ----- |
10903 | * rs ----- | |
10904 | * rd ----- | |
10905 | */ | |
7def8a4b | 10906 | static char *MULEU_S_PH_QBL(uint64 instruction, Dis_info *info) |
89a955e8 AM |
10907 | { |
10908 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 10909 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 10910 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 10911 | |
3f2aec07 ML |
10912 | const char *rd = GPR(rd_value, info); |
10913 | const char *rs = GPR(rs_value, info); | |
10914 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 10915 | |
c5231692 | 10916 | return img_format("MULEU_S.PH.QBL %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
10917 | } |
10918 | ||
10919 | ||
10920 | /* | |
5c65eed6 AM |
10921 | * [DSP] MULEU_S.PH.QBR rd, rs, rt - Multiply vector fractional right bytes |
10922 | * by halfwords to halfword products | |
89a955e8 AM |
10923 | * |
10924 | * 3 2 1 | |
10925 | * 10987654321098765432109876543210 | |
5c65eed6 | 10926 | * 001000 x0011010101 |
89a955e8 AM |
10927 | * rt ----- |
10928 | * rs ----- | |
10929 | * rd ----- | |
10930 | */ | |
7def8a4b | 10931 | static char *MULEU_S_PH_QBR(uint64 instruction, Dis_info *info) |
89a955e8 AM |
10932 | { |
10933 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 10934 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 10935 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 10936 | |
3f2aec07 ML |
10937 | const char *rd = GPR(rd_value, info); |
10938 | const char *rs = GPR(rs_value, info); | |
10939 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 10940 | |
c5231692 | 10941 | return img_format("MULEU_S.PH.QBR %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
10942 | } |
10943 | ||
10944 | ||
10945 | /* | |
5c65eed6 AM |
10946 | * [DSP] MULQ_RS.PH rd, rs, rt - Multiply vector fractional halfwords |
10947 | * to fractional halfword products | |
89a955e8 AM |
10948 | * |
10949 | * 3 2 1 | |
10950 | * 10987654321098765432109876543210 | |
5c65eed6 | 10951 | * 001000 x0100010101 |
89a955e8 AM |
10952 | * rt ----- |
10953 | * rs ----- | |
10954 | * rd ----- | |
10955 | */ | |
7def8a4b | 10956 | static char *MULQ_RS_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
10957 | { |
10958 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 10959 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 10960 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 10961 | |
3f2aec07 ML |
10962 | const char *rd = GPR(rd_value, info); |
10963 | const char *rs = GPR(rs_value, info); | |
10964 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 10965 | |
c5231692 | 10966 | return img_format("MULQ_RS.PH %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
10967 | } |
10968 | ||
10969 | ||
10970 | /* | |
5c65eed6 AM |
10971 | * [DSP] MULQ_RS.W rd, rs, rt - Multiply fractional words to same size |
10972 | * product with saturation and rounding | |
89a955e8 AM |
10973 | * |
10974 | * 3 2 1 | |
10975 | * 10987654321098765432109876543210 | |
5c65eed6 | 10976 | * 001000 x0110010101 |
89a955e8 AM |
10977 | * rt ----- |
10978 | * rs ----- | |
10979 | * rd ----- | |
10980 | */ | |
7def8a4b | 10981 | static char *MULQ_RS_W(uint64 instruction, Dis_info *info) |
89a955e8 AM |
10982 | { |
10983 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 10984 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 10985 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 10986 | |
3f2aec07 ML |
10987 | const char *rd = GPR(rd_value, info); |
10988 | const char *rs = GPR(rs_value, info); | |
10989 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 10990 | |
c5231692 | 10991 | return img_format("MULQ_RS.W %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
10992 | } |
10993 | ||
10994 | ||
10995 | /* | |
5c65eed6 AM |
10996 | * [DSP] MULQ_S.PH rd, rs, rt - Multiply fractional halfwords to same size |
10997 | * products | |
89a955e8 AM |
10998 | * |
10999 | * 3 2 1 | |
11000 | * 10987654321098765432109876543210 | |
5c65eed6 | 11001 | * 001000 x0101010101 |
89a955e8 AM |
11002 | * rt ----- |
11003 | * rs ----- | |
11004 | * rd ----- | |
11005 | */ | |
7def8a4b | 11006 | static char *MULQ_S_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
11007 | { |
11008 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 11009 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 11010 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 11011 | |
3f2aec07 ML |
11012 | const char *rd = GPR(rd_value, info); |
11013 | const char *rs = GPR(rs_value, info); | |
11014 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 11015 | |
c5231692 | 11016 | return img_format("MULQ_S.PH %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
11017 | } |
11018 | ||
11019 | ||
11020 | /* | |
5c65eed6 AM |
11021 | * [DSP] MULQ_S.W rd, rs, rt - Multiply fractional words to same size product |
11022 | * with saturation | |
89a955e8 AM |
11023 | * |
11024 | * 3 2 1 | |
11025 | * 10987654321098765432109876543210 | |
5c65eed6 | 11026 | * 001000 x0111010101 |
89a955e8 AM |
11027 | * rt ----- |
11028 | * rs ----- | |
11029 | * rd ----- | |
11030 | */ | |
7def8a4b | 11031 | static char *MULQ_S_W(uint64 instruction, Dis_info *info) |
89a955e8 AM |
11032 | { |
11033 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 11034 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 11035 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 11036 | |
3f2aec07 ML |
11037 | const char *rd = GPR(rd_value, info); |
11038 | const char *rs = GPR(rs_value, info); | |
11039 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 11040 | |
c5231692 | 11041 | return img_format("MULQ_S.W %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
11042 | } |
11043 | ||
11044 | ||
11045 | /* | |
5c65eed6 AM |
11046 | * [DSP] MULSA.W.PH ac, rs, rt - Multiply and subtract vector integer halfword |
11047 | * elements and accumulate | |
89a955e8 AM |
11048 | * |
11049 | * 3 2 1 | |
11050 | * 10987654321098765432109876543210 | |
5c65eed6 | 11051 | * 001000 10110010111111 |
89a955e8 AM |
11052 | * rt ----- |
11053 | * rs ----- | |
5c65eed6 | 11054 | * ac -- |
89a955e8 | 11055 | */ |
7def8a4b | 11056 | static char *MULSA_W_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
11057 | { |
11058 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 11059 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
0f74e61d | 11060 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 11061 | |
3f2aec07 ML |
11062 | const char *ac = AC(ac_value, info); |
11063 | const char *rs = GPR(rs_value, info); | |
11064 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 11065 | |
c5231692 | 11066 | return img_format("MULSA.W.PH %s, %s, %s", ac, rs, rt); |
89a955e8 AM |
11067 | } |
11068 | ||
11069 | ||
11070 | /* | |
5c65eed6 AM |
11071 | * [DSP] MULSAQ_S.W.PH ac, rs, rt - Multiply and subtract vector fractional |
11072 | * halfwords and accumulate | |
89a955e8 AM |
11073 | * |
11074 | * 3 2 1 | |
11075 | * 10987654321098765432109876543210 | |
5c65eed6 | 11076 | * 001000 11110010111111 |
89a955e8 AM |
11077 | * rt ----- |
11078 | * rs ----- | |
5c65eed6 | 11079 | * ac -- |
89a955e8 | 11080 | */ |
7def8a4b | 11081 | static char *MULSAQ_S_W_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
11082 | { |
11083 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 11084 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
0f74e61d | 11085 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 11086 | |
3f2aec07 ML |
11087 | const char *ac = AC(ac_value, info); |
11088 | const char *rs = GPR(rs_value, info); | |
11089 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 11090 | |
c5231692 | 11091 | return img_format("MULSAQ_S.W.PH %s, %s, %s", ac, rs, rt); |
89a955e8 AM |
11092 | } |
11093 | ||
11094 | ||
11095 | /* | |
5c65eed6 | 11096 | * [DSP] MULT ac, rs, rt - Multiply word |
89a955e8 AM |
11097 | * |
11098 | * 3 2 1 | |
11099 | * 10987654321098765432109876543210 | |
5c65eed6 | 11100 | * 001000 00110010111111 |
89a955e8 AM |
11101 | * rt ----- |
11102 | * rs ----- | |
5c65eed6 | 11103 | * ac -- |
89a955e8 | 11104 | */ |
7def8a4b | 11105 | static char *MULT_DSP_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
11106 | { |
11107 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 11108 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
0f74e61d | 11109 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 11110 | |
3f2aec07 ML |
11111 | const char *ac = AC(ac_value, info); |
11112 | const char *rs = GPR(rs_value, info); | |
11113 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 11114 | |
c5231692 | 11115 | return img_format("MULT %s, %s, %s", ac, rs, rt); |
89a955e8 AM |
11116 | } |
11117 | ||
11118 | ||
11119 | /* | |
5c65eed6 | 11120 | * [DSP] MULTU ac, rs, rt - Multiply unsigned word |
89a955e8 AM |
11121 | * |
11122 | * 3 2 1 | |
11123 | * 10987654321098765432109876543210 | |
5c65eed6 | 11124 | * 001000 01110010111111 |
89a955e8 AM |
11125 | * rt ----- |
11126 | * rs ----- | |
5c65eed6 | 11127 | * ac -- |
89a955e8 | 11128 | */ |
7def8a4b | 11129 | static char *MULTU_DSP_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
11130 | { |
11131 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 11132 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
0f74e61d | 11133 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 11134 | |
3f2aec07 ML |
11135 | const char *ac = AC(ac_value, info); |
11136 | const char *rs = GPR(rs_value, info); | |
11137 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 11138 | |
c5231692 | 11139 | return img_format("MULTU %s, %s, %s", ac, rs, rt); |
89a955e8 AM |
11140 | } |
11141 | ||
11142 | ||
11143 | /* | |
11144 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
11145 | * | |
11146 | * 3 2 1 | |
11147 | * 10987654321098765432109876543210 | |
11148 | * 001000 00010001101 | |
11149 | * rt ----- | |
11150 | * rs ----- | |
11151 | * rd ----- | |
11152 | */ | |
7def8a4b | 11153 | static char *MULU(uint64 instruction, Dis_info *info) |
89a955e8 AM |
11154 | { |
11155 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 11156 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 11157 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 11158 | |
3f2aec07 ML |
11159 | const char *rd = GPR(rd_value, info); |
11160 | const char *rs = GPR(rs_value, info); | |
11161 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 11162 | |
c5231692 | 11163 | return img_format("MULU %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
11164 | } |
11165 | ||
11166 | ||
11167 | /* | |
11168 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
11169 | * | |
11170 | * 3 2 1 | |
11171 | * 10987654321098765432109876543210 | |
11172 | * 001000 00010001101 | |
11173 | * rt ----- | |
11174 | * rs ----- | |
11175 | * rd ----- | |
11176 | */ | |
7def8a4b | 11177 | static char *NEG_D(uint64 instruction, Dis_info *info) |
89a955e8 | 11178 | { |
17ce2f00 | 11179 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 11180 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 11181 | |
3f2aec07 ML |
11182 | const char *ft = FPR(ft_value, info); |
11183 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 11184 | |
c5231692 | 11185 | return img_format("NEG.D %s, %s", ft, fs); |
89a955e8 AM |
11186 | } |
11187 | ||
11188 | ||
11189 | /* | |
11190 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
11191 | * | |
11192 | * 3 2 1 | |
11193 | * 10987654321098765432109876543210 | |
11194 | * 001000 00010001101 | |
11195 | * rt ----- | |
11196 | * rs ----- | |
11197 | * rd ----- | |
11198 | */ | |
7def8a4b | 11199 | static char *NEG_S(uint64 instruction, Dis_info *info) |
89a955e8 | 11200 | { |
17ce2f00 | 11201 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 11202 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 11203 | |
3f2aec07 ML |
11204 | const char *ft = FPR(ft_value, info); |
11205 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 11206 | |
c5231692 | 11207 | return img_format("NEG.S %s, %s", ft, fs); |
89a955e8 AM |
11208 | } |
11209 | ||
11210 | ||
11211 | /* | |
11212 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
11213 | * | |
11214 | * 3 2 1 | |
11215 | * 10987654321098765432109876543210 | |
11216 | * 001000 00010001101 | |
11217 | * rt ----- | |
11218 | * rs ----- | |
11219 | * rd ----- | |
11220 | */ | |
7def8a4b | 11221 | static char *NOP_16_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
11222 | { |
11223 | (void)instruction; | |
11224 | ||
7def8a4b | 11225 | return g_strdup("NOP "); |
89a955e8 AM |
11226 | } |
11227 | ||
11228 | ||
11229 | /* | |
11230 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
11231 | * | |
11232 | * 3 2 1 | |
11233 | * 10987654321098765432109876543210 | |
11234 | * 001000 00010001101 | |
11235 | * rt ----- | |
11236 | * rs ----- | |
11237 | * rd ----- | |
11238 | */ | |
7def8a4b | 11239 | static char *NOP_32_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
11240 | { |
11241 | (void)instruction; | |
11242 | ||
7def8a4b | 11243 | return g_strdup("NOP "); |
89a955e8 AM |
11244 | } |
11245 | ||
11246 | ||
11247 | /* | |
11248 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
11249 | * | |
11250 | * 3 2 1 | |
11251 | * 10987654321098765432109876543210 | |
11252 | * 001000 00010001101 | |
11253 | * rt ----- | |
11254 | * rs ----- | |
11255 | * rd ----- | |
11256 | */ | |
7def8a4b | 11257 | static char *NOR(uint64 instruction, Dis_info *info) |
89a955e8 AM |
11258 | { |
11259 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 11260 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 11261 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 11262 | |
3f2aec07 ML |
11263 | const char *rd = GPR(rd_value, info); |
11264 | const char *rs = GPR(rs_value, info); | |
11265 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 11266 | |
c5231692 | 11267 | return img_format("NOR %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
11268 | } |
11269 | ||
11270 | ||
11271 | /* | |
11272 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
11273 | * | |
11274 | * 3 2 1 | |
11275 | * 10987654321098765432109876543210 | |
11276 | * 001000 00010001101 | |
11277 | * rt ----- | |
11278 | * rs ----- | |
11279 | * rd ----- | |
11280 | */ | |
7def8a4b | 11281 | static char *NOT_16_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
11282 | { |
11283 | uint64 rt3_value = extract_rt3_9_8_7(instruction); | |
11284 | uint64 rs3_value = extract_rs3_6_5_4(instruction); | |
11285 | ||
3f2aec07 ML |
11286 | const char *rt3 = GPR(decode_gpr_gpr3(rt3_value, info), info); |
11287 | const char *rs3 = GPR(decode_gpr_gpr3(rs3_value, info), info); | |
89a955e8 | 11288 | |
c5231692 | 11289 | return img_format("NOT %s, %s", rt3, rs3); |
89a955e8 AM |
11290 | } |
11291 | ||
11292 | ||
11293 | /* | |
11294 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
11295 | * | |
11296 | * 3 2 1 | |
11297 | * 10987654321098765432109876543210 | |
11298 | * 001000 00010001101 | |
11299 | * rt ----- | |
11300 | * rs ----- | |
11301 | * rd ----- | |
11302 | */ | |
7def8a4b | 11303 | static char *OR_16_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
11304 | { |
11305 | uint64 rt3_value = extract_rt3_9_8_7(instruction); | |
11306 | uint64 rs3_value = extract_rs3_6_5_4(instruction); | |
11307 | ||
3f2aec07 ML |
11308 | const char *rs3 = GPR(decode_gpr_gpr3(rs3_value, info), info); |
11309 | const char *rt3 = GPR(decode_gpr_gpr3(rt3_value, info), info); | |
89a955e8 | 11310 | |
c5231692 | 11311 | return img_format("OR %s, %s", rs3, rt3); |
89a955e8 AM |
11312 | } |
11313 | ||
11314 | ||
11315 | /* | |
11316 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
11317 | * | |
11318 | * 3 2 1 | |
11319 | * 10987654321098765432109876543210 | |
11320 | * 001000 00010001101 | |
11321 | * rt ----- | |
11322 | * rs ----- | |
11323 | * rd ----- | |
11324 | */ | |
7def8a4b | 11325 | static char *OR_32_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
11326 | { |
11327 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 11328 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 11329 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 11330 | |
3f2aec07 ML |
11331 | const char *rd = GPR(rd_value, info); |
11332 | const char *rs = GPR(rs_value, info); | |
11333 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 11334 | |
c5231692 | 11335 | return img_format("OR %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
11336 | } |
11337 | ||
11338 | ||
11339 | /* | |
11340 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
11341 | * | |
11342 | * 3 2 1 | |
11343 | * 10987654321098765432109876543210 | |
11344 | * 001000 00010001101 | |
11345 | * rt ----- | |
11346 | * rs ----- | |
11347 | * rd ----- | |
11348 | */ | |
7def8a4b | 11349 | static char *ORI(uint64 instruction, Dis_info *info) |
89a955e8 AM |
11350 | { |
11351 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 11352 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 11353 | uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 11354 | |
3f2aec07 ML |
11355 | const char *rt = GPR(rt_value, info); |
11356 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 11357 | |
4066c152 | 11358 | return img_format("ORI %s, %s, 0x%" PRIx64, rt, rs, u_value); |
89a955e8 AM |
11359 | } |
11360 | ||
11361 | ||
11362 | /* | |
fc95c241 AM |
11363 | * [DSP] PACKRL.PH rd, rs, rt - Pack a word using the right halfword from one |
11364 | * source register and left halfword from another source register | |
89a955e8 AM |
11365 | * |
11366 | * 3 2 1 | |
11367 | * 10987654321098765432109876543210 | |
11368 | * 001000 00010001101 | |
11369 | * rt ----- | |
11370 | * rs ----- | |
11371 | * rd ----- | |
11372 | */ | |
7def8a4b | 11373 | static char *PACKRL_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
11374 | { |
11375 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 11376 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 11377 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 11378 | |
3f2aec07 ML |
11379 | const char *rd = GPR(rd_value, info); |
11380 | const char *rs = GPR(rs_value, info); | |
11381 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 11382 | |
c5231692 | 11383 | return img_format("PACKRL.PH %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
11384 | } |
11385 | ||
11386 | ||
11387 | /* | |
11388 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
11389 | * | |
11390 | * 3 2 1 | |
11391 | * 10987654321098765432109876543210 | |
11392 | * 001000 00010001101 | |
11393 | * rt ----- | |
11394 | * rs ----- | |
11395 | * rd ----- | |
11396 | */ | |
7def8a4b | 11397 | static char *PAUSE(uint64 instruction, Dis_info *info) |
89a955e8 AM |
11398 | { |
11399 | (void)instruction; | |
11400 | ||
7def8a4b | 11401 | return g_strdup("PAUSE "); |
89a955e8 AM |
11402 | } |
11403 | ||
11404 | ||
11405 | /* | |
fc95c241 AM |
11406 | * [DSP] PICK.PH rd, rs, rt - Pick a vector of halfwords based on condition |
11407 | * code bits | |
89a955e8 AM |
11408 | * |
11409 | * 3 2 1 | |
11410 | * 10987654321098765432109876543210 | |
11411 | * 001000 00010001101 | |
11412 | * rt ----- | |
11413 | * rs ----- | |
11414 | * rd ----- | |
11415 | */ | |
7def8a4b | 11416 | static char *PICK_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
11417 | { |
11418 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 11419 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 11420 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 11421 | |
3f2aec07 ML |
11422 | const char *rd = GPR(rd_value, info); |
11423 | const char *rs = GPR(rs_value, info); | |
11424 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 11425 | |
c5231692 | 11426 | return img_format("PICK.PH %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
11427 | } |
11428 | ||
11429 | ||
11430 | /* | |
fc95c241 AM |
11431 | * [DSP] PICK.QB rd, rs, rt - Pick a vector of byte values based on condition |
11432 | * code bits | |
89a955e8 AM |
11433 | * |
11434 | * 3 2 1 | |
11435 | * 10987654321098765432109876543210 | |
11436 | * 001000 00010001101 | |
11437 | * rt ----- | |
11438 | * rs ----- | |
11439 | * rd ----- | |
11440 | */ | |
7def8a4b | 11441 | static char *PICK_QB(uint64 instruction, Dis_info *info) |
89a955e8 AM |
11442 | { |
11443 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 11444 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 11445 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 11446 | |
3f2aec07 ML |
11447 | const char *rd = GPR(rd_value, info); |
11448 | const char *rs = GPR(rs_value, info); | |
11449 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 11450 | |
c5231692 | 11451 | return img_format("PICK.QB %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
11452 | } |
11453 | ||
11454 | ||
11455 | /* | |
fc95c241 AM |
11456 | * [DSP] PRECEQ.W.PHL rt, rs - Expand the precision of the left-most element |
11457 | * of a paired halfword | |
89a955e8 AM |
11458 | * |
11459 | * 3 2 1 | |
11460 | * 10987654321098765432109876543210 | |
11461 | * 001000 00010001101 | |
11462 | * rt ----- | |
11463 | * rs ----- | |
11464 | * rd ----- | |
11465 | */ | |
7def8a4b | 11466 | static char *PRECEQ_W_PHL(uint64 instruction, Dis_info *info) |
89a955e8 AM |
11467 | { |
11468 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
11469 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
11470 | ||
3f2aec07 ML |
11471 | const char *rt = GPR(rt_value, info); |
11472 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 11473 | |
c5231692 | 11474 | return img_format("PRECEQ.W.PHL %s, %s", rt, rs); |
89a955e8 AM |
11475 | } |
11476 | ||
11477 | ||
11478 | /* | |
fc95c241 AM |
11479 | * [DSP] PRECEQ.W.PHR rt, rs - Expand the precision of the right-most element |
11480 | * of a paired halfword | |
89a955e8 AM |
11481 | * |
11482 | * 3 2 1 | |
11483 | * 10987654321098765432109876543210 | |
11484 | * 001000 00010001101 | |
11485 | * rt ----- | |
11486 | * rs ----- | |
11487 | * rd ----- | |
11488 | */ | |
7def8a4b | 11489 | static char *PRECEQ_W_PHR(uint64 instruction, Dis_info *info) |
89a955e8 AM |
11490 | { |
11491 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
11492 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
11493 | ||
3f2aec07 ML |
11494 | const char *rt = GPR(rt_value, info); |
11495 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 11496 | |
c5231692 | 11497 | return img_format("PRECEQ.W.PHR %s, %s", rt, rs); |
89a955e8 AM |
11498 | } |
11499 | ||
11500 | ||
11501 | /* | |
fc95c241 AM |
11502 | * [DSP] PRECEQU.PH.QBLA rt, rs - Expand the precision of the two |
11503 | * left-alternate elements of a quad byte vector | |
89a955e8 AM |
11504 | * |
11505 | * 3 2 1 | |
11506 | * 10987654321098765432109876543210 | |
11507 | * 001000 00010001101 | |
11508 | * rt ----- | |
11509 | * rs ----- | |
11510 | * rd ----- | |
11511 | */ | |
7def8a4b | 11512 | static char *PRECEQU_PH_QBLA(uint64 instruction, Dis_info *info) |
89a955e8 AM |
11513 | { |
11514 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
11515 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
11516 | ||
3f2aec07 ML |
11517 | const char *rt = GPR(rt_value, info); |
11518 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 11519 | |
c5231692 | 11520 | return img_format("PRECEQU.PH.QBLA %s, %s", rt, rs); |
89a955e8 AM |
11521 | } |
11522 | ||
11523 | ||
11524 | /* | |
fc95c241 AM |
11525 | * [DSP] PRECEQU.PH.QBL rt, rs - Expand the precision of the two left-most |
11526 | * elements of a quad byte vector | |
89a955e8 AM |
11527 | * |
11528 | * 3 2 1 | |
11529 | * 10987654321098765432109876543210 | |
11530 | * 001000 00010001101 | |
11531 | * rt ----- | |
11532 | * rs ----- | |
11533 | * rd ----- | |
11534 | */ | |
7def8a4b | 11535 | static char *PRECEQU_PH_QBL(uint64 instruction, Dis_info *info) |
89a955e8 AM |
11536 | { |
11537 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
11538 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
11539 | ||
3f2aec07 ML |
11540 | const char *rt = GPR(rt_value, info); |
11541 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 11542 | |
c5231692 | 11543 | return img_format("PRECEQU.PH.QBL %s, %s", rt, rs); |
89a955e8 AM |
11544 | } |
11545 | ||
11546 | ||
11547 | /* | |
fc95c241 AM |
11548 | * [DSP] PRECEQU.PH.QBRA rt, rs - Expand the precision of the two |
11549 | * right-alternate elements of a quad byte vector | |
89a955e8 AM |
11550 | * |
11551 | * 3 2 1 | |
11552 | * 10987654321098765432109876543210 | |
11553 | * 001000 00010001101 | |
11554 | * rt ----- | |
11555 | * rs ----- | |
11556 | * rd ----- | |
11557 | */ | |
7def8a4b | 11558 | static char *PRECEQU_PH_QBRA(uint64 instruction, Dis_info *info) |
89a955e8 AM |
11559 | { |
11560 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
11561 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
11562 | ||
3f2aec07 ML |
11563 | const char *rt = GPR(rt_value, info); |
11564 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 11565 | |
c5231692 | 11566 | return img_format("PRECEQU.PH.QBRA %s, %s", rt, rs); |
89a955e8 AM |
11567 | } |
11568 | ||
11569 | ||
11570 | /* | |
fc95c241 AM |
11571 | * [DSP] PRECEQU.PH.QBR rt, rs - Expand the precision of the two right-most |
11572 | * elements of a quad byte vector | |
89a955e8 AM |
11573 | * |
11574 | * 3 2 1 | |
11575 | * 10987654321098765432109876543210 | |
11576 | * 001000 00010001101 | |
11577 | * rt ----- | |
11578 | * rs ----- | |
11579 | * rd ----- | |
11580 | */ | |
7def8a4b | 11581 | static char *PRECEQU_PH_QBR(uint64 instruction, Dis_info *info) |
89a955e8 AM |
11582 | { |
11583 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
11584 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
11585 | ||
3f2aec07 ML |
11586 | const char *rt = GPR(rt_value, info); |
11587 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 11588 | |
c5231692 | 11589 | return img_format("PRECEQU.PH.QBR %s, %s", rt, rs); |
89a955e8 AM |
11590 | } |
11591 | ||
11592 | ||
11593 | /* | |
fc95c241 AM |
11594 | * [DSP] PRECEU.PH.QBLA rt, rs - Expand the precision of the two |
11595 | * left-alternate elements of a quad byte vector to four unsigned | |
11596 | * halfwords | |
89a955e8 AM |
11597 | * |
11598 | * 3 2 1 | |
11599 | * 10987654321098765432109876543210 | |
11600 | * 001000 00010001101 | |
11601 | * rt ----- | |
11602 | * rs ----- | |
11603 | * rd ----- | |
11604 | */ | |
7def8a4b | 11605 | static char *PRECEU_PH_QBLA(uint64 instruction, Dis_info *info) |
89a955e8 AM |
11606 | { |
11607 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
11608 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
11609 | ||
3f2aec07 ML |
11610 | const char *rt = GPR(rt_value, info); |
11611 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 11612 | |
c5231692 | 11613 | return img_format("PRECEU.PH.QBLA %s, %s", rt, rs); |
89a955e8 AM |
11614 | } |
11615 | ||
11616 | ||
11617 | /* | |
fc95c241 AM |
11618 | * [DSP] PRECEU.PH.QBL rt, rs - Expand the precision of the two left-most |
11619 | * elements of a quad byte vector to form unsigned halfwords | |
89a955e8 AM |
11620 | * |
11621 | * 3 2 1 | |
11622 | * 10987654321098765432109876543210 | |
11623 | * 001000 00010001101 | |
11624 | * rt ----- | |
11625 | * rs ----- | |
11626 | * rd ----- | |
11627 | */ | |
7def8a4b | 11628 | static char *PRECEU_PH_QBL(uint64 instruction, Dis_info *info) |
89a955e8 AM |
11629 | { |
11630 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
11631 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
11632 | ||
3f2aec07 ML |
11633 | const char *rt = GPR(rt_value, info); |
11634 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 11635 | |
c5231692 | 11636 | return img_format("PRECEU.PH.QBL %s, %s", rt, rs); |
89a955e8 AM |
11637 | } |
11638 | ||
11639 | ||
11640 | /* | |
fc95c241 AM |
11641 | * [DSP] PRECEU.PH.QBRA rt, rs - Expand the precision of the two |
11642 | * right-alternate elements of a quad byte vector to form four | |
11643 | * unsigned halfwords | |
89a955e8 AM |
11644 | * |
11645 | * 3 2 1 | |
11646 | * 10987654321098765432109876543210 | |
11647 | * 001000 00010001101 | |
11648 | * rt ----- | |
11649 | * rs ----- | |
11650 | * rd ----- | |
11651 | */ | |
7def8a4b | 11652 | static char *PRECEU_PH_QBRA(uint64 instruction, Dis_info *info) |
89a955e8 AM |
11653 | { |
11654 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
11655 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
11656 | ||
3f2aec07 ML |
11657 | const char *rt = GPR(rt_value, info); |
11658 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 11659 | |
c5231692 | 11660 | return img_format("PRECEU.PH.QBRA %s, %s", rt, rs); |
89a955e8 AM |
11661 | } |
11662 | ||
11663 | ||
11664 | /* | |
fc95c241 AM |
11665 | * [DSP] PRECEU.PH.QBR rt, rs - Expand the precision of the two right-most |
11666 | * elements of a quad byte vector to form unsigned halfwords | |
89a955e8 AM |
11667 | * |
11668 | * 3 2 1 | |
11669 | * 10987654321098765432109876543210 | |
11670 | * 001000 00010001101 | |
11671 | * rt ----- | |
11672 | * rs ----- | |
11673 | * rd ----- | |
11674 | */ | |
7def8a4b | 11675 | static char *PRECEU_PH_QBR(uint64 instruction, Dis_info *info) |
89a955e8 AM |
11676 | { |
11677 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
11678 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
11679 | ||
3f2aec07 ML |
11680 | const char *rt = GPR(rt_value, info); |
11681 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 11682 | |
c5231692 | 11683 | return img_format("PRECEU.PH.QBR %s, %s", rt, rs); |
89a955e8 AM |
11684 | } |
11685 | ||
11686 | ||
11687 | /* | |
5c65eed6 AM |
11688 | * [DSP] PRECR.QB.PH rd, rs, rt - Reduce the precision of four integer |
11689 | * halfwords to four bytes | |
89a955e8 AM |
11690 | * |
11691 | * 3 2 1 | |
11692 | * 10987654321098765432109876543210 | |
5c65eed6 | 11693 | * 001000 x0001101101 |
89a955e8 AM |
11694 | * rt ----- |
11695 | * rs ----- | |
11696 | * rd ----- | |
11697 | */ | |
7def8a4b | 11698 | static char *PRECR_QB_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
11699 | { |
11700 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 11701 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 11702 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 11703 | |
3f2aec07 ML |
11704 | const char *rd = GPR(rd_value, info); |
11705 | const char *rs = GPR(rs_value, info); | |
11706 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 11707 | |
c5231692 | 11708 | return img_format("PRECR.QB.PH %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
11709 | } |
11710 | ||
11711 | ||
11712 | /* | |
5c65eed6 AM |
11713 | * [DSP] PRECR_SRA.PH.W rt, rs, sa - Reduce the precision of two integer |
11714 | * words to halfwords after a right shift | |
89a955e8 AM |
11715 | * |
11716 | * 3 2 1 | |
11717 | * 10987654321098765432109876543210 | |
11718 | * 001000 x1110000101 | |
11719 | * rt ----- | |
11720 | * rs ----- | |
11721 | * rd ----- | |
11722 | */ | |
7def8a4b | 11723 | static char *PRECR_SRA_PH_W(uint64 instruction, Dis_info *info) |
89a955e8 AM |
11724 | { |
11725 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 11726 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 11727 | uint64 sa_value = extract_sa_15_14_13_12_11(instruction); |
89a955e8 | 11728 | |
3f2aec07 ML |
11729 | const char *rt = GPR(rt_value, info); |
11730 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 11731 | |
4066c152 | 11732 | return img_format("PRECR_SRA.PH.W %s, %s, 0x%" PRIx64, rt, rs, sa_value); |
89a955e8 AM |
11733 | } |
11734 | ||
11735 | ||
11736 | /* | |
5c65eed6 AM |
11737 | * [DSP] PRECR_SRA_R.PH.W rt, rs, sa - Reduce the precision of two integer |
11738 | * words to halfwords after a right shift with rounding | |
89a955e8 AM |
11739 | * |
11740 | * 3 2 1 | |
11741 | * 10987654321098765432109876543210 | |
11742 | * 001000 x1110000101 | |
11743 | * rt ----- | |
11744 | * rs ----- | |
11745 | * rd ----- | |
11746 | */ | |
7def8a4b | 11747 | static char *PRECR_SRA_R_PH_W(uint64 instruction, Dis_info *info) |
89a955e8 AM |
11748 | { |
11749 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 11750 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 11751 | uint64 sa_value = extract_sa_15_14_13_12_11(instruction); |
89a955e8 | 11752 | |
3f2aec07 ML |
11753 | const char *rt = GPR(rt_value, info); |
11754 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 11755 | |
4066c152 | 11756 | return img_format("PRECR_SRA_R.PH.W %s, %s, 0x%" PRIx64, rt, rs, sa_value); |
89a955e8 AM |
11757 | } |
11758 | ||
11759 | ||
11760 | /* | |
5c65eed6 AM |
11761 | * [DSP] PRECRQ.PH.W rd, rs, rt - Reduce the precision of fractional |
11762 | * words to fractional halfwords | |
89a955e8 AM |
11763 | * |
11764 | * 3 2 1 | |
11765 | * 10987654321098765432109876543210 | |
11766 | * 001000 x1110000101 | |
11767 | * rt ----- | |
11768 | * rs ----- | |
11769 | * rd ----- | |
11770 | */ | |
7def8a4b | 11771 | static char *PRECRQ_PH_W(uint64 instruction, Dis_info *info) |
89a955e8 AM |
11772 | { |
11773 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 11774 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 11775 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 11776 | |
3f2aec07 ML |
11777 | const char *rd = GPR(rd_value, info); |
11778 | const char *rs = GPR(rs_value, info); | |
11779 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 11780 | |
c5231692 | 11781 | return img_format("PRECRQ.PH.W %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
11782 | } |
11783 | ||
11784 | ||
11785 | /* | |
5c65eed6 AM |
11786 | * [DSP] PRECRQ.QB.PH rd, rs, rt - Reduce the precision of four fractional |
11787 | * halfwords to four bytes | |
89a955e8 AM |
11788 | * |
11789 | * 3 2 1 | |
11790 | * 10987654321098765432109876543210 | |
5c65eed6 | 11791 | * 001000 x0010101101 |
89a955e8 AM |
11792 | * rt ----- |
11793 | * rs ----- | |
11794 | * rd ----- | |
11795 | */ | |
7def8a4b | 11796 | static char *PRECRQ_QB_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
11797 | { |
11798 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 11799 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 11800 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 11801 | |
3f2aec07 ML |
11802 | const char *rd = GPR(rd_value, info); |
11803 | const char *rs = GPR(rs_value, info); | |
11804 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 11805 | |
c5231692 | 11806 | return img_format("PRECRQ.QB.PH %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
11807 | } |
11808 | ||
11809 | ||
11810 | /* | |
5c65eed6 AM |
11811 | * [DSP] PRECRQ_RS.PH.W rd, rs, rt - Reduce the precision of fractional |
11812 | * words to halfwords with rounding and saturation | |
89a955e8 AM |
11813 | * |
11814 | * 3 2 1 | |
11815 | * 10987654321098765432109876543210 | |
11816 | * 001000 x1110000101 | |
11817 | * rt ----- | |
11818 | * rs ----- | |
11819 | * rd ----- | |
11820 | */ | |
7def8a4b | 11821 | static char *PRECRQ_RS_PH_W(uint64 instruction, Dis_info *info) |
89a955e8 AM |
11822 | { |
11823 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 11824 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 11825 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 11826 | |
3f2aec07 ML |
11827 | const char *rd = GPR(rd_value, info); |
11828 | const char *rs = GPR(rs_value, info); | |
11829 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 11830 | |
c5231692 | 11831 | return img_format("PRECRQ_RS.PH.W %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
11832 | } |
11833 | ||
11834 | ||
11835 | /* | |
5c65eed6 AM |
11836 | * [DSP] PRECRQU_S.QB.PH rd, rs, rt - Reduce the precision of fractional |
11837 | * halfwords to unsigned bytes with saturation | |
89a955e8 AM |
11838 | * |
11839 | * 3 2 1 | |
11840 | * 10987654321098765432109876543210 | |
11841 | * 001000 x1110000101 | |
11842 | * rt ----- | |
11843 | * rs ----- | |
11844 | * rd ----- | |
11845 | */ | |
7def8a4b | 11846 | static char *PRECRQU_S_QB_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
11847 | { |
11848 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 11849 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 11850 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 11851 | |
3f2aec07 ML |
11852 | const char *rd = GPR(rd_value, info); |
11853 | const char *rs = GPR(rs_value, info); | |
11854 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 11855 | |
c5231692 | 11856 | return img_format("PRECRQU_S.QB.PH %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
11857 | } |
11858 | ||
11859 | ||
11860 | /* | |
11861 | * | |
11862 | * | |
11863 | * 3 2 1 | |
11864 | * 10987654321098765432109876543210 | |
11865 | * 001000 x1110000101 | |
11866 | * rt ----- | |
11867 | * rs ----- | |
11868 | * rd ----- | |
11869 | */ | |
7def8a4b | 11870 | static char *PREF_S9_(uint64 instruction, Dis_info *info) |
89a955e8 | 11871 | { |
89a955e8 AM |
11872 | uint64 hint_value = extract_hint_25_24_23_22_21(instruction); |
11873 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
d3605cc0 | 11874 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 11875 | |
3f2aec07 | 11876 | const char *rs = GPR(rs_value, info); |
89a955e8 | 11877 | |
4066c152 ML |
11878 | return img_format("PREF 0x%" PRIx64 ", %s(%s)", |
11879 | hint_value, s_value, rs); | |
89a955e8 AM |
11880 | } |
11881 | ||
11882 | ||
11883 | /* | |
11884 | * | |
11885 | * | |
11886 | * 3 2 1 | |
11887 | * 10987654321098765432109876543210 | |
11888 | * 001000 x1110000101 | |
11889 | * rt ----- | |
11890 | * rs ----- | |
11891 | * rd ----- | |
11892 | */ | |
7def8a4b | 11893 | static char *PREF_U12_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
11894 | { |
11895 | uint64 hint_value = extract_hint_25_24_23_22_21(instruction); | |
89a955e8 | 11896 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 11897 | uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 11898 | |
3f2aec07 | 11899 | const char *rs = GPR(rs_value, info); |
89a955e8 | 11900 | |
4066c152 ML |
11901 | return img_format("PREF 0x%" PRIx64 ", 0x%" PRIx64 "(%s)", |
11902 | hint_value, u_value, rs); | |
89a955e8 AM |
11903 | } |
11904 | ||
11905 | ||
11906 | /* | |
11907 | * | |
11908 | * | |
11909 | * 3 2 1 | |
11910 | * 10987654321098765432109876543210 | |
11911 | * 001000 x1110000101 | |
11912 | * rt ----- | |
11913 | * rs ----- | |
11914 | * rd ----- | |
11915 | */ | |
7def8a4b | 11916 | static char *PREFE(uint64 instruction, Dis_info *info) |
89a955e8 | 11917 | { |
89a955e8 AM |
11918 | uint64 hint_value = extract_hint_25_24_23_22_21(instruction); |
11919 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
75199b40 | 11920 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 11921 | |
3f2aec07 | 11922 | const char *rs = GPR(rs_value, info); |
89a955e8 | 11923 | |
4066c152 | 11924 | return img_format("PREFE 0x%" PRIx64 ", %s(%s)", hint_value, s_value, rs); |
89a955e8 AM |
11925 | } |
11926 | ||
11927 | ||
11928 | /* | |
5c65eed6 | 11929 | * [DSP] PREPEND rt, rs, sa - Right shift and prepend bits to the MSB |
89a955e8 AM |
11930 | * |
11931 | * 3 2 1 | |
11932 | * 10987654321098765432109876543210 | |
11933 | * 001000 x1110000101 | |
11934 | * rt ----- | |
11935 | * rs ----- | |
11936 | * rd ----- | |
11937 | */ | |
7def8a4b | 11938 | static char *PREPEND(uint64 instruction, Dis_info *info) |
89a955e8 AM |
11939 | { |
11940 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 11941 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 11942 | uint64 sa_value = extract_sa_15_14_13_12_11(instruction); |
89a955e8 | 11943 | |
3f2aec07 ML |
11944 | const char *rt = GPR(rt_value, info); |
11945 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 11946 | |
4066c152 | 11947 | return img_format("PREPEND %s, %s, 0x%" PRIx64, rt, rs, sa_value); |
89a955e8 AM |
11948 | } |
11949 | ||
11950 | ||
11951 | /* | |
5c65eed6 | 11952 | * [DSP] RADDU.W.QB rt, rs - Unsigned reduction add of vector quad bytes |
89a955e8 AM |
11953 | * |
11954 | * 3 2 1 | |
11955 | * 10987654321098765432109876543210 | |
5c65eed6 | 11956 | * 001000 1111000100111111 |
89a955e8 AM |
11957 | * rt ----- |
11958 | * rs ----- | |
89a955e8 | 11959 | */ |
7def8a4b | 11960 | static char *RADDU_W_QB(uint64 instruction, Dis_info *info) |
89a955e8 AM |
11961 | { |
11962 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
11963 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
11964 | ||
3f2aec07 ML |
11965 | const char *rt = GPR(rt_value, info); |
11966 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 11967 | |
c5231692 | 11968 | return img_format("RADDU.W.QB %s, %s", rt, rs); |
89a955e8 AM |
11969 | } |
11970 | ||
11971 | ||
11972 | /* | |
5c65eed6 | 11973 | * [DSP] RDDSP rt, mask - Read DSPControl register fields to a GPR |
89a955e8 AM |
11974 | * |
11975 | * 3 2 1 | |
11976 | * 10987654321098765432109876543210 | |
5c65eed6 | 11977 | * 001000 00011001111111 |
89a955e8 | 11978 | * rt ----- |
5c65eed6 | 11979 | * mask ------- |
89a955e8 | 11980 | */ |
7def8a4b | 11981 | static char *RDDSP(uint64 instruction, Dis_info *info) |
89a955e8 AM |
11982 | { |
11983 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
11984 | uint64 mask_value = extract_mask_20_19_18_17_16_15_14(instruction); | |
11985 | ||
3f2aec07 | 11986 | const char *rt = GPR(rt_value, info); |
89a955e8 | 11987 | |
4066c152 | 11988 | return img_format("RDDSP %s, 0x%" PRIx64, rt, mask_value); |
89a955e8 AM |
11989 | } |
11990 | ||
11991 | ||
11992 | /* | |
11993 | * | |
11994 | * | |
11995 | * 3 2 1 | |
11996 | * 10987654321098765432109876543210 | |
11997 | * 001000 x1110000101 | |
11998 | * rt ----- | |
11999 | * rs ----- | |
12000 | * rd ----- | |
12001 | */ | |
7def8a4b | 12002 | static char *RDHWR(uint64 instruction, Dis_info *info) |
89a955e8 AM |
12003 | { |
12004 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
12005 | uint64 hs_value = extract_hs_20_19_18_17_16(instruction); | |
12006 | uint64 sel_value = extract_sel_13_12_11(instruction); | |
12007 | ||
3f2aec07 | 12008 | const char *rt = GPR(rt_value, info); |
89a955e8 | 12009 | |
043dc73c ML |
12010 | return img_format("RDHWR %s, CP%" PRIu64 ", 0x%" PRIx64, |
12011 | rt, hs_value, sel_value); | |
89a955e8 AM |
12012 | } |
12013 | ||
12014 | ||
12015 | /* | |
12016 | * | |
12017 | * | |
12018 | * 3 2 1 | |
12019 | * 10987654321098765432109876543210 | |
12020 | * 001000 x1110000101 | |
12021 | * rt ----- | |
12022 | * rs ----- | |
12023 | * rd ----- | |
12024 | */ | |
7def8a4b | 12025 | static char *RDPGPR(uint64 instruction, Dis_info *info) |
89a955e8 AM |
12026 | { |
12027 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
12028 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
12029 | ||
3f2aec07 ML |
12030 | const char *rt = GPR(rt_value, info); |
12031 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 12032 | |
c5231692 | 12033 | return img_format("RDPGPR %s, %s", rt, rs); |
89a955e8 AM |
12034 | } |
12035 | ||
12036 | ||
12037 | /* | |
12038 | * | |
12039 | * | |
12040 | * 3 2 1 | |
12041 | * 10987654321098765432109876543210 | |
12042 | * 001000 x1110000101 | |
12043 | * rt ----- | |
12044 | * rs ----- | |
12045 | * rd ----- | |
12046 | */ | |
7def8a4b | 12047 | static char *RECIP_D(uint64 instruction, Dis_info *info) |
89a955e8 | 12048 | { |
17ce2f00 | 12049 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 12050 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 12051 | |
3f2aec07 ML |
12052 | const char *ft = FPR(ft_value, info); |
12053 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 12054 | |
c5231692 | 12055 | return img_format("RECIP.D %s, %s", ft, fs); |
89a955e8 AM |
12056 | } |
12057 | ||
12058 | ||
12059 | /* | |
12060 | * | |
12061 | * | |
12062 | * 3 2 1 | |
12063 | * 10987654321098765432109876543210 | |
12064 | * 001000 x1110000101 | |
12065 | * rt ----- | |
12066 | * rs ----- | |
12067 | * rd ----- | |
12068 | */ | |
7def8a4b | 12069 | static char *RECIP_S(uint64 instruction, Dis_info *info) |
89a955e8 | 12070 | { |
17ce2f00 | 12071 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 12072 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 12073 | |
3f2aec07 ML |
12074 | const char *ft = FPR(ft_value, info); |
12075 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 12076 | |
c5231692 | 12077 | return img_format("RECIP.S %s, %s", ft, fs); |
89a955e8 AM |
12078 | } |
12079 | ||
12080 | ||
12081 | /* | |
5c65eed6 AM |
12082 | * [DSP] REPL.PH rd, s - Replicate immediate integer into all vector element |
12083 | * positions | |
89a955e8 AM |
12084 | * |
12085 | * 3 2 1 | |
12086 | * 10987654321098765432109876543210 | |
5c65eed6 | 12087 | * 001000 x0000111101 |
89a955e8 | 12088 | * rt ----- |
5c65eed6 | 12089 | * s ---------- |
89a955e8 | 12090 | */ |
7def8a4b | 12091 | static char *REPL_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
12092 | { |
12093 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
d3605cc0 | 12094 | int64 s_value = extract_s__se9_20_19_18_17_16_15_14_13_12_11(instruction); |
89a955e8 | 12095 | |
3f2aec07 | 12096 | const char *rt = GPR(rt_value, info); |
89a955e8 | 12097 | |
4066c152 | 12098 | return img_format("REPL.PH %s, %s", rt, s_value); |
89a955e8 AM |
12099 | } |
12100 | ||
12101 | ||
12102 | /* | |
5c65eed6 AM |
12103 | * [DSP] REPL.QB rd, u - Replicate immediate integer into all vector element |
12104 | * positions | |
89a955e8 AM |
12105 | * |
12106 | * 3 2 1 | |
12107 | * 10987654321098765432109876543210 | |
5c65eed6 | 12108 | * 001000 x010111111111 |
89a955e8 | 12109 | * rt ----- |
5c65eed6 | 12110 | * u -------- |
89a955e8 | 12111 | */ |
7def8a4b | 12112 | static char *REPL_QB(uint64 instruction, Dis_info *info) |
89a955e8 AM |
12113 | { |
12114 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
12115 | uint64 u_value = extract_u_20_19_18_17_16_15_14_13(instruction); | |
12116 | ||
3f2aec07 | 12117 | const char *rt = GPR(rt_value, info); |
89a955e8 | 12118 | |
4066c152 | 12119 | return img_format("REPL.QB %s, 0x%" PRIx64, rt, u_value); |
89a955e8 AM |
12120 | } |
12121 | ||
12122 | ||
12123 | /* | |
5c65eed6 AM |
12124 | * [DSP] REPLV.PH rt, rs - Replicate a halfword into all vector element |
12125 | * positions | |
89a955e8 AM |
12126 | * |
12127 | * 3 2 1 | |
12128 | * 10987654321098765432109876543210 | |
5c65eed6 | 12129 | * 001000 0000001100111111 |
89a955e8 AM |
12130 | * rt ----- |
12131 | * rs ----- | |
89a955e8 | 12132 | */ |
7def8a4b | 12133 | static char *REPLV_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
12134 | { |
12135 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
12136 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
12137 | ||
3f2aec07 ML |
12138 | const char *rt = GPR(rt_value, info); |
12139 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 12140 | |
c5231692 | 12141 | return img_format("REPLV.PH %s, %s", rt, rs); |
89a955e8 AM |
12142 | } |
12143 | ||
12144 | ||
12145 | /* | |
5c65eed6 | 12146 | * [DSP] REPLV.QB rt, rs - Replicate byte into all vector element positions |
89a955e8 AM |
12147 | * |
12148 | * 3 2 1 | |
12149 | * 10987654321098765432109876543210 | |
5c65eed6 | 12150 | * 001000 0001001100111111 |
89a955e8 AM |
12151 | * rt ----- |
12152 | * rs ----- | |
89a955e8 | 12153 | */ |
7def8a4b | 12154 | static char *REPLV_QB(uint64 instruction, Dis_info *info) |
89a955e8 AM |
12155 | { |
12156 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
12157 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
12158 | ||
3f2aec07 ML |
12159 | const char *rt = GPR(rt_value, info); |
12160 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 12161 | |
c5231692 | 12162 | return img_format("REPLV.QB %s, %s", rt, rs); |
89a955e8 AM |
12163 | } |
12164 | ||
12165 | ||
12166 | /* | |
12167 | * | |
12168 | * | |
12169 | * 3 2 1 | |
12170 | * 10987654321098765432109876543210 | |
12171 | * 001000 x1110000101 | |
12172 | * rt ----- | |
12173 | * rs ----- | |
12174 | * rd ----- | |
12175 | */ | |
7def8a4b | 12176 | static char *RESTORE_32_(uint64 instruction, Dis_info *info) |
89a955e8 | 12177 | { |
89a955e8 | 12178 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
75199b40 | 12179 | uint64 count_value = extract_count_19_18_17_16(instruction); |
11b9732a | 12180 | uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3__s3(instruction); |
89a955e8 AM |
12181 | uint64 gp_value = extract_gp_2(instruction); |
12182 | ||
22e7b52a | 12183 | g_autofree char *save_restore_str = save_restore_list( |
3f2aec07 | 12184 | rt_value, count_value, gp_value, info); |
22e7b52a | 12185 | return img_format("RESTORE 0x%" PRIx64 "%s", u_value, save_restore_str); |
89a955e8 AM |
12186 | } |
12187 | ||
12188 | ||
12189 | /* | |
12190 | * | |
12191 | * | |
12192 | * 3 2 1 | |
12193 | * 10987654321098765432109876543210 | |
12194 | * 001000 x1110000101 | |
12195 | * rt ----- | |
12196 | * rs ----- | |
12197 | * rd ----- | |
12198 | */ | |
7def8a4b | 12199 | static char *RESTORE_JRC_16_(uint64 instruction, Dis_info *info) |
89a955e8 | 12200 | { |
89a955e8 | 12201 | uint64 rt1_value = extract_rtl_11(instruction); |
11b9732a | 12202 | uint64 u_value = extract_u_7_6_5_4__s4(instruction); |
75199b40 | 12203 | uint64 count_value = extract_count_3_2_1_0(instruction); |
89a955e8 | 12204 | |
22e7b52a | 12205 | g_autofree char *save_restore_str = save_restore_list( |
3f2aec07 | 12206 | encode_rt1_from_rt(rt1_value), count_value, 0, info); |
22e7b52a | 12207 | return img_format("RESTORE.JRC 0x%" PRIx64 "%s", u_value, save_restore_str); |
89a955e8 AM |
12208 | } |
12209 | ||
12210 | ||
12211 | /* | |
12212 | * | |
12213 | * | |
12214 | * 3 2 1 | |
12215 | * 10987654321098765432109876543210 | |
12216 | * 001000 x1110000101 | |
12217 | * rt ----- | |
12218 | * rs ----- | |
12219 | * rd ----- | |
12220 | */ | |
7def8a4b | 12221 | static char *RESTORE_JRC_32_(uint64 instruction, Dis_info *info) |
89a955e8 | 12222 | { |
89a955e8 | 12223 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
86b5f803 | 12224 | uint64 count_value = extract_count_19_18_17_16(instruction); |
11b9732a | 12225 | uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3__s3(instruction); |
89a955e8 AM |
12226 | uint64 gp_value = extract_gp_2(instruction); |
12227 | ||
22e7b52a | 12228 | g_autofree char *save_restore_str = save_restore_list( |
3f2aec07 | 12229 | rt_value, count_value, gp_value, info); |
4066c152 | 12230 | return img_format("RESTORE.JRC 0x%" PRIx64 "%s", u_value, |
22e7b52a | 12231 | save_restore_str); |
89a955e8 AM |
12232 | } |
12233 | ||
12234 | ||
12235 | /* | |
12236 | * | |
12237 | * | |
12238 | * 3 2 1 | |
12239 | * 10987654321098765432109876543210 | |
12240 | * 001000 x1110000101 | |
12241 | * rt ----- | |
12242 | * rs ----- | |
12243 | * rd ----- | |
12244 | */ | |
7def8a4b | 12245 | static char *RESTOREF(uint64 instruction, Dis_info *info) |
89a955e8 AM |
12246 | { |
12247 | uint64 count_value = extract_count_19_18_17_16(instruction); | |
11b9732a | 12248 | uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3__s3(instruction); |
89a955e8 | 12249 | |
89a955e8 | 12250 | |
4066c152 | 12251 | return img_format("RESTOREF 0x%" PRIx64 ", %s", u_value, count_value); |
89a955e8 AM |
12252 | } |
12253 | ||
12254 | ||
12255 | /* | |
12256 | * | |
12257 | * | |
12258 | * 3 2 1 | |
12259 | * 10987654321098765432109876543210 | |
12260 | * 001000 x1110000101 | |
12261 | * rt ----- | |
12262 | * rs ----- | |
12263 | * rd ----- | |
12264 | */ | |
7def8a4b | 12265 | static char *RINT_D(uint64 instruction, Dis_info *info) |
89a955e8 | 12266 | { |
17ce2f00 | 12267 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 12268 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 12269 | |
3f2aec07 ML |
12270 | const char *ft = FPR(ft_value, info); |
12271 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 12272 | |
c5231692 | 12273 | return img_format("RINT.D %s, %s", ft, fs); |
89a955e8 AM |
12274 | } |
12275 | ||
12276 | ||
12277 | /* | |
12278 | * | |
12279 | * | |
12280 | * 3 2 1 | |
12281 | * 10987654321098765432109876543210 | |
12282 | * 001000 x1110000101 | |
12283 | * rt ----- | |
12284 | * rs ----- | |
12285 | * rd ----- | |
12286 | */ | |
7def8a4b | 12287 | static char *RINT_S(uint64 instruction, Dis_info *info) |
89a955e8 | 12288 | { |
17ce2f00 | 12289 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 12290 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 12291 | |
3f2aec07 ML |
12292 | const char *ft = FPR(ft_value, info); |
12293 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 12294 | |
c5231692 | 12295 | return img_format("RINT.S %s, %s", ft, fs); |
89a955e8 AM |
12296 | } |
12297 | ||
12298 | ||
12299 | /* | |
12300 | * | |
12301 | * | |
12302 | * 3 2 1 | |
12303 | * 10987654321098765432109876543210 | |
12304 | * 001000 x1110000101 | |
12305 | * rt ----- | |
12306 | * rs ----- | |
12307 | * rd ----- | |
12308 | */ | |
7def8a4b | 12309 | static char *ROTR(uint64 instruction, Dis_info *info) |
89a955e8 AM |
12310 | { |
12311 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 12312 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 12313 | uint64 shift_value = extract_shift_4_3_2_1_0(instruction); |
89a955e8 | 12314 | |
3f2aec07 ML |
12315 | const char *rt = GPR(rt_value, info); |
12316 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 12317 | |
4066c152 | 12318 | return img_format("ROTR %s, %s, 0x%" PRIx64, rt, rs, shift_value); |
89a955e8 AM |
12319 | } |
12320 | ||
12321 | ||
12322 | /* | |
12323 | * | |
12324 | * | |
12325 | * 3 2 1 | |
12326 | * 10987654321098765432109876543210 | |
12327 | * 001000 x1110000101 | |
12328 | * rt ----- | |
12329 | * rs ----- | |
12330 | * rd ----- | |
12331 | */ | |
7def8a4b | 12332 | static char *ROTRV(uint64 instruction, Dis_info *info) |
89a955e8 AM |
12333 | { |
12334 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 12335 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 12336 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 12337 | |
3f2aec07 ML |
12338 | const char *rd = GPR(rd_value, info); |
12339 | const char *rs = GPR(rs_value, info); | |
12340 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 12341 | |
c5231692 | 12342 | return img_format("ROTRV %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
12343 | } |
12344 | ||
12345 | ||
12346 | /* | |
12347 | * | |
12348 | * | |
12349 | * 3 2 1 | |
12350 | * 10987654321098765432109876543210 | |
12351 | * 001000 x1110000101 | |
12352 | * rt ----- | |
12353 | * rs ----- | |
12354 | * rd ----- | |
12355 | */ | |
7def8a4b | 12356 | static char *ROTX(uint64 instruction, Dis_info *info) |
89a955e8 AM |
12357 | { |
12358 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
86b5f803 | 12359 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
11b9732a | 12360 | uint64 shiftx_value = extract_shiftx_10_9_8_7__s1(instruction); |
89a955e8 | 12361 | uint64 stripe_value = extract_stripe_6(instruction); |
86b5f803 | 12362 | uint64 shift_value = extract_shift_4_3_2_1_0(instruction); |
89a955e8 | 12363 | |
3f2aec07 ML |
12364 | const char *rt = GPR(rt_value, info); |
12365 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 12366 | |
4066c152 ML |
12367 | return img_format("ROTX %s, %s, 0x%" PRIx64 ", 0x%" PRIx64 ", 0x%" PRIx64, |
12368 | rt, rs, shift_value, shiftx_value, stripe_value); | |
89a955e8 AM |
12369 | } |
12370 | ||
12371 | ||
12372 | /* | |
12373 | * | |
12374 | * | |
12375 | * 3 2 1 | |
12376 | * 10987654321098765432109876543210 | |
12377 | * 001000 x1110000101 | |
12378 | * rt ----- | |
12379 | * rs ----- | |
12380 | * rd ----- | |
12381 | */ | |
7def8a4b | 12382 | static char *ROUND_L_D(uint64 instruction, Dis_info *info) |
89a955e8 | 12383 | { |
17ce2f00 | 12384 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 12385 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 12386 | |
3f2aec07 ML |
12387 | const char *ft = FPR(ft_value, info); |
12388 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 12389 | |
c5231692 | 12390 | return img_format("ROUND.L.D %s, %s", ft, fs); |
89a955e8 AM |
12391 | } |
12392 | ||
12393 | ||
12394 | /* | |
12395 | * | |
12396 | * | |
12397 | * 3 2 1 | |
12398 | * 10987654321098765432109876543210 | |
12399 | * 001000 x1110000101 | |
12400 | * rt ----- | |
12401 | * rs ----- | |
12402 | * rd ----- | |
12403 | */ | |
7def8a4b | 12404 | static char *ROUND_L_S(uint64 instruction, Dis_info *info) |
89a955e8 | 12405 | { |
17ce2f00 | 12406 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 12407 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 12408 | |
3f2aec07 ML |
12409 | const char *ft = FPR(ft_value, info); |
12410 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 12411 | |
c5231692 | 12412 | return img_format("ROUND.L.S %s, %s", ft, fs); |
89a955e8 AM |
12413 | } |
12414 | ||
12415 | ||
12416 | /* | |
12417 | * | |
12418 | * | |
12419 | * 3 2 1 | |
12420 | * 10987654321098765432109876543210 | |
12421 | * 001000 x1110000101 | |
12422 | * rt ----- | |
12423 | * rs ----- | |
12424 | * rd ----- | |
12425 | */ | |
7def8a4b | 12426 | static char *ROUND_W_D(uint64 instruction, Dis_info *info) |
89a955e8 | 12427 | { |
17ce2f00 | 12428 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 12429 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 12430 | |
3f2aec07 ML |
12431 | const char *ft = FPR(ft_value, info); |
12432 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 12433 | |
c5231692 | 12434 | return img_format("ROUND.W.D %s, %s", ft, fs); |
89a955e8 AM |
12435 | } |
12436 | ||
12437 | ||
12438 | /* | |
12439 | * | |
12440 | * | |
12441 | * 3 2 1 | |
12442 | * 10987654321098765432109876543210 | |
12443 | * 001000 x1110000101 | |
12444 | * rt ----- | |
12445 | * rs ----- | |
12446 | * rd ----- | |
12447 | */ | |
7def8a4b | 12448 | static char *ROUND_W_S(uint64 instruction, Dis_info *info) |
89a955e8 | 12449 | { |
17ce2f00 | 12450 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 12451 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 12452 | |
3f2aec07 ML |
12453 | const char *ft = FPR(ft_value, info); |
12454 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 12455 | |
c5231692 | 12456 | return img_format("ROUND.W.S %s, %s", ft, fs); |
89a955e8 AM |
12457 | } |
12458 | ||
12459 | ||
12460 | /* | |
12461 | * | |
12462 | * | |
12463 | * 3 2 1 | |
12464 | * 10987654321098765432109876543210 | |
12465 | * 001000 x1110000101 | |
12466 | * rt ----- | |
12467 | * rs ----- | |
12468 | * rd ----- | |
12469 | */ | |
7def8a4b | 12470 | static char *RSQRT_D(uint64 instruction, Dis_info *info) |
89a955e8 | 12471 | { |
17ce2f00 | 12472 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 12473 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 12474 | |
3f2aec07 ML |
12475 | const char *ft = FPR(ft_value, info); |
12476 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 12477 | |
c5231692 | 12478 | return img_format("RSQRT.D %s, %s", ft, fs); |
89a955e8 AM |
12479 | } |
12480 | ||
12481 | ||
12482 | /* | |
12483 | * | |
12484 | * | |
12485 | * 3 2 1 | |
12486 | * 10987654321098765432109876543210 | |
12487 | * 001000 x1110000101 | |
12488 | * rt ----- | |
12489 | * rs ----- | |
12490 | * rd ----- | |
12491 | */ | |
7def8a4b | 12492 | static char *RSQRT_S(uint64 instruction, Dis_info *info) |
89a955e8 | 12493 | { |
17ce2f00 | 12494 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 12495 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 12496 | |
3f2aec07 ML |
12497 | const char *ft = FPR(ft_value, info); |
12498 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 12499 | |
c5231692 | 12500 | return img_format("RSQRT.S %s, %s", ft, fs); |
89a955e8 AM |
12501 | } |
12502 | ||
12503 | ||
12504 | /* | |
12505 | * | |
12506 | * | |
12507 | * 3 2 1 | |
12508 | * 10987654321098765432109876543210 | |
12509 | * 001000 01001001101 | |
12510 | * rt ----- | |
12511 | * rs ----- | |
12512 | * rd ----- | |
12513 | */ | |
7def8a4b | 12514 | static char *SAVE_16_(uint64 instruction, Dis_info *info) |
89a955e8 | 12515 | { |
89a955e8 | 12516 | uint64 rt1_value = extract_rtl_11(instruction); |
11b9732a | 12517 | uint64 u_value = extract_u_7_6_5_4__s4(instruction); |
75199b40 | 12518 | uint64 count_value = extract_count_3_2_1_0(instruction); |
89a955e8 | 12519 | |
22e7b52a | 12520 | g_autofree char *save_restore_str = save_restore_list( |
3f2aec07 | 12521 | encode_rt1_from_rt(rt1_value), count_value, 0, info); |
22e7b52a | 12522 | return img_format("SAVE 0x%" PRIx64 "%s", u_value, save_restore_str); |
89a955e8 AM |
12523 | } |
12524 | ||
12525 | ||
12526 | /* | |
12527 | * | |
12528 | * | |
12529 | * 3 2 1 | |
12530 | * 10987654321098765432109876543210 | |
12531 | * 001000 01001001101 | |
12532 | * rt ----- | |
12533 | * rs ----- | |
12534 | * rd ----- | |
12535 | */ | |
7def8a4b | 12536 | static char *SAVE_32_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
12537 | { |
12538 | uint64 count_value = extract_count_19_18_17_16(instruction); | |
12539 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
11b9732a | 12540 | uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3__s3(instruction); |
89a955e8 AM |
12541 | uint64 gp_value = extract_gp_2(instruction); |
12542 | ||
22e7b52a | 12543 | g_autofree char *save_restore_str = save_restore_list( |
3f2aec07 | 12544 | rt_value, count_value, gp_value, info); |
22e7b52a | 12545 | return img_format("SAVE 0x%" PRIx64 "%s", u_value, save_restore_str); |
89a955e8 AM |
12546 | } |
12547 | ||
12548 | ||
12549 | /* | |
12550 | * | |
12551 | * | |
12552 | * 3 2 1 | |
12553 | * 10987654321098765432109876543210 | |
12554 | * 001000 01001001101 | |
12555 | * rt ----- | |
12556 | * rs ----- | |
12557 | * rd ----- | |
12558 | */ | |
7def8a4b | 12559 | static char *SAVEF(uint64 instruction, Dis_info *info) |
89a955e8 AM |
12560 | { |
12561 | uint64 count_value = extract_count_19_18_17_16(instruction); | |
11b9732a | 12562 | uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3__s3(instruction); |
89a955e8 | 12563 | |
89a955e8 | 12564 | |
4066c152 | 12565 | return img_format("SAVEF 0x%" PRIx64 ", 0x%" PRIx64, u_value, count_value); |
89a955e8 AM |
12566 | } |
12567 | ||
12568 | ||
12569 | /* | |
12570 | * | |
12571 | * | |
12572 | * 3 2 1 | |
12573 | * 10987654321098765432109876543210 | |
12574 | * 001000 01001001101 | |
12575 | * rt ----- | |
12576 | * rs ----- | |
12577 | * rd ----- | |
12578 | */ | |
7def8a4b | 12579 | static char *SB_16_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
12580 | { |
12581 | uint64 rtz3_value = extract_rtz3_9_8_7(instruction); | |
89a955e8 | 12582 | uint64 rs3_value = extract_rs3_6_5_4(instruction); |
75199b40 | 12583 | uint64 u_value = extract_u_1_0(instruction); |
89a955e8 | 12584 | |
3f2aec07 ML |
12585 | const char *rtz3 = GPR(decode_gpr_gpr3_src_store(rtz3_value, info), info); |
12586 | const char *rs3 = GPR(decode_gpr_gpr3(rs3_value, info), info); | |
89a955e8 | 12587 | |
4066c152 | 12588 | return img_format("SB %s, 0x%" PRIx64 "(%s)", rtz3, u_value, rs3); |
89a955e8 AM |
12589 | } |
12590 | ||
12591 | ||
12592 | /* | |
12593 | * | |
12594 | * | |
12595 | * 3 2 1 | |
12596 | * 10987654321098765432109876543210 | |
12597 | * 001000 01001001101 | |
12598 | * rt ----- | |
12599 | * rs ----- | |
12600 | * rd ----- | |
12601 | */ | |
7def8a4b | 12602 | static char *SB_GP_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
12603 | { |
12604 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
12605 | uint64 u_value = extract_u_17_to_0(instruction); | |
12606 | ||
3f2aec07 | 12607 | const char *rt = GPR(rt_value, info); |
89a955e8 | 12608 | |
4066c152 | 12609 | return img_format("SB %s, 0x%" PRIx64 "($%d)", rt, u_value, 28); |
89a955e8 AM |
12610 | } |
12611 | ||
12612 | ||
12613 | /* | |
12614 | * | |
12615 | * | |
12616 | * 3 2 1 | |
12617 | * 10987654321098765432109876543210 | |
12618 | * 001000 01001001101 | |
12619 | * rt ----- | |
12620 | * rs ----- | |
12621 | * rd ----- | |
12622 | */ | |
7def8a4b | 12623 | static char *SB_S9_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
12624 | { |
12625 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 12626 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 12627 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 12628 | |
3f2aec07 ML |
12629 | const char *rt = GPR(rt_value, info); |
12630 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 12631 | |
4066c152 | 12632 | return img_format("SB %s, %s(%s)", rt, s_value, rs); |
89a955e8 AM |
12633 | } |
12634 | ||
12635 | ||
12636 | /* | |
12637 | * | |
12638 | * | |
12639 | * 3 2 1 | |
12640 | * 10987654321098765432109876543210 | |
12641 | * 001000 01001001101 | |
12642 | * rt ----- | |
12643 | * rs ----- | |
12644 | * rd ----- | |
12645 | */ | |
7def8a4b | 12646 | static char *SB_U12_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
12647 | { |
12648 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 12649 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 12650 | uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 12651 | |
3f2aec07 ML |
12652 | const char *rt = GPR(rt_value, info); |
12653 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 12654 | |
4066c152 | 12655 | return img_format("SB %s, 0x%" PRIx64 "(%s)", rt, u_value, rs); |
89a955e8 AM |
12656 | } |
12657 | ||
12658 | ||
12659 | /* | |
12660 | * | |
12661 | * | |
12662 | * 3 2 1 | |
12663 | * 10987654321098765432109876543210 | |
12664 | * 001000 01001001101 | |
12665 | * rt ----- | |
12666 | * rs ----- | |
12667 | * rd ----- | |
12668 | */ | |
7def8a4b | 12669 | static char *SBE(uint64 instruction, Dis_info *info) |
89a955e8 AM |
12670 | { |
12671 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 12672 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 12673 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 12674 | |
3f2aec07 ML |
12675 | const char *rt = GPR(rt_value, info); |
12676 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 12677 | |
4066c152 | 12678 | return img_format("SBE %s, %s(%s)", rt, s_value, rs); |
89a955e8 AM |
12679 | } |
12680 | ||
12681 | ||
12682 | /* | |
12683 | * | |
12684 | * | |
12685 | * 3 2 1 | |
12686 | * 10987654321098765432109876543210 | |
12687 | * 001000 01001001101 | |
12688 | * rt ----- | |
12689 | * rs ----- | |
12690 | * rd ----- | |
12691 | */ | |
7def8a4b | 12692 | static char *SBX(uint64 instruction, Dis_info *info) |
89a955e8 AM |
12693 | { |
12694 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 12695 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 12696 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 12697 | |
3f2aec07 ML |
12698 | const char *rd = GPR(rd_value, info); |
12699 | const char *rs = GPR(rs_value, info); | |
12700 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 12701 | |
c5231692 | 12702 | return img_format("SBX %s, %s(%s)", rd, rs, rt); |
89a955e8 AM |
12703 | } |
12704 | ||
12705 | ||
12706 | /* | |
12707 | * | |
12708 | * | |
12709 | * 3 2 1 | |
12710 | * 10987654321098765432109876543210 | |
12711 | * 001000 01001001101 | |
12712 | * rt ----- | |
12713 | * rs ----- | |
12714 | * rd ----- | |
12715 | */ | |
7def8a4b | 12716 | static char *SC(uint64 instruction, Dis_info *info) |
89a955e8 AM |
12717 | { |
12718 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 12719 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 12720 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_s2(instruction); |
89a955e8 | 12721 | |
3f2aec07 ML |
12722 | const char *rt = GPR(rt_value, info); |
12723 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 12724 | |
4066c152 | 12725 | return img_format("SC %s, %s(%s)", rt, s_value, rs); |
89a955e8 AM |
12726 | } |
12727 | ||
12728 | ||
12729 | /* | |
12730 | * | |
12731 | * | |
12732 | * 3 2 1 | |
12733 | * 10987654321098765432109876543210 | |
12734 | * 001000 01001001101 | |
12735 | * rt ----- | |
12736 | * rs ----- | |
12737 | * rd ----- | |
12738 | */ | |
7def8a4b | 12739 | static char *SCD(uint64 instruction, Dis_info *info) |
89a955e8 AM |
12740 | { |
12741 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 12742 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 12743 | int64 s_value = extract_s__se8_15_7_6_5_4_3_s3(instruction); |
89a955e8 | 12744 | |
3f2aec07 ML |
12745 | const char *rt = GPR(rt_value, info); |
12746 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 12747 | |
4066c152 | 12748 | return img_format("SCD %s, %s(%s)", rt, s_value, rs); |
89a955e8 AM |
12749 | } |
12750 | ||
12751 | ||
12752 | /* | |
12753 | * | |
12754 | * | |
12755 | * 3 2 1 | |
12756 | * 10987654321098765432109876543210 | |
12757 | * 001000 01001001101 | |
12758 | * rt ----- | |
12759 | * rs ----- | |
12760 | * rd ----- | |
12761 | */ | |
7def8a4b | 12762 | static char *SCDP(uint64 instruction, Dis_info *info) |
89a955e8 AM |
12763 | { |
12764 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 12765 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 12766 | uint64 ru_value = extract_ru_7_6_5_4_3(instruction); |
89a955e8 | 12767 | |
3f2aec07 ML |
12768 | const char *rt = GPR(rt_value, info); |
12769 | const char *ru = GPR(ru_value, info); | |
12770 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 12771 | |
c5231692 | 12772 | return img_format("SCDP %s, %s, (%s)", rt, ru, rs); |
89a955e8 AM |
12773 | } |
12774 | ||
12775 | ||
12776 | /* | |
12777 | * | |
12778 | * | |
12779 | * 3 2 1 | |
12780 | * 10987654321098765432109876543210 | |
12781 | * 001000 01001001101 | |
12782 | * rt ----- | |
12783 | * rs ----- | |
12784 | * rd ----- | |
12785 | */ | |
7def8a4b | 12786 | static char *SCE(uint64 instruction, Dis_info *info) |
89a955e8 AM |
12787 | { |
12788 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 12789 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 12790 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_s2(instruction); |
89a955e8 | 12791 | |
3f2aec07 ML |
12792 | const char *rt = GPR(rt_value, info); |
12793 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 12794 | |
4066c152 | 12795 | return img_format("SCE %s, %s(%s)", rt, s_value, rs); |
89a955e8 AM |
12796 | } |
12797 | ||
12798 | ||
12799 | /* | |
12800 | * | |
12801 | * | |
12802 | * 3 2 1 | |
12803 | * 10987654321098765432109876543210 | |
12804 | * 001000 01001001101 | |
12805 | * rt ----- | |
12806 | * rs ----- | |
12807 | * rd ----- | |
12808 | */ | |
7def8a4b | 12809 | static char *SCWP(uint64 instruction, Dis_info *info) |
89a955e8 AM |
12810 | { |
12811 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 12812 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 12813 | uint64 ru_value = extract_ru_7_6_5_4_3(instruction); |
89a955e8 | 12814 | |
3f2aec07 ML |
12815 | const char *rt = GPR(rt_value, info); |
12816 | const char *ru = GPR(ru_value, info); | |
12817 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 12818 | |
c5231692 | 12819 | return img_format("SCWP %s, %s, (%s)", rt, ru, rs); |
89a955e8 AM |
12820 | } |
12821 | ||
12822 | ||
12823 | /* | |
12824 | * | |
12825 | * | |
12826 | * 3 2 1 | |
12827 | * 10987654321098765432109876543210 | |
12828 | * 001000 01001001101 | |
12829 | * rt ----- | |
12830 | * rs ----- | |
12831 | * rd ----- | |
12832 | */ | |
7def8a4b | 12833 | static char *SCWPE(uint64 instruction, Dis_info *info) |
89a955e8 AM |
12834 | { |
12835 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 12836 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 12837 | uint64 ru_value = extract_ru_7_6_5_4_3(instruction); |
89a955e8 | 12838 | |
3f2aec07 ML |
12839 | const char *rt = GPR(rt_value, info); |
12840 | const char *ru = GPR(ru_value, info); | |
12841 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 12842 | |
c5231692 | 12843 | return img_format("SCWPE %s, %s, (%s)", rt, ru, rs); |
89a955e8 AM |
12844 | } |
12845 | ||
12846 | ||
12847 | /* | |
12848 | * | |
12849 | * | |
12850 | * 3 2 1 | |
12851 | * 10987654321098765432109876543210 | |
12852 | * 001000 01001001101 | |
12853 | * rt ----- | |
12854 | * rs ----- | |
12855 | * rd ----- | |
12856 | */ | |
7def8a4b | 12857 | static char *SD_GP_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
12858 | { |
12859 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
11b9732a | 12860 | uint64 u_value = extract_u_20_to_3__s3(instruction); |
89a955e8 | 12861 | |
3f2aec07 | 12862 | const char *rt = GPR(rt_value, info); |
89a955e8 | 12863 | |
4066c152 | 12864 | return img_format("SD %s, 0x%" PRIx64 "($%d)", rt, u_value, 28); |
89a955e8 AM |
12865 | } |
12866 | ||
12867 | ||
12868 | /* | |
12869 | * | |
12870 | * | |
12871 | * 3 2 1 | |
12872 | * 10987654321098765432109876543210 | |
12873 | * 001000 01001001101 | |
12874 | * rt ----- | |
12875 | * rs ----- | |
12876 | * rd ----- | |
12877 | */ | |
7def8a4b | 12878 | static char *SD_S9_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
12879 | { |
12880 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 12881 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 12882 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 12883 | |
3f2aec07 ML |
12884 | const char *rt = GPR(rt_value, info); |
12885 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 12886 | |
4066c152 | 12887 | return img_format("SD %s, %s(%s)", rt, s_value, rs); |
89a955e8 AM |
12888 | } |
12889 | ||
12890 | ||
12891 | /* | |
12892 | * | |
12893 | * | |
12894 | * 3 2 1 | |
12895 | * 10987654321098765432109876543210 | |
12896 | * 001000 01001001101 | |
12897 | * rt ----- | |
12898 | * rs ----- | |
12899 | * rd ----- | |
12900 | */ | |
7def8a4b | 12901 | static char *SD_U12_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
12902 | { |
12903 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 12904 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 12905 | uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 12906 | |
3f2aec07 ML |
12907 | const char *rt = GPR(rt_value, info); |
12908 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 12909 | |
4066c152 | 12910 | return img_format("SD %s, 0x%" PRIx64 "(%s)", rt, u_value, rs); |
89a955e8 AM |
12911 | } |
12912 | ||
12913 | ||
12914 | /* | |
12915 | * | |
12916 | * | |
12917 | * 3 2 1 | |
12918 | * 10987654321098765432109876543210 | |
12919 | * 001000 01001001101 | |
12920 | * rt ----- | |
12921 | * rs ----- | |
12922 | * rd ----- | |
12923 | */ | |
7def8a4b | 12924 | static char *SDBBP_16_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
12925 | { |
12926 | uint64 code_value = extract_code_2_1_0(instruction); | |
12927 | ||
89a955e8 | 12928 | |
4066c152 | 12929 | return img_format("SDBBP 0x%" PRIx64, code_value); |
89a955e8 AM |
12930 | } |
12931 | ||
12932 | ||
12933 | /* | |
12934 | * | |
12935 | * | |
12936 | * 3 2 1 | |
12937 | * 10987654321098765432109876543210 | |
12938 | * 001000 01001001101 | |
12939 | * rt ----- | |
12940 | * rs ----- | |
12941 | * rd ----- | |
12942 | */ | |
7def8a4b | 12943 | static char *SDBBP_32_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
12944 | { |
12945 | uint64 code_value = extract_code_18_to_0(instruction); | |
12946 | ||
89a955e8 | 12947 | |
4066c152 | 12948 | return img_format("SDBBP 0x%" PRIx64, code_value); |
89a955e8 AM |
12949 | } |
12950 | ||
12951 | ||
12952 | /* | |
12953 | * | |
12954 | * | |
12955 | * 3 2 1 | |
12956 | * 10987654321098765432109876543210 | |
12957 | * 001000 01001001101 | |
12958 | * rt ----- | |
12959 | * rs ----- | |
12960 | * rd ----- | |
12961 | */ | |
7def8a4b | 12962 | static char *SDC1_GP_(uint64 instruction, Dis_info *info) |
89a955e8 | 12963 | { |
17ce2f00 | 12964 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
11b9732a | 12965 | uint64 u_value = extract_u_17_to_2__s2(instruction); |
89a955e8 | 12966 | |
3f2aec07 | 12967 | const char *ft = FPR(ft_value, info); |
89a955e8 | 12968 | |
4066c152 | 12969 | return img_format("SDC1 %s, 0x%" PRIx64 "($%d)", ft, u_value, 28); |
89a955e8 AM |
12970 | } |
12971 | ||
12972 | ||
12973 | /* | |
12974 | * | |
12975 | * | |
12976 | * 3 2 1 | |
12977 | * 10987654321098765432109876543210 | |
12978 | * 001000 01001001101 | |
12979 | * rt ----- | |
12980 | * rs ----- | |
12981 | * rd ----- | |
12982 | */ | |
7def8a4b | 12983 | static char *SDC1_S9_(uint64 instruction, Dis_info *info) |
89a955e8 | 12984 | { |
17ce2f00 | 12985 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
89a955e8 | 12986 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 12987 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 12988 | |
3f2aec07 ML |
12989 | const char *ft = FPR(ft_value, info); |
12990 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 12991 | |
4066c152 | 12992 | return img_format("SDC1 %s, %s(%s)", ft, s_value, rs); |
89a955e8 AM |
12993 | } |
12994 | ||
12995 | ||
12996 | /* | |
12997 | * | |
12998 | * | |
12999 | * 3 2 1 | |
13000 | * 10987654321098765432109876543210 | |
13001 | * 001000 01001001101 | |
13002 | * rt ----- | |
13003 | * rs ----- | |
13004 | * rd ----- | |
13005 | */ | |
7def8a4b | 13006 | static char *SDC1_U12_(uint64 instruction, Dis_info *info) |
89a955e8 | 13007 | { |
17ce2f00 | 13008 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
89a955e8 | 13009 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 13010 | uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 13011 | |
3f2aec07 ML |
13012 | const char *ft = FPR(ft_value, info); |
13013 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 13014 | |
4066c152 | 13015 | return img_format("SDC1 %s, 0x%" PRIx64 "(%s)", ft, u_value, rs); |
89a955e8 AM |
13016 | } |
13017 | ||
13018 | ||
13019 | /* | |
13020 | * | |
13021 | * | |
13022 | * 3 2 1 | |
13023 | * 10987654321098765432109876543210 | |
13024 | * 001000 01001001101 | |
13025 | * rt ----- | |
13026 | * rs ----- | |
13027 | * rd ----- | |
13028 | */ | |
7def8a4b | 13029 | static char *SDC1X(uint64 instruction, Dis_info *info) |
89a955e8 AM |
13030 | { |
13031 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 13032 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 13033 | uint64 ft_value = extract_ft_15_14_13_12_11(instruction); |
89a955e8 | 13034 | |
3f2aec07 ML |
13035 | const char *ft = FPR(ft_value, info); |
13036 | const char *rs = GPR(rs_value, info); | |
13037 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 13038 | |
c5231692 | 13039 | return img_format("SDC1X %s, %s(%s)", ft, rs, rt); |
89a955e8 AM |
13040 | } |
13041 | ||
13042 | ||
13043 | /* | |
13044 | * | |
13045 | * | |
13046 | * 3 2 1 | |
13047 | * 10987654321098765432109876543210 | |
13048 | * 001000 01001001101 | |
13049 | * rt ----- | |
13050 | * rs ----- | |
13051 | * rd ----- | |
13052 | */ | |
7def8a4b | 13053 | static char *SDC1XS(uint64 instruction, Dis_info *info) |
89a955e8 AM |
13054 | { |
13055 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 13056 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 13057 | uint64 ft_value = extract_ft_15_14_13_12_11(instruction); |
89a955e8 | 13058 | |
3f2aec07 ML |
13059 | const char *ft = FPR(ft_value, info); |
13060 | const char *rs = GPR(rs_value, info); | |
13061 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 13062 | |
c5231692 | 13063 | return img_format("SDC1XS %s, %s(%s)", ft, rs, rt); |
89a955e8 AM |
13064 | } |
13065 | ||
13066 | ||
13067 | /* | |
13068 | * | |
13069 | * | |
13070 | * 3 2 1 | |
13071 | * 10987654321098765432109876543210 | |
13072 | * 001000 01001001101 | |
13073 | * rt ----- | |
13074 | * rs ----- | |
13075 | * rd ----- | |
13076 | */ | |
7def8a4b | 13077 | static char *SDC2(uint64 instruction, Dis_info *info) |
89a955e8 AM |
13078 | { |
13079 | uint64 cs_value = extract_cs_25_24_23_22_21(instruction); | |
89a955e8 | 13080 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 13081 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 13082 | |
3f2aec07 | 13083 | const char *rs = GPR(rs_value, info); |
89a955e8 | 13084 | |
043dc73c | 13085 | return img_format("SDC2 CP%" PRIu64 ", %s(%s)", cs_value, s_value, rs); |
89a955e8 AM |
13086 | } |
13087 | ||
13088 | ||
13089 | /* | |
13090 | * | |
13091 | * | |
13092 | * 3 2 1 | |
13093 | * 10987654321098765432109876543210 | |
13094 | * 001000 01001001101 | |
13095 | * rt ----- | |
13096 | * rs ----- | |
13097 | * rd ----- | |
13098 | */ | |
7def8a4b | 13099 | static char *SDM(uint64 instruction, Dis_info *info) |
89a955e8 AM |
13100 | { |
13101 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 13102 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 AM |
13103 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
13104 | uint64 count3_value = extract_count3_14_13_12(instruction); | |
89a955e8 | 13105 | |
3f2aec07 ML |
13106 | const char *rt = GPR(rt_value, info); |
13107 | const char *rs = GPR(rs_value, info); | |
4066c152 | 13108 | uint64 count3 = encode_count3_from_count(count3_value); |
89a955e8 | 13109 | |
4066c152 | 13110 | return img_format("SDM %s, %s(%s), 0x%" PRIx64, rt, s_value, rs, count3); |
89a955e8 AM |
13111 | } |
13112 | ||
13113 | ||
13114 | /* | |
13115 | * | |
13116 | * | |
13117 | * 3 2 1 | |
13118 | * 10987654321098765432109876543210 | |
13119 | * 001000 01001001101 | |
13120 | * rt ----- | |
13121 | * rs ----- | |
13122 | * rd ----- | |
13123 | */ | |
7def8a4b | 13124 | static char *SDPC_48_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
13125 | { |
13126 | uint64 rt_value = extract_rt_41_40_39_38_37(instruction); | |
d3605cc0 | 13127 | int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction); |
89a955e8 | 13128 | |
3f2aec07 | 13129 | const char *rt = GPR(rt_value, info); |
22e7b52a | 13130 | g_autofree char *s = ADDRESS(s_value, 6, info); |
89a955e8 | 13131 | |
c5231692 | 13132 | return img_format("SDPC %s, %s", rt, s); |
89a955e8 AM |
13133 | } |
13134 | ||
13135 | ||
13136 | /* | |
13137 | * | |
13138 | * | |
13139 | * 3 2 1 | |
13140 | * 10987654321098765432109876543210 | |
13141 | * 001000 01001001101 | |
13142 | * rt ----- | |
13143 | * rs ----- | |
13144 | * rd ----- | |
13145 | */ | |
7def8a4b | 13146 | static char *SDXS(uint64 instruction, Dis_info *info) |
89a955e8 AM |
13147 | { |
13148 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 13149 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 13150 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 13151 | |
3f2aec07 ML |
13152 | const char *rd = GPR(rd_value, info); |
13153 | const char *rs = GPR(rs_value, info); | |
13154 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 13155 | |
c5231692 | 13156 | return img_format("SDXS %s, %s(%s)", rd, rs, rt); |
89a955e8 AM |
13157 | } |
13158 | ||
13159 | ||
13160 | /* | |
13161 | * | |
13162 | * | |
13163 | * 3 2 1 | |
13164 | * 10987654321098765432109876543210 | |
13165 | * 001000 01001001101 | |
13166 | * rt ----- | |
13167 | * rs ----- | |
13168 | * rd ----- | |
13169 | */ | |
7def8a4b | 13170 | static char *SDX(uint64 instruction, Dis_info *info) |
89a955e8 AM |
13171 | { |
13172 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 13173 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 13174 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 13175 | |
3f2aec07 ML |
13176 | const char *rd = GPR(rd_value, info); |
13177 | const char *rs = GPR(rs_value, info); | |
13178 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 13179 | |
c5231692 | 13180 | return img_format("SDX %s, %s(%s)", rd, rs, rt); |
89a955e8 AM |
13181 | } |
13182 | ||
13183 | ||
13184 | /* | |
13185 | * | |
13186 | * | |
13187 | * 3 2 1 | |
13188 | * 10987654321098765432109876543210 | |
13189 | * 001000 01001001101 | |
13190 | * rt ----- | |
13191 | * rs ----- | |
13192 | * rd ----- | |
13193 | */ | |
7def8a4b | 13194 | static char *SEB(uint64 instruction, Dis_info *info) |
89a955e8 AM |
13195 | { |
13196 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
13197 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
13198 | ||
3f2aec07 ML |
13199 | const char *rt = GPR(rt_value, info); |
13200 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 13201 | |
c5231692 | 13202 | return img_format("SEB %s, %s", rt, rs); |
89a955e8 AM |
13203 | } |
13204 | ||
13205 | ||
13206 | /* | |
13207 | * | |
13208 | * | |
13209 | * 3 2 1 | |
13210 | * 10987654321098765432109876543210 | |
13211 | * 001000 01001001101 | |
13212 | * rt ----- | |
13213 | * rs ----- | |
13214 | * rd ----- | |
13215 | */ | |
7def8a4b | 13216 | static char *SEH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
13217 | { |
13218 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
13219 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
13220 | ||
3f2aec07 ML |
13221 | const char *rt = GPR(rt_value, info); |
13222 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 13223 | |
c5231692 | 13224 | return img_format("SEH %s, %s", rt, rs); |
89a955e8 AM |
13225 | } |
13226 | ||
13227 | ||
13228 | /* | |
13229 | * | |
13230 | * | |
13231 | * 3 2 1 | |
13232 | * 10987654321098765432109876543210 | |
13233 | * 001000 01001001101 | |
13234 | * rt ----- | |
13235 | * rs ----- | |
13236 | * rd ----- | |
13237 | */ | |
7def8a4b | 13238 | static char *SEL_D(uint64 instruction, Dis_info *info) |
89a955e8 | 13239 | { |
17ce2f00 | 13240 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 13241 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 13242 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 13243 | |
3f2aec07 ML |
13244 | const char *fd = FPR(fd_value, info); |
13245 | const char *fs = FPR(fs_value, info); | |
13246 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 13247 | |
c5231692 | 13248 | return img_format("SEL.D %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
13249 | } |
13250 | ||
13251 | ||
13252 | /* | |
13253 | * | |
13254 | * | |
13255 | * 3 2 1 | |
13256 | * 10987654321098765432109876543210 | |
13257 | * 001000 01001001101 | |
13258 | * rt ----- | |
13259 | * rs ----- | |
13260 | * rd ----- | |
13261 | */ | |
7def8a4b | 13262 | static char *SEL_S(uint64 instruction, Dis_info *info) |
89a955e8 | 13263 | { |
17ce2f00 | 13264 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 13265 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 13266 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 13267 | |
3f2aec07 ML |
13268 | const char *fd = FPR(fd_value, info); |
13269 | const char *fs = FPR(fs_value, info); | |
13270 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 13271 | |
c5231692 | 13272 | return img_format("SEL.S %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
13273 | } |
13274 | ||
13275 | ||
13276 | /* | |
13277 | * | |
13278 | * | |
13279 | * 3 2 1 | |
13280 | * 10987654321098765432109876543210 | |
13281 | * 001000 01001001101 | |
13282 | * rt ----- | |
13283 | * rs ----- | |
13284 | * rd ----- | |
13285 | */ | |
7def8a4b | 13286 | static char *SELEQZ_D(uint64 instruction, Dis_info *info) |
89a955e8 | 13287 | { |
17ce2f00 | 13288 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 13289 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 13290 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 13291 | |
3f2aec07 ML |
13292 | const char *fd = FPR(fd_value, info); |
13293 | const char *fs = FPR(fs_value, info); | |
13294 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 13295 | |
c5231692 | 13296 | return img_format("SELEQZ.D %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
13297 | } |
13298 | ||
13299 | ||
13300 | /* | |
13301 | * | |
13302 | * | |
13303 | * 3 2 1 | |
13304 | * 10987654321098765432109876543210 | |
13305 | * 001000 01001001101 | |
13306 | * rt ----- | |
13307 | * rs ----- | |
13308 | * rd ----- | |
13309 | */ | |
7def8a4b | 13310 | static char *SELEQZ_S(uint64 instruction, Dis_info *info) |
89a955e8 | 13311 | { |
17ce2f00 | 13312 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 13313 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 13314 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 13315 | |
3f2aec07 ML |
13316 | const char *fd = FPR(fd_value, info); |
13317 | const char *fs = FPR(fs_value, info); | |
13318 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 13319 | |
c5231692 | 13320 | return img_format("SELEQZ.S %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
13321 | } |
13322 | ||
13323 | ||
13324 | /* | |
13325 | * | |
13326 | * | |
13327 | * 3 2 1 | |
13328 | * 10987654321098765432109876543210 | |
13329 | * 001000 01001001101 | |
13330 | * rt ----- | |
13331 | * rs ----- | |
13332 | * rd ----- | |
13333 | */ | |
7def8a4b | 13334 | static char *SELNEZ_D(uint64 instruction, Dis_info *info) |
89a955e8 | 13335 | { |
17ce2f00 | 13336 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 13337 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 13338 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 13339 | |
3f2aec07 ML |
13340 | const char *fd = FPR(fd_value, info); |
13341 | const char *fs = FPR(fs_value, info); | |
13342 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 13343 | |
c5231692 | 13344 | return img_format("SELNEZ.D %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
13345 | } |
13346 | ||
13347 | ||
13348 | /* | |
13349 | * | |
13350 | * | |
13351 | * 3 2 1 | |
13352 | * 10987654321098765432109876543210 | |
13353 | * 001000 01001001101 | |
13354 | * rt ----- | |
13355 | * rs ----- | |
13356 | * rd ----- | |
13357 | */ | |
7def8a4b | 13358 | static char *SELNEZ_S(uint64 instruction, Dis_info *info) |
89a955e8 | 13359 | { |
17ce2f00 | 13360 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 13361 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 13362 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 13363 | |
3f2aec07 ML |
13364 | const char *fd = FPR(fd_value, info); |
13365 | const char *fs = FPR(fs_value, info); | |
13366 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 13367 | |
c5231692 | 13368 | return img_format("SELNEZ.S %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
13369 | } |
13370 | ||
13371 | ||
13372 | /* | |
13373 | * | |
13374 | * | |
13375 | * 3 2 1 | |
13376 | * 10987654321098765432109876543210 | |
13377 | * 001000 01001001101 | |
13378 | * rt ----- | |
13379 | * rs ----- | |
13380 | * rd ----- | |
13381 | */ | |
7def8a4b | 13382 | static char *SEQI(uint64 instruction, Dis_info *info) |
89a955e8 AM |
13383 | { |
13384 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 13385 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 13386 | uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 13387 | |
3f2aec07 ML |
13388 | const char *rt = GPR(rt_value, info); |
13389 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 13390 | |
4066c152 | 13391 | return img_format("SEQI %s, %s, 0x%" PRIx64, rt, rs, u_value); |
89a955e8 AM |
13392 | } |
13393 | ||
13394 | ||
13395 | /* | |
13396 | * | |
13397 | * | |
13398 | * 3 2 1 | |
13399 | * 10987654321098765432109876543210 | |
13400 | * 001000 01001001101 | |
13401 | * rt ----- | |
13402 | * rs ----- | |
13403 | * rd ----- | |
13404 | */ | |
7def8a4b | 13405 | static char *SH_16_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
13406 | { |
13407 | uint64 rtz3_value = extract_rtz3_9_8_7(instruction); | |
89a955e8 | 13408 | uint64 rs3_value = extract_rs3_6_5_4(instruction); |
75199b40 | 13409 | uint64 u_value = extract_u_2_1__s1(instruction); |
89a955e8 | 13410 | |
3f2aec07 ML |
13411 | const char *rtz3 = GPR(decode_gpr_gpr3_src_store(rtz3_value, info), info); |
13412 | const char *rs3 = GPR(decode_gpr_gpr3(rs3_value, info), info); | |
89a955e8 | 13413 | |
4066c152 | 13414 | return img_format("SH %s, 0x%" PRIx64 "(%s)", rtz3, u_value, rs3); |
89a955e8 AM |
13415 | } |
13416 | ||
13417 | ||
13418 | /* | |
13419 | * | |
13420 | * | |
13421 | * 3 2 1 | |
13422 | * 10987654321098765432109876543210 | |
13423 | * 001000 01001001101 | |
13424 | * rt ----- | |
13425 | * rs ----- | |
13426 | * rd ----- | |
13427 | */ | |
7def8a4b | 13428 | static char *SH_GP_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
13429 | { |
13430 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
11b9732a | 13431 | uint64 u_value = extract_u_17_to_1__s1(instruction); |
89a955e8 | 13432 | |
3f2aec07 | 13433 | const char *rt = GPR(rt_value, info); |
89a955e8 | 13434 | |
4066c152 | 13435 | return img_format("SH %s, 0x%" PRIx64 "($%d)", rt, u_value, 28); |
89a955e8 AM |
13436 | } |
13437 | ||
13438 | ||
13439 | /* | |
13440 | * | |
13441 | * | |
13442 | * 3 2 1 | |
13443 | * 10987654321098765432109876543210 | |
13444 | * 001000 01001001101 | |
13445 | * rt ----- | |
13446 | * rs ----- | |
13447 | * rd ----- | |
13448 | */ | |
7def8a4b | 13449 | static char *SH_S9_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
13450 | { |
13451 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 13452 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 13453 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 13454 | |
3f2aec07 ML |
13455 | const char *rt = GPR(rt_value, info); |
13456 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 13457 | |
4066c152 | 13458 | return img_format("SH %s, %" PRId64 "(%s)", rt, s_value, rs); |
89a955e8 AM |
13459 | } |
13460 | ||
13461 | ||
13462 | /* | |
13463 | * | |
13464 | * | |
13465 | * 3 2 1 | |
13466 | * 10987654321098765432109876543210 | |
13467 | * 001000 01001001101 | |
13468 | * rt ----- | |
13469 | * rs ----- | |
13470 | * rd ----- | |
13471 | */ | |
7def8a4b | 13472 | static char *SH_U12_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
13473 | { |
13474 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 13475 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 13476 | uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 13477 | |
3f2aec07 ML |
13478 | const char *rt = GPR(rt_value, info); |
13479 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 13480 | |
4066c152 | 13481 | return img_format("SH %s, 0x%" PRIx64 "(%s)", rt, u_value, rs); |
89a955e8 AM |
13482 | } |
13483 | ||
13484 | ||
13485 | /* | |
13486 | * | |
13487 | * | |
13488 | * 3 2 1 | |
13489 | * 10987654321098765432109876543210 | |
13490 | * 001000 01001001101 | |
13491 | * rt ----- | |
13492 | * rs ----- | |
13493 | * rd ----- | |
13494 | */ | |
7def8a4b | 13495 | static char *SHE(uint64 instruction, Dis_info *info) |
89a955e8 AM |
13496 | { |
13497 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 13498 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 13499 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 13500 | |
3f2aec07 ML |
13501 | const char *rt = GPR(rt_value, info); |
13502 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 13503 | |
4066c152 | 13504 | return img_format("SHE %s, %" PRId64 "(%s)", rt, s_value, rs); |
89a955e8 AM |
13505 | } |
13506 | ||
13507 | ||
13508 | /* | |
5c65eed6 AM |
13509 | * [DSP] SHILO ac, shift - Shift an accumulator value leaving the result in |
13510 | * the same accumulator | |
89a955e8 AM |
13511 | * |
13512 | * 3 2 1 | |
13513 | * 10987654321098765432109876543210 | |
13514 | * 001000xxxx xxxx0000011101 | |
13515 | * shift ------ | |
13516 | * ac -- | |
13517 | */ | |
7def8a4b | 13518 | static char *SHILO(uint64 instruction, Dis_info *info) |
89a955e8 | 13519 | { |
d3605cc0 | 13520 | int64 shift_value = extract_shift__se5_21_20_19_18_17_16(instruction); |
0f74e61d | 13521 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 13522 | |
3f2aec07 | 13523 | const char *ac = AC(ac_value, info); |
89a955e8 | 13524 | |
4066c152 | 13525 | return img_format("SHILO %s, 0x%" PRIx64, ac, shift_value); |
89a955e8 AM |
13526 | } |
13527 | ||
13528 | ||
13529 | /* | |
5c65eed6 AM |
13530 | * [DSP] SHILOV ac, rs - Variable shift of accumulator value leaving the result |
13531 | * in the same accumulator | |
89a955e8 AM |
13532 | * |
13533 | * 3 2 1 | |
13534 | * 10987654321098765432109876543210 | |
13535 | * 001000xxxxx 01001001111111 | |
13536 | * rs ----- | |
13537 | * ac -- | |
13538 | */ | |
7def8a4b | 13539 | static char *SHILOV(uint64 instruction, Dis_info *info) |
89a955e8 AM |
13540 | { |
13541 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
0f74e61d | 13542 | uint64 ac_value = extract_ac_15_14(instruction); |
89a955e8 | 13543 | |
3f2aec07 ML |
13544 | const char *rs = GPR(rs_value, info); |
13545 | const char *ac = AC(ac_value, info); | |
89a955e8 | 13546 | |
c5231692 | 13547 | return img_format("SHILOV %s, %s", ac, rs); |
89a955e8 AM |
13548 | } |
13549 | ||
13550 | ||
13551 | /* | |
5c65eed6 | 13552 | * [DSP] SHLL.PH rt, rs, sa - Shift left logical vector pair halfwords |
89a955e8 AM |
13553 | * |
13554 | * 3 2 1 | |
13555 | * 10987654321098765432109876543210 | |
13556 | * 001000 001110110101 | |
13557 | * rt ----- | |
13558 | * rs ----- | |
13559 | * sa ---- | |
13560 | */ | |
7def8a4b | 13561 | static char *SHLL_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
13562 | { |
13563 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
13564 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
13565 | uint64 sa_value = extract_sa_15_14_13_12(instruction); | |
13566 | ||
3f2aec07 ML |
13567 | const char *rt = GPR(rt_value, info); |
13568 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 13569 | |
4066c152 | 13570 | return img_format("SHLL.PH %s, %s, 0x%" PRIx64, rt, rs, sa_value); |
89a955e8 AM |
13571 | } |
13572 | ||
13573 | ||
13574 | /* | |
5c65eed6 | 13575 | * [DSP] SHLL.QB rt, rs, sa - Shift left logical vector quad bytes |
89a955e8 AM |
13576 | * |
13577 | * 3 2 1 | |
13578 | * 10987654321098765432109876543210 | |
13579 | * 001000 0100001111111 | |
13580 | * rt ----- | |
13581 | * rs ----- | |
13582 | * sa --- | |
13583 | */ | |
7def8a4b | 13584 | static char *SHLL_QB(uint64 instruction, Dis_info *info) |
89a955e8 AM |
13585 | { |
13586 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
13587 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
13588 | uint64 sa_value = extract_sa_15_14_13(instruction); | |
13589 | ||
3f2aec07 ML |
13590 | const char *rt = GPR(rt_value, info); |
13591 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 13592 | |
4066c152 | 13593 | return img_format("SHLL.QB %s, %s, 0x%" PRIx64, rt, rs, sa_value); |
89a955e8 AM |
13594 | } |
13595 | ||
13596 | ||
13597 | /* | |
5c65eed6 AM |
13598 | * [DSP] SHLL_S.PH rt, rs, sa - Shift left logical vector pair halfwords |
13599 | * with saturation | |
89a955e8 AM |
13600 | * |
13601 | * 3 2 1 | |
13602 | * 10987654321098765432109876543210 | |
13603 | * 001000 001110110101 | |
13604 | * rt ----- | |
13605 | * rs ----- | |
13606 | * sa ---- | |
13607 | */ | |
7def8a4b | 13608 | static char *SHLL_S_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
13609 | { |
13610 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
13611 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
13612 | uint64 sa_value = extract_sa_15_14_13_12(instruction); | |
13613 | ||
3f2aec07 ML |
13614 | const char *rt = GPR(rt_value, info); |
13615 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 13616 | |
4066c152 | 13617 | return img_format("SHLL_S.PH %s, %s, 0x%" PRIx64, rt, rs, sa_value); |
89a955e8 AM |
13618 | } |
13619 | ||
13620 | ||
13621 | /* | |
5c65eed6 | 13622 | * [DSP] SHLL_S.PH rt, rs, sa - Shift left logical word with saturation |
89a955e8 AM |
13623 | * |
13624 | * 3 2 1 | |
13625 | * 10987654321098765432109876543210 | |
5c65eed6 | 13626 | * 001000 x1111110101 |
89a955e8 AM |
13627 | * rt ----- |
13628 | * rs ----- | |
5c65eed6 | 13629 | * sa ----- |
89a955e8 | 13630 | */ |
7def8a4b | 13631 | static char *SHLL_S_W(uint64 instruction, Dis_info *info) |
89a955e8 AM |
13632 | { |
13633 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 13634 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 13635 | uint64 sa_value = extract_sa_15_14_13_12_11(instruction); |
89a955e8 | 13636 | |
3f2aec07 ML |
13637 | const char *rt = GPR(rt_value, info); |
13638 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 13639 | |
4066c152 | 13640 | return img_format("SHLL_S.W %s, %s, 0x%" PRIx64, rt, rs, sa_value); |
89a955e8 AM |
13641 | } |
13642 | ||
13643 | ||
13644 | /* | |
5c65eed6 AM |
13645 | * [DSP] SHLLV.PH rd, rt, rs - Shift left logical variable vector pair |
13646 | * halfwords | |
89a955e8 AM |
13647 | * |
13648 | * 3 2 1 | |
13649 | * 10987654321098765432109876543210 | |
5c65eed6 | 13650 | * 001000 01110001101 |
89a955e8 AM |
13651 | * rt ----- |
13652 | * rs ----- | |
13653 | * rd ----- | |
13654 | */ | |
7def8a4b | 13655 | static char *SHLLV_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
13656 | { |
13657 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 13658 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 13659 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 13660 | |
3f2aec07 ML |
13661 | const char *rd = GPR(rd_value, info); |
13662 | const char *rt = GPR(rt_value, info); | |
13663 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 13664 | |
c5231692 | 13665 | return img_format("SHLLV.PH %s, %s, %s", rd, rt, rs); |
89a955e8 AM |
13666 | } |
13667 | ||
13668 | ||
13669 | /* | |
5c65eed6 | 13670 | * [DSP] SHLLV_S.QB rd, rt, rs - Shift left logical variable vector quad bytes |
89a955e8 AM |
13671 | * |
13672 | * 3 2 1 | |
13673 | * 10987654321098765432109876543210 | |
5c65eed6 | 13674 | * 001000 x1110010101 |
89a955e8 AM |
13675 | * rt ----- |
13676 | * rs ----- | |
13677 | * rd ----- | |
13678 | */ | |
7def8a4b | 13679 | static char *SHLLV_QB(uint64 instruction, Dis_info *info) |
89a955e8 AM |
13680 | { |
13681 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 13682 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 13683 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 13684 | |
3f2aec07 ML |
13685 | const char *rd = GPR(rd_value, info); |
13686 | const char *rt = GPR(rt_value, info); | |
13687 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 13688 | |
c5231692 | 13689 | return img_format("SHLLV.QB %s, %s, %s", rd, rt, rs); |
89a955e8 AM |
13690 | } |
13691 | ||
13692 | ||
13693 | /* | |
5c65eed6 AM |
13694 | * [DSP] SHLLV.PH rd, rt, rs - Shift left logical variable vector pair |
13695 | * halfwords with saturation | |
89a955e8 AM |
13696 | * |
13697 | * 3 2 1 | |
13698 | * 10987654321098765432109876543210 | |
5c65eed6 | 13699 | * 001000 11110001101 |
89a955e8 AM |
13700 | * rt ----- |
13701 | * rs ----- | |
13702 | * rd ----- | |
13703 | */ | |
7def8a4b | 13704 | static char *SHLLV_S_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
13705 | { |
13706 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 13707 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 13708 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 13709 | |
3f2aec07 ML |
13710 | const char *rd = GPR(rd_value, info); |
13711 | const char *rt = GPR(rt_value, info); | |
13712 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 13713 | |
c5231692 | 13714 | return img_format("SHLLV_S.PH %s, %s, %s", rd, rt, rs); |
89a955e8 AM |
13715 | } |
13716 | ||
13717 | ||
13718 | /* | |
5c65eed6 | 13719 | * [DSP] SHLLV_S.W rd, rt, rs - Shift left logical variable vector word |
89a955e8 AM |
13720 | * |
13721 | * 3 2 1 | |
13722 | * 10987654321098765432109876543210 | |
5c65eed6 | 13723 | * 001000 x1111010101 |
89a955e8 AM |
13724 | * rt ----- |
13725 | * rs ----- | |
13726 | * rd ----- | |
13727 | */ | |
7def8a4b | 13728 | static char *SHLLV_S_W(uint64 instruction, Dis_info *info) |
89a955e8 AM |
13729 | { |
13730 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 13731 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 13732 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 13733 | |
3f2aec07 ML |
13734 | const char *rd = GPR(rd_value, info); |
13735 | const char *rt = GPR(rt_value, info); | |
13736 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 13737 | |
c5231692 | 13738 | return img_format("SHLLV_S.W %s, %s, %s", rd, rt, rs); |
89a955e8 AM |
13739 | } |
13740 | ||
13741 | ||
13742 | /* | |
13743 | * | |
13744 | * | |
13745 | * 3 2 1 | |
13746 | * 10987654321098765432109876543210 | |
13747 | * 001000 01001001101 | |
13748 | * rt ----- | |
13749 | * rs ----- | |
13750 | * rd ----- | |
13751 | */ | |
7def8a4b | 13752 | static char *SHRA_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
13753 | { |
13754 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 13755 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 13756 | uint64 sa_value = extract_sa_15_14_13_12(instruction); |
89a955e8 | 13757 | |
3f2aec07 ML |
13758 | const char *rt = GPR(rt_value, info); |
13759 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 13760 | |
4066c152 | 13761 | return img_format("SHRA.PH %s, %s, 0x%" PRIx64, rt, rs, sa_value); |
89a955e8 AM |
13762 | } |
13763 | ||
13764 | ||
13765 | /* | |
13766 | * | |
13767 | * | |
13768 | * 3 2 1 | |
13769 | * 10987654321098765432109876543210 | |
13770 | * 001000 01001001101 | |
13771 | * rt ----- | |
13772 | * rs ----- | |
13773 | * rd ----- | |
13774 | */ | |
7def8a4b | 13775 | static char *SHRA_QB(uint64 instruction, Dis_info *info) |
89a955e8 AM |
13776 | { |
13777 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 13778 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 13779 | uint64 sa_value = extract_sa_15_14_13(instruction); |
89a955e8 | 13780 | |
3f2aec07 ML |
13781 | const char *rt = GPR(rt_value, info); |
13782 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 13783 | |
4066c152 | 13784 | return img_format("SHRA.QB %s, %s, 0x%" PRIx64, rt, rs, sa_value); |
89a955e8 AM |
13785 | } |
13786 | ||
13787 | ||
13788 | /* | |
13789 | * | |
13790 | * | |
13791 | * 3 2 1 | |
13792 | * 10987654321098765432109876543210 | |
13793 | * 001000 01001001101 | |
13794 | * rt ----- | |
13795 | * rs ----- | |
13796 | * rd ----- | |
13797 | */ | |
7def8a4b | 13798 | static char *SHRA_R_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
13799 | { |
13800 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 13801 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 13802 | uint64 sa_value = extract_sa_15_14_13_12(instruction); |
89a955e8 | 13803 | |
3f2aec07 ML |
13804 | const char *rt = GPR(rt_value, info); |
13805 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 13806 | |
4066c152 | 13807 | return img_format("SHRA_R.PH %s, %s, 0x%" PRIx64, rt, rs, sa_value); |
89a955e8 AM |
13808 | } |
13809 | ||
13810 | ||
13811 | /* | |
13812 | * | |
13813 | * | |
13814 | * 3 2 1 | |
13815 | * 10987654321098765432109876543210 | |
13816 | * 001000 01001001101 | |
13817 | * rt ----- | |
13818 | * rs ----- | |
13819 | * rd ----- | |
13820 | */ | |
7def8a4b | 13821 | static char *SHRA_R_QB(uint64 instruction, Dis_info *info) |
89a955e8 AM |
13822 | { |
13823 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 13824 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 13825 | uint64 sa_value = extract_sa_15_14_13(instruction); |
89a955e8 | 13826 | |
3f2aec07 ML |
13827 | const char *rt = GPR(rt_value, info); |
13828 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 13829 | |
4066c152 | 13830 | return img_format("SHRA_R.QB %s, %s, 0x%" PRIx64, rt, rs, sa_value); |
89a955e8 AM |
13831 | } |
13832 | ||
13833 | ||
13834 | /* | |
13835 | * | |
13836 | * | |
13837 | * 3 2 1 | |
13838 | * 10987654321098765432109876543210 | |
13839 | * 001000 01001001101 | |
13840 | * rt ----- | |
13841 | * rs ----- | |
13842 | * rd ----- | |
13843 | */ | |
7def8a4b | 13844 | static char *SHRA_R_W(uint64 instruction, Dis_info *info) |
89a955e8 AM |
13845 | { |
13846 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 13847 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 13848 | uint64 sa_value = extract_sa_15_14_13_12_11(instruction); |
89a955e8 | 13849 | |
3f2aec07 ML |
13850 | const char *rt = GPR(rt_value, info); |
13851 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 13852 | |
4066c152 | 13853 | return img_format("SHRA_R.W %s, %s, 0x%" PRIx64, rt, rs, sa_value); |
89a955e8 AM |
13854 | } |
13855 | ||
13856 | ||
13857 | /* | |
13858 | * | |
13859 | * | |
13860 | * 3 2 1 | |
13861 | * 10987654321098765432109876543210 | |
13862 | * 001000 01001001101 | |
13863 | * rt ----- | |
13864 | * rs ----- | |
13865 | * rd ----- | |
13866 | */ | |
7def8a4b | 13867 | static char *SHRAV_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
13868 | { |
13869 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 13870 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 13871 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 13872 | |
3f2aec07 ML |
13873 | const char *rd = GPR(rd_value, info); |
13874 | const char *rt = GPR(rt_value, info); | |
13875 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 13876 | |
c5231692 | 13877 | return img_format("SHRAV.PH %s, %s, %s", rd, rt, rs); |
89a955e8 AM |
13878 | } |
13879 | ||
13880 | ||
13881 | /* | |
13882 | * | |
13883 | * | |
13884 | * 3 2 1 | |
13885 | * 10987654321098765432109876543210 | |
13886 | * 001000 01001001101 | |
13887 | * rt ----- | |
13888 | * rs ----- | |
13889 | * rd ----- | |
13890 | */ | |
7def8a4b | 13891 | static char *SHRAV_QB(uint64 instruction, Dis_info *info) |
89a955e8 AM |
13892 | { |
13893 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 13894 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 13895 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 13896 | |
3f2aec07 ML |
13897 | const char *rd = GPR(rd_value, info); |
13898 | const char *rt = GPR(rt_value, info); | |
13899 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 13900 | |
c5231692 | 13901 | return img_format("SHRAV.QB %s, %s, %s", rd, rt, rs); |
89a955e8 AM |
13902 | } |
13903 | ||
13904 | ||
13905 | /* | |
13906 | * | |
13907 | * | |
13908 | * 3 2 1 | |
13909 | * 10987654321098765432109876543210 | |
13910 | * 001000 01001001101 | |
13911 | * rt ----- | |
13912 | * rs ----- | |
13913 | * rd ----- | |
13914 | */ | |
7def8a4b | 13915 | static char *SHRAV_R_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
13916 | { |
13917 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 13918 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 13919 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 13920 | |
3f2aec07 ML |
13921 | const char *rd = GPR(rd_value, info); |
13922 | const char *rt = GPR(rt_value, info); | |
13923 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 13924 | |
c5231692 | 13925 | return img_format("SHRAV_R.PH %s, %s, %s", rd, rt, rs); |
89a955e8 AM |
13926 | } |
13927 | ||
13928 | ||
13929 | /* | |
13930 | * | |
13931 | * | |
13932 | * 3 2 1 | |
13933 | * 10987654321098765432109876543210 | |
13934 | * 001000 01001001101 | |
13935 | * rt ----- | |
13936 | * rs ----- | |
13937 | * rd ----- | |
13938 | */ | |
7def8a4b | 13939 | static char *SHRAV_R_QB(uint64 instruction, Dis_info *info) |
89a955e8 AM |
13940 | { |
13941 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 13942 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 13943 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 13944 | |
3f2aec07 ML |
13945 | const char *rd = GPR(rd_value, info); |
13946 | const char *rt = GPR(rt_value, info); | |
13947 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 13948 | |
c5231692 | 13949 | return img_format("SHRAV_R.QB %s, %s, %s", rd, rt, rs); |
89a955e8 AM |
13950 | } |
13951 | ||
13952 | ||
13953 | /* | |
13954 | * | |
13955 | * | |
13956 | * 3 2 1 | |
13957 | * 10987654321098765432109876543210 | |
13958 | * 001000 01001001101 | |
13959 | * rt ----- | |
13960 | * rs ----- | |
13961 | * rd ----- | |
13962 | */ | |
7def8a4b | 13963 | static char *SHRAV_R_W(uint64 instruction, Dis_info *info) |
89a955e8 AM |
13964 | { |
13965 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 13966 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 13967 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 13968 | |
3f2aec07 ML |
13969 | const char *rd = GPR(rd_value, info); |
13970 | const char *rt = GPR(rt_value, info); | |
13971 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 13972 | |
c5231692 | 13973 | return img_format("SHRAV_R.W %s, %s, %s", rd, rt, rs); |
89a955e8 AM |
13974 | } |
13975 | ||
13976 | ||
13977 | /* | |
5c65eed6 | 13978 | * [DSP] SHRL.PH rt, rs, sa - Shift right logical two halfwords |
89a955e8 AM |
13979 | * |
13980 | * 3 2 1 | |
13981 | * 10987654321098765432109876543210 | |
5c65eed6 | 13982 | * 001000 001111111111 |
89a955e8 AM |
13983 | * rt ----- |
13984 | * rs ----- | |
5c65eed6 | 13985 | * sa ---- |
89a955e8 | 13986 | */ |
7def8a4b | 13987 | static char *SHRL_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
13988 | { |
13989 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 13990 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 13991 | uint64 sa_value = extract_sa_15_14_13_12(instruction); |
89a955e8 | 13992 | |
3f2aec07 ML |
13993 | const char *rt = GPR(rt_value, info); |
13994 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 13995 | |
4066c152 | 13996 | return img_format("SHRL.PH %s, %s, 0x%" PRIx64, rt, rs, sa_value); |
89a955e8 AM |
13997 | } |
13998 | ||
13999 | ||
14000 | /* | |
5c65eed6 | 14001 | * [DSP] SHRL.QB rt, rs, sa - Shift right logical vector quad bytes |
89a955e8 AM |
14002 | * |
14003 | * 3 2 1 | |
14004 | * 10987654321098765432109876543210 | |
5c65eed6 | 14005 | * 001000 1100001111111 |
89a955e8 AM |
14006 | * rt ----- |
14007 | * rs ----- | |
5c65eed6 | 14008 | * sa --- |
89a955e8 | 14009 | */ |
7def8a4b | 14010 | static char *SHRL_QB(uint64 instruction, Dis_info *info) |
89a955e8 AM |
14011 | { |
14012 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 14013 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 14014 | uint64 sa_value = extract_sa_15_14_13(instruction); |
89a955e8 | 14015 | |
3f2aec07 ML |
14016 | const char *rt = GPR(rt_value, info); |
14017 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 14018 | |
4066c152 | 14019 | return img_format("SHRL.QB %s, %s, 0x%" PRIx64, rt, rs, sa_value); |
89a955e8 AM |
14020 | } |
14021 | ||
14022 | ||
14023 | /* | |
5c65eed6 AM |
14024 | * [DSP] SHLLV.PH rd, rt, rs - Shift right logical variable vector pair of |
14025 | * halfwords | |
89a955e8 AM |
14026 | * |
14027 | * 3 2 1 | |
14028 | * 10987654321098765432109876543210 | |
5c65eed6 | 14029 | * 001000 x1100010101 |
89a955e8 AM |
14030 | * rt ----- |
14031 | * rs ----- | |
14032 | * rd ----- | |
14033 | */ | |
7def8a4b | 14034 | static char *SHRLV_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
14035 | { |
14036 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 14037 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 14038 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 14039 | |
3f2aec07 ML |
14040 | const char *rd = GPR(rd_value, info); |
14041 | const char *rt = GPR(rt_value, info); | |
14042 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 14043 | |
c5231692 | 14044 | return img_format("SHRLV.PH %s, %s, %s", rd, rt, rs); |
89a955e8 AM |
14045 | } |
14046 | ||
14047 | ||
14048 | /* | |
5c65eed6 | 14049 | * [DSP] SHLLV.QB rd, rt, rs - Shift right logical variable vector quad bytes |
89a955e8 AM |
14050 | * |
14051 | * 3 2 1 | |
14052 | * 10987654321098765432109876543210 | |
5c65eed6 | 14053 | * 001000 x1101010101 |
89a955e8 AM |
14054 | * rt ----- |
14055 | * rs ----- | |
14056 | * rd ----- | |
14057 | */ | |
7def8a4b | 14058 | static char *SHRLV_QB(uint64 instruction, Dis_info *info) |
89a955e8 AM |
14059 | { |
14060 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 14061 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 14062 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 14063 | |
3f2aec07 ML |
14064 | const char *rd = GPR(rd_value, info); |
14065 | const char *rt = GPR(rt_value, info); | |
14066 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 14067 | |
c5231692 | 14068 | return img_format("SHRLV.QB %s, %s, %s", rd, rt, rs); |
89a955e8 AM |
14069 | } |
14070 | ||
14071 | ||
14072 | /* | |
14073 | * | |
14074 | * | |
14075 | * 3 2 1 | |
14076 | * 10987654321098765432109876543210 | |
14077 | * 001000 01001001101 | |
14078 | * rt ----- | |
14079 | * rs ----- | |
14080 | * rd ----- | |
14081 | */ | |
7def8a4b | 14082 | static char *SHX(uint64 instruction, Dis_info *info) |
89a955e8 AM |
14083 | { |
14084 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 14085 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 14086 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 14087 | |
3f2aec07 ML |
14088 | const char *rd = GPR(rd_value, info); |
14089 | const char *rs = GPR(rs_value, info); | |
14090 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 14091 | |
c5231692 | 14092 | return img_format("SHX %s, %s(%s)", rd, rs, rt); |
89a955e8 AM |
14093 | } |
14094 | ||
14095 | ||
14096 | /* | |
14097 | * | |
14098 | * | |
14099 | * 3 2 1 | |
14100 | * 10987654321098765432109876543210 | |
14101 | * 001000 01001001101 | |
14102 | * rt ----- | |
14103 | * rs ----- | |
14104 | * rd ----- | |
14105 | */ | |
7def8a4b | 14106 | static char *SHXS(uint64 instruction, Dis_info *info) |
89a955e8 AM |
14107 | { |
14108 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 14109 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 14110 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 14111 | |
3f2aec07 ML |
14112 | const char *rd = GPR(rd_value, info); |
14113 | const char *rs = GPR(rs_value, info); | |
14114 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 14115 | |
c5231692 | 14116 | return img_format("SHXS %s, %s(%s)", rd, rs, rt); |
89a955e8 AM |
14117 | } |
14118 | ||
14119 | ||
14120 | /* | |
14121 | * | |
14122 | * | |
14123 | * 3 2 1 | |
14124 | * 10987654321098765432109876543210 | |
14125 | * 001000 01001001101 | |
14126 | * rt ----- | |
14127 | * rs ----- | |
14128 | * rd ----- | |
14129 | */ | |
7def8a4b | 14130 | static char *SIGRIE(uint64 instruction, Dis_info *info) |
89a955e8 AM |
14131 | { |
14132 | uint64 code_value = extract_code_18_to_0(instruction); | |
14133 | ||
89a955e8 | 14134 | |
4066c152 | 14135 | return img_format("SIGRIE 0x%" PRIx64, code_value); |
89a955e8 AM |
14136 | } |
14137 | ||
14138 | ||
14139 | /* | |
14140 | * | |
14141 | * | |
14142 | * 3 2 1 | |
14143 | * 10987654321098765432109876543210 | |
14144 | * 001000 01001001101 | |
14145 | * rt ----- | |
14146 | * rs ----- | |
14147 | * rd ----- | |
14148 | */ | |
7def8a4b | 14149 | static char *SLL_16_(uint64 instruction, Dis_info *info) |
89a955e8 | 14150 | { |
89a955e8 AM |
14151 | uint64 rt3_value = extract_rt3_9_8_7(instruction); |
14152 | uint64 rs3_value = extract_rs3_6_5_4(instruction); | |
75199b40 | 14153 | uint64 shift3_value = extract_shift3_2_1_0(instruction); |
89a955e8 | 14154 | |
3f2aec07 ML |
14155 | const char *rt3 = GPR(decode_gpr_gpr3(rt3_value, info), info); |
14156 | const char *rs3 = GPR(decode_gpr_gpr3(rs3_value, info), info); | |
4066c152 | 14157 | uint64 shift3 = encode_shift3_from_shift(shift3_value); |
89a955e8 | 14158 | |
4066c152 | 14159 | return img_format("SLL %s, %s, 0x%" PRIx64, rt3, rs3, shift3); |
89a955e8 AM |
14160 | } |
14161 | ||
14162 | ||
14163 | /* | |
14164 | * | |
14165 | * | |
14166 | * 3 2 1 | |
14167 | * 10987654321098765432109876543210 | |
14168 | * 001000 01001001101 | |
14169 | * rt ----- | |
14170 | * rs ----- | |
14171 | * rd ----- | |
14172 | */ | |
7def8a4b | 14173 | static char *SLL_32_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
14174 | { |
14175 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 14176 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 14177 | uint64 shift_value = extract_shift_4_3_2_1_0(instruction); |
89a955e8 | 14178 | |
3f2aec07 ML |
14179 | const char *rt = GPR(rt_value, info); |
14180 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 14181 | |
4066c152 | 14182 | return img_format("SLL %s, %s, 0x%" PRIx64, rt, rs, shift_value); |
89a955e8 AM |
14183 | } |
14184 | ||
14185 | ||
14186 | /* | |
14187 | * | |
14188 | * | |
14189 | * 3 2 1 | |
14190 | * 10987654321098765432109876543210 | |
14191 | * 001000 01001001101 | |
14192 | * rt ----- | |
14193 | * rs ----- | |
14194 | * rd ----- | |
14195 | */ | |
7def8a4b | 14196 | static char *SLLV(uint64 instruction, Dis_info *info) |
89a955e8 AM |
14197 | { |
14198 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 14199 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 14200 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 14201 | |
3f2aec07 ML |
14202 | const char *rd = GPR(rd_value, info); |
14203 | const char *rs = GPR(rs_value, info); | |
14204 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 14205 | |
c5231692 | 14206 | return img_format("SLLV %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
14207 | } |
14208 | ||
14209 | ||
14210 | /* | |
14211 | * | |
14212 | * | |
14213 | * 3 2 1 | |
14214 | * 10987654321098765432109876543210 | |
14215 | * 001000 01001001101 | |
14216 | * rt ----- | |
14217 | * rs ----- | |
14218 | * rd ----- | |
14219 | */ | |
7def8a4b | 14220 | static char *SLT(uint64 instruction, Dis_info *info) |
89a955e8 AM |
14221 | { |
14222 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 14223 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 14224 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 14225 | |
3f2aec07 ML |
14226 | const char *rd = GPR(rd_value, info); |
14227 | const char *rs = GPR(rs_value, info); | |
14228 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 14229 | |
c5231692 | 14230 | return img_format("SLT %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
14231 | } |
14232 | ||
14233 | ||
14234 | /* | |
14235 | * | |
14236 | * | |
14237 | * 3 2 1 | |
14238 | * 10987654321098765432109876543210 | |
14239 | * 001000 01001001101 | |
14240 | * rt ----- | |
14241 | * rs ----- | |
14242 | * rd ----- | |
14243 | */ | |
7def8a4b | 14244 | static char *SLTI(uint64 instruction, Dis_info *info) |
89a955e8 AM |
14245 | { |
14246 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 14247 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 14248 | uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 14249 | |
3f2aec07 ML |
14250 | const char *rt = GPR(rt_value, info); |
14251 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 14252 | |
4066c152 | 14253 | return img_format("SLTI %s, %s, 0x%" PRIx64, rt, rs, u_value); |
89a955e8 AM |
14254 | } |
14255 | ||
14256 | ||
14257 | /* | |
14258 | * | |
14259 | * | |
14260 | * 3 2 1 | |
14261 | * 10987654321098765432109876543210 | |
14262 | * 001000 01001001101 | |
14263 | * rt ----- | |
14264 | * rs ----- | |
14265 | * rd ----- | |
14266 | */ | |
7def8a4b | 14267 | static char *SLTIU(uint64 instruction, Dis_info *info) |
89a955e8 AM |
14268 | { |
14269 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 14270 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 14271 | uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 14272 | |
3f2aec07 ML |
14273 | const char *rt = GPR(rt_value, info); |
14274 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 14275 | |
4066c152 | 14276 | return img_format("SLTIU %s, %s, 0x%" PRIx64, rt, rs, u_value); |
89a955e8 AM |
14277 | } |
14278 | ||
14279 | ||
14280 | /* | |
14281 | * | |
14282 | * | |
14283 | * 3 2 1 | |
14284 | * 10987654321098765432109876543210 | |
14285 | * 001000 01001001101 | |
14286 | * rt ----- | |
14287 | * rs ----- | |
14288 | * rd ----- | |
14289 | */ | |
7def8a4b | 14290 | static char *SLTU(uint64 instruction, Dis_info *info) |
89a955e8 AM |
14291 | { |
14292 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 14293 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 14294 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 14295 | |
3f2aec07 ML |
14296 | const char *rd = GPR(rd_value, info); |
14297 | const char *rs = GPR(rs_value, info); | |
14298 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 14299 | |
c5231692 | 14300 | return img_format("SLTU %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
14301 | } |
14302 | ||
14303 | ||
14304 | /* | |
14305 | * | |
14306 | * | |
14307 | * 3 2 1 | |
14308 | * 10987654321098765432109876543210 | |
14309 | * 001000 01001001101 | |
14310 | * rt ----- | |
14311 | * rs ----- | |
14312 | * rd ----- | |
14313 | */ | |
7def8a4b | 14314 | static char *SOV(uint64 instruction, Dis_info *info) |
89a955e8 AM |
14315 | { |
14316 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 14317 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 14318 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 14319 | |
3f2aec07 ML |
14320 | const char *rd = GPR(rd_value, info); |
14321 | const char *rs = GPR(rs_value, info); | |
14322 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 14323 | |
c5231692 | 14324 | return img_format("SOV %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
14325 | } |
14326 | ||
14327 | ||
14328 | /* | |
14329 | * | |
14330 | * | |
14331 | * 3 2 1 | |
14332 | * 10987654321098765432109876543210 | |
14333 | * 001000 01001001101 | |
14334 | * rt ----- | |
14335 | * rs ----- | |
14336 | * rd ----- | |
14337 | */ | |
7def8a4b | 14338 | static char *SPECIAL2(uint64 instruction, Dis_info *info) |
89a955e8 AM |
14339 | { |
14340 | uint64 op_value = extract_op_25_to_3(instruction); | |
14341 | ||
89a955e8 | 14342 | |
4066c152 | 14343 | return img_format("SPECIAL2 0x%" PRIx64, op_value); |
89a955e8 AM |
14344 | } |
14345 | ||
14346 | ||
14347 | /* | |
14348 | * | |
14349 | * | |
14350 | * 3 2 1 | |
14351 | * 10987654321098765432109876543210 | |
14352 | * 001000 01001001101 | |
14353 | * rt ----- | |
14354 | * rs ----- | |
14355 | * rd ----- | |
14356 | */ | |
7def8a4b | 14357 | static char *SQRT_D(uint64 instruction, Dis_info *info) |
89a955e8 | 14358 | { |
17ce2f00 | 14359 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 14360 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 14361 | |
3f2aec07 ML |
14362 | const char *ft = FPR(ft_value, info); |
14363 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 14364 | |
c5231692 | 14365 | return img_format("SQRT.D %s, %s", ft, fs); |
89a955e8 AM |
14366 | } |
14367 | ||
14368 | ||
14369 | /* | |
14370 | * | |
14371 | * | |
14372 | * 3 2 1 | |
14373 | * 10987654321098765432109876543210 | |
14374 | * 001000 01001001101 | |
14375 | * rt ----- | |
14376 | * rs ----- | |
14377 | * rd ----- | |
14378 | */ | |
7def8a4b | 14379 | static char *SQRT_S(uint64 instruction, Dis_info *info) |
89a955e8 | 14380 | { |
17ce2f00 | 14381 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 14382 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 14383 | |
3f2aec07 ML |
14384 | const char *ft = FPR(ft_value, info); |
14385 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 14386 | |
c5231692 | 14387 | return img_format("SQRT.S %s, %s", ft, fs); |
89a955e8 AM |
14388 | } |
14389 | ||
14390 | ||
14391 | /* | |
14392 | * SRA rd, rt, sa - Shift Word Right Arithmetic | |
14393 | * | |
14394 | * 3 2 1 | |
14395 | * 10987654321098765432109876543210 | |
14396 | * 00000000000 000011 | |
14397 | * rt ----- | |
14398 | * rd ----- | |
14399 | * sa ----- | |
14400 | */ | |
7def8a4b | 14401 | static char *SRA(uint64 instruction, Dis_info *info) |
89a955e8 AM |
14402 | { |
14403 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
14404 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
14405 | uint64 shift_value = extract_shift_4_3_2_1_0(instruction); | |
14406 | ||
3f2aec07 ML |
14407 | const char *rt = GPR(rt_value, info); |
14408 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 14409 | |
4066c152 | 14410 | return img_format("SRA %s, %s, 0x%" PRIx64, rt, rs, shift_value); |
89a955e8 AM |
14411 | } |
14412 | ||
14413 | ||
14414 | /* | |
14415 | * SRAV rd, rt, rs - Shift Word Right Arithmetic Variable | |
14416 | * | |
14417 | * 3 2 1 | |
14418 | * 10987654321098765432109876543210 | |
14419 | * 001000 00000000111 | |
14420 | * rs ----- | |
14421 | * rt ----- | |
14422 | * rd ----- | |
14423 | */ | |
7def8a4b | 14424 | static char *SRAV(uint64 instruction, Dis_info *info) |
89a955e8 AM |
14425 | { |
14426 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 14427 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 14428 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 14429 | |
3f2aec07 ML |
14430 | const char *rd = GPR(rd_value, info); |
14431 | const char *rs = GPR(rs_value, info); | |
14432 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 14433 | |
c5231692 | 14434 | return img_format("SRAV %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
14435 | } |
14436 | ||
14437 | ||
14438 | /* | |
14439 | * | |
14440 | * | |
14441 | * 3 2 1 | |
14442 | * 10987654321098765432109876543210 | |
14443 | * 001000 00000000111 | |
14444 | * rs ----- | |
14445 | * rt ----- | |
14446 | * rd ----- | |
14447 | */ | |
7def8a4b | 14448 | static char *SRL_16_(uint64 instruction, Dis_info *info) |
89a955e8 | 14449 | { |
89a955e8 AM |
14450 | uint64 rt3_value = extract_rt3_9_8_7(instruction); |
14451 | uint64 rs3_value = extract_rs3_6_5_4(instruction); | |
75199b40 | 14452 | uint64 shift3_value = extract_shift3_2_1_0(instruction); |
89a955e8 | 14453 | |
3f2aec07 ML |
14454 | const char *rt3 = GPR(decode_gpr_gpr3(rt3_value, info), info); |
14455 | const char *rs3 = GPR(decode_gpr_gpr3(rs3_value, info), info); | |
4066c152 | 14456 | uint64 shift3 = encode_shift3_from_shift(shift3_value); |
89a955e8 | 14457 | |
4066c152 | 14458 | return img_format("SRL %s, %s, 0x%" PRIx64, rt3, rs3, shift3); |
89a955e8 AM |
14459 | } |
14460 | ||
14461 | ||
14462 | /* | |
14463 | * | |
14464 | * | |
14465 | * 3 2 1 | |
14466 | * 10987654321098765432109876543210 | |
14467 | * 001000 01001001101 | |
14468 | * rt ----- | |
14469 | * rs ----- | |
14470 | * rd ----- | |
14471 | */ | |
7def8a4b | 14472 | static char *SRL_32_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
14473 | { |
14474 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 14475 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 14476 | uint64 shift_value = extract_shift_4_3_2_1_0(instruction); |
89a955e8 | 14477 | |
3f2aec07 ML |
14478 | const char *rt = GPR(rt_value, info); |
14479 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 14480 | |
4066c152 | 14481 | return img_format("SRL %s, %s, 0x%" PRIx64, rt, rs, shift_value); |
89a955e8 AM |
14482 | } |
14483 | ||
14484 | ||
14485 | /* | |
14486 | * | |
14487 | * | |
14488 | * 3 2 1 | |
14489 | * 10987654321098765432109876543210 | |
14490 | * 001000 01001001101 | |
14491 | * rt ----- | |
14492 | * rs ----- | |
14493 | * rd ----- | |
14494 | */ | |
7def8a4b | 14495 | static char *SRLV(uint64 instruction, Dis_info *info) |
89a955e8 AM |
14496 | { |
14497 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 14498 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 14499 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 14500 | |
3f2aec07 ML |
14501 | const char *rd = GPR(rd_value, info); |
14502 | const char *rs = GPR(rs_value, info); | |
14503 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 14504 | |
c5231692 | 14505 | return img_format("SRLV %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
14506 | } |
14507 | ||
14508 | ||
14509 | /* | |
14510 | * | |
14511 | * | |
14512 | * 3 2 1 | |
14513 | * 10987654321098765432109876543210 | |
14514 | * 001000 01001001101 | |
14515 | * rt ----- | |
14516 | * rs ----- | |
14517 | * rd ----- | |
14518 | */ | |
7def8a4b | 14519 | static char *SUB(uint64 instruction, Dis_info *info) |
89a955e8 AM |
14520 | { |
14521 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 14522 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 14523 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 14524 | |
3f2aec07 ML |
14525 | const char *rd = GPR(rd_value, info); |
14526 | const char *rs = GPR(rs_value, info); | |
14527 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 14528 | |
c5231692 | 14529 | return img_format("SUB %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
14530 | } |
14531 | ||
14532 | ||
14533 | /* | |
14534 | * | |
14535 | * | |
14536 | * 3 2 1 | |
14537 | * 10987654321098765432109876543210 | |
14538 | * 001000 01001001101 | |
14539 | * rt ----- | |
14540 | * rs ----- | |
14541 | * rd ----- | |
14542 | */ | |
7def8a4b | 14543 | static char *SUB_D(uint64 instruction, Dis_info *info) |
89a955e8 | 14544 | { |
17ce2f00 | 14545 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 14546 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 14547 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 14548 | |
3f2aec07 ML |
14549 | const char *fd = FPR(fd_value, info); |
14550 | const char *fs = FPR(fs_value, info); | |
14551 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 14552 | |
c5231692 | 14553 | return img_format("SUB.D %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
14554 | } |
14555 | ||
14556 | ||
14557 | /* | |
14558 | * | |
14559 | * | |
14560 | * 3 2 1 | |
14561 | * 10987654321098765432109876543210 | |
14562 | * 001000 01001001101 | |
14563 | * rt ----- | |
14564 | * rs ----- | |
14565 | * rd ----- | |
14566 | */ | |
7def8a4b | 14567 | static char *SUB_S(uint64 instruction, Dis_info *info) |
89a955e8 | 14568 | { |
17ce2f00 | 14569 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 14570 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
d0c60abd | 14571 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
89a955e8 | 14572 | |
3f2aec07 ML |
14573 | const char *fd = FPR(fd_value, info); |
14574 | const char *fs = FPR(fs_value, info); | |
14575 | const char *ft = FPR(ft_value, info); | |
89a955e8 | 14576 | |
c5231692 | 14577 | return img_format("SUB.S %s, %s, %s", fd, fs, ft); |
89a955e8 AM |
14578 | } |
14579 | ||
14580 | ||
14581 | /* | |
14582 | * | |
14583 | * | |
14584 | * 3 2 1 | |
14585 | * 10987654321098765432109876543210 | |
14586 | * 001000 01001001101 | |
14587 | * rt ----- | |
14588 | * rs ----- | |
14589 | * rd ----- | |
14590 | */ | |
7def8a4b | 14591 | static char *SUBQ_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
14592 | { |
14593 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 14594 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 14595 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 14596 | |
3f2aec07 ML |
14597 | const char *rd = GPR(rd_value, info); |
14598 | const char *rs = GPR(rs_value, info); | |
14599 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 14600 | |
c5231692 | 14601 | return img_format("SUBQ.PH %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
14602 | } |
14603 | ||
14604 | ||
14605 | /* | |
5c65eed6 AM |
14606 | * [DSP] SUBQ.S.PH rd, rt, rs - Subtract fractional halfword vectors and shift |
14607 | * right to halve results | |
89a955e8 AM |
14608 | * |
14609 | * 3 2 1 | |
14610 | * 10987654321098765432109876543210 | |
14611 | * 001000 01001001101 | |
14612 | * rt ----- | |
14613 | * rs ----- | |
14614 | * rd ----- | |
14615 | */ | |
7def8a4b | 14616 | static char *SUBQ_S_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
14617 | { |
14618 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 14619 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 14620 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 14621 | |
3f2aec07 ML |
14622 | const char *rd = GPR(rd_value, info); |
14623 | const char *rs = GPR(rs_value, info); | |
14624 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 14625 | |
c5231692 | 14626 | return img_format("SUBQ_S.PH %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
14627 | } |
14628 | ||
14629 | ||
14630 | /* | |
5c65eed6 AM |
14631 | * [DSP] SUBQ.S.W rd, rt, rs - Subtract fractional halfword vectors and shift |
14632 | * right to halve results | |
89a955e8 AM |
14633 | * |
14634 | * 3 2 1 | |
14635 | * 10987654321098765432109876543210 | |
14636 | * 001000 01001001101 | |
14637 | * rt ----- | |
14638 | * rs ----- | |
14639 | * rd ----- | |
14640 | */ | |
7def8a4b | 14641 | static char *SUBQ_S_W(uint64 instruction, Dis_info *info) |
89a955e8 AM |
14642 | { |
14643 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 14644 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 14645 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 14646 | |
3f2aec07 ML |
14647 | const char *rd = GPR(rd_value, info); |
14648 | const char *rs = GPR(rs_value, info); | |
14649 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 14650 | |
c5231692 | 14651 | return img_format("SUBQ_S.W %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
14652 | } |
14653 | ||
14654 | ||
14655 | /* | |
5c65eed6 AM |
14656 | * [DSP] SUBQH.PH rd, rt, rs - Subtract fractional halfword vectors and shift |
14657 | * right to halve results | |
89a955e8 AM |
14658 | * |
14659 | * 3 2 1 | |
14660 | * 10987654321098765432109876543210 | |
14661 | * 001000 01001001101 | |
14662 | * rt ----- | |
14663 | * rs ----- | |
14664 | * rd ----- | |
14665 | */ | |
7def8a4b | 14666 | static char *SUBQH_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
14667 | { |
14668 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 14669 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 14670 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 14671 | |
3f2aec07 ML |
14672 | const char *rd = GPR(rd_value, info); |
14673 | const char *rs = GPR(rs_value, info); | |
14674 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 14675 | |
c5231692 | 14676 | return img_format("SUBQH.PH %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
14677 | } |
14678 | ||
14679 | ||
14680 | /* | |
5c65eed6 AM |
14681 | * [DSP] SUBQH_R.PH rd, rt, rs - Subtract fractional halfword vectors and shift |
14682 | * right to halve results | |
89a955e8 AM |
14683 | * |
14684 | * 3 2 1 | |
14685 | * 10987654321098765432109876543210 | |
14686 | * 001000 01001001101 | |
14687 | * rt ----- | |
14688 | * rs ----- | |
14689 | * rd ----- | |
14690 | */ | |
7def8a4b | 14691 | static char *SUBQH_R_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
14692 | { |
14693 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 14694 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 14695 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 14696 | |
3f2aec07 ML |
14697 | const char *rd = GPR(rd_value, info); |
14698 | const char *rs = GPR(rs_value, info); | |
14699 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 14700 | |
c5231692 | 14701 | return img_format("SUBQH_R.PH %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
14702 | } |
14703 | ||
14704 | ||
14705 | /* | |
5c65eed6 AM |
14706 | * [DSP] SUBQH_R.W rd, rt, rs - Subtract fractional halfword vectors and shift |
14707 | * right to halve results with rounding | |
89a955e8 AM |
14708 | * |
14709 | * 3 2 1 | |
14710 | * 10987654321098765432109876543210 | |
14711 | * 001000 11001001101 | |
14712 | * rt ----- | |
14713 | * rs ----- | |
14714 | * rd ----- | |
14715 | */ | |
7def8a4b | 14716 | static char *SUBQH_R_W(uint64 instruction, Dis_info *info) |
89a955e8 AM |
14717 | { |
14718 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 14719 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 14720 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 14721 | |
3f2aec07 ML |
14722 | const char *rd = GPR(rd_value, info); |
14723 | const char *rs = GPR(rs_value, info); | |
14724 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 14725 | |
c5231692 | 14726 | return img_format("SUBQH_R.W %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
14727 | } |
14728 | ||
14729 | ||
14730 | /* | |
5c65eed6 AM |
14731 | * [DSP] SUBQH.W rd, rs, rt - Subtract fractional words and shift right to |
14732 | * halve results | |
89a955e8 AM |
14733 | * |
14734 | * 3 2 1 | |
14735 | * 10987654321098765432109876543210 | |
14736 | * 001000 01010001101 | |
14737 | * rt ----- | |
14738 | * rs ----- | |
14739 | * rd ----- | |
14740 | */ | |
7def8a4b | 14741 | static char *SUBQH_W(uint64 instruction, Dis_info *info) |
89a955e8 AM |
14742 | { |
14743 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 14744 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 14745 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 14746 | |
3f2aec07 ML |
14747 | const char *rd = GPR(rd_value, info); |
14748 | const char *rs = GPR(rs_value, info); | |
14749 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 14750 | |
c5231692 | 14751 | return img_format("SUBQH.W %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
14752 | } |
14753 | ||
14754 | ||
14755 | /* | |
14756 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
14757 | * | |
14758 | * 3 2 1 | |
14759 | * 10987654321098765432109876543210 | |
14760 | * 001000 00010001101 | |
14761 | * rt ----- | |
14762 | * rs ----- | |
14763 | * rd ----- | |
14764 | */ | |
7def8a4b | 14765 | static char *SUBU_16_(uint64 instruction, Dis_info *info) |
89a955e8 | 14766 | { |
89a955e8 AM |
14767 | uint64 rt3_value = extract_rt3_9_8_7(instruction); |
14768 | uint64 rs3_value = extract_rs3_6_5_4(instruction); | |
86b5f803 | 14769 | uint64 rd3_value = extract_rd3_3_2_1(instruction); |
89a955e8 | 14770 | |
3f2aec07 ML |
14771 | const char *rd3 = GPR(decode_gpr_gpr3(rd3_value, info), info); |
14772 | const char *rs3 = GPR(decode_gpr_gpr3(rs3_value, info), info); | |
14773 | const char *rt3 = GPR(decode_gpr_gpr3(rt3_value, info), info); | |
89a955e8 | 14774 | |
c5231692 | 14775 | return img_format("SUBU %s, %s, %s", rd3, rs3, rt3); |
89a955e8 AM |
14776 | } |
14777 | ||
14778 | ||
14779 | /* | |
14780 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
14781 | * | |
14782 | * 3 2 1 | |
14783 | * 10987654321098765432109876543210 | |
14784 | * 001000 00010001101 | |
14785 | * rt ----- | |
14786 | * rs ----- | |
14787 | * rd ----- | |
14788 | */ | |
7def8a4b | 14789 | static char *SUBU_32_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
14790 | { |
14791 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 14792 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 14793 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 14794 | |
3f2aec07 ML |
14795 | const char *rd = GPR(rd_value, info); |
14796 | const char *rs = GPR(rs_value, info); | |
14797 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 14798 | |
c5231692 | 14799 | return img_format("SUBU %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
14800 | } |
14801 | ||
14802 | ||
14803 | /* | |
fc95c241 | 14804 | * [DSP] SUBU.PH rd, rs, rt - Subtract unsigned unsigned halfwords |
89a955e8 AM |
14805 | * |
14806 | * 3 2 1 | |
14807 | * 10987654321098765432109876543210 | |
14808 | * 001000 01100001101 | |
14809 | * rt ----- | |
14810 | * rs ----- | |
14811 | * rd ----- | |
14812 | */ | |
7def8a4b | 14813 | static char *SUBU_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
14814 | { |
14815 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 14816 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 14817 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 14818 | |
3f2aec07 ML |
14819 | const char *rd = GPR(rd_value, info); |
14820 | const char *rs = GPR(rs_value, info); | |
14821 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 14822 | |
c5231692 | 14823 | return img_format("SUBU.PH %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
14824 | } |
14825 | ||
14826 | ||
14827 | /* | |
fc95c241 | 14828 | * [DSP] SUBU.QB rd, rs, rt - Subtract unsigned quad byte vectors |
89a955e8 AM |
14829 | * |
14830 | * 3 2 1 | |
14831 | * 10987654321098765432109876543210 | |
14832 | * 001000 01011001101 | |
14833 | * rt ----- | |
14834 | * rs ----- | |
14835 | * rd ----- | |
14836 | */ | |
7def8a4b | 14837 | static char *SUBU_QB(uint64 instruction, Dis_info *info) |
89a955e8 AM |
14838 | { |
14839 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 14840 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 14841 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 14842 | |
3f2aec07 ML |
14843 | const char *rd = GPR(rd_value, info); |
14844 | const char *rs = GPR(rs_value, info); | |
14845 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 14846 | |
c5231692 | 14847 | return img_format("SUBU.QB %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
14848 | } |
14849 | ||
14850 | ||
14851 | /* | |
fc95c241 | 14852 | * [DSP] SUBU_S.PH rd, rs, rt - Subtract unsigned unsigned halfwords with |
5c65eed6 | 14853 | * 8-bit saturation |
89a955e8 AM |
14854 | * |
14855 | * 3 2 1 | |
14856 | * 10987654321098765432109876543210 | |
14857 | * 001000 11100001101 | |
14858 | * rt ----- | |
14859 | * rs ----- | |
14860 | * rd ----- | |
14861 | */ | |
7def8a4b | 14862 | static char *SUBU_S_PH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
14863 | { |
14864 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 14865 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 14866 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 14867 | |
3f2aec07 ML |
14868 | const char *rd = GPR(rd_value, info); |
14869 | const char *rs = GPR(rs_value, info); | |
14870 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 14871 | |
c5231692 | 14872 | return img_format("SUBU_S.PH %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
14873 | } |
14874 | ||
14875 | ||
14876 | /* | |
fc95c241 | 14877 | * [DSP] SUBU_S.QB rd, rs, rt - Subtract unsigned quad byte vectors with |
5c65eed6 | 14878 | * 8-bit saturation |
89a955e8 AM |
14879 | * |
14880 | * 3 2 1 | |
14881 | * 10987654321098765432109876543210 | |
14882 | * 001000 11011001101 | |
14883 | * rt ----- | |
14884 | * rs ----- | |
14885 | * rd ----- | |
14886 | */ | |
7def8a4b | 14887 | static char *SUBU_S_QB(uint64 instruction, Dis_info *info) |
89a955e8 AM |
14888 | { |
14889 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 14890 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 14891 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 14892 | |
3f2aec07 ML |
14893 | const char *rd = GPR(rd_value, info); |
14894 | const char *rs = GPR(rs_value, info); | |
14895 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 14896 | |
c5231692 | 14897 | return img_format("SUBU_S.QB %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
14898 | } |
14899 | ||
14900 | ||
14901 | /* | |
fc95c241 | 14902 | * [DSP] SUBUH.QB rd, rs, rt - Subtract unsigned bytes and right shift |
5c65eed6 | 14903 | * to halve results |
89a955e8 AM |
14904 | * |
14905 | * 3 2 1 | |
14906 | * 10987654321098765432109876543210 | |
14907 | * 001000 01101001101 | |
14908 | * rt ----- | |
14909 | * rs ----- | |
14910 | * rd ----- | |
14911 | */ | |
7def8a4b | 14912 | static char *SUBUH_QB(uint64 instruction, Dis_info *info) |
89a955e8 AM |
14913 | { |
14914 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 14915 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 14916 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 14917 | |
3f2aec07 ML |
14918 | const char *rd = GPR(rd_value, info); |
14919 | const char *rs = GPR(rs_value, info); | |
14920 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 14921 | |
c5231692 | 14922 | return img_format("SUBUH.QB %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
14923 | } |
14924 | ||
14925 | ||
14926 | /* | |
fc95c241 | 14927 | * [DSP] SUBUH_R.QB rd, rs, rt - Subtract unsigned bytes and right shift |
5c65eed6 | 14928 | * to halve results with rounding |
89a955e8 AM |
14929 | * |
14930 | * 3 2 1 | |
14931 | * 10987654321098765432109876543210 | |
14932 | * 001000 11101001101 | |
14933 | * rt ----- | |
14934 | * rs ----- | |
14935 | * rd ----- | |
14936 | */ | |
7def8a4b | 14937 | static char *SUBUH_R_QB(uint64 instruction, Dis_info *info) |
89a955e8 AM |
14938 | { |
14939 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 14940 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 14941 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 14942 | |
3f2aec07 ML |
14943 | const char *rd = GPR(rd_value, info); |
14944 | const char *rs = GPR(rs_value, info); | |
14945 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 14946 | |
c5231692 | 14947 | return img_format("SUBUH_R.QB %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
14948 | } |
14949 | ||
14950 | ||
14951 | /* | |
14952 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
14953 | * | |
14954 | * 3 2 1 | |
14955 | * 10987654321098765432109876543210 | |
14956 | * 001000 00010001101 | |
14957 | * rt ----- | |
14958 | * rs ----- | |
14959 | * rd ----- | |
14960 | */ | |
7def8a4b | 14961 | static char *SW_16_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
14962 | { |
14963 | uint64 rtz3_value = extract_rtz3_9_8_7(instruction); | |
89a955e8 | 14964 | uint64 rs3_value = extract_rs3_6_5_4(instruction); |
75199b40 | 14965 | uint64 u_value = extract_u_3_2_1_0__s2(instruction); |
89a955e8 | 14966 | |
3f2aec07 ML |
14967 | const char *rtz3 = GPR(decode_gpr_gpr3_src_store(rtz3_value, info), info); |
14968 | const char *rs3 = GPR(decode_gpr_gpr3(rs3_value, info), info); | |
89a955e8 | 14969 | |
4066c152 | 14970 | return img_format("SW %s, 0x%" PRIx64 "(%s)", rtz3, u_value, rs3); |
89a955e8 AM |
14971 | } |
14972 | ||
14973 | ||
14974 | /* | |
14975 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
14976 | * | |
14977 | * 3 2 1 | |
14978 | * 10987654321098765432109876543210 | |
14979 | * 001000 00010001101 | |
14980 | * rt ----- | |
14981 | * rs ----- | |
14982 | * rd ----- | |
14983 | */ | |
7def8a4b | 14984 | static char *SW_4X4_(uint64 instruction, Dis_info *info) |
89a955e8 | 14985 | { |
89a955e8 | 14986 | uint64 rtz4_value = extract_rtz4_9_7_6_5(instruction); |
75199b40 | 14987 | uint64 rs4_value = extract_rs4_4_2_1_0(instruction); |
11b9732a | 14988 | uint64 u_value = extract_u_3_8__s2(instruction); |
89a955e8 | 14989 | |
3f2aec07 ML |
14990 | const char *rtz4 = GPR(decode_gpr_gpr4_zero(rtz4_value, info), info); |
14991 | const char *rs4 = GPR(decode_gpr_gpr4(rs4_value, info), info); | |
89a955e8 | 14992 | |
4066c152 | 14993 | return img_format("SW %s, 0x%" PRIx64 "(%s)", rtz4, u_value, rs4); |
89a955e8 AM |
14994 | } |
14995 | ||
14996 | ||
14997 | /* | |
14998 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
14999 | * | |
15000 | * 3 2 1 | |
15001 | * 10987654321098765432109876543210 | |
15002 | * 001000 00010001101 | |
15003 | * rt ----- | |
15004 | * rs ----- | |
15005 | * rd ----- | |
15006 | */ | |
7def8a4b | 15007 | static char *SW_GP16_(uint64 instruction, Dis_info *info) |
89a955e8 | 15008 | { |
11b9732a | 15009 | uint64 u_value = extract_u_6_5_4_3_2_1_0__s2(instruction); |
75199b40 | 15010 | uint64 rtz3_value = extract_rtz3_9_8_7(instruction); |
89a955e8 | 15011 | |
3f2aec07 | 15012 | const char *rtz3 = GPR(decode_gpr_gpr3_src_store(rtz3_value, info), info); |
89a955e8 | 15013 | |
4066c152 | 15014 | return img_format("SW %s, 0x%" PRIx64 "($%d)", rtz3, u_value, 28); |
89a955e8 AM |
15015 | } |
15016 | ||
15017 | ||
15018 | /* | |
15019 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15020 | * | |
15021 | * 3 2 1 | |
15022 | * 10987654321098765432109876543210 | |
15023 | * 001000 00010001101 | |
15024 | * rt ----- | |
15025 | * rs ----- | |
15026 | * rd ----- | |
15027 | */ | |
7def8a4b | 15028 | static char *SW_GP_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
15029 | { |
15030 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
11b9732a | 15031 | uint64 u_value = extract_u_20_to_2__s2(instruction); |
89a955e8 | 15032 | |
3f2aec07 | 15033 | const char *rt = GPR(rt_value, info); |
89a955e8 | 15034 | |
4066c152 | 15035 | return img_format("SW %s, 0x%" PRIx64 "($%d)", rt, u_value, 28); |
89a955e8 AM |
15036 | } |
15037 | ||
15038 | ||
15039 | /* | |
15040 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15041 | * | |
15042 | * 3 2 1 | |
15043 | * 10987654321098765432109876543210 | |
15044 | * 001000 00010001101 | |
15045 | * rt ----- | |
15046 | * rs ----- | |
15047 | * rd ----- | |
15048 | */ | |
7def8a4b | 15049 | static char *SW_S9_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
15050 | { |
15051 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
d3605cc0 | 15052 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
89a955e8 AM |
15053 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
15054 | ||
3f2aec07 ML |
15055 | const char *rt = GPR(rt_value, info); |
15056 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 15057 | |
4066c152 | 15058 | return img_format("SW %s, %" PRId64 "(%s)", rt, s_value, rs); |
89a955e8 AM |
15059 | } |
15060 | ||
15061 | ||
15062 | /* | |
15063 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15064 | * | |
15065 | * 3 2 1 | |
15066 | * 10987654321098765432109876543210 | |
15067 | * 001000 00010001101 | |
15068 | * rt ----- | |
15069 | * rs ----- | |
15070 | * rd ----- | |
15071 | */ | |
7def8a4b | 15072 | static char *SW_SP_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
15073 | { |
15074 | uint64 rt_value = extract_rt_9_8_7_6_5(instruction); | |
11b9732a | 15075 | uint64 u_value = extract_u_4_3_2_1_0__s2(instruction); |
89a955e8 | 15076 | |
3f2aec07 | 15077 | const char *rt = GPR(rt_value, info); |
89a955e8 | 15078 | |
4066c152 | 15079 | return img_format("SW %s, 0x%" PRIx64 "($%d)", rt, u_value, 29); |
89a955e8 AM |
15080 | } |
15081 | ||
15082 | ||
15083 | /* | |
15084 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15085 | * | |
15086 | * 3 2 1 | |
15087 | * 10987654321098765432109876543210 | |
15088 | * 001000 00010001101 | |
15089 | * rt ----- | |
15090 | * rs ----- | |
15091 | * rd ----- | |
15092 | */ | |
7def8a4b | 15093 | static char *SW_U12_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
15094 | { |
15095 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 15096 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 15097 | uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 15098 | |
3f2aec07 ML |
15099 | const char *rt = GPR(rt_value, info); |
15100 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 15101 | |
4066c152 | 15102 | return img_format("SW %s, 0x%" PRIx64 "(%s)", rt, u_value, rs); |
89a955e8 AM |
15103 | } |
15104 | ||
15105 | ||
15106 | /* | |
15107 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15108 | * | |
15109 | * 3 2 1 | |
15110 | * 10987654321098765432109876543210 | |
15111 | * 001000 00010001101 | |
15112 | * rt ----- | |
15113 | * rs ----- | |
15114 | * rd ----- | |
15115 | */ | |
7def8a4b | 15116 | static char *SWC1_GP_(uint64 instruction, Dis_info *info) |
89a955e8 | 15117 | { |
17ce2f00 | 15118 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
11b9732a | 15119 | uint64 u_value = extract_u_17_to_2__s2(instruction); |
89a955e8 | 15120 | |
3f2aec07 | 15121 | const char *ft = FPR(ft_value, info); |
89a955e8 | 15122 | |
4066c152 | 15123 | return img_format("SWC1 %s, 0x%" PRIx64 "($%d)", ft, u_value, 28); |
89a955e8 AM |
15124 | } |
15125 | ||
15126 | ||
15127 | /* | |
15128 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15129 | * | |
15130 | * 3 2 1 | |
15131 | * 10987654321098765432109876543210 | |
15132 | * 001000 00010001101 | |
15133 | * rt ----- | |
15134 | * rs ----- | |
15135 | * rd ----- | |
15136 | */ | |
7def8a4b | 15137 | static char *SWC1_S9_(uint64 instruction, Dis_info *info) |
89a955e8 | 15138 | { |
17ce2f00 | 15139 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
89a955e8 | 15140 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 15141 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 15142 | |
3f2aec07 ML |
15143 | const char *ft = FPR(ft_value, info); |
15144 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 15145 | |
4066c152 | 15146 | return img_format("SWC1 %s, %" PRId64 "(%s)", ft, s_value, rs); |
89a955e8 AM |
15147 | } |
15148 | ||
15149 | ||
15150 | /* | |
15151 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15152 | * | |
15153 | * 3 2 1 | |
15154 | * 10987654321098765432109876543210 | |
15155 | * 001000 00010001101 | |
15156 | * rt ----- | |
15157 | * rs ----- | |
15158 | * rd ----- | |
15159 | */ | |
7def8a4b | 15160 | static char *SWC1_U12_(uint64 instruction, Dis_info *info) |
89a955e8 | 15161 | { |
17ce2f00 | 15162 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
89a955e8 | 15163 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 15164 | uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 15165 | |
3f2aec07 ML |
15166 | const char *ft = FPR(ft_value, info); |
15167 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 15168 | |
4066c152 | 15169 | return img_format("SWC1 %s, 0x%" PRIx64 "(%s)", ft, u_value, rs); |
89a955e8 AM |
15170 | } |
15171 | ||
15172 | ||
15173 | /* | |
15174 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15175 | * | |
15176 | * 3 2 1 | |
15177 | * 10987654321098765432109876543210 | |
15178 | * 001000 00010001101 | |
15179 | * rt ----- | |
15180 | * rs ----- | |
15181 | * rd ----- | |
15182 | */ | |
7def8a4b | 15183 | static char *SWC1X(uint64 instruction, Dis_info *info) |
89a955e8 AM |
15184 | { |
15185 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 15186 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 15187 | uint64 ft_value = extract_ft_15_14_13_12_11(instruction); |
89a955e8 | 15188 | |
3f2aec07 ML |
15189 | const char *ft = FPR(ft_value, info); |
15190 | const char *rs = GPR(rs_value, info); | |
15191 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 15192 | |
c5231692 | 15193 | return img_format("SWC1X %s, %s(%s)", ft, rs, rt); |
89a955e8 AM |
15194 | } |
15195 | ||
15196 | ||
15197 | /* | |
15198 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15199 | * | |
15200 | * 3 2 1 | |
15201 | * 10987654321098765432109876543210 | |
15202 | * 001000 00010001101 | |
15203 | * rt ----- | |
15204 | * rs ----- | |
15205 | * rd ----- | |
15206 | */ | |
7def8a4b | 15207 | static char *SWC1XS(uint64 instruction, Dis_info *info) |
89a955e8 AM |
15208 | { |
15209 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 15210 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 15211 | uint64 ft_value = extract_ft_15_14_13_12_11(instruction); |
89a955e8 | 15212 | |
3f2aec07 ML |
15213 | const char *ft = FPR(ft_value, info); |
15214 | const char *rs = GPR(rs_value, info); | |
15215 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 15216 | |
c5231692 | 15217 | return img_format("SWC1XS %s, %s(%s)", ft, rs, rt); |
89a955e8 AM |
15218 | } |
15219 | ||
15220 | ||
15221 | /* | |
15222 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15223 | * | |
15224 | * 3 2 1 | |
15225 | * 10987654321098765432109876543210 | |
15226 | * 001000 00010001101 | |
15227 | * rt ----- | |
15228 | * rs ----- | |
15229 | * rd ----- | |
15230 | */ | |
7def8a4b | 15231 | static char *SWC2(uint64 instruction, Dis_info *info) |
89a955e8 AM |
15232 | { |
15233 | uint64 cs_value = extract_cs_25_24_23_22_21(instruction); | |
89a955e8 | 15234 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 15235 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 15236 | |
3f2aec07 | 15237 | const char *rs = GPR(rs_value, info); |
89a955e8 | 15238 | |
043dc73c ML |
15239 | return img_format("SWC2 CP%" PRIu64 ", %" PRId64 "(%s)", |
15240 | cs_value, s_value, rs); | |
89a955e8 AM |
15241 | } |
15242 | ||
15243 | ||
15244 | /* | |
15245 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15246 | * | |
15247 | * 3 2 1 | |
15248 | * 10987654321098765432109876543210 | |
15249 | * 001000 00010001101 | |
15250 | * rt ----- | |
15251 | * rs ----- | |
15252 | * rd ----- | |
15253 | */ | |
7def8a4b | 15254 | static char *SWE(uint64 instruction, Dis_info *info) |
89a955e8 AM |
15255 | { |
15256 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 15257 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 15258 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 15259 | |
3f2aec07 ML |
15260 | const char *rt = GPR(rt_value, info); |
15261 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 15262 | |
4066c152 | 15263 | return img_format("SWE %s, %" PRId64 "(%s)", rt, s_value, rs); |
89a955e8 AM |
15264 | } |
15265 | ||
15266 | ||
15267 | /* | |
15268 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15269 | * | |
15270 | * 3 2 1 | |
15271 | * 10987654321098765432109876543210 | |
15272 | * 001000 00010001101 | |
15273 | * rt ----- | |
15274 | * rs ----- | |
15275 | * rd ----- | |
15276 | */ | |
7def8a4b | 15277 | static char *SWM(uint64 instruction, Dis_info *info) |
89a955e8 AM |
15278 | { |
15279 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 15280 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 AM |
15281 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
15282 | uint64 count3_value = extract_count3_14_13_12(instruction); | |
89a955e8 | 15283 | |
3f2aec07 ML |
15284 | const char *rt = GPR(rt_value, info); |
15285 | const char *rs = GPR(rs_value, info); | |
4066c152 | 15286 | uint64 count3 = encode_count3_from_count(count3_value); |
89a955e8 | 15287 | |
4066c152 ML |
15288 | return img_format("SWM %s, %" PRId64 "(%s), 0x%" PRIx64, |
15289 | rt, s_value, rs, count3); | |
89a955e8 AM |
15290 | } |
15291 | ||
15292 | ||
15293 | /* | |
15294 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15295 | * | |
15296 | * 3 2 1 | |
15297 | * 10987654321098765432109876543210 | |
15298 | * 001000 00010001101 | |
15299 | * rt ----- | |
15300 | * rs ----- | |
15301 | * rd ----- | |
15302 | */ | |
7def8a4b | 15303 | static char *SWPC_48_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
15304 | { |
15305 | uint64 rt_value = extract_rt_41_40_39_38_37(instruction); | |
d3605cc0 | 15306 | int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction); |
89a955e8 | 15307 | |
3f2aec07 | 15308 | const char *rt = GPR(rt_value, info); |
22e7b52a | 15309 | g_autofree char *s = ADDRESS(s_value, 6, info); |
89a955e8 | 15310 | |
c5231692 | 15311 | return img_format("SWPC %s, %s", rt, s); |
89a955e8 AM |
15312 | } |
15313 | ||
15314 | ||
15315 | /* | |
15316 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15317 | * | |
15318 | * 3 2 1 | |
15319 | * 10987654321098765432109876543210 | |
15320 | * 001000 00010001101 | |
15321 | * rt ----- | |
15322 | * rs ----- | |
15323 | * rd ----- | |
15324 | */ | |
7def8a4b | 15325 | static char *SWX(uint64 instruction, Dis_info *info) |
89a955e8 AM |
15326 | { |
15327 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 15328 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 15329 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 15330 | |
3f2aec07 ML |
15331 | const char *rd = GPR(rd_value, info); |
15332 | const char *rs = GPR(rs_value, info); | |
15333 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 15334 | |
c5231692 | 15335 | return img_format("SWX %s, %s(%s)", rd, rs, rt); |
89a955e8 AM |
15336 | } |
15337 | ||
15338 | ||
15339 | /* | |
15340 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15341 | * | |
15342 | * 3 2 1 | |
15343 | * 10987654321098765432109876543210 | |
15344 | * 001000 00010001101 | |
15345 | * rt ----- | |
15346 | * rs ----- | |
15347 | * rd ----- | |
15348 | */ | |
7def8a4b | 15349 | static char *SWXS(uint64 instruction, Dis_info *info) |
89a955e8 AM |
15350 | { |
15351 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 15352 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 15353 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 15354 | |
3f2aec07 ML |
15355 | const char *rd = GPR(rd_value, info); |
15356 | const char *rs = GPR(rs_value, info); | |
15357 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 15358 | |
c5231692 | 15359 | return img_format("SWXS %s, %s(%s)", rd, rs, rt); |
89a955e8 AM |
15360 | } |
15361 | ||
15362 | ||
15363 | /* | |
15364 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15365 | * | |
15366 | * 3 2 1 | |
15367 | * 10987654321098765432109876543210 | |
15368 | * 001000 00010001101 | |
15369 | * rt ----- | |
15370 | * rs ----- | |
15371 | * rd ----- | |
15372 | */ | |
7def8a4b | 15373 | static char *SYNC(uint64 instruction, Dis_info *info) |
89a955e8 AM |
15374 | { |
15375 | uint64 stype_value = extract_stype_20_19_18_17_16(instruction); | |
15376 | ||
89a955e8 | 15377 | |
4066c152 | 15378 | return img_format("SYNC 0x%" PRIx64, stype_value); |
89a955e8 AM |
15379 | } |
15380 | ||
15381 | ||
15382 | /* | |
15383 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15384 | * | |
15385 | * 3 2 1 | |
15386 | * 10987654321098765432109876543210 | |
15387 | * 001000 00010001101 | |
15388 | * rt ----- | |
15389 | * rs ----- | |
15390 | * rd ----- | |
15391 | */ | |
7def8a4b | 15392 | static char *SYNCI(uint64 instruction, Dis_info *info) |
89a955e8 | 15393 | { |
89a955e8 | 15394 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 15395 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 15396 | |
3f2aec07 | 15397 | const char *rs = GPR(rs_value, info); |
89a955e8 | 15398 | |
4066c152 | 15399 | return img_format("SYNCI %" PRId64 "(%s)", s_value, rs); |
89a955e8 AM |
15400 | } |
15401 | ||
15402 | ||
15403 | /* | |
15404 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15405 | * | |
15406 | * 3 2 1 | |
15407 | * 10987654321098765432109876543210 | |
15408 | * 001000 00010001101 | |
15409 | * rt ----- | |
15410 | * rs ----- | |
15411 | * rd ----- | |
15412 | */ | |
7def8a4b | 15413 | static char *SYNCIE(uint64 instruction, Dis_info *info) |
89a955e8 | 15414 | { |
89a955e8 | 15415 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 15416 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 15417 | |
3f2aec07 | 15418 | const char *rs = GPR(rs_value, info); |
89a955e8 | 15419 | |
4066c152 | 15420 | return img_format("SYNCIE %" PRId64 "(%s)", s_value, rs); |
89a955e8 AM |
15421 | } |
15422 | ||
15423 | ||
15424 | /* | |
15425 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15426 | * | |
15427 | * 3 2 1 | |
15428 | * 10987654321098765432109876543210 | |
15429 | * 001000 00010001101 | |
15430 | * rt ----- | |
15431 | * rs ----- | |
15432 | * rd ----- | |
15433 | */ | |
7def8a4b | 15434 | static char *SYSCALL_16_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
15435 | { |
15436 | uint64 code_value = extract_code_1_0(instruction); | |
15437 | ||
89a955e8 | 15438 | |
4066c152 | 15439 | return img_format("SYSCALL 0x%" PRIx64, code_value); |
89a955e8 AM |
15440 | } |
15441 | ||
15442 | ||
15443 | /* | |
15444 | * SYSCALL code - System Call. Cause a System Call Exception | |
15445 | * | |
15446 | * 3 2 1 | |
15447 | * 10987654321098765432109876543210 | |
15448 | * 00000000000010 | |
15449 | * code ------------------ | |
15450 | */ | |
7def8a4b | 15451 | static char *SYSCALL_32_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
15452 | { |
15453 | uint64 code_value = extract_code_17_to_0(instruction); | |
15454 | ||
89a955e8 | 15455 | |
4066c152 | 15456 | return img_format("SYSCALL 0x%" PRIx64, code_value); |
89a955e8 AM |
15457 | } |
15458 | ||
15459 | ||
15460 | /* | |
15461 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15462 | * | |
15463 | * 3 2 1 | |
15464 | * 10987654321098765432109876543210 | |
15465 | * 001000 00010001101 | |
15466 | * rt ----- | |
15467 | * rs ----- | |
15468 | * rd ----- | |
15469 | */ | |
7def8a4b | 15470 | static char *TEQ(uint64 instruction, Dis_info *info) |
89a955e8 AM |
15471 | { |
15472 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
15473 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
15474 | ||
3f2aec07 ML |
15475 | const char *rs = GPR(rs_value, info); |
15476 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 15477 | |
c5231692 | 15478 | return img_format("TEQ %s, %s", rs, rt); |
89a955e8 AM |
15479 | } |
15480 | ||
15481 | ||
15482 | /* | |
15483 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15484 | * | |
15485 | * 3 2 1 | |
15486 | * 10987654321098765432109876543210 | |
15487 | * 001000 00010001101 | |
15488 | * rt ----- | |
15489 | * rs ----- | |
15490 | * rd ----- | |
15491 | */ | |
7def8a4b | 15492 | static char *TLBGINV(uint64 instruction, Dis_info *info) |
89a955e8 AM |
15493 | { |
15494 | (void)instruction; | |
15495 | ||
7def8a4b | 15496 | return g_strdup("TLBGINV "); |
89a955e8 AM |
15497 | } |
15498 | ||
15499 | ||
15500 | /* | |
15501 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15502 | * | |
15503 | * 3 2 1 | |
15504 | * 10987654321098765432109876543210 | |
15505 | * 001000 00010001101 | |
15506 | * rt ----- | |
15507 | * rs ----- | |
15508 | * rd ----- | |
15509 | */ | |
7def8a4b | 15510 | static char *TLBGINVF(uint64 instruction, Dis_info *info) |
89a955e8 AM |
15511 | { |
15512 | (void)instruction; | |
15513 | ||
7def8a4b | 15514 | return g_strdup("TLBGINVF "); |
89a955e8 AM |
15515 | } |
15516 | ||
15517 | ||
15518 | /* | |
15519 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15520 | * | |
15521 | * 3 2 1 | |
15522 | * 10987654321098765432109876543210 | |
15523 | * 001000 00010001101 | |
15524 | * rt ----- | |
15525 | * rs ----- | |
15526 | * rd ----- | |
15527 | */ | |
7def8a4b | 15528 | static char *TLBGP(uint64 instruction, Dis_info *info) |
89a955e8 AM |
15529 | { |
15530 | (void)instruction; | |
15531 | ||
7def8a4b | 15532 | return g_strdup("TLBGP "); |
89a955e8 AM |
15533 | } |
15534 | ||
15535 | ||
15536 | /* | |
15537 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15538 | * | |
15539 | * 3 2 1 | |
15540 | * 10987654321098765432109876543210 | |
15541 | * 001000 00010001101 | |
15542 | * rt ----- | |
15543 | * rs ----- | |
15544 | * rd ----- | |
15545 | */ | |
7def8a4b | 15546 | static char *TLBGR(uint64 instruction, Dis_info *info) |
89a955e8 AM |
15547 | { |
15548 | (void)instruction; | |
15549 | ||
7def8a4b | 15550 | return g_strdup("TLBGR "); |
89a955e8 AM |
15551 | } |
15552 | ||
15553 | ||
15554 | /* | |
15555 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15556 | * | |
15557 | * 3 2 1 | |
15558 | * 10987654321098765432109876543210 | |
15559 | * 001000 00010001101 | |
15560 | * rt ----- | |
15561 | * rs ----- | |
15562 | * rd ----- | |
15563 | */ | |
7def8a4b | 15564 | static char *TLBGWI(uint64 instruction, Dis_info *info) |
89a955e8 AM |
15565 | { |
15566 | (void)instruction; | |
15567 | ||
7def8a4b | 15568 | return g_strdup("TLBGWI "); |
89a955e8 AM |
15569 | } |
15570 | ||
15571 | ||
15572 | /* | |
15573 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15574 | * | |
15575 | * 3 2 1 | |
15576 | * 10987654321098765432109876543210 | |
15577 | * 001000 00010001101 | |
15578 | * rt ----- | |
15579 | * rs ----- | |
15580 | * rd ----- | |
15581 | */ | |
7def8a4b | 15582 | static char *TLBGWR(uint64 instruction, Dis_info *info) |
89a955e8 AM |
15583 | { |
15584 | (void)instruction; | |
15585 | ||
7def8a4b | 15586 | return g_strdup("TLBGWR "); |
89a955e8 AM |
15587 | } |
15588 | ||
15589 | ||
15590 | /* | |
15591 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15592 | * | |
15593 | * 3 2 1 | |
15594 | * 10987654321098765432109876543210 | |
15595 | * 001000 00010001101 | |
15596 | * rt ----- | |
15597 | * rs ----- | |
15598 | * rd ----- | |
15599 | */ | |
7def8a4b | 15600 | static char *TLBINV(uint64 instruction, Dis_info *info) |
89a955e8 AM |
15601 | { |
15602 | (void)instruction; | |
15603 | ||
7def8a4b | 15604 | return g_strdup("TLBINV "); |
89a955e8 AM |
15605 | } |
15606 | ||
15607 | ||
15608 | /* | |
15609 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15610 | * | |
15611 | * 3 2 1 | |
15612 | * 10987654321098765432109876543210 | |
15613 | * 001000 00010001101 | |
15614 | * rt ----- | |
15615 | * rs ----- | |
15616 | * rd ----- | |
15617 | */ | |
7def8a4b | 15618 | static char *TLBINVF(uint64 instruction, Dis_info *info) |
89a955e8 AM |
15619 | { |
15620 | (void)instruction; | |
15621 | ||
7def8a4b | 15622 | return g_strdup("TLBINVF "); |
89a955e8 AM |
15623 | } |
15624 | ||
15625 | ||
15626 | /* | |
15627 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15628 | * | |
15629 | * 3 2 1 | |
15630 | * 10987654321098765432109876543210 | |
15631 | * 001000 00010001101 | |
15632 | * rt ----- | |
15633 | * rs ----- | |
15634 | * rd ----- | |
15635 | */ | |
7def8a4b | 15636 | static char *TLBP(uint64 instruction, Dis_info *info) |
89a955e8 AM |
15637 | { |
15638 | (void)instruction; | |
15639 | ||
7def8a4b | 15640 | return g_strdup("TLBP "); |
89a955e8 AM |
15641 | } |
15642 | ||
15643 | ||
15644 | /* | |
15645 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15646 | * | |
15647 | * 3 2 1 | |
15648 | * 10987654321098765432109876543210 | |
15649 | * 001000 00010001101 | |
15650 | * rt ----- | |
15651 | * rs ----- | |
15652 | * rd ----- | |
15653 | */ | |
7def8a4b | 15654 | static char *TLBR(uint64 instruction, Dis_info *info) |
89a955e8 AM |
15655 | { |
15656 | (void)instruction; | |
15657 | ||
7def8a4b | 15658 | return g_strdup("TLBR "); |
89a955e8 AM |
15659 | } |
15660 | ||
15661 | ||
15662 | /* | |
15663 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15664 | * | |
15665 | * 3 2 1 | |
15666 | * 10987654321098765432109876543210 | |
15667 | * 001000 00010001101 | |
15668 | * rt ----- | |
15669 | * rs ----- | |
15670 | * rd ----- | |
15671 | */ | |
7def8a4b | 15672 | static char *TLBWI(uint64 instruction, Dis_info *info) |
89a955e8 AM |
15673 | { |
15674 | (void)instruction; | |
15675 | ||
7def8a4b | 15676 | return g_strdup("TLBWI "); |
89a955e8 AM |
15677 | } |
15678 | ||
15679 | ||
15680 | /* | |
15681 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15682 | * | |
15683 | * 3 2 1 | |
15684 | * 10987654321098765432109876543210 | |
15685 | * 001000 00010001101 | |
15686 | * rt ----- | |
15687 | * rs ----- | |
15688 | * rd ----- | |
15689 | */ | |
7def8a4b | 15690 | static char *TLBWR(uint64 instruction, Dis_info *info) |
89a955e8 AM |
15691 | { |
15692 | (void)instruction; | |
15693 | ||
7def8a4b | 15694 | return g_strdup("TLBWR "); |
89a955e8 AM |
15695 | } |
15696 | ||
15697 | ||
15698 | /* | |
15699 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15700 | * | |
15701 | * 3 2 1 | |
15702 | * 10987654321098765432109876543210 | |
15703 | * 001000 00010001101 | |
15704 | * rt ----- | |
15705 | * rs ----- | |
15706 | * rd ----- | |
15707 | */ | |
7def8a4b | 15708 | static char *TNE(uint64 instruction, Dis_info *info) |
89a955e8 AM |
15709 | { |
15710 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
15711 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
15712 | ||
3f2aec07 ML |
15713 | const char *rs = GPR(rs_value, info); |
15714 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 15715 | |
c5231692 | 15716 | return img_format("TNE %s, %s", rs, rt); |
89a955e8 AM |
15717 | } |
15718 | ||
15719 | ||
15720 | /* | |
15721 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15722 | * | |
15723 | * 3 2 1 | |
15724 | * 10987654321098765432109876543210 | |
15725 | * 001000 00010001101 | |
15726 | * rt ----- | |
15727 | * rs ----- | |
15728 | * rd ----- | |
15729 | */ | |
7def8a4b | 15730 | static char *TRUNC_L_D(uint64 instruction, Dis_info *info) |
89a955e8 | 15731 | { |
17ce2f00 | 15732 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 15733 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 15734 | |
3f2aec07 ML |
15735 | const char *ft = FPR(ft_value, info); |
15736 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 15737 | |
c5231692 | 15738 | return img_format("TRUNC.L.D %s, %s", ft, fs); |
89a955e8 AM |
15739 | } |
15740 | ||
15741 | ||
15742 | /* | |
15743 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15744 | * | |
15745 | * 3 2 1 | |
15746 | * 10987654321098765432109876543210 | |
15747 | * 001000 00010001101 | |
15748 | * rt ----- | |
15749 | * rs ----- | |
15750 | * rd ----- | |
15751 | */ | |
7def8a4b | 15752 | static char *TRUNC_L_S(uint64 instruction, Dis_info *info) |
89a955e8 | 15753 | { |
17ce2f00 | 15754 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 15755 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 15756 | |
3f2aec07 ML |
15757 | const char *ft = FPR(ft_value, info); |
15758 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 15759 | |
c5231692 | 15760 | return img_format("TRUNC.L.S %s, %s", ft, fs); |
89a955e8 AM |
15761 | } |
15762 | ||
15763 | ||
15764 | /* | |
15765 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15766 | * | |
15767 | * 3 2 1 | |
15768 | * 10987654321098765432109876543210 | |
15769 | * 001000 00010001101 | |
15770 | * rt ----- | |
15771 | * rs ----- | |
15772 | * rd ----- | |
15773 | */ | |
7def8a4b | 15774 | static char *TRUNC_W_D(uint64 instruction, Dis_info *info) |
89a955e8 | 15775 | { |
17ce2f00 | 15776 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 15777 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 15778 | |
3f2aec07 ML |
15779 | const char *ft = FPR(ft_value, info); |
15780 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 15781 | |
c5231692 | 15782 | return img_format("TRUNC.W.D %s, %s", ft, fs); |
89a955e8 AM |
15783 | } |
15784 | ||
15785 | ||
15786 | /* | |
15787 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15788 | * | |
15789 | * 3 2 1 | |
15790 | * 10987654321098765432109876543210 | |
15791 | * 001000 00010001101 | |
15792 | * rt ----- | |
15793 | * rs ----- | |
15794 | * rd ----- | |
15795 | */ | |
7def8a4b | 15796 | static char *TRUNC_W_S(uint64 instruction, Dis_info *info) |
89a955e8 | 15797 | { |
17ce2f00 | 15798 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
52a96d22 | 15799 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
89a955e8 | 15800 | |
3f2aec07 ML |
15801 | const char *ft = FPR(ft_value, info); |
15802 | const char *fs = FPR(fs_value, info); | |
89a955e8 | 15803 | |
c5231692 | 15804 | return img_format("TRUNC.W.S %s, %s", ft, fs); |
89a955e8 AM |
15805 | } |
15806 | ||
15807 | ||
15808 | /* | |
15809 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15810 | * | |
15811 | * 3 2 1 | |
15812 | * 10987654321098765432109876543210 | |
15813 | * 001000 00010001101 | |
15814 | * rt ----- | |
15815 | * rs ----- | |
15816 | * rd ----- | |
15817 | */ | |
7def8a4b | 15818 | static char *UALDM(uint64 instruction, Dis_info *info) |
89a955e8 AM |
15819 | { |
15820 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 15821 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 AM |
15822 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
15823 | uint64 count3_value = extract_count3_14_13_12(instruction); | |
89a955e8 | 15824 | |
3f2aec07 ML |
15825 | const char *rt = GPR(rt_value, info); |
15826 | const char *rs = GPR(rs_value, info); | |
4066c152 | 15827 | uint64 count3 = encode_count3_from_count(count3_value); |
89a955e8 | 15828 | |
4066c152 ML |
15829 | return img_format("UALDM %s, %" PRId64 "(%s), 0x%" PRIx64, |
15830 | rt, s_value, rs, count3); | |
89a955e8 AM |
15831 | } |
15832 | ||
15833 | ||
15834 | /* | |
15835 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15836 | * | |
15837 | * 3 2 1 | |
15838 | * 10987654321098765432109876543210 | |
15839 | * 001000 00010001101 | |
15840 | * rt ----- | |
15841 | * rs ----- | |
15842 | * rd ----- | |
15843 | */ | |
7def8a4b | 15844 | static char *UALH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
15845 | { |
15846 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 15847 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 15848 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 15849 | |
3f2aec07 ML |
15850 | const char *rt = GPR(rt_value, info); |
15851 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 15852 | |
4066c152 | 15853 | return img_format("UALH %s, %" PRId64 "(%s)", rt, s_value, rs); |
89a955e8 AM |
15854 | } |
15855 | ||
15856 | ||
15857 | /* | |
15858 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15859 | * | |
15860 | * 3 2 1 | |
15861 | * 10987654321098765432109876543210 | |
15862 | * 001000 00010001101 | |
15863 | * rt ----- | |
15864 | * rs ----- | |
15865 | * rd ----- | |
15866 | */ | |
7def8a4b | 15867 | static char *UALWM(uint64 instruction, Dis_info *info) |
89a955e8 AM |
15868 | { |
15869 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 15870 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 AM |
15871 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
15872 | uint64 count3_value = extract_count3_14_13_12(instruction); | |
89a955e8 | 15873 | |
3f2aec07 ML |
15874 | const char *rt = GPR(rt_value, info); |
15875 | const char *rs = GPR(rs_value, info); | |
4066c152 | 15876 | uint64 count3 = encode_count3_from_count(count3_value); |
89a955e8 | 15877 | |
4066c152 ML |
15878 | return img_format("UALWM %s, %" PRId64 "(%s), 0x%" PRIx64, |
15879 | rt, s_value, rs, count3); | |
89a955e8 AM |
15880 | } |
15881 | ||
15882 | ||
15883 | /* | |
15884 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15885 | * | |
15886 | * 3 2 1 | |
15887 | * 10987654321098765432109876543210 | |
15888 | * 001000 00010001101 | |
15889 | * rt ----- | |
15890 | * rs ----- | |
15891 | * rd ----- | |
15892 | */ | |
7def8a4b | 15893 | static char *UASDM(uint64 instruction, Dis_info *info) |
89a955e8 AM |
15894 | { |
15895 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 15896 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 AM |
15897 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
15898 | uint64 count3_value = extract_count3_14_13_12(instruction); | |
89a955e8 | 15899 | |
3f2aec07 ML |
15900 | const char *rt = GPR(rt_value, info); |
15901 | const char *rs = GPR(rs_value, info); | |
4066c152 | 15902 | uint64 count3 = encode_count3_from_count(count3_value); |
89a955e8 | 15903 | |
4066c152 ML |
15904 | return img_format("UASDM %s, %" PRId64 "(%s), 0x%" PRIx64, |
15905 | rt, s_value, rs, count3); | |
89a955e8 AM |
15906 | } |
15907 | ||
15908 | ||
15909 | /* | |
15910 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15911 | * | |
15912 | * 3 2 1 | |
15913 | * 10987654321098765432109876543210 | |
15914 | * 001000 00010001101 | |
15915 | * rt ----- | |
15916 | * rs ----- | |
15917 | * rd ----- | |
15918 | */ | |
7def8a4b | 15919 | static char *UASH(uint64 instruction, Dis_info *info) |
89a955e8 AM |
15920 | { |
15921 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 15922 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 | 15923 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 15924 | |
3f2aec07 ML |
15925 | const char *rt = GPR(rt_value, info); |
15926 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 15927 | |
4066c152 | 15928 | return img_format("UASH %s, %" PRId64 "(%s)", rt, s_value, rs); |
89a955e8 AM |
15929 | } |
15930 | ||
15931 | ||
15932 | /* | |
15933 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15934 | * | |
15935 | * 3 2 1 | |
15936 | * 10987654321098765432109876543210 | |
15937 | * 001000 00010001101 | |
15938 | * rt ----- | |
15939 | * rs ----- | |
15940 | * rd ----- | |
15941 | */ | |
7def8a4b | 15942 | static char *UASWM(uint64 instruction, Dis_info *info) |
89a955e8 AM |
15943 | { |
15944 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 15945 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
75199b40 AM |
15946 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
15947 | uint64 count3_value = extract_count3_14_13_12(instruction); | |
89a955e8 | 15948 | |
3f2aec07 ML |
15949 | const char *rt = GPR(rt_value, info); |
15950 | const char *rs = GPR(rs_value, info); | |
4066c152 | 15951 | uint64 count3 = encode_count3_from_count(count3_value); |
89a955e8 | 15952 | |
4066c152 ML |
15953 | return img_format("UASWM %s, %" PRId64 "(%s), 0x%" PRIx64, |
15954 | rt, s_value, rs, count3); | |
89a955e8 AM |
15955 | } |
15956 | ||
15957 | ||
15958 | /* | |
15959 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
15960 | * | |
15961 | * 3 2 1 | |
15962 | * 10987654321098765432109876543210 | |
15963 | * 001000 00010001101 | |
15964 | * rt ----- | |
15965 | * rs ----- | |
15966 | * rd ----- | |
15967 | */ | |
7def8a4b | 15968 | static char *UDI(uint64 instruction, Dis_info *info) |
89a955e8 AM |
15969 | { |
15970 | uint64 op_value = extract_op_25_to_3(instruction); | |
15971 | ||
89a955e8 | 15972 | |
4066c152 | 15973 | return img_format("UDI 0x%" PRIx64, op_value); |
89a955e8 AM |
15974 | } |
15975 | ||
15976 | ||
15977 | /* | |
15978 | * WAIT code - Enter Wait State | |
15979 | * | |
15980 | * 3 2 1 | |
15981 | * 10987654321098765432109876543210 | |
15982 | * 001000 1100001101111111 | |
15983 | * code ---------- | |
15984 | */ | |
7def8a4b | 15985 | static char *WAIT(uint64 instruction, Dis_info *info) |
89a955e8 AM |
15986 | { |
15987 | uint64 code_value = extract_code_25_24_23_22_21_20_19_18_17_16(instruction); | |
15988 | ||
89a955e8 | 15989 | |
4066c152 | 15990 | return img_format("WAIT 0x%" PRIx64, code_value); |
89a955e8 AM |
15991 | } |
15992 | ||
15993 | ||
15994 | /* | |
fc95c241 AM |
15995 | * [DSP] WRDSP rt, mask - Write selected fields from a GPR to the DSPControl |
15996 | * register | |
89a955e8 AM |
15997 | * |
15998 | * 3 2 1 | |
15999 | * 10987654321098765432109876543210 | |
16000 | * 001000 01011001111111 | |
16001 | * rt ----- | |
16002 | * mask ------- | |
16003 | */ | |
7def8a4b | 16004 | static char *WRDSP(uint64 instruction, Dis_info *info) |
89a955e8 AM |
16005 | { |
16006 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
16007 | uint64 mask_value = extract_mask_20_19_18_17_16_15_14(instruction); | |
16008 | ||
3f2aec07 | 16009 | const char *rt = GPR(rt_value, info); |
89a955e8 | 16010 | |
4066c152 | 16011 | return img_format("WRDSP %s, 0x%" PRIx64, rt, mask_value); |
89a955e8 AM |
16012 | } |
16013 | ||
16014 | ||
16015 | /* | |
16016 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
16017 | * | |
16018 | * 3 2 1 | |
16019 | * 10987654321098765432109876543210 | |
16020 | * 001000 00010001101 | |
16021 | * rt ----- | |
16022 | * rs ----- | |
16023 | * rd ----- | |
16024 | */ | |
7def8a4b | 16025 | static char *WRPGPR(uint64 instruction, Dis_info *info) |
89a955e8 AM |
16026 | { |
16027 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
16028 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
16029 | ||
3f2aec07 ML |
16030 | const char *rt = GPR(rt_value, info); |
16031 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 16032 | |
c5231692 | 16033 | return img_format("WRPGPR %s, %s", rt, rs); |
89a955e8 AM |
16034 | } |
16035 | ||
16036 | ||
16037 | /* | |
16038 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
16039 | * | |
16040 | * 3 2 1 | |
16041 | * 10987654321098765432109876543210 | |
16042 | * 001000 00010001101 | |
16043 | * rt ----- | |
16044 | * rs ----- | |
16045 | * rd ----- | |
16046 | */ | |
7def8a4b | 16047 | static char *XOR_16_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
16048 | { |
16049 | uint64 rt3_value = extract_rt3_9_8_7(instruction); | |
16050 | uint64 rs3_value = extract_rs3_6_5_4(instruction); | |
16051 | ||
3f2aec07 ML |
16052 | const char *rs3 = GPR(decode_gpr_gpr3(rs3_value, info), info); |
16053 | const char *rt3 = GPR(decode_gpr_gpr3(rt3_value, info), info); | |
89a955e8 | 16054 | |
c5231692 | 16055 | return img_format("XOR %s, %s", rs3, rt3); |
89a955e8 AM |
16056 | } |
16057 | ||
16058 | ||
16059 | /* | |
16060 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
16061 | * | |
16062 | * 3 2 1 | |
16063 | * 10987654321098765432109876543210 | |
16064 | * 001000 00010001101 | |
16065 | * rt ----- | |
16066 | * rs ----- | |
16067 | * rd ----- | |
16068 | */ | |
7def8a4b | 16069 | static char *XOR_32_(uint64 instruction, Dis_info *info) |
89a955e8 AM |
16070 | { |
16071 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 16072 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 16073 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
89a955e8 | 16074 | |
3f2aec07 ML |
16075 | const char *rd = GPR(rd_value, info); |
16076 | const char *rs = GPR(rs_value, info); | |
16077 | const char *rt = GPR(rt_value, info); | |
89a955e8 | 16078 | |
c5231692 | 16079 | return img_format("XOR %s, %s, %s", rd, rs, rt); |
89a955e8 AM |
16080 | } |
16081 | ||
16082 | ||
16083 | /* | |
16084 | * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results | |
16085 | * | |
16086 | * 3 2 1 | |
16087 | * 10987654321098765432109876543210 | |
16088 | * 001000 00010001101 | |
16089 | * rt ----- | |
16090 | * rs ----- | |
16091 | * rd ----- | |
16092 | */ | |
7def8a4b | 16093 | static char *XORI(uint64 instruction, Dis_info *info) |
89a955e8 AM |
16094 | { |
16095 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
89a955e8 | 16096 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
86b5f803 | 16097 | uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); |
89a955e8 | 16098 | |
3f2aec07 ML |
16099 | const char *rt = GPR(rt_value, info); |
16100 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 16101 | |
4066c152 | 16102 | return img_format("XORI %s, %s, 0x%" PRIx64, rt, rs, u_value); |
89a955e8 AM |
16103 | } |
16104 | ||
16105 | ||
16106 | /* | |
16107 | * YIELD rt, rs - | |
16108 | * | |
16109 | * 3 2 1 | |
16110 | * 10987654321098765432109876543210 | |
16111 | * 001000 00010001101 | |
16112 | * rt ----- | |
16113 | * rs ----- | |
16114 | */ | |
7def8a4b | 16115 | static char *YIELD(uint64 instruction, Dis_info *info) |
89a955e8 AM |
16116 | { |
16117 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); | |
16118 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); | |
16119 | ||
3f2aec07 ML |
16120 | const char *rt = GPR(rt_value, info); |
16121 | const char *rs = GPR(rs_value, info); | |
89a955e8 | 16122 | |
c5231692 | 16123 | return img_format("YIELD %s, %s", rt, rs); |
89a955e8 AM |
16124 | } |
16125 | ||
16126 | ||
16127 | ||
ca2b40b7 AM |
16128 | /* |
16129 | * nanoMIPS instruction pool organization | |
16130 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
16131 | * | |
16132 | * | |
16133 | * ┌─ P.ADDIU ─── P.RI ─── P.SYSCALL | |
16134 | * │ | |
16135 | * │ ┌─ P.TRAP | |
16136 | * │ │ | |
16137 | * │ ┌─ _POOL32A0_0 ─┼─ P.CMOVE | |
16138 | * │ │ │ | |
16139 | * │ │ └─ P.SLTU | |
16140 | * │ ┌─ _POOL32A0 ─┤ | |
16141 | * │ │ │ | |
16142 | * │ │ │ | |
16143 | * │ │ └─ _POOL32A0_1 ─── CRC32 | |
16144 | * │ │ | |
16145 | * ├─ P32A ─┤ | |
16146 | * │ │ ┌─ PP.LSX | |
16147 | * │ │ ┌─ P.LSX ─────┤ | |
16148 | * │ │ │ └─ PP.LSXS | |
16149 | * │ └─ _POOL32A7 ─┤ | |
16150 | * │ │ ┌─ POOL32Axf_4 | |
16151 | * │ └─ POOL32Axf ─┤ | |
16152 | * │ └─ POOL32Axf_5 | |
16153 | * │ | |
16154 | * ├─ PBAL | |
16155 | * │ | |
16156 | * ├─ P.GP.W ┌─ PP.LSX | |
16157 | * ┌─ P32 ─┤ │ | |
16158 | * │ ├─ P.GP.BH ─┴─ PP.LSXS | |
16159 | * │ │ | |
16160 | * │ ├─ P.J ─────── PP.BALRSC | |
16161 | * │ │ | |
16162 | * │ ├─ P48I | |
16163 | * │ │ ┌─ P.SR | |
16164 | * │ │ │ | |
16165 | * │ │ ├─ P.SHIFT | |
16166 | * │ │ │ | |
16167 | * │ ├─ P.U12 ───┼─ P.ROTX | |
16168 | * │ │ │ | |
16169 | * │ │ ├─ P.INS | |
16170 | * │ │ │ | |
16171 | * │ │ └─ P.EXT | |
16172 | * │ │ | |
16173 | * │ ├─ P.LS.U12 ── P.PREF.U12 | |
16174 | * │ │ | |
16175 | * │ ├─ P.BR1 ───── P.BR3A | |
16176 | * │ │ | |
16177 | * │ │ ┌─ P.LS.S0 ─── P16.SYSCALL | |
16178 | * │ │ │ | |
16179 | * │ │ │ ┌─ P.LL | |
16180 | * │ │ ├─ P.LS.S1 ─┤ | |
16181 | * │ │ │ └─ P.SC | |
16182 | * │ │ │ | |
16183 | * │ │ │ ┌─ P.PREFE | |
16184 | * MAJOR ─┤ ├─ P.LS.S9 ─┤ │ | |
16185 | * │ │ ├─ P.LS.E0 ─┼─ P.LLE | |
16186 | * │ │ │ │ | |
16187 | * │ │ │ └─ P.SCE | |
16188 | * │ │ │ | |
16189 | * │ │ ├─ P.LS.WM | |
16190 | * │ │ │ | |
16191 | * │ │ └─ P.LS.UAWM | |
16192 | * │ │ | |
16193 | * │ │ | |
16194 | * │ ├─ P.BR2 | |
16195 | * │ │ | |
16196 | * │ ├─ P.BRI | |
16197 | * │ │ | |
16198 | * │ └─ P.LUI | |
16199 | * │ | |
16200 | * │ | |
16201 | * │ ┌─ P16.MV ──── P16.RI ─── P16.SYSCALL | |
16202 | * │ │ | |
16203 | * │ ├─ P16.SR | |
16204 | * │ │ | |
16205 | * │ ├─ P16.SHIFT | |
16206 | * │ │ | |
16207 | * │ ├─ P16.4x4 | |
16208 | * │ │ | |
16209 | * │ ├─ P16C ────── POOL16C_0 ── POOL16C_00 | |
16210 | * │ │ | |
16211 | * └─ P16 ─┼─ P16.LB | |
16212 | * │ | |
16213 | * ├─ P16.A1 | |
16214 | * │ | |
16215 | * ├─ P16.LH | |
16216 | * │ | |
16217 | * ├─ P16.A2 ──── P.ADDIU[RS5] | |
16218 | * │ | |
16219 | * ├─ P16.ADDU | |
16220 | * │ | |
16221 | * └─ P16.BR ──┬─ P16.JRC | |
16222 | * │ | |
16223 | * └─ P16.BR1 | |
16224 | * | |
16225 | * | |
16226 | * (FP, DPS, and some minor instruction pools are omitted from the diagram) | |
16227 | * | |
16228 | */ | |
16229 | ||
a1465490 | 16230 | static const Pool P_SYSCALL[2] = { |
89a955e8 | 16231 | { instruction , 0 , 0 , 32, |
8d416f6b | 16232 | 0xfffc0000, 0x00080000, &SYSCALL_32_ , 0, |
89a955e8 AM |
16233 | 0x0 }, /* SYSCALL[32] */ |
16234 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16235 | 0xfffc0000, 0x000c0000, &HYPCALL , 0, |
89a955e8 AM |
16236 | CP0_ | VZ_ }, /* HYPCALL */ |
16237 | }; | |
16238 | ||
16239 | ||
a1465490 | 16240 | static const Pool P_RI[4] = { |
89a955e8 | 16241 | { instruction , 0 , 0 , 32, |
8d416f6b | 16242 | 0xfff80000, 0x00000000, &SIGRIE , 0, |
89a955e8 AM |
16243 | 0x0 }, /* SIGRIE */ |
16244 | { pool , P_SYSCALL , 2 , 32, | |
16245 | 0xfff80000, 0x00080000, 0 , 0, | |
16246 | 0x0 }, /* P.SYSCALL */ | |
16247 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16248 | 0xfff80000, 0x00100000, &BREAK_32_ , 0, |
89a955e8 AM |
16249 | 0x0 }, /* BREAK[32] */ |
16250 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16251 | 0xfff80000, 0x00180000, &SDBBP_32_ , 0, |
89a955e8 AM |
16252 | EJTAG_ }, /* SDBBP[32] */ |
16253 | }; | |
16254 | ||
16255 | ||
a1465490 | 16256 | static const Pool P_ADDIU[2] = { |
89a955e8 AM |
16257 | { pool , P_RI , 4 , 32, |
16258 | 0xffe00000, 0x00000000, 0 , 0, | |
16259 | 0x0 }, /* P.RI */ | |
16260 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16261 | 0xfc000000, 0x00000000, &ADDIU_32_ , &ADDIU_32__cond , |
89a955e8 AM |
16262 | 0x0 }, /* ADDIU[32] */ |
16263 | }; | |
16264 | ||
16265 | ||
a1465490 | 16266 | static const Pool P_TRAP[2] = { |
89a955e8 | 16267 | { instruction , 0 , 0 , 32, |
8d416f6b | 16268 | 0xfc0007ff, 0x20000000, &TEQ , 0, |
89a955e8 AM |
16269 | XMMS_ }, /* TEQ */ |
16270 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16271 | 0xfc0007ff, 0x20000400, &TNE , 0, |
89a955e8 AM |
16272 | XMMS_ }, /* TNE */ |
16273 | }; | |
16274 | ||
16275 | ||
a1465490 | 16276 | static const Pool P_CMOVE[2] = { |
89a955e8 | 16277 | { instruction , 0 , 0 , 32, |
8d416f6b | 16278 | 0xfc0007ff, 0x20000210, &MOVZ , 0, |
89a955e8 AM |
16279 | 0x0 }, /* MOVZ */ |
16280 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16281 | 0xfc0007ff, 0x20000610, &MOVN , 0, |
89a955e8 AM |
16282 | 0x0 }, /* MOVN */ |
16283 | }; | |
16284 | ||
16285 | ||
a1465490 | 16286 | static const Pool P_D_MT_VPE[2] = { |
89a955e8 | 16287 | { instruction , 0 , 0 , 32, |
8d416f6b | 16288 | 0xfc1f3fff, 0x20010ab0, &DMT , 0, |
89a955e8 AM |
16289 | MT_ }, /* DMT */ |
16290 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16291 | 0xfc1f3fff, 0x20000ab0, &DVPE , 0, |
89a955e8 AM |
16292 | MT_ }, /* DVPE */ |
16293 | }; | |
16294 | ||
16295 | ||
a1465490 | 16296 | static const Pool P_E_MT_VPE[2] = { |
89a955e8 | 16297 | { instruction , 0 , 0 , 32, |
8d416f6b | 16298 | 0xfc1f3fff, 0x20010eb0, &EMT , 0, |
89a955e8 AM |
16299 | MT_ }, /* EMT */ |
16300 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16301 | 0xfc1f3fff, 0x20000eb0, &EVPE , 0, |
89a955e8 AM |
16302 | MT_ }, /* EVPE */ |
16303 | }; | |
16304 | ||
16305 | ||
a1465490 | 16306 | static const Pool _P_MT_VPE[2] = { |
89a955e8 AM |
16307 | { pool , P_D_MT_VPE , 2 , 32, |
16308 | 0xfc003fff, 0x20000ab0, 0 , 0, | |
16309 | 0x0 }, /* P.D_MT_VPE */ | |
16310 | { pool , P_E_MT_VPE , 2 , 32, | |
16311 | 0xfc003fff, 0x20000eb0, 0 , 0, | |
16312 | 0x0 }, /* P.E_MT_VPE */ | |
16313 | }; | |
16314 | ||
16315 | ||
a1465490 | 16316 | static const Pool P_MT_VPE[8] = { |
89a955e8 AM |
16317 | { reserved_block , 0 , 0 , 32, |
16318 | 0xfc003bff, 0x200002b0, 0 , 0, | |
16319 | 0x0 }, /* P.MT_VPE~*(0) */ | |
16320 | { pool , _P_MT_VPE , 2 , 32, | |
16321 | 0xfc003bff, 0x20000ab0, 0 , 0, | |
16322 | 0x0 }, /* _P.MT_VPE */ | |
16323 | { reserved_block , 0 , 0 , 32, | |
16324 | 0xfc003bff, 0x200012b0, 0 , 0, | |
16325 | 0x0 }, /* P.MT_VPE~*(2) */ | |
16326 | { reserved_block , 0 , 0 , 32, | |
16327 | 0xfc003bff, 0x20001ab0, 0 , 0, | |
16328 | 0x0 }, /* P.MT_VPE~*(3) */ | |
16329 | { reserved_block , 0 , 0 , 32, | |
16330 | 0xfc003bff, 0x200022b0, 0 , 0, | |
16331 | 0x0 }, /* P.MT_VPE~*(4) */ | |
16332 | { reserved_block , 0 , 0 , 32, | |
16333 | 0xfc003bff, 0x20002ab0, 0 , 0, | |
16334 | 0x0 }, /* P.MT_VPE~*(5) */ | |
16335 | { reserved_block , 0 , 0 , 32, | |
16336 | 0xfc003bff, 0x200032b0, 0 , 0, | |
16337 | 0x0 }, /* P.MT_VPE~*(6) */ | |
16338 | { reserved_block , 0 , 0 , 32, | |
16339 | 0xfc003bff, 0x20003ab0, 0 , 0, | |
16340 | 0x0 }, /* P.MT_VPE~*(7) */ | |
16341 | }; | |
16342 | ||
16343 | ||
a1465490 | 16344 | static const Pool P_DVP[2] = { |
89a955e8 | 16345 | { instruction , 0 , 0 , 32, |
8d416f6b | 16346 | 0xfc00ffff, 0x20000390, &DVP , 0, |
89a955e8 AM |
16347 | 0x0 }, /* DVP */ |
16348 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16349 | 0xfc00ffff, 0x20000790, &EVP , 0, |
89a955e8 AM |
16350 | 0x0 }, /* EVP */ |
16351 | }; | |
16352 | ||
16353 | ||
a1465490 | 16354 | static const Pool P_SLTU[2] = { |
89a955e8 AM |
16355 | { pool , P_DVP , 2 , 32, |
16356 | 0xfc00fbff, 0x20000390, 0 , 0, | |
16357 | 0x0 }, /* P.DVP */ | |
16358 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16359 | 0xfc0003ff, 0x20000390, &SLTU , &SLTU_cond , |
89a955e8 AM |
16360 | 0x0 }, /* SLTU */ |
16361 | }; | |
16362 | ||
16363 | ||
a1465490 | 16364 | static const Pool _POOL32A0[128] = { |
89a955e8 AM |
16365 | { pool , P_TRAP , 2 , 32, |
16366 | 0xfc0003ff, 0x20000000, 0 , 0, | |
16367 | 0x0 }, /* P.TRAP */ | |
16368 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16369 | 0xfc0003ff, 0x20000008, &SEB , 0, |
89a955e8 AM |
16370 | XMMS_ }, /* SEB */ |
16371 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16372 | 0xfc0003ff, 0x20000010, &SLLV , 0, |
89a955e8 AM |
16373 | 0x0 }, /* SLLV */ |
16374 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16375 | 0xfc0003ff, 0x20000018, &MUL_32_ , 0, |
89a955e8 AM |
16376 | 0x0 }, /* MUL[32] */ |
16377 | { reserved_block , 0 , 0 , 32, | |
16378 | 0xfc0003ff, 0x20000020, 0 , 0, | |
16379 | 0x0 }, /* _POOL32A0~*(4) */ | |
16380 | { reserved_block , 0 , 0 , 32, | |
16381 | 0xfc0003ff, 0x20000028, 0 , 0, | |
16382 | 0x0 }, /* _POOL32A0~*(5) */ | |
16383 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16384 | 0xfc0003ff, 0x20000030, &MFC0 , 0, |
89a955e8 AM |
16385 | 0x0 }, /* MFC0 */ |
16386 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16387 | 0xfc0003ff, 0x20000038, &MFHC0 , 0, |
89a955e8 AM |
16388 | CP0_ | MVH_ }, /* MFHC0 */ |
16389 | { reserved_block , 0 , 0 , 32, | |
16390 | 0xfc0003ff, 0x20000040, 0 , 0, | |
16391 | 0x0 }, /* _POOL32A0~*(8) */ | |
16392 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16393 | 0xfc0003ff, 0x20000048, &SEH , 0, |
89a955e8 AM |
16394 | 0x0 }, /* SEH */ |
16395 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16396 | 0xfc0003ff, 0x20000050, &SRLV , 0, |
89a955e8 AM |
16397 | 0x0 }, /* SRLV */ |
16398 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16399 | 0xfc0003ff, 0x20000058, &MUH , 0, |
89a955e8 AM |
16400 | 0x0 }, /* MUH */ |
16401 | { reserved_block , 0 , 0 , 32, | |
16402 | 0xfc0003ff, 0x20000060, 0 , 0, | |
16403 | 0x0 }, /* _POOL32A0~*(12) */ | |
16404 | { reserved_block , 0 , 0 , 32, | |
16405 | 0xfc0003ff, 0x20000068, 0 , 0, | |
16406 | 0x0 }, /* _POOL32A0~*(13) */ | |
16407 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16408 | 0xfc0003ff, 0x20000070, &MTC0 , 0, |
89a955e8 AM |
16409 | CP0_ }, /* MTC0 */ |
16410 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16411 | 0xfc0003ff, 0x20000078, &MTHC0 , 0, |
89a955e8 AM |
16412 | CP0_ | MVH_ }, /* MTHC0 */ |
16413 | { reserved_block , 0 , 0 , 32, | |
16414 | 0xfc0003ff, 0x20000080, 0 , 0, | |
16415 | 0x0 }, /* _POOL32A0~*(16) */ | |
16416 | { reserved_block , 0 , 0 , 32, | |
16417 | 0xfc0003ff, 0x20000088, 0 , 0, | |
16418 | 0x0 }, /* _POOL32A0~*(17) */ | |
16419 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16420 | 0xfc0003ff, 0x20000090, &SRAV , 0, |
89a955e8 AM |
16421 | 0x0 }, /* SRAV */ |
16422 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16423 | 0xfc0003ff, 0x20000098, &MULU , 0, |
89a955e8 AM |
16424 | 0x0 }, /* MULU */ |
16425 | { reserved_block , 0 , 0 , 32, | |
16426 | 0xfc0003ff, 0x200000a0, 0 , 0, | |
16427 | 0x0 }, /* _POOL32A0~*(20) */ | |
16428 | { reserved_block , 0 , 0 , 32, | |
16429 | 0xfc0003ff, 0x200000a8, 0 , 0, | |
16430 | 0x0 }, /* _POOL32A0~*(21) */ | |
16431 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16432 | 0xfc0003ff, 0x200000b0, &MFGC0 , 0, |
89a955e8 AM |
16433 | CP0_ | VZ_ }, /* MFGC0 */ |
16434 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16435 | 0xfc0003ff, 0x200000b8, &MFHGC0 , 0, |
89a955e8 AM |
16436 | CP0_ | VZ_ | MVH_ }, /* MFHGC0 */ |
16437 | { reserved_block , 0 , 0 , 32, | |
16438 | 0xfc0003ff, 0x200000c0, 0 , 0, | |
16439 | 0x0 }, /* _POOL32A0~*(24) */ | |
16440 | { reserved_block , 0 , 0 , 32, | |
16441 | 0xfc0003ff, 0x200000c8, 0 , 0, | |
16442 | 0x0 }, /* _POOL32A0~*(25) */ | |
16443 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16444 | 0xfc0003ff, 0x200000d0, &ROTRV , 0, |
89a955e8 AM |
16445 | 0x0 }, /* ROTRV */ |
16446 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16447 | 0xfc0003ff, 0x200000d8, &MUHU , 0, |
89a955e8 AM |
16448 | 0x0 }, /* MUHU */ |
16449 | { reserved_block , 0 , 0 , 32, | |
16450 | 0xfc0003ff, 0x200000e0, 0 , 0, | |
16451 | 0x0 }, /* _POOL32A0~*(28) */ | |
16452 | { reserved_block , 0 , 0 , 32, | |
16453 | 0xfc0003ff, 0x200000e8, 0 , 0, | |
16454 | 0x0 }, /* _POOL32A0~*(29) */ | |
16455 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16456 | 0xfc0003ff, 0x200000f0, &MTGC0 , 0, |
89a955e8 AM |
16457 | CP0_ | VZ_ }, /* MTGC0 */ |
16458 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16459 | 0xfc0003ff, 0x200000f8, &MTHGC0 , 0, |
89a955e8 AM |
16460 | CP0_ | VZ_ | MVH_ }, /* MTHGC0 */ |
16461 | { reserved_block , 0 , 0 , 32, | |
16462 | 0xfc0003ff, 0x20000100, 0 , 0, | |
16463 | 0x0 }, /* _POOL32A0~*(32) */ | |
16464 | { reserved_block , 0 , 0 , 32, | |
16465 | 0xfc0003ff, 0x20000108, 0 , 0, | |
16466 | 0x0 }, /* _POOL32A0~*(33) */ | |
16467 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16468 | 0xfc0003ff, 0x20000110, &ADD , 0, |
89a955e8 AM |
16469 | XMMS_ }, /* ADD */ |
16470 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16471 | 0xfc0003ff, 0x20000118, &DIV , 0, |
89a955e8 AM |
16472 | 0x0 }, /* DIV */ |
16473 | { reserved_block , 0 , 0 , 32, | |
16474 | 0xfc0003ff, 0x20000120, 0 , 0, | |
16475 | 0x0 }, /* _POOL32A0~*(36) */ | |
16476 | { reserved_block , 0 , 0 , 32, | |
16477 | 0xfc0003ff, 0x20000128, 0 , 0, | |
16478 | 0x0 }, /* _POOL32A0~*(37) */ | |
16479 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16480 | 0xfc0003ff, 0x20000130, &DMFC0 , 0, |
89a955e8 AM |
16481 | CP0_ | MIPS64_ }, /* DMFC0 */ |
16482 | { reserved_block , 0 , 0 , 32, | |
16483 | 0xfc0003ff, 0x20000138, 0 , 0, | |
16484 | 0x0 }, /* _POOL32A0~*(39) */ | |
16485 | { reserved_block , 0 , 0 , 32, | |
16486 | 0xfc0003ff, 0x20000140, 0 , 0, | |
16487 | 0x0 }, /* _POOL32A0~*(40) */ | |
16488 | { reserved_block , 0 , 0 , 32, | |
16489 | 0xfc0003ff, 0x20000148, 0 , 0, | |
16490 | 0x0 }, /* _POOL32A0~*(41) */ | |
16491 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16492 | 0xfc0003ff, 0x20000150, &ADDU_32_ , 0, |
89a955e8 AM |
16493 | 0x0 }, /* ADDU[32] */ |
16494 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16495 | 0xfc0003ff, 0x20000158, &MOD , 0, |
89a955e8 AM |
16496 | 0x0 }, /* MOD */ |
16497 | { reserved_block , 0 , 0 , 32, | |
16498 | 0xfc0003ff, 0x20000160, 0 , 0, | |
16499 | 0x0 }, /* _POOL32A0~*(44) */ | |
16500 | { reserved_block , 0 , 0 , 32, | |
16501 | 0xfc0003ff, 0x20000168, 0 , 0, | |
16502 | 0x0 }, /* _POOL32A0~*(45) */ | |
16503 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16504 | 0xfc0003ff, 0x20000170, &DMTC0 , 0, |
89a955e8 AM |
16505 | CP0_ | MIPS64_ }, /* DMTC0 */ |
16506 | { reserved_block , 0 , 0 , 32, | |
16507 | 0xfc0003ff, 0x20000178, 0 , 0, | |
16508 | 0x0 }, /* _POOL32A0~*(47) */ | |
16509 | { reserved_block , 0 , 0 , 32, | |
16510 | 0xfc0003ff, 0x20000180, 0 , 0, | |
16511 | 0x0 }, /* _POOL32A0~*(48) */ | |
16512 | { reserved_block , 0 , 0 , 32, | |
16513 | 0xfc0003ff, 0x20000188, 0 , 0, | |
16514 | 0x0 }, /* _POOL32A0~*(49) */ | |
16515 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16516 | 0xfc0003ff, 0x20000190, &SUB , 0, |
89a955e8 AM |
16517 | XMMS_ }, /* SUB */ |
16518 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16519 | 0xfc0003ff, 0x20000198, &DIVU , 0, |
89a955e8 AM |
16520 | 0x0 }, /* DIVU */ |
16521 | { reserved_block , 0 , 0 , 32, | |
16522 | 0xfc0003ff, 0x200001a0, 0 , 0, | |
16523 | 0x0 }, /* _POOL32A0~*(52) */ | |
16524 | { reserved_block , 0 , 0 , 32, | |
16525 | 0xfc0003ff, 0x200001a8, 0 , 0, | |
16526 | 0x0 }, /* _POOL32A0~*(53) */ | |
16527 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16528 | 0xfc0003ff, 0x200001b0, &DMFGC0 , 0, |
89a955e8 AM |
16529 | CP0_ | MIPS64_ | VZ_}, /* DMFGC0 */ |
16530 | { reserved_block , 0 , 0 , 32, | |
16531 | 0xfc0003ff, 0x200001b8, 0 , 0, | |
16532 | 0x0 }, /* _POOL32A0~*(55) */ | |
16533 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16534 | 0xfc0003ff, 0x200001c0, &RDHWR , 0, |
89a955e8 AM |
16535 | XMMS_ }, /* RDHWR */ |
16536 | { reserved_block , 0 , 0 , 32, | |
16537 | 0xfc0003ff, 0x200001c8, 0 , 0, | |
16538 | 0x0 }, /* _POOL32A0~*(57) */ | |
16539 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16540 | 0xfc0003ff, 0x200001d0, &SUBU_32_ , 0, |
89a955e8 AM |
16541 | 0x0 }, /* SUBU[32] */ |
16542 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16543 | 0xfc0003ff, 0x200001d8, &MODU , 0, |
89a955e8 AM |
16544 | 0x0 }, /* MODU */ |
16545 | { reserved_block , 0 , 0 , 32, | |
16546 | 0xfc0003ff, 0x200001e0, 0 , 0, | |
16547 | 0x0 }, /* _POOL32A0~*(60) */ | |
16548 | { reserved_block , 0 , 0 , 32, | |
16549 | 0xfc0003ff, 0x200001e8, 0 , 0, | |
16550 | 0x0 }, /* _POOL32A0~*(61) */ | |
16551 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16552 | 0xfc0003ff, 0x200001f0, &DMTGC0 , 0, |
89a955e8 AM |
16553 | CP0_ | MIPS64_ | VZ_}, /* DMTGC0 */ |
16554 | { reserved_block , 0 , 0 , 32, | |
16555 | 0xfc0003ff, 0x200001f8, 0 , 0, | |
16556 | 0x0 }, /* _POOL32A0~*(63) */ | |
16557 | { reserved_block , 0 , 0 , 32, | |
16558 | 0xfc0003ff, 0x20000200, 0 , 0, | |
16559 | 0x0 }, /* _POOL32A0~*(64) */ | |
16560 | { reserved_block , 0 , 0 , 32, | |
16561 | 0xfc0003ff, 0x20000208, 0 , 0, | |
16562 | 0x0 }, /* _POOL32A0~*(65) */ | |
16563 | { pool , P_CMOVE , 2 , 32, | |
16564 | 0xfc0003ff, 0x20000210, 0 , 0, | |
16565 | 0x0 }, /* P.CMOVE */ | |
16566 | { reserved_block , 0 , 0 , 32, | |
16567 | 0xfc0003ff, 0x20000218, 0 , 0, | |
16568 | 0x0 }, /* _POOL32A0~*(67) */ | |
16569 | { reserved_block , 0 , 0 , 32, | |
16570 | 0xfc0003ff, 0x20000220, 0 , 0, | |
16571 | 0x0 }, /* _POOL32A0~*(68) */ | |
16572 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16573 | 0xfc0003ff, 0x20000228, &FORK , 0, |
89a955e8 AM |
16574 | MT_ }, /* FORK */ |
16575 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16576 | 0xfc0003ff, 0x20000230, &MFTR , 0, |
89a955e8 AM |
16577 | MT_ }, /* MFTR */ |
16578 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16579 | 0xfc0003ff, 0x20000238, &MFHTR , 0, |
89a955e8 AM |
16580 | MT_ }, /* MFHTR */ |
16581 | { reserved_block , 0 , 0 , 32, | |
16582 | 0xfc0003ff, 0x20000240, 0 , 0, | |
16583 | 0x0 }, /* _POOL32A0~*(72) */ | |
16584 | { reserved_block , 0 , 0 , 32, | |
16585 | 0xfc0003ff, 0x20000248, 0 , 0, | |
16586 | 0x0 }, /* _POOL32A0~*(73) */ | |
16587 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16588 | 0xfc0003ff, 0x20000250, &AND_32_ , 0, |
89a955e8 AM |
16589 | 0x0 }, /* AND[32] */ |
16590 | { reserved_block , 0 , 0 , 32, | |
16591 | 0xfc0003ff, 0x20000258, 0 , 0, | |
16592 | 0x0 }, /* _POOL32A0~*(75) */ | |
16593 | { reserved_block , 0 , 0 , 32, | |
16594 | 0xfc0003ff, 0x20000260, 0 , 0, | |
16595 | 0x0 }, /* _POOL32A0~*(76) */ | |
16596 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16597 | 0xfc0003ff, 0x20000268, &YIELD , 0, |
89a955e8 AM |
16598 | MT_ }, /* YIELD */ |
16599 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16600 | 0xfc0003ff, 0x20000270, &MTTR , 0, |
89a955e8 AM |
16601 | MT_ }, /* MTTR */ |
16602 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16603 | 0xfc0003ff, 0x20000278, &MTHTR , 0, |
89a955e8 AM |
16604 | MT_ }, /* MTHTR */ |
16605 | { reserved_block , 0 , 0 , 32, | |
16606 | 0xfc0003ff, 0x20000280, 0 , 0, | |
16607 | 0x0 }, /* _POOL32A0~*(80) */ | |
16608 | { reserved_block , 0 , 0 , 32, | |
16609 | 0xfc0003ff, 0x20000288, 0 , 0, | |
16610 | 0x0 }, /* _POOL32A0~*(81) */ | |
16611 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16612 | 0xfc0003ff, 0x20000290, &OR_32_ , 0, |
89a955e8 AM |
16613 | 0x0 }, /* OR[32] */ |
16614 | { reserved_block , 0 , 0 , 32, | |
16615 | 0xfc0003ff, 0x20000298, 0 , 0, | |
16616 | 0x0 }, /* _POOL32A0~*(83) */ | |
16617 | { reserved_block , 0 , 0 , 32, | |
16618 | 0xfc0003ff, 0x200002a0, 0 , 0, | |
16619 | 0x0 }, /* _POOL32A0~*(84) */ | |
16620 | { reserved_block , 0 , 0 , 32, | |
16621 | 0xfc0003ff, 0x200002a8, 0 , 0, | |
16622 | 0x0 }, /* _POOL32A0~*(85) */ | |
16623 | { pool , P_MT_VPE , 8 , 32, | |
16624 | 0xfc0003ff, 0x200002b0, 0 , 0, | |
16625 | 0x0 }, /* P.MT_VPE */ | |
16626 | { reserved_block , 0 , 0 , 32, | |
16627 | 0xfc0003ff, 0x200002b8, 0 , 0, | |
16628 | 0x0 }, /* _POOL32A0~*(87) */ | |
16629 | { reserved_block , 0 , 0 , 32, | |
16630 | 0xfc0003ff, 0x200002c0, 0 , 0, | |
16631 | 0x0 }, /* _POOL32A0~*(88) */ | |
16632 | { reserved_block , 0 , 0 , 32, | |
16633 | 0xfc0003ff, 0x200002c8, 0 , 0, | |
16634 | 0x0 }, /* _POOL32A0~*(89) */ | |
16635 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16636 | 0xfc0003ff, 0x200002d0, &NOR , 0, |
89a955e8 AM |
16637 | 0x0 }, /* NOR */ |
16638 | { reserved_block , 0 , 0 , 32, | |
16639 | 0xfc0003ff, 0x200002d8, 0 , 0, | |
16640 | 0x0 }, /* _POOL32A0~*(91) */ | |
16641 | { reserved_block , 0 , 0 , 32, | |
16642 | 0xfc0003ff, 0x200002e0, 0 , 0, | |
16643 | 0x0 }, /* _POOL32A0~*(92) */ | |
16644 | { reserved_block , 0 , 0 , 32, | |
16645 | 0xfc0003ff, 0x200002e8, 0 , 0, | |
16646 | 0x0 }, /* _POOL32A0~*(93) */ | |
16647 | { reserved_block , 0 , 0 , 32, | |
16648 | 0xfc0003ff, 0x200002f0, 0 , 0, | |
16649 | 0x0 }, /* _POOL32A0~*(94) */ | |
16650 | { reserved_block , 0 , 0 , 32, | |
16651 | 0xfc0003ff, 0x200002f8, 0 , 0, | |
16652 | 0x0 }, /* _POOL32A0~*(95) */ | |
16653 | { reserved_block , 0 , 0 , 32, | |
16654 | 0xfc0003ff, 0x20000300, 0 , 0, | |
16655 | 0x0 }, /* _POOL32A0~*(96) */ | |
16656 | { reserved_block , 0 , 0 , 32, | |
16657 | 0xfc0003ff, 0x20000308, 0 , 0, | |
16658 | 0x0 }, /* _POOL32A0~*(97) */ | |
16659 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16660 | 0xfc0003ff, 0x20000310, &XOR_32_ , 0, |
89a955e8 AM |
16661 | 0x0 }, /* XOR[32] */ |
16662 | { reserved_block , 0 , 0 , 32, | |
16663 | 0xfc0003ff, 0x20000318, 0 , 0, | |
16664 | 0x0 }, /* _POOL32A0~*(99) */ | |
16665 | { reserved_block , 0 , 0 , 32, | |
16666 | 0xfc0003ff, 0x20000320, 0 , 0, | |
16667 | 0x0 }, /* _POOL32A0~*(100) */ | |
16668 | { reserved_block , 0 , 0 , 32, | |
16669 | 0xfc0003ff, 0x20000328, 0 , 0, | |
16670 | 0x0 }, /* _POOL32A0~*(101) */ | |
16671 | { reserved_block , 0 , 0 , 32, | |
16672 | 0xfc0003ff, 0x20000330, 0 , 0, | |
16673 | 0x0 }, /* _POOL32A0~*(102) */ | |
16674 | { reserved_block , 0 , 0 , 32, | |
16675 | 0xfc0003ff, 0x20000338, 0 , 0, | |
16676 | 0x0 }, /* _POOL32A0~*(103) */ | |
16677 | { reserved_block , 0 , 0 , 32, | |
16678 | 0xfc0003ff, 0x20000340, 0 , 0, | |
16679 | 0x0 }, /* _POOL32A0~*(104) */ | |
16680 | { reserved_block , 0 , 0 , 32, | |
16681 | 0xfc0003ff, 0x20000348, 0 , 0, | |
16682 | 0x0 }, /* _POOL32A0~*(105) */ | |
16683 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16684 | 0xfc0003ff, 0x20000350, &SLT , 0, |
89a955e8 AM |
16685 | 0x0 }, /* SLT */ |
16686 | { reserved_block , 0 , 0 , 32, | |
16687 | 0xfc0003ff, 0x20000358, 0 , 0, | |
16688 | 0x0 }, /* _POOL32A0~*(107) */ | |
16689 | { reserved_block , 0 , 0 , 32, | |
16690 | 0xfc0003ff, 0x20000360, 0 , 0, | |
16691 | 0x0 }, /* _POOL32A0~*(108) */ | |
16692 | { reserved_block , 0 , 0 , 32, | |
16693 | 0xfc0003ff, 0x20000368, 0 , 0, | |
16694 | 0x0 }, /* _POOL32A0~*(109) */ | |
16695 | { reserved_block , 0 , 0 , 32, | |
16696 | 0xfc0003ff, 0x20000370, 0 , 0, | |
16697 | 0x0 }, /* _POOL32A0~*(110) */ | |
16698 | { reserved_block , 0 , 0 , 32, | |
16699 | 0xfc0003ff, 0x20000378, 0 , 0, | |
16700 | 0x0 }, /* _POOL32A0~*(111) */ | |
16701 | { reserved_block , 0 , 0 , 32, | |
16702 | 0xfc0003ff, 0x20000380, 0 , 0, | |
16703 | 0x0 }, /* _POOL32A0~*(112) */ | |
16704 | { reserved_block , 0 , 0 , 32, | |
16705 | 0xfc0003ff, 0x20000388, 0 , 0, | |
16706 | 0x0 }, /* _POOL32A0~*(113) */ | |
16707 | { pool , P_SLTU , 2 , 32, | |
16708 | 0xfc0003ff, 0x20000390, 0 , 0, | |
16709 | 0x0 }, /* P.SLTU */ | |
16710 | { reserved_block , 0 , 0 , 32, | |
16711 | 0xfc0003ff, 0x20000398, 0 , 0, | |
16712 | 0x0 }, /* _POOL32A0~*(115) */ | |
16713 | { reserved_block , 0 , 0 , 32, | |
16714 | 0xfc0003ff, 0x200003a0, 0 , 0, | |
16715 | 0x0 }, /* _POOL32A0~*(116) */ | |
16716 | { reserved_block , 0 , 0 , 32, | |
16717 | 0xfc0003ff, 0x200003a8, 0 , 0, | |
16718 | 0x0 }, /* _POOL32A0~*(117) */ | |
16719 | { reserved_block , 0 , 0 , 32, | |
16720 | 0xfc0003ff, 0x200003b0, 0 , 0, | |
16721 | 0x0 }, /* _POOL32A0~*(118) */ | |
16722 | { reserved_block , 0 , 0 , 32, | |
16723 | 0xfc0003ff, 0x200003b8, 0 , 0, | |
16724 | 0x0 }, /* _POOL32A0~*(119) */ | |
16725 | { reserved_block , 0 , 0 , 32, | |
16726 | 0xfc0003ff, 0x200003c0, 0 , 0, | |
16727 | 0x0 }, /* _POOL32A0~*(120) */ | |
16728 | { reserved_block , 0 , 0 , 32, | |
16729 | 0xfc0003ff, 0x200003c8, 0 , 0, | |
16730 | 0x0 }, /* _POOL32A0~*(121) */ | |
16731 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16732 | 0xfc0003ff, 0x200003d0, &SOV , 0, |
89a955e8 AM |
16733 | 0x0 }, /* SOV */ |
16734 | { reserved_block , 0 , 0 , 32, | |
16735 | 0xfc0003ff, 0x200003d8, 0 , 0, | |
16736 | 0x0 }, /* _POOL32A0~*(123) */ | |
16737 | { reserved_block , 0 , 0 , 32, | |
16738 | 0xfc0003ff, 0x200003e0, 0 , 0, | |
16739 | 0x0 }, /* _POOL32A0~*(124) */ | |
16740 | { reserved_block , 0 , 0 , 32, | |
16741 | 0xfc0003ff, 0x200003e8, 0 , 0, | |
16742 | 0x0 }, /* _POOL32A0~*(125) */ | |
16743 | { reserved_block , 0 , 0 , 32, | |
16744 | 0xfc0003ff, 0x200003f0, 0 , 0, | |
16745 | 0x0 }, /* _POOL32A0~*(126) */ | |
16746 | { reserved_block , 0 , 0 , 32, | |
16747 | 0xfc0003ff, 0x200003f8, 0 , 0, | |
16748 | 0x0 }, /* _POOL32A0~*(127) */ | |
16749 | }; | |
16750 | ||
16751 | ||
a1465490 | 16752 | static const Pool ADDQ__S__PH[2] = { |
89a955e8 | 16753 | { instruction , 0 , 0 , 32, |
8d416f6b | 16754 | 0xfc0007ff, 0x2000000d, &ADDQ_PH , 0, |
89a955e8 AM |
16755 | DSP_ }, /* ADDQ.PH */ |
16756 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16757 | 0xfc0007ff, 0x2000040d, &ADDQ_S_PH , 0, |
89a955e8 AM |
16758 | DSP_ }, /* ADDQ_S.PH */ |
16759 | }; | |
16760 | ||
16761 | ||
a1465490 | 16762 | static const Pool MUL__S__PH[2] = { |
89a955e8 | 16763 | { instruction , 0 , 0 , 32, |
8d416f6b | 16764 | 0xfc0007ff, 0x2000002d, &MUL_PH , 0, |
89a955e8 AM |
16765 | DSP_ }, /* MUL.PH */ |
16766 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16767 | 0xfc0007ff, 0x2000042d, &MUL_S_PH , 0, |
89a955e8 AM |
16768 | DSP_ }, /* MUL_S.PH */ |
16769 | }; | |
16770 | ||
16771 | ||
a1465490 | 16772 | static const Pool ADDQH__R__PH[2] = { |
89a955e8 | 16773 | { instruction , 0 , 0 , 32, |
8d416f6b | 16774 | 0xfc0007ff, 0x2000004d, &ADDQH_PH , 0, |
89a955e8 AM |
16775 | DSP_ }, /* ADDQH.PH */ |
16776 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16777 | 0xfc0007ff, 0x2000044d, &ADDQH_R_PH , 0, |
89a955e8 AM |
16778 | DSP_ }, /* ADDQH_R.PH */ |
16779 | }; | |
16780 | ||
16781 | ||
a1465490 | 16782 | static const Pool ADDQH__R__W[2] = { |
89a955e8 | 16783 | { instruction , 0 , 0 , 32, |
8d416f6b | 16784 | 0xfc0007ff, 0x2000008d, &ADDQH_W , 0, |
89a955e8 AM |
16785 | DSP_ }, /* ADDQH.W */ |
16786 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16787 | 0xfc0007ff, 0x2000048d, &ADDQH_R_W , 0, |
89a955e8 AM |
16788 | DSP_ }, /* ADDQH_R.W */ |
16789 | }; | |
16790 | ||
16791 | ||
a1465490 | 16792 | static const Pool ADDU__S__QB[2] = { |
89a955e8 | 16793 | { instruction , 0 , 0 , 32, |
8d416f6b | 16794 | 0xfc0007ff, 0x200000cd, &ADDU_QB , 0, |
89a955e8 AM |
16795 | DSP_ }, /* ADDU.QB */ |
16796 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16797 | 0xfc0007ff, 0x200004cd, &ADDU_S_QB , 0, |
89a955e8 AM |
16798 | DSP_ }, /* ADDU_S.QB */ |
16799 | }; | |
16800 | ||
16801 | ||
a1465490 | 16802 | static const Pool ADDU__S__PH[2] = { |
89a955e8 | 16803 | { instruction , 0 , 0 , 32, |
8d416f6b | 16804 | 0xfc0007ff, 0x2000010d, &ADDU_PH , 0, |
89a955e8 AM |
16805 | DSP_ }, /* ADDU.PH */ |
16806 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16807 | 0xfc0007ff, 0x2000050d, &ADDU_S_PH , 0, |
89a955e8 AM |
16808 | DSP_ }, /* ADDU_S.PH */ |
16809 | }; | |
16810 | ||
16811 | ||
a1465490 | 16812 | static const Pool ADDUH__R__QB[2] = { |
89a955e8 | 16813 | { instruction , 0 , 0 , 32, |
8d416f6b | 16814 | 0xfc0007ff, 0x2000014d, &ADDUH_QB , 0, |
89a955e8 AM |
16815 | DSP_ }, /* ADDUH.QB */ |
16816 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16817 | 0xfc0007ff, 0x2000054d, &ADDUH_R_QB , 0, |
89a955e8 AM |
16818 | DSP_ }, /* ADDUH_R.QB */ |
16819 | }; | |
16820 | ||
16821 | ||
a1465490 | 16822 | static const Pool SHRAV__R__PH[2] = { |
89a955e8 | 16823 | { instruction , 0 , 0 , 32, |
8d416f6b | 16824 | 0xfc0007ff, 0x2000018d, &SHRAV_PH , 0, |
89a955e8 AM |
16825 | DSP_ }, /* SHRAV.PH */ |
16826 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16827 | 0xfc0007ff, 0x2000058d, &SHRAV_R_PH , 0, |
89a955e8 AM |
16828 | DSP_ }, /* SHRAV_R.PH */ |
16829 | }; | |
16830 | ||
16831 | ||
a1465490 | 16832 | static const Pool SHRAV__R__QB[2] = { |
89a955e8 | 16833 | { instruction , 0 , 0 , 32, |
8d416f6b | 16834 | 0xfc0007ff, 0x200001cd, &SHRAV_QB , 0, |
89a955e8 AM |
16835 | DSP_ }, /* SHRAV.QB */ |
16836 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16837 | 0xfc0007ff, 0x200005cd, &SHRAV_R_QB , 0, |
89a955e8 AM |
16838 | DSP_ }, /* SHRAV_R.QB */ |
16839 | }; | |
16840 | ||
16841 | ||
a1465490 | 16842 | static const Pool SUBQ__S__PH[2] = { |
89a955e8 | 16843 | { instruction , 0 , 0 , 32, |
8d416f6b | 16844 | 0xfc0007ff, 0x2000020d, &SUBQ_PH , 0, |
89a955e8 AM |
16845 | DSP_ }, /* SUBQ.PH */ |
16846 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16847 | 0xfc0007ff, 0x2000060d, &SUBQ_S_PH , 0, |
89a955e8 AM |
16848 | DSP_ }, /* SUBQ_S.PH */ |
16849 | }; | |
16850 | ||
16851 | ||
a1465490 | 16852 | static const Pool SUBQH__R__PH[2] = { |
89a955e8 | 16853 | { instruction , 0 , 0 , 32, |
8d416f6b | 16854 | 0xfc0007ff, 0x2000024d, &SUBQH_PH , 0, |
89a955e8 AM |
16855 | DSP_ }, /* SUBQH.PH */ |
16856 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16857 | 0xfc0007ff, 0x2000064d, &SUBQH_R_PH , 0, |
89a955e8 AM |
16858 | DSP_ }, /* SUBQH_R.PH */ |
16859 | }; | |
16860 | ||
16861 | ||
a1465490 | 16862 | static const Pool SUBQH__R__W[2] = { |
89a955e8 | 16863 | { instruction , 0 , 0 , 32, |
8d416f6b | 16864 | 0xfc0007ff, 0x2000028d, &SUBQH_W , 0, |
89a955e8 AM |
16865 | DSP_ }, /* SUBQH.W */ |
16866 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16867 | 0xfc0007ff, 0x2000068d, &SUBQH_R_W , 0, |
89a955e8 AM |
16868 | DSP_ }, /* SUBQH_R.W */ |
16869 | }; | |
16870 | ||
16871 | ||
a1465490 | 16872 | static const Pool SUBU__S__QB[2] = { |
89a955e8 | 16873 | { instruction , 0 , 0 , 32, |
8d416f6b | 16874 | 0xfc0007ff, 0x200002cd, &SUBU_QB , 0, |
89a955e8 AM |
16875 | DSP_ }, /* SUBU.QB */ |
16876 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16877 | 0xfc0007ff, 0x200006cd, &SUBU_S_QB , 0, |
89a955e8 AM |
16878 | DSP_ }, /* SUBU_S.QB */ |
16879 | }; | |
16880 | ||
16881 | ||
a1465490 | 16882 | static const Pool SUBU__S__PH[2] = { |
89a955e8 | 16883 | { instruction , 0 , 0 , 32, |
8d416f6b | 16884 | 0xfc0007ff, 0x2000030d, &SUBU_PH , 0, |
89a955e8 AM |
16885 | DSP_ }, /* SUBU.PH */ |
16886 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16887 | 0xfc0007ff, 0x2000070d, &SUBU_S_PH , 0, |
89a955e8 AM |
16888 | DSP_ }, /* SUBU_S.PH */ |
16889 | }; | |
16890 | ||
16891 | ||
a1465490 | 16892 | static const Pool SHRA__R__PH[2] = { |
89a955e8 | 16893 | { instruction , 0 , 0 , 32, |
8d416f6b | 16894 | 0xfc0007ff, 0x20000335, &SHRA_PH , 0, |
89a955e8 AM |
16895 | DSP_ }, /* SHRA.PH */ |
16896 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16897 | 0xfc0007ff, 0x20000735, &SHRA_R_PH , 0, |
89a955e8 AM |
16898 | DSP_ }, /* SHRA_R.PH */ |
16899 | }; | |
16900 | ||
16901 | ||
a1465490 | 16902 | static const Pool SUBUH__R__QB[2] = { |
89a955e8 | 16903 | { instruction , 0 , 0 , 32, |
8d416f6b | 16904 | 0xfc0007ff, 0x2000034d, &SUBUH_QB , 0, |
89a955e8 AM |
16905 | DSP_ }, /* SUBUH.QB */ |
16906 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16907 | 0xfc0007ff, 0x2000074d, &SUBUH_R_QB , 0, |
89a955e8 AM |
16908 | DSP_ }, /* SUBUH_R.QB */ |
16909 | }; | |
16910 | ||
16911 | ||
a1465490 | 16912 | static const Pool SHLLV__S__PH[2] = { |
89a955e8 | 16913 | { instruction , 0 , 0 , 32, |
8d416f6b | 16914 | 0xfc0007ff, 0x2000038d, &SHLLV_PH , 0, |
89a955e8 AM |
16915 | DSP_ }, /* SHLLV.PH */ |
16916 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16917 | 0xfc0007ff, 0x2000078d, &SHLLV_S_PH , 0, |
89a955e8 AM |
16918 | DSP_ }, /* SHLLV_S.PH */ |
16919 | }; | |
16920 | ||
16921 | ||
a1465490 | 16922 | static const Pool SHLL__S__PH[4] = { |
89a955e8 | 16923 | { instruction , 0 , 0 , 32, |
8d416f6b | 16924 | 0xfc000fff, 0x200003b5, &SHLL_PH , 0, |
89a955e8 AM |
16925 | DSP_ }, /* SHLL.PH */ |
16926 | { reserved_block , 0 , 0 , 32, | |
16927 | 0xfc000fff, 0x200007b5, 0 , 0, | |
16928 | 0x0 }, /* SHLL[_S].PH~*(1) */ | |
16929 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16930 | 0xfc000fff, 0x20000bb5, &SHLL_S_PH , 0, |
89a955e8 AM |
16931 | DSP_ }, /* SHLL_S.PH */ |
16932 | { reserved_block , 0 , 0 , 32, | |
16933 | 0xfc000fff, 0x20000fb5, 0 , 0, | |
16934 | 0x0 }, /* SHLL[_S].PH~*(3) */ | |
16935 | }; | |
16936 | ||
16937 | ||
a1465490 | 16938 | static const Pool PRECR_SRA__R__PH_W[2] = { |
89a955e8 | 16939 | { instruction , 0 , 0 , 32, |
8d416f6b | 16940 | 0xfc0007ff, 0x200003cd, &PRECR_SRA_PH_W , 0, |
89a955e8 AM |
16941 | DSP_ }, /* PRECR_SRA.PH.W */ |
16942 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16943 | 0xfc0007ff, 0x200007cd, &PRECR_SRA_R_PH_W , 0, |
89a955e8 AM |
16944 | DSP_ }, /* PRECR_SRA_R.PH.W */ |
16945 | }; | |
16946 | ||
16947 | ||
a1465490 | 16948 | static const Pool _POOL32A5[128] = { |
89a955e8 | 16949 | { instruction , 0 , 0 , 32, |
8d416f6b | 16950 | 0xfc0003ff, 0x20000005, &CMP_EQ_PH , 0, |
89a955e8 AM |
16951 | DSP_ }, /* CMP.EQ.PH */ |
16952 | { pool , ADDQ__S__PH , 2 , 32, | |
16953 | 0xfc0003ff, 0x2000000d, 0 , 0, | |
16954 | 0x0 }, /* ADDQ[_S].PH */ | |
16955 | { reserved_block , 0 , 0 , 32, | |
16956 | 0xfc0003ff, 0x20000015, 0 , 0, | |
16957 | 0x0 }, /* _POOL32A5~*(2) */ | |
16958 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16959 | 0xfc0003ff, 0x2000001d, &SHILO , 0, |
89a955e8 AM |
16960 | DSP_ }, /* SHILO */ |
16961 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16962 | 0xfc0003ff, 0x20000025, &MULEQ_S_W_PHL , 0, |
89a955e8 AM |
16963 | DSP_ }, /* MULEQ_S.W.PHL */ |
16964 | { pool , MUL__S__PH , 2 , 32, | |
16965 | 0xfc0003ff, 0x2000002d, 0 , 0, | |
16966 | 0x0 }, /* MUL[_S].PH */ | |
16967 | { reserved_block , 0 , 0 , 32, | |
16968 | 0xfc0003ff, 0x20000035, 0 , 0, | |
16969 | 0x0 }, /* _POOL32A5~*(6) */ | |
16970 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16971 | 0xfc0003ff, 0x2000003d, &REPL_PH , 0, |
89a955e8 AM |
16972 | DSP_ }, /* REPL.PH */ |
16973 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16974 | 0xfc0003ff, 0x20000045, &CMP_LT_PH , 0, |
89a955e8 AM |
16975 | DSP_ }, /* CMP.LT.PH */ |
16976 | { pool , ADDQH__R__PH , 2 , 32, | |
16977 | 0xfc0003ff, 0x2000004d, 0 , 0, | |
16978 | 0x0 }, /* ADDQH[_R].PH */ | |
16979 | { reserved_block , 0 , 0 , 32, | |
16980 | 0xfc0003ff, 0x20000055, 0 , 0, | |
16981 | 0x0 }, /* _POOL32A5~*(10) */ | |
16982 | { reserved_block , 0 , 0 , 32, | |
16983 | 0xfc0003ff, 0x2000005d, 0 , 0, | |
16984 | 0x0 }, /* _POOL32A5~*(11) */ | |
16985 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16986 | 0xfc0003ff, 0x20000065, &MULEQ_S_W_PHR , 0, |
89a955e8 AM |
16987 | DSP_ }, /* MULEQ_S.W.PHR */ |
16988 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16989 | 0xfc0003ff, 0x2000006d, &PRECR_QB_PH , 0, |
89a955e8 AM |
16990 | DSP_ }, /* PRECR.QB.PH */ |
16991 | { reserved_block , 0 , 0 , 32, | |
16992 | 0xfc0003ff, 0x20000075, 0 , 0, | |
16993 | 0x0 }, /* _POOL32A5~*(14) */ | |
16994 | { reserved_block , 0 , 0 , 32, | |
16995 | 0xfc0003ff, 0x2000007d, 0 , 0, | |
16996 | 0x0 }, /* _POOL32A5~*(15) */ | |
16997 | { instruction , 0 , 0 , 32, | |
8d416f6b | 16998 | 0xfc0003ff, 0x20000085, &CMP_LE_PH , 0, |
89a955e8 AM |
16999 | DSP_ }, /* CMP.LE.PH */ |
17000 | { pool , ADDQH__R__W , 2 , 32, | |
17001 | 0xfc0003ff, 0x2000008d, 0 , 0, | |
17002 | 0x0 }, /* ADDQH[_R].W */ | |
17003 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17004 | 0xfc0003ff, 0x20000095, &MULEU_S_PH_QBL , 0, |
89a955e8 AM |
17005 | DSP_ }, /* MULEU_S.PH.QBL */ |
17006 | { reserved_block , 0 , 0 , 32, | |
17007 | 0xfc0003ff, 0x2000009d, 0 , 0, | |
17008 | 0x0 }, /* _POOL32A5~*(19) */ | |
17009 | { reserved_block , 0 , 0 , 32, | |
17010 | 0xfc0003ff, 0x200000a5, 0 , 0, | |
17011 | 0x0 }, /* _POOL32A5~*(20) */ | |
17012 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17013 | 0xfc0003ff, 0x200000ad, &PRECRQ_QB_PH , 0, |
89a955e8 AM |
17014 | DSP_ }, /* PRECRQ.QB.PH */ |
17015 | { reserved_block , 0 , 0 , 32, | |
17016 | 0xfc0003ff, 0x200000b5, 0 , 0, | |
17017 | 0x0 }, /* _POOL32A5~*(22) */ | |
17018 | { reserved_block , 0 , 0 , 32, | |
17019 | 0xfc0003ff, 0x200000bd, 0 , 0, | |
17020 | 0x0 }, /* _POOL32A5~*(23) */ | |
17021 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17022 | 0xfc0003ff, 0x200000c5, &CMPGU_EQ_QB , 0, |
89a955e8 AM |
17023 | DSP_ }, /* CMPGU.EQ.QB */ |
17024 | { pool , ADDU__S__QB , 2 , 32, | |
17025 | 0xfc0003ff, 0x200000cd, 0 , 0, | |
17026 | 0x0 }, /* ADDU[_S].QB */ | |
17027 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17028 | 0xfc0003ff, 0x200000d5, &MULEU_S_PH_QBR , 0, |
89a955e8 AM |
17029 | DSP_ }, /* MULEU_S.PH.QBR */ |
17030 | { reserved_block , 0 , 0 , 32, | |
17031 | 0xfc0003ff, 0x200000dd, 0 , 0, | |
17032 | 0x0 }, /* _POOL32A5~*(27) */ | |
17033 | { reserved_block , 0 , 0 , 32, | |
17034 | 0xfc0003ff, 0x200000e5, 0 , 0, | |
17035 | 0x0 }, /* _POOL32A5~*(28) */ | |
17036 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17037 | 0xfc0003ff, 0x200000ed, &PRECRQ_PH_W , 0, |
89a955e8 AM |
17038 | DSP_ }, /* PRECRQ.PH.W */ |
17039 | { reserved_block , 0 , 0 , 32, | |
17040 | 0xfc0003ff, 0x200000f5, 0 , 0, | |
17041 | 0x0 }, /* _POOL32A5~*(30) */ | |
17042 | { reserved_block , 0 , 0 , 32, | |
17043 | 0xfc0003ff, 0x200000fd, 0 , 0, | |
17044 | 0x0 }, /* _POOL32A5~*(31) */ | |
17045 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17046 | 0xfc0003ff, 0x20000105, &CMPGU_LT_QB , 0, |
89a955e8 AM |
17047 | DSP_ }, /* CMPGU.LT.QB */ |
17048 | { pool , ADDU__S__PH , 2 , 32, | |
17049 | 0xfc0003ff, 0x2000010d, 0 , 0, | |
17050 | 0x0 }, /* ADDU[_S].PH */ | |
17051 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17052 | 0xfc0003ff, 0x20000115, &MULQ_RS_PH , 0, |
89a955e8 AM |
17053 | DSP_ }, /* MULQ_RS.PH */ |
17054 | { reserved_block , 0 , 0 , 32, | |
17055 | 0xfc0003ff, 0x2000011d, 0 , 0, | |
17056 | 0x0 }, /* _POOL32A5~*(35) */ | |
17057 | { reserved_block , 0 , 0 , 32, | |
17058 | 0xfc0003ff, 0x20000125, 0 , 0, | |
17059 | 0x0 }, /* _POOL32A5~*(36) */ | |
17060 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17061 | 0xfc0003ff, 0x2000012d, &PRECRQ_RS_PH_W , 0, |
89a955e8 AM |
17062 | DSP_ }, /* PRECRQ_RS.PH.W */ |
17063 | { reserved_block , 0 , 0 , 32, | |
17064 | 0xfc0003ff, 0x20000135, 0 , 0, | |
17065 | 0x0 }, /* _POOL32A5~*(38) */ | |
17066 | { reserved_block , 0 , 0 , 32, | |
17067 | 0xfc0003ff, 0x2000013d, 0 , 0, | |
17068 | 0x0 }, /* _POOL32A5~*(39) */ | |
17069 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17070 | 0xfc0003ff, 0x20000145, &CMPGU_LE_QB , 0, |
89a955e8 AM |
17071 | DSP_ }, /* CMPGU.LE.QB */ |
17072 | { pool , ADDUH__R__QB , 2 , 32, | |
17073 | 0xfc0003ff, 0x2000014d, 0 , 0, | |
17074 | 0x0 }, /* ADDUH[_R].QB */ | |
17075 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17076 | 0xfc0003ff, 0x20000155, &MULQ_S_PH , 0, |
89a955e8 AM |
17077 | DSP_ }, /* MULQ_S.PH */ |
17078 | { reserved_block , 0 , 0 , 32, | |
17079 | 0xfc0003ff, 0x2000015d, 0 , 0, | |
17080 | 0x0 }, /* _POOL32A5~*(43) */ | |
17081 | { reserved_block , 0 , 0 , 32, | |
17082 | 0xfc0003ff, 0x20000165, 0 , 0, | |
17083 | 0x0 }, /* _POOL32A5~*(44) */ | |
17084 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17085 | 0xfc0003ff, 0x2000016d, &PRECRQU_S_QB_PH , 0, |
89a955e8 AM |
17086 | DSP_ }, /* PRECRQU_S.QB.PH */ |
17087 | { reserved_block , 0 , 0 , 32, | |
17088 | 0xfc0003ff, 0x20000175, 0 , 0, | |
17089 | 0x0 }, /* _POOL32A5~*(46) */ | |
17090 | { reserved_block , 0 , 0 , 32, | |
17091 | 0xfc0003ff, 0x2000017d, 0 , 0, | |
17092 | 0x0 }, /* _POOL32A5~*(47) */ | |
17093 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17094 | 0xfc0003ff, 0x20000185, &CMPGDU_EQ_QB , 0, |
89a955e8 AM |
17095 | DSP_ }, /* CMPGDU.EQ.QB */ |
17096 | { pool , SHRAV__R__PH , 2 , 32, | |
17097 | 0xfc0003ff, 0x2000018d, 0 , 0, | |
17098 | 0x0 }, /* SHRAV[_R].PH */ | |
17099 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17100 | 0xfc0003ff, 0x20000195, &MULQ_RS_W , 0, |
89a955e8 AM |
17101 | DSP_ }, /* MULQ_RS.W */ |
17102 | { reserved_block , 0 , 0 , 32, | |
17103 | 0xfc0003ff, 0x2000019d, 0 , 0, | |
17104 | 0x0 }, /* _POOL32A5~*(51) */ | |
17105 | { reserved_block , 0 , 0 , 32, | |
17106 | 0xfc0003ff, 0x200001a5, 0 , 0, | |
17107 | 0x0 }, /* _POOL32A5~*(52) */ | |
17108 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17109 | 0xfc0003ff, 0x200001ad, &PACKRL_PH , 0, |
89a955e8 AM |
17110 | DSP_ }, /* PACKRL.PH */ |
17111 | { reserved_block , 0 , 0 , 32, | |
17112 | 0xfc0003ff, 0x200001b5, 0 , 0, | |
17113 | 0x0 }, /* _POOL32A5~*(54) */ | |
17114 | { reserved_block , 0 , 0 , 32, | |
17115 | 0xfc0003ff, 0x200001bd, 0 , 0, | |
17116 | 0x0 }, /* _POOL32A5~*(55) */ | |
17117 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17118 | 0xfc0003ff, 0x200001c5, &CMPGDU_LT_QB , 0, |
89a955e8 AM |
17119 | DSP_ }, /* CMPGDU.LT.QB */ |
17120 | { pool , SHRAV__R__QB , 2 , 32, | |
17121 | 0xfc0003ff, 0x200001cd, 0 , 0, | |
17122 | 0x0 }, /* SHRAV[_R].QB */ | |
17123 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17124 | 0xfc0003ff, 0x200001d5, &MULQ_S_W , 0, |
89a955e8 AM |
17125 | DSP_ }, /* MULQ_S.W */ |
17126 | { reserved_block , 0 , 0 , 32, | |
17127 | 0xfc0003ff, 0x200001dd, 0 , 0, | |
17128 | 0x0 }, /* _POOL32A5~*(59) */ | |
17129 | { reserved_block , 0 , 0 , 32, | |
17130 | 0xfc0003ff, 0x200001e5, 0 , 0, | |
17131 | 0x0 }, /* _POOL32A5~*(60) */ | |
17132 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17133 | 0xfc0003ff, 0x200001ed, &PICK_QB , 0, |
89a955e8 AM |
17134 | DSP_ }, /* PICK.QB */ |
17135 | { reserved_block , 0 , 0 , 32, | |
17136 | 0xfc0003ff, 0x200001f5, 0 , 0, | |
17137 | 0x0 }, /* _POOL32A5~*(62) */ | |
17138 | { reserved_block , 0 , 0 , 32, | |
17139 | 0xfc0003ff, 0x200001fd, 0 , 0, | |
17140 | 0x0 }, /* _POOL32A5~*(63) */ | |
17141 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17142 | 0xfc0003ff, 0x20000205, &CMPGDU_LE_QB , 0, |
89a955e8 AM |
17143 | DSP_ }, /* CMPGDU.LE.QB */ |
17144 | { pool , SUBQ__S__PH , 2 , 32, | |
17145 | 0xfc0003ff, 0x2000020d, 0 , 0, | |
17146 | 0x0 }, /* SUBQ[_S].PH */ | |
17147 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17148 | 0xfc0003ff, 0x20000215, &APPEND , 0, |
89a955e8 AM |
17149 | DSP_ }, /* APPEND */ |
17150 | { reserved_block , 0 , 0 , 32, | |
17151 | 0xfc0003ff, 0x2000021d, 0 , 0, | |
17152 | 0x0 }, /* _POOL32A5~*(67) */ | |
17153 | { reserved_block , 0 , 0 , 32, | |
17154 | 0xfc0003ff, 0x20000225, 0 , 0, | |
17155 | 0x0 }, /* _POOL32A5~*(68) */ | |
17156 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17157 | 0xfc0003ff, 0x2000022d, &PICK_PH , 0, |
89a955e8 AM |
17158 | DSP_ }, /* PICK.PH */ |
17159 | { reserved_block , 0 , 0 , 32, | |
17160 | 0xfc0003ff, 0x20000235, 0 , 0, | |
17161 | 0x0 }, /* _POOL32A5~*(70) */ | |
17162 | { reserved_block , 0 , 0 , 32, | |
17163 | 0xfc0003ff, 0x2000023d, 0 , 0, | |
17164 | 0x0 }, /* _POOL32A5~*(71) */ | |
17165 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17166 | 0xfc0003ff, 0x20000245, &CMPU_EQ_QB , 0, |
89a955e8 AM |
17167 | DSP_ }, /* CMPU.EQ.QB */ |
17168 | { pool , SUBQH__R__PH , 2 , 32, | |
17169 | 0xfc0003ff, 0x2000024d, 0 , 0, | |
17170 | 0x0 }, /* SUBQH[_R].PH */ | |
17171 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17172 | 0xfc0003ff, 0x20000255, &PREPEND , 0, |
89a955e8 AM |
17173 | DSP_ }, /* PREPEND */ |
17174 | { reserved_block , 0 , 0 , 32, | |
17175 | 0xfc0003ff, 0x2000025d, 0 , 0, | |
17176 | 0x0 }, /* _POOL32A5~*(75) */ | |
17177 | { reserved_block , 0 , 0 , 32, | |
17178 | 0xfc0003ff, 0x20000265, 0 , 0, | |
17179 | 0x0 }, /* _POOL32A5~*(76) */ | |
17180 | { reserved_block , 0 , 0 , 32, | |
17181 | 0xfc0003ff, 0x2000026d, 0 , 0, | |
17182 | 0x0 }, /* _POOL32A5~*(77) */ | |
17183 | { reserved_block , 0 , 0 , 32, | |
17184 | 0xfc0003ff, 0x20000275, 0 , 0, | |
17185 | 0x0 }, /* _POOL32A5~*(78) */ | |
17186 | { reserved_block , 0 , 0 , 32, | |
17187 | 0xfc0003ff, 0x2000027d, 0 , 0, | |
17188 | 0x0 }, /* _POOL32A5~*(79) */ | |
17189 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17190 | 0xfc0003ff, 0x20000285, &CMPU_LT_QB , 0, |
89a955e8 AM |
17191 | DSP_ }, /* CMPU.LT.QB */ |
17192 | { pool , SUBQH__R__W , 2 , 32, | |
17193 | 0xfc0003ff, 0x2000028d, 0 , 0, | |
17194 | 0x0 }, /* SUBQH[_R].W */ | |
17195 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17196 | 0xfc0003ff, 0x20000295, &MODSUB , 0, |
89a955e8 AM |
17197 | DSP_ }, /* MODSUB */ |
17198 | { reserved_block , 0 , 0 , 32, | |
17199 | 0xfc0003ff, 0x2000029d, 0 , 0, | |
17200 | 0x0 }, /* _POOL32A5~*(83) */ | |
17201 | { reserved_block , 0 , 0 , 32, | |
17202 | 0xfc0003ff, 0x200002a5, 0 , 0, | |
17203 | 0x0 }, /* _POOL32A5~*(84) */ | |
17204 | { reserved_block , 0 , 0 , 32, | |
17205 | 0xfc0003ff, 0x200002ad, 0 , 0, | |
17206 | 0x0 }, /* _POOL32A5~*(85) */ | |
17207 | { reserved_block , 0 , 0 , 32, | |
17208 | 0xfc0003ff, 0x200002b5, 0 , 0, | |
17209 | 0x0 }, /* _POOL32A5~*(86) */ | |
17210 | { reserved_block , 0 , 0 , 32, | |
17211 | 0xfc0003ff, 0x200002bd, 0 , 0, | |
17212 | 0x0 }, /* _POOL32A5~*(87) */ | |
17213 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17214 | 0xfc0003ff, 0x200002c5, &CMPU_LE_QB , 0, |
89a955e8 AM |
17215 | DSP_ }, /* CMPU.LE.QB */ |
17216 | { pool , SUBU__S__QB , 2 , 32, | |
17217 | 0xfc0003ff, 0x200002cd, 0 , 0, | |
17218 | 0x0 }, /* SUBU[_S].QB */ | |
17219 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17220 | 0xfc0003ff, 0x200002d5, &SHRAV_R_W , 0, |
89a955e8 AM |
17221 | DSP_ }, /* SHRAV_R.W */ |
17222 | { reserved_block , 0 , 0 , 32, | |
17223 | 0xfc0003ff, 0x200002dd, 0 , 0, | |
17224 | 0x0 }, /* _POOL32A5~*(91) */ | |
17225 | { reserved_block , 0 , 0 , 32, | |
17226 | 0xfc0003ff, 0x200002e5, 0 , 0, | |
17227 | 0x0 }, /* _POOL32A5~*(92) */ | |
17228 | { reserved_block , 0 , 0 , 32, | |
17229 | 0xfc0003ff, 0x200002ed, 0 , 0, | |
17230 | 0x0 }, /* _POOL32A5~*(93) */ | |
17231 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17232 | 0xfc0003ff, 0x200002f5, &SHRA_R_W , 0, |
89a955e8 AM |
17233 | DSP_ }, /* SHRA_R.W */ |
17234 | { reserved_block , 0 , 0 , 32, | |
17235 | 0xfc0003ff, 0x200002fd, 0 , 0, | |
17236 | 0x0 }, /* _POOL32A5~*(95) */ | |
17237 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17238 | 0xfc0003ff, 0x20000305, &ADDQ_S_W , 0, |
89a955e8 AM |
17239 | DSP_ }, /* ADDQ_S.W */ |
17240 | { pool , SUBU__S__PH , 2 , 32, | |
17241 | 0xfc0003ff, 0x2000030d, 0 , 0, | |
17242 | 0x0 }, /* SUBU[_S].PH */ | |
17243 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17244 | 0xfc0003ff, 0x20000315, &SHRLV_PH , 0, |
89a955e8 AM |
17245 | DSP_ }, /* SHRLV.PH */ |
17246 | { reserved_block , 0 , 0 , 32, | |
17247 | 0xfc0003ff, 0x2000031d, 0 , 0, | |
17248 | 0x0 }, /* _POOL32A5~*(99) */ | |
17249 | { reserved_block , 0 , 0 , 32, | |
17250 | 0xfc0003ff, 0x20000325, 0 , 0, | |
17251 | 0x0 }, /* _POOL32A5~*(100) */ | |
17252 | { reserved_block , 0 , 0 , 32, | |
17253 | 0xfc0003ff, 0x2000032d, 0 , 0, | |
17254 | 0x0 }, /* _POOL32A5~*(101) */ | |
17255 | { pool , SHRA__R__PH , 2 , 32, | |
17256 | 0xfc0003ff, 0x20000335, 0 , 0, | |
17257 | 0x0 }, /* SHRA[_R].PH */ | |
17258 | { reserved_block , 0 , 0 , 32, | |
17259 | 0xfc0003ff, 0x2000033d, 0 , 0, | |
17260 | 0x0 }, /* _POOL32A5~*(103) */ | |
17261 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17262 | 0xfc0003ff, 0x20000345, &SUBQ_S_W , 0, |
89a955e8 AM |
17263 | DSP_ }, /* SUBQ_S.W */ |
17264 | { pool , SUBUH__R__QB , 2 , 32, | |
17265 | 0xfc0003ff, 0x2000034d, 0 , 0, | |
17266 | 0x0 }, /* SUBUH[_R].QB */ | |
17267 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17268 | 0xfc0003ff, 0x20000355, &SHRLV_QB , 0, |
89a955e8 AM |
17269 | DSP_ }, /* SHRLV.QB */ |
17270 | { reserved_block , 0 , 0 , 32, | |
17271 | 0xfc0003ff, 0x2000035d, 0 , 0, | |
17272 | 0x0 }, /* _POOL32A5~*(107) */ | |
17273 | { reserved_block , 0 , 0 , 32, | |
17274 | 0xfc0003ff, 0x20000365, 0 , 0, | |
17275 | 0x0 }, /* _POOL32A5~*(108) */ | |
17276 | { reserved_block , 0 , 0 , 32, | |
17277 | 0xfc0003ff, 0x2000036d, 0 , 0, | |
17278 | 0x0 }, /* _POOL32A5~*(109) */ | |
17279 | { reserved_block , 0 , 0 , 32, | |
17280 | 0xfc0003ff, 0x20000375, 0 , 0, | |
17281 | 0x0 }, /* _POOL32A5~*(110) */ | |
17282 | { reserved_block , 0 , 0 , 32, | |
17283 | 0xfc0003ff, 0x2000037d, 0 , 0, | |
17284 | 0x0 }, /* _POOL32A5~*(111) */ | |
17285 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17286 | 0xfc0003ff, 0x20000385, &ADDSC , 0, |
89a955e8 AM |
17287 | DSP_ }, /* ADDSC */ |
17288 | { pool , SHLLV__S__PH , 2 , 32, | |
17289 | 0xfc0003ff, 0x2000038d, 0 , 0, | |
17290 | 0x0 }, /* SHLLV[_S].PH */ | |
17291 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17292 | 0xfc0003ff, 0x20000395, &SHLLV_QB , 0, |
89a955e8 AM |
17293 | DSP_ }, /* SHLLV.QB */ |
17294 | { reserved_block , 0 , 0 , 32, | |
17295 | 0xfc0003ff, 0x2000039d, 0 , 0, | |
17296 | 0x0 }, /* _POOL32A5~*(115) */ | |
17297 | { reserved_block , 0 , 0 , 32, | |
17298 | 0xfc0003ff, 0x200003a5, 0 , 0, | |
17299 | 0x0 }, /* _POOL32A5~*(116) */ | |
17300 | { reserved_block , 0 , 0 , 32, | |
17301 | 0xfc0003ff, 0x200003ad, 0 , 0, | |
17302 | 0x0 }, /* _POOL32A5~*(117) */ | |
17303 | { pool , SHLL__S__PH , 4 , 32, | |
17304 | 0xfc0003ff, 0x200003b5, 0 , 0, | |
17305 | 0x0 }, /* SHLL[_S].PH */ | |
17306 | { reserved_block , 0 , 0 , 32, | |
17307 | 0xfc0003ff, 0x200003bd, 0 , 0, | |
17308 | 0x0 }, /* _POOL32A5~*(119) */ | |
17309 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17310 | 0xfc0003ff, 0x200003c5, &ADDWC , 0, |
89a955e8 AM |
17311 | DSP_ }, /* ADDWC */ |
17312 | { pool , PRECR_SRA__R__PH_W , 2 , 32, | |
17313 | 0xfc0003ff, 0x200003cd, 0 , 0, | |
17314 | 0x0 }, /* PRECR_SRA[_R].PH.W */ | |
17315 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17316 | 0xfc0003ff, 0x200003d5, &SHLLV_S_W , 0, |
89a955e8 AM |
17317 | DSP_ }, /* SHLLV_S.W */ |
17318 | { reserved_block , 0 , 0 , 32, | |
17319 | 0xfc0003ff, 0x200003dd, 0 , 0, | |
17320 | 0x0 }, /* _POOL32A5~*(123) */ | |
17321 | { reserved_block , 0 , 0 , 32, | |
17322 | 0xfc0003ff, 0x200003e5, 0 , 0, | |
17323 | 0x0 }, /* _POOL32A5~*(124) */ | |
17324 | { reserved_block , 0 , 0 , 32, | |
17325 | 0xfc0003ff, 0x200003ed, 0 , 0, | |
17326 | 0x0 }, /* _POOL32A5~*(125) */ | |
17327 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17328 | 0xfc0003ff, 0x200003f5, &SHLL_S_W , 0, |
89a955e8 AM |
17329 | DSP_ }, /* SHLL_S.W */ |
17330 | { reserved_block , 0 , 0 , 32, | |
17331 | 0xfc0003ff, 0x200003fd, 0 , 0, | |
17332 | 0x0 }, /* _POOL32A5~*(127) */ | |
17333 | }; | |
17334 | ||
17335 | ||
a1465490 | 17336 | static const Pool PP_LSX[16] = { |
89a955e8 | 17337 | { instruction , 0 , 0 , 32, |
8d416f6b | 17338 | 0xfc0007ff, 0x20000007, &LBX , 0, |
89a955e8 AM |
17339 | 0x0 }, /* LBX */ |
17340 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17341 | 0xfc0007ff, 0x20000087, &SBX , 0, |
89a955e8 AM |
17342 | XMMS_ }, /* SBX */ |
17343 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17344 | 0xfc0007ff, 0x20000107, &LBUX , 0, |
89a955e8 AM |
17345 | 0x0 }, /* LBUX */ |
17346 | { reserved_block , 0 , 0 , 32, | |
17347 | 0xfc0007ff, 0x20000187, 0 , 0, | |
17348 | 0x0 }, /* PP.LSX~*(3) */ | |
17349 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17350 | 0xfc0007ff, 0x20000207, &LHX , 0, |
89a955e8 AM |
17351 | 0x0 }, /* LHX */ |
17352 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17353 | 0xfc0007ff, 0x20000287, &SHX , 0, |
89a955e8 AM |
17354 | XMMS_ }, /* SHX */ |
17355 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17356 | 0xfc0007ff, 0x20000307, &LHUX , 0, |
89a955e8 AM |
17357 | 0x0 }, /* LHUX */ |
17358 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17359 | 0xfc0007ff, 0x20000387, &LWUX , 0, |
89a955e8 AM |
17360 | MIPS64_ }, /* LWUX */ |
17361 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17362 | 0xfc0007ff, 0x20000407, &LWX , 0, |
89a955e8 AM |
17363 | 0x0 }, /* LWX */ |
17364 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17365 | 0xfc0007ff, 0x20000487, &SWX , 0, |
89a955e8 AM |
17366 | XMMS_ }, /* SWX */ |
17367 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17368 | 0xfc0007ff, 0x20000507, &LWC1X , 0, |
89a955e8 AM |
17369 | CP1_ }, /* LWC1X */ |
17370 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17371 | 0xfc0007ff, 0x20000587, &SWC1X , 0, |
89a955e8 AM |
17372 | CP1_ }, /* SWC1X */ |
17373 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17374 | 0xfc0007ff, 0x20000607, &LDX , 0, |
89a955e8 AM |
17375 | MIPS64_ }, /* LDX */ |
17376 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17377 | 0xfc0007ff, 0x20000687, &SDX , 0, |
89a955e8 AM |
17378 | MIPS64_ }, /* SDX */ |
17379 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17380 | 0xfc0007ff, 0x20000707, &LDC1X , 0, |
89a955e8 AM |
17381 | CP1_ }, /* LDC1X */ |
17382 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17383 | 0xfc0007ff, 0x20000787, &SDC1X , 0, |
89a955e8 AM |
17384 | CP1_ }, /* SDC1X */ |
17385 | }; | |
17386 | ||
17387 | ||
a1465490 | 17388 | static const Pool PP_LSXS[16] = { |
89a955e8 AM |
17389 | { reserved_block , 0 , 0 , 32, |
17390 | 0xfc0007ff, 0x20000047, 0 , 0, | |
17391 | 0x0 }, /* PP.LSXS~*(0) */ | |
17392 | { reserved_block , 0 , 0 , 32, | |
17393 | 0xfc0007ff, 0x200000c7, 0 , 0, | |
17394 | 0x0 }, /* PP.LSXS~*(1) */ | |
17395 | { reserved_block , 0 , 0 , 32, | |
17396 | 0xfc0007ff, 0x20000147, 0 , 0, | |
17397 | 0x0 }, /* PP.LSXS~*(2) */ | |
17398 | { reserved_block , 0 , 0 , 32, | |
17399 | 0xfc0007ff, 0x200001c7, 0 , 0, | |
17400 | 0x0 }, /* PP.LSXS~*(3) */ | |
17401 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17402 | 0xfc0007ff, 0x20000247, &LHXS , 0, |
89a955e8 AM |
17403 | 0x0 }, /* LHXS */ |
17404 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17405 | 0xfc0007ff, 0x200002c7, &SHXS , 0, |
89a955e8 AM |
17406 | XMMS_ }, /* SHXS */ |
17407 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17408 | 0xfc0007ff, 0x20000347, &LHUXS , 0, |
89a955e8 AM |
17409 | 0x0 }, /* LHUXS */ |
17410 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17411 | 0xfc0007ff, 0x200003c7, &LWUXS , 0, |
89a955e8 AM |
17412 | MIPS64_ }, /* LWUXS */ |
17413 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17414 | 0xfc0007ff, 0x20000447, &LWXS_32_ , 0, |
89a955e8 AM |
17415 | 0x0 }, /* LWXS[32] */ |
17416 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17417 | 0xfc0007ff, 0x200004c7, &SWXS , 0, |
89a955e8 AM |
17418 | XMMS_ }, /* SWXS */ |
17419 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17420 | 0xfc0007ff, 0x20000547, &LWC1XS , 0, |
89a955e8 AM |
17421 | CP1_ }, /* LWC1XS */ |
17422 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17423 | 0xfc0007ff, 0x200005c7, &SWC1XS , 0, |
89a955e8 AM |
17424 | CP1_ }, /* SWC1XS */ |
17425 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17426 | 0xfc0007ff, 0x20000647, &LDXS , 0, |
89a955e8 AM |
17427 | MIPS64_ }, /* LDXS */ |
17428 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17429 | 0xfc0007ff, 0x200006c7, &SDXS , 0, |
89a955e8 AM |
17430 | MIPS64_ }, /* SDXS */ |
17431 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17432 | 0xfc0007ff, 0x20000747, &LDC1XS , 0, |
89a955e8 AM |
17433 | CP1_ }, /* LDC1XS */ |
17434 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17435 | 0xfc0007ff, 0x200007c7, &SDC1XS , 0, |
89a955e8 AM |
17436 | CP1_ }, /* SDC1XS */ |
17437 | }; | |
17438 | ||
17439 | ||
a1465490 | 17440 | static const Pool P_LSX[2] = { |
89a955e8 AM |
17441 | { pool , PP_LSX , 16 , 32, |
17442 | 0xfc00007f, 0x20000007, 0 , 0, | |
17443 | 0x0 }, /* PP.LSX */ | |
17444 | { pool , PP_LSXS , 16 , 32, | |
17445 | 0xfc00007f, 0x20000047, 0 , 0, | |
17446 | 0x0 }, /* PP.LSXS */ | |
17447 | }; | |
17448 | ||
17449 | ||
a1465490 | 17450 | static const Pool POOL32Axf_1_0[4] = { |
89a955e8 | 17451 | { instruction , 0 , 0 , 32, |
8d416f6b | 17452 | 0xfc003fff, 0x2000007f, &MFHI_DSP_ , 0, |
89a955e8 AM |
17453 | DSP_ }, /* MFHI[DSP] */ |
17454 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17455 | 0xfc003fff, 0x2000107f, &MFLO_DSP_ , 0, |
89a955e8 AM |
17456 | DSP_ }, /* MFLO[DSP] */ |
17457 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17458 | 0xfc003fff, 0x2000207f, &MTHI_DSP_ , 0, |
89a955e8 AM |
17459 | DSP_ }, /* MTHI[DSP] */ |
17460 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17461 | 0xfc003fff, 0x2000307f, &MTLO_DSP_ , 0, |
89a955e8 AM |
17462 | DSP_ }, /* MTLO[DSP] */ |
17463 | }; | |
17464 | ||
17465 | ||
a1465490 | 17466 | static const Pool POOL32Axf_1_1[4] = { |
89a955e8 | 17467 | { instruction , 0 , 0 , 32, |
8d416f6b | 17468 | 0xfc003fff, 0x2000027f, &MTHLIP , 0, |
89a955e8 AM |
17469 | DSP_ }, /* MTHLIP */ |
17470 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17471 | 0xfc003fff, 0x2000127f, &SHILOV , 0, |
89a955e8 AM |
17472 | DSP_ }, /* SHILOV */ |
17473 | { reserved_block , 0 , 0 , 32, | |
17474 | 0xfc003fff, 0x2000227f, 0 , 0, | |
17475 | 0x0 }, /* POOL32Axf_1_1~*(2) */ | |
17476 | { reserved_block , 0 , 0 , 32, | |
17477 | 0xfc003fff, 0x2000327f, 0 , 0, | |
17478 | 0x0 }, /* POOL32Axf_1_1~*(3) */ | |
17479 | }; | |
17480 | ||
17481 | ||
a1465490 | 17482 | static const Pool POOL32Axf_1_3[4] = { |
89a955e8 | 17483 | { instruction , 0 , 0 , 32, |
8d416f6b | 17484 | 0xfc003fff, 0x2000067f, &RDDSP , 0, |
89a955e8 AM |
17485 | DSP_ }, /* RDDSP */ |
17486 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17487 | 0xfc003fff, 0x2000167f, &WRDSP , 0, |
89a955e8 AM |
17488 | DSP_ }, /* WRDSP */ |
17489 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17490 | 0xfc003fff, 0x2000267f, &EXTP , 0, |
89a955e8 AM |
17491 | DSP_ }, /* EXTP */ |
17492 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17493 | 0xfc003fff, 0x2000367f, &EXTPDP , 0, |
89a955e8 AM |
17494 | DSP_ }, /* EXTPDP */ |
17495 | }; | |
17496 | ||
17497 | ||
a1465490 | 17498 | static const Pool POOL32Axf_1_4[2] = { |
89a955e8 | 17499 | { instruction , 0 , 0 , 32, |
8d416f6b | 17500 | 0xfc001fff, 0x2000087f, &SHLL_QB , 0, |
89a955e8 AM |
17501 | DSP_ }, /* SHLL.QB */ |
17502 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17503 | 0xfc001fff, 0x2000187f, &SHRL_QB , 0, |
89a955e8 AM |
17504 | DSP_ }, /* SHRL.QB */ |
17505 | }; | |
17506 | ||
17507 | ||
a1465490 | 17508 | static const Pool MAQ_S_A__W_PHR[2] = { |
89a955e8 | 17509 | { instruction , 0 , 0 , 32, |
8d416f6b | 17510 | 0xfc003fff, 0x20000a7f, &MAQ_S_W_PHR , 0, |
89a955e8 AM |
17511 | DSP_ }, /* MAQ_S.W.PHR */ |
17512 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17513 | 0xfc003fff, 0x20002a7f, &MAQ_SA_W_PHR , 0, |
89a955e8 AM |
17514 | DSP_ }, /* MAQ_SA.W.PHR */ |
17515 | }; | |
17516 | ||
17517 | ||
a1465490 | 17518 | static const Pool MAQ_S_A__W_PHL[2] = { |
89a955e8 | 17519 | { instruction , 0 , 0 , 32, |
8d416f6b | 17520 | 0xfc003fff, 0x20001a7f, &MAQ_S_W_PHL , 0, |
89a955e8 AM |
17521 | DSP_ }, /* MAQ_S.W.PHL */ |
17522 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17523 | 0xfc003fff, 0x20003a7f, &MAQ_SA_W_PHL , 0, |
89a955e8 AM |
17524 | DSP_ }, /* MAQ_SA.W.PHL */ |
17525 | }; | |
17526 | ||
17527 | ||
a1465490 | 17528 | static const Pool POOL32Axf_1_5[2] = { |
89a955e8 AM |
17529 | { pool , MAQ_S_A__W_PHR , 2 , 32, |
17530 | 0xfc001fff, 0x20000a7f, 0 , 0, | |
17531 | 0x0 }, /* MAQ_S[A].W.PHR */ | |
17532 | { pool , MAQ_S_A__W_PHL , 2 , 32, | |
17533 | 0xfc001fff, 0x20001a7f, 0 , 0, | |
17534 | 0x0 }, /* MAQ_S[A].W.PHL */ | |
17535 | }; | |
17536 | ||
17537 | ||
a1465490 | 17538 | static const Pool POOL32Axf_1_7[4] = { |
89a955e8 | 17539 | { instruction , 0 , 0 , 32, |
8d416f6b | 17540 | 0xfc003fff, 0x20000e7f, &EXTR_W , 0, |
89a955e8 AM |
17541 | DSP_ }, /* EXTR.W */ |
17542 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17543 | 0xfc003fff, 0x20001e7f, &EXTR_R_W , 0, |
89a955e8 AM |
17544 | DSP_ }, /* EXTR_R.W */ |
17545 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17546 | 0xfc003fff, 0x20002e7f, &EXTR_RS_W , 0, |
89a955e8 AM |
17547 | DSP_ }, /* EXTR_RS.W */ |
17548 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17549 | 0xfc003fff, 0x20003e7f, &EXTR_S_H , 0, |
89a955e8 AM |
17550 | DSP_ }, /* EXTR_S.H */ |
17551 | }; | |
17552 | ||
17553 | ||
a1465490 | 17554 | static const Pool POOL32Axf_1[8] = { |
89a955e8 AM |
17555 | { pool , POOL32Axf_1_0 , 4 , 32, |
17556 | 0xfc000fff, 0x2000007f, 0 , 0, | |
17557 | 0x0 }, /* POOL32Axf_1_0 */ | |
17558 | { pool , POOL32Axf_1_1 , 4 , 32, | |
17559 | 0xfc000fff, 0x2000027f, 0 , 0, | |
17560 | 0x0 }, /* POOL32Axf_1_1 */ | |
17561 | { reserved_block , 0 , 0 , 32, | |
17562 | 0xfc000fff, 0x2000047f, 0 , 0, | |
17563 | 0x0 }, /* POOL32Axf_1~*(2) */ | |
17564 | { pool , POOL32Axf_1_3 , 4 , 32, | |
17565 | 0xfc000fff, 0x2000067f, 0 , 0, | |
17566 | 0x0 }, /* POOL32Axf_1_3 */ | |
17567 | { pool , POOL32Axf_1_4 , 2 , 32, | |
17568 | 0xfc000fff, 0x2000087f, 0 , 0, | |
17569 | 0x0 }, /* POOL32Axf_1_4 */ | |
17570 | { pool , POOL32Axf_1_5 , 2 , 32, | |
17571 | 0xfc000fff, 0x20000a7f, 0 , 0, | |
17572 | 0x0 }, /* POOL32Axf_1_5 */ | |
17573 | { reserved_block , 0 , 0 , 32, | |
17574 | 0xfc000fff, 0x20000c7f, 0 , 0, | |
17575 | 0x0 }, /* POOL32Axf_1~*(6) */ | |
17576 | { pool , POOL32Axf_1_7 , 4 , 32, | |
17577 | 0xfc000fff, 0x20000e7f, 0 , 0, | |
17578 | 0x0 }, /* POOL32Axf_1_7 */ | |
17579 | }; | |
17580 | ||
17581 | ||
a1465490 | 17582 | static const Pool POOL32Axf_2_DSP__0_7[8] = { |
89a955e8 | 17583 | { instruction , 0 , 0 , 32, |
8d416f6b | 17584 | 0xfc003fff, 0x200000bf, &DPA_W_PH , 0, |
89a955e8 AM |
17585 | DSP_ }, /* DPA.W.PH */ |
17586 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17587 | 0xfc003fff, 0x200002bf, &DPAQ_S_W_PH , 0, |
89a955e8 AM |
17588 | DSP_ }, /* DPAQ_S.W.PH */ |
17589 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17590 | 0xfc003fff, 0x200004bf, &DPS_W_PH , 0, |
89a955e8 AM |
17591 | DSP_ }, /* DPS.W.PH */ |
17592 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17593 | 0xfc003fff, 0x200006bf, &DPSQ_S_W_PH , 0, |
89a955e8 AM |
17594 | DSP_ }, /* DPSQ_S.W.PH */ |
17595 | { reserved_block , 0 , 0 , 32, | |
17596 | 0xfc003fff, 0x200008bf, 0 , 0, | |
17597 | 0x0 }, /* POOL32Axf_2(DSP)_0_7~*(4) */ | |
17598 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17599 | 0xfc003fff, 0x20000abf, &MADD_DSP_ , 0, |
89a955e8 AM |
17600 | DSP_ }, /* MADD[DSP] */ |
17601 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17602 | 0xfc003fff, 0x20000cbf, &MULT_DSP_ , 0, |
89a955e8 AM |
17603 | DSP_ }, /* MULT[DSP] */ |
17604 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17605 | 0xfc003fff, 0x20000ebf, &EXTRV_W , 0, |
89a955e8 AM |
17606 | DSP_ }, /* EXTRV.W */ |
17607 | }; | |
17608 | ||
17609 | ||
a1465490 | 17610 | static const Pool POOL32Axf_2_DSP__8_15[8] = { |
89a955e8 | 17611 | { instruction , 0 , 0 , 32, |
8d416f6b | 17612 | 0xfc003fff, 0x200010bf, &DPAX_W_PH , 0, |
89a955e8 AM |
17613 | DSP_ }, /* DPAX.W.PH */ |
17614 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17615 | 0xfc003fff, 0x200012bf, &DPAQ_SA_L_W , 0, |
89a955e8 AM |
17616 | DSP_ }, /* DPAQ_SA.L.W */ |
17617 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17618 | 0xfc003fff, 0x200014bf, &DPSX_W_PH , 0, |
89a955e8 AM |
17619 | DSP_ }, /* DPSX.W.PH */ |
17620 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17621 | 0xfc003fff, 0x200016bf, &DPSQ_SA_L_W , 0, |
89a955e8 AM |
17622 | DSP_ }, /* DPSQ_SA.L.W */ |
17623 | { reserved_block , 0 , 0 , 32, | |
17624 | 0xfc003fff, 0x200018bf, 0 , 0, | |
17625 | 0x0 }, /* POOL32Axf_2(DSP)_8_15~*(4) */ | |
17626 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17627 | 0xfc003fff, 0x20001abf, &MADDU_DSP_ , 0, |
89a955e8 AM |
17628 | DSP_ }, /* MADDU[DSP] */ |
17629 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17630 | 0xfc003fff, 0x20001cbf, &MULTU_DSP_ , 0, |
89a955e8 AM |
17631 | DSP_ }, /* MULTU[DSP] */ |
17632 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17633 | 0xfc003fff, 0x20001ebf, &EXTRV_R_W , 0, |
89a955e8 AM |
17634 | DSP_ }, /* EXTRV_R.W */ |
17635 | }; | |
17636 | ||
17637 | ||
a1465490 | 17638 | static const Pool POOL32Axf_2_DSP__16_23[8] = { |
89a955e8 | 17639 | { instruction , 0 , 0 , 32, |
8d416f6b | 17640 | 0xfc003fff, 0x200020bf, &DPAU_H_QBL , 0, |
89a955e8 AM |
17641 | DSP_ }, /* DPAU.H.QBL */ |
17642 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17643 | 0xfc003fff, 0x200022bf, &DPAQX_S_W_PH , 0, |
89a955e8 AM |
17644 | DSP_ }, /* DPAQX_S.W.PH */ |
17645 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17646 | 0xfc003fff, 0x200024bf, &DPSU_H_QBL , 0, |
89a955e8 AM |
17647 | DSP_ }, /* DPSU.H.QBL */ |
17648 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17649 | 0xfc003fff, 0x200026bf, &DPSQX_S_W_PH , 0, |
89a955e8 AM |
17650 | DSP_ }, /* DPSQX_S.W.PH */ |
17651 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17652 | 0xfc003fff, 0x200028bf, &EXTPV , 0, |
89a955e8 AM |
17653 | DSP_ }, /* EXTPV */ |
17654 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17655 | 0xfc003fff, 0x20002abf, &MSUB_DSP_ , 0, |
89a955e8 AM |
17656 | DSP_ }, /* MSUB[DSP] */ |
17657 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17658 | 0xfc003fff, 0x20002cbf, &MULSA_W_PH , 0, |
89a955e8 AM |
17659 | DSP_ }, /* MULSA.W.PH */ |
17660 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17661 | 0xfc003fff, 0x20002ebf, &EXTRV_RS_W , 0, |
89a955e8 AM |
17662 | DSP_ }, /* EXTRV_RS.W */ |
17663 | }; | |
17664 | ||
17665 | ||
a1465490 | 17666 | static const Pool POOL32Axf_2_DSP__24_31[8] = { |
89a955e8 | 17667 | { instruction , 0 , 0 , 32, |
8d416f6b | 17668 | 0xfc003fff, 0x200030bf, &DPAU_H_QBR , 0, |
89a955e8 AM |
17669 | DSP_ }, /* DPAU.H.QBR */ |
17670 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17671 | 0xfc003fff, 0x200032bf, &DPAQX_SA_W_PH , 0, |
89a955e8 AM |
17672 | DSP_ }, /* DPAQX_SA.W.PH */ |
17673 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17674 | 0xfc003fff, 0x200034bf, &DPSU_H_QBR , 0, |
89a955e8 AM |
17675 | DSP_ }, /* DPSU.H.QBR */ |
17676 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17677 | 0xfc003fff, 0x200036bf, &DPSQX_SA_W_PH , 0, |
89a955e8 AM |
17678 | DSP_ }, /* DPSQX_SA.W.PH */ |
17679 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17680 | 0xfc003fff, 0x200038bf, &EXTPDPV , 0, |
89a955e8 AM |
17681 | DSP_ }, /* EXTPDPV */ |
17682 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17683 | 0xfc003fff, 0x20003abf, &MSUBU_DSP_ , 0, |
89a955e8 AM |
17684 | DSP_ }, /* MSUBU[DSP] */ |
17685 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17686 | 0xfc003fff, 0x20003cbf, &MULSAQ_S_W_PH , 0, |
89a955e8 AM |
17687 | DSP_ }, /* MULSAQ_S.W.PH */ |
17688 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17689 | 0xfc003fff, 0x20003ebf, &EXTRV_S_H , 0, |
89a955e8 AM |
17690 | DSP_ }, /* EXTRV_S.H */ |
17691 | }; | |
17692 | ||
17693 | ||
a1465490 | 17694 | static const Pool POOL32Axf_2[4] = { |
89a955e8 AM |
17695 | { pool , POOL32Axf_2_DSP__0_7, 8 , 32, |
17696 | 0xfc0031ff, 0x200000bf, 0 , 0, | |
17697 | 0x0 }, /* POOL32Axf_2(DSP)_0_7 */ | |
17698 | { pool , POOL32Axf_2_DSP__8_15, 8 , 32, | |
17699 | 0xfc0031ff, 0x200010bf, 0 , 0, | |
17700 | 0x0 }, /* POOL32Axf_2(DSP)_8_15 */ | |
17701 | { pool , POOL32Axf_2_DSP__16_23, 8 , 32, | |
17702 | 0xfc0031ff, 0x200020bf, 0 , 0, | |
17703 | 0x0 }, /* POOL32Axf_2(DSP)_16_23 */ | |
17704 | { pool , POOL32Axf_2_DSP__24_31, 8 , 32, | |
17705 | 0xfc0031ff, 0x200030bf, 0 , 0, | |
17706 | 0x0 }, /* POOL32Axf_2(DSP)_24_31 */ | |
17707 | }; | |
17708 | ||
17709 | ||
a1465490 | 17710 | static const Pool POOL32Axf_4[128] = { |
89a955e8 | 17711 | { instruction , 0 , 0 , 32, |
8d416f6b | 17712 | 0xfc00ffff, 0x2000013f, &ABSQ_S_QB , 0, |
89a955e8 AM |
17713 | DSP_ }, /* ABSQ_S.QB */ |
17714 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17715 | 0xfc00ffff, 0x2000033f, &REPLV_PH , 0, |
89a955e8 AM |
17716 | DSP_ }, /* REPLV.PH */ |
17717 | { reserved_block , 0 , 0 , 32, | |
17718 | 0xfc00ffff, 0x2000053f, 0 , 0, | |
17719 | 0x0 }, /* POOL32Axf_4~*(2) */ | |
17720 | { reserved_block , 0 , 0 , 32, | |
17721 | 0xfc00ffff, 0x2000073f, 0 , 0, | |
17722 | 0x0 }, /* POOL32Axf_4~*(3) */ | |
17723 | { reserved_block , 0 , 0 , 32, | |
17724 | 0xfc00ffff, 0x2000093f, 0 , 0, | |
17725 | 0x0 }, /* POOL32Axf_4~*(4) */ | |
17726 | { reserved_block , 0 , 0 , 32, | |
17727 | 0xfc00ffff, 0x20000b3f, 0 , 0, | |
17728 | 0x0 }, /* POOL32Axf_4~*(5) */ | |
17729 | { reserved_block , 0 , 0 , 32, | |
17730 | 0xfc00ffff, 0x20000d3f, 0 , 0, | |
17731 | 0x0 }, /* POOL32Axf_4~*(6) */ | |
17732 | { reserved_block , 0 , 0 , 32, | |
17733 | 0xfc00ffff, 0x20000f3f, 0 , 0, | |
17734 | 0x0 }, /* POOL32Axf_4~*(7) */ | |
17735 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17736 | 0xfc00ffff, 0x2000113f, &ABSQ_S_PH , 0, |
89a955e8 AM |
17737 | DSP_ }, /* ABSQ_S.PH */ |
17738 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17739 | 0xfc00ffff, 0x2000133f, &REPLV_QB , 0, |
89a955e8 AM |
17740 | DSP_ }, /* REPLV.QB */ |
17741 | { reserved_block , 0 , 0 , 32, | |
17742 | 0xfc00ffff, 0x2000153f, 0 , 0, | |
17743 | 0x0 }, /* POOL32Axf_4~*(10) */ | |
17744 | { reserved_block , 0 , 0 , 32, | |
17745 | 0xfc00ffff, 0x2000173f, 0 , 0, | |
17746 | 0x0 }, /* POOL32Axf_4~*(11) */ | |
17747 | { reserved_block , 0 , 0 , 32, | |
17748 | 0xfc00ffff, 0x2000193f, 0 , 0, | |
17749 | 0x0 }, /* POOL32Axf_4~*(12) */ | |
17750 | { reserved_block , 0 , 0 , 32, | |
17751 | 0xfc00ffff, 0x20001b3f, 0 , 0, | |
17752 | 0x0 }, /* POOL32Axf_4~*(13) */ | |
17753 | { reserved_block , 0 , 0 , 32, | |
17754 | 0xfc00ffff, 0x20001d3f, 0 , 0, | |
17755 | 0x0 }, /* POOL32Axf_4~*(14) */ | |
17756 | { reserved_block , 0 , 0 , 32, | |
17757 | 0xfc00ffff, 0x20001f3f, 0 , 0, | |
17758 | 0x0 }, /* POOL32Axf_4~*(15) */ | |
17759 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17760 | 0xfc00ffff, 0x2000213f, &ABSQ_S_W , 0, |
89a955e8 AM |
17761 | DSP_ }, /* ABSQ_S.W */ |
17762 | { reserved_block , 0 , 0 , 32, | |
17763 | 0xfc00ffff, 0x2000233f, 0 , 0, | |
17764 | 0x0 }, /* POOL32Axf_4~*(17) */ | |
17765 | { reserved_block , 0 , 0 , 32, | |
17766 | 0xfc00ffff, 0x2000253f, 0 , 0, | |
17767 | 0x0 }, /* POOL32Axf_4~*(18) */ | |
17768 | { reserved_block , 0 , 0 , 32, | |
17769 | 0xfc00ffff, 0x2000273f, 0 , 0, | |
17770 | 0x0 }, /* POOL32Axf_4~*(19) */ | |
17771 | { reserved_block , 0 , 0 , 32, | |
17772 | 0xfc00ffff, 0x2000293f, 0 , 0, | |
17773 | 0x0 }, /* POOL32Axf_4~*(20) */ | |
17774 | { reserved_block , 0 , 0 , 32, | |
17775 | 0xfc00ffff, 0x20002b3f, 0 , 0, | |
17776 | 0x0 }, /* POOL32Axf_4~*(21) */ | |
17777 | { reserved_block , 0 , 0 , 32, | |
17778 | 0xfc00ffff, 0x20002d3f, 0 , 0, | |
17779 | 0x0 }, /* POOL32Axf_4~*(22) */ | |
17780 | { reserved_block , 0 , 0 , 32, | |
17781 | 0xfc00ffff, 0x20002f3f, 0 , 0, | |
17782 | 0x0 }, /* POOL32Axf_4~*(23) */ | |
17783 | { reserved_block , 0 , 0 , 32, | |
17784 | 0xfc00ffff, 0x2000313f, 0 , 0, | |
17785 | 0x0 }, /* POOL32Axf_4~*(24) */ | |
17786 | { reserved_block , 0 , 0 , 32, | |
17787 | 0xfc00ffff, 0x2000333f, 0 , 0, | |
17788 | 0x0 }, /* POOL32Axf_4~*(25) */ | |
17789 | { reserved_block , 0 , 0 , 32, | |
17790 | 0xfc00ffff, 0x2000353f, 0 , 0, | |
17791 | 0x0 }, /* POOL32Axf_4~*(26) */ | |
17792 | { reserved_block , 0 , 0 , 32, | |
17793 | 0xfc00ffff, 0x2000373f, 0 , 0, | |
17794 | 0x0 }, /* POOL32Axf_4~*(27) */ | |
17795 | { reserved_block , 0 , 0 , 32, | |
17796 | 0xfc00ffff, 0x2000393f, 0 , 0, | |
17797 | 0x0 }, /* POOL32Axf_4~*(28) */ | |
17798 | { reserved_block , 0 , 0 , 32, | |
17799 | 0xfc00ffff, 0x20003b3f, 0 , 0, | |
17800 | 0x0 }, /* POOL32Axf_4~*(29) */ | |
17801 | { reserved_block , 0 , 0 , 32, | |
17802 | 0xfc00ffff, 0x20003d3f, 0 , 0, | |
17803 | 0x0 }, /* POOL32Axf_4~*(30) */ | |
17804 | { reserved_block , 0 , 0 , 32, | |
17805 | 0xfc00ffff, 0x20003f3f, 0 , 0, | |
17806 | 0x0 }, /* POOL32Axf_4~*(31) */ | |
17807 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17808 | 0xfc00ffff, 0x2000413f, &INSV , 0, |
89a955e8 AM |
17809 | DSP_ }, /* INSV */ |
17810 | { reserved_block , 0 , 0 , 32, | |
17811 | 0xfc00ffff, 0x2000433f, 0 , 0, | |
17812 | 0x0 }, /* POOL32Axf_4~*(33) */ | |
17813 | { reserved_block , 0 , 0 , 32, | |
17814 | 0xfc00ffff, 0x2000453f, 0 , 0, | |
17815 | 0x0 }, /* POOL32Axf_4~*(34) */ | |
17816 | { reserved_block , 0 , 0 , 32, | |
17817 | 0xfc00ffff, 0x2000473f, 0 , 0, | |
17818 | 0x0 }, /* POOL32Axf_4~*(35) */ | |
17819 | { reserved_block , 0 , 0 , 32, | |
17820 | 0xfc00ffff, 0x2000493f, 0 , 0, | |
17821 | 0x0 }, /* POOL32Axf_4~*(36) */ | |
17822 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17823 | 0xfc00ffff, 0x20004b3f, &CLO , 0, |
89a955e8 AM |
17824 | XMMS_ }, /* CLO */ |
17825 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17826 | 0xfc00ffff, 0x20004d3f, &MFC2 , 0, |
89a955e8 AM |
17827 | CP2_ }, /* MFC2 */ |
17828 | { reserved_block , 0 , 0 , 32, | |
17829 | 0xfc00ffff, 0x20004f3f, 0 , 0, | |
17830 | 0x0 }, /* POOL32Axf_4~*(39) */ | |
17831 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17832 | 0xfc00ffff, 0x2000513f, &PRECEQ_W_PHL , 0, |
89a955e8 AM |
17833 | DSP_ }, /* PRECEQ.W.PHL */ |
17834 | { reserved_block , 0 , 0 , 32, | |
17835 | 0xfc00ffff, 0x2000533f, 0 , 0, | |
17836 | 0x0 }, /* POOL32Axf_4~*(41) */ | |
17837 | { reserved_block , 0 , 0 , 32, | |
17838 | 0xfc00ffff, 0x2000553f, 0 , 0, | |
17839 | 0x0 }, /* POOL32Axf_4~*(42) */ | |
17840 | { reserved_block , 0 , 0 , 32, | |
17841 | 0xfc00ffff, 0x2000573f, 0 , 0, | |
17842 | 0x0 }, /* POOL32Axf_4~*(43) */ | |
17843 | { reserved_block , 0 , 0 , 32, | |
17844 | 0xfc00ffff, 0x2000593f, 0 , 0, | |
17845 | 0x0 }, /* POOL32Axf_4~*(44) */ | |
17846 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17847 | 0xfc00ffff, 0x20005b3f, &CLZ , 0, |
89a955e8 AM |
17848 | XMMS_ }, /* CLZ */ |
17849 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17850 | 0xfc00ffff, 0x20005d3f, &MTC2 , 0, |
89a955e8 AM |
17851 | CP2_ }, /* MTC2 */ |
17852 | { reserved_block , 0 , 0 , 32, | |
17853 | 0xfc00ffff, 0x20005f3f, 0 , 0, | |
17854 | 0x0 }, /* POOL32Axf_4~*(47) */ | |
17855 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17856 | 0xfc00ffff, 0x2000613f, &PRECEQ_W_PHR , 0, |
89a955e8 AM |
17857 | DSP_ }, /* PRECEQ.W.PHR */ |
17858 | { reserved_block , 0 , 0 , 32, | |
17859 | 0xfc00ffff, 0x2000633f, 0 , 0, | |
17860 | 0x0 }, /* POOL32Axf_4~*(49) */ | |
17861 | { reserved_block , 0 , 0 , 32, | |
17862 | 0xfc00ffff, 0x2000653f, 0 , 0, | |
17863 | 0x0 }, /* POOL32Axf_4~*(50) */ | |
17864 | { reserved_block , 0 , 0 , 32, | |
17865 | 0xfc00ffff, 0x2000673f, 0 , 0, | |
17866 | 0x0 }, /* POOL32Axf_4~*(51) */ | |
17867 | { reserved_block , 0 , 0 , 32, | |
17868 | 0xfc00ffff, 0x2000693f, 0 , 0, | |
17869 | 0x0 }, /* POOL32Axf_4~*(52) */ | |
17870 | { reserved_block , 0 , 0 , 32, | |
17871 | 0xfc00ffff, 0x20006b3f, 0 , 0, | |
17872 | 0x0 }, /* POOL32Axf_4~*(53) */ | |
17873 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17874 | 0xfc00ffff, 0x20006d3f, &DMFC2 , 0, |
89a955e8 AM |
17875 | CP2_ }, /* DMFC2 */ |
17876 | { reserved_block , 0 , 0 , 32, | |
17877 | 0xfc00ffff, 0x20006f3f, 0 , 0, | |
17878 | 0x0 }, /* POOL32Axf_4~*(55) */ | |
17879 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17880 | 0xfc00ffff, 0x2000713f, &PRECEQU_PH_QBL , 0, |
89a955e8 AM |
17881 | DSP_ }, /* PRECEQU.PH.QBL */ |
17882 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17883 | 0xfc00ffff, 0x2000733f, &PRECEQU_PH_QBLA , 0, |
89a955e8 AM |
17884 | DSP_ }, /* PRECEQU.PH.QBLA */ |
17885 | { reserved_block , 0 , 0 , 32, | |
17886 | 0xfc00ffff, 0x2000753f, 0 , 0, | |
17887 | 0x0 }, /* POOL32Axf_4~*(58) */ | |
17888 | { reserved_block , 0 , 0 , 32, | |
17889 | 0xfc00ffff, 0x2000773f, 0 , 0, | |
17890 | 0x0 }, /* POOL32Axf_4~*(59) */ | |
17891 | { reserved_block , 0 , 0 , 32, | |
17892 | 0xfc00ffff, 0x2000793f, 0 , 0, | |
17893 | 0x0 }, /* POOL32Axf_4~*(60) */ | |
17894 | { reserved_block , 0 , 0 , 32, | |
17895 | 0xfc00ffff, 0x20007b3f, 0 , 0, | |
17896 | 0x0 }, /* POOL32Axf_4~*(61) */ | |
17897 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17898 | 0xfc00ffff, 0x20007d3f, &DMTC2 , 0, |
89a955e8 AM |
17899 | CP2_ }, /* DMTC2 */ |
17900 | { reserved_block , 0 , 0 , 32, | |
17901 | 0xfc00ffff, 0x20007f3f, 0 , 0, | |
17902 | 0x0 }, /* POOL32Axf_4~*(63) */ | |
17903 | { reserved_block , 0 , 0 , 32, | |
17904 | 0xfc00ffff, 0x2000813f, 0 , 0, | |
17905 | 0x0 }, /* POOL32Axf_4~*(64) */ | |
17906 | { reserved_block , 0 , 0 , 32, | |
17907 | 0xfc00ffff, 0x2000833f, 0 , 0, | |
17908 | 0x0 }, /* POOL32Axf_4~*(65) */ | |
17909 | { reserved_block , 0 , 0 , 32, | |
17910 | 0xfc00ffff, 0x2000853f, 0 , 0, | |
17911 | 0x0 }, /* POOL32Axf_4~*(66) */ | |
17912 | { reserved_block , 0 , 0 , 32, | |
17913 | 0xfc00ffff, 0x2000873f, 0 , 0, | |
17914 | 0x0 }, /* POOL32Axf_4~*(67) */ | |
17915 | { reserved_block , 0 , 0 , 32, | |
17916 | 0xfc00ffff, 0x2000893f, 0 , 0, | |
17917 | 0x0 }, /* POOL32Axf_4~*(68) */ | |
17918 | { reserved_block , 0 , 0 , 32, | |
17919 | 0xfc00ffff, 0x20008b3f, 0 , 0, | |
17920 | 0x0 }, /* POOL32Axf_4~*(69) */ | |
17921 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17922 | 0xfc00ffff, 0x20008d3f, &MFHC2 , 0, |
89a955e8 AM |
17923 | CP2_ }, /* MFHC2 */ |
17924 | { reserved_block , 0 , 0 , 32, | |
17925 | 0xfc00ffff, 0x20008f3f, 0 , 0, | |
17926 | 0x0 }, /* POOL32Axf_4~*(71) */ | |
17927 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17928 | 0xfc00ffff, 0x2000913f, &PRECEQU_PH_QBR , 0, |
89a955e8 AM |
17929 | DSP_ }, /* PRECEQU.PH.QBR */ |
17930 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17931 | 0xfc00ffff, 0x2000933f, &PRECEQU_PH_QBRA , 0, |
89a955e8 AM |
17932 | DSP_ }, /* PRECEQU.PH.QBRA */ |
17933 | { reserved_block , 0 , 0 , 32, | |
17934 | 0xfc00ffff, 0x2000953f, 0 , 0, | |
17935 | 0x0 }, /* POOL32Axf_4~*(74) */ | |
17936 | { reserved_block , 0 , 0 , 32, | |
17937 | 0xfc00ffff, 0x2000973f, 0 , 0, | |
17938 | 0x0 }, /* POOL32Axf_4~*(75) */ | |
17939 | { reserved_block , 0 , 0 , 32, | |
17940 | 0xfc00ffff, 0x2000993f, 0 , 0, | |
17941 | 0x0 }, /* POOL32Axf_4~*(76) */ | |
17942 | { reserved_block , 0 , 0 , 32, | |
17943 | 0xfc00ffff, 0x20009b3f, 0 , 0, | |
17944 | 0x0 }, /* POOL32Axf_4~*(77) */ | |
17945 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17946 | 0xfc00ffff, 0x20009d3f, &MTHC2 , 0, |
89a955e8 AM |
17947 | CP2_ }, /* MTHC2 */ |
17948 | { reserved_block , 0 , 0 , 32, | |
17949 | 0xfc00ffff, 0x20009f3f, 0 , 0, | |
17950 | 0x0 }, /* POOL32Axf_4~*(79) */ | |
17951 | { reserved_block , 0 , 0 , 32, | |
17952 | 0xfc00ffff, 0x2000a13f, 0 , 0, | |
17953 | 0x0 }, /* POOL32Axf_4~*(80) */ | |
17954 | { reserved_block , 0 , 0 , 32, | |
17955 | 0xfc00ffff, 0x2000a33f, 0 , 0, | |
17956 | 0x0 }, /* POOL32Axf_4~*(81) */ | |
17957 | { reserved_block , 0 , 0 , 32, | |
17958 | 0xfc00ffff, 0x2000a53f, 0 , 0, | |
17959 | 0x0 }, /* POOL32Axf_4~*(82) */ | |
17960 | { reserved_block , 0 , 0 , 32, | |
17961 | 0xfc00ffff, 0x2000a73f, 0 , 0, | |
17962 | 0x0 }, /* POOL32Axf_4~*(83) */ | |
17963 | { reserved_block , 0 , 0 , 32, | |
17964 | 0xfc00ffff, 0x2000a93f, 0 , 0, | |
17965 | 0x0 }, /* POOL32Axf_4~*(84) */ | |
17966 | { reserved_block , 0 , 0 , 32, | |
17967 | 0xfc00ffff, 0x2000ab3f, 0 , 0, | |
17968 | 0x0 }, /* POOL32Axf_4~*(85) */ | |
17969 | { reserved_block , 0 , 0 , 32, | |
17970 | 0xfc00ffff, 0x2000ad3f, 0 , 0, | |
17971 | 0x0 }, /* POOL32Axf_4~*(86) */ | |
17972 | { reserved_block , 0 , 0 , 32, | |
17973 | 0xfc00ffff, 0x2000af3f, 0 , 0, | |
17974 | 0x0 }, /* POOL32Axf_4~*(87) */ | |
17975 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17976 | 0xfc00ffff, 0x2000b13f, &PRECEU_PH_QBL , 0, |
89a955e8 AM |
17977 | DSP_ }, /* PRECEU.PH.QBL */ |
17978 | { instruction , 0 , 0 , 32, | |
8d416f6b | 17979 | 0xfc00ffff, 0x2000b33f, &PRECEU_PH_QBLA , 0, |
89a955e8 AM |
17980 | DSP_ }, /* PRECEU.PH.QBLA */ |
17981 | { reserved_block , 0 , 0 , 32, | |
17982 | 0xfc00ffff, 0x2000b53f, 0 , 0, | |
17983 | 0x0 }, /* POOL32Axf_4~*(90) */ | |
17984 | { reserved_block , 0 , 0 , 32, | |
17985 | 0xfc00ffff, 0x2000b73f, 0 , 0, | |
17986 | 0x0 }, /* POOL32Axf_4~*(91) */ | |
17987 | { reserved_block , 0 , 0 , 32, | |
17988 | 0xfc00ffff, 0x2000b93f, 0 , 0, | |
17989 | 0x0 }, /* POOL32Axf_4~*(92) */ | |
17990 | { reserved_block , 0 , 0 , 32, | |
17991 | 0xfc00ffff, 0x2000bb3f, 0 , 0, | |
17992 | 0x0 }, /* POOL32Axf_4~*(93) */ | |
17993 | { reserved_block , 0 , 0 , 32, | |
17994 | 0xfc00ffff, 0x2000bd3f, 0 , 0, | |
17995 | 0x0 }, /* POOL32Axf_4~*(94) */ | |
17996 | { reserved_block , 0 , 0 , 32, | |
17997 | 0xfc00ffff, 0x2000bf3f, 0 , 0, | |
17998 | 0x0 }, /* POOL32Axf_4~*(95) */ | |
17999 | { reserved_block , 0 , 0 , 32, | |
18000 | 0xfc00ffff, 0x2000c13f, 0 , 0, | |
18001 | 0x0 }, /* POOL32Axf_4~*(96) */ | |
18002 | { reserved_block , 0 , 0 , 32, | |
18003 | 0xfc00ffff, 0x2000c33f, 0 , 0, | |
18004 | 0x0 }, /* POOL32Axf_4~*(97) */ | |
18005 | { reserved_block , 0 , 0 , 32, | |
18006 | 0xfc00ffff, 0x2000c53f, 0 , 0, | |
18007 | 0x0 }, /* POOL32Axf_4~*(98) */ | |
18008 | { reserved_block , 0 , 0 , 32, | |
18009 | 0xfc00ffff, 0x2000c73f, 0 , 0, | |
18010 | 0x0 }, /* POOL32Axf_4~*(99) */ | |
18011 | { reserved_block , 0 , 0 , 32, | |
18012 | 0xfc00ffff, 0x2000c93f, 0 , 0, | |
18013 | 0x0 }, /* POOL32Axf_4~*(100) */ | |
18014 | { reserved_block , 0 , 0 , 32, | |
18015 | 0xfc00ffff, 0x2000cb3f, 0 , 0, | |
18016 | 0x0 }, /* POOL32Axf_4~*(101) */ | |
18017 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18018 | 0xfc00ffff, 0x2000cd3f, &CFC2 , 0, |
89a955e8 AM |
18019 | CP2_ }, /* CFC2 */ |
18020 | { reserved_block , 0 , 0 , 32, | |
18021 | 0xfc00ffff, 0x2000cf3f, 0 , 0, | |
18022 | 0x0 }, /* POOL32Axf_4~*(103) */ | |
18023 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18024 | 0xfc00ffff, 0x2000d13f, &PRECEU_PH_QBR , 0, |
89a955e8 AM |
18025 | DSP_ }, /* PRECEU.PH.QBR */ |
18026 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18027 | 0xfc00ffff, 0x2000d33f, &PRECEU_PH_QBRA , 0, |
89a955e8 AM |
18028 | DSP_ }, /* PRECEU.PH.QBRA */ |
18029 | { reserved_block , 0 , 0 , 32, | |
18030 | 0xfc00ffff, 0x2000d53f, 0 , 0, | |
18031 | 0x0 }, /* POOL32Axf_4~*(106) */ | |
18032 | { reserved_block , 0 , 0 , 32, | |
18033 | 0xfc00ffff, 0x2000d73f, 0 , 0, | |
18034 | 0x0 }, /* POOL32Axf_4~*(107) */ | |
18035 | { reserved_block , 0 , 0 , 32, | |
18036 | 0xfc00ffff, 0x2000d93f, 0 , 0, | |
18037 | 0x0 }, /* POOL32Axf_4~*(108) */ | |
18038 | { reserved_block , 0 , 0 , 32, | |
18039 | 0xfc00ffff, 0x2000db3f, 0 , 0, | |
18040 | 0x0 }, /* POOL32Axf_4~*(109) */ | |
18041 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18042 | 0xfc00ffff, 0x2000dd3f, &CTC2 , 0, |
89a955e8 AM |
18043 | CP2_ }, /* CTC2 */ |
18044 | { reserved_block , 0 , 0 , 32, | |
18045 | 0xfc00ffff, 0x2000df3f, 0 , 0, | |
18046 | 0x0 }, /* POOL32Axf_4~*(111) */ | |
18047 | { reserved_block , 0 , 0 , 32, | |
18048 | 0xfc00ffff, 0x2000e13f, 0 , 0, | |
18049 | 0x0 }, /* POOL32Axf_4~*(112) */ | |
18050 | { reserved_block , 0 , 0 , 32, | |
18051 | 0xfc00ffff, 0x2000e33f, 0 , 0, | |
18052 | 0x0 }, /* POOL32Axf_4~*(113) */ | |
18053 | { reserved_block , 0 , 0 , 32, | |
18054 | 0xfc00ffff, 0x2000e53f, 0 , 0, | |
18055 | 0x0 }, /* POOL32Axf_4~*(114) */ | |
18056 | { reserved_block , 0 , 0 , 32, | |
18057 | 0xfc00ffff, 0x2000e73f, 0 , 0, | |
18058 | 0x0 }, /* POOL32Axf_4~*(115) */ | |
18059 | { reserved_block , 0 , 0 , 32, | |
18060 | 0xfc00ffff, 0x2000e93f, 0 , 0, | |
18061 | 0x0 }, /* POOL32Axf_4~*(116) */ | |
18062 | { reserved_block , 0 , 0 , 32, | |
18063 | 0xfc00ffff, 0x2000eb3f, 0 , 0, | |
18064 | 0x0 }, /* POOL32Axf_4~*(117) */ | |
18065 | { reserved_block , 0 , 0 , 32, | |
18066 | 0xfc00ffff, 0x2000ed3f, 0 , 0, | |
18067 | 0x0 }, /* POOL32Axf_4~*(118) */ | |
18068 | { reserved_block , 0 , 0 , 32, | |
18069 | 0xfc00ffff, 0x2000ef3f, 0 , 0, | |
18070 | 0x0 }, /* POOL32Axf_4~*(119) */ | |
18071 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18072 | 0xfc00ffff, 0x2000f13f, &RADDU_W_QB , 0, |
89a955e8 AM |
18073 | DSP_ }, /* RADDU.W.QB */ |
18074 | { reserved_block , 0 , 0 , 32, | |
18075 | 0xfc00ffff, 0x2000f33f, 0 , 0, | |
18076 | 0x0 }, /* POOL32Axf_4~*(121) */ | |
18077 | { reserved_block , 0 , 0 , 32, | |
18078 | 0xfc00ffff, 0x2000f53f, 0 , 0, | |
18079 | 0x0 }, /* POOL32Axf_4~*(122) */ | |
18080 | { reserved_block , 0 , 0 , 32, | |
18081 | 0xfc00ffff, 0x2000f73f, 0 , 0, | |
18082 | 0x0 }, /* POOL32Axf_4~*(123) */ | |
18083 | { reserved_block , 0 , 0 , 32, | |
18084 | 0xfc00ffff, 0x2000f93f, 0 , 0, | |
18085 | 0x0 }, /* POOL32Axf_4~*(124) */ | |
18086 | { reserved_block , 0 , 0 , 32, | |
18087 | 0xfc00ffff, 0x2000fb3f, 0 , 0, | |
18088 | 0x0 }, /* POOL32Axf_4~*(125) */ | |
18089 | { reserved_block , 0 , 0 , 32, | |
18090 | 0xfc00ffff, 0x2000fd3f, 0 , 0, | |
18091 | 0x0 }, /* POOL32Axf_4~*(126) */ | |
18092 | { reserved_block , 0 , 0 , 32, | |
18093 | 0xfc00ffff, 0x2000ff3f, 0 , 0, | |
18094 | 0x0 }, /* POOL32Axf_4~*(127) */ | |
18095 | }; | |
18096 | ||
18097 | ||
a1465490 | 18098 | static const Pool POOL32Axf_5_group0[32] = { |
89a955e8 | 18099 | { instruction , 0 , 0 , 32, |
8d416f6b | 18100 | 0xfc00ffff, 0x2000017f, &TLBGP , 0, |
89a955e8 AM |
18101 | CP0_ | VZ_ | TLB_ }, /* TLBGP */ |
18102 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18103 | 0xfc00ffff, 0x2000037f, &TLBP , 0, |
89a955e8 AM |
18104 | CP0_ | TLB_ }, /* TLBP */ |
18105 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18106 | 0xfc00ffff, 0x2000057f, &TLBGINV , 0, |
89a955e8 AM |
18107 | CP0_ | VZ_ | TLB_ | TLBINV_}, /* TLBGINV */ |
18108 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18109 | 0xfc00ffff, 0x2000077f, &TLBINV , 0, |
89a955e8 AM |
18110 | CP0_ | TLB_ | TLBINV_}, /* TLBINV */ |
18111 | { reserved_block , 0 , 0 , 32, | |
18112 | 0xfc00ffff, 0x2000097f, 0 , 0, | |
18113 | 0x0 }, /* POOL32Axf_5_group0~*(4) */ | |
18114 | { reserved_block , 0 , 0 , 32, | |
18115 | 0xfc00ffff, 0x20000b7f, 0 , 0, | |
18116 | 0x0 }, /* POOL32Axf_5_group0~*(5) */ | |
18117 | { reserved_block , 0 , 0 , 32, | |
18118 | 0xfc00ffff, 0x20000d7f, 0 , 0, | |
18119 | 0x0 }, /* POOL32Axf_5_group0~*(6) */ | |
18120 | { reserved_block , 0 , 0 , 32, | |
18121 | 0xfc00ffff, 0x20000f7f, 0 , 0, | |
18122 | 0x0 }, /* POOL32Axf_5_group0~*(7) */ | |
18123 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18124 | 0xfc00ffff, 0x2000117f, &TLBGR , 0, |
89a955e8 AM |
18125 | CP0_ | VZ_ | TLB_ }, /* TLBGR */ |
18126 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18127 | 0xfc00ffff, 0x2000137f, &TLBR , 0, |
89a955e8 AM |
18128 | CP0_ | TLB_ }, /* TLBR */ |
18129 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18130 | 0xfc00ffff, 0x2000157f, &TLBGINVF , 0, |
89a955e8 AM |
18131 | CP0_ | VZ_ | TLB_ | TLBINV_}, /* TLBGINVF */ |
18132 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18133 | 0xfc00ffff, 0x2000177f, &TLBINVF , 0, |
89a955e8 AM |
18134 | CP0_ | TLB_ | TLBINV_}, /* TLBINVF */ |
18135 | { reserved_block , 0 , 0 , 32, | |
18136 | 0xfc00ffff, 0x2000197f, 0 , 0, | |
18137 | 0x0 }, /* POOL32Axf_5_group0~*(12) */ | |
18138 | { reserved_block , 0 , 0 , 32, | |
18139 | 0xfc00ffff, 0x20001b7f, 0 , 0, | |
18140 | 0x0 }, /* POOL32Axf_5_group0~*(13) */ | |
18141 | { reserved_block , 0 , 0 , 32, | |
18142 | 0xfc00ffff, 0x20001d7f, 0 , 0, | |
18143 | 0x0 }, /* POOL32Axf_5_group0~*(14) */ | |
18144 | { reserved_block , 0 , 0 , 32, | |
18145 | 0xfc00ffff, 0x20001f7f, 0 , 0, | |
18146 | 0x0 }, /* POOL32Axf_5_group0~*(15) */ | |
18147 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18148 | 0xfc00ffff, 0x2000217f, &TLBGWI , 0, |
89a955e8 AM |
18149 | CP0_ | VZ_ | TLB_ }, /* TLBGWI */ |
18150 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18151 | 0xfc00ffff, 0x2000237f, &TLBWI , 0, |
89a955e8 AM |
18152 | CP0_ | TLB_ }, /* TLBWI */ |
18153 | { reserved_block , 0 , 0 , 32, | |
18154 | 0xfc00ffff, 0x2000257f, 0 , 0, | |
18155 | 0x0 }, /* POOL32Axf_5_group0~*(18) */ | |
18156 | { reserved_block , 0 , 0 , 32, | |
18157 | 0xfc00ffff, 0x2000277f, 0 , 0, | |
18158 | 0x0 }, /* POOL32Axf_5_group0~*(19) */ | |
18159 | { reserved_block , 0 , 0 , 32, | |
18160 | 0xfc00ffff, 0x2000297f, 0 , 0, | |
18161 | 0x0 }, /* POOL32Axf_5_group0~*(20) */ | |
18162 | { reserved_block , 0 , 0 , 32, | |
18163 | 0xfc00ffff, 0x20002b7f, 0 , 0, | |
18164 | 0x0 }, /* POOL32Axf_5_group0~*(21) */ | |
18165 | { reserved_block , 0 , 0 , 32, | |
18166 | 0xfc00ffff, 0x20002d7f, 0 , 0, | |
18167 | 0x0 }, /* POOL32Axf_5_group0~*(22) */ | |
18168 | { reserved_block , 0 , 0 , 32, | |
18169 | 0xfc00ffff, 0x20002f7f, 0 , 0, | |
18170 | 0x0 }, /* POOL32Axf_5_group0~*(23) */ | |
18171 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18172 | 0xfc00ffff, 0x2000317f, &TLBGWR , 0, |
89a955e8 AM |
18173 | CP0_ | VZ_ | TLB_ }, /* TLBGWR */ |
18174 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18175 | 0xfc00ffff, 0x2000337f, &TLBWR , 0, |
89a955e8 AM |
18176 | CP0_ | TLB_ }, /* TLBWR */ |
18177 | { reserved_block , 0 , 0 , 32, | |
18178 | 0xfc00ffff, 0x2000357f, 0 , 0, | |
18179 | 0x0 }, /* POOL32Axf_5_group0~*(26) */ | |
18180 | { reserved_block , 0 , 0 , 32, | |
18181 | 0xfc00ffff, 0x2000377f, 0 , 0, | |
18182 | 0x0 }, /* POOL32Axf_5_group0~*(27) */ | |
18183 | { reserved_block , 0 , 0 , 32, | |
18184 | 0xfc00ffff, 0x2000397f, 0 , 0, | |
18185 | 0x0 }, /* POOL32Axf_5_group0~*(28) */ | |
18186 | { reserved_block , 0 , 0 , 32, | |
18187 | 0xfc00ffff, 0x20003b7f, 0 , 0, | |
18188 | 0x0 }, /* POOL32Axf_5_group0~*(29) */ | |
18189 | { reserved_block , 0 , 0 , 32, | |
18190 | 0xfc00ffff, 0x20003d7f, 0 , 0, | |
18191 | 0x0 }, /* POOL32Axf_5_group0~*(30) */ | |
18192 | { reserved_block , 0 , 0 , 32, | |
18193 | 0xfc00ffff, 0x20003f7f, 0 , 0, | |
18194 | 0x0 }, /* POOL32Axf_5_group0~*(31) */ | |
18195 | }; | |
18196 | ||
18197 | ||
a1465490 | 18198 | static const Pool POOL32Axf_5_group1[32] = { |
89a955e8 AM |
18199 | { reserved_block , 0 , 0 , 32, |
18200 | 0xfc00ffff, 0x2000417f, 0 , 0, | |
18201 | 0x0 }, /* POOL32Axf_5_group1~*(0) */ | |
18202 | { reserved_block , 0 , 0 , 32, | |
18203 | 0xfc00ffff, 0x2000437f, 0 , 0, | |
18204 | 0x0 }, /* POOL32Axf_5_group1~*(1) */ | |
18205 | { reserved_block , 0 , 0 , 32, | |
18206 | 0xfc00ffff, 0x2000457f, 0 , 0, | |
18207 | 0x0 }, /* POOL32Axf_5_group1~*(2) */ | |
18208 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18209 | 0xfc00ffff, 0x2000477f, &DI , 0, |
89a955e8 AM |
18210 | 0x0 }, /* DI */ |
18211 | { reserved_block , 0 , 0 , 32, | |
18212 | 0xfc00ffff, 0x2000497f, 0 , 0, | |
18213 | 0x0 }, /* POOL32Axf_5_group1~*(4) */ | |
18214 | { reserved_block , 0 , 0 , 32, | |
18215 | 0xfc00ffff, 0x20004b7f, 0 , 0, | |
18216 | 0x0 }, /* POOL32Axf_5_group1~*(5) */ | |
18217 | { reserved_block , 0 , 0 , 32, | |
18218 | 0xfc00ffff, 0x20004d7f, 0 , 0, | |
18219 | 0x0 }, /* POOL32Axf_5_group1~*(6) */ | |
18220 | { reserved_block , 0 , 0 , 32, | |
18221 | 0xfc00ffff, 0x20004f7f, 0 , 0, | |
18222 | 0x0 }, /* POOL32Axf_5_group1~*(7) */ | |
18223 | { reserved_block , 0 , 0 , 32, | |
18224 | 0xfc00ffff, 0x2000517f, 0 , 0, | |
18225 | 0x0 }, /* POOL32Axf_5_group1~*(8) */ | |
18226 | { reserved_block , 0 , 0 , 32, | |
18227 | 0xfc00ffff, 0x2000537f, 0 , 0, | |
18228 | 0x0 }, /* POOL32Axf_5_group1~*(9) */ | |
18229 | { reserved_block , 0 , 0 , 32, | |
18230 | 0xfc00ffff, 0x2000557f, 0 , 0, | |
18231 | 0x0 }, /* POOL32Axf_5_group1~*(10) */ | |
18232 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18233 | 0xfc00ffff, 0x2000577f, &EI , 0, |
89a955e8 AM |
18234 | 0x0 }, /* EI */ |
18235 | { reserved_block , 0 , 0 , 32, | |
18236 | 0xfc00ffff, 0x2000597f, 0 , 0, | |
18237 | 0x0 }, /* POOL32Axf_5_group1~*(12) */ | |
18238 | { reserved_block , 0 , 0 , 32, | |
18239 | 0xfc00ffff, 0x20005b7f, 0 , 0, | |
18240 | 0x0 }, /* POOL32Axf_5_group1~*(13) */ | |
18241 | { reserved_block , 0 , 0 , 32, | |
18242 | 0xfc00ffff, 0x20005d7f, 0 , 0, | |
18243 | 0x0 }, /* POOL32Axf_5_group1~*(14) */ | |
18244 | { reserved_block , 0 , 0 , 32, | |
18245 | 0xfc00ffff, 0x20005f7f, 0 , 0, | |
18246 | 0x0 }, /* POOL32Axf_5_group1~*(15) */ | |
18247 | { reserved_block , 0 , 0 , 32, | |
18248 | 0xfc00ffff, 0x2000617f, 0 , 0, | |
18249 | 0x0 }, /* POOL32Axf_5_group1~*(16) */ | |
18250 | { reserved_block , 0 , 0 , 32, | |
18251 | 0xfc00ffff, 0x2000637f, 0 , 0, | |
18252 | 0x0 }, /* POOL32Axf_5_group1~*(17) */ | |
18253 | { reserved_block , 0 , 0 , 32, | |
18254 | 0xfc00ffff, 0x2000657f, 0 , 0, | |
18255 | 0x0 }, /* POOL32Axf_5_group1~*(18) */ | |
18256 | { reserved_block , 0 , 0 , 32, | |
18257 | 0xfc00ffff, 0x2000677f, 0 , 0, | |
18258 | 0x0 }, /* POOL32Axf_5_group1~*(19) */ | |
18259 | { reserved_block , 0 , 0 , 32, | |
18260 | 0xfc00ffff, 0x2000697f, 0 , 0, | |
18261 | 0x0 }, /* POOL32Axf_5_group1~*(20) */ | |
18262 | { reserved_block , 0 , 0 , 32, | |
18263 | 0xfc00ffff, 0x20006b7f, 0 , 0, | |
18264 | 0x0 }, /* POOL32Axf_5_group1~*(21) */ | |
18265 | { reserved_block , 0 , 0 , 32, | |
18266 | 0xfc00ffff, 0x20006d7f, 0 , 0, | |
18267 | 0x0 }, /* POOL32Axf_5_group1~*(22) */ | |
18268 | { reserved_block , 0 , 0 , 32, | |
18269 | 0xfc00ffff, 0x20006f7f, 0 , 0, | |
18270 | 0x0 }, /* POOL32Axf_5_group1~*(23) */ | |
18271 | { reserved_block , 0 , 0 , 32, | |
18272 | 0xfc00ffff, 0x2000717f, 0 , 0, | |
18273 | 0x0 }, /* POOL32Axf_5_group1~*(24) */ | |
18274 | { reserved_block , 0 , 0 , 32, | |
18275 | 0xfc00ffff, 0x2000737f, 0 , 0, | |
18276 | 0x0 }, /* POOL32Axf_5_group1~*(25) */ | |
18277 | { reserved_block , 0 , 0 , 32, | |
18278 | 0xfc00ffff, 0x2000757f, 0 , 0, | |
18279 | 0x0 }, /* POOL32Axf_5_group1~*(26) */ | |
18280 | { reserved_block , 0 , 0 , 32, | |
18281 | 0xfc00ffff, 0x2000777f, 0 , 0, | |
18282 | 0x0 }, /* POOL32Axf_5_group1~*(27) */ | |
18283 | { reserved_block , 0 , 0 , 32, | |
18284 | 0xfc00ffff, 0x2000797f, 0 , 0, | |
18285 | 0x0 }, /* POOL32Axf_5_group1~*(28) */ | |
18286 | { reserved_block , 0 , 0 , 32, | |
18287 | 0xfc00ffff, 0x20007b7f, 0 , 0, | |
18288 | 0x0 }, /* POOL32Axf_5_group1~*(29) */ | |
18289 | { reserved_block , 0 , 0 , 32, | |
18290 | 0xfc00ffff, 0x20007d7f, 0 , 0, | |
18291 | 0x0 }, /* POOL32Axf_5_group1~*(30) */ | |
18292 | { reserved_block , 0 , 0 , 32, | |
18293 | 0xfc00ffff, 0x20007f7f, 0 , 0, | |
18294 | 0x0 }, /* POOL32Axf_5_group1~*(31) */ | |
18295 | }; | |
18296 | ||
18297 | ||
a1465490 | 18298 | static const Pool ERETx[2] = { |
89a955e8 | 18299 | { instruction , 0 , 0 , 32, |
8d416f6b | 18300 | 0xfc01ffff, 0x2000f37f, &ERET , 0, |
89a955e8 AM |
18301 | 0x0 }, /* ERET */ |
18302 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18303 | 0xfc01ffff, 0x2001f37f, &ERETNC , 0, |
89a955e8 AM |
18304 | 0x0 }, /* ERETNC */ |
18305 | }; | |
18306 | ||
18307 | ||
a1465490 | 18308 | static const Pool POOL32Axf_5_group3[32] = { |
89a955e8 AM |
18309 | { reserved_block , 0 , 0 , 32, |
18310 | 0xfc00ffff, 0x2000c17f, 0 , 0, | |
18311 | 0x0 }, /* POOL32Axf_5_group3~*(0) */ | |
18312 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18313 | 0xfc00ffff, 0x2000c37f, &WAIT , 0, |
89a955e8 AM |
18314 | 0x0 }, /* WAIT */ |
18315 | { reserved_block , 0 , 0 , 32, | |
18316 | 0xfc00ffff, 0x2000c57f, 0 , 0, | |
18317 | 0x0 }, /* POOL32Axf_5_group3~*(2) */ | |
18318 | { reserved_block , 0 , 0 , 32, | |
18319 | 0xfc00ffff, 0x2000c77f, 0 , 0, | |
18320 | 0x0 }, /* POOL32Axf_5_group3~*(3) */ | |
18321 | { reserved_block , 0 , 0 , 32, | |
18322 | 0xfc00ffff, 0x2000c97f, 0 , 0, | |
18323 | 0x0 }, /* POOL32Axf_5_group3~*(4) */ | |
18324 | { reserved_block , 0 , 0 , 32, | |
18325 | 0xfc00ffff, 0x2000cb7f, 0 , 0, | |
18326 | 0x0 }, /* POOL32Axf_5_group3~*(5) */ | |
18327 | { reserved_block , 0 , 0 , 32, | |
18328 | 0xfc00ffff, 0x2000cd7f, 0 , 0, | |
18329 | 0x0 }, /* POOL32Axf_5_group3~*(6) */ | |
18330 | { reserved_block , 0 , 0 , 32, | |
18331 | 0xfc00ffff, 0x2000cf7f, 0 , 0, | |
18332 | 0x0 }, /* POOL32Axf_5_group3~*(7) */ | |
18333 | { reserved_block , 0 , 0 , 32, | |
18334 | 0xfc00ffff, 0x2000d17f, 0 , 0, | |
18335 | 0x0 }, /* POOL32Axf_5_group3~*(8) */ | |
18336 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18337 | 0xfc00ffff, 0x2000d37f, &IRET , 0, |
89a955e8 AM |
18338 | MCU_ }, /* IRET */ |
18339 | { reserved_block , 0 , 0 , 32, | |
18340 | 0xfc00ffff, 0x2000d57f, 0 , 0, | |
18341 | 0x0 }, /* POOL32Axf_5_group3~*(10) */ | |
18342 | { reserved_block , 0 , 0 , 32, | |
18343 | 0xfc00ffff, 0x2000d77f, 0 , 0, | |
18344 | 0x0 }, /* POOL32Axf_5_group3~*(11) */ | |
18345 | { reserved_block , 0 , 0 , 32, | |
18346 | 0xfc00ffff, 0x2000d97f, 0 , 0, | |
18347 | 0x0 }, /* POOL32Axf_5_group3~*(12) */ | |
18348 | { reserved_block , 0 , 0 , 32, | |
18349 | 0xfc00ffff, 0x2000db7f, 0 , 0, | |
18350 | 0x0 }, /* POOL32Axf_5_group3~*(13) */ | |
18351 | { reserved_block , 0 , 0 , 32, | |
18352 | 0xfc00ffff, 0x2000dd7f, 0 , 0, | |
18353 | 0x0 }, /* POOL32Axf_5_group3~*(14) */ | |
18354 | { reserved_block , 0 , 0 , 32, | |
18355 | 0xfc00ffff, 0x2000df7f, 0 , 0, | |
18356 | 0x0 }, /* POOL32Axf_5_group3~*(15) */ | |
18357 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18358 | 0xfc00ffff, 0x2000e17f, &RDPGPR , 0, |
89a955e8 AM |
18359 | CP0_ }, /* RDPGPR */ |
18360 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18361 | 0xfc00ffff, 0x2000e37f, &DERET , 0, |
89a955e8 AM |
18362 | EJTAG_ }, /* DERET */ |
18363 | { reserved_block , 0 , 0 , 32, | |
18364 | 0xfc00ffff, 0x2000e57f, 0 , 0, | |
18365 | 0x0 }, /* POOL32Axf_5_group3~*(18) */ | |
18366 | { reserved_block , 0 , 0 , 32, | |
18367 | 0xfc00ffff, 0x2000e77f, 0 , 0, | |
18368 | 0x0 }, /* POOL32Axf_5_group3~*(19) */ | |
18369 | { reserved_block , 0 , 0 , 32, | |
18370 | 0xfc00ffff, 0x2000e97f, 0 , 0, | |
18371 | 0x0 }, /* POOL32Axf_5_group3~*(20) */ | |
18372 | { reserved_block , 0 , 0 , 32, | |
18373 | 0xfc00ffff, 0x2000eb7f, 0 , 0, | |
18374 | 0x0 }, /* POOL32Axf_5_group3~*(21) */ | |
18375 | { reserved_block , 0 , 0 , 32, | |
18376 | 0xfc00ffff, 0x2000ed7f, 0 , 0, | |
18377 | 0x0 }, /* POOL32Axf_5_group3~*(22) */ | |
18378 | { reserved_block , 0 , 0 , 32, | |
18379 | 0xfc00ffff, 0x2000ef7f, 0 , 0, | |
18380 | 0x0 }, /* POOL32Axf_5_group3~*(23) */ | |
18381 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18382 | 0xfc00ffff, 0x2000f17f, &WRPGPR , 0, |
89a955e8 AM |
18383 | CP0_ }, /* WRPGPR */ |
18384 | { pool , ERETx , 2 , 32, | |
18385 | 0xfc00ffff, 0x2000f37f, 0 , 0, | |
18386 | 0x0 }, /* ERETx */ | |
18387 | { reserved_block , 0 , 0 , 32, | |
18388 | 0xfc00ffff, 0x2000f57f, 0 , 0, | |
18389 | 0x0 }, /* POOL32Axf_5_group3~*(26) */ | |
18390 | { reserved_block , 0 , 0 , 32, | |
18391 | 0xfc00ffff, 0x2000f77f, 0 , 0, | |
18392 | 0x0 }, /* POOL32Axf_5_group3~*(27) */ | |
18393 | { reserved_block , 0 , 0 , 32, | |
18394 | 0xfc00ffff, 0x2000f97f, 0 , 0, | |
18395 | 0x0 }, /* POOL32Axf_5_group3~*(28) */ | |
18396 | { reserved_block , 0 , 0 , 32, | |
18397 | 0xfc00ffff, 0x2000fb7f, 0 , 0, | |
18398 | 0x0 }, /* POOL32Axf_5_group3~*(29) */ | |
18399 | { reserved_block , 0 , 0 , 32, | |
18400 | 0xfc00ffff, 0x2000fd7f, 0 , 0, | |
18401 | 0x0 }, /* POOL32Axf_5_group3~*(30) */ | |
18402 | { reserved_block , 0 , 0 , 32, | |
18403 | 0xfc00ffff, 0x2000ff7f, 0 , 0, | |
18404 | 0x0 }, /* POOL32Axf_5_group3~*(31) */ | |
18405 | }; | |
18406 | ||
18407 | ||
a1465490 | 18408 | static const Pool POOL32Axf_5[4] = { |
89a955e8 AM |
18409 | { pool , POOL32Axf_5_group0 , 32 , 32, |
18410 | 0xfc00c1ff, 0x2000017f, 0 , 0, | |
18411 | 0x0 }, /* POOL32Axf_5_group0 */ | |
18412 | { pool , POOL32Axf_5_group1 , 32 , 32, | |
18413 | 0xfc00c1ff, 0x2000417f, 0 , 0, | |
18414 | 0x0 }, /* POOL32Axf_5_group1 */ | |
18415 | { reserved_block , 0 , 0 , 32, | |
18416 | 0xfc00c1ff, 0x2000817f, 0 , 0, | |
18417 | 0x0 }, /* POOL32Axf_5~*(2) */ | |
18418 | { pool , POOL32Axf_5_group3 , 32 , 32, | |
18419 | 0xfc00c1ff, 0x2000c17f, 0 , 0, | |
18420 | 0x0 }, /* POOL32Axf_5_group3 */ | |
18421 | }; | |
18422 | ||
18423 | ||
a1465490 | 18424 | static const Pool SHRA__R__QB[2] = { |
89a955e8 | 18425 | { instruction , 0 , 0 , 32, |
8d416f6b | 18426 | 0xfc001fff, 0x200001ff, &SHRA_QB , 0, |
89a955e8 AM |
18427 | DSP_ }, /* SHRA.QB */ |
18428 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18429 | 0xfc001fff, 0x200011ff, &SHRA_R_QB , 0, |
89a955e8 AM |
18430 | DSP_ }, /* SHRA_R.QB */ |
18431 | }; | |
18432 | ||
18433 | ||
a1465490 | 18434 | static const Pool POOL32Axf_7[8] = { |
89a955e8 AM |
18435 | { pool , SHRA__R__QB , 2 , 32, |
18436 | 0xfc000fff, 0x200001ff, 0 , 0, | |
18437 | 0x0 }, /* SHRA[_R].QB */ | |
18438 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18439 | 0xfc000fff, 0x200003ff, &SHRL_PH , 0, |
89a955e8 AM |
18440 | DSP_ }, /* SHRL.PH */ |
18441 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18442 | 0xfc000fff, 0x200005ff, &REPL_QB , 0, |
89a955e8 AM |
18443 | DSP_ }, /* REPL.QB */ |
18444 | { reserved_block , 0 , 0 , 32, | |
18445 | 0xfc000fff, 0x200007ff, 0 , 0, | |
18446 | 0x0 }, /* POOL32Axf_7~*(3) */ | |
18447 | { reserved_block , 0 , 0 , 32, | |
18448 | 0xfc000fff, 0x200009ff, 0 , 0, | |
18449 | 0x0 }, /* POOL32Axf_7~*(4) */ | |
18450 | { reserved_block , 0 , 0 , 32, | |
18451 | 0xfc000fff, 0x20000bff, 0 , 0, | |
18452 | 0x0 }, /* POOL32Axf_7~*(5) */ | |
18453 | { reserved_block , 0 , 0 , 32, | |
18454 | 0xfc000fff, 0x20000dff, 0 , 0, | |
18455 | 0x0 }, /* POOL32Axf_7~*(6) */ | |
18456 | { reserved_block , 0 , 0 , 32, | |
18457 | 0xfc000fff, 0x20000fff, 0 , 0, | |
18458 | 0x0 }, /* POOL32Axf_7~*(7) */ | |
18459 | }; | |
18460 | ||
18461 | ||
a1465490 | 18462 | static const Pool POOL32Axf[8] = { |
89a955e8 AM |
18463 | { reserved_block , 0 , 0 , 32, |
18464 | 0xfc0001ff, 0x2000003f, 0 , 0, | |
18465 | 0x0 }, /* POOL32Axf~*(0) */ | |
18466 | { pool , POOL32Axf_1 , 8 , 32, | |
18467 | 0xfc0001ff, 0x2000007f, 0 , 0, | |
18468 | 0x0 }, /* POOL32Axf_1 */ | |
18469 | { pool , POOL32Axf_2 , 4 , 32, | |
18470 | 0xfc0001ff, 0x200000bf, 0 , 0, | |
18471 | 0x0 }, /* POOL32Axf_2 */ | |
18472 | { reserved_block , 0 , 0 , 32, | |
18473 | 0xfc0001ff, 0x200000ff, 0 , 0, | |
18474 | 0x0 }, /* POOL32Axf~*(3) */ | |
18475 | { pool , POOL32Axf_4 , 128 , 32, | |
18476 | 0xfc0001ff, 0x2000013f, 0 , 0, | |
18477 | 0x0 }, /* POOL32Axf_4 */ | |
18478 | { pool , POOL32Axf_5 , 4 , 32, | |
18479 | 0xfc0001ff, 0x2000017f, 0 , 0, | |
18480 | 0x0 }, /* POOL32Axf_5 */ | |
18481 | { reserved_block , 0 , 0 , 32, | |
18482 | 0xfc0001ff, 0x200001bf, 0 , 0, | |
18483 | 0x0 }, /* POOL32Axf~*(6) */ | |
18484 | { pool , POOL32Axf_7 , 8 , 32, | |
18485 | 0xfc0001ff, 0x200001ff, 0 , 0, | |
18486 | 0x0 }, /* POOL32Axf_7 */ | |
18487 | }; | |
18488 | ||
18489 | ||
a1465490 | 18490 | static const Pool _POOL32A7[8] = { |
89a955e8 AM |
18491 | { pool , P_LSX , 2 , 32, |
18492 | 0xfc00003f, 0x20000007, 0 , 0, | |
18493 | 0x0 }, /* P.LSX */ | |
18494 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18495 | 0xfc00003f, 0x2000000f, &LSA , 0, |
89a955e8 AM |
18496 | 0x0 }, /* LSA */ |
18497 | { reserved_block , 0 , 0 , 32, | |
18498 | 0xfc00003f, 0x20000017, 0 , 0, | |
18499 | 0x0 }, /* _POOL32A7~*(2) */ | |
18500 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18501 | 0xfc00003f, 0x2000001f, &EXTW , 0, |
89a955e8 AM |
18502 | 0x0 }, /* EXTW */ |
18503 | { reserved_block , 0 , 0 , 32, | |
18504 | 0xfc00003f, 0x20000027, 0 , 0, | |
18505 | 0x0 }, /* _POOL32A7~*(4) */ | |
18506 | { reserved_block , 0 , 0 , 32, | |
18507 | 0xfc00003f, 0x2000002f, 0 , 0, | |
18508 | 0x0 }, /* _POOL32A7~*(5) */ | |
18509 | { reserved_block , 0 , 0 , 32, | |
18510 | 0xfc00003f, 0x20000037, 0 , 0, | |
18511 | 0x0 }, /* _POOL32A7~*(6) */ | |
18512 | { pool , POOL32Axf , 8 , 32, | |
18513 | 0xfc00003f, 0x2000003f, 0 , 0, | |
18514 | 0x0 }, /* POOL32Axf */ | |
18515 | }; | |
18516 | ||
18517 | ||
a1465490 | 18518 | static const Pool P32A[8] = { |
89a955e8 AM |
18519 | { pool , _POOL32A0 , 128 , 32, |
18520 | 0xfc000007, 0x20000000, 0 , 0, | |
18521 | 0x0 }, /* _POOL32A0 */ | |
18522 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18523 | 0xfc000007, 0x20000001, &SPECIAL2 , 0, |
89a955e8 AM |
18524 | UDI_ }, /* SPECIAL2 */ |
18525 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18526 | 0xfc000007, 0x20000002, &COP2_1 , 0, |
89a955e8 AM |
18527 | CP2_ }, /* COP2_1 */ |
18528 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18529 | 0xfc000007, 0x20000003, &UDI , 0, |
89a955e8 AM |
18530 | UDI_ }, /* UDI */ |
18531 | { reserved_block , 0 , 0 , 32, | |
18532 | 0xfc000007, 0x20000004, 0 , 0, | |
18533 | 0x0 }, /* P32A~*(4) */ | |
18534 | { pool , _POOL32A5 , 128 , 32, | |
18535 | 0xfc000007, 0x20000005, 0 , 0, | |
18536 | 0x0 }, /* _POOL32A5 */ | |
18537 | { reserved_block , 0 , 0 , 32, | |
18538 | 0xfc000007, 0x20000006, 0 , 0, | |
18539 | 0x0 }, /* P32A~*(6) */ | |
18540 | { pool , _POOL32A7 , 8 , 32, | |
18541 | 0xfc000007, 0x20000007, 0 , 0, | |
18542 | 0x0 }, /* _POOL32A7 */ | |
18543 | }; | |
18544 | ||
18545 | ||
a1465490 | 18546 | static const Pool P_GP_D[2] = { |
89a955e8 | 18547 | { instruction , 0 , 0 , 32, |
8d416f6b | 18548 | 0xfc000007, 0x40000001, &LD_GP_ , 0, |
89a955e8 AM |
18549 | MIPS64_ }, /* LD[GP] */ |
18550 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18551 | 0xfc000007, 0x40000005, &SD_GP_ , 0, |
89a955e8 AM |
18552 | MIPS64_ }, /* SD[GP] */ |
18553 | }; | |
18554 | ||
18555 | ||
a1465490 | 18556 | static const Pool P_GP_W[4] = { |
89a955e8 | 18557 | { instruction , 0 , 0 , 32, |
8d416f6b | 18558 | 0xfc000003, 0x40000000, &ADDIU_GP_W_ , 0, |
89a955e8 AM |
18559 | 0x0 }, /* ADDIU[GP.W] */ |
18560 | { pool , P_GP_D , 2 , 32, | |
18561 | 0xfc000003, 0x40000001, 0 , 0, | |
18562 | 0x0 }, /* P.GP.D */ | |
18563 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18564 | 0xfc000003, 0x40000002, &LW_GP_ , 0, |
89a955e8 AM |
18565 | 0x0 }, /* LW[GP] */ |
18566 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18567 | 0xfc000003, 0x40000003, &SW_GP_ , 0, |
89a955e8 AM |
18568 | 0x0 }, /* SW[GP] */ |
18569 | }; | |
18570 | ||
18571 | ||
a1465490 | 18572 | static const Pool POOL48I[32] = { |
89a955e8 | 18573 | { instruction , 0 , 0 , 48, |
8d416f6b | 18574 | 0xfc1f00000000ull, 0x600000000000ull, &LI_48_ , 0, |
89a955e8 AM |
18575 | XMMS_ }, /* LI[48] */ |
18576 | { instruction , 0 , 0 , 48, | |
8d416f6b | 18577 | 0xfc1f00000000ull, 0x600100000000ull, &ADDIU_48_ , 0, |
89a955e8 AM |
18578 | XMMS_ }, /* ADDIU[48] */ |
18579 | { instruction , 0 , 0 , 48, | |
8d416f6b | 18580 | 0xfc1f00000000ull, 0x600200000000ull, &ADDIU_GP48_ , 0, |
89a955e8 AM |
18581 | XMMS_ }, /* ADDIU[GP48] */ |
18582 | { instruction , 0 , 0 , 48, | |
8d416f6b | 18583 | 0xfc1f00000000ull, 0x600300000000ull, &ADDIUPC_48_ , 0, |
89a955e8 AM |
18584 | XMMS_ }, /* ADDIUPC[48] */ |
18585 | { reserved_block , 0 , 0 , 48, | |
18586 | 0xfc1f00000000ull, 0x600400000000ull, 0 , 0, | |
18587 | 0x0 }, /* POOL48I~*(4) */ | |
18588 | { reserved_block , 0 , 0 , 48, | |
18589 | 0xfc1f00000000ull, 0x600500000000ull, 0 , 0, | |
18590 | 0x0 }, /* POOL48I~*(5) */ | |
18591 | { reserved_block , 0 , 0 , 48, | |
18592 | 0xfc1f00000000ull, 0x600600000000ull, 0 , 0, | |
18593 | 0x0 }, /* POOL48I~*(6) */ | |
18594 | { reserved_block , 0 , 0 , 48, | |
18595 | 0xfc1f00000000ull, 0x600700000000ull, 0 , 0, | |
18596 | 0x0 }, /* POOL48I~*(7) */ | |
18597 | { reserved_block , 0 , 0 , 48, | |
18598 | 0xfc1f00000000ull, 0x600800000000ull, 0 , 0, | |
18599 | 0x0 }, /* POOL48I~*(8) */ | |
18600 | { reserved_block , 0 , 0 , 48, | |
18601 | 0xfc1f00000000ull, 0x600900000000ull, 0 , 0, | |
18602 | 0x0 }, /* POOL48I~*(9) */ | |
18603 | { reserved_block , 0 , 0 , 48, | |
18604 | 0xfc1f00000000ull, 0x600a00000000ull, 0 , 0, | |
18605 | 0x0 }, /* POOL48I~*(10) */ | |
18606 | { instruction , 0 , 0 , 48, | |
8d416f6b | 18607 | 0xfc1f00000000ull, 0x600b00000000ull, &LWPC_48_ , 0, |
89a955e8 AM |
18608 | XMMS_ }, /* LWPC[48] */ |
18609 | { reserved_block , 0 , 0 , 48, | |
18610 | 0xfc1f00000000ull, 0x600c00000000ull, 0 , 0, | |
18611 | 0x0 }, /* POOL48I~*(12) */ | |
18612 | { reserved_block , 0 , 0 , 48, | |
18613 | 0xfc1f00000000ull, 0x600d00000000ull, 0 , 0, | |
18614 | 0x0 }, /* POOL48I~*(13) */ | |
18615 | { reserved_block , 0 , 0 , 48, | |
18616 | 0xfc1f00000000ull, 0x600e00000000ull, 0 , 0, | |
18617 | 0x0 }, /* POOL48I~*(14) */ | |
18618 | { instruction , 0 , 0 , 48, | |
8d416f6b | 18619 | 0xfc1f00000000ull, 0x600f00000000ull, &SWPC_48_ , 0, |
89a955e8 AM |
18620 | XMMS_ }, /* SWPC[48] */ |
18621 | { reserved_block , 0 , 0 , 48, | |
18622 | 0xfc1f00000000ull, 0x601000000000ull, 0 , 0, | |
18623 | 0x0 }, /* POOL48I~*(16) */ | |
18624 | { instruction , 0 , 0 , 48, | |
8d416f6b | 18625 | 0xfc1f00000000ull, 0x601100000000ull, &DADDIU_48_ , 0, |
89a955e8 AM |
18626 | MIPS64_ }, /* DADDIU[48] */ |
18627 | { reserved_block , 0 , 0 , 48, | |
18628 | 0xfc1f00000000ull, 0x601200000000ull, 0 , 0, | |
18629 | 0x0 }, /* POOL48I~*(18) */ | |
18630 | { reserved_block , 0 , 0 , 48, | |
18631 | 0xfc1f00000000ull, 0x601300000000ull, 0 , 0, | |
18632 | 0x0 }, /* POOL48I~*(19) */ | |
18633 | { instruction , 0 , 0 , 48, | |
8d416f6b | 18634 | 0xfc1f00000000ull, 0x601400000000ull, &DLUI_48_ , 0, |
89a955e8 AM |
18635 | MIPS64_ }, /* DLUI[48] */ |
18636 | { reserved_block , 0 , 0 , 48, | |
18637 | 0xfc1f00000000ull, 0x601500000000ull, 0 , 0, | |
18638 | 0x0 }, /* POOL48I~*(21) */ | |
18639 | { reserved_block , 0 , 0 , 48, | |
18640 | 0xfc1f00000000ull, 0x601600000000ull, 0 , 0, | |
18641 | 0x0 }, /* POOL48I~*(22) */ | |
18642 | { reserved_block , 0 , 0 , 48, | |
18643 | 0xfc1f00000000ull, 0x601700000000ull, 0 , 0, | |
18644 | 0x0 }, /* POOL48I~*(23) */ | |
18645 | { reserved_block , 0 , 0 , 48, | |
18646 | 0xfc1f00000000ull, 0x601800000000ull, 0 , 0, | |
18647 | 0x0 }, /* POOL48I~*(24) */ | |
18648 | { reserved_block , 0 , 0 , 48, | |
18649 | 0xfc1f00000000ull, 0x601900000000ull, 0 , 0, | |
18650 | 0x0 }, /* POOL48I~*(25) */ | |
18651 | { reserved_block , 0 , 0 , 48, | |
18652 | 0xfc1f00000000ull, 0x601a00000000ull, 0 , 0, | |
18653 | 0x0 }, /* POOL48I~*(26) */ | |
18654 | { instruction , 0 , 0 , 48, | |
8d416f6b | 18655 | 0xfc1f00000000ull, 0x601b00000000ull, &LDPC_48_ , 0, |
89a955e8 AM |
18656 | MIPS64_ }, /* LDPC[48] */ |
18657 | { reserved_block , 0 , 0 , 48, | |
18658 | 0xfc1f00000000ull, 0x601c00000000ull, 0 , 0, | |
18659 | 0x0 }, /* POOL48I~*(28) */ | |
18660 | { reserved_block , 0 , 0 , 48, | |
18661 | 0xfc1f00000000ull, 0x601d00000000ull, 0 , 0, | |
18662 | 0x0 }, /* POOL48I~*(29) */ | |
18663 | { reserved_block , 0 , 0 , 48, | |
18664 | 0xfc1f00000000ull, 0x601e00000000ull, 0 , 0, | |
18665 | 0x0 }, /* POOL48I~*(30) */ | |
18666 | { instruction , 0 , 0 , 48, | |
8d416f6b | 18667 | 0xfc1f00000000ull, 0x601f00000000ull, &SDPC_48_ , 0, |
89a955e8 AM |
18668 | MIPS64_ }, /* SDPC[48] */ |
18669 | }; | |
18670 | ||
18671 | ||
a1465490 | 18672 | static const Pool PP_SR[4] = { |
89a955e8 | 18673 | { instruction , 0 , 0 , 32, |
8d416f6b | 18674 | 0xfc10f003, 0x80003000, &SAVE_32_ , 0, |
89a955e8 AM |
18675 | 0x0 }, /* SAVE[32] */ |
18676 | { reserved_block , 0 , 0 , 32, | |
18677 | 0xfc10f003, 0x80003001, 0 , 0, | |
18678 | 0x0 }, /* PP.SR~*(1) */ | |
18679 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18680 | 0xfc10f003, 0x80003002, &RESTORE_32_ , 0, |
89a955e8 AM |
18681 | 0x0 }, /* RESTORE[32] */ |
18682 | { return_instruction , 0 , 0 , 32, | |
8d416f6b | 18683 | 0xfc10f003, 0x80003003, &RESTORE_JRC_32_ , 0, |
89a955e8 AM |
18684 | 0x0 }, /* RESTORE.JRC[32] */ |
18685 | }; | |
18686 | ||
18687 | ||
a1465490 | 18688 | static const Pool P_SR_F[8] = { |
89a955e8 | 18689 | { instruction , 0 , 0 , 32, |
8d416f6b | 18690 | 0xfc10f007, 0x80103000, &SAVEF , 0, |
89a955e8 AM |
18691 | CP1_ }, /* SAVEF */ |
18692 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18693 | 0xfc10f007, 0x80103001, &RESTOREF , 0, |
89a955e8 AM |
18694 | CP1_ }, /* RESTOREF */ |
18695 | { reserved_block , 0 , 0 , 32, | |
18696 | 0xfc10f007, 0x80103002, 0 , 0, | |
18697 | 0x0 }, /* P.SR.F~*(2) */ | |
18698 | { reserved_block , 0 , 0 , 32, | |
18699 | 0xfc10f007, 0x80103003, 0 , 0, | |
18700 | 0x0 }, /* P.SR.F~*(3) */ | |
18701 | { reserved_block , 0 , 0 , 32, | |
18702 | 0xfc10f007, 0x80103004, 0 , 0, | |
18703 | 0x0 }, /* P.SR.F~*(4) */ | |
18704 | { reserved_block , 0 , 0 , 32, | |
18705 | 0xfc10f007, 0x80103005, 0 , 0, | |
18706 | 0x0 }, /* P.SR.F~*(5) */ | |
18707 | { reserved_block , 0 , 0 , 32, | |
18708 | 0xfc10f007, 0x80103006, 0 , 0, | |
18709 | 0x0 }, /* P.SR.F~*(6) */ | |
18710 | { reserved_block , 0 , 0 , 32, | |
18711 | 0xfc10f007, 0x80103007, 0 , 0, | |
18712 | 0x0 }, /* P.SR.F~*(7) */ | |
18713 | }; | |
18714 | ||
18715 | ||
a1465490 | 18716 | static const Pool P_SR[2] = { |
89a955e8 AM |
18717 | { pool , PP_SR , 4 , 32, |
18718 | 0xfc10f000, 0x80003000, 0 , 0, | |
18719 | 0x0 }, /* PP.SR */ | |
18720 | { pool , P_SR_F , 8 , 32, | |
18721 | 0xfc10f000, 0x80103000, 0 , 0, | |
18722 | 0x0 }, /* P.SR.F */ | |
18723 | }; | |
18724 | ||
18725 | ||
a1465490 | 18726 | static const Pool P_SLL[5] = { |
89a955e8 | 18727 | { instruction , 0 , 0 , 32, |
8d416f6b | 18728 | 0xffe0f1ff, 0x8000c000, &NOP_32_ , 0, |
89a955e8 AM |
18729 | 0x0 }, /* NOP[32] */ |
18730 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18731 | 0xffe0f1ff, 0x8000c003, &EHB , 0, |
89a955e8 AM |
18732 | 0x0 }, /* EHB */ |
18733 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18734 | 0xffe0f1ff, 0x8000c005, &PAUSE , 0, |
89a955e8 AM |
18735 | 0x0 }, /* PAUSE */ |
18736 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18737 | 0xffe0f1ff, 0x8000c006, &SYNC , 0, |
89a955e8 AM |
18738 | 0x0 }, /* SYNC */ |
18739 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18740 | 0xfc00f1e0, 0x8000c000, &SLL_32_ , 0, |
89a955e8 AM |
18741 | 0x0 }, /* SLL[32] */ |
18742 | }; | |
18743 | ||
18744 | ||
a1465490 | 18745 | static const Pool P_SHIFT[16] = { |
89a955e8 AM |
18746 | { pool , P_SLL , 5 , 32, |
18747 | 0xfc00f1e0, 0x8000c000, 0 , 0, | |
18748 | 0x0 }, /* P.SLL */ | |
18749 | { reserved_block , 0 , 0 , 32, | |
18750 | 0xfc00f1e0, 0x8000c020, 0 , 0, | |
18751 | 0x0 }, /* P.SHIFT~*(1) */ | |
18752 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18753 | 0xfc00f1e0, 0x8000c040, &SRL_32_ , 0, |
89a955e8 AM |
18754 | 0x0 }, /* SRL[32] */ |
18755 | { reserved_block , 0 , 0 , 32, | |
18756 | 0xfc00f1e0, 0x8000c060, 0 , 0, | |
18757 | 0x0 }, /* P.SHIFT~*(3) */ | |
18758 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18759 | 0xfc00f1e0, 0x8000c080, &SRA , 0, |
89a955e8 AM |
18760 | 0x0 }, /* SRA */ |
18761 | { reserved_block , 0 , 0 , 32, | |
18762 | 0xfc00f1e0, 0x8000c0a0, 0 , 0, | |
18763 | 0x0 }, /* P.SHIFT~*(5) */ | |
18764 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18765 | 0xfc00f1e0, 0x8000c0c0, &ROTR , 0, |
89a955e8 AM |
18766 | 0x0 }, /* ROTR */ |
18767 | { reserved_block , 0 , 0 , 32, | |
18768 | 0xfc00f1e0, 0x8000c0e0, 0 , 0, | |
18769 | 0x0 }, /* P.SHIFT~*(7) */ | |
18770 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18771 | 0xfc00f1e0, 0x8000c100, &DSLL , 0, |
89a955e8 AM |
18772 | MIPS64_ }, /* DSLL */ |
18773 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18774 | 0xfc00f1e0, 0x8000c120, &DSLL32 , 0, |
89a955e8 AM |
18775 | MIPS64_ }, /* DSLL32 */ |
18776 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18777 | 0xfc00f1e0, 0x8000c140, &DSRL , 0, |
89a955e8 AM |
18778 | MIPS64_ }, /* DSRL */ |
18779 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18780 | 0xfc00f1e0, 0x8000c160, &DSRL32 , 0, |
89a955e8 AM |
18781 | MIPS64_ }, /* DSRL32 */ |
18782 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18783 | 0xfc00f1e0, 0x8000c180, &DSRA , 0, |
89a955e8 AM |
18784 | MIPS64_ }, /* DSRA */ |
18785 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18786 | 0xfc00f1e0, 0x8000c1a0, &DSRA32 , 0, |
89a955e8 AM |
18787 | MIPS64_ }, /* DSRA32 */ |
18788 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18789 | 0xfc00f1e0, 0x8000c1c0, &DROTR , 0, |
89a955e8 AM |
18790 | MIPS64_ }, /* DROTR */ |
18791 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18792 | 0xfc00f1e0, 0x8000c1e0, &DROTR32 , 0, |
89a955e8 AM |
18793 | MIPS64_ }, /* DROTR32 */ |
18794 | }; | |
18795 | ||
18796 | ||
a1465490 | 18797 | static const Pool P_ROTX[4] = { |
89a955e8 | 18798 | { instruction , 0 , 0 , 32, |
8d416f6b | 18799 | 0xfc00f820, 0x8000d000, &ROTX , 0, |
89a955e8 AM |
18800 | XMMS_ }, /* ROTX */ |
18801 | { reserved_block , 0 , 0 , 32, | |
18802 | 0xfc00f820, 0x8000d020, 0 , 0, | |
18803 | 0x0 }, /* P.ROTX~*(1) */ | |
18804 | { reserved_block , 0 , 0 , 32, | |
18805 | 0xfc00f820, 0x8000d800, 0 , 0, | |
18806 | 0x0 }, /* P.ROTX~*(2) */ | |
18807 | { reserved_block , 0 , 0 , 32, | |
18808 | 0xfc00f820, 0x8000d820, 0 , 0, | |
18809 | 0x0 }, /* P.ROTX~*(3) */ | |
18810 | }; | |
18811 | ||
18812 | ||
a1465490 | 18813 | static const Pool P_INS[4] = { |
89a955e8 | 18814 | { instruction , 0 , 0 , 32, |
8d416f6b | 18815 | 0xfc00f820, 0x8000e000, &INS , 0, |
89a955e8 AM |
18816 | XMMS_ }, /* INS */ |
18817 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18818 | 0xfc00f820, 0x8000e020, &DINSU , 0, |
89a955e8 AM |
18819 | MIPS64_ }, /* DINSU */ |
18820 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18821 | 0xfc00f820, 0x8000e800, &DINSM , 0, |
89a955e8 AM |
18822 | MIPS64_ }, /* DINSM */ |
18823 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18824 | 0xfc00f820, 0x8000e820, &DINS , 0, |
89a955e8 AM |
18825 | MIPS64_ }, /* DINS */ |
18826 | }; | |
18827 | ||
18828 | ||
a1465490 | 18829 | static const Pool P_EXT[4] = { |
89a955e8 | 18830 | { instruction , 0 , 0 , 32, |
8d416f6b | 18831 | 0xfc00f820, 0x8000f000, &EXT , 0, |
89a955e8 AM |
18832 | XMMS_ }, /* EXT */ |
18833 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18834 | 0xfc00f820, 0x8000f020, &DEXTU , 0, |
89a955e8 AM |
18835 | MIPS64_ }, /* DEXTU */ |
18836 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18837 | 0xfc00f820, 0x8000f800, &DEXTM , 0, |
89a955e8 AM |
18838 | MIPS64_ }, /* DEXTM */ |
18839 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18840 | 0xfc00f820, 0x8000f820, &DEXT , 0, |
89a955e8 AM |
18841 | MIPS64_ }, /* DEXT */ |
18842 | }; | |
18843 | ||
18844 | ||
a1465490 | 18845 | static const Pool P_U12[16] = { |
89a955e8 | 18846 | { instruction , 0 , 0 , 32, |
8d416f6b | 18847 | 0xfc00f000, 0x80000000, &ORI , 0, |
89a955e8 AM |
18848 | 0x0 }, /* ORI */ |
18849 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18850 | 0xfc00f000, 0x80001000, &XORI , 0, |
89a955e8 AM |
18851 | 0x0 }, /* XORI */ |
18852 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18853 | 0xfc00f000, 0x80002000, &ANDI_32_ , 0, |
89a955e8 AM |
18854 | 0x0 }, /* ANDI[32] */ |
18855 | { pool , P_SR , 2 , 32, | |
18856 | 0xfc00f000, 0x80003000, 0 , 0, | |
18857 | 0x0 }, /* P.SR */ | |
18858 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18859 | 0xfc00f000, 0x80004000, &SLTI , 0, |
89a955e8 AM |
18860 | 0x0 }, /* SLTI */ |
18861 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18862 | 0xfc00f000, 0x80005000, &SLTIU , 0, |
89a955e8 AM |
18863 | 0x0 }, /* SLTIU */ |
18864 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18865 | 0xfc00f000, 0x80006000, &SEQI , 0, |
89a955e8 AM |
18866 | 0x0 }, /* SEQI */ |
18867 | { reserved_block , 0 , 0 , 32, | |
18868 | 0xfc00f000, 0x80007000, 0 , 0, | |
18869 | 0x0 }, /* P.U12~*(7) */ | |
18870 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18871 | 0xfc00f000, 0x80008000, &ADDIU_NEG_ , 0, |
89a955e8 AM |
18872 | 0x0 }, /* ADDIU[NEG] */ |
18873 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18874 | 0xfc00f000, 0x80009000, &DADDIU_U12_ , 0, |
89a955e8 AM |
18875 | MIPS64_ }, /* DADDIU[U12] */ |
18876 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18877 | 0xfc00f000, 0x8000a000, &DADDIU_NEG_ , 0, |
89a955e8 AM |
18878 | MIPS64_ }, /* DADDIU[NEG] */ |
18879 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18880 | 0xfc00f000, 0x8000b000, &DROTX , 0, |
89a955e8 AM |
18881 | MIPS64_ }, /* DROTX */ |
18882 | { pool , P_SHIFT , 16 , 32, | |
18883 | 0xfc00f000, 0x8000c000, 0 , 0, | |
18884 | 0x0 }, /* P.SHIFT */ | |
18885 | { pool , P_ROTX , 4 , 32, | |
18886 | 0xfc00f000, 0x8000d000, 0 , 0, | |
18887 | 0x0 }, /* P.ROTX */ | |
18888 | { pool , P_INS , 4 , 32, | |
18889 | 0xfc00f000, 0x8000e000, 0 , 0, | |
18890 | 0x0 }, /* P.INS */ | |
18891 | { pool , P_EXT , 4 , 32, | |
18892 | 0xfc00f000, 0x8000f000, 0 , 0, | |
18893 | 0x0 }, /* P.EXT */ | |
18894 | }; | |
18895 | ||
18896 | ||
a1465490 | 18897 | static const Pool RINT_fmt[2] = { |
89a955e8 | 18898 | { instruction , 0 , 0 , 32, |
8d416f6b | 18899 | 0xfc0003ff, 0xa0000020, &RINT_S , 0, |
89a955e8 AM |
18900 | CP1_ }, /* RINT.S */ |
18901 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18902 | 0xfc0003ff, 0xa0000220, &RINT_D , 0, |
89a955e8 AM |
18903 | CP1_ }, /* RINT.D */ |
18904 | }; | |
18905 | ||
18906 | ||
a1465490 | 18907 | static const Pool ADD_fmt0[2] = { |
89a955e8 | 18908 | { instruction , 0 , 0 , 32, |
8d416f6b | 18909 | 0xfc0003ff, 0xa0000030, &ADD_S , 0, |
89a955e8 AM |
18910 | CP1_ }, /* ADD.S */ |
18911 | { reserved_block , 0 , 0 , 32, | |
18912 | 0xfc0003ff, 0xa0000230, 0 , 0, | |
18913 | CP1_ }, /* ADD.fmt0~*(1) */ | |
18914 | }; | |
18915 | ||
18916 | ||
a1465490 | 18917 | static const Pool SELEQZ_fmt[2] = { |
89a955e8 | 18918 | { instruction , 0 , 0 , 32, |
8d416f6b | 18919 | 0xfc0003ff, 0xa0000038, &SELEQZ_S , 0, |
89a955e8 AM |
18920 | CP1_ }, /* SELEQZ.S */ |
18921 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18922 | 0xfc0003ff, 0xa0000238, &SELEQZ_D , 0, |
89a955e8 AM |
18923 | CP1_ }, /* SELEQZ.D */ |
18924 | }; | |
18925 | ||
18926 | ||
a1465490 | 18927 | static const Pool CLASS_fmt[2] = { |
89a955e8 | 18928 | { instruction , 0 , 0 , 32, |
8d416f6b | 18929 | 0xfc0003ff, 0xa0000060, &CLASS_S , 0, |
89a955e8 AM |
18930 | CP1_ }, /* CLASS.S */ |
18931 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18932 | 0xfc0003ff, 0xa0000260, &CLASS_D , 0, |
89a955e8 AM |
18933 | CP1_ }, /* CLASS.D */ |
18934 | }; | |
18935 | ||
18936 | ||
a1465490 | 18937 | static const Pool SUB_fmt0[2] = { |
89a955e8 | 18938 | { instruction , 0 , 0 , 32, |
8d416f6b | 18939 | 0xfc0003ff, 0xa0000070, &SUB_S , 0, |
89a955e8 AM |
18940 | CP1_ }, /* SUB.S */ |
18941 | { reserved_block , 0 , 0 , 32, | |
18942 | 0xfc0003ff, 0xa0000270, 0 , 0, | |
18943 | CP1_ }, /* SUB.fmt0~*(1) */ | |
18944 | }; | |
18945 | ||
18946 | ||
a1465490 | 18947 | static const Pool SELNEZ_fmt[2] = { |
89a955e8 | 18948 | { instruction , 0 , 0 , 32, |
8d416f6b | 18949 | 0xfc0003ff, 0xa0000078, &SELNEZ_S , 0, |
89a955e8 AM |
18950 | CP1_ }, /* SELNEZ.S */ |
18951 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18952 | 0xfc0003ff, 0xa0000278, &SELNEZ_D , 0, |
89a955e8 AM |
18953 | CP1_ }, /* SELNEZ.D */ |
18954 | }; | |
18955 | ||
18956 | ||
a1465490 | 18957 | static const Pool MUL_fmt0[2] = { |
89a955e8 | 18958 | { instruction , 0 , 0 , 32, |
8d416f6b | 18959 | 0xfc0003ff, 0xa00000b0, &MUL_S , 0, |
89a955e8 AM |
18960 | CP1_ }, /* MUL.S */ |
18961 | { reserved_block , 0 , 0 , 32, | |
18962 | 0xfc0003ff, 0xa00002b0, 0 , 0, | |
18963 | CP1_ }, /* MUL.fmt0~*(1) */ | |
18964 | }; | |
18965 | ||
18966 | ||
a1465490 | 18967 | static const Pool SEL_fmt[2] = { |
89a955e8 | 18968 | { instruction , 0 , 0 , 32, |
8d416f6b | 18969 | 0xfc0003ff, 0xa00000b8, &SEL_S , 0, |
89a955e8 AM |
18970 | CP1_ }, /* SEL.S */ |
18971 | { instruction , 0 , 0 , 32, | |
8d416f6b | 18972 | 0xfc0003ff, 0xa00002b8, &SEL_D , 0, |
89a955e8 AM |
18973 | CP1_ }, /* SEL.D */ |
18974 | }; | |
18975 | ||
18976 | ||
a1465490 | 18977 | static const Pool DIV_fmt0[2] = { |
89a955e8 | 18978 | { instruction , 0 , 0 , 32, |
8d416f6b | 18979 | 0xfc0003ff, 0xa00000f0, &DIV_S , 0, |
89a955e8 AM |
18980 | CP1_ }, /* DIV.S */ |
18981 | { reserved_block , 0 , 0 , 32, | |
18982 | 0xfc0003ff, 0xa00002f0, 0 , 0, | |
18983 | CP1_ }, /* DIV.fmt0~*(1) */ | |
18984 | }; | |
18985 | ||
18986 | ||
a1465490 | 18987 | static const Pool ADD_fmt1[2] = { |
89a955e8 | 18988 | { instruction , 0 , 0 , 32, |
8d416f6b | 18989 | 0xfc0003ff, 0xa0000130, &ADD_D , 0, |
89a955e8 AM |
18990 | CP1_ }, /* ADD.D */ |
18991 | { reserved_block , 0 , 0 , 32, | |
18992 | 0xfc0003ff, 0xa0000330, 0 , 0, | |
18993 | CP1_ }, /* ADD.fmt1~*(1) */ | |
18994 | }; | |
18995 | ||
18996 | ||
a1465490 | 18997 | static const Pool SUB_fmt1[2] = { |
89a955e8 | 18998 | { instruction , 0 , 0 , 32, |
8d416f6b | 18999 | 0xfc0003ff, 0xa0000170, &SUB_D , 0, |
89a955e8 AM |
19000 | CP1_ }, /* SUB.D */ |
19001 | { reserved_block , 0 , 0 , 32, | |
19002 | 0xfc0003ff, 0xa0000370, 0 , 0, | |
19003 | CP1_ }, /* SUB.fmt1~*(1) */ | |
19004 | }; | |
19005 | ||
19006 | ||
a1465490 | 19007 | static const Pool MUL_fmt1[2] = { |
89a955e8 | 19008 | { instruction , 0 , 0 , 32, |
8d416f6b | 19009 | 0xfc0003ff, 0xa00001b0, &MUL_D , 0, |
89a955e8 AM |
19010 | CP1_ }, /* MUL.D */ |
19011 | { reserved_block , 0 , 0 , 32, | |
19012 | 0xfc0003ff, 0xa00003b0, 0 , 0, | |
19013 | CP1_ }, /* MUL.fmt1~*(1) */ | |
19014 | }; | |
19015 | ||
19016 | ||
a1465490 | 19017 | static const Pool MADDF_fmt[2] = { |
89a955e8 | 19018 | { instruction , 0 , 0 , 32, |
8d416f6b | 19019 | 0xfc0003ff, 0xa00001b8, &MADDF_S , 0, |
89a955e8 AM |
19020 | CP1_ }, /* MADDF.S */ |
19021 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19022 | 0xfc0003ff, 0xa00003b8, &MADDF_D , 0, |
89a955e8 AM |
19023 | CP1_ }, /* MADDF.D */ |
19024 | }; | |
19025 | ||
19026 | ||
a1465490 | 19027 | static const Pool DIV_fmt1[2] = { |
89a955e8 | 19028 | { instruction , 0 , 0 , 32, |
8d416f6b | 19029 | 0xfc0003ff, 0xa00001f0, &DIV_D , 0, |
89a955e8 AM |
19030 | CP1_ }, /* DIV.D */ |
19031 | { reserved_block , 0 , 0 , 32, | |
19032 | 0xfc0003ff, 0xa00003f0, 0 , 0, | |
19033 | CP1_ }, /* DIV.fmt1~*(1) */ | |
19034 | }; | |
19035 | ||
19036 | ||
a1465490 | 19037 | static const Pool MSUBF_fmt[2] = { |
89a955e8 | 19038 | { instruction , 0 , 0 , 32, |
8d416f6b | 19039 | 0xfc0003ff, 0xa00001f8, &MSUBF_S , 0, |
89a955e8 AM |
19040 | CP1_ }, /* MSUBF.S */ |
19041 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19042 | 0xfc0003ff, 0xa00003f8, &MSUBF_D , 0, |
89a955e8 AM |
19043 | CP1_ }, /* MSUBF.D */ |
19044 | }; | |
19045 | ||
19046 | ||
a1465490 | 19047 | static const Pool POOL32F_0[64] = { |
89a955e8 AM |
19048 | { reserved_block , 0 , 0 , 32, |
19049 | 0xfc0001ff, 0xa0000000, 0 , 0, | |
19050 | CP1_ }, /* POOL32F_0~*(0) */ | |
19051 | { reserved_block , 0 , 0 , 32, | |
19052 | 0xfc0001ff, 0xa0000008, 0 , 0, | |
19053 | CP1_ }, /* POOL32F_0~*(1) */ | |
19054 | { reserved_block , 0 , 0 , 32, | |
19055 | 0xfc0001ff, 0xa0000010, 0 , 0, | |
19056 | CP1_ }, /* POOL32F_0~*(2) */ | |
19057 | { reserved_block , 0 , 0 , 32, | |
19058 | 0xfc0001ff, 0xa0000018, 0 , 0, | |
19059 | CP1_ }, /* POOL32F_0~*(3) */ | |
19060 | { pool , RINT_fmt , 2 , 32, | |
19061 | 0xfc0001ff, 0xa0000020, 0 , 0, | |
19062 | CP1_ }, /* RINT.fmt */ | |
19063 | { reserved_block , 0 , 0 , 32, | |
19064 | 0xfc0001ff, 0xa0000028, 0 , 0, | |
19065 | CP1_ }, /* POOL32F_0~*(5) */ | |
19066 | { pool , ADD_fmt0 , 2 , 32, | |
19067 | 0xfc0001ff, 0xa0000030, 0 , 0, | |
19068 | CP1_ }, /* ADD.fmt0 */ | |
19069 | { pool , SELEQZ_fmt , 2 , 32, | |
19070 | 0xfc0001ff, 0xa0000038, 0 , 0, | |
19071 | CP1_ }, /* SELEQZ.fmt */ | |
19072 | { reserved_block , 0 , 0 , 32, | |
19073 | 0xfc0001ff, 0xa0000040, 0 , 0, | |
19074 | CP1_ }, /* POOL32F_0~*(8) */ | |
19075 | { reserved_block , 0 , 0 , 32, | |
19076 | 0xfc0001ff, 0xa0000048, 0 , 0, | |
19077 | CP1_ }, /* POOL32F_0~*(9) */ | |
19078 | { reserved_block , 0 , 0 , 32, | |
19079 | 0xfc0001ff, 0xa0000050, 0 , 0, | |
19080 | CP1_ }, /* POOL32F_0~*(10) */ | |
19081 | { reserved_block , 0 , 0 , 32, | |
19082 | 0xfc0001ff, 0xa0000058, 0 , 0, | |
19083 | CP1_ }, /* POOL32F_0~*(11) */ | |
19084 | { pool , CLASS_fmt , 2 , 32, | |
19085 | 0xfc0001ff, 0xa0000060, 0 , 0, | |
19086 | CP1_ }, /* CLASS.fmt */ | |
19087 | { reserved_block , 0 , 0 , 32, | |
19088 | 0xfc0001ff, 0xa0000068, 0 , 0, | |
19089 | CP1_ }, /* POOL32F_0~*(13) */ | |
19090 | { pool , SUB_fmt0 , 2 , 32, | |
19091 | 0xfc0001ff, 0xa0000070, 0 , 0, | |
19092 | CP1_ }, /* SUB.fmt0 */ | |
19093 | { pool , SELNEZ_fmt , 2 , 32, | |
19094 | 0xfc0001ff, 0xa0000078, 0 , 0, | |
19095 | CP1_ }, /* SELNEZ.fmt */ | |
19096 | { reserved_block , 0 , 0 , 32, | |
19097 | 0xfc0001ff, 0xa0000080, 0 , 0, | |
19098 | CP1_ }, /* POOL32F_0~*(16) */ | |
19099 | { reserved_block , 0 , 0 , 32, | |
19100 | 0xfc0001ff, 0xa0000088, 0 , 0, | |
19101 | CP1_ }, /* POOL32F_0~*(17) */ | |
19102 | { reserved_block , 0 , 0 , 32, | |
19103 | 0xfc0001ff, 0xa0000090, 0 , 0, | |
19104 | CP1_ }, /* POOL32F_0~*(18) */ | |
19105 | { reserved_block , 0 , 0 , 32, | |
19106 | 0xfc0001ff, 0xa0000098, 0 , 0, | |
19107 | CP1_ }, /* POOL32F_0~*(19) */ | |
19108 | { reserved_block , 0 , 0 , 32, | |
19109 | 0xfc0001ff, 0xa00000a0, 0 , 0, | |
19110 | CP1_ }, /* POOL32F_0~*(20) */ | |
19111 | { reserved_block , 0 , 0 , 32, | |
19112 | 0xfc0001ff, 0xa00000a8, 0 , 0, | |
19113 | CP1_ }, /* POOL32F_0~*(21) */ | |
19114 | { pool , MUL_fmt0 , 2 , 32, | |
19115 | 0xfc0001ff, 0xa00000b0, 0 , 0, | |
19116 | CP1_ }, /* MUL.fmt0 */ | |
19117 | { pool , SEL_fmt , 2 , 32, | |
19118 | 0xfc0001ff, 0xa00000b8, 0 , 0, | |
19119 | CP1_ }, /* SEL.fmt */ | |
19120 | { reserved_block , 0 , 0 , 32, | |
19121 | 0xfc0001ff, 0xa00000c0, 0 , 0, | |
19122 | CP1_ }, /* POOL32F_0~*(24) */ | |
19123 | { reserved_block , 0 , 0 , 32, | |
19124 | 0xfc0001ff, 0xa00000c8, 0 , 0, | |
19125 | CP1_ }, /* POOL32F_0~*(25) */ | |
19126 | { reserved_block , 0 , 0 , 32, | |
19127 | 0xfc0001ff, 0xa00000d0, 0 , 0, | |
19128 | CP1_ }, /* POOL32F_0~*(26) */ | |
19129 | { reserved_block , 0 , 0 , 32, | |
19130 | 0xfc0001ff, 0xa00000d8, 0 , 0, | |
19131 | CP1_ }, /* POOL32F_0~*(27) */ | |
19132 | { reserved_block , 0 , 0 , 32, | |
19133 | 0xfc0001ff, 0xa00000e0, 0 , 0, | |
19134 | CP1_ }, /* POOL32F_0~*(28) */ | |
19135 | { reserved_block , 0 , 0 , 32, | |
19136 | 0xfc0001ff, 0xa00000e8, 0 , 0, | |
19137 | CP1_ }, /* POOL32F_0~*(29) */ | |
19138 | { pool , DIV_fmt0 , 2 , 32, | |
19139 | 0xfc0001ff, 0xa00000f0, 0 , 0, | |
19140 | CP1_ }, /* DIV.fmt0 */ | |
19141 | { reserved_block , 0 , 0 , 32, | |
19142 | 0xfc0001ff, 0xa00000f8, 0 , 0, | |
19143 | CP1_ }, /* POOL32F_0~*(31) */ | |
19144 | { reserved_block , 0 , 0 , 32, | |
19145 | 0xfc0001ff, 0xa0000100, 0 , 0, | |
19146 | CP1_ }, /* POOL32F_0~*(32) */ | |
19147 | { reserved_block , 0 , 0 , 32, | |
19148 | 0xfc0001ff, 0xa0000108, 0 , 0, | |
19149 | CP1_ }, /* POOL32F_0~*(33) */ | |
19150 | { reserved_block , 0 , 0 , 32, | |
19151 | 0xfc0001ff, 0xa0000110, 0 , 0, | |
19152 | CP1_ }, /* POOL32F_0~*(34) */ | |
19153 | { reserved_block , 0 , 0 , 32, | |
19154 | 0xfc0001ff, 0xa0000118, 0 , 0, | |
19155 | CP1_ }, /* POOL32F_0~*(35) */ | |
19156 | { reserved_block , 0 , 0 , 32, | |
19157 | 0xfc0001ff, 0xa0000120, 0 , 0, | |
19158 | CP1_ }, /* POOL32F_0~*(36) */ | |
19159 | { reserved_block , 0 , 0 , 32, | |
19160 | 0xfc0001ff, 0xa0000128, 0 , 0, | |
19161 | CP1_ }, /* POOL32F_0~*(37) */ | |
19162 | { pool , ADD_fmt1 , 2 , 32, | |
19163 | 0xfc0001ff, 0xa0000130, 0 , 0, | |
19164 | CP1_ }, /* ADD.fmt1 */ | |
19165 | { reserved_block , 0 , 0 , 32, | |
19166 | 0xfc0001ff, 0xa0000138, 0 , 0, | |
19167 | CP1_ }, /* POOL32F_0~*(39) */ | |
19168 | { reserved_block , 0 , 0 , 32, | |
19169 | 0xfc0001ff, 0xa0000140, 0 , 0, | |
19170 | CP1_ }, /* POOL32F_0~*(40) */ | |
19171 | { reserved_block , 0 , 0 , 32, | |
19172 | 0xfc0001ff, 0xa0000148, 0 , 0, | |
19173 | CP1_ }, /* POOL32F_0~*(41) */ | |
19174 | { reserved_block , 0 , 0 , 32, | |
19175 | 0xfc0001ff, 0xa0000150, 0 , 0, | |
19176 | CP1_ }, /* POOL32F_0~*(42) */ | |
19177 | { reserved_block , 0 , 0 , 32, | |
19178 | 0xfc0001ff, 0xa0000158, 0 , 0, | |
19179 | CP1_ }, /* POOL32F_0~*(43) */ | |
19180 | { reserved_block , 0 , 0 , 32, | |
19181 | 0xfc0001ff, 0xa0000160, 0 , 0, | |
19182 | CP1_ }, /* POOL32F_0~*(44) */ | |
19183 | { reserved_block , 0 , 0 , 32, | |
19184 | 0xfc0001ff, 0xa0000168, 0 , 0, | |
19185 | CP1_ }, /* POOL32F_0~*(45) */ | |
19186 | { pool , SUB_fmt1 , 2 , 32, | |
19187 | 0xfc0001ff, 0xa0000170, 0 , 0, | |
19188 | CP1_ }, /* SUB.fmt1 */ | |
19189 | { reserved_block , 0 , 0 , 32, | |
19190 | 0xfc0001ff, 0xa0000178, 0 , 0, | |
19191 | CP1_ }, /* POOL32F_0~*(47) */ | |
19192 | { reserved_block , 0 , 0 , 32, | |
19193 | 0xfc0001ff, 0xa0000180, 0 , 0, | |
19194 | CP1_ }, /* POOL32F_0~*(48) */ | |
19195 | { reserved_block , 0 , 0 , 32, | |
19196 | 0xfc0001ff, 0xa0000188, 0 , 0, | |
19197 | CP1_ }, /* POOL32F_0~*(49) */ | |
19198 | { reserved_block , 0 , 0 , 32, | |
19199 | 0xfc0001ff, 0xa0000190, 0 , 0, | |
19200 | CP1_ }, /* POOL32F_0~*(50) */ | |
19201 | { reserved_block , 0 , 0 , 32, | |
19202 | 0xfc0001ff, 0xa0000198, 0 , 0, | |
19203 | CP1_ }, /* POOL32F_0~*(51) */ | |
19204 | { reserved_block , 0 , 0 , 32, | |
19205 | 0xfc0001ff, 0xa00001a0, 0 , 0, | |
19206 | CP1_ }, /* POOL32F_0~*(52) */ | |
19207 | { reserved_block , 0 , 0 , 32, | |
19208 | 0xfc0001ff, 0xa00001a8, 0 , 0, | |
19209 | CP1_ }, /* POOL32F_0~*(53) */ | |
19210 | { pool , MUL_fmt1 , 2 , 32, | |
19211 | 0xfc0001ff, 0xa00001b0, 0 , 0, | |
19212 | CP1_ }, /* MUL.fmt1 */ | |
19213 | { pool , MADDF_fmt , 2 , 32, | |
19214 | 0xfc0001ff, 0xa00001b8, 0 , 0, | |
19215 | CP1_ }, /* MADDF.fmt */ | |
19216 | { reserved_block , 0 , 0 , 32, | |
19217 | 0xfc0001ff, 0xa00001c0, 0 , 0, | |
19218 | CP1_ }, /* POOL32F_0~*(56) */ | |
19219 | { reserved_block , 0 , 0 , 32, | |
19220 | 0xfc0001ff, 0xa00001c8, 0 , 0, | |
19221 | CP1_ }, /* POOL32F_0~*(57) */ | |
19222 | { reserved_block , 0 , 0 , 32, | |
19223 | 0xfc0001ff, 0xa00001d0, 0 , 0, | |
19224 | CP1_ }, /* POOL32F_0~*(58) */ | |
19225 | { reserved_block , 0 , 0 , 32, | |
19226 | 0xfc0001ff, 0xa00001d8, 0 , 0, | |
19227 | CP1_ }, /* POOL32F_0~*(59) */ | |
19228 | { reserved_block , 0 , 0 , 32, | |
19229 | 0xfc0001ff, 0xa00001e0, 0 , 0, | |
19230 | CP1_ }, /* POOL32F_0~*(60) */ | |
19231 | { reserved_block , 0 , 0 , 32, | |
19232 | 0xfc0001ff, 0xa00001e8, 0 , 0, | |
19233 | CP1_ }, /* POOL32F_0~*(61) */ | |
19234 | { pool , DIV_fmt1 , 2 , 32, | |
19235 | 0xfc0001ff, 0xa00001f0, 0 , 0, | |
19236 | CP1_ }, /* DIV.fmt1 */ | |
19237 | { pool , MSUBF_fmt , 2 , 32, | |
19238 | 0xfc0001ff, 0xa00001f8, 0 , 0, | |
19239 | CP1_ }, /* MSUBF.fmt */ | |
19240 | }; | |
19241 | ||
19242 | ||
a1465490 | 19243 | static const Pool MIN_fmt[2] = { |
89a955e8 | 19244 | { instruction , 0 , 0 , 32, |
8d416f6b | 19245 | 0xfc00023f, 0xa0000003, &MIN_S , 0, |
89a955e8 AM |
19246 | CP1_ }, /* MIN.S */ |
19247 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19248 | 0xfc00023f, 0xa0000203, &MIN_D , 0, |
89a955e8 AM |
19249 | CP1_ }, /* MIN.D */ |
19250 | }; | |
19251 | ||
19252 | ||
a1465490 | 19253 | static const Pool MAX_fmt[2] = { |
89a955e8 | 19254 | { instruction , 0 , 0 , 32, |
8d416f6b | 19255 | 0xfc00023f, 0xa000000b, &MAX_S , 0, |
89a955e8 AM |
19256 | CP1_ }, /* MAX.S */ |
19257 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19258 | 0xfc00023f, 0xa000020b, &MAX_D , 0, |
89a955e8 AM |
19259 | CP1_ }, /* MAX.D */ |
19260 | }; | |
19261 | ||
19262 | ||
a1465490 | 19263 | static const Pool MINA_fmt[2] = { |
89a955e8 | 19264 | { instruction , 0 , 0 , 32, |
8d416f6b | 19265 | 0xfc00023f, 0xa0000023, &MINA_S , 0, |
89a955e8 AM |
19266 | CP1_ }, /* MINA.S */ |
19267 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19268 | 0xfc00023f, 0xa0000223, &MINA_D , 0, |
89a955e8 AM |
19269 | CP1_ }, /* MINA.D */ |
19270 | }; | |
19271 | ||
19272 | ||
a1465490 | 19273 | static const Pool MAXA_fmt[2] = { |
89a955e8 | 19274 | { instruction , 0 , 0 , 32, |
8d416f6b | 19275 | 0xfc00023f, 0xa000002b, &MAXA_S , 0, |
89a955e8 AM |
19276 | CP1_ }, /* MAXA.S */ |
19277 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19278 | 0xfc00023f, 0xa000022b, &MAXA_D , 0, |
89a955e8 AM |
19279 | CP1_ }, /* MAXA.D */ |
19280 | }; | |
19281 | ||
19282 | ||
a1465490 | 19283 | static const Pool CVT_L_fmt[2] = { |
89a955e8 | 19284 | { instruction , 0 , 0 , 32, |
8d416f6b | 19285 | 0xfc007fff, 0xa000013b, &CVT_L_S , 0, |
89a955e8 AM |
19286 | CP1_ }, /* CVT.L.S */ |
19287 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19288 | 0xfc007fff, 0xa000413b, &CVT_L_D , 0, |
89a955e8 AM |
19289 | CP1_ }, /* CVT.L.D */ |
19290 | }; | |
19291 | ||
19292 | ||
a1465490 | 19293 | static const Pool RSQRT_fmt[2] = { |
89a955e8 | 19294 | { instruction , 0 , 0 , 32, |
8d416f6b | 19295 | 0xfc007fff, 0xa000023b, &RSQRT_S , 0, |
89a955e8 AM |
19296 | CP1_ }, /* RSQRT.S */ |
19297 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19298 | 0xfc007fff, 0xa000423b, &RSQRT_D , 0, |
89a955e8 AM |
19299 | CP1_ }, /* RSQRT.D */ |
19300 | }; | |
19301 | ||
19302 | ||
a1465490 | 19303 | static const Pool FLOOR_L_fmt[2] = { |
89a955e8 | 19304 | { instruction , 0 , 0 , 32, |
8d416f6b | 19305 | 0xfc007fff, 0xa000033b, &FLOOR_L_S , 0, |
89a955e8 AM |
19306 | CP1_ }, /* FLOOR.L.S */ |
19307 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19308 | 0xfc007fff, 0xa000433b, &FLOOR_L_D , 0, |
89a955e8 AM |
19309 | CP1_ }, /* FLOOR.L.D */ |
19310 | }; | |
19311 | ||
19312 | ||
a1465490 | 19313 | static const Pool CVT_W_fmt[2] = { |
89a955e8 | 19314 | { instruction , 0 , 0 , 32, |
8d416f6b | 19315 | 0xfc007fff, 0xa000093b, &CVT_W_S , 0, |
89a955e8 AM |
19316 | CP1_ }, /* CVT.W.S */ |
19317 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19318 | 0xfc007fff, 0xa000493b, &CVT_W_D , 0, |
89a955e8 AM |
19319 | CP1_ }, /* CVT.W.D */ |
19320 | }; | |
19321 | ||
19322 | ||
a1465490 | 19323 | static const Pool SQRT_fmt[2] = { |
89a955e8 | 19324 | { instruction , 0 , 0 , 32, |
8d416f6b | 19325 | 0xfc007fff, 0xa0000a3b, &SQRT_S , 0, |
89a955e8 AM |
19326 | CP1_ }, /* SQRT.S */ |
19327 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19328 | 0xfc007fff, 0xa0004a3b, &SQRT_D , 0, |
89a955e8 AM |
19329 | CP1_ }, /* SQRT.D */ |
19330 | }; | |
19331 | ||
19332 | ||
a1465490 | 19333 | static const Pool FLOOR_W_fmt[2] = { |
89a955e8 | 19334 | { instruction , 0 , 0 , 32, |
8d416f6b | 19335 | 0xfc007fff, 0xa0000b3b, &FLOOR_W_S , 0, |
89a955e8 AM |
19336 | CP1_ }, /* FLOOR.W.S */ |
19337 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19338 | 0xfc007fff, 0xa0004b3b, &FLOOR_W_D , 0, |
89a955e8 AM |
19339 | CP1_ }, /* FLOOR.W.D */ |
19340 | }; | |
19341 | ||
19342 | ||
a1465490 | 19343 | static const Pool RECIP_fmt[2] = { |
89a955e8 | 19344 | { instruction , 0 , 0 , 32, |
8d416f6b | 19345 | 0xfc007fff, 0xa000123b, &RECIP_S , 0, |
89a955e8 AM |
19346 | CP1_ }, /* RECIP.S */ |
19347 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19348 | 0xfc007fff, 0xa000523b, &RECIP_D , 0, |
89a955e8 AM |
19349 | CP1_ }, /* RECIP.D */ |
19350 | }; | |
19351 | ||
19352 | ||
a1465490 | 19353 | static const Pool CEIL_L_fmt[2] = { |
89a955e8 | 19354 | { instruction , 0 , 0 , 32, |
8d416f6b | 19355 | 0xfc007fff, 0xa000133b, &CEIL_L_S , 0, |
89a955e8 AM |
19356 | CP1_ }, /* CEIL.L.S */ |
19357 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19358 | 0xfc007fff, 0xa000533b, &CEIL_L_D , 0, |
89a955e8 AM |
19359 | CP1_ }, /* CEIL.L.D */ |
19360 | }; | |
19361 | ||
19362 | ||
a1465490 | 19363 | static const Pool CEIL_W_fmt[2] = { |
89a955e8 | 19364 | { instruction , 0 , 0 , 32, |
8d416f6b | 19365 | 0xfc007fff, 0xa0001b3b, &CEIL_W_S , 0, |
89a955e8 AM |
19366 | CP1_ }, /* CEIL.W.S */ |
19367 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19368 | 0xfc007fff, 0xa0005b3b, &CEIL_W_D , 0, |
89a955e8 AM |
19369 | CP1_ }, /* CEIL.W.D */ |
19370 | }; | |
19371 | ||
19372 | ||
a1465490 | 19373 | static const Pool TRUNC_L_fmt[2] = { |
89a955e8 | 19374 | { instruction , 0 , 0 , 32, |
8d416f6b | 19375 | 0xfc007fff, 0xa000233b, &TRUNC_L_S , 0, |
89a955e8 AM |
19376 | CP1_ }, /* TRUNC.L.S */ |
19377 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19378 | 0xfc007fff, 0xa000633b, &TRUNC_L_D , 0, |
89a955e8 AM |
19379 | CP1_ }, /* TRUNC.L.D */ |
19380 | }; | |
19381 | ||
19382 | ||
a1465490 | 19383 | static const Pool TRUNC_W_fmt[2] = { |
89a955e8 | 19384 | { instruction , 0 , 0 , 32, |
8d416f6b | 19385 | 0xfc007fff, 0xa0002b3b, &TRUNC_W_S , 0, |
89a955e8 AM |
19386 | CP1_ }, /* TRUNC.W.S */ |
19387 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19388 | 0xfc007fff, 0xa0006b3b, &TRUNC_W_D , 0, |
89a955e8 AM |
19389 | CP1_ }, /* TRUNC.W.D */ |
19390 | }; | |
19391 | ||
19392 | ||
a1465490 | 19393 | static const Pool ROUND_L_fmt[2] = { |
89a955e8 | 19394 | { instruction , 0 , 0 , 32, |
8d416f6b | 19395 | 0xfc007fff, 0xa000333b, &ROUND_L_S , 0, |
89a955e8 AM |
19396 | CP1_ }, /* ROUND.L.S */ |
19397 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19398 | 0xfc007fff, 0xa000733b, &ROUND_L_D , 0, |
89a955e8 AM |
19399 | CP1_ }, /* ROUND.L.D */ |
19400 | }; | |
19401 | ||
19402 | ||
a1465490 | 19403 | static const Pool ROUND_W_fmt[2] = { |
89a955e8 | 19404 | { instruction , 0 , 0 , 32, |
8d416f6b | 19405 | 0xfc007fff, 0xa0003b3b, &ROUND_W_S , 0, |
89a955e8 AM |
19406 | CP1_ }, /* ROUND.W.S */ |
19407 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19408 | 0xfc007fff, 0xa0007b3b, &ROUND_W_D , 0, |
89a955e8 AM |
19409 | CP1_ }, /* ROUND.W.D */ |
19410 | }; | |
19411 | ||
19412 | ||
a1465490 | 19413 | static const Pool POOL32Fxf_0[64] = { |
89a955e8 AM |
19414 | { reserved_block , 0 , 0 , 32, |
19415 | 0xfc003fff, 0xa000003b, 0 , 0, | |
19416 | CP1_ }, /* POOL32Fxf_0~*(0) */ | |
19417 | { pool , CVT_L_fmt , 2 , 32, | |
19418 | 0xfc003fff, 0xa000013b, 0 , 0, | |
19419 | CP1_ }, /* CVT.L.fmt */ | |
19420 | { pool , RSQRT_fmt , 2 , 32, | |
19421 | 0xfc003fff, 0xa000023b, 0 , 0, | |
19422 | CP1_ }, /* RSQRT.fmt */ | |
19423 | { pool , FLOOR_L_fmt , 2 , 32, | |
19424 | 0xfc003fff, 0xa000033b, 0 , 0, | |
19425 | CP1_ }, /* FLOOR.L.fmt */ | |
19426 | { reserved_block , 0 , 0 , 32, | |
19427 | 0xfc003fff, 0xa000043b, 0 , 0, | |
19428 | CP1_ }, /* POOL32Fxf_0~*(4) */ | |
19429 | { reserved_block , 0 , 0 , 32, | |
19430 | 0xfc003fff, 0xa000053b, 0 , 0, | |
19431 | CP1_ }, /* POOL32Fxf_0~*(5) */ | |
19432 | { reserved_block , 0 , 0 , 32, | |
19433 | 0xfc003fff, 0xa000063b, 0 , 0, | |
19434 | CP1_ }, /* POOL32Fxf_0~*(6) */ | |
19435 | { reserved_block , 0 , 0 , 32, | |
19436 | 0xfc003fff, 0xa000073b, 0 , 0, | |
19437 | CP1_ }, /* POOL32Fxf_0~*(7) */ | |
19438 | { reserved_block , 0 , 0 , 32, | |
19439 | 0xfc003fff, 0xa000083b, 0 , 0, | |
19440 | CP1_ }, /* POOL32Fxf_0~*(8) */ | |
19441 | { pool , CVT_W_fmt , 2 , 32, | |
19442 | 0xfc003fff, 0xa000093b, 0 , 0, | |
19443 | CP1_ }, /* CVT.W.fmt */ | |
19444 | { pool , SQRT_fmt , 2 , 32, | |
19445 | 0xfc003fff, 0xa0000a3b, 0 , 0, | |
19446 | CP1_ }, /* SQRT.fmt */ | |
19447 | { pool , FLOOR_W_fmt , 2 , 32, | |
19448 | 0xfc003fff, 0xa0000b3b, 0 , 0, | |
19449 | CP1_ }, /* FLOOR.W.fmt */ | |
19450 | { reserved_block , 0 , 0 , 32, | |
19451 | 0xfc003fff, 0xa0000c3b, 0 , 0, | |
19452 | CP1_ }, /* POOL32Fxf_0~*(12) */ | |
19453 | { reserved_block , 0 , 0 , 32, | |
19454 | 0xfc003fff, 0xa0000d3b, 0 , 0, | |
19455 | CP1_ }, /* POOL32Fxf_0~*(13) */ | |
19456 | { reserved_block , 0 , 0 , 32, | |
19457 | 0xfc003fff, 0xa0000e3b, 0 , 0, | |
19458 | CP1_ }, /* POOL32Fxf_0~*(14) */ | |
19459 | { reserved_block , 0 , 0 , 32, | |
19460 | 0xfc003fff, 0xa0000f3b, 0 , 0, | |
19461 | CP1_ }, /* POOL32Fxf_0~*(15) */ | |
19462 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19463 | 0xfc003fff, 0xa000103b, &CFC1 , 0, |
89a955e8 AM |
19464 | CP1_ }, /* CFC1 */ |
19465 | { reserved_block , 0 , 0 , 32, | |
19466 | 0xfc003fff, 0xa000113b, 0 , 0, | |
19467 | CP1_ }, /* POOL32Fxf_0~*(17) */ | |
19468 | { pool , RECIP_fmt , 2 , 32, | |
19469 | 0xfc003fff, 0xa000123b, 0 , 0, | |
19470 | CP1_ }, /* RECIP.fmt */ | |
19471 | { pool , CEIL_L_fmt , 2 , 32, | |
19472 | 0xfc003fff, 0xa000133b, 0 , 0, | |
19473 | CP1_ }, /* CEIL.L.fmt */ | |
19474 | { reserved_block , 0 , 0 , 32, | |
19475 | 0xfc003fff, 0xa000143b, 0 , 0, | |
19476 | CP1_ }, /* POOL32Fxf_0~*(20) */ | |
19477 | { reserved_block , 0 , 0 , 32, | |
19478 | 0xfc003fff, 0xa000153b, 0 , 0, | |
19479 | CP1_ }, /* POOL32Fxf_0~*(21) */ | |
19480 | { reserved_block , 0 , 0 , 32, | |
19481 | 0xfc003fff, 0xa000163b, 0 , 0, | |
19482 | CP1_ }, /* POOL32Fxf_0~*(22) */ | |
19483 | { reserved_block , 0 , 0 , 32, | |
19484 | 0xfc003fff, 0xa000173b, 0 , 0, | |
19485 | CP1_ }, /* POOL32Fxf_0~*(23) */ | |
19486 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19487 | 0xfc003fff, 0xa000183b, &CTC1 , 0, |
89a955e8 AM |
19488 | CP1_ }, /* CTC1 */ |
19489 | { reserved_block , 0 , 0 , 32, | |
19490 | 0xfc003fff, 0xa000193b, 0 , 0, | |
19491 | CP1_ }, /* POOL32Fxf_0~*(25) */ | |
19492 | { reserved_block , 0 , 0 , 32, | |
19493 | 0xfc003fff, 0xa0001a3b, 0 , 0, | |
19494 | CP1_ }, /* POOL32Fxf_0~*(26) */ | |
19495 | { pool , CEIL_W_fmt , 2 , 32, | |
19496 | 0xfc003fff, 0xa0001b3b, 0 , 0, | |
19497 | CP1_ }, /* CEIL.W.fmt */ | |
19498 | { reserved_block , 0 , 0 , 32, | |
19499 | 0xfc003fff, 0xa0001c3b, 0 , 0, | |
19500 | CP1_ }, /* POOL32Fxf_0~*(28) */ | |
19501 | { reserved_block , 0 , 0 , 32, | |
19502 | 0xfc003fff, 0xa0001d3b, 0 , 0, | |
19503 | CP1_ }, /* POOL32Fxf_0~*(29) */ | |
19504 | { reserved_block , 0 , 0 , 32, | |
19505 | 0xfc003fff, 0xa0001e3b, 0 , 0, | |
19506 | CP1_ }, /* POOL32Fxf_0~*(30) */ | |
19507 | { reserved_block , 0 , 0 , 32, | |
19508 | 0xfc003fff, 0xa0001f3b, 0 , 0, | |
19509 | CP1_ }, /* POOL32Fxf_0~*(31) */ | |
19510 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19511 | 0xfc003fff, 0xa000203b, &MFC1 , 0, |
89a955e8 AM |
19512 | CP1_ }, /* MFC1 */ |
19513 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19514 | 0xfc003fff, 0xa000213b, &CVT_S_PL , 0, |
89a955e8 AM |
19515 | CP1_ }, /* CVT.S.PL */ |
19516 | { reserved_block , 0 , 0 , 32, | |
19517 | 0xfc003fff, 0xa000223b, 0 , 0, | |
19518 | CP1_ }, /* POOL32Fxf_0~*(34) */ | |
19519 | { pool , TRUNC_L_fmt , 2 , 32, | |
19520 | 0xfc003fff, 0xa000233b, 0 , 0, | |
19521 | CP1_ }, /* TRUNC.L.fmt */ | |
19522 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19523 | 0xfc003fff, 0xa000243b, &DMFC1 , 0, |
89a955e8 AM |
19524 | CP1_ | MIPS64_ }, /* DMFC1 */ |
19525 | { reserved_block , 0 , 0 , 32, | |
19526 | 0xfc003fff, 0xa000253b, 0 , 0, | |
19527 | CP1_ }, /* POOL32Fxf_0~*(37) */ | |
19528 | { reserved_block , 0 , 0 , 32, | |
19529 | 0xfc003fff, 0xa000263b, 0 , 0, | |
19530 | CP1_ }, /* POOL32Fxf_0~*(38) */ | |
19531 | { reserved_block , 0 , 0 , 32, | |
19532 | 0xfc003fff, 0xa000273b, 0 , 0, | |
19533 | CP1_ }, /* POOL32Fxf_0~*(39) */ | |
19534 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19535 | 0xfc003fff, 0xa000283b, &MTC1 , 0, |
89a955e8 AM |
19536 | CP1_ }, /* MTC1 */ |
19537 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19538 | 0xfc003fff, 0xa000293b, &CVT_S_PU , 0, |
89a955e8 AM |
19539 | CP1_ }, /* CVT.S.PU */ |
19540 | { reserved_block , 0 , 0 , 32, | |
19541 | 0xfc003fff, 0xa0002a3b, 0 , 0, | |
19542 | CP1_ }, /* POOL32Fxf_0~*(42) */ | |
19543 | { pool , TRUNC_W_fmt , 2 , 32, | |
19544 | 0xfc003fff, 0xa0002b3b, 0 , 0, | |
19545 | CP1_ }, /* TRUNC.W.fmt */ | |
19546 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19547 | 0xfc003fff, 0xa0002c3b, &DMTC1 , 0, |
89a955e8 AM |
19548 | CP1_ | MIPS64_ }, /* DMTC1 */ |
19549 | { reserved_block , 0 , 0 , 32, | |
19550 | 0xfc003fff, 0xa0002d3b, 0 , 0, | |
19551 | CP1_ }, /* POOL32Fxf_0~*(45) */ | |
19552 | { reserved_block , 0 , 0 , 32, | |
19553 | 0xfc003fff, 0xa0002e3b, 0 , 0, | |
19554 | CP1_ }, /* POOL32Fxf_0~*(46) */ | |
19555 | { reserved_block , 0 , 0 , 32, | |
19556 | 0xfc003fff, 0xa0002f3b, 0 , 0, | |
19557 | CP1_ }, /* POOL32Fxf_0~*(47) */ | |
19558 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19559 | 0xfc003fff, 0xa000303b, &MFHC1 , 0, |
89a955e8 AM |
19560 | CP1_ }, /* MFHC1 */ |
19561 | { reserved_block , 0 , 0 , 32, | |
19562 | 0xfc003fff, 0xa000313b, 0 , 0, | |
19563 | CP1_ }, /* POOL32Fxf_0~*(49) */ | |
19564 | { reserved_block , 0 , 0 , 32, | |
19565 | 0xfc003fff, 0xa000323b, 0 , 0, | |
19566 | CP1_ }, /* POOL32Fxf_0~*(50) */ | |
19567 | { pool , ROUND_L_fmt , 2 , 32, | |
19568 | 0xfc003fff, 0xa000333b, 0 , 0, | |
19569 | CP1_ }, /* ROUND.L.fmt */ | |
19570 | { reserved_block , 0 , 0 , 32, | |
19571 | 0xfc003fff, 0xa000343b, 0 , 0, | |
19572 | CP1_ }, /* POOL32Fxf_0~*(52) */ | |
19573 | { reserved_block , 0 , 0 , 32, | |
19574 | 0xfc003fff, 0xa000353b, 0 , 0, | |
19575 | CP1_ }, /* POOL32Fxf_0~*(53) */ | |
19576 | { reserved_block , 0 , 0 , 32, | |
19577 | 0xfc003fff, 0xa000363b, 0 , 0, | |
19578 | CP1_ }, /* POOL32Fxf_0~*(54) */ | |
19579 | { reserved_block , 0 , 0 , 32, | |
19580 | 0xfc003fff, 0xa000373b, 0 , 0, | |
19581 | CP1_ }, /* POOL32Fxf_0~*(55) */ | |
19582 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19583 | 0xfc003fff, 0xa000383b, &MTHC1 , 0, |
89a955e8 AM |
19584 | CP1_ }, /* MTHC1 */ |
19585 | { reserved_block , 0 , 0 , 32, | |
19586 | 0xfc003fff, 0xa000393b, 0 , 0, | |
19587 | CP1_ }, /* POOL32Fxf_0~*(57) */ | |
19588 | { reserved_block , 0 , 0 , 32, | |
19589 | 0xfc003fff, 0xa0003a3b, 0 , 0, | |
19590 | CP1_ }, /* POOL32Fxf_0~*(58) */ | |
19591 | { pool , ROUND_W_fmt , 2 , 32, | |
19592 | 0xfc003fff, 0xa0003b3b, 0 , 0, | |
19593 | CP1_ }, /* ROUND.W.fmt */ | |
19594 | { reserved_block , 0 , 0 , 32, | |
19595 | 0xfc003fff, 0xa0003c3b, 0 , 0, | |
19596 | CP1_ }, /* POOL32Fxf_0~*(60) */ | |
19597 | { reserved_block , 0 , 0 , 32, | |
19598 | 0xfc003fff, 0xa0003d3b, 0 , 0, | |
19599 | CP1_ }, /* POOL32Fxf_0~*(61) */ | |
19600 | { reserved_block , 0 , 0 , 32, | |
19601 | 0xfc003fff, 0xa0003e3b, 0 , 0, | |
19602 | CP1_ }, /* POOL32Fxf_0~*(62) */ | |
19603 | { reserved_block , 0 , 0 , 32, | |
19604 | 0xfc003fff, 0xa0003f3b, 0 , 0, | |
19605 | CP1_ }, /* POOL32Fxf_0~*(63) */ | |
19606 | }; | |
19607 | ||
19608 | ||
a1465490 | 19609 | static const Pool MOV_fmt[4] = { |
89a955e8 | 19610 | { instruction , 0 , 0 , 32, |
8d416f6b | 19611 | 0xfc007fff, 0xa000007b, &MOV_S , 0, |
89a955e8 AM |
19612 | CP1_ }, /* MOV.S */ |
19613 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19614 | 0xfc007fff, 0xa000207b, &MOV_D , 0, |
89a955e8 AM |
19615 | CP1_ }, /* MOV.D */ |
19616 | { reserved_block , 0 , 0 , 32, | |
19617 | 0xfc007fff, 0xa000407b, 0 , 0, | |
19618 | CP1_ }, /* MOV.fmt~*(2) */ | |
19619 | { reserved_block , 0 , 0 , 32, | |
19620 | 0xfc007fff, 0xa000607b, 0 , 0, | |
19621 | CP1_ }, /* MOV.fmt~*(3) */ | |
19622 | }; | |
19623 | ||
19624 | ||
a1465490 | 19625 | static const Pool ABS_fmt[4] = { |
89a955e8 | 19626 | { instruction , 0 , 0 , 32, |
8d416f6b | 19627 | 0xfc007fff, 0xa000037b, &ABS_S , 0, |
89a955e8 AM |
19628 | CP1_ }, /* ABS.S */ |
19629 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19630 | 0xfc007fff, 0xa000237b, &ABS_D , 0, |
89a955e8 AM |
19631 | CP1_ }, /* ABS.D */ |
19632 | { reserved_block , 0 , 0 , 32, | |
19633 | 0xfc007fff, 0xa000437b, 0 , 0, | |
19634 | CP1_ }, /* ABS.fmt~*(2) */ | |
19635 | { reserved_block , 0 , 0 , 32, | |
19636 | 0xfc007fff, 0xa000637b, 0 , 0, | |
19637 | CP1_ }, /* ABS.fmt~*(3) */ | |
19638 | }; | |
19639 | ||
19640 | ||
a1465490 | 19641 | static const Pool NEG_fmt[4] = { |
89a955e8 | 19642 | { instruction , 0 , 0 , 32, |
8d416f6b | 19643 | 0xfc007fff, 0xa0000b7b, &NEG_S , 0, |
89a955e8 AM |
19644 | CP1_ }, /* NEG.S */ |
19645 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19646 | 0xfc007fff, 0xa0002b7b, &NEG_D , 0, |
89a955e8 AM |
19647 | CP1_ }, /* NEG.D */ |
19648 | { reserved_block , 0 , 0 , 32, | |
19649 | 0xfc007fff, 0xa0004b7b, 0 , 0, | |
19650 | CP1_ }, /* NEG.fmt~*(2) */ | |
19651 | { reserved_block , 0 , 0 , 32, | |
19652 | 0xfc007fff, 0xa0006b7b, 0 , 0, | |
19653 | CP1_ }, /* NEG.fmt~*(3) */ | |
19654 | }; | |
19655 | ||
19656 | ||
a1465490 | 19657 | static const Pool CVT_D_fmt[4] = { |
89a955e8 | 19658 | { instruction , 0 , 0 , 32, |
8d416f6b | 19659 | 0xfc007fff, 0xa000137b, &CVT_D_S , 0, |
89a955e8 AM |
19660 | CP1_ }, /* CVT.D.S */ |
19661 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19662 | 0xfc007fff, 0xa000337b, &CVT_D_W , 0, |
89a955e8 AM |
19663 | CP1_ }, /* CVT.D.W */ |
19664 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19665 | 0xfc007fff, 0xa000537b, &CVT_D_L , 0, |
89a955e8 AM |
19666 | CP1_ }, /* CVT.D.L */ |
19667 | { reserved_block , 0 , 0 , 32, | |
19668 | 0xfc007fff, 0xa000737b, 0 , 0, | |
19669 | CP1_ }, /* CVT.D.fmt~*(3) */ | |
19670 | }; | |
19671 | ||
19672 | ||
a1465490 | 19673 | static const Pool CVT_S_fmt[4] = { |
89a955e8 | 19674 | { instruction , 0 , 0 , 32, |
8d416f6b | 19675 | 0xfc007fff, 0xa0001b7b, &CVT_S_D , 0, |
89a955e8 AM |
19676 | CP1_ }, /* CVT.S.D */ |
19677 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19678 | 0xfc007fff, 0xa0003b7b, &CVT_S_W , 0, |
89a955e8 AM |
19679 | CP1_ }, /* CVT.S.W */ |
19680 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19681 | 0xfc007fff, 0xa0005b7b, &CVT_S_L , 0, |
89a955e8 AM |
19682 | CP1_ }, /* CVT.S.L */ |
19683 | { reserved_block , 0 , 0 , 32, | |
19684 | 0xfc007fff, 0xa0007b7b, 0 , 0, | |
19685 | CP1_ }, /* CVT.S.fmt~*(3) */ | |
19686 | }; | |
19687 | ||
19688 | ||
a1465490 | 19689 | static const Pool POOL32Fxf_1[32] = { |
89a955e8 AM |
19690 | { pool , MOV_fmt , 4 , 32, |
19691 | 0xfc001fff, 0xa000007b, 0 , 0, | |
19692 | CP1_ }, /* MOV.fmt */ | |
19693 | { reserved_block , 0 , 0 , 32, | |
19694 | 0xfc001fff, 0xa000017b, 0 , 0, | |
19695 | CP1_ }, /* POOL32Fxf_1~*(1) */ | |
19696 | { reserved_block , 0 , 0 , 32, | |
19697 | 0xfc001fff, 0xa000027b, 0 , 0, | |
19698 | CP1_ }, /* POOL32Fxf_1~*(2) */ | |
19699 | { pool , ABS_fmt , 4 , 32, | |
19700 | 0xfc001fff, 0xa000037b, 0 , 0, | |
19701 | CP1_ }, /* ABS.fmt */ | |
19702 | { reserved_block , 0 , 0 , 32, | |
19703 | 0xfc001fff, 0xa000047b, 0 , 0, | |
19704 | CP1_ }, /* POOL32Fxf_1~*(4) */ | |
19705 | { reserved_block , 0 , 0 , 32, | |
19706 | 0xfc001fff, 0xa000057b, 0 , 0, | |
19707 | CP1_ }, /* POOL32Fxf_1~*(5) */ | |
19708 | { reserved_block , 0 , 0 , 32, | |
19709 | 0xfc001fff, 0xa000067b, 0 , 0, | |
19710 | CP1_ }, /* POOL32Fxf_1~*(6) */ | |
19711 | { reserved_block , 0 , 0 , 32, | |
19712 | 0xfc001fff, 0xa000077b, 0 , 0, | |
19713 | CP1_ }, /* POOL32Fxf_1~*(7) */ | |
19714 | { reserved_block , 0 , 0 , 32, | |
19715 | 0xfc001fff, 0xa000087b, 0 , 0, | |
19716 | CP1_ }, /* POOL32Fxf_1~*(8) */ | |
19717 | { reserved_block , 0 , 0 , 32, | |
19718 | 0xfc001fff, 0xa000097b, 0 , 0, | |
19719 | CP1_ }, /* POOL32Fxf_1~*(9) */ | |
19720 | { reserved_block , 0 , 0 , 32, | |
19721 | 0xfc001fff, 0xa0000a7b, 0 , 0, | |
19722 | CP1_ }, /* POOL32Fxf_1~*(10) */ | |
19723 | { pool , NEG_fmt , 4 , 32, | |
19724 | 0xfc001fff, 0xa0000b7b, 0 , 0, | |
19725 | CP1_ }, /* NEG.fmt */ | |
19726 | { reserved_block , 0 , 0 , 32, | |
19727 | 0xfc001fff, 0xa0000c7b, 0 , 0, | |
19728 | CP1_ }, /* POOL32Fxf_1~*(12) */ | |
19729 | { reserved_block , 0 , 0 , 32, | |
19730 | 0xfc001fff, 0xa0000d7b, 0 , 0, | |
19731 | CP1_ }, /* POOL32Fxf_1~*(13) */ | |
19732 | { reserved_block , 0 , 0 , 32, | |
19733 | 0xfc001fff, 0xa0000e7b, 0 , 0, | |
19734 | CP1_ }, /* POOL32Fxf_1~*(14) */ | |
19735 | { reserved_block , 0 , 0 , 32, | |
19736 | 0xfc001fff, 0xa0000f7b, 0 , 0, | |
19737 | CP1_ }, /* POOL32Fxf_1~*(15) */ | |
19738 | { reserved_block , 0 , 0 , 32, | |
19739 | 0xfc001fff, 0xa000107b, 0 , 0, | |
19740 | CP1_ }, /* POOL32Fxf_1~*(16) */ | |
19741 | { reserved_block , 0 , 0 , 32, | |
19742 | 0xfc001fff, 0xa000117b, 0 , 0, | |
19743 | CP1_ }, /* POOL32Fxf_1~*(17) */ | |
19744 | { reserved_block , 0 , 0 , 32, | |
19745 | 0xfc001fff, 0xa000127b, 0 , 0, | |
19746 | CP1_ }, /* POOL32Fxf_1~*(18) */ | |
19747 | { pool , CVT_D_fmt , 4 , 32, | |
19748 | 0xfc001fff, 0xa000137b, 0 , 0, | |
19749 | CP1_ }, /* CVT.D.fmt */ | |
19750 | { reserved_block , 0 , 0 , 32, | |
19751 | 0xfc001fff, 0xa000147b, 0 , 0, | |
19752 | CP1_ }, /* POOL32Fxf_1~*(20) */ | |
19753 | { reserved_block , 0 , 0 , 32, | |
19754 | 0xfc001fff, 0xa000157b, 0 , 0, | |
19755 | CP1_ }, /* POOL32Fxf_1~*(21) */ | |
19756 | { reserved_block , 0 , 0 , 32, | |
19757 | 0xfc001fff, 0xa000167b, 0 , 0, | |
19758 | CP1_ }, /* POOL32Fxf_1~*(22) */ | |
19759 | { reserved_block , 0 , 0 , 32, | |
19760 | 0xfc001fff, 0xa000177b, 0 , 0, | |
19761 | CP1_ }, /* POOL32Fxf_1~*(23) */ | |
19762 | { reserved_block , 0 , 0 , 32, | |
19763 | 0xfc001fff, 0xa000187b, 0 , 0, | |
19764 | CP1_ }, /* POOL32Fxf_1~*(24) */ | |
19765 | { reserved_block , 0 , 0 , 32, | |
19766 | 0xfc001fff, 0xa000197b, 0 , 0, | |
19767 | CP1_ }, /* POOL32Fxf_1~*(25) */ | |
19768 | { reserved_block , 0 , 0 , 32, | |
19769 | 0xfc001fff, 0xa0001a7b, 0 , 0, | |
19770 | CP1_ }, /* POOL32Fxf_1~*(26) */ | |
19771 | { pool , CVT_S_fmt , 4 , 32, | |
19772 | 0xfc001fff, 0xa0001b7b, 0 , 0, | |
19773 | CP1_ }, /* CVT.S.fmt */ | |
19774 | { reserved_block , 0 , 0 , 32, | |
19775 | 0xfc001fff, 0xa0001c7b, 0 , 0, | |
19776 | CP1_ }, /* POOL32Fxf_1~*(28) */ | |
19777 | { reserved_block , 0 , 0 , 32, | |
19778 | 0xfc001fff, 0xa0001d7b, 0 , 0, | |
19779 | CP1_ }, /* POOL32Fxf_1~*(29) */ | |
19780 | { reserved_block , 0 , 0 , 32, | |
19781 | 0xfc001fff, 0xa0001e7b, 0 , 0, | |
19782 | CP1_ }, /* POOL32Fxf_1~*(30) */ | |
19783 | { reserved_block , 0 , 0 , 32, | |
19784 | 0xfc001fff, 0xa0001f7b, 0 , 0, | |
19785 | CP1_ }, /* POOL32Fxf_1~*(31) */ | |
19786 | }; | |
19787 | ||
19788 | ||
a1465490 | 19789 | static const Pool POOL32Fxf[4] = { |
89a955e8 AM |
19790 | { pool , POOL32Fxf_0 , 64 , 32, |
19791 | 0xfc0000ff, 0xa000003b, 0 , 0, | |
19792 | CP1_ }, /* POOL32Fxf_0 */ | |
19793 | { pool , POOL32Fxf_1 , 32 , 32, | |
19794 | 0xfc0000ff, 0xa000007b, 0 , 0, | |
19795 | CP1_ }, /* POOL32Fxf_1 */ | |
19796 | { reserved_block , 0 , 0 , 32, | |
19797 | 0xfc0000ff, 0xa00000bb, 0 , 0, | |
19798 | CP1_ }, /* POOL32Fxf~*(2) */ | |
19799 | { reserved_block , 0 , 0 , 32, | |
19800 | 0xfc0000ff, 0xa00000fb, 0 , 0, | |
19801 | CP1_ }, /* POOL32Fxf~*(3) */ | |
19802 | }; | |
19803 | ||
19804 | ||
a1465490 | 19805 | static const Pool POOL32F_3[8] = { |
89a955e8 AM |
19806 | { pool , MIN_fmt , 2 , 32, |
19807 | 0xfc00003f, 0xa0000003, 0 , 0, | |
19808 | CP1_ }, /* MIN.fmt */ | |
19809 | { pool , MAX_fmt , 2 , 32, | |
19810 | 0xfc00003f, 0xa000000b, 0 , 0, | |
19811 | CP1_ }, /* MAX.fmt */ | |
19812 | { reserved_block , 0 , 0 , 32, | |
19813 | 0xfc00003f, 0xa0000013, 0 , 0, | |
19814 | CP1_ }, /* POOL32F_3~*(2) */ | |
19815 | { reserved_block , 0 , 0 , 32, | |
19816 | 0xfc00003f, 0xa000001b, 0 , 0, | |
19817 | CP1_ }, /* POOL32F_3~*(3) */ | |
19818 | { pool , MINA_fmt , 2 , 32, | |
19819 | 0xfc00003f, 0xa0000023, 0 , 0, | |
19820 | CP1_ }, /* MINA.fmt */ | |
19821 | { pool , MAXA_fmt , 2 , 32, | |
19822 | 0xfc00003f, 0xa000002b, 0 , 0, | |
19823 | CP1_ }, /* MAXA.fmt */ | |
19824 | { reserved_block , 0 , 0 , 32, | |
19825 | 0xfc00003f, 0xa0000033, 0 , 0, | |
19826 | CP1_ }, /* POOL32F_3~*(6) */ | |
19827 | { pool , POOL32Fxf , 4 , 32, | |
19828 | 0xfc00003f, 0xa000003b, 0 , 0, | |
19829 | CP1_ }, /* POOL32Fxf */ | |
19830 | }; | |
19831 | ||
19832 | ||
a1465490 | 19833 | static const Pool CMP_condn_S[32] = { |
89a955e8 | 19834 | { instruction , 0 , 0 , 32, |
8d416f6b | 19835 | 0xfc0007ff, 0xa0000005, &CMP_AF_S , 0, |
89a955e8 AM |
19836 | CP1_ }, /* CMP.AF.S */ |
19837 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19838 | 0xfc0007ff, 0xa0000045, &CMP_UN_S , 0, |
89a955e8 AM |
19839 | CP1_ }, /* CMP.UN.S */ |
19840 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19841 | 0xfc0007ff, 0xa0000085, &CMP_EQ_S , 0, |
89a955e8 AM |
19842 | CP1_ }, /* CMP.EQ.S */ |
19843 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19844 | 0xfc0007ff, 0xa00000c5, &CMP_UEQ_S , 0, |
89a955e8 AM |
19845 | CP1_ }, /* CMP.UEQ.S */ |
19846 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19847 | 0xfc0007ff, 0xa0000105, &CMP_LT_S , 0, |
89a955e8 AM |
19848 | CP1_ }, /* CMP.LT.S */ |
19849 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19850 | 0xfc0007ff, 0xa0000145, &CMP_ULT_S , 0, |
89a955e8 AM |
19851 | CP1_ }, /* CMP.ULT.S */ |
19852 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19853 | 0xfc0007ff, 0xa0000185, &CMP_LE_S , 0, |
89a955e8 AM |
19854 | CP1_ }, /* CMP.LE.S */ |
19855 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19856 | 0xfc0007ff, 0xa00001c5, &CMP_ULE_S , 0, |
89a955e8 AM |
19857 | CP1_ }, /* CMP.ULE.S */ |
19858 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19859 | 0xfc0007ff, 0xa0000205, &CMP_SAF_S , 0, |
89a955e8 AM |
19860 | CP1_ }, /* CMP.SAF.S */ |
19861 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19862 | 0xfc0007ff, 0xa0000245, &CMP_SUN_S , 0, |
89a955e8 AM |
19863 | CP1_ }, /* CMP.SUN.S */ |
19864 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19865 | 0xfc0007ff, 0xa0000285, &CMP_SEQ_S , 0, |
89a955e8 AM |
19866 | CP1_ }, /* CMP.SEQ.S */ |
19867 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19868 | 0xfc0007ff, 0xa00002c5, &CMP_SUEQ_S , 0, |
89a955e8 AM |
19869 | CP1_ }, /* CMP.SUEQ.S */ |
19870 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19871 | 0xfc0007ff, 0xa0000305, &CMP_SLT_S , 0, |
89a955e8 AM |
19872 | CP1_ }, /* CMP.SLT.S */ |
19873 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19874 | 0xfc0007ff, 0xa0000345, &CMP_SULT_S , 0, |
89a955e8 AM |
19875 | CP1_ }, /* CMP.SULT.S */ |
19876 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19877 | 0xfc0007ff, 0xa0000385, &CMP_SLE_S , 0, |
89a955e8 AM |
19878 | CP1_ }, /* CMP.SLE.S */ |
19879 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19880 | 0xfc0007ff, 0xa00003c5, &CMP_SULE_S , 0, |
89a955e8 AM |
19881 | CP1_ }, /* CMP.SULE.S */ |
19882 | { reserved_block , 0 , 0 , 32, | |
19883 | 0xfc0007ff, 0xa0000405, 0 , 0, | |
19884 | CP1_ }, /* CMP.condn.S~*(16) */ | |
19885 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19886 | 0xfc0007ff, 0xa0000445, &CMP_OR_S , 0, |
89a955e8 AM |
19887 | CP1_ }, /* CMP.OR.S */ |
19888 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19889 | 0xfc0007ff, 0xa0000485, &CMP_UNE_S , 0, |
89a955e8 AM |
19890 | CP1_ }, /* CMP.UNE.S */ |
19891 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19892 | 0xfc0007ff, 0xa00004c5, &CMP_NE_S , 0, |
89a955e8 AM |
19893 | CP1_ }, /* CMP.NE.S */ |
19894 | { reserved_block , 0 , 0 , 32, | |
19895 | 0xfc0007ff, 0xa0000505, 0 , 0, | |
19896 | CP1_ }, /* CMP.condn.S~*(20) */ | |
19897 | { reserved_block , 0 , 0 , 32, | |
19898 | 0xfc0007ff, 0xa0000545, 0 , 0, | |
19899 | CP1_ }, /* CMP.condn.S~*(21) */ | |
19900 | { reserved_block , 0 , 0 , 32, | |
19901 | 0xfc0007ff, 0xa0000585, 0 , 0, | |
19902 | CP1_ }, /* CMP.condn.S~*(22) */ | |
19903 | { reserved_block , 0 , 0 , 32, | |
19904 | 0xfc0007ff, 0xa00005c5, 0 , 0, | |
19905 | CP1_ }, /* CMP.condn.S~*(23) */ | |
19906 | { reserved_block , 0 , 0 , 32, | |
19907 | 0xfc0007ff, 0xa0000605, 0 , 0, | |
19908 | CP1_ }, /* CMP.condn.S~*(24) */ | |
19909 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19910 | 0xfc0007ff, 0xa0000645, &CMP_SOR_S , 0, |
89a955e8 AM |
19911 | CP1_ }, /* CMP.SOR.S */ |
19912 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19913 | 0xfc0007ff, 0xa0000685, &CMP_SUNE_S , 0, |
89a955e8 AM |
19914 | CP1_ }, /* CMP.SUNE.S */ |
19915 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19916 | 0xfc0007ff, 0xa00006c5, &CMP_SNE_S , 0, |
89a955e8 AM |
19917 | CP1_ }, /* CMP.SNE.S */ |
19918 | { reserved_block , 0 , 0 , 32, | |
19919 | 0xfc0007ff, 0xa0000705, 0 , 0, | |
19920 | CP1_ }, /* CMP.condn.S~*(28) */ | |
19921 | { reserved_block , 0 , 0 , 32, | |
19922 | 0xfc0007ff, 0xa0000745, 0 , 0, | |
19923 | CP1_ }, /* CMP.condn.S~*(29) */ | |
19924 | { reserved_block , 0 , 0 , 32, | |
19925 | 0xfc0007ff, 0xa0000785, 0 , 0, | |
19926 | CP1_ }, /* CMP.condn.S~*(30) */ | |
19927 | { reserved_block , 0 , 0 , 32, | |
19928 | 0xfc0007ff, 0xa00007c5, 0 , 0, | |
19929 | CP1_ }, /* CMP.condn.S~*(31) */ | |
19930 | }; | |
19931 | ||
19932 | ||
a1465490 | 19933 | static const Pool CMP_condn_D[32] = { |
89a955e8 | 19934 | { instruction , 0 , 0 , 32, |
8d416f6b | 19935 | 0xfc0007ff, 0xa0000015, &CMP_AF_D , 0, |
89a955e8 AM |
19936 | CP1_ }, /* CMP.AF.D */ |
19937 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19938 | 0xfc0007ff, 0xa0000055, &CMP_UN_D , 0, |
89a955e8 AM |
19939 | CP1_ }, /* CMP.UN.D */ |
19940 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19941 | 0xfc0007ff, 0xa0000095, &CMP_EQ_D , 0, |
89a955e8 AM |
19942 | CP1_ }, /* CMP.EQ.D */ |
19943 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19944 | 0xfc0007ff, 0xa00000d5, &CMP_UEQ_D , 0, |
89a955e8 AM |
19945 | CP1_ }, /* CMP.UEQ.D */ |
19946 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19947 | 0xfc0007ff, 0xa0000115, &CMP_LT_D , 0, |
89a955e8 AM |
19948 | CP1_ }, /* CMP.LT.D */ |
19949 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19950 | 0xfc0007ff, 0xa0000155, &CMP_ULT_D , 0, |
89a955e8 AM |
19951 | CP1_ }, /* CMP.ULT.D */ |
19952 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19953 | 0xfc0007ff, 0xa0000195, &CMP_LE_D , 0, |
89a955e8 AM |
19954 | CP1_ }, /* CMP.LE.D */ |
19955 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19956 | 0xfc0007ff, 0xa00001d5, &CMP_ULE_D , 0, |
89a955e8 AM |
19957 | CP1_ }, /* CMP.ULE.D */ |
19958 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19959 | 0xfc0007ff, 0xa0000215, &CMP_SAF_D , 0, |
89a955e8 AM |
19960 | CP1_ }, /* CMP.SAF.D */ |
19961 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19962 | 0xfc0007ff, 0xa0000255, &CMP_SUN_D , 0, |
89a955e8 AM |
19963 | CP1_ }, /* CMP.SUN.D */ |
19964 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19965 | 0xfc0007ff, 0xa0000295, &CMP_SEQ_D , 0, |
89a955e8 AM |
19966 | CP1_ }, /* CMP.SEQ.D */ |
19967 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19968 | 0xfc0007ff, 0xa00002d5, &CMP_SUEQ_D , 0, |
89a955e8 AM |
19969 | CP1_ }, /* CMP.SUEQ.D */ |
19970 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19971 | 0xfc0007ff, 0xa0000315, &CMP_SLT_D , 0, |
89a955e8 AM |
19972 | CP1_ }, /* CMP.SLT.D */ |
19973 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19974 | 0xfc0007ff, 0xa0000355, &CMP_SULT_D , 0, |
89a955e8 AM |
19975 | CP1_ }, /* CMP.SULT.D */ |
19976 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19977 | 0xfc0007ff, 0xa0000395, &CMP_SLE_D , 0, |
89a955e8 AM |
19978 | CP1_ }, /* CMP.SLE.D */ |
19979 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19980 | 0xfc0007ff, 0xa00003d5, &CMP_SULE_D , 0, |
89a955e8 AM |
19981 | CP1_ }, /* CMP.SULE.D */ |
19982 | { reserved_block , 0 , 0 , 32, | |
19983 | 0xfc0007ff, 0xa0000415, 0 , 0, | |
19984 | CP1_ }, /* CMP.condn.D~*(16) */ | |
19985 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19986 | 0xfc0007ff, 0xa0000455, &CMP_OR_D , 0, |
89a955e8 AM |
19987 | CP1_ }, /* CMP.OR.D */ |
19988 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19989 | 0xfc0007ff, 0xa0000495, &CMP_UNE_D , 0, |
89a955e8 AM |
19990 | CP1_ }, /* CMP.UNE.D */ |
19991 | { instruction , 0 , 0 , 32, | |
8d416f6b | 19992 | 0xfc0007ff, 0xa00004d5, &CMP_NE_D , 0, |
89a955e8 AM |
19993 | CP1_ }, /* CMP.NE.D */ |
19994 | { reserved_block , 0 , 0 , 32, | |
19995 | 0xfc0007ff, 0xa0000515, 0 , 0, | |
19996 | CP1_ }, /* CMP.condn.D~*(20) */ | |
19997 | { reserved_block , 0 , 0 , 32, | |
19998 | 0xfc0007ff, 0xa0000555, 0 , 0, | |
19999 | CP1_ }, /* CMP.condn.D~*(21) */ | |
20000 | { reserved_block , 0 , 0 , 32, | |
20001 | 0xfc0007ff, 0xa0000595, 0 , 0, | |
20002 | CP1_ }, /* CMP.condn.D~*(22) */ | |
20003 | { reserved_block , 0 , 0 , 32, | |
20004 | 0xfc0007ff, 0xa00005d5, 0 , 0, | |
20005 | CP1_ }, /* CMP.condn.D~*(23) */ | |
20006 | { reserved_block , 0 , 0 , 32, | |
20007 | 0xfc0007ff, 0xa0000615, 0 , 0, | |
20008 | CP1_ }, /* CMP.condn.D~*(24) */ | |
20009 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20010 | 0xfc0007ff, 0xa0000655, &CMP_SOR_D , 0, |
89a955e8 AM |
20011 | CP1_ }, /* CMP.SOR.D */ |
20012 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20013 | 0xfc0007ff, 0xa0000695, &CMP_SUNE_D , 0, |
89a955e8 AM |
20014 | CP1_ }, /* CMP.SUNE.D */ |
20015 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20016 | 0xfc0007ff, 0xa00006d5, &CMP_SNE_D , 0, |
89a955e8 AM |
20017 | CP1_ }, /* CMP.SNE.D */ |
20018 | { reserved_block , 0 , 0 , 32, | |
20019 | 0xfc0007ff, 0xa0000715, 0 , 0, | |
20020 | CP1_ }, /* CMP.condn.D~*(28) */ | |
20021 | { reserved_block , 0 , 0 , 32, | |
20022 | 0xfc0007ff, 0xa0000755, 0 , 0, | |
20023 | CP1_ }, /* CMP.condn.D~*(29) */ | |
20024 | { reserved_block , 0 , 0 , 32, | |
20025 | 0xfc0007ff, 0xa0000795, 0 , 0, | |
20026 | CP1_ }, /* CMP.condn.D~*(30) */ | |
20027 | { reserved_block , 0 , 0 , 32, | |
20028 | 0xfc0007ff, 0xa00007d5, 0 , 0, | |
20029 | CP1_ }, /* CMP.condn.D~*(31) */ | |
20030 | }; | |
20031 | ||
20032 | ||
a1465490 | 20033 | static const Pool POOL32F_5[8] = { |
89a955e8 AM |
20034 | { pool , CMP_condn_S , 32 , 32, |
20035 | 0xfc00003f, 0xa0000005, 0 , 0, | |
20036 | CP1_ }, /* CMP.condn.S */ | |
20037 | { reserved_block , 0 , 0 , 32, | |
20038 | 0xfc00003f, 0xa000000d, 0 , 0, | |
20039 | CP1_ }, /* POOL32F_5~*(1) */ | |
20040 | { pool , CMP_condn_D , 32 , 32, | |
20041 | 0xfc00003f, 0xa0000015, 0 , 0, | |
20042 | CP1_ }, /* CMP.condn.D */ | |
20043 | { reserved_block , 0 , 0 , 32, | |
20044 | 0xfc00003f, 0xa000001d, 0 , 0, | |
20045 | CP1_ }, /* POOL32F_5~*(3) */ | |
20046 | { reserved_block , 0 , 0 , 32, | |
20047 | 0xfc00003f, 0xa0000025, 0 , 0, | |
20048 | CP1_ }, /* POOL32F_5~*(4) */ | |
20049 | { reserved_block , 0 , 0 , 32, | |
20050 | 0xfc00003f, 0xa000002d, 0 , 0, | |
20051 | CP1_ }, /* POOL32F_5~*(5) */ | |
20052 | { reserved_block , 0 , 0 , 32, | |
20053 | 0xfc00003f, 0xa0000035, 0 , 0, | |
20054 | CP1_ }, /* POOL32F_5~*(6) */ | |
20055 | { reserved_block , 0 , 0 , 32, | |
20056 | 0xfc00003f, 0xa000003d, 0 , 0, | |
20057 | CP1_ }, /* POOL32F_5~*(7) */ | |
20058 | }; | |
20059 | ||
20060 | ||
a1465490 | 20061 | static const Pool POOL32F[8] = { |
89a955e8 AM |
20062 | { pool , POOL32F_0 , 64 , 32, |
20063 | 0xfc000007, 0xa0000000, 0 , 0, | |
20064 | CP1_ }, /* POOL32F_0 */ | |
20065 | { reserved_block , 0 , 0 , 32, | |
20066 | 0xfc000007, 0xa0000001, 0 , 0, | |
20067 | CP1_ }, /* POOL32F~*(1) */ | |
20068 | { reserved_block , 0 , 0 , 32, | |
20069 | 0xfc000007, 0xa0000002, 0 , 0, | |
20070 | CP1_ }, /* POOL32F~*(2) */ | |
20071 | { pool , POOL32F_3 , 8 , 32, | |
20072 | 0xfc000007, 0xa0000003, 0 , 0, | |
20073 | CP1_ }, /* POOL32F_3 */ | |
20074 | { reserved_block , 0 , 0 , 32, | |
20075 | 0xfc000007, 0xa0000004, 0 , 0, | |
20076 | CP1_ }, /* POOL32F~*(4) */ | |
20077 | { pool , POOL32F_5 , 8 , 32, | |
20078 | 0xfc000007, 0xa0000005, 0 , 0, | |
20079 | CP1_ }, /* POOL32F_5 */ | |
20080 | { reserved_block , 0 , 0 , 32, | |
20081 | 0xfc000007, 0xa0000006, 0 , 0, | |
20082 | CP1_ }, /* POOL32F~*(6) */ | |
20083 | { reserved_block , 0 , 0 , 32, | |
20084 | 0xfc000007, 0xa0000007, 0 , 0, | |
20085 | CP1_ }, /* POOL32F~*(7) */ | |
20086 | }; | |
20087 | ||
20088 | ||
a1465490 | 20089 | static const Pool POOL32S_0[64] = { |
89a955e8 AM |
20090 | { reserved_block , 0 , 0 , 32, |
20091 | 0xfc0001ff, 0xc0000000, 0 , 0, | |
20092 | 0x0 }, /* POOL32S_0~*(0) */ | |
20093 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20094 | 0xfc0001ff, 0xc0000008, &DLSA , 0, |
89a955e8 AM |
20095 | MIPS64_ }, /* DLSA */ |
20096 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20097 | 0xfc0001ff, 0xc0000010, &DSLLV , 0, |
89a955e8 AM |
20098 | MIPS64_ }, /* DSLLV */ |
20099 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20100 | 0xfc0001ff, 0xc0000018, &DMUL , 0, |
89a955e8 AM |
20101 | MIPS64_ }, /* DMUL */ |
20102 | { reserved_block , 0 , 0 , 32, | |
20103 | 0xfc0001ff, 0xc0000020, 0 , 0, | |
20104 | 0x0 }, /* POOL32S_0~*(4) */ | |
20105 | { reserved_block , 0 , 0 , 32, | |
20106 | 0xfc0001ff, 0xc0000028, 0 , 0, | |
20107 | 0x0 }, /* POOL32S_0~*(5) */ | |
20108 | { reserved_block , 0 , 0 , 32, | |
20109 | 0xfc0001ff, 0xc0000030, 0 , 0, | |
20110 | 0x0 }, /* POOL32S_0~*(6) */ | |
20111 | { reserved_block , 0 , 0 , 32, | |
20112 | 0xfc0001ff, 0xc0000038, 0 , 0, | |
20113 | 0x0 }, /* POOL32S_0~*(7) */ | |
20114 | { reserved_block , 0 , 0 , 32, | |
20115 | 0xfc0001ff, 0xc0000040, 0 , 0, | |
20116 | 0x0 }, /* POOL32S_0~*(8) */ | |
20117 | { reserved_block , 0 , 0 , 32, | |
20118 | 0xfc0001ff, 0xc0000048, 0 , 0, | |
20119 | 0x0 }, /* POOL32S_0~*(9) */ | |
20120 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20121 | 0xfc0001ff, 0xc0000050, &DSRLV , 0, |
89a955e8 AM |
20122 | MIPS64_ }, /* DSRLV */ |
20123 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20124 | 0xfc0001ff, 0xc0000058, &DMUH , 0, |
89a955e8 AM |
20125 | MIPS64_ }, /* DMUH */ |
20126 | { reserved_block , 0 , 0 , 32, | |
20127 | 0xfc0001ff, 0xc0000060, 0 , 0, | |
20128 | 0x0 }, /* POOL32S_0~*(12) */ | |
20129 | { reserved_block , 0 , 0 , 32, | |
20130 | 0xfc0001ff, 0xc0000068, 0 , 0, | |
20131 | 0x0 }, /* POOL32S_0~*(13) */ | |
20132 | { reserved_block , 0 , 0 , 32, | |
20133 | 0xfc0001ff, 0xc0000070, 0 , 0, | |
20134 | 0x0 }, /* POOL32S_0~*(14) */ | |
20135 | { reserved_block , 0 , 0 , 32, | |
20136 | 0xfc0001ff, 0xc0000078, 0 , 0, | |
20137 | 0x0 }, /* POOL32S_0~*(15) */ | |
20138 | { reserved_block , 0 , 0 , 32, | |
20139 | 0xfc0001ff, 0xc0000080, 0 , 0, | |
20140 | 0x0 }, /* POOL32S_0~*(16) */ | |
20141 | { reserved_block , 0 , 0 , 32, | |
20142 | 0xfc0001ff, 0xc0000088, 0 , 0, | |
20143 | 0x0 }, /* POOL32S_0~*(17) */ | |
20144 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20145 | 0xfc0001ff, 0xc0000090, &DSRAV , 0, |
89a955e8 AM |
20146 | MIPS64_ }, /* DSRAV */ |
20147 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20148 | 0xfc0001ff, 0xc0000098, &DMULU , 0, |
89a955e8 AM |
20149 | MIPS64_ }, /* DMULU */ |
20150 | { reserved_block , 0 , 0 , 32, | |
20151 | 0xfc0001ff, 0xc00000a0, 0 , 0, | |
20152 | 0x0 }, /* POOL32S_0~*(20) */ | |
20153 | { reserved_block , 0 , 0 , 32, | |
20154 | 0xfc0001ff, 0xc00000a8, 0 , 0, | |
20155 | 0x0 }, /* POOL32S_0~*(21) */ | |
20156 | { reserved_block , 0 , 0 , 32, | |
20157 | 0xfc0001ff, 0xc00000b0, 0 , 0, | |
20158 | 0x0 }, /* POOL32S_0~*(22) */ | |
20159 | { reserved_block , 0 , 0 , 32, | |
20160 | 0xfc0001ff, 0xc00000b8, 0 , 0, | |
20161 | 0x0 }, /* POOL32S_0~*(23) */ | |
20162 | { reserved_block , 0 , 0 , 32, | |
20163 | 0xfc0001ff, 0xc00000c0, 0 , 0, | |
20164 | 0x0 }, /* POOL32S_0~*(24) */ | |
20165 | { reserved_block , 0 , 0 , 32, | |
20166 | 0xfc0001ff, 0xc00000c8, 0 , 0, | |
20167 | 0x0 }, /* POOL32S_0~*(25) */ | |
20168 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20169 | 0xfc0001ff, 0xc00000d0, &DROTRV , 0, |
89a955e8 AM |
20170 | MIPS64_ }, /* DROTRV */ |
20171 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20172 | 0xfc0001ff, 0xc00000d8, &DMUHU , 0, |
89a955e8 AM |
20173 | MIPS64_ }, /* DMUHU */ |
20174 | { reserved_block , 0 , 0 , 32, | |
20175 | 0xfc0001ff, 0xc00000e0, 0 , 0, | |
20176 | 0x0 }, /* POOL32S_0~*(28) */ | |
20177 | { reserved_block , 0 , 0 , 32, | |
20178 | 0xfc0001ff, 0xc00000e8, 0 , 0, | |
20179 | 0x0 }, /* POOL32S_0~*(29) */ | |
20180 | { reserved_block , 0 , 0 , 32, | |
20181 | 0xfc0001ff, 0xc00000f0, 0 , 0, | |
20182 | 0x0 }, /* POOL32S_0~*(30) */ | |
20183 | { reserved_block , 0 , 0 , 32, | |
20184 | 0xfc0001ff, 0xc00000f8, 0 , 0, | |
20185 | 0x0 }, /* POOL32S_0~*(31) */ | |
20186 | { reserved_block , 0 , 0 , 32, | |
20187 | 0xfc0001ff, 0xc0000100, 0 , 0, | |
20188 | 0x0 }, /* POOL32S_0~*(32) */ | |
20189 | { reserved_block , 0 , 0 , 32, | |
20190 | 0xfc0001ff, 0xc0000108, 0 , 0, | |
20191 | 0x0 }, /* POOL32S_0~*(33) */ | |
20192 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20193 | 0xfc0001ff, 0xc0000110, &DADD , 0, |
89a955e8 AM |
20194 | MIPS64_ }, /* DADD */ |
20195 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20196 | 0xfc0001ff, 0xc0000118, &DDIV , 0, |
89a955e8 AM |
20197 | MIPS64_ }, /* DDIV */ |
20198 | { reserved_block , 0 , 0 , 32, | |
20199 | 0xfc0001ff, 0xc0000120, 0 , 0, | |
20200 | 0x0 }, /* POOL32S_0~*(36) */ | |
20201 | { reserved_block , 0 , 0 , 32, | |
20202 | 0xfc0001ff, 0xc0000128, 0 , 0, | |
20203 | 0x0 }, /* POOL32S_0~*(37) */ | |
20204 | { reserved_block , 0 , 0 , 32, | |
20205 | 0xfc0001ff, 0xc0000130, 0 , 0, | |
20206 | 0x0 }, /* POOL32S_0~*(38) */ | |
20207 | { reserved_block , 0 , 0 , 32, | |
20208 | 0xfc0001ff, 0xc0000138, 0 , 0, | |
20209 | 0x0 }, /* POOL32S_0~*(39) */ | |
20210 | { reserved_block , 0 , 0 , 32, | |
20211 | 0xfc0001ff, 0xc0000140, 0 , 0, | |
20212 | 0x0 }, /* POOL32S_0~*(40) */ | |
20213 | { reserved_block , 0 , 0 , 32, | |
20214 | 0xfc0001ff, 0xc0000148, 0 , 0, | |
20215 | 0x0 }, /* POOL32S_0~*(41) */ | |
20216 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20217 | 0xfc0001ff, 0xc0000150, &DADDU , 0, |
89a955e8 AM |
20218 | MIPS64_ }, /* DADDU */ |
20219 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20220 | 0xfc0001ff, 0xc0000158, &DMOD , 0, |
89a955e8 AM |
20221 | MIPS64_ }, /* DMOD */ |
20222 | { reserved_block , 0 , 0 , 32, | |
20223 | 0xfc0001ff, 0xc0000160, 0 , 0, | |
20224 | 0x0 }, /* POOL32S_0~*(44) */ | |
20225 | { reserved_block , 0 , 0 , 32, | |
20226 | 0xfc0001ff, 0xc0000168, 0 , 0, | |
20227 | 0x0 }, /* POOL32S_0~*(45) */ | |
20228 | { reserved_block , 0 , 0 , 32, | |
20229 | 0xfc0001ff, 0xc0000170, 0 , 0, | |
20230 | 0x0 }, /* POOL32S_0~*(46) */ | |
20231 | { reserved_block , 0 , 0 , 32, | |
20232 | 0xfc0001ff, 0xc0000178, 0 , 0, | |
20233 | 0x0 }, /* POOL32S_0~*(47) */ | |
20234 | { reserved_block , 0 , 0 , 32, | |
20235 | 0xfc0001ff, 0xc0000180, 0 , 0, | |
20236 | 0x0 }, /* POOL32S_0~*(48) */ | |
20237 | { reserved_block , 0 , 0 , 32, | |
20238 | 0xfc0001ff, 0xc0000188, 0 , 0, | |
20239 | 0x0 }, /* POOL32S_0~*(49) */ | |
20240 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20241 | 0xfc0001ff, 0xc0000190, &DSUB , 0, |
89a955e8 AM |
20242 | MIPS64_ }, /* DSUB */ |
20243 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20244 | 0xfc0001ff, 0xc0000198, &DDIVU , 0, |
89a955e8 AM |
20245 | MIPS64_ }, /* DDIVU */ |
20246 | { reserved_block , 0 , 0 , 32, | |
20247 | 0xfc0001ff, 0xc00001a0, 0 , 0, | |
20248 | 0x0 }, /* POOL32S_0~*(52) */ | |
20249 | { reserved_block , 0 , 0 , 32, | |
20250 | 0xfc0001ff, 0xc00001a8, 0 , 0, | |
20251 | 0x0 }, /* POOL32S_0~*(53) */ | |
20252 | { reserved_block , 0 , 0 , 32, | |
20253 | 0xfc0001ff, 0xc00001b0, 0 , 0, | |
20254 | 0x0 }, /* POOL32S_0~*(54) */ | |
20255 | { reserved_block , 0 , 0 , 32, | |
20256 | 0xfc0001ff, 0xc00001b8, 0 , 0, | |
20257 | 0x0 }, /* POOL32S_0~*(55) */ | |
20258 | { reserved_block , 0 , 0 , 32, | |
20259 | 0xfc0001ff, 0xc00001c0, 0 , 0, | |
20260 | 0x0 }, /* POOL32S_0~*(56) */ | |
20261 | { reserved_block , 0 , 0 , 32, | |
20262 | 0xfc0001ff, 0xc00001c8, 0 , 0, | |
20263 | 0x0 }, /* POOL32S_0~*(57) */ | |
20264 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20265 | 0xfc0001ff, 0xc00001d0, &DSUBU , 0, |
89a955e8 AM |
20266 | MIPS64_ }, /* DSUBU */ |
20267 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20268 | 0xfc0001ff, 0xc00001d8, &DMODU , 0, |
89a955e8 AM |
20269 | MIPS64_ }, /* DMODU */ |
20270 | { reserved_block , 0 , 0 , 32, | |
20271 | 0xfc0001ff, 0xc00001e0, 0 , 0, | |
20272 | 0x0 }, /* POOL32S_0~*(60) */ | |
20273 | { reserved_block , 0 , 0 , 32, | |
20274 | 0xfc0001ff, 0xc00001e8, 0 , 0, | |
20275 | 0x0 }, /* POOL32S_0~*(61) */ | |
20276 | { reserved_block , 0 , 0 , 32, | |
20277 | 0xfc0001ff, 0xc00001f0, 0 , 0, | |
20278 | 0x0 }, /* POOL32S_0~*(62) */ | |
20279 | { reserved_block , 0 , 0 , 32, | |
20280 | 0xfc0001ff, 0xc00001f8, 0 , 0, | |
20281 | 0x0 }, /* POOL32S_0~*(63) */ | |
20282 | }; | |
20283 | ||
20284 | ||
a1465490 | 20285 | static const Pool POOL32Sxf_4[128] = { |
89a955e8 AM |
20286 | { reserved_block , 0 , 0 , 32, |
20287 | 0xfc00ffff, 0xc000013c, 0 , 0, | |
20288 | 0x0 }, /* POOL32Sxf_4~*(0) */ | |
20289 | { reserved_block , 0 , 0 , 32, | |
20290 | 0xfc00ffff, 0xc000033c, 0 , 0, | |
20291 | 0x0 }, /* POOL32Sxf_4~*(1) */ | |
20292 | { reserved_block , 0 , 0 , 32, | |
20293 | 0xfc00ffff, 0xc000053c, 0 , 0, | |
20294 | 0x0 }, /* POOL32Sxf_4~*(2) */ | |
20295 | { reserved_block , 0 , 0 , 32, | |
20296 | 0xfc00ffff, 0xc000073c, 0 , 0, | |
20297 | 0x0 }, /* POOL32Sxf_4~*(3) */ | |
20298 | { reserved_block , 0 , 0 , 32, | |
20299 | 0xfc00ffff, 0xc000093c, 0 , 0, | |
20300 | 0x0 }, /* POOL32Sxf_4~*(4) */ | |
20301 | { reserved_block , 0 , 0 , 32, | |
20302 | 0xfc00ffff, 0xc0000b3c, 0 , 0, | |
20303 | 0x0 }, /* POOL32Sxf_4~*(5) */ | |
20304 | { reserved_block , 0 , 0 , 32, | |
20305 | 0xfc00ffff, 0xc0000d3c, 0 , 0, | |
20306 | 0x0 }, /* POOL32Sxf_4~*(6) */ | |
20307 | { reserved_block , 0 , 0 , 32, | |
20308 | 0xfc00ffff, 0xc0000f3c, 0 , 0, | |
20309 | 0x0 }, /* POOL32Sxf_4~*(7) */ | |
20310 | { reserved_block , 0 , 0 , 32, | |
20311 | 0xfc00ffff, 0xc000113c, 0 , 0, | |
20312 | 0x0 }, /* POOL32Sxf_4~*(8) */ | |
20313 | { reserved_block , 0 , 0 , 32, | |
20314 | 0xfc00ffff, 0xc000133c, 0 , 0, | |
20315 | 0x0 }, /* POOL32Sxf_4~*(9) */ | |
20316 | { reserved_block , 0 , 0 , 32, | |
20317 | 0xfc00ffff, 0xc000153c, 0 , 0, | |
20318 | 0x0 }, /* POOL32Sxf_4~*(10) */ | |
20319 | { reserved_block , 0 , 0 , 32, | |
20320 | 0xfc00ffff, 0xc000173c, 0 , 0, | |
20321 | 0x0 }, /* POOL32Sxf_4~*(11) */ | |
20322 | { reserved_block , 0 , 0 , 32, | |
20323 | 0xfc00ffff, 0xc000193c, 0 , 0, | |
20324 | 0x0 }, /* POOL32Sxf_4~*(12) */ | |
20325 | { reserved_block , 0 , 0 , 32, | |
20326 | 0xfc00ffff, 0xc0001b3c, 0 , 0, | |
20327 | 0x0 }, /* POOL32Sxf_4~*(13) */ | |
20328 | { reserved_block , 0 , 0 , 32, | |
20329 | 0xfc00ffff, 0xc0001d3c, 0 , 0, | |
20330 | 0x0 }, /* POOL32Sxf_4~*(14) */ | |
20331 | { reserved_block , 0 , 0 , 32, | |
20332 | 0xfc00ffff, 0xc0001f3c, 0 , 0, | |
20333 | 0x0 }, /* POOL32Sxf_4~*(15) */ | |
20334 | { reserved_block , 0 , 0 , 32, | |
20335 | 0xfc00ffff, 0xc000213c, 0 , 0, | |
20336 | 0x0 }, /* POOL32Sxf_4~*(16) */ | |
20337 | { reserved_block , 0 , 0 , 32, | |
20338 | 0xfc00ffff, 0xc000233c, 0 , 0, | |
20339 | 0x0 }, /* POOL32Sxf_4~*(17) */ | |
20340 | { reserved_block , 0 , 0 , 32, | |
20341 | 0xfc00ffff, 0xc000253c, 0 , 0, | |
20342 | 0x0 }, /* POOL32Sxf_4~*(18) */ | |
20343 | { reserved_block , 0 , 0 , 32, | |
20344 | 0xfc00ffff, 0xc000273c, 0 , 0, | |
20345 | 0x0 }, /* POOL32Sxf_4~*(19) */ | |
20346 | { reserved_block , 0 , 0 , 32, | |
20347 | 0xfc00ffff, 0xc000293c, 0 , 0, | |
20348 | 0x0 }, /* POOL32Sxf_4~*(20) */ | |
20349 | { reserved_block , 0 , 0 , 32, | |
20350 | 0xfc00ffff, 0xc0002b3c, 0 , 0, | |
20351 | 0x0 }, /* POOL32Sxf_4~*(21) */ | |
20352 | { reserved_block , 0 , 0 , 32, | |
20353 | 0xfc00ffff, 0xc0002d3c, 0 , 0, | |
20354 | 0x0 }, /* POOL32Sxf_4~*(22) */ | |
20355 | { reserved_block , 0 , 0 , 32, | |
20356 | 0xfc00ffff, 0xc0002f3c, 0 , 0, | |
20357 | 0x0 }, /* POOL32Sxf_4~*(23) */ | |
20358 | { reserved_block , 0 , 0 , 32, | |
20359 | 0xfc00ffff, 0xc000313c, 0 , 0, | |
20360 | 0x0 }, /* POOL32Sxf_4~*(24) */ | |
20361 | { reserved_block , 0 , 0 , 32, | |
20362 | 0xfc00ffff, 0xc000333c, 0 , 0, | |
20363 | 0x0 }, /* POOL32Sxf_4~*(25) */ | |
20364 | { reserved_block , 0 , 0 , 32, | |
20365 | 0xfc00ffff, 0xc000353c, 0 , 0, | |
20366 | 0x0 }, /* POOL32Sxf_4~*(26) */ | |
20367 | { reserved_block , 0 , 0 , 32, | |
20368 | 0xfc00ffff, 0xc000373c, 0 , 0, | |
20369 | 0x0 }, /* POOL32Sxf_4~*(27) */ | |
20370 | { reserved_block , 0 , 0 , 32, | |
20371 | 0xfc00ffff, 0xc000393c, 0 , 0, | |
20372 | 0x0 }, /* POOL32Sxf_4~*(28) */ | |
20373 | { reserved_block , 0 , 0 , 32, | |
20374 | 0xfc00ffff, 0xc0003b3c, 0 , 0, | |
20375 | 0x0 }, /* POOL32Sxf_4~*(29) */ | |
20376 | { reserved_block , 0 , 0 , 32, | |
20377 | 0xfc00ffff, 0xc0003d3c, 0 , 0, | |
20378 | 0x0 }, /* POOL32Sxf_4~*(30) */ | |
20379 | { reserved_block , 0 , 0 , 32, | |
20380 | 0xfc00ffff, 0xc0003f3c, 0 , 0, | |
20381 | 0x0 }, /* POOL32Sxf_4~*(31) */ | |
20382 | { reserved_block , 0 , 0 , 32, | |
20383 | 0xfc00ffff, 0xc000413c, 0 , 0, | |
20384 | 0x0 }, /* POOL32Sxf_4~*(32) */ | |
20385 | { reserved_block , 0 , 0 , 32, | |
20386 | 0xfc00ffff, 0xc000433c, 0 , 0, | |
20387 | 0x0 }, /* POOL32Sxf_4~*(33) */ | |
20388 | { reserved_block , 0 , 0 , 32, | |
20389 | 0xfc00ffff, 0xc000453c, 0 , 0, | |
20390 | 0x0 }, /* POOL32Sxf_4~*(34) */ | |
20391 | { reserved_block , 0 , 0 , 32, | |
20392 | 0xfc00ffff, 0xc000473c, 0 , 0, | |
20393 | 0x0 }, /* POOL32Sxf_4~*(35) */ | |
20394 | { reserved_block , 0 , 0 , 32, | |
20395 | 0xfc00ffff, 0xc000493c, 0 , 0, | |
20396 | 0x0 }, /* POOL32Sxf_4~*(36) */ | |
20397 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20398 | 0xfc00ffff, 0xc0004b3c, &DCLO , 0, |
89a955e8 AM |
20399 | MIPS64_ }, /* DCLO */ |
20400 | { reserved_block , 0 , 0 , 32, | |
20401 | 0xfc00ffff, 0xc0004d3c, 0 , 0, | |
20402 | 0x0 }, /* POOL32Sxf_4~*(38) */ | |
20403 | { reserved_block , 0 , 0 , 32, | |
20404 | 0xfc00ffff, 0xc0004f3c, 0 , 0, | |
20405 | 0x0 }, /* POOL32Sxf_4~*(39) */ | |
20406 | { reserved_block , 0 , 0 , 32, | |
20407 | 0xfc00ffff, 0xc000513c, 0 , 0, | |
20408 | 0x0 }, /* POOL32Sxf_4~*(40) */ | |
20409 | { reserved_block , 0 , 0 , 32, | |
20410 | 0xfc00ffff, 0xc000533c, 0 , 0, | |
20411 | 0x0 }, /* POOL32Sxf_4~*(41) */ | |
20412 | { reserved_block , 0 , 0 , 32, | |
20413 | 0xfc00ffff, 0xc000553c, 0 , 0, | |
20414 | 0x0 }, /* POOL32Sxf_4~*(42) */ | |
20415 | { reserved_block , 0 , 0 , 32, | |
20416 | 0xfc00ffff, 0xc000573c, 0 , 0, | |
20417 | 0x0 }, /* POOL32Sxf_4~*(43) */ | |
20418 | { reserved_block , 0 , 0 , 32, | |
20419 | 0xfc00ffff, 0xc000593c, 0 , 0, | |
20420 | 0x0 }, /* POOL32Sxf_4~*(44) */ | |
20421 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20422 | 0xfc00ffff, 0xc0005b3c, &DCLZ , 0, |
89a955e8 AM |
20423 | MIPS64_ }, /* DCLZ */ |
20424 | { reserved_block , 0 , 0 , 32, | |
20425 | 0xfc00ffff, 0xc0005d3c, 0 , 0, | |
20426 | 0x0 }, /* POOL32Sxf_4~*(46) */ | |
20427 | { reserved_block , 0 , 0 , 32, | |
20428 | 0xfc00ffff, 0xc0005f3c, 0 , 0, | |
20429 | 0x0 }, /* POOL32Sxf_4~*(47) */ | |
20430 | { reserved_block , 0 , 0 , 32, | |
20431 | 0xfc00ffff, 0xc000613c, 0 , 0, | |
20432 | 0x0 }, /* POOL32Sxf_4~*(48) */ | |
20433 | { reserved_block , 0 , 0 , 32, | |
20434 | 0xfc00ffff, 0xc000633c, 0 , 0, | |
20435 | 0x0 }, /* POOL32Sxf_4~*(49) */ | |
20436 | { reserved_block , 0 , 0 , 32, | |
20437 | 0xfc00ffff, 0xc000653c, 0 , 0, | |
20438 | 0x0 }, /* POOL32Sxf_4~*(50) */ | |
20439 | { reserved_block , 0 , 0 , 32, | |
20440 | 0xfc00ffff, 0xc000673c, 0 , 0, | |
20441 | 0x0 }, /* POOL32Sxf_4~*(51) */ | |
20442 | { reserved_block , 0 , 0 , 32, | |
20443 | 0xfc00ffff, 0xc000693c, 0 , 0, | |
20444 | 0x0 }, /* POOL32Sxf_4~*(52) */ | |
20445 | { reserved_block , 0 , 0 , 32, | |
20446 | 0xfc00ffff, 0xc0006b3c, 0 , 0, | |
20447 | 0x0 }, /* POOL32Sxf_4~*(53) */ | |
20448 | { reserved_block , 0 , 0 , 32, | |
20449 | 0xfc00ffff, 0xc0006d3c, 0 , 0, | |
20450 | 0x0 }, /* POOL32Sxf_4~*(54) */ | |
20451 | { reserved_block , 0 , 0 , 32, | |
20452 | 0xfc00ffff, 0xc0006f3c, 0 , 0, | |
20453 | 0x0 }, /* POOL32Sxf_4~*(55) */ | |
20454 | { reserved_block , 0 , 0 , 32, | |
20455 | 0xfc00ffff, 0xc000713c, 0 , 0, | |
20456 | 0x0 }, /* POOL32Sxf_4~*(56) */ | |
20457 | { reserved_block , 0 , 0 , 32, | |
20458 | 0xfc00ffff, 0xc000733c, 0 , 0, | |
20459 | 0x0 }, /* POOL32Sxf_4~*(57) */ | |
20460 | { reserved_block , 0 , 0 , 32, | |
20461 | 0xfc00ffff, 0xc000753c, 0 , 0, | |
20462 | 0x0 }, /* POOL32Sxf_4~*(58) */ | |
20463 | { reserved_block , 0 , 0 , 32, | |
20464 | 0xfc00ffff, 0xc000773c, 0 , 0, | |
20465 | 0x0 }, /* POOL32Sxf_4~*(59) */ | |
20466 | { reserved_block , 0 , 0 , 32, | |
20467 | 0xfc00ffff, 0xc000793c, 0 , 0, | |
20468 | 0x0 }, /* POOL32Sxf_4~*(60) */ | |
20469 | { reserved_block , 0 , 0 , 32, | |
20470 | 0xfc00ffff, 0xc0007b3c, 0 , 0, | |
20471 | 0x0 }, /* POOL32Sxf_4~*(61) */ | |
20472 | { reserved_block , 0 , 0 , 32, | |
20473 | 0xfc00ffff, 0xc0007d3c, 0 , 0, | |
20474 | 0x0 }, /* POOL32Sxf_4~*(62) */ | |
20475 | { reserved_block , 0 , 0 , 32, | |
20476 | 0xfc00ffff, 0xc0007f3c, 0 , 0, | |
20477 | 0x0 }, /* POOL32Sxf_4~*(63) */ | |
20478 | { reserved_block , 0 , 0 , 32, | |
20479 | 0xfc00ffff, 0xc000813c, 0 , 0, | |
20480 | 0x0 }, /* POOL32Sxf_4~*(64) */ | |
20481 | { reserved_block , 0 , 0 , 32, | |
20482 | 0xfc00ffff, 0xc000833c, 0 , 0, | |
20483 | 0x0 }, /* POOL32Sxf_4~*(65) */ | |
20484 | { reserved_block , 0 , 0 , 32, | |
20485 | 0xfc00ffff, 0xc000853c, 0 , 0, | |
20486 | 0x0 }, /* POOL32Sxf_4~*(66) */ | |
20487 | { reserved_block , 0 , 0 , 32, | |
20488 | 0xfc00ffff, 0xc000873c, 0 , 0, | |
20489 | 0x0 }, /* POOL32Sxf_4~*(67) */ | |
20490 | { reserved_block , 0 , 0 , 32, | |
20491 | 0xfc00ffff, 0xc000893c, 0 , 0, | |
20492 | 0x0 }, /* POOL32Sxf_4~*(68) */ | |
20493 | { reserved_block , 0 , 0 , 32, | |
20494 | 0xfc00ffff, 0xc0008b3c, 0 , 0, | |
20495 | 0x0 }, /* POOL32Sxf_4~*(69) */ | |
20496 | { reserved_block , 0 , 0 , 32, | |
20497 | 0xfc00ffff, 0xc0008d3c, 0 , 0, | |
20498 | 0x0 }, /* POOL32Sxf_4~*(70) */ | |
20499 | { reserved_block , 0 , 0 , 32, | |
20500 | 0xfc00ffff, 0xc0008f3c, 0 , 0, | |
20501 | 0x0 }, /* POOL32Sxf_4~*(71) */ | |
20502 | { reserved_block , 0 , 0 , 32, | |
20503 | 0xfc00ffff, 0xc000913c, 0 , 0, | |
20504 | 0x0 }, /* POOL32Sxf_4~*(72) */ | |
20505 | { reserved_block , 0 , 0 , 32, | |
20506 | 0xfc00ffff, 0xc000933c, 0 , 0, | |
20507 | 0x0 }, /* POOL32Sxf_4~*(73) */ | |
20508 | { reserved_block , 0 , 0 , 32, | |
20509 | 0xfc00ffff, 0xc000953c, 0 , 0, | |
20510 | 0x0 }, /* POOL32Sxf_4~*(74) */ | |
20511 | { reserved_block , 0 , 0 , 32, | |
20512 | 0xfc00ffff, 0xc000973c, 0 , 0, | |
20513 | 0x0 }, /* POOL32Sxf_4~*(75) */ | |
20514 | { reserved_block , 0 , 0 , 32, | |
20515 | 0xfc00ffff, 0xc000993c, 0 , 0, | |
20516 | 0x0 }, /* POOL32Sxf_4~*(76) */ | |
20517 | { reserved_block , 0 , 0 , 32, | |
20518 | 0xfc00ffff, 0xc0009b3c, 0 , 0, | |
20519 | 0x0 }, /* POOL32Sxf_4~*(77) */ | |
20520 | { reserved_block , 0 , 0 , 32, | |
20521 | 0xfc00ffff, 0xc0009d3c, 0 , 0, | |
20522 | 0x0 }, /* POOL32Sxf_4~*(78) */ | |
20523 | { reserved_block , 0 , 0 , 32, | |
20524 | 0xfc00ffff, 0xc0009f3c, 0 , 0, | |
20525 | 0x0 }, /* POOL32Sxf_4~*(79) */ | |
20526 | { reserved_block , 0 , 0 , 32, | |
20527 | 0xfc00ffff, 0xc000a13c, 0 , 0, | |
20528 | 0x0 }, /* POOL32Sxf_4~*(80) */ | |
20529 | { reserved_block , 0 , 0 , 32, | |
20530 | 0xfc00ffff, 0xc000a33c, 0 , 0, | |
20531 | 0x0 }, /* POOL32Sxf_4~*(81) */ | |
20532 | { reserved_block , 0 , 0 , 32, | |
20533 | 0xfc00ffff, 0xc000a53c, 0 , 0, | |
20534 | 0x0 }, /* POOL32Sxf_4~*(82) */ | |
20535 | { reserved_block , 0 , 0 , 32, | |
20536 | 0xfc00ffff, 0xc000a73c, 0 , 0, | |
20537 | 0x0 }, /* POOL32Sxf_4~*(83) */ | |
20538 | { reserved_block , 0 , 0 , 32, | |
20539 | 0xfc00ffff, 0xc000a93c, 0 , 0, | |
20540 | 0x0 }, /* POOL32Sxf_4~*(84) */ | |
20541 | { reserved_block , 0 , 0 , 32, | |
20542 | 0xfc00ffff, 0xc000ab3c, 0 , 0, | |
20543 | 0x0 }, /* POOL32Sxf_4~*(85) */ | |
20544 | { reserved_block , 0 , 0 , 32, | |
20545 | 0xfc00ffff, 0xc000ad3c, 0 , 0, | |
20546 | 0x0 }, /* POOL32Sxf_4~*(86) */ | |
20547 | { reserved_block , 0 , 0 , 32, | |
20548 | 0xfc00ffff, 0xc000af3c, 0 , 0, | |
20549 | 0x0 }, /* POOL32Sxf_4~*(87) */ | |
20550 | { reserved_block , 0 , 0 , 32, | |
20551 | 0xfc00ffff, 0xc000b13c, 0 , 0, | |
20552 | 0x0 }, /* POOL32Sxf_4~*(88) */ | |
20553 | { reserved_block , 0 , 0 , 32, | |
20554 | 0xfc00ffff, 0xc000b33c, 0 , 0, | |
20555 | 0x0 }, /* POOL32Sxf_4~*(89) */ | |
20556 | { reserved_block , 0 , 0 , 32, | |
20557 | 0xfc00ffff, 0xc000b53c, 0 , 0, | |
20558 | 0x0 }, /* POOL32Sxf_4~*(90) */ | |
20559 | { reserved_block , 0 , 0 , 32, | |
20560 | 0xfc00ffff, 0xc000b73c, 0 , 0, | |
20561 | 0x0 }, /* POOL32Sxf_4~*(91) */ | |
20562 | { reserved_block , 0 , 0 , 32, | |
20563 | 0xfc00ffff, 0xc000b93c, 0 , 0, | |
20564 | 0x0 }, /* POOL32Sxf_4~*(92) */ | |
20565 | { reserved_block , 0 , 0 , 32, | |
20566 | 0xfc00ffff, 0xc000bb3c, 0 , 0, | |
20567 | 0x0 }, /* POOL32Sxf_4~*(93) */ | |
20568 | { reserved_block , 0 , 0 , 32, | |
20569 | 0xfc00ffff, 0xc000bd3c, 0 , 0, | |
20570 | 0x0 }, /* POOL32Sxf_4~*(94) */ | |
20571 | { reserved_block , 0 , 0 , 32, | |
20572 | 0xfc00ffff, 0xc000bf3c, 0 , 0, | |
20573 | 0x0 }, /* POOL32Sxf_4~*(95) */ | |
20574 | { reserved_block , 0 , 0 , 32, | |
20575 | 0xfc00ffff, 0xc000c13c, 0 , 0, | |
20576 | 0x0 }, /* POOL32Sxf_4~*(96) */ | |
20577 | { reserved_block , 0 , 0 , 32, | |
20578 | 0xfc00ffff, 0xc000c33c, 0 , 0, | |
20579 | 0x0 }, /* POOL32Sxf_4~*(97) */ | |
20580 | { reserved_block , 0 , 0 , 32, | |
20581 | 0xfc00ffff, 0xc000c53c, 0 , 0, | |
20582 | 0x0 }, /* POOL32Sxf_4~*(98) */ | |
20583 | { reserved_block , 0 , 0 , 32, | |
20584 | 0xfc00ffff, 0xc000c73c, 0 , 0, | |
20585 | 0x0 }, /* POOL32Sxf_4~*(99) */ | |
20586 | { reserved_block , 0 , 0 , 32, | |
20587 | 0xfc00ffff, 0xc000c93c, 0 , 0, | |
20588 | 0x0 }, /* POOL32Sxf_4~*(100) */ | |
20589 | { reserved_block , 0 , 0 , 32, | |
20590 | 0xfc00ffff, 0xc000cb3c, 0 , 0, | |
20591 | 0x0 }, /* POOL32Sxf_4~*(101) */ | |
20592 | { reserved_block , 0 , 0 , 32, | |
20593 | 0xfc00ffff, 0xc000cd3c, 0 , 0, | |
20594 | 0x0 }, /* POOL32Sxf_4~*(102) */ | |
20595 | { reserved_block , 0 , 0 , 32, | |
20596 | 0xfc00ffff, 0xc000cf3c, 0 , 0, | |
20597 | 0x0 }, /* POOL32Sxf_4~*(103) */ | |
20598 | { reserved_block , 0 , 0 , 32, | |
20599 | 0xfc00ffff, 0xc000d13c, 0 , 0, | |
20600 | 0x0 }, /* POOL32Sxf_4~*(104) */ | |
20601 | { reserved_block , 0 , 0 , 32, | |
20602 | 0xfc00ffff, 0xc000d33c, 0 , 0, | |
20603 | 0x0 }, /* POOL32Sxf_4~*(105) */ | |
20604 | { reserved_block , 0 , 0 , 32, | |
20605 | 0xfc00ffff, 0xc000d53c, 0 , 0, | |
20606 | 0x0 }, /* POOL32Sxf_4~*(106) */ | |
20607 | { reserved_block , 0 , 0 , 32, | |
20608 | 0xfc00ffff, 0xc000d73c, 0 , 0, | |
20609 | 0x0 }, /* POOL32Sxf_4~*(107) */ | |
20610 | { reserved_block , 0 , 0 , 32, | |
20611 | 0xfc00ffff, 0xc000d93c, 0 , 0, | |
20612 | 0x0 }, /* POOL32Sxf_4~*(108) */ | |
20613 | { reserved_block , 0 , 0 , 32, | |
20614 | 0xfc00ffff, 0xc000db3c, 0 , 0, | |
20615 | 0x0 }, /* POOL32Sxf_4~*(109) */ | |
20616 | { reserved_block , 0 , 0 , 32, | |
20617 | 0xfc00ffff, 0xc000dd3c, 0 , 0, | |
20618 | 0x0 }, /* POOL32Sxf_4~*(110) */ | |
20619 | { reserved_block , 0 , 0 , 32, | |
20620 | 0xfc00ffff, 0xc000df3c, 0 , 0, | |
20621 | 0x0 }, /* POOL32Sxf_4~*(111) */ | |
20622 | { reserved_block , 0 , 0 , 32, | |
20623 | 0xfc00ffff, 0xc000e13c, 0 , 0, | |
20624 | 0x0 }, /* POOL32Sxf_4~*(112) */ | |
20625 | { reserved_block , 0 , 0 , 32, | |
20626 | 0xfc00ffff, 0xc000e33c, 0 , 0, | |
20627 | 0x0 }, /* POOL32Sxf_4~*(113) */ | |
20628 | { reserved_block , 0 , 0 , 32, | |
20629 | 0xfc00ffff, 0xc000e53c, 0 , 0, | |
20630 | 0x0 }, /* POOL32Sxf_4~*(114) */ | |
20631 | { reserved_block , 0 , 0 , 32, | |
20632 | 0xfc00ffff, 0xc000e73c, 0 , 0, | |
20633 | 0x0 }, /* POOL32Sxf_4~*(115) */ | |
20634 | { reserved_block , 0 , 0 , 32, | |
20635 | 0xfc00ffff, 0xc000e93c, 0 , 0, | |
20636 | 0x0 }, /* POOL32Sxf_4~*(116) */ | |
20637 | { reserved_block , 0 , 0 , 32, | |
20638 | 0xfc00ffff, 0xc000eb3c, 0 , 0, | |
20639 | 0x0 }, /* POOL32Sxf_4~*(117) */ | |
20640 | { reserved_block , 0 , 0 , 32, | |
20641 | 0xfc00ffff, 0xc000ed3c, 0 , 0, | |
20642 | 0x0 }, /* POOL32Sxf_4~*(118) */ | |
20643 | { reserved_block , 0 , 0 , 32, | |
20644 | 0xfc00ffff, 0xc000ef3c, 0 , 0, | |
20645 | 0x0 }, /* POOL32Sxf_4~*(119) */ | |
20646 | { reserved_block , 0 , 0 , 32, | |
20647 | 0xfc00ffff, 0xc000f13c, 0 , 0, | |
20648 | 0x0 }, /* POOL32Sxf_4~*(120) */ | |
20649 | { reserved_block , 0 , 0 , 32, | |
20650 | 0xfc00ffff, 0xc000f33c, 0 , 0, | |
20651 | 0x0 }, /* POOL32Sxf_4~*(121) */ | |
20652 | { reserved_block , 0 , 0 , 32, | |
20653 | 0xfc00ffff, 0xc000f53c, 0 , 0, | |
20654 | 0x0 }, /* POOL32Sxf_4~*(122) */ | |
20655 | { reserved_block , 0 , 0 , 32, | |
20656 | 0xfc00ffff, 0xc000f73c, 0 , 0, | |
20657 | 0x0 }, /* POOL32Sxf_4~*(123) */ | |
20658 | { reserved_block , 0 , 0 , 32, | |
20659 | 0xfc00ffff, 0xc000f93c, 0 , 0, | |
20660 | 0x0 }, /* POOL32Sxf_4~*(124) */ | |
20661 | { reserved_block , 0 , 0 , 32, | |
20662 | 0xfc00ffff, 0xc000fb3c, 0 , 0, | |
20663 | 0x0 }, /* POOL32Sxf_4~*(125) */ | |
20664 | { reserved_block , 0 , 0 , 32, | |
20665 | 0xfc00ffff, 0xc000fd3c, 0 , 0, | |
20666 | 0x0 }, /* POOL32Sxf_4~*(126) */ | |
20667 | { reserved_block , 0 , 0 , 32, | |
20668 | 0xfc00ffff, 0xc000ff3c, 0 , 0, | |
20669 | 0x0 }, /* POOL32Sxf_4~*(127) */ | |
20670 | }; | |
20671 | ||
20672 | ||
a1465490 | 20673 | static const Pool POOL32Sxf[8] = { |
89a955e8 AM |
20674 | { reserved_block , 0 , 0 , 32, |
20675 | 0xfc0001ff, 0xc000003c, 0 , 0, | |
20676 | 0x0 }, /* POOL32Sxf~*(0) */ | |
20677 | { reserved_block , 0 , 0 , 32, | |
20678 | 0xfc0001ff, 0xc000007c, 0 , 0, | |
20679 | 0x0 }, /* POOL32Sxf~*(1) */ | |
20680 | { reserved_block , 0 , 0 , 32, | |
20681 | 0xfc0001ff, 0xc00000bc, 0 , 0, | |
20682 | 0x0 }, /* POOL32Sxf~*(2) */ | |
20683 | { reserved_block , 0 , 0 , 32, | |
20684 | 0xfc0001ff, 0xc00000fc, 0 , 0, | |
20685 | 0x0 }, /* POOL32Sxf~*(3) */ | |
20686 | { pool , POOL32Sxf_4 , 128 , 32, | |
20687 | 0xfc0001ff, 0xc000013c, 0 , 0, | |
20688 | 0x0 }, /* POOL32Sxf_4 */ | |
20689 | { reserved_block , 0 , 0 , 32, | |
20690 | 0xfc0001ff, 0xc000017c, 0 , 0, | |
20691 | 0x0 }, /* POOL32Sxf~*(5) */ | |
20692 | { reserved_block , 0 , 0 , 32, | |
20693 | 0xfc0001ff, 0xc00001bc, 0 , 0, | |
20694 | 0x0 }, /* POOL32Sxf~*(6) */ | |
20695 | { reserved_block , 0 , 0 , 32, | |
20696 | 0xfc0001ff, 0xc00001fc, 0 , 0, | |
20697 | 0x0 }, /* POOL32Sxf~*(7) */ | |
20698 | }; | |
20699 | ||
20700 | ||
a1465490 | 20701 | static const Pool POOL32S_4[8] = { |
89a955e8 | 20702 | { instruction , 0 , 0 , 32, |
8d416f6b | 20703 | 0xfc00003f, 0xc0000004, &EXTD , 0, |
89a955e8 AM |
20704 | MIPS64_ }, /* EXTD */ |
20705 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20706 | 0xfc00003f, 0xc000000c, &EXTD32 , 0, |
89a955e8 AM |
20707 | MIPS64_ }, /* EXTD32 */ |
20708 | { reserved_block , 0 , 0 , 32, | |
20709 | 0xfc00003f, 0xc0000014, 0 , 0, | |
20710 | 0x0 }, /* POOL32S_4~*(2) */ | |
20711 | { reserved_block , 0 , 0 , 32, | |
20712 | 0xfc00003f, 0xc000001c, 0 , 0, | |
20713 | 0x0 }, /* POOL32S_4~*(3) */ | |
20714 | { reserved_block , 0 , 0 , 32, | |
20715 | 0xfc00003f, 0xc0000024, 0 , 0, | |
20716 | 0x0 }, /* POOL32S_4~*(4) */ | |
20717 | { reserved_block , 0 , 0 , 32, | |
20718 | 0xfc00003f, 0xc000002c, 0 , 0, | |
20719 | 0x0 }, /* POOL32S_4~*(5) */ | |
20720 | { reserved_block , 0 , 0 , 32, | |
20721 | 0xfc00003f, 0xc0000034, 0 , 0, | |
20722 | 0x0 }, /* POOL32S_4~*(6) */ | |
20723 | { pool , POOL32Sxf , 8 , 32, | |
20724 | 0xfc00003f, 0xc000003c, 0 , 0, | |
20725 | 0x0 }, /* POOL32Sxf */ | |
20726 | }; | |
20727 | ||
20728 | ||
a1465490 | 20729 | static const Pool POOL32S[8] = { |
89a955e8 AM |
20730 | { pool , POOL32S_0 , 64 , 32, |
20731 | 0xfc000007, 0xc0000000, 0 , 0, | |
20732 | 0x0 }, /* POOL32S_0 */ | |
20733 | { reserved_block , 0 , 0 , 32, | |
20734 | 0xfc000007, 0xc0000001, 0 , 0, | |
20735 | 0x0 }, /* POOL32S~*(1) */ | |
20736 | { reserved_block , 0 , 0 , 32, | |
20737 | 0xfc000007, 0xc0000002, 0 , 0, | |
20738 | 0x0 }, /* POOL32S~*(2) */ | |
20739 | { reserved_block , 0 , 0 , 32, | |
20740 | 0xfc000007, 0xc0000003, 0 , 0, | |
20741 | 0x0 }, /* POOL32S~*(3) */ | |
20742 | { pool , POOL32S_4 , 8 , 32, | |
20743 | 0xfc000007, 0xc0000004, 0 , 0, | |
20744 | 0x0 }, /* POOL32S_4 */ | |
20745 | { reserved_block , 0 , 0 , 32, | |
20746 | 0xfc000007, 0xc0000005, 0 , 0, | |
20747 | 0x0 }, /* POOL32S~*(5) */ | |
20748 | { reserved_block , 0 , 0 , 32, | |
20749 | 0xfc000007, 0xc0000006, 0 , 0, | |
20750 | 0x0 }, /* POOL32S~*(6) */ | |
20751 | { reserved_block , 0 , 0 , 32, | |
20752 | 0xfc000007, 0xc0000007, 0 , 0, | |
20753 | 0x0 }, /* POOL32S~*(7) */ | |
20754 | }; | |
20755 | ||
20756 | ||
a1465490 | 20757 | static const Pool P_LUI[2] = { |
89a955e8 | 20758 | { instruction , 0 , 0 , 32, |
8d416f6b | 20759 | 0xfc000002, 0xe0000000, &LUI , 0, |
89a955e8 AM |
20760 | 0x0 }, /* LUI */ |
20761 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20762 | 0xfc000002, 0xe0000002, &ALUIPC , 0, |
89a955e8 AM |
20763 | 0x0 }, /* ALUIPC */ |
20764 | }; | |
20765 | ||
20766 | ||
a1465490 | 20767 | static const Pool P_GP_LH[2] = { |
89a955e8 | 20768 | { instruction , 0 , 0 , 32, |
8d416f6b | 20769 | 0xfc1c0001, 0x44100000, &LH_GP_ , 0, |
89a955e8 AM |
20770 | 0x0 }, /* LH[GP] */ |
20771 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20772 | 0xfc1c0001, 0x44100001, &LHU_GP_ , 0, |
89a955e8 AM |
20773 | 0x0 }, /* LHU[GP] */ |
20774 | }; | |
20775 | ||
20776 | ||
a1465490 | 20777 | static const Pool P_GP_SH[2] = { |
89a955e8 | 20778 | { instruction , 0 , 0 , 32, |
8d416f6b | 20779 | 0xfc1c0001, 0x44140000, &SH_GP_ , 0, |
89a955e8 AM |
20780 | 0x0 }, /* SH[GP] */ |
20781 | { reserved_block , 0 , 0 , 32, | |
20782 | 0xfc1c0001, 0x44140001, 0 , 0, | |
20783 | 0x0 }, /* P.GP.SH~*(1) */ | |
20784 | }; | |
20785 | ||
20786 | ||
a1465490 | 20787 | static const Pool P_GP_CP1[4] = { |
89a955e8 | 20788 | { instruction , 0 , 0 , 32, |
8d416f6b | 20789 | 0xfc1c0003, 0x44180000, &LWC1_GP_ , 0, |
89a955e8 AM |
20790 | CP1_ }, /* LWC1[GP] */ |
20791 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20792 | 0xfc1c0003, 0x44180001, &SWC1_GP_ , 0, |
89a955e8 AM |
20793 | CP1_ }, /* SWC1[GP] */ |
20794 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20795 | 0xfc1c0003, 0x44180002, &LDC1_GP_ , 0, |
89a955e8 AM |
20796 | CP1_ }, /* LDC1[GP] */ |
20797 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20798 | 0xfc1c0003, 0x44180003, &SDC1_GP_ , 0, |
89a955e8 AM |
20799 | CP1_ }, /* SDC1[GP] */ |
20800 | }; | |
20801 | ||
20802 | ||
a1465490 | 20803 | static const Pool P_GP_M64[4] = { |
89a955e8 | 20804 | { instruction , 0 , 0 , 32, |
8d416f6b | 20805 | 0xfc1c0003, 0x441c0000, &LWU_GP_ , 0, |
89a955e8 AM |
20806 | MIPS64_ }, /* LWU[GP] */ |
20807 | { reserved_block , 0 , 0 , 32, | |
20808 | 0xfc1c0003, 0x441c0001, 0 , 0, | |
20809 | 0x0 }, /* P.GP.M64~*(1) */ | |
20810 | { reserved_block , 0 , 0 , 32, | |
20811 | 0xfc1c0003, 0x441c0002, 0 , 0, | |
20812 | 0x0 }, /* P.GP.M64~*(2) */ | |
20813 | { reserved_block , 0 , 0 , 32, | |
20814 | 0xfc1c0003, 0x441c0003, 0 , 0, | |
20815 | 0x0 }, /* P.GP.M64~*(3) */ | |
20816 | }; | |
20817 | ||
20818 | ||
a1465490 | 20819 | static const Pool P_GP_BH[8] = { |
89a955e8 | 20820 | { instruction , 0 , 0 , 32, |
8d416f6b | 20821 | 0xfc1c0000, 0x44000000, &LB_GP_ , 0, |
89a955e8 AM |
20822 | 0x0 }, /* LB[GP] */ |
20823 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20824 | 0xfc1c0000, 0x44040000, &SB_GP_ , 0, |
89a955e8 AM |
20825 | 0x0 }, /* SB[GP] */ |
20826 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20827 | 0xfc1c0000, 0x44080000, &LBU_GP_ , 0, |
89a955e8 AM |
20828 | 0x0 }, /* LBU[GP] */ |
20829 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20830 | 0xfc1c0000, 0x440c0000, &ADDIU_GP_B_ , 0, |
89a955e8 AM |
20831 | 0x0 }, /* ADDIU[GP.B] */ |
20832 | { pool , P_GP_LH , 2 , 32, | |
20833 | 0xfc1c0000, 0x44100000, 0 , 0, | |
20834 | 0x0 }, /* P.GP.LH */ | |
20835 | { pool , P_GP_SH , 2 , 32, | |
20836 | 0xfc1c0000, 0x44140000, 0 , 0, | |
20837 | 0x0 }, /* P.GP.SH */ | |
20838 | { pool , P_GP_CP1 , 4 , 32, | |
20839 | 0xfc1c0000, 0x44180000, 0 , 0, | |
20840 | 0x0 }, /* P.GP.CP1 */ | |
20841 | { pool , P_GP_M64 , 4 , 32, | |
20842 | 0xfc1c0000, 0x441c0000, 0 , 0, | |
20843 | 0x0 }, /* P.GP.M64 */ | |
20844 | }; | |
20845 | ||
20846 | ||
a1465490 | 20847 | static const Pool P_LS_U12[16] = { |
89a955e8 | 20848 | { instruction , 0 , 0 , 32, |
8d416f6b | 20849 | 0xfc00f000, 0x84000000, &LB_U12_ , 0, |
89a955e8 AM |
20850 | 0x0 }, /* LB[U12] */ |
20851 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20852 | 0xfc00f000, 0x84001000, &SB_U12_ , 0, |
89a955e8 AM |
20853 | 0x0 }, /* SB[U12] */ |
20854 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20855 | 0xfc00f000, 0x84002000, &LBU_U12_ , 0, |
89a955e8 AM |
20856 | 0x0 }, /* LBU[U12] */ |
20857 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20858 | 0xfc00f000, 0x84003000, &PREF_U12_ , 0, |
89a955e8 AM |
20859 | 0x0 }, /* PREF[U12] */ |
20860 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20861 | 0xfc00f000, 0x84004000, &LH_U12_ , 0, |
89a955e8 AM |
20862 | 0x0 }, /* LH[U12] */ |
20863 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20864 | 0xfc00f000, 0x84005000, &SH_U12_ , 0, |
89a955e8 AM |
20865 | 0x0 }, /* SH[U12] */ |
20866 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20867 | 0xfc00f000, 0x84006000, &LHU_U12_ , 0, |
89a955e8 AM |
20868 | 0x0 }, /* LHU[U12] */ |
20869 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20870 | 0xfc00f000, 0x84007000, &LWU_U12_ , 0, |
89a955e8 AM |
20871 | MIPS64_ }, /* LWU[U12] */ |
20872 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20873 | 0xfc00f000, 0x84008000, &LW_U12_ , 0, |
89a955e8 AM |
20874 | 0x0 }, /* LW[U12] */ |
20875 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20876 | 0xfc00f000, 0x84009000, &SW_U12_ , 0, |
89a955e8 AM |
20877 | 0x0 }, /* SW[U12] */ |
20878 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20879 | 0xfc00f000, 0x8400a000, &LWC1_U12_ , 0, |
89a955e8 AM |
20880 | CP1_ }, /* LWC1[U12] */ |
20881 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20882 | 0xfc00f000, 0x8400b000, &SWC1_U12_ , 0, |
89a955e8 AM |
20883 | CP1_ }, /* SWC1[U12] */ |
20884 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20885 | 0xfc00f000, 0x8400c000, &LD_U12_ , 0, |
89a955e8 AM |
20886 | MIPS64_ }, /* LD[U12] */ |
20887 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20888 | 0xfc00f000, 0x8400d000, &SD_U12_ , 0, |
89a955e8 AM |
20889 | MIPS64_ }, /* SD[U12] */ |
20890 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20891 | 0xfc00f000, 0x8400e000, &LDC1_U12_ , 0, |
89a955e8 AM |
20892 | CP1_ }, /* LDC1[U12] */ |
20893 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20894 | 0xfc00f000, 0x8400f000, &SDC1_U12_ , 0, |
89a955e8 AM |
20895 | CP1_ }, /* SDC1[U12] */ |
20896 | }; | |
20897 | ||
20898 | ||
a1465490 | 20899 | static const Pool P_PREF_S9_[2] = { |
89a955e8 | 20900 | { instruction , 0 , 0 , 32, |
8d416f6b | 20901 | 0xffe07f00, 0xa7e01800, &SYNCI , 0, |
89a955e8 AM |
20902 | 0x0 }, /* SYNCI */ |
20903 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20904 | 0xfc007f00, 0xa4001800, &PREF_S9_ , &PREF_S9__cond , |
89a955e8 AM |
20905 | 0x0 }, /* PREF[S9] */ |
20906 | }; | |
20907 | ||
20908 | ||
a1465490 | 20909 | static const Pool P_LS_S0[16] = { |
89a955e8 | 20910 | { instruction , 0 , 0 , 32, |
8d416f6b | 20911 | 0xfc007f00, 0xa4000000, &LB_S9_ , 0, |
89a955e8 AM |
20912 | 0x0 }, /* LB[S9] */ |
20913 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20914 | 0xfc007f00, 0xa4000800, &SB_S9_ , 0, |
89a955e8 AM |
20915 | 0x0 }, /* SB[S9] */ |
20916 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20917 | 0xfc007f00, 0xa4001000, &LBU_S9_ , 0, |
89a955e8 AM |
20918 | 0x0 }, /* LBU[S9] */ |
20919 | { pool , P_PREF_S9_ , 2 , 32, | |
20920 | 0xfc007f00, 0xa4001800, 0 , 0, | |
20921 | 0x0 }, /* P.PREF[S9] */ | |
20922 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20923 | 0xfc007f00, 0xa4002000, &LH_S9_ , 0, |
89a955e8 AM |
20924 | 0x0 }, /* LH[S9] */ |
20925 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20926 | 0xfc007f00, 0xa4002800, &SH_S9_ , 0, |
89a955e8 AM |
20927 | 0x0 }, /* SH[S9] */ |
20928 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20929 | 0xfc007f00, 0xa4003000, &LHU_S9_ , 0, |
89a955e8 AM |
20930 | 0x0 }, /* LHU[S9] */ |
20931 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20932 | 0xfc007f00, 0xa4003800, &LWU_S9_ , 0, |
89a955e8 AM |
20933 | MIPS64_ }, /* LWU[S9] */ |
20934 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20935 | 0xfc007f00, 0xa4004000, &LW_S9_ , 0, |
89a955e8 AM |
20936 | 0x0 }, /* LW[S9] */ |
20937 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20938 | 0xfc007f00, 0xa4004800, &SW_S9_ , 0, |
89a955e8 AM |
20939 | 0x0 }, /* SW[S9] */ |
20940 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20941 | 0xfc007f00, 0xa4005000, &LWC1_S9_ , 0, |
89a955e8 AM |
20942 | CP1_ }, /* LWC1[S9] */ |
20943 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20944 | 0xfc007f00, 0xa4005800, &SWC1_S9_ , 0, |
89a955e8 AM |
20945 | CP1_ }, /* SWC1[S9] */ |
20946 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20947 | 0xfc007f00, 0xa4006000, &LD_S9_ , 0, |
89a955e8 AM |
20948 | MIPS64_ }, /* LD[S9] */ |
20949 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20950 | 0xfc007f00, 0xa4006800, &SD_S9_ , 0, |
89a955e8 AM |
20951 | MIPS64_ }, /* SD[S9] */ |
20952 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20953 | 0xfc007f00, 0xa4007000, &LDC1_S9_ , 0, |
89a955e8 AM |
20954 | CP1_ }, /* LDC1[S9] */ |
20955 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20956 | 0xfc007f00, 0xa4007800, &SDC1_S9_ , 0, |
89a955e8 AM |
20957 | CP1_ }, /* SDC1[S9] */ |
20958 | }; | |
20959 | ||
20960 | ||
a1465490 | 20961 | static const Pool ASET_ACLR[2] = { |
89a955e8 | 20962 | { instruction , 0 , 0 , 32, |
8d416f6b | 20963 | 0xfe007f00, 0xa4001100, &ASET , 0, |
89a955e8 AM |
20964 | MCU_ }, /* ASET */ |
20965 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20966 | 0xfe007f00, 0xa6001100, &ACLR , 0, |
89a955e8 AM |
20967 | MCU_ }, /* ACLR */ |
20968 | }; | |
20969 | ||
20970 | ||
a1465490 | 20971 | static const Pool P_LL[4] = { |
89a955e8 | 20972 | { instruction , 0 , 0 , 32, |
8d416f6b | 20973 | 0xfc007f03, 0xa4005100, &LL , 0, |
89a955e8 AM |
20974 | 0x0 }, /* LL */ |
20975 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20976 | 0xfc007f03, 0xa4005101, &LLWP , 0, |
89a955e8 AM |
20977 | XNP_ }, /* LLWP */ |
20978 | { reserved_block , 0 , 0 , 32, | |
20979 | 0xfc007f03, 0xa4005102, 0 , 0, | |
20980 | 0x0 }, /* P.LL~*(2) */ | |
20981 | { reserved_block , 0 , 0 , 32, | |
20982 | 0xfc007f03, 0xa4005103, 0 , 0, | |
20983 | 0x0 }, /* P.LL~*(3) */ | |
20984 | }; | |
20985 | ||
20986 | ||
a1465490 | 20987 | static const Pool P_SC[4] = { |
89a955e8 | 20988 | { instruction , 0 , 0 , 32, |
8d416f6b | 20989 | 0xfc007f03, 0xa4005900, &SC , 0, |
89a955e8 AM |
20990 | 0x0 }, /* SC */ |
20991 | { instruction , 0 , 0 , 32, | |
8d416f6b | 20992 | 0xfc007f03, 0xa4005901, &SCWP , 0, |
89a955e8 AM |
20993 | XNP_ }, /* SCWP */ |
20994 | { reserved_block , 0 , 0 , 32, | |
20995 | 0xfc007f03, 0xa4005902, 0 , 0, | |
20996 | 0x0 }, /* P.SC~*(2) */ | |
20997 | { reserved_block , 0 , 0 , 32, | |
20998 | 0xfc007f03, 0xa4005903, 0 , 0, | |
20999 | 0x0 }, /* P.SC~*(3) */ | |
21000 | }; | |
21001 | ||
21002 | ||
a1465490 | 21003 | static const Pool P_LLD[8] = { |
89a955e8 | 21004 | { instruction , 0 , 0 , 32, |
8d416f6b | 21005 | 0xfc007f07, 0xa4007100, &LLD , 0, |
89a955e8 AM |
21006 | MIPS64_ }, /* LLD */ |
21007 | { instruction , 0 , 0 , 32, | |
8d416f6b | 21008 | 0xfc007f07, 0xa4007101, &LLDP , 0, |
89a955e8 AM |
21009 | MIPS64_ }, /* LLDP */ |
21010 | { reserved_block , 0 , 0 , 32, | |
21011 | 0xfc007f07, 0xa4007102, 0 , 0, | |
21012 | 0x0 }, /* P.LLD~*(2) */ | |
21013 | { reserved_block , 0 , 0 , 32, | |
21014 | 0xfc007f07, 0xa4007103, 0 , 0, | |
21015 | 0x0 }, /* P.LLD~*(3) */ | |
21016 | { reserved_block , 0 , 0 , 32, | |
21017 | 0xfc007f07, 0xa4007104, 0 , 0, | |
21018 | 0x0 }, /* P.LLD~*(4) */ | |
21019 | { reserved_block , 0 , 0 , 32, | |
21020 | 0xfc007f07, 0xa4007105, 0 , 0, | |
21021 | 0x0 }, /* P.LLD~*(5) */ | |
21022 | { reserved_block , 0 , 0 , 32, | |
21023 | 0xfc007f07, 0xa4007106, 0 , 0, | |
21024 | 0x0 }, /* P.LLD~*(6) */ | |
21025 | { reserved_block , 0 , 0 , 32, | |
21026 | 0xfc007f07, 0xa4007107, 0 , 0, | |
21027 | 0x0 }, /* P.LLD~*(7) */ | |
21028 | }; | |
21029 | ||
21030 | ||
a1465490 | 21031 | static const Pool P_SCD[8] = { |
89a955e8 | 21032 | { instruction , 0 , 0 , 32, |
8d416f6b | 21033 | 0xfc007f07, 0xa4007900, &SCD , 0, |
89a955e8 AM |
21034 | MIPS64_ }, /* SCD */ |
21035 | { instruction , 0 , 0 , 32, | |
8d416f6b | 21036 | 0xfc007f07, 0xa4007901, &SCDP , 0, |
89a955e8 AM |
21037 | MIPS64_ }, /* SCDP */ |
21038 | { reserved_block , 0 , 0 , 32, | |
21039 | 0xfc007f07, 0xa4007902, 0 , 0, | |
21040 | 0x0 }, /* P.SCD~*(2) */ | |
21041 | { reserved_block , 0 , 0 , 32, | |
21042 | 0xfc007f07, 0xa4007903, 0 , 0, | |
21043 | 0x0 }, /* P.SCD~*(3) */ | |
21044 | { reserved_block , 0 , 0 , 32, | |
21045 | 0xfc007f07, 0xa4007904, 0 , 0, | |
21046 | 0x0 }, /* P.SCD~*(4) */ | |
21047 | { reserved_block , 0 , 0 , 32, | |
21048 | 0xfc007f07, 0xa4007905, 0 , 0, | |
21049 | 0x0 }, /* P.SCD~*(5) */ | |
21050 | { reserved_block , 0 , 0 , 32, | |
21051 | 0xfc007f07, 0xa4007906, 0 , 0, | |
21052 | 0x0 }, /* P.SCD~*(6) */ | |
21053 | { reserved_block , 0 , 0 , 32, | |
21054 | 0xfc007f07, 0xa4007907, 0 , 0, | |
21055 | 0x0 }, /* P.SCD~*(7) */ | |
21056 | }; | |
21057 | ||
21058 | ||
a1465490 | 21059 | static const Pool P_LS_S1[16] = { |
89a955e8 AM |
21060 | { reserved_block , 0 , 0 , 32, |
21061 | 0xfc007f00, 0xa4000100, 0 , 0, | |
21062 | 0x0 }, /* P.LS.S1~*(0) */ | |
21063 | { reserved_block , 0 , 0 , 32, | |
21064 | 0xfc007f00, 0xa4000900, 0 , 0, | |
21065 | 0x0 }, /* P.LS.S1~*(1) */ | |
21066 | { pool , ASET_ACLR , 2 , 32, | |
21067 | 0xfc007f00, 0xa4001100, 0 , 0, | |
21068 | 0x0 }, /* ASET_ACLR */ | |
21069 | { reserved_block , 0 , 0 , 32, | |
21070 | 0xfc007f00, 0xa4001900, 0 , 0, | |
21071 | 0x0 }, /* P.LS.S1~*(3) */ | |
21072 | { instruction , 0 , 0 , 32, | |
8d416f6b | 21073 | 0xfc007f00, 0xa4002100, &UALH , 0, |
89a955e8 AM |
21074 | XMMS_ }, /* UALH */ |
21075 | { instruction , 0 , 0 , 32, | |
8d416f6b | 21076 | 0xfc007f00, 0xa4002900, &UASH , 0, |
89a955e8 AM |
21077 | XMMS_ }, /* UASH */ |
21078 | { reserved_block , 0 , 0 , 32, | |
21079 | 0xfc007f00, 0xa4003100, 0 , 0, | |
21080 | 0x0 }, /* P.LS.S1~*(6) */ | |
21081 | { instruction , 0 , 0 , 32, | |
8d416f6b | 21082 | 0xfc007f00, 0xa4003900, &CACHE , 0, |
89a955e8 AM |
21083 | CP0_ }, /* CACHE */ |
21084 | { instruction , 0 , 0 , 32, | |
8d416f6b | 21085 | 0xfc007f00, 0xa4004100, &LWC2 , 0, |
89a955e8 AM |
21086 | CP2_ }, /* LWC2 */ |
21087 | { instruction , 0 , 0 , 32, | |
8d416f6b | 21088 | 0xfc007f00, 0xa4004900, &SWC2 , 0, |
89a955e8 AM |
21089 | CP2_ }, /* SWC2 */ |
21090 | { pool , P_LL , 4 , 32, | |
21091 | 0xfc007f00, 0xa4005100, 0 , 0, | |
21092 | 0x0 }, /* P.LL */ | |
21093 | { pool , P_SC , 4 , 32, | |
21094 | 0xfc007f00, 0xa4005900, 0 , 0, | |
21095 | 0x0 }, /* P.SC */ | |
21096 | { instruction , 0 , 0 , 32, | |
8d416f6b | 21097 | 0xfc007f00, 0xa4006100, &LDC2 , 0, |
89a955e8 AM |
21098 | CP2_ }, /* LDC2 */ |
21099 | { instruction , 0 , 0 , 32, | |
8d416f6b | 21100 | 0xfc007f00, 0xa4006900, &SDC2 , 0, |
89a955e8 AM |
21101 | CP2_ }, /* SDC2 */ |
21102 | { pool , P_LLD , 8 , 32, | |
21103 | 0xfc007f00, 0xa4007100, 0 , 0, | |
21104 | 0x0 }, /* P.LLD */ | |
21105 | { pool , P_SCD , 8 , 32, | |
21106 | 0xfc007f00, 0xa4007900, 0 , 0, | |
21107 | 0x0 }, /* P.SCD */ | |
21108 | }; | |
21109 | ||
21110 | ||
a1465490 | 21111 | static const Pool P_PREFE[2] = { |
89a955e8 | 21112 | { instruction , 0 , 0 , 32, |
8d416f6b | 21113 | 0xffe07f00, 0xa7e01a00, &SYNCIE , 0, |
89a955e8 AM |
21114 | CP0_ | EVA_ }, /* SYNCIE */ |
21115 | { instruction , 0 , 0 , 32, | |
8d416f6b | 21116 | 0xfc007f00, 0xa4001a00, &PREFE , &PREFE_cond , |
89a955e8 AM |
21117 | CP0_ | EVA_ }, /* PREFE */ |
21118 | }; | |
21119 | ||
21120 | ||
a1465490 | 21121 | static const Pool P_LLE[4] = { |
89a955e8 | 21122 | { instruction , 0 , 0 , 32, |
8d416f6b | 21123 | 0xfc007f03, 0xa4005200, &LLE , 0, |
89a955e8 AM |
21124 | CP0_ | EVA_ }, /* LLE */ |
21125 | { instruction , 0 , 0 , 32, | |
8d416f6b | 21126 | 0xfc007f03, 0xa4005201, &LLWPE , 0, |
89a955e8 AM |
21127 | CP0_ | EVA_ }, /* LLWPE */ |
21128 | { reserved_block , 0 , 0 , 32, | |
21129 | 0xfc007f03, 0xa4005202, 0 , 0, | |
21130 | 0x0 }, /* P.LLE~*(2) */ | |
21131 | { reserved_block , 0 , 0 , 32, | |
21132 | 0xfc007f03, 0xa4005203, 0 , 0, | |
21133 | 0x0 }, /* P.LLE~*(3) */ | |
21134 | }; | |
21135 | ||
21136 | ||
a1465490 | 21137 | static const Pool P_SCE[4] = { |
89a955e8 | 21138 | { instruction , 0 , 0 , 32, |
8d416f6b | 21139 | 0xfc007f03, 0xa4005a00, &SCE , 0, |
89a955e8 AM |
21140 | CP0_ | EVA_ }, /* SCE */ |
21141 | { instruction , 0 , 0 , 32, | |
8d416f6b | 21142 | 0xfc007f03, 0xa4005a01, &SCWPE , 0, |
89a955e8 AM |
21143 | CP0_ | EVA_ }, /* SCWPE */ |
21144 | { reserved_block , 0 , 0 , 32, | |
21145 | 0xfc007f03, 0xa4005a02, 0 , 0, | |
21146 | 0x0 }, /* P.SCE~*(2) */ | |
21147 | { reserved_block , 0 , 0 , 32, | |
21148 | 0xfc007f03, 0xa4005a03, 0 , 0, | |
21149 | 0x0 }, /* P.SCE~*(3) */ | |
21150 | }; | |
21151 | ||
21152 | ||
a1465490 | 21153 | static const Pool P_LS_E0[16] = { |
89a955e8 | 21154 | { instruction , 0 , 0 , 32, |
8d416f6b | 21155 | 0xfc007f00, 0xa4000200, &LBE , 0, |
89a955e8 AM |
21156 | CP0_ | EVA_ }, /* LBE */ |
21157 | { instruction , 0 , 0 , 32, | |
8d416f6b | 21158 | 0xfc007f00, 0xa4000a00, &SBE , 0, |
89a955e8 AM |
21159 | CP0_ | EVA_ }, /* SBE */ |
21160 | { instruction , 0 , 0 , 32, | |
8d416f6b | 21161 | 0xfc007f00, 0xa4001200, &LBUE , 0, |
89a955e8 AM |
21162 | CP0_ | EVA_ }, /* LBUE */ |
21163 | { pool , P_PREFE , 2 , 32, | |
21164 | 0xfc007f00, 0xa4001a00, 0 , 0, | |
21165 | 0x0 }, /* P.PREFE */ | |
21166 | { instruction , 0 , 0 , 32, | |
8d416f6b | 21167 | 0xfc007f00, 0xa4002200, &LHE , 0, |
89a955e8 AM |
21168 | CP0_ | EVA_ }, /* LHE */ |
21169 | { instruction , 0 , 0 , 32, | |
8d416f6b | 21170 | 0xfc007f00, 0xa4002a00, &SHE , 0, |
89a955e8 AM |
21171 | CP0_ | EVA_ }, /* SHE */ |
21172 | { instruction , 0 , 0 , 32, | |
8d416f6b | 21173 | 0xfc007f00, 0xa4003200, &LHUE , 0, |
89a955e8 AM |
21174 | CP0_ | EVA_ }, /* LHUE */ |
21175 | { instruction , 0 , 0 , 32, | |
8d416f6b | 21176 | 0xfc007f00, 0xa4003a00, &CACHEE , 0, |
89a955e8 AM |
21177 | CP0_ | EVA_ }, /* CACHEE */ |
21178 | { instruction , 0 , 0 , 32, | |
8d416f6b | 21179 | 0xfc007f00, 0xa4004200, &LWE , 0, |
89a955e8 AM |
21180 | CP0_ | EVA_ }, /* LWE */ |
21181 | { instruction , 0 , 0 , 32, | |
8d416f6b | 21182 | 0xfc007f00, 0xa4004a00, &SWE , 0, |
89a955e8 AM |
21183 | CP0_ | EVA_ }, /* SWE */ |
21184 | { pool , P_LLE , 4 , 32, | |
21185 | 0xfc007f00, 0xa4005200, 0 , 0, | |
21186 | 0x0 }, /* P.LLE */ | |
21187 | { pool , P_SCE , 4 , 32, | |
21188 | 0xfc007f00, 0xa4005a00, 0 , 0, | |
21189 | 0x0 }, /* P.SCE */ | |
21190 | { reserved_block , 0 , 0 , 32, | |
21191 | 0xfc007f00, 0xa4006200, 0 , 0, | |
21192 | 0x0 }, /* P.LS.E0~*(12) */ | |
21193 | { reserved_block , 0 , 0 , 32, | |
21194 | 0xfc007f00, 0xa4006a00, 0 , 0, | |
21195 | 0x0 }, /* P.LS.E0~*(13) */ | |
21196 | { reserved_block , 0 , 0 , 32, | |
21197 | 0xfc007f00, 0xa4007200, 0 , 0, | |
21198 | 0x0 }, /* P.LS.E0~*(14) */ | |
21199 | { reserved_block , 0 , 0 , 32, | |
21200 | 0xfc007f00, 0xa4007a00, 0 , 0, | |
21201 | 0x0 }, /* P.LS.E0~*(15) */ | |
21202 | }; | |
21203 | ||
21204 | ||
a1465490 | 21205 | static const Pool P_LS_WM[2] = { |
89a955e8 | 21206 | { instruction , 0 , 0 , 32, |
8d416f6b | 21207 | 0xfc000f00, 0xa4000400, &LWM , 0, |
89a955e8 AM |
21208 | XMMS_ }, /* LWM */ |
21209 | { instruction , 0 , 0 , 32, | |
8d416f6b | 21210 | 0xfc000f00, 0xa4000c00, &SWM , 0, |
89a955e8 AM |
21211 | XMMS_ }, /* SWM */ |
21212 | }; | |
21213 | ||
21214 | ||
a1465490 | 21215 | static const Pool P_LS_UAWM[2] = { |
89a955e8 | 21216 | { instruction , 0 , 0 , 32, |
8d416f6b | 21217 | 0xfc000f00, 0xa4000500, &UALWM , 0, |
89a955e8 AM |
21218 | XMMS_ }, /* UALWM */ |
21219 | { instruction , 0 , 0 , 32, | |
8d416f6b | 21220 | 0xfc000f00, 0xa4000d00, &UASWM , 0, |
89a955e8 AM |
21221 | XMMS_ }, /* UASWM */ |
21222 | }; | |
21223 | ||
21224 | ||
a1465490 | 21225 | static const Pool P_LS_DM[2] = { |
89a955e8 | 21226 | { instruction , 0 , 0 , 32, |
8d416f6b | 21227 | 0xfc000f00, 0xa4000600, &LDM , 0, |
89a955e8 AM |
21228 | MIPS64_ }, /* LDM */ |
21229 | { instruction , 0 , 0 , 32, | |
8d416f6b | 21230 | 0xfc000f00, 0xa4000e00, &SDM , 0, |
89a955e8 AM |
21231 | MIPS64_ }, /* SDM */ |
21232 | }; | |
21233 | ||
21234 | ||
a1465490 | 21235 | static const Pool P_LS_UADM[2] = { |
89a955e8 | 21236 | { instruction , 0 , 0 , 32, |
8d416f6b | 21237 | 0xfc000f00, 0xa4000700, &UALDM , 0, |
89a955e8 AM |
21238 | MIPS64_ }, /* UALDM */ |
21239 | { instruction , 0 , 0 , 32, | |
8d416f6b | 21240 | 0xfc000f00, 0xa4000f00, &UASDM , 0, |
89a955e8 AM |
21241 | MIPS64_ }, /* UASDM */ |
21242 | }; | |
21243 | ||
21244 | ||
a1465490 | 21245 | static const Pool P_LS_S9[8] = { |
89a955e8 AM |
21246 | { pool , P_LS_S0 , 16 , 32, |
21247 | 0xfc000700, 0xa4000000, 0 , 0, | |
21248 | 0x0 }, /* P.LS.S0 */ | |
21249 | { pool , P_LS_S1 , 16 , 32, | |
21250 | 0xfc000700, 0xa4000100, 0 , 0, | |
21251 | 0x0 }, /* P.LS.S1 */ | |
21252 | { pool , P_LS_E0 , 16 , 32, | |
21253 | 0xfc000700, 0xa4000200, 0 , 0, | |
21254 | 0x0 }, /* P.LS.E0 */ | |
21255 | { reserved_block , 0 , 0 , 32, | |
21256 | 0xfc000700, 0xa4000300, 0 , 0, | |
21257 | 0x0 }, /* P.LS.S9~*(3) */ | |
21258 | { pool , P_LS_WM , 2 , 32, | |
21259 | 0xfc000700, 0xa4000400, 0 , 0, | |
21260 | 0x0 }, /* P.LS.WM */ | |
21261 | { pool , P_LS_UAWM , 2 , 32, | |
21262 | 0xfc000700, 0xa4000500, 0 , 0, | |
21263 | 0x0 }, /* P.LS.UAWM */ | |
21264 | { pool , P_LS_DM , 2 , 32, | |
21265 | 0xfc000700, 0xa4000600, 0 , 0, | |
21266 | 0x0 }, /* P.LS.DM */ | |
21267 | { pool , P_LS_UADM , 2 , 32, | |
21268 | 0xfc000700, 0xa4000700, 0 , 0, | |
21269 | 0x0 }, /* P.LS.UADM */ | |
21270 | }; | |
21271 | ||
21272 | ||
a1465490 | 21273 | static const Pool P_BAL[2] = { |
89a955e8 | 21274 | { branch_instruction , 0 , 0 , 32, |
8d416f6b | 21275 | 0xfe000000, 0x28000000, &BC_32_ , 0, |
89a955e8 AM |
21276 | 0x0 }, /* BC[32] */ |
21277 | { call_instruction , 0 , 0 , 32, | |
8d416f6b | 21278 | 0xfe000000, 0x2a000000, &BALC_32_ , 0, |
89a955e8 AM |
21279 | 0x0 }, /* BALC[32] */ |
21280 | }; | |
21281 | ||
21282 | ||
a1465490 | 21283 | static const Pool P_BALRSC[2] = { |
89a955e8 | 21284 | { branch_instruction , 0 , 0 , 32, |
8d416f6b | 21285 | 0xffe0f000, 0x48008000, &BRSC , 0, |
89a955e8 AM |
21286 | 0x0 }, /* BRSC */ |
21287 | { call_instruction , 0 , 0 , 32, | |
8d416f6b | 21288 | 0xfc00f000, 0x48008000, &BALRSC , &BALRSC_cond , |
89a955e8 AM |
21289 | 0x0 }, /* BALRSC */ |
21290 | }; | |
21291 | ||
21292 | ||
a1465490 | 21293 | static const Pool P_J[16] = { |
89a955e8 | 21294 | { call_instruction , 0 , 0 , 32, |
8d416f6b | 21295 | 0xfc00f000, 0x48000000, &JALRC_32_ , 0, |
89a955e8 AM |
21296 | 0x0 }, /* JALRC[32] */ |
21297 | { call_instruction , 0 , 0 , 32, | |
8d416f6b | 21298 | 0xfc00f000, 0x48001000, &JALRC_HB , 0, |
89a955e8 AM |
21299 | 0x0 }, /* JALRC.HB */ |
21300 | { reserved_block , 0 , 0 , 32, | |
21301 | 0xfc00f000, 0x48002000, 0 , 0, | |
21302 | 0x0 }, /* P.J~*(2) */ | |
21303 | { reserved_block , 0 , 0 , 32, | |
21304 | 0xfc00f000, 0x48003000, 0 , 0, | |
21305 | 0x0 }, /* P.J~*(3) */ | |
21306 | { reserved_block , 0 , 0 , 32, | |
21307 | 0xfc00f000, 0x48004000, 0 , 0, | |
21308 | 0x0 }, /* P.J~*(4) */ | |
21309 | { reserved_block , 0 , 0 , 32, | |
21310 | 0xfc00f000, 0x48005000, 0 , 0, | |
21311 | 0x0 }, /* P.J~*(5) */ | |
21312 | { reserved_block , 0 , 0 , 32, | |
21313 | 0xfc00f000, 0x48006000, 0 , 0, | |
21314 | 0x0 }, /* P.J~*(6) */ | |
21315 | { reserved_block , 0 , 0 , 32, | |
21316 | 0xfc00f000, 0x48007000, 0 , 0, | |
21317 | 0x0 }, /* P.J~*(7) */ | |
21318 | { pool , P_BALRSC , 2 , 32, | |
21319 | 0xfc00f000, 0x48008000, 0 , 0, | |
21320 | 0x0 }, /* P.BALRSC */ | |
21321 | { reserved_block , 0 , 0 , 32, | |
21322 | 0xfc00f000, 0x48009000, 0 , 0, | |
21323 | 0x0 }, /* P.J~*(9) */ | |
21324 | { reserved_block , 0 , 0 , 32, | |
21325 | 0xfc00f000, 0x4800a000, 0 , 0, | |
21326 | 0x0 }, /* P.J~*(10) */ | |
21327 | { reserved_block , 0 , 0 , 32, | |
21328 | 0xfc00f000, 0x4800b000, 0 , 0, | |
21329 | 0x0 }, /* P.J~*(11) */ | |
21330 | { reserved_block , 0 , 0 , 32, | |
21331 | 0xfc00f000, 0x4800c000, 0 , 0, | |
21332 | 0x0 }, /* P.J~*(12) */ | |
21333 | { reserved_block , 0 , 0 , 32, | |
21334 | 0xfc00f000, 0x4800d000, 0 , 0, | |
21335 | 0x0 }, /* P.J~*(13) */ | |
21336 | { reserved_block , 0 , 0 , 32, | |
21337 | 0xfc00f000, 0x4800e000, 0 , 0, | |
21338 | 0x0 }, /* P.J~*(14) */ | |
21339 | { reserved_block , 0 , 0 , 32, | |
21340 | 0xfc00f000, 0x4800f000, 0 , 0, | |
21341 | 0x0 }, /* P.J~*(15) */ | |
21342 | }; | |
21343 | ||
21344 | ||
a1465490 | 21345 | static const Pool P_BR3A[32] = { |
89a955e8 | 21346 | { branch_instruction , 0 , 0 , 32, |
8d416f6b | 21347 | 0xfc1fc000, 0x88004000, &BC1EQZC , 0, |
89a955e8 AM |
21348 | CP1_ }, /* BC1EQZC */ |
21349 | { branch_instruction , 0 , 0 , 32, | |
8d416f6b | 21350 | 0xfc1fc000, 0x88014000, &BC1NEZC , 0, |
89a955e8 AM |
21351 | CP1_ }, /* BC1NEZC */ |
21352 | { branch_instruction , 0 , 0 , 32, | |
8d416f6b | 21353 | 0xfc1fc000, 0x88024000, &BC2EQZC , 0, |
89a955e8 AM |
21354 | CP2_ }, /* BC2EQZC */ |
21355 | { branch_instruction , 0 , 0 , 32, | |
8d416f6b | 21356 | 0xfc1fc000, 0x88034000, &BC2NEZC , 0, |
89a955e8 AM |
21357 | CP2_ }, /* BC2NEZC */ |
21358 | { branch_instruction , 0 , 0 , 32, | |
8d416f6b | 21359 | 0xfc1fc000, 0x88044000, &BPOSGE32C , 0, |
89a955e8 AM |
21360 | DSP_ }, /* BPOSGE32C */ |
21361 | { reserved_block , 0 , 0 , 32, | |
21362 | 0xfc1fc000, 0x88054000, 0 , 0, | |
21363 | 0x0 }, /* P.BR3A~*(5) */ | |
21364 | { reserved_block , 0 , 0 , 32, | |
21365 | 0xfc1fc000, 0x88064000, 0 , 0, | |
21366 | 0x0 }, /* P.BR3A~*(6) */ | |
21367 | { reserved_block , 0 , 0 , 32, | |
21368 | 0xfc1fc000, 0x88074000, 0 , 0, | |
21369 | 0x0 }, /* P.BR3A~*(7) */ | |
21370 | { reserved_block , 0 , 0 , 32, | |
21371 | 0xfc1fc000, 0x88084000, 0 , 0, | |
21372 | 0x0 }, /* P.BR3A~*(8) */ | |
21373 | { reserved_block , 0 , 0 , 32, | |
21374 | 0xfc1fc000, 0x88094000, 0 , 0, | |
21375 | 0x0 }, /* P.BR3A~*(9) */ | |
21376 | { reserved_block , 0 , 0 , 32, | |
21377 | 0xfc1fc000, 0x880a4000, 0 , 0, | |
21378 | 0x0 }, /* P.BR3A~*(10) */ | |
21379 | { reserved_block , 0 , 0 , 32, | |
21380 | 0xfc1fc000, 0x880b4000, 0 , 0, | |
21381 | 0x0 }, /* P.BR3A~*(11) */ | |
21382 | { reserved_block , 0 , 0 , 32, | |
21383 | 0xfc1fc000, 0x880c4000, 0 , 0, | |
21384 | 0x0 }, /* P.BR3A~*(12) */ | |
21385 | { reserved_block , 0 , 0 , 32, | |
21386 | 0xfc1fc000, 0x880d4000, 0 , 0, | |
21387 | 0x0 }, /* P.BR3A~*(13) */ | |
21388 | { reserved_block , 0 , 0 , 32, | |
21389 | 0xfc1fc000, 0x880e4000, 0 , 0, | |
21390 | 0x0 }, /* P.BR3A~*(14) */ | |
21391 | { reserved_block , 0 , 0 , 32, | |
21392 | 0xfc1fc000, 0x880f4000, 0 , 0, | |
21393 | 0x0 }, /* P.BR3A~*(15) */ | |
21394 | { reserved_block , 0 , 0 , 32, | |
21395 | 0xfc1fc000, 0x88104000, 0 , 0, | |
21396 | 0x0 }, /* P.BR3A~*(16) */ | |
21397 | { reserved_block , 0 , 0 , 32, | |
21398 | 0xfc1fc000, 0x88114000, 0 , 0, | |
21399 | 0x0 }, /* P.BR3A~*(17) */ | |
21400 | { reserved_block , 0 , 0 , 32, | |
21401 | 0xfc1fc000, 0x88124000, 0 , 0, | |
21402 | 0x0 }, /* P.BR3A~*(18) */ | |
21403 | { reserved_block , 0 , 0 , 32, | |
21404 | 0xfc1fc000, 0x88134000, 0 , 0, | |
21405 | 0x0 }, /* P.BR3A~*(19) */ | |
21406 | { reserved_block , 0 , 0 , 32, | |
21407 | 0xfc1fc000, 0x88144000, 0 , 0, | |
21408 | 0x0 }, /* P.BR3A~*(20) */ | |
21409 | { reserved_block , 0 , 0 , 32, | |
21410 | 0xfc1fc000, 0x88154000, 0 , 0, | |
21411 | 0x0 }, /* P.BR3A~*(21) */ | |
21412 | { reserved_block , 0 , 0 , 32, | |
21413 | 0xfc1fc000, 0x88164000, 0 , 0, | |
21414 | 0x0 }, /* P.BR3A~*(22) */ | |
21415 | { reserved_block , 0 , 0 , 32, | |
21416 | 0xfc1fc000, 0x88174000, 0 , 0, | |
21417 | 0x0 }, /* P.BR3A~*(23) */ | |
21418 | { reserved_block , 0 , 0 , 32, | |
21419 | 0xfc1fc000, 0x88184000, 0 , 0, | |
21420 | 0x0 }, /* P.BR3A~*(24) */ | |
21421 | { reserved_block , 0 , 0 , 32, | |
21422 | 0xfc1fc000, 0x88194000, 0 , 0, | |
21423 | 0x0 }, /* P.BR3A~*(25) */ | |
21424 | { reserved_block , 0 , 0 , 32, | |
21425 | 0xfc1fc000, 0x881a4000, 0 , 0, | |
21426 | 0x0 }, /* P.BR3A~*(26) */ | |
21427 | { reserved_block , 0 , 0 , 32, | |
21428 | 0xfc1fc000, 0x881b4000, 0 , 0, | |
21429 | 0x0 }, /* P.BR3A~*(27) */ | |
21430 | { reserved_block , 0 , 0 , 32, | |
21431 | 0xfc1fc000, 0x881c4000, 0 , 0, | |
21432 | 0x0 }, /* P.BR3A~*(28) */ | |
21433 | { reserved_block , 0 , 0 , 32, | |
21434 | 0xfc1fc000, 0x881d4000, 0 , 0, | |
21435 | 0x0 }, /* P.BR3A~*(29) */ | |
21436 | { reserved_block , 0 , 0 , 32, | |
21437 | 0xfc1fc000, 0x881e4000, 0 , 0, | |
21438 | 0x0 }, /* P.BR3A~*(30) */ | |
21439 | { reserved_block , 0 , 0 , 32, | |
21440 | 0xfc1fc000, 0x881f4000, 0 , 0, | |
21441 | 0x0 }, /* P.BR3A~*(31) */ | |
21442 | }; | |
21443 | ||
21444 | ||
a1465490 | 21445 | static const Pool P_BR1[4] = { |
89a955e8 | 21446 | { branch_instruction , 0 , 0 , 32, |
8d416f6b | 21447 | 0xfc00c000, 0x88000000, &BEQC_32_ , 0, |
89a955e8 AM |
21448 | 0x0 }, /* BEQC[32] */ |
21449 | { pool , P_BR3A , 32 , 32, | |
21450 | 0xfc00c000, 0x88004000, 0 , 0, | |
21451 | 0x0 }, /* P.BR3A */ | |
21452 | { branch_instruction , 0 , 0 , 32, | |
8d416f6b | 21453 | 0xfc00c000, 0x88008000, &BGEC , 0, |
89a955e8 AM |
21454 | 0x0 }, /* BGEC */ |
21455 | { branch_instruction , 0 , 0 , 32, | |
8d416f6b | 21456 | 0xfc00c000, 0x8800c000, &BGEUC , 0, |
89a955e8 AM |
21457 | 0x0 }, /* BGEUC */ |
21458 | }; | |
21459 | ||
21460 | ||
a1465490 | 21461 | static const Pool P_BR2[4] = { |
89a955e8 | 21462 | { branch_instruction , 0 , 0 , 32, |
8d416f6b | 21463 | 0xfc00c000, 0xa8000000, &BNEC_32_ , 0, |
89a955e8 AM |
21464 | 0x0 }, /* BNEC[32] */ |
21465 | { reserved_block , 0 , 0 , 32, | |
21466 | 0xfc00c000, 0xa8004000, 0 , 0, | |
21467 | 0x0 }, /* P.BR2~*(1) */ | |
21468 | { branch_instruction , 0 , 0 , 32, | |
8d416f6b | 21469 | 0xfc00c000, 0xa8008000, &BLTC , 0, |
89a955e8 AM |
21470 | 0x0 }, /* BLTC */ |
21471 | { branch_instruction , 0 , 0 , 32, | |
8d416f6b | 21472 | 0xfc00c000, 0xa800c000, &BLTUC , 0, |
89a955e8 AM |
21473 | 0x0 }, /* BLTUC */ |
21474 | }; | |
21475 | ||
21476 | ||
a1465490 | 21477 | static const Pool P_BRI[8] = { |
89a955e8 | 21478 | { branch_instruction , 0 , 0 , 32, |
8d416f6b | 21479 | 0xfc1c0000, 0xc8000000, &BEQIC , 0, |
89a955e8 AM |
21480 | 0x0 }, /* BEQIC */ |
21481 | { branch_instruction , 0 , 0 , 32, | |
8d416f6b | 21482 | 0xfc1c0000, 0xc8040000, &BBEQZC , 0, |
89a955e8 AM |
21483 | XMMS_ }, /* BBEQZC */ |
21484 | { branch_instruction , 0 , 0 , 32, | |
8d416f6b | 21485 | 0xfc1c0000, 0xc8080000, &BGEIC , 0, |
89a955e8 AM |
21486 | 0x0 }, /* BGEIC */ |
21487 | { branch_instruction , 0 , 0 , 32, | |
8d416f6b | 21488 | 0xfc1c0000, 0xc80c0000, &BGEIUC , 0, |
89a955e8 AM |
21489 | 0x0 }, /* BGEIUC */ |
21490 | { branch_instruction , 0 , 0 , 32, | |
8d416f6b | 21491 | 0xfc1c0000, 0xc8100000, &BNEIC , 0, |
89a955e8 AM |
21492 | 0x0 }, /* BNEIC */ |
21493 | { branch_instruction , 0 , 0 , 32, | |
8d416f6b | 21494 | 0xfc1c0000, 0xc8140000, &BBNEZC , 0, |
89a955e8 AM |
21495 | XMMS_ }, /* BBNEZC */ |
21496 | { branch_instruction , 0 , 0 , 32, | |
8d416f6b | 21497 | 0xfc1c0000, 0xc8180000, &BLTIC , 0, |
89a955e8 AM |
21498 | 0x0 }, /* BLTIC */ |
21499 | { branch_instruction , 0 , 0 , 32, | |
8d416f6b | 21500 | 0xfc1c0000, 0xc81c0000, &BLTIUC , 0, |
89a955e8 AM |
21501 | 0x0 }, /* BLTIUC */ |
21502 | }; | |
21503 | ||
21504 | ||
a1465490 | 21505 | static const Pool P32[32] = { |
89a955e8 AM |
21506 | { pool , P_ADDIU , 2 , 32, |
21507 | 0xfc000000, 0x00000000, 0 , 0, | |
21508 | 0x0 }, /* P.ADDIU */ | |
21509 | { pool , P32A , 8 , 32, | |
21510 | 0xfc000000, 0x20000000, 0 , 0, | |
21511 | 0x0 }, /* P32A */ | |
21512 | { pool , P_GP_W , 4 , 32, | |
21513 | 0xfc000000, 0x40000000, 0 , 0, | |
21514 | 0x0 }, /* P.GP.W */ | |
21515 | { pool , POOL48I , 32 , 48, | |
21516 | 0xfc0000000000ull, 0x600000000000ull, 0 , 0, | |
21517 | 0x0 }, /* POOL48I */ | |
21518 | { pool , P_U12 , 16 , 32, | |
21519 | 0xfc000000, 0x80000000, 0 , 0, | |
21520 | 0x0 }, /* P.U12 */ | |
21521 | { pool , POOL32F , 8 , 32, | |
21522 | 0xfc000000, 0xa0000000, 0 , 0, | |
21523 | CP1_ }, /* POOL32F */ | |
21524 | { pool , POOL32S , 8 , 32, | |
21525 | 0xfc000000, 0xc0000000, 0 , 0, | |
21526 | 0x0 }, /* POOL32S */ | |
21527 | { pool , P_LUI , 2 , 32, | |
21528 | 0xfc000000, 0xe0000000, 0 , 0, | |
21529 | 0x0 }, /* P.LUI */ | |
21530 | { instruction , 0 , 0 , 32, | |
8d416f6b | 21531 | 0xfc000000, 0x04000000, &ADDIUPC_32_ , 0, |
89a955e8 AM |
21532 | 0x0 }, /* ADDIUPC[32] */ |
21533 | { reserved_block , 0 , 0 , 32, | |
21534 | 0xfc000000, 0x24000000, 0 , 0, | |
21535 | 0x0 }, /* P32~*(5) */ | |
21536 | { pool , P_GP_BH , 8 , 32, | |
21537 | 0xfc000000, 0x44000000, 0 , 0, | |
21538 | 0x0 }, /* P.GP.BH */ | |
21539 | { reserved_block , 0 , 0 , 32, | |
21540 | 0xfc000000, 0x64000000, 0 , 0, | |
21541 | 0x0 }, /* P32~*(13) */ | |
21542 | { pool , P_LS_U12 , 16 , 32, | |
21543 | 0xfc000000, 0x84000000, 0 , 0, | |
21544 | 0x0 }, /* P.LS.U12 */ | |
21545 | { pool , P_LS_S9 , 8 , 32, | |
21546 | 0xfc000000, 0xa4000000, 0 , 0, | |
21547 | 0x0 }, /* P.LS.S9 */ | |
21548 | { reserved_block , 0 , 0 , 32, | |
21549 | 0xfc000000, 0xc4000000, 0 , 0, | |
21550 | 0x0 }, /* P32~*(25) */ | |
21551 | { reserved_block , 0 , 0 , 32, | |
21552 | 0xfc000000, 0xe4000000, 0 , 0, | |
21553 | 0x0 }, /* P32~*(29) */ | |
21554 | { call_instruction , 0 , 0 , 32, | |
8d416f6b | 21555 | 0xfc000000, 0x08000000, &MOVE_BALC , 0, |
89a955e8 AM |
21556 | XMMS_ }, /* MOVE.BALC */ |
21557 | { pool , P_BAL , 2 , 32, | |
21558 | 0xfc000000, 0x28000000, 0 , 0, | |
21559 | 0x0 }, /* P.BAL */ | |
21560 | { pool , P_J , 16 , 32, | |
21561 | 0xfc000000, 0x48000000, 0 , 0, | |
21562 | 0x0 }, /* P.J */ | |
21563 | { reserved_block , 0 , 0 , 32, | |
21564 | 0xfc000000, 0x68000000, 0 , 0, | |
21565 | 0x0 }, /* P32~*(14) */ | |
21566 | { pool , P_BR1 , 4 , 32, | |
21567 | 0xfc000000, 0x88000000, 0 , 0, | |
21568 | 0x0 }, /* P.BR1 */ | |
21569 | { pool , P_BR2 , 4 , 32, | |
21570 | 0xfc000000, 0xa8000000, 0 , 0, | |
21571 | 0x0 }, /* P.BR2 */ | |
21572 | { pool , P_BRI , 8 , 32, | |
21573 | 0xfc000000, 0xc8000000, 0 , 0, | |
21574 | 0x0 }, /* P.BRI */ | |
21575 | { reserved_block , 0 , 0 , 32, | |
21576 | 0xfc000000, 0xe8000000, 0 , 0, | |
21577 | 0x0 }, /* P32~*(30) */ | |
21578 | { reserved_block , 0 , 0 , 32, | |
21579 | 0xfc000000, 0x0c000000, 0 , 0, | |
21580 | 0x0 }, /* P32~*(3) */ | |
21581 | { reserved_block , 0 , 0 , 32, | |
21582 | 0xfc000000, 0x2c000000, 0 , 0, | |
21583 | 0x0 }, /* P32~*(7) */ | |
21584 | { reserved_block , 0 , 0 , 32, | |
21585 | 0xfc000000, 0x4c000000, 0 , 0, | |
21586 | 0x0 }, /* P32~*(11) */ | |
21587 | { reserved_block , 0 , 0 , 32, | |
21588 | 0xfc000000, 0x6c000000, 0 , 0, | |
21589 | 0x0 }, /* P32~*(15) */ | |
21590 | { reserved_block , 0 , 0 , 32, | |
21591 | 0xfc000000, 0x8c000000, 0 , 0, | |
21592 | 0x0 }, /* P32~*(19) */ | |
21593 | { reserved_block , 0 , 0 , 32, | |
21594 | 0xfc000000, 0xac000000, 0 , 0, | |
21595 | 0x0 }, /* P32~*(23) */ | |
21596 | { reserved_block , 0 , 0 , 32, | |
21597 | 0xfc000000, 0xcc000000, 0 , 0, | |
21598 | 0x0 }, /* P32~*(27) */ | |
21599 | { reserved_block , 0 , 0 , 32, | |
21600 | 0xfc000000, 0xec000000, 0 , 0, | |
21601 | 0x0 }, /* P32~*(31) */ | |
21602 | }; | |
21603 | ||
21604 | ||
a1465490 | 21605 | static const Pool P16_SYSCALL[2] = { |
89a955e8 | 21606 | { instruction , 0 , 0 , 16, |
8d416f6b | 21607 | 0xfffc , 0x1008 , &SYSCALL_16_ , 0, |
89a955e8 AM |
21608 | 0x0 }, /* SYSCALL[16] */ |
21609 | { instruction , 0 , 0 , 16, | |
8d416f6b | 21610 | 0xfffc , 0x100c , &HYPCALL_16_ , 0, |
89a955e8 AM |
21611 | CP0_ | VZ_ }, /* HYPCALL[16] */ |
21612 | }; | |
21613 | ||
21614 | ||
a1465490 | 21615 | static const Pool P16_RI[4] = { |
89a955e8 AM |
21616 | { reserved_block , 0 , 0 , 16, |
21617 | 0xfff8 , 0x1000 , 0 , 0, | |
21618 | 0x0 }, /* P16.RI~*(0) */ | |
21619 | { pool , P16_SYSCALL , 2 , 16, | |
21620 | 0xfff8 , 0x1008 , 0 , 0, | |
21621 | 0x0 }, /* P16.SYSCALL */ | |
21622 | { instruction , 0 , 0 , 16, | |
8d416f6b | 21623 | 0xfff8 , 0x1010 , &BREAK_16_ , 0, |
89a955e8 AM |
21624 | 0x0 }, /* BREAK[16] */ |
21625 | { instruction , 0 , 0 , 16, | |
8d416f6b | 21626 | 0xfff8 , 0x1018 , &SDBBP_16_ , 0, |
89a955e8 AM |
21627 | EJTAG_ }, /* SDBBP[16] */ |
21628 | }; | |
21629 | ||
21630 | ||
a1465490 | 21631 | static const Pool P16_MV[2] = { |
89a955e8 AM |
21632 | { pool , P16_RI , 4 , 16, |
21633 | 0xffe0 , 0x1000 , 0 , 0, | |
21634 | 0x0 }, /* P16.RI */ | |
21635 | { instruction , 0 , 0 , 16, | |
8d416f6b | 21636 | 0xfc00 , 0x1000 , &MOVE , &MOVE_cond , |
89a955e8 AM |
21637 | 0x0 }, /* MOVE */ |
21638 | }; | |
21639 | ||
21640 | ||
a1465490 | 21641 | static const Pool P16_SHIFT[2] = { |
89a955e8 | 21642 | { instruction , 0 , 0 , 16, |
8d416f6b | 21643 | 0xfc08 , 0x3000 , &SLL_16_ , 0, |
89a955e8 AM |
21644 | 0x0 }, /* SLL[16] */ |
21645 | { instruction , 0 , 0 , 16, | |
8d416f6b | 21646 | 0xfc08 , 0x3008 , &SRL_16_ , 0, |
89a955e8 AM |
21647 | 0x0 }, /* SRL[16] */ |
21648 | }; | |
21649 | ||
21650 | ||
a1465490 | 21651 | static const Pool POOL16C_00[4] = { |
89a955e8 | 21652 | { instruction , 0 , 0 , 16, |
8d416f6b | 21653 | 0xfc0f , 0x5000 , &NOT_16_ , 0, |
89a955e8 AM |
21654 | 0x0 }, /* NOT[16] */ |
21655 | { instruction , 0 , 0 , 16, | |
8d416f6b | 21656 | 0xfc0f , 0x5004 , &XOR_16_ , 0, |
89a955e8 AM |
21657 | 0x0 }, /* XOR[16] */ |
21658 | { instruction , 0 , 0 , 16, | |
8d416f6b | 21659 | 0xfc0f , 0x5008 , &AND_16_ , 0, |
89a955e8 AM |
21660 | 0x0 }, /* AND[16] */ |
21661 | { instruction , 0 , 0 , 16, | |
8d416f6b | 21662 | 0xfc0f , 0x500c , &OR_16_ , 0, |
89a955e8 AM |
21663 | 0x0 }, /* OR[16] */ |
21664 | }; | |
21665 | ||
21666 | ||
a1465490 | 21667 | static const Pool POOL16C_0[2] = { |
89a955e8 AM |
21668 | { pool , POOL16C_00 , 4 , 16, |
21669 | 0xfc03 , 0x5000 , 0 , 0, | |
21670 | 0x0 }, /* POOL16C_00 */ | |
21671 | { reserved_block , 0 , 0 , 16, | |
21672 | 0xfc03 , 0x5002 , 0 , 0, | |
21673 | 0x0 }, /* POOL16C_0~*(1) */ | |
21674 | }; | |
21675 | ||
21676 | ||
a1465490 | 21677 | static const Pool P16C[2] = { |
89a955e8 AM |
21678 | { pool , POOL16C_0 , 2 , 16, |
21679 | 0xfc01 , 0x5000 , 0 , 0, | |
21680 | 0x0 }, /* POOL16C_0 */ | |
21681 | { instruction , 0 , 0 , 16, | |
8d416f6b | 21682 | 0xfc01 , 0x5001 , &LWXS_16_ , 0, |
89a955e8 AM |
21683 | 0x0 }, /* LWXS[16] */ |
21684 | }; | |
21685 | ||
21686 | ||
a1465490 | 21687 | static const Pool P16_A1[2] = { |
89a955e8 AM |
21688 | { reserved_block , 0 , 0 , 16, |
21689 | 0xfc40 , 0x7000 , 0 , 0, | |
21690 | 0x0 }, /* P16.A1~*(0) */ | |
21691 | { instruction , 0 , 0 , 16, | |
8d416f6b | 21692 | 0xfc40 , 0x7040 , &ADDIU_R1_SP_ , 0, |
89a955e8 AM |
21693 | 0x0 }, /* ADDIU[R1.SP] */ |
21694 | }; | |
21695 | ||
21696 | ||
a1465490 | 21697 | static const Pool P_ADDIU_RS5_[2] = { |
89a955e8 | 21698 | { instruction , 0 , 0 , 16, |
8d416f6b | 21699 | 0xffe8 , 0x9008 , &NOP_16_ , 0, |
89a955e8 AM |
21700 | 0x0 }, /* NOP[16] */ |
21701 | { instruction , 0 , 0 , 16, | |
8d416f6b | 21702 | 0xfc08 , 0x9008 , &ADDIU_RS5_ , &ADDIU_RS5__cond , |
89a955e8 AM |
21703 | 0x0 }, /* ADDIU[RS5] */ |
21704 | }; | |
21705 | ||
21706 | ||
a1465490 | 21707 | static const Pool P16_A2[2] = { |
89a955e8 | 21708 | { instruction , 0 , 0 , 16, |
8d416f6b | 21709 | 0xfc08 , 0x9000 , &ADDIU_R2_ , 0, |
89a955e8 AM |
21710 | 0x0 }, /* ADDIU[R2] */ |
21711 | { pool , P_ADDIU_RS5_ , 2 , 16, | |
21712 | 0xfc08 , 0x9008 , 0 , 0, | |
21713 | 0x0 }, /* P.ADDIU[RS5] */ | |
21714 | }; | |
21715 | ||
21716 | ||
a1465490 | 21717 | static const Pool P16_ADDU[2] = { |
89a955e8 | 21718 | { instruction , 0 , 0 , 16, |
8d416f6b | 21719 | 0xfc01 , 0xb000 , &ADDU_16_ , 0, |
89a955e8 AM |
21720 | 0x0 }, /* ADDU[16] */ |
21721 | { instruction , 0 , 0 , 16, | |
8d416f6b | 21722 | 0xfc01 , 0xb001 , &SUBU_16_ , 0, |
89a955e8 AM |
21723 | 0x0 }, /* SUBU[16] */ |
21724 | }; | |
21725 | ||
21726 | ||
a1465490 | 21727 | static const Pool P16_JRC[2] = { |
89a955e8 | 21728 | { branch_instruction , 0 , 0 , 16, |
8d416f6b | 21729 | 0xfc1f , 0xd800 , &JRC , 0, |
89a955e8 AM |
21730 | 0x0 }, /* JRC */ |
21731 | { call_instruction , 0 , 0 , 16, | |
8d416f6b | 21732 | 0xfc1f , 0xd810 , &JALRC_16_ , 0, |
89a955e8 AM |
21733 | 0x0 }, /* JALRC[16] */ |
21734 | }; | |
21735 | ||
21736 | ||
a1465490 | 21737 | static const Pool P16_BR1[2] = { |
89a955e8 | 21738 | { branch_instruction , 0 , 0 , 16, |
8d416f6b | 21739 | 0xfc00 , 0xd800 , &BEQC_16_ , &BEQC_16__cond , |
89a955e8 AM |
21740 | XMMS_ }, /* BEQC[16] */ |
21741 | { branch_instruction , 0 , 0 , 16, | |
8d416f6b | 21742 | 0xfc00 , 0xd800 , &BNEC_16_ , &BNEC_16__cond , |
89a955e8 AM |
21743 | XMMS_ }, /* BNEC[16] */ |
21744 | }; | |
21745 | ||
21746 | ||
a1465490 | 21747 | static const Pool P16_BR[2] = { |
89a955e8 AM |
21748 | { pool , P16_JRC , 2 , 16, |
21749 | 0xfc0f , 0xd800 , 0 , 0, | |
21750 | 0x0 }, /* P16.JRC */ | |
21751 | { pool , P16_BR1 , 2 , 16, | |
655fc22f | 21752 | 0xfc00 , 0xd800 , 0 , &P16_BR1_cond , |
89a955e8 AM |
21753 | 0x0 }, /* P16.BR1 */ |
21754 | }; | |
21755 | ||
21756 | ||
a1465490 | 21757 | static const Pool P16_SR[2] = { |
89a955e8 | 21758 | { instruction , 0 , 0 , 16, |
8d416f6b | 21759 | 0xfd00 , 0x1c00 , &SAVE_16_ , 0, |
89a955e8 AM |
21760 | 0x0 }, /* SAVE[16] */ |
21761 | { return_instruction , 0 , 0 , 16, | |
8d416f6b | 21762 | 0xfd00 , 0x1d00 , &RESTORE_JRC_16_ , 0, |
89a955e8 AM |
21763 | 0x0 }, /* RESTORE.JRC[16] */ |
21764 | }; | |
21765 | ||
21766 | ||
a1465490 | 21767 | static const Pool P16_4X4[4] = { |
89a955e8 | 21768 | { instruction , 0 , 0 , 16, |
8d416f6b | 21769 | 0xfd08 , 0x3c00 , &ADDU_4X4_ , 0, |
89a955e8 AM |
21770 | XMMS_ }, /* ADDU[4X4] */ |
21771 | { instruction , 0 , 0 , 16, | |
8d416f6b | 21772 | 0xfd08 , 0x3c08 , &MUL_4X4_ , 0, |
89a955e8 AM |
21773 | XMMS_ }, /* MUL[4X4] */ |
21774 | { reserved_block , 0 , 0 , 16, | |
21775 | 0xfd08 , 0x3d00 , 0 , 0, | |
21776 | 0x0 }, /* P16.4X4~*(2) */ | |
21777 | { reserved_block , 0 , 0 , 16, | |
21778 | 0xfd08 , 0x3d08 , 0 , 0, | |
21779 | 0x0 }, /* P16.4X4~*(3) */ | |
21780 | }; | |
21781 | ||
21782 | ||
a1465490 | 21783 | static const Pool P16_LB[4] = { |
89a955e8 | 21784 | { instruction , 0 , 0 , 16, |
8d416f6b | 21785 | 0xfc0c , 0x5c00 , &LB_16_ , 0, |
89a955e8 AM |
21786 | 0x0 }, /* LB[16] */ |
21787 | { instruction , 0 , 0 , 16, | |
8d416f6b | 21788 | 0xfc0c , 0x5c04 , &SB_16_ , 0, |
89a955e8 AM |
21789 | 0x0 }, /* SB[16] */ |
21790 | { instruction , 0 , 0 , 16, | |
8d416f6b | 21791 | 0xfc0c , 0x5c08 , &LBU_16_ , 0, |
89a955e8 AM |
21792 | 0x0 }, /* LBU[16] */ |
21793 | { reserved_block , 0 , 0 , 16, | |
21794 | 0xfc0c , 0x5c0c , 0 , 0, | |
21795 | 0x0 }, /* P16.LB~*(3) */ | |
21796 | }; | |
21797 | ||
21798 | ||
a1465490 | 21799 | static const Pool P16_LH[4] = { |
89a955e8 | 21800 | { instruction , 0 , 0 , 16, |
8d416f6b | 21801 | 0xfc09 , 0x7c00 , &LH_16_ , 0, |
89a955e8 AM |
21802 | 0x0 }, /* LH[16] */ |
21803 | { instruction , 0 , 0 , 16, | |
8d416f6b | 21804 | 0xfc09 , 0x7c01 , &SH_16_ , 0, |
89a955e8 AM |
21805 | 0x0 }, /* SH[16] */ |
21806 | { instruction , 0 , 0 , 16, | |
8d416f6b | 21807 | 0xfc09 , 0x7c08 , &LHU_16_ , 0, |
89a955e8 AM |
21808 | 0x0 }, /* LHU[16] */ |
21809 | { reserved_block , 0 , 0 , 16, | |
21810 | 0xfc09 , 0x7c09 , 0 , 0, | |
21811 | 0x0 }, /* P16.LH~*(3) */ | |
21812 | }; | |
21813 | ||
21814 | ||
a1465490 | 21815 | static const Pool P16[32] = { |
89a955e8 AM |
21816 | { pool , P16_MV , 2 , 16, |
21817 | 0xfc00 , 0x1000 , 0 , 0, | |
21818 | 0x0 }, /* P16.MV */ | |
21819 | { pool , P16_SHIFT , 2 , 16, | |
21820 | 0xfc00 , 0x3000 , 0 , 0, | |
21821 | 0x0 }, /* P16.SHIFT */ | |
21822 | { pool , P16C , 2 , 16, | |
21823 | 0xfc00 , 0x5000 , 0 , 0, | |
21824 | 0x0 }, /* P16C */ | |
21825 | { pool , P16_A1 , 2 , 16, | |
21826 | 0xfc00 , 0x7000 , 0 , 0, | |
21827 | 0x0 }, /* P16.A1 */ | |
21828 | { pool , P16_A2 , 2 , 16, | |
21829 | 0xfc00 , 0x9000 , 0 , 0, | |
21830 | 0x0 }, /* P16.A2 */ | |
21831 | { pool , P16_ADDU , 2 , 16, | |
21832 | 0xfc00 , 0xb000 , 0 , 0, | |
21833 | 0x0 }, /* P16.ADDU */ | |
21834 | { instruction , 0 , 0 , 16, | |
8d416f6b | 21835 | 0xfc00 , 0xd000 , &LI_16_ , 0, |
89a955e8 AM |
21836 | 0x0 }, /* LI[16] */ |
21837 | { instruction , 0 , 0 , 16, | |
8d416f6b | 21838 | 0xfc00 , 0xf000 , &ANDI_16_ , 0, |
89a955e8 AM |
21839 | 0x0 }, /* ANDI[16] */ |
21840 | { instruction , 0 , 0 , 16, | |
8d416f6b | 21841 | 0xfc00 , 0x1400 , &LW_16_ , 0, |
89a955e8 AM |
21842 | 0x0 }, /* LW[16] */ |
21843 | { instruction , 0 , 0 , 16, | |
8d416f6b | 21844 | 0xfc00 , 0x3400 , &LW_SP_ , 0, |
89a955e8 AM |
21845 | 0x0 }, /* LW[SP] */ |
21846 | { instruction , 0 , 0 , 16, | |
8d416f6b | 21847 | 0xfc00 , 0x5400 , &LW_GP16_ , 0, |
89a955e8 AM |
21848 | 0x0 }, /* LW[GP16] */ |
21849 | { instruction , 0 , 0 , 16, | |
8d416f6b | 21850 | 0xfc00 , 0x7400 , &LW_4X4_ , 0, |
89a955e8 AM |
21851 | XMMS_ }, /* LW[4X4] */ |
21852 | { instruction , 0 , 0 , 16, | |
8d416f6b | 21853 | 0xfc00 , 0x9400 , &SW_16_ , 0, |
89a955e8 AM |
21854 | 0x0 }, /* SW[16] */ |
21855 | { instruction , 0 , 0 , 16, | |
8d416f6b | 21856 | 0xfc00 , 0xb400 , &SW_SP_ , 0, |
89a955e8 AM |
21857 | 0x0 }, /* SW[SP] */ |
21858 | { instruction , 0 , 0 , 16, | |
8d416f6b | 21859 | 0xfc00 , 0xd400 , &SW_GP16_ , 0, |
89a955e8 AM |
21860 | 0x0 }, /* SW[GP16] */ |
21861 | { instruction , 0 , 0 , 16, | |
8d416f6b | 21862 | 0xfc00 , 0xf400 , &SW_4X4_ , 0, |
89a955e8 AM |
21863 | XMMS_ }, /* SW[4X4] */ |
21864 | { branch_instruction , 0 , 0 , 16, | |
8d416f6b | 21865 | 0xfc00 , 0x1800 , &BC_16_ , 0, |
89a955e8 AM |
21866 | 0x0 }, /* BC[16] */ |
21867 | { call_instruction , 0 , 0 , 16, | |
8d416f6b | 21868 | 0xfc00 , 0x3800 , &BALC_16_ , 0, |
89a955e8 AM |
21869 | 0x0 }, /* BALC[16] */ |
21870 | { reserved_block , 0 , 0 , 16, | |
21871 | 0xfc00 , 0x5800 , 0 , 0, | |
21872 | 0x0 }, /* P16~*(10) */ | |
21873 | { reserved_block , 0 , 0 , 16, | |
21874 | 0xfc00 , 0x7800 , 0 , 0, | |
21875 | 0x0 }, /* P16~*(14) */ | |
21876 | { branch_instruction , 0 , 0 , 16, | |
8d416f6b | 21877 | 0xfc00 , 0x9800 , &BEQZC_16_ , 0, |
89a955e8 AM |
21878 | 0x0 }, /* BEQZC[16] */ |
21879 | { branch_instruction , 0 , 0 , 16, | |
8d416f6b | 21880 | 0xfc00 , 0xb800 , &BNEZC_16_ , 0, |
89a955e8 AM |
21881 | 0x0 }, /* BNEZC[16] */ |
21882 | { pool , P16_BR , 2 , 16, | |
21883 | 0xfc00 , 0xd800 , 0 , 0, | |
21884 | 0x0 }, /* P16.BR */ | |
21885 | { reserved_block , 0 , 0 , 16, | |
21886 | 0xfc00 , 0xf800 , 0 , 0, | |
21887 | 0x0 }, /* P16~*(30) */ | |
21888 | { pool , P16_SR , 2 , 16, | |
21889 | 0xfc00 , 0x1c00 , 0 , 0, | |
21890 | 0x0 }, /* P16.SR */ | |
21891 | { pool , P16_4X4 , 4 , 16, | |
21892 | 0xfc00 , 0x3c00 , 0 , 0, | |
21893 | 0x0 }, /* P16.4X4 */ | |
21894 | { pool , P16_LB , 4 , 16, | |
21895 | 0xfc00 , 0x5c00 , 0 , 0, | |
21896 | 0x0 }, /* P16.LB */ | |
21897 | { pool , P16_LH , 4 , 16, | |
21898 | 0xfc00 , 0x7c00 , 0 , 0, | |
21899 | 0x0 }, /* P16.LH */ | |
21900 | { reserved_block , 0 , 0 , 16, | |
21901 | 0xfc00 , 0x9c00 , 0 , 0, | |
21902 | 0x0 }, /* P16~*(19) */ | |
21903 | { instruction , 0 , 0 , 16, | |
8d416f6b | 21904 | 0xfc00 , 0xbc00 , &MOVEP , 0, |
89a955e8 AM |
21905 | XMMS_ }, /* MOVEP */ |
21906 | { reserved_block , 0 , 0 , 16, | |
21907 | 0xfc00 , 0xdc00 , 0 , 0, | |
21908 | 0x0 }, /* P16~*(27) */ | |
21909 | { instruction , 0 , 0 , 16, | |
8d416f6b | 21910 | 0xfc00 , 0xfc00 , &MOVEP_REV_ , 0, |
89a955e8 AM |
21911 | XMMS_ }, /* MOVEP[REV] */ |
21912 | }; | |
21913 | ||
21914 | ||
a1465490 | 21915 | static const Pool MAJOR[2] = { |
89a955e8 AM |
21916 | { pool , P32 , 32 , 32, |
21917 | 0x10000000, 0x00000000, 0 , 0, | |
21918 | 0x0 }, /* P32 */ | |
21919 | { pool , P16 , 32 , 16, | |
21920 | 0x1000 , 0x1000 , 0 , 0, | |
21921 | 0x0 }, /* P16 */ | |
21922 | }; | |
a1465490 | 21923 | |
7def8a4b | 21924 | static int nanomips_dis(char **buf, |
beebf65b ML |
21925 | Dis_info *info, |
21926 | unsigned short one, | |
21927 | unsigned short two, | |
21928 | unsigned short three) | |
21929 | { | |
beebf65b ML |
21930 | uint16 bits[3] = {one, two, three}; |
21931 | ||
21932 | TABLE_ENTRY_TYPE type; | |
49ec1c98 | 21933 | int size = Disassemble(bits, buf, type, MAJOR, 2, info); |
beebf65b ML |
21934 | return size; |
21935 | } | |
21936 | ||
21937 | int print_insn_nanomips(bfd_vma memaddr, struct disassemble_info *info) | |
21938 | { | |
21939 | int status; | |
21940 | bfd_byte buffer[2]; | |
21941 | uint16_t insn1 = 0, insn2 = 0, insn3 = 0; | |
22e7b52a | 21942 | g_autofree char *buf = NULL; |
beebf65b ML |
21943 | |
21944 | info->bytes_per_chunk = 2; | |
21945 | info->display_endian = info->endian; | |
21946 | info->insn_info_valid = 1; | |
21947 | info->branch_delay_insns = 0; | |
21948 | info->data_size = 0; | |
21949 | info->insn_type = dis_nonbranch; | |
21950 | info->target = 0; | |
21951 | info->target2 = 0; | |
21952 | ||
21953 | Dis_info disassm_info; | |
21954 | disassm_info.m_pc = memaddr; | |
3f2aec07 ML |
21955 | disassm_info.fprintf_func = info->fprintf_func; |
21956 | disassm_info.stream = info->stream; | |
beebf65b ML |
21957 | |
21958 | status = (*info->read_memory_func)(memaddr, buffer, 2, info); | |
21959 | if (status != 0) { | |
21960 | (*info->memory_error_func)(status, memaddr, info); | |
21961 | return -1; | |
21962 | } | |
21963 | ||
21964 | if (info->endian == BFD_ENDIAN_BIG) { | |
21965 | insn1 = bfd_getb16(buffer); | |
21966 | } else { | |
21967 | insn1 = bfd_getl16(buffer); | |
21968 | } | |
21969 | (*info->fprintf_func)(info->stream, "%04x ", insn1); | |
21970 | ||
21971 | /* Handle 32-bit opcodes. */ | |
21972 | if ((insn1 & 0x1000) == 0) { | |
21973 | status = (*info->read_memory_func)(memaddr + 2, buffer, 2, info); | |
21974 | if (status != 0) { | |
21975 | (*info->memory_error_func)(status, memaddr + 2, info); | |
21976 | return -1; | |
21977 | } | |
21978 | ||
21979 | if (info->endian == BFD_ENDIAN_BIG) { | |
21980 | insn2 = bfd_getb16(buffer); | |
21981 | } else { | |
21982 | insn2 = bfd_getl16(buffer); | |
21983 | } | |
21984 | (*info->fprintf_func)(info->stream, "%04x ", insn2); | |
21985 | } else { | |
21986 | (*info->fprintf_func)(info->stream, " "); | |
21987 | } | |
21988 | /* Handle 48-bit opcodes. */ | |
21989 | if ((insn1 >> 10) == 0x18) { | |
21990 | status = (*info->read_memory_func)(memaddr + 4, buffer, 2, info); | |
21991 | if (status != 0) { | |
21992 | (*info->memory_error_func)(status, memaddr + 4, info); | |
21993 | return -1; | |
21994 | } | |
21995 | ||
21996 | if (info->endian == BFD_ENDIAN_BIG) { | |
21997 | insn3 = bfd_getb16(buffer); | |
21998 | } else { | |
21999 | insn3 = bfd_getl16(buffer); | |
22000 | } | |
22001 | (*info->fprintf_func)(info->stream, "%04x ", insn3); | |
22002 | } else { | |
22003 | (*info->fprintf_func)(info->stream, " "); | |
22004 | } | |
22005 | ||
7def8a4b | 22006 | int length = nanomips_dis(&buf, &disassm_info, insn1, insn2, insn3); |
beebf65b ML |
22007 | |
22008 | /* FIXME: Should probably use a hash table on the major opcode here. */ | |
22009 | ||
22010 | (*info->fprintf_func) (info->stream, "%s", buf); | |
22011 | if (length > 0) { | |
22012 | return length / 8; | |
22013 | } | |
22014 | ||
22015 | info->insn_type = dis_noninsn; | |
22016 | ||
22017 | return insn3 ? 6 : insn2 ? 4 : 2; | |
22018 | } |