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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * processor_idle - idle state submodule to the ACPI processor driver | |
3 | * | |
4 | * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> | |
5 | * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> | |
c5ab81ca | 6 | * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de> |
1da177e4 LT |
7 | * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> |
8 | * - Added processor hotplug support | |
02df8b93 VP |
9 | * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> |
10 | * - Added support for C3 on SMP | |
1da177e4 LT |
11 | * |
12 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
13 | * | |
14 | * This program is free software; you can redistribute it and/or modify | |
15 | * it under the terms of the GNU General Public License as published by | |
16 | * the Free Software Foundation; either version 2 of the License, or (at | |
17 | * your option) any later version. | |
18 | * | |
19 | * This program is distributed in the hope that it will be useful, but | |
20 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
22 | * General Public License for more details. | |
23 | * | |
1da177e4 LT |
24 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
25 | */ | |
b6ec26fb | 26 | #define pr_fmt(fmt) "ACPI: " fmt |
1da177e4 | 27 | |
1da177e4 | 28 | #include <linux/module.h> |
1da177e4 LT |
29 | #include <linux/acpi.h> |
30 | #include <linux/dmi.h> | |
e2668fb5 | 31 | #include <linux/sched.h> /* need_resched() */ |
ee41eebf | 32 | #include <linux/tick.h> |
4f86d3a8 | 33 | #include <linux/cpuidle.h> |
6727ad9e | 34 | #include <linux/cpu.h> |
8b48463f | 35 | #include <acpi/processor.h> |
1da177e4 | 36 | |
3434933b TG |
37 | /* |
38 | * Include the apic definitions for x86 to have the APIC timer related defines | |
39 | * available also for UP (on SMP it gets magically included via linux/smp.h). | |
40 | * asm/acpi.h is not an option, as it would require more include magic. Also | |
41 | * creating an empty asm-ia64/apic.h would just trade pest vs. cholera. | |
42 | */ | |
43 | #ifdef CONFIG_X86 | |
44 | #include <asm/apic.h> | |
45 | #endif | |
46 | ||
1da177e4 | 47 | #define ACPI_PROCESSOR_CLASS "processor" |
1da177e4 | 48 | #define _COMPONENT ACPI_PROCESSOR_COMPONENT |
f52fd66d | 49 | ACPI_MODULE_NAME("processor_idle"); |
1da177e4 | 50 | |
dc2251bf RW |
51 | #define ACPI_IDLE_STATE_START (IS_ENABLED(CONFIG_ARCH_HAS_CPU_RELAX) ? 1 : 0) |
52 | ||
4f86d3a8 LB |
53 | static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER; |
54 | module_param(max_cstate, uint, 0000); | |
b6835052 | 55 | static unsigned int nocst __read_mostly; |
1da177e4 | 56 | module_param(nocst, uint, 0000); |
d3e7e99f LB |
57 | static int bm_check_disable __read_mostly; |
58 | module_param(bm_check_disable, uint, 0000); | |
1da177e4 | 59 | |
25de5718 | 60 | static unsigned int latency_factor __read_mostly = 2; |
4963f620 | 61 | module_param(latency_factor, uint, 0644); |
1da177e4 | 62 | |
3d339dcb DL |
63 | static DEFINE_PER_CPU(struct cpuidle_device *, acpi_cpuidle_device); |
64 | ||
35ae7133 SH |
65 | struct cpuidle_driver acpi_idle_driver = { |
66 | .name = "acpi_idle", | |
67 | .owner = THIS_MODULE, | |
68 | }; | |
69 | ||
70 | #ifdef CONFIG_ACPI_PROCESSOR_CSTATE | |
25528213 PZ |
71 | static |
72 | DEFINE_PER_CPU(struct acpi_processor_cx * [CPUIDLE_STATE_MAX], acpi_cstate); | |
ac3ebafa | 73 | |
d1896049 TR |
74 | static int disabled_by_idle_boot_param(void) |
75 | { | |
76 | return boot_option_idle_override == IDLE_POLL || | |
d1896049 TR |
77 | boot_option_idle_override == IDLE_HALT; |
78 | } | |
79 | ||
1da177e4 LT |
80 | /* |
81 | * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3. | |
82 | * For now disable this. Probably a bug somewhere else. | |
83 | * | |
84 | * To skip this limit, boot/load with a large max_cstate limit. | |
85 | */ | |
1855256c | 86 | static int set_max_cstate(const struct dmi_system_id *id) |
1da177e4 LT |
87 | { |
88 | if (max_cstate > ACPI_PROCESSOR_MAX_POWER) | |
89 | return 0; | |
90 | ||
b6ec26fb SH |
91 | pr_notice("%s detected - limiting to C%ld max_cstate." |
92 | " Override with \"processor.max_cstate=%d\"\n", id->ident, | |
93 | (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1); | |
1da177e4 | 94 | |
3d35600a | 95 | max_cstate = (long)id->driver_data; |
1da177e4 LT |
96 | |
97 | return 0; | |
98 | } | |
99 | ||
b0346688 | 100 | static const struct dmi_system_id processor_power_dmi_table[] = { |
876c184b TR |
101 | { set_max_cstate, "Clevo 5600D", { |
102 | DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"), | |
103 | DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")}, | |
4be44fcd | 104 | (void *)2}, |
370d5cd8 AV |
105 | { set_max_cstate, "Pavilion zv5000", { |
106 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
107 | DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")}, | |
108 | (void *)1}, | |
109 | { set_max_cstate, "Asus L8400B", { | |
110 | DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."), | |
111 | DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")}, | |
112 | (void *)1}, | |
1da177e4 LT |
113 | {}, |
114 | }; | |
115 | ||
4f86d3a8 | 116 | |
2e906655 | 117 | /* |
118 | * Callers should disable interrupts before the call and enable | |
119 | * interrupts after return. | |
120 | */ | |
6727ad9e | 121 | static void __cpuidle acpi_safe_halt(void) |
ddc081a1 | 122 | { |
ea811747 | 123 | if (!tif_need_resched()) { |
ddc081a1 | 124 | safe_halt(); |
71e93d15 VP |
125 | local_irq_disable(); |
126 | } | |
ddc081a1 VP |
127 | } |
128 | ||
169a0abb TG |
129 | #ifdef ARCH_APICTIMER_STOPS_ON_C3 |
130 | ||
131 | /* | |
132 | * Some BIOS implementations switch to C3 in the published C2 state. | |
296d93cd LT |
133 | * This seems to be a common problem on AMD boxen, but other vendors |
134 | * are affected too. We pick the most conservative approach: we assume | |
135 | * that the local APIC stops in both C2 and C3. | |
169a0abb | 136 | */ |
7e275cc4 | 137 | static void lapic_timer_check_state(int state, struct acpi_processor *pr, |
169a0abb TG |
138 | struct acpi_processor_cx *cx) |
139 | { | |
140 | struct acpi_processor_power *pwr = &pr->power; | |
e585bef8 | 141 | u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2; |
169a0abb | 142 | |
db954b58 VP |
143 | if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT)) |
144 | return; | |
145 | ||
07c94a38 | 146 | if (boot_cpu_has_bug(X86_BUG_AMD_APIC_C1E)) |
87ad57ba SL |
147 | type = ACPI_STATE_C1; |
148 | ||
169a0abb TG |
149 | /* |
150 | * Check, if one of the previous states already marked the lapic | |
151 | * unstable | |
152 | */ | |
153 | if (pwr->timer_broadcast_on_state < state) | |
154 | return; | |
155 | ||
e585bef8 | 156 | if (cx->type >= type) |
296d93cd | 157 | pr->power.timer_broadcast_on_state = state; |
169a0abb TG |
158 | } |
159 | ||
918aae42 | 160 | static void __lapic_timer_propagate_broadcast(void *arg) |
169a0abb | 161 | { |
f833bab8 | 162 | struct acpi_processor *pr = (struct acpi_processor *) arg; |
e9e2cdb4 | 163 | |
ee41eebf TG |
164 | if (pr->power.timer_broadcast_on_state < INT_MAX) |
165 | tick_broadcast_enable(); | |
166 | else | |
167 | tick_broadcast_disable(); | |
e9e2cdb4 TG |
168 | } |
169 | ||
918aae42 HS |
170 | static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) |
171 | { | |
172 | smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast, | |
173 | (void *)pr, 1); | |
174 | } | |
175 | ||
e9e2cdb4 | 176 | /* Power(C) State timer broadcast control */ |
7e275cc4 | 177 | static void lapic_timer_state_broadcast(struct acpi_processor *pr, |
e9e2cdb4 TG |
178 | struct acpi_processor_cx *cx, |
179 | int broadcast) | |
180 | { | |
e9e2cdb4 TG |
181 | int state = cx - pr->power.states; |
182 | ||
183 | if (state >= pr->power.timer_broadcast_on_state) { | |
7815701c TG |
184 | if (broadcast) |
185 | tick_broadcast_enter(); | |
186 | else | |
187 | tick_broadcast_exit(); | |
e9e2cdb4 | 188 | } |
169a0abb TG |
189 | } |
190 | ||
191 | #else | |
192 | ||
7e275cc4 | 193 | static void lapic_timer_check_state(int state, struct acpi_processor *pr, |
169a0abb | 194 | struct acpi_processor_cx *cstate) { } |
7e275cc4 LB |
195 | static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { } |
196 | static void lapic_timer_state_broadcast(struct acpi_processor *pr, | |
e9e2cdb4 TG |
197 | struct acpi_processor_cx *cx, |
198 | int broadcast) | |
199 | { | |
200 | } | |
169a0abb TG |
201 | |
202 | #endif | |
203 | ||
592913ec | 204 | #if defined(CONFIG_X86) |
520daf72 | 205 | static void tsc_check_state(int state) |
ddb25f9a AK |
206 | { |
207 | switch (boot_cpu_data.x86_vendor) { | |
208 | case X86_VENDOR_AMD: | |
40fb1715 | 209 | case X86_VENDOR_INTEL: |
ddb25f9a AK |
210 | /* |
211 | * AMD Fam10h TSC will tick in all | |
212 | * C/P/S0/S1 states when this bit is set. | |
213 | */ | |
40fb1715 | 214 | if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC)) |
520daf72 | 215 | return; |
40fb1715 | 216 | |
ddb25f9a | 217 | /*FALL THROUGH*/ |
ddb25f9a | 218 | default: |
520daf72 LB |
219 | /* TSC could halt in idle, so notify users */ |
220 | if (state > ACPI_STATE_C1) | |
221 | mark_tsc_unstable("TSC halts in idle"); | |
ddb25f9a AK |
222 | } |
223 | } | |
520daf72 LB |
224 | #else |
225 | static void tsc_check_state(int state) { return; } | |
ddb25f9a AK |
226 | #endif |
227 | ||
4be44fcd | 228 | static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr) |
1da177e4 | 229 | { |
1da177e4 | 230 | |
1da177e4 | 231 | if (!pr->pblk) |
d550d98d | 232 | return -ENODEV; |
1da177e4 | 233 | |
1da177e4 | 234 | /* if info is obtained from pblk/fadt, type equals state */ |
1da177e4 LT |
235 | pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2; |
236 | pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3; | |
237 | ||
4c033552 VP |
238 | #ifndef CONFIG_HOTPLUG_CPU |
239 | /* | |
240 | * Check for P_LVL2_UP flag before entering C2 and above on | |
4f86d3a8 | 241 | * an SMP system. |
4c033552 | 242 | */ |
ad71860a | 243 | if ((num_online_cpus() > 1) && |
cee324b1 | 244 | !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) |
d550d98d | 245 | return -ENODEV; |
4c033552 VP |
246 | #endif |
247 | ||
1da177e4 LT |
248 | /* determine C2 and C3 address from pblk */ |
249 | pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4; | |
250 | pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5; | |
251 | ||
252 | /* determine latencies from FADT */ | |
ba494bee BM |
253 | pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.c2_latency; |
254 | pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.c3_latency; | |
1da177e4 | 255 | |
5d76b6f6 LB |
256 | /* |
257 | * FADT specified C2 latency must be less than or equal to | |
258 | * 100 microseconds. | |
259 | */ | |
ba494bee | 260 | if (acpi_gbl_FADT.c2_latency > ACPI_PROCESSOR_MAX_C2_LATENCY) { |
5d76b6f6 | 261 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
ba494bee | 262 | "C2 latency too large [%d]\n", acpi_gbl_FADT.c2_latency)); |
5d76b6f6 LB |
263 | /* invalidate C2 */ |
264 | pr->power.states[ACPI_STATE_C2].address = 0; | |
265 | } | |
266 | ||
a6d72c18 LB |
267 | /* |
268 | * FADT supplied C3 latency must be less than or equal to | |
269 | * 1000 microseconds. | |
270 | */ | |
ba494bee | 271 | if (acpi_gbl_FADT.c3_latency > ACPI_PROCESSOR_MAX_C3_LATENCY) { |
a6d72c18 | 272 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
ba494bee | 273 | "C3 latency too large [%d]\n", acpi_gbl_FADT.c3_latency)); |
a6d72c18 LB |
274 | /* invalidate C3 */ |
275 | pr->power.states[ACPI_STATE_C3].address = 0; | |
276 | } | |
277 | ||
1da177e4 LT |
278 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
279 | "lvl2[0x%08x] lvl3[0x%08x]\n", | |
280 | pr->power.states[ACPI_STATE_C2].address, | |
281 | pr->power.states[ACPI_STATE_C3].address)); | |
282 | ||
d550d98d | 283 | return 0; |
1da177e4 LT |
284 | } |
285 | ||
991528d7 | 286 | static int acpi_processor_get_power_info_default(struct acpi_processor *pr) |
acf05f4b | 287 | { |
991528d7 VP |
288 | if (!pr->power.states[ACPI_STATE_C1].valid) { |
289 | /* set the first C-State to C1 */ | |
290 | /* all processors need to support C1 */ | |
291 | pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1; | |
292 | pr->power.states[ACPI_STATE_C1].valid = 1; | |
0fda6b40 | 293 | pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT; |
991528d7 VP |
294 | } |
295 | /* the C0 state only exists as a filler in our array */ | |
acf05f4b | 296 | pr->power.states[ACPI_STATE_C0].valid = 1; |
d550d98d | 297 | return 0; |
acf05f4b VP |
298 | } |
299 | ||
4be44fcd | 300 | static int acpi_processor_get_power_info_cst(struct acpi_processor *pr) |
1da177e4 | 301 | { |
6fd8050a | 302 | acpi_status status; |
439913ff | 303 | u64 count; |
cf824788 | 304 | int current_count; |
6fd8050a | 305 | int i, ret = 0; |
4be44fcd LB |
306 | struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; |
307 | union acpi_object *cst; | |
1da177e4 | 308 | |
1da177e4 | 309 | if (nocst) |
d550d98d | 310 | return -ENODEV; |
1da177e4 | 311 | |
991528d7 | 312 | current_count = 0; |
1da177e4 LT |
313 | |
314 | status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer); | |
315 | if (ACPI_FAILURE(status)) { | |
316 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n")); | |
d550d98d | 317 | return -ENODEV; |
4be44fcd | 318 | } |
1da177e4 | 319 | |
50dd0969 | 320 | cst = buffer.pointer; |
1da177e4 LT |
321 | |
322 | /* There must be at least 2 elements */ | |
323 | if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) { | |
b6ec26fb | 324 | pr_err("not enough elements in _CST\n"); |
6fd8050a | 325 | ret = -EFAULT; |
1da177e4 LT |
326 | goto end; |
327 | } | |
328 | ||
329 | count = cst->package.elements[0].integer.value; | |
330 | ||
331 | /* Validate number of power states. */ | |
332 | if (count < 1 || count != cst->package.count - 1) { | |
b6ec26fb | 333 | pr_err("count given by _CST is not valid\n"); |
6fd8050a | 334 | ret = -EFAULT; |
1da177e4 LT |
335 | goto end; |
336 | } | |
337 | ||
1da177e4 LT |
338 | /* Tell driver that at least _CST is supported. */ |
339 | pr->flags.has_cst = 1; | |
340 | ||
341 | for (i = 1; i <= count; i++) { | |
342 | union acpi_object *element; | |
343 | union acpi_object *obj; | |
344 | struct acpi_power_register *reg; | |
345 | struct acpi_processor_cx cx; | |
346 | ||
347 | memset(&cx, 0, sizeof(cx)); | |
348 | ||
50dd0969 | 349 | element = &(cst->package.elements[i]); |
1da177e4 LT |
350 | if (element->type != ACPI_TYPE_PACKAGE) |
351 | continue; | |
352 | ||
353 | if (element->package.count != 4) | |
354 | continue; | |
355 | ||
50dd0969 | 356 | obj = &(element->package.elements[0]); |
1da177e4 LT |
357 | |
358 | if (obj->type != ACPI_TYPE_BUFFER) | |
359 | continue; | |
360 | ||
4be44fcd | 361 | reg = (struct acpi_power_register *)obj->buffer.pointer; |
1da177e4 LT |
362 | |
363 | if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO && | |
4be44fcd | 364 | (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) |
1da177e4 LT |
365 | continue; |
366 | ||
1da177e4 | 367 | /* There should be an easy way to extract an integer... */ |
50dd0969 | 368 | obj = &(element->package.elements[1]); |
1da177e4 LT |
369 | if (obj->type != ACPI_TYPE_INTEGER) |
370 | continue; | |
371 | ||
372 | cx.type = obj->integer.value; | |
991528d7 VP |
373 | /* |
374 | * Some buggy BIOSes won't list C1 in _CST - | |
375 | * Let acpi_processor_get_power_info_default() handle them later | |
376 | */ | |
377 | if (i == 1 && cx.type != ACPI_STATE_C1) | |
378 | current_count++; | |
379 | ||
380 | cx.address = reg->address; | |
381 | cx.index = current_count + 1; | |
382 | ||
bc71bec9 | 383 | cx.entry_method = ACPI_CSTATE_SYSTEMIO; |
991528d7 VP |
384 | if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) { |
385 | if (acpi_processor_ffh_cstate_probe | |
386 | (pr->id, &cx, reg) == 0) { | |
bc71bec9 | 387 | cx.entry_method = ACPI_CSTATE_FFH; |
388 | } else if (cx.type == ACPI_STATE_C1) { | |
991528d7 VP |
389 | /* |
390 | * C1 is a special case where FIXED_HARDWARE | |
391 | * can be handled in non-MWAIT way as well. | |
392 | * In that case, save this _CST entry info. | |
991528d7 VP |
393 | * Otherwise, ignore this info and continue. |
394 | */ | |
bc71bec9 | 395 | cx.entry_method = ACPI_CSTATE_HALT; |
4fcb2fcd | 396 | snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT"); |
bc71bec9 | 397 | } else { |
991528d7 VP |
398 | continue; |
399 | } | |
da5e09a1 | 400 | if (cx.type == ACPI_STATE_C1 && |
d1896049 | 401 | (boot_option_idle_override == IDLE_NOMWAIT)) { |
c1e3b377 ZY |
402 | /* |
403 | * In most cases the C1 space_id obtained from | |
404 | * _CST object is FIXED_HARDWARE access mode. | |
405 | * But when the option of idle=halt is added, | |
406 | * the entry_method type should be changed from | |
407 | * CSTATE_FFH to CSTATE_HALT. | |
da5e09a1 ZY |
408 | * When the option of idle=nomwait is added, |
409 | * the C1 entry_method type should be | |
410 | * CSTATE_HALT. | |
c1e3b377 ZY |
411 | */ |
412 | cx.entry_method = ACPI_CSTATE_HALT; | |
413 | snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT"); | |
414 | } | |
4fcb2fcd VP |
415 | } else { |
416 | snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x", | |
417 | cx.address); | |
991528d7 | 418 | } |
1da177e4 | 419 | |
0fda6b40 VP |
420 | if (cx.type == ACPI_STATE_C1) { |
421 | cx.valid = 1; | |
422 | } | |
4fcb2fcd | 423 | |
50dd0969 | 424 | obj = &(element->package.elements[2]); |
1da177e4 LT |
425 | if (obj->type != ACPI_TYPE_INTEGER) |
426 | continue; | |
427 | ||
428 | cx.latency = obj->integer.value; | |
429 | ||
50dd0969 | 430 | obj = &(element->package.elements[3]); |
1da177e4 LT |
431 | if (obj->type != ACPI_TYPE_INTEGER) |
432 | continue; | |
433 | ||
cf824788 JM |
434 | current_count++; |
435 | memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx)); | |
436 | ||
437 | /* | |
438 | * We support total ACPI_PROCESSOR_MAX_POWER - 1 | |
439 | * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1) | |
440 | */ | |
441 | if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) { | |
b6ec26fb SH |
442 | pr_warn("Limiting number of power states to max (%d)\n", |
443 | ACPI_PROCESSOR_MAX_POWER); | |
444 | pr_warn("Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n"); | |
cf824788 JM |
445 | break; |
446 | } | |
1da177e4 LT |
447 | } |
448 | ||
4be44fcd | 449 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n", |
cf824788 | 450 | current_count)); |
1da177e4 LT |
451 | |
452 | /* Validate number of power states discovered */ | |
cf824788 | 453 | if (current_count < 2) |
6fd8050a | 454 | ret = -EFAULT; |
1da177e4 | 455 | |
4be44fcd | 456 | end: |
02438d87 | 457 | kfree(buffer.pointer); |
1da177e4 | 458 | |
6fd8050a | 459 | return ret; |
1da177e4 LT |
460 | } |
461 | ||
4be44fcd LB |
462 | static void acpi_processor_power_verify_c3(struct acpi_processor *pr, |
463 | struct acpi_processor_cx *cx) | |
1da177e4 | 464 | { |
ee1ca48f PV |
465 | static int bm_check_flag = -1; |
466 | static int bm_control_flag = -1; | |
02df8b93 | 467 | |
1da177e4 LT |
468 | |
469 | if (!cx->address) | |
d550d98d | 470 | return; |
1da177e4 | 471 | |
1da177e4 LT |
472 | /* |
473 | * PIIX4 Erratum #18: We don't support C3 when Type-F (fast) | |
474 | * DMA transfers are used by any ISA device to avoid livelock. | |
475 | * Note that we could disable Type-F DMA (as recommended by | |
476 | * the erratum), but this is known to disrupt certain ISA | |
477 | * devices thus we take the conservative approach. | |
478 | */ | |
479 | else if (errata.piix4.fdma) { | |
480 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
4be44fcd | 481 | "C3 not supported on PIIX4 with Type-F DMA\n")); |
d550d98d | 482 | return; |
1da177e4 LT |
483 | } |
484 | ||
02df8b93 | 485 | /* All the logic here assumes flags.bm_check is same across all CPUs */ |
ee1ca48f | 486 | if (bm_check_flag == -1) { |
02df8b93 VP |
487 | /* Determine whether bm_check is needed based on CPU */ |
488 | acpi_processor_power_init_bm_check(&(pr->flags), pr->id); | |
489 | bm_check_flag = pr->flags.bm_check; | |
ee1ca48f | 490 | bm_control_flag = pr->flags.bm_control; |
02df8b93 VP |
491 | } else { |
492 | pr->flags.bm_check = bm_check_flag; | |
ee1ca48f | 493 | pr->flags.bm_control = bm_control_flag; |
02df8b93 VP |
494 | } |
495 | ||
496 | if (pr->flags.bm_check) { | |
02df8b93 | 497 | if (!pr->flags.bm_control) { |
ed3110ef VP |
498 | if (pr->flags.has_cst != 1) { |
499 | /* bus mastering control is necessary */ | |
500 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
501 | "C3 support requires BM control\n")); | |
502 | return; | |
503 | } else { | |
504 | /* Here we enter C3 without bus mastering */ | |
505 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
506 | "C3 support without BM control\n")); | |
507 | } | |
02df8b93 VP |
508 | } |
509 | } else { | |
02df8b93 VP |
510 | /* |
511 | * WBINVD should be set in fadt, for C3 state to be | |
512 | * supported on when bm_check is not required. | |
513 | */ | |
cee324b1 | 514 | if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) { |
02df8b93 | 515 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
4be44fcd LB |
516 | "Cache invalidation should work properly" |
517 | " for C3 to be enabled on SMP systems\n")); | |
d550d98d | 518 | return; |
02df8b93 | 519 | } |
02df8b93 VP |
520 | } |
521 | ||
1da177e4 LT |
522 | /* |
523 | * Otherwise we've met all of our C3 requirements. | |
524 | * Normalize the C3 latency to expidite policy. Enable | |
525 | * checking of bus mastering status (bm_check) so we can | |
526 | * use this in our C3 policy | |
527 | */ | |
528 | cx->valid = 1; | |
4f86d3a8 | 529 | |
31878dd8 LB |
530 | /* |
531 | * On older chipsets, BM_RLD needs to be set | |
532 | * in order for Bus Master activity to wake the | |
533 | * system from C3. Newer chipsets handle DMA | |
534 | * during C3 automatically and BM_RLD is a NOP. | |
535 | * In either case, the proper way to | |
536 | * handle BM_RLD is to set it and leave it set. | |
537 | */ | |
50ffba1b | 538 | acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1); |
1da177e4 | 539 | |
d550d98d | 540 | return; |
1da177e4 LT |
541 | } |
542 | ||
1da177e4 LT |
543 | static int acpi_processor_power_verify(struct acpi_processor *pr) |
544 | { | |
545 | unsigned int i; | |
546 | unsigned int working = 0; | |
6eb0a0fd | 547 | |
169a0abb | 548 | pr->power.timer_broadcast_on_state = INT_MAX; |
6eb0a0fd | 549 | |
a0bf284b | 550 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { |
1da177e4 LT |
551 | struct acpi_processor_cx *cx = &pr->power.states[i]; |
552 | ||
553 | switch (cx->type) { | |
554 | case ACPI_STATE_C1: | |
555 | cx->valid = 1; | |
556 | break; | |
557 | ||
558 | case ACPI_STATE_C2: | |
d22edd29 LB |
559 | if (!cx->address) |
560 | break; | |
cad1525a | 561 | cx->valid = 1; |
1da177e4 LT |
562 | break; |
563 | ||
564 | case ACPI_STATE_C3: | |
565 | acpi_processor_power_verify_c3(pr, cx); | |
566 | break; | |
567 | } | |
7e275cc4 LB |
568 | if (!cx->valid) |
569 | continue; | |
1da177e4 | 570 | |
7e275cc4 LB |
571 | lapic_timer_check_state(i, pr, cx); |
572 | tsc_check_state(cx->type); | |
573 | working++; | |
1da177e4 | 574 | } |
bd663347 | 575 | |
918aae42 | 576 | lapic_timer_propagate_broadcast(pr); |
1da177e4 LT |
577 | |
578 | return (working); | |
579 | } | |
580 | ||
a36a7fec | 581 | static int acpi_processor_get_cstate_info(struct acpi_processor *pr) |
1da177e4 LT |
582 | { |
583 | unsigned int i; | |
584 | int result; | |
585 | ||
1da177e4 LT |
586 | |
587 | /* NOTE: the idle thread may not be running while calling | |
588 | * this function */ | |
589 | ||
991528d7 VP |
590 | /* Zero initialize all the C-states info. */ |
591 | memset(pr->power.states, 0, sizeof(pr->power.states)); | |
592 | ||
1da177e4 | 593 | result = acpi_processor_get_power_info_cst(pr); |
6d93c648 | 594 | if (result == -ENODEV) |
c5a114f1 | 595 | result = acpi_processor_get_power_info_fadt(pr); |
6d93c648 | 596 | |
991528d7 VP |
597 | if (result) |
598 | return result; | |
599 | ||
600 | acpi_processor_get_power_info_default(pr); | |
601 | ||
cf824788 | 602 | pr->power.count = acpi_processor_power_verify(pr); |
1da177e4 | 603 | |
1da177e4 LT |
604 | /* |
605 | * if one state of type C2 or C3 is available, mark this | |
606 | * CPU as being "idle manageable" | |
607 | */ | |
608 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { | |
acf05f4b | 609 | if (pr->power.states[i].valid) { |
1da177e4 | 610 | pr->power.count = i; |
2203d6ed LT |
611 | if (pr->power.states[i].type >= ACPI_STATE_C2) |
612 | pr->flags.power = 1; | |
acf05f4b | 613 | } |
1da177e4 LT |
614 | } |
615 | ||
d550d98d | 616 | return 0; |
1da177e4 LT |
617 | } |
618 | ||
4f86d3a8 LB |
619 | /** |
620 | * acpi_idle_bm_check - checks if bus master activity was detected | |
621 | */ | |
622 | static int acpi_idle_bm_check(void) | |
623 | { | |
624 | u32 bm_status = 0; | |
625 | ||
d3e7e99f LB |
626 | if (bm_check_disable) |
627 | return 0; | |
628 | ||
50ffba1b | 629 | acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status); |
4f86d3a8 | 630 | if (bm_status) |
50ffba1b | 631 | acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1); |
4f86d3a8 LB |
632 | /* |
633 | * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect | |
634 | * the true state of bus mastering activity; forcing us to | |
635 | * manually check the BMIDEA bit of each IDE channel. | |
636 | */ | |
637 | else if (errata.piix4.bmisx) { | |
638 | if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01) | |
639 | || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01)) | |
640 | bm_status = 1; | |
641 | } | |
642 | return bm_status; | |
643 | } | |
644 | ||
4f86d3a8 | 645 | /** |
b00783fd | 646 | * acpi_idle_do_entry - enter idle state using the appropriate method |
4f86d3a8 | 647 | * @cx: cstate data |
bc71bec9 | 648 | * |
649 | * Caller disables interrupt before call and enables interrupt after return. | |
4f86d3a8 | 650 | */ |
6727ad9e | 651 | static void __cpuidle acpi_idle_do_entry(struct acpi_processor_cx *cx) |
4f86d3a8 | 652 | { |
bc71bec9 | 653 | if (cx->entry_method == ACPI_CSTATE_FFH) { |
4f86d3a8 LB |
654 | /* Call into architectural FFH based C-state */ |
655 | acpi_processor_ffh_cstate_enter(cx); | |
bc71bec9 | 656 | } else if (cx->entry_method == ACPI_CSTATE_HALT) { |
657 | acpi_safe_halt(); | |
4f86d3a8 | 658 | } else { |
4f86d3a8 LB |
659 | /* IO port based C-state */ |
660 | inb(cx->address); | |
661 | /* Dummy wait op - must do something useless after P_LVL2 read | |
662 | because chipsets cannot guarantee that STPCLK# signal | |
663 | gets asserted in time to freeze execution properly. */ | |
cfa806f0 | 664 | inl(acpi_gbl_FADT.xpm_timer_block.address); |
4f86d3a8 LB |
665 | } |
666 | } | |
667 | ||
1a022e3f BO |
668 | /** |
669 | * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining) | |
670 | * @dev: the target CPU | |
671 | * @index: the index of suggested state | |
672 | */ | |
673 | static int acpi_idle_play_dead(struct cpuidle_device *dev, int index) | |
674 | { | |
6240a10d | 675 | struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); |
1a022e3f BO |
676 | |
677 | ACPI_FLUSH_CPU_CACHE(); | |
678 | ||
679 | while (1) { | |
680 | ||
681 | if (cx->entry_method == ACPI_CSTATE_HALT) | |
54f70077 | 682 | safe_halt(); |
1a022e3f BO |
683 | else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) { |
684 | inb(cx->address); | |
685 | /* See comment in acpi_idle_do_entry() */ | |
686 | inl(acpi_gbl_FADT.xpm_timer_block.address); | |
687 | } else | |
688 | return -ENODEV; | |
689 | } | |
690 | ||
691 | /* Never reached */ | |
692 | return 0; | |
693 | } | |
694 | ||
adcb2623 RW |
695 | static bool acpi_idle_fallback_to_c1(struct acpi_processor *pr) |
696 | { | |
5f508185 RW |
697 | return IS_ENABLED(CONFIG_HOTPLUG_CPU) && !pr->flags.has_cst && |
698 | !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED); | |
adcb2623 RW |
699 | } |
700 | ||
4f86d3a8 | 701 | static int c3_cpu_count; |
e12f65f7 | 702 | static DEFINE_RAW_SPINLOCK(c3_lock); |
4f86d3a8 LB |
703 | |
704 | /** | |
705 | * acpi_idle_enter_bm - enters C3 with proper BM handling | |
6491bc0c RW |
706 | * @pr: Target processor |
707 | * @cx: Target state context | |
5f508185 | 708 | * @timer_bc: Whether or not to change timer mode to broadcast |
4f86d3a8 | 709 | */ |
6491bc0c | 710 | static void acpi_idle_enter_bm(struct acpi_processor *pr, |
5f508185 | 711 | struct acpi_processor_cx *cx, bool timer_bc) |
4f86d3a8 | 712 | { |
67535736 AL |
713 | acpi_unlazy_tlb(smp_processor_id()); |
714 | ||
4f86d3a8 LB |
715 | /* |
716 | * Must be done before busmaster disable as we might need to | |
717 | * access HPET ! | |
718 | */ | |
5f508185 RW |
719 | if (timer_bc) |
720 | lapic_timer_state_broadcast(pr, cx, 1); | |
4f86d3a8 | 721 | |
ddc081a1 VP |
722 | /* |
723 | * disable bus master | |
724 | * bm_check implies we need ARB_DIS | |
ddc081a1 VP |
725 | * bm_control implies whether we can do ARB_DIS |
726 | * | |
727 | * That leaves a case where bm_check is set and bm_control is | |
728 | * not set. In that case we cannot do much, we enter C3 | |
729 | * without doing anything. | |
730 | */ | |
2a738352 | 731 | if (pr->flags.bm_control) { |
e12f65f7 | 732 | raw_spin_lock(&c3_lock); |
4f86d3a8 LB |
733 | c3_cpu_count++; |
734 | /* Disable bus master arbitration when all CPUs are in C3 */ | |
735 | if (c3_cpu_count == num_online_cpus()) | |
50ffba1b | 736 | acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1); |
e12f65f7 | 737 | raw_spin_unlock(&c3_lock); |
ddc081a1 | 738 | } |
4f86d3a8 | 739 | |
ddc081a1 | 740 | acpi_idle_do_entry(cx); |
4f86d3a8 | 741 | |
ddc081a1 | 742 | /* Re-enable bus master arbitration */ |
2a738352 | 743 | if (pr->flags.bm_control) { |
e12f65f7 | 744 | raw_spin_lock(&c3_lock); |
50ffba1b | 745 | acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0); |
4f86d3a8 | 746 | c3_cpu_count--; |
e12f65f7 | 747 | raw_spin_unlock(&c3_lock); |
4f86d3a8 | 748 | } |
e978aa7d | 749 | |
5f508185 RW |
750 | if (timer_bc) |
751 | lapic_timer_state_broadcast(pr, cx, 0); | |
6491bc0c RW |
752 | } |
753 | ||
754 | static int acpi_idle_enter(struct cpuidle_device *dev, | |
755 | struct cpuidle_driver *drv, int index) | |
756 | { | |
757 | struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); | |
758 | struct acpi_processor *pr; | |
759 | ||
760 | pr = __this_cpu_read(processors); | |
761 | if (unlikely(!pr)) | |
762 | return -EINVAL; | |
763 | ||
764 | if (cx->type != ACPI_STATE_C1) { | |
5f508185 | 765 | if (acpi_idle_fallback_to_c1(pr) && num_online_cpus() > 1) { |
dc2251bf | 766 | index = ACPI_IDLE_STATE_START; |
6491bc0c RW |
767 | cx = per_cpu(acpi_cstate[index], dev->cpu); |
768 | } else if (cx->type == ACPI_STATE_C3 && pr->flags.bm_check) { | |
769 | if (cx->bm_sts_skip || !acpi_idle_bm_check()) { | |
5f508185 | 770 | acpi_idle_enter_bm(pr, cx, true); |
6491bc0c RW |
771 | return index; |
772 | } else if (drv->safe_state_index >= 0) { | |
773 | index = drv->safe_state_index; | |
774 | cx = per_cpu(acpi_cstate[index], dev->cpu); | |
775 | } else { | |
776 | acpi_safe_halt(); | |
777 | return -EBUSY; | |
778 | } | |
779 | } | |
780 | } | |
781 | ||
782 | lapic_timer_state_broadcast(pr, cx, 1); | |
783 | ||
784 | if (cx->type == ACPI_STATE_C3) | |
785 | ACPI_FLUSH_CPU_CACHE(); | |
786 | ||
787 | acpi_idle_do_entry(cx); | |
788 | ||
789 | lapic_timer_state_broadcast(pr, cx, 0); | |
790 | ||
e978aa7d | 791 | return index; |
4f86d3a8 LB |
792 | } |
793 | ||
28ba086e | 794 | static void acpi_idle_enter_s2idle(struct cpuidle_device *dev, |
5f508185 RW |
795 | struct cpuidle_driver *drv, int index) |
796 | { | |
797 | struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); | |
798 | ||
799 | if (cx->type == ACPI_STATE_C3) { | |
800 | struct acpi_processor *pr = __this_cpu_read(processors); | |
801 | ||
802 | if (unlikely(!pr)) | |
803 | return; | |
804 | ||
805 | if (pr->flags.bm_check) { | |
806 | acpi_idle_enter_bm(pr, cx, false); | |
807 | return; | |
808 | } else { | |
809 | ACPI_FLUSH_CPU_CACHE(); | |
810 | } | |
811 | } | |
812 | acpi_idle_do_entry(cx); | |
813 | } | |
814 | ||
6ef0f086 DL |
815 | static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr, |
816 | struct cpuidle_device *dev) | |
4f86d3a8 | 817 | { |
dc2251bf | 818 | int i, count = ACPI_IDLE_STATE_START; |
4f86d3a8 | 819 | struct acpi_processor_cx *cx; |
4f86d3a8 | 820 | |
615dfd93 LB |
821 | if (max_cstate == 0) |
822 | max_cstate = 1; | |
823 | ||
4f86d3a8 LB |
824 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { |
825 | cx = &pr->power.states[i]; | |
4f86d3a8 LB |
826 | |
827 | if (!cx->valid) | |
828 | continue; | |
829 | ||
6240a10d | 830 | per_cpu(acpi_cstate[count], dev->cpu) = cx; |
4f86d3a8 | 831 | |
46bcfad7 DD |
832 | count++; |
833 | if (count == CPUIDLE_STATE_MAX) | |
834 | break; | |
835 | } | |
836 | ||
46bcfad7 DD |
837 | if (!count) |
838 | return -EINVAL; | |
839 | ||
840 | return 0; | |
841 | } | |
842 | ||
a36a7fec | 843 | static int acpi_processor_setup_cstates(struct acpi_processor *pr) |
46bcfad7 | 844 | { |
1b39e3f8 | 845 | int i, count; |
46bcfad7 DD |
846 | struct acpi_processor_cx *cx; |
847 | struct cpuidle_state *state; | |
848 | struct cpuidle_driver *drv = &acpi_idle_driver; | |
849 | ||
615dfd93 LB |
850 | if (max_cstate == 0) |
851 | max_cstate = 1; | |
852 | ||
1b39e3f8 RW |
853 | if (IS_ENABLED(CONFIG_ARCH_HAS_CPU_RELAX)) { |
854 | cpuidle_poll_state_init(drv); | |
855 | count = 1; | |
856 | } else { | |
857 | count = 0; | |
858 | } | |
859 | ||
4f86d3a8 LB |
860 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { |
861 | cx = &pr->power.states[i]; | |
4f86d3a8 LB |
862 | |
863 | if (!cx->valid) | |
864 | continue; | |
865 | ||
46bcfad7 | 866 | state = &drv->states[count]; |
4f86d3a8 | 867 | snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i); |
a36a7fec | 868 | strlcpy(state->desc, cx->desc, CPUIDLE_DESC_LEN); |
4f86d3a8 | 869 | state->exit_latency = cx->latency; |
4963f620 | 870 | state->target_residency = cx->latency * latency_factor; |
6491bc0c | 871 | state->enter = acpi_idle_enter; |
4f86d3a8 LB |
872 | |
873 | state->flags = 0; | |
6491bc0c | 874 | if (cx->type == ACPI_STATE_C1 || cx->type == ACPI_STATE_C2) { |
1a022e3f | 875 | state->enter_dead = acpi_idle_play_dead; |
46bcfad7 | 876 | drv->safe_state_index = count; |
4f86d3a8 | 877 | } |
5f508185 | 878 | /* |
28ba086e | 879 | * Halt-induced C1 is not good for ->enter_s2idle, because it |
5f508185 RW |
880 | * re-enables interrupts on exit. Moreover, C1 is generally not |
881 | * particularly interesting from the suspend-to-idle angle, so | |
882 | * avoid C1 and the situations in which we may need to fall back | |
883 | * to it altogether. | |
884 | */ | |
885 | if (cx->type != ACPI_STATE_C1 && !acpi_idle_fallback_to_c1(pr)) | |
28ba086e | 886 | state->enter_s2idle = acpi_idle_enter_s2idle; |
4f86d3a8 LB |
887 | |
888 | count++; | |
9a0b8415 | 889 | if (count == CPUIDLE_STATE_MAX) |
890 | break; | |
4f86d3a8 LB |
891 | } |
892 | ||
46bcfad7 | 893 | drv->state_count = count; |
4f86d3a8 LB |
894 | |
895 | if (!count) | |
896 | return -EINVAL; | |
897 | ||
4f86d3a8 LB |
898 | return 0; |
899 | } | |
900 | ||
35ae7133 SH |
901 | static inline void acpi_processor_cstate_first_run_checks(void) |
902 | { | |
903 | acpi_status status; | |
904 | static int first_run; | |
905 | ||
906 | if (first_run) | |
907 | return; | |
908 | dmi_check_system(processor_power_dmi_table); | |
909 | max_cstate = acpi_processor_cstate_check(max_cstate); | |
910 | if (max_cstate < ACPI_C_STATES_MAX) | |
911 | pr_notice("ACPI: processor limited to max C-state %d\n", | |
912 | max_cstate); | |
913 | first_run++; | |
914 | ||
915 | if (acpi_gbl_FADT.cst_control && !nocst) { | |
916 | status = acpi_os_write_port(acpi_gbl_FADT.smi_command, | |
917 | acpi_gbl_FADT.cst_control, 8); | |
918 | if (ACPI_FAILURE(status)) | |
919 | ACPI_EXCEPTION((AE_INFO, status, | |
920 | "Notifying BIOS of _CST ability failed")); | |
921 | } | |
922 | } | |
923 | #else | |
924 | ||
925 | static inline int disabled_by_idle_boot_param(void) { return 0; } | |
926 | static inline void acpi_processor_cstate_first_run_checks(void) { } | |
a36a7fec | 927 | static int acpi_processor_get_cstate_info(struct acpi_processor *pr) |
35ae7133 SH |
928 | { |
929 | return -ENODEV; | |
930 | } | |
931 | ||
932 | static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr, | |
933 | struct cpuidle_device *dev) | |
934 | { | |
935 | return -EINVAL; | |
936 | } | |
937 | ||
a36a7fec | 938 | static int acpi_processor_setup_cstates(struct acpi_processor *pr) |
35ae7133 SH |
939 | { |
940 | return -EINVAL; | |
941 | } | |
942 | ||
943 | #endif /* CONFIG_ACPI_PROCESSOR_CSTATE */ | |
944 | ||
a36a7fec SH |
945 | struct acpi_lpi_states_array { |
946 | unsigned int size; | |
947 | unsigned int composite_states_size; | |
948 | struct acpi_lpi_state *entries; | |
949 | struct acpi_lpi_state *composite_states[ACPI_PROCESSOR_MAX_POWER]; | |
950 | }; | |
951 | ||
952 | static int obj_get_integer(union acpi_object *obj, u32 *value) | |
953 | { | |
954 | if (obj->type != ACPI_TYPE_INTEGER) | |
955 | return -EINVAL; | |
956 | ||
957 | *value = obj->integer.value; | |
958 | return 0; | |
959 | } | |
960 | ||
961 | static int acpi_processor_evaluate_lpi(acpi_handle handle, | |
962 | struct acpi_lpi_states_array *info) | |
963 | { | |
964 | acpi_status status; | |
965 | int ret = 0; | |
966 | int pkg_count, state_idx = 1, loop; | |
967 | struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; | |
968 | union acpi_object *lpi_data; | |
969 | struct acpi_lpi_state *lpi_state; | |
970 | ||
971 | status = acpi_evaluate_object(handle, "_LPI", NULL, &buffer); | |
972 | if (ACPI_FAILURE(status)) { | |
973 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _LPI, giving up\n")); | |
974 | return -ENODEV; | |
975 | } | |
976 | ||
977 | lpi_data = buffer.pointer; | |
978 | ||
979 | /* There must be at least 4 elements = 3 elements + 1 package */ | |
980 | if (!lpi_data || lpi_data->type != ACPI_TYPE_PACKAGE || | |
981 | lpi_data->package.count < 4) { | |
982 | pr_debug("not enough elements in _LPI\n"); | |
983 | ret = -ENODATA; | |
984 | goto end; | |
985 | } | |
986 | ||
987 | pkg_count = lpi_data->package.elements[2].integer.value; | |
988 | ||
989 | /* Validate number of power states. */ | |
990 | if (pkg_count < 1 || pkg_count != lpi_data->package.count - 3) { | |
991 | pr_debug("count given by _LPI is not valid\n"); | |
992 | ret = -ENODATA; | |
993 | goto end; | |
994 | } | |
995 | ||
996 | lpi_state = kcalloc(pkg_count, sizeof(*lpi_state), GFP_KERNEL); | |
997 | if (!lpi_state) { | |
998 | ret = -ENOMEM; | |
999 | goto end; | |
1000 | } | |
1001 | ||
1002 | info->size = pkg_count; | |
1003 | info->entries = lpi_state; | |
1004 | ||
1005 | /* LPI States start at index 3 */ | |
1006 | for (loop = 3; state_idx <= pkg_count; loop++, state_idx++, lpi_state++) { | |
1007 | union acpi_object *element, *pkg_elem, *obj; | |
1008 | ||
1009 | element = &lpi_data->package.elements[loop]; | |
1010 | if (element->type != ACPI_TYPE_PACKAGE || element->package.count < 7) | |
1011 | continue; | |
1012 | ||
1013 | pkg_elem = element->package.elements; | |
1014 | ||
1015 | obj = pkg_elem + 6; | |
1016 | if (obj->type == ACPI_TYPE_BUFFER) { | |
1017 | struct acpi_power_register *reg; | |
1018 | ||
1019 | reg = (struct acpi_power_register *)obj->buffer.pointer; | |
1020 | if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO && | |
1021 | reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE) | |
1022 | continue; | |
1023 | ||
1024 | lpi_state->address = reg->address; | |
1025 | lpi_state->entry_method = | |
1026 | reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE ? | |
1027 | ACPI_CSTATE_FFH : ACPI_CSTATE_SYSTEMIO; | |
1028 | } else if (obj->type == ACPI_TYPE_INTEGER) { | |
1029 | lpi_state->entry_method = ACPI_CSTATE_INTEGER; | |
1030 | lpi_state->address = obj->integer.value; | |
1031 | } else { | |
1032 | continue; | |
1033 | } | |
1034 | ||
1035 | /* elements[7,8] skipped for now i.e. Residency/Usage counter*/ | |
1036 | ||
1037 | obj = pkg_elem + 9; | |
1038 | if (obj->type == ACPI_TYPE_STRING) | |
1039 | strlcpy(lpi_state->desc, obj->string.pointer, | |
1040 | ACPI_CX_DESC_LEN); | |
1041 | ||
1042 | lpi_state->index = state_idx; | |
1043 | if (obj_get_integer(pkg_elem + 0, &lpi_state->min_residency)) { | |
1044 | pr_debug("No min. residency found, assuming 10 us\n"); | |
1045 | lpi_state->min_residency = 10; | |
1046 | } | |
1047 | ||
1048 | if (obj_get_integer(pkg_elem + 1, &lpi_state->wake_latency)) { | |
1049 | pr_debug("No wakeup residency found, assuming 10 us\n"); | |
1050 | lpi_state->wake_latency = 10; | |
1051 | } | |
1052 | ||
1053 | if (obj_get_integer(pkg_elem + 2, &lpi_state->flags)) | |
1054 | lpi_state->flags = 0; | |
1055 | ||
1056 | if (obj_get_integer(pkg_elem + 3, &lpi_state->arch_flags)) | |
1057 | lpi_state->arch_flags = 0; | |
1058 | ||
1059 | if (obj_get_integer(pkg_elem + 4, &lpi_state->res_cnt_freq)) | |
1060 | lpi_state->res_cnt_freq = 1; | |
1061 | ||
1062 | if (obj_get_integer(pkg_elem + 5, &lpi_state->enable_parent_state)) | |
1063 | lpi_state->enable_parent_state = 0; | |
1064 | } | |
1065 | ||
1066 | acpi_handle_debug(handle, "Found %d power states\n", state_idx); | |
1067 | end: | |
1068 | kfree(buffer.pointer); | |
1069 | return ret; | |
1070 | } | |
1071 | ||
1072 | /* | |
1073 | * flat_state_cnt - the number of composite LPI states after the process of flattening | |
1074 | */ | |
1075 | static int flat_state_cnt; | |
1076 | ||
1077 | /** | |
1078 | * combine_lpi_states - combine local and parent LPI states to form a composite LPI state | |
1079 | * | |
1080 | * @local: local LPI state | |
1081 | * @parent: parent LPI state | |
1082 | * @result: composite LPI state | |
1083 | */ | |
1084 | static bool combine_lpi_states(struct acpi_lpi_state *local, | |
1085 | struct acpi_lpi_state *parent, | |
1086 | struct acpi_lpi_state *result) | |
1087 | { | |
1088 | if (parent->entry_method == ACPI_CSTATE_INTEGER) { | |
1089 | if (!parent->address) /* 0 means autopromotable */ | |
1090 | return false; | |
1091 | result->address = local->address + parent->address; | |
1092 | } else { | |
1093 | result->address = parent->address; | |
1094 | } | |
1095 | ||
1096 | result->min_residency = max(local->min_residency, parent->min_residency); | |
1097 | result->wake_latency = local->wake_latency + parent->wake_latency; | |
1098 | result->enable_parent_state = parent->enable_parent_state; | |
1099 | result->entry_method = local->entry_method; | |
1100 | ||
1101 | result->flags = parent->flags; | |
1102 | result->arch_flags = parent->arch_flags; | |
1103 | result->index = parent->index; | |
1104 | ||
1105 | strlcpy(result->desc, local->desc, ACPI_CX_DESC_LEN); | |
1106 | strlcat(result->desc, "+", ACPI_CX_DESC_LEN); | |
1107 | strlcat(result->desc, parent->desc, ACPI_CX_DESC_LEN); | |
1108 | return true; | |
1109 | } | |
1110 | ||
1111 | #define ACPI_LPI_STATE_FLAGS_ENABLED BIT(0) | |
1112 | ||
1113 | static void stash_composite_state(struct acpi_lpi_states_array *curr_level, | |
1114 | struct acpi_lpi_state *t) | |
1115 | { | |
1116 | curr_level->composite_states[curr_level->composite_states_size++] = t; | |
1117 | } | |
1118 | ||
1119 | static int flatten_lpi_states(struct acpi_processor *pr, | |
1120 | struct acpi_lpi_states_array *curr_level, | |
1121 | struct acpi_lpi_states_array *prev_level) | |
1122 | { | |
1123 | int i, j, state_count = curr_level->size; | |
1124 | struct acpi_lpi_state *p, *t = curr_level->entries; | |
1125 | ||
1126 | curr_level->composite_states_size = 0; | |
1127 | for (j = 0; j < state_count; j++, t++) { | |
1128 | struct acpi_lpi_state *flpi; | |
1129 | ||
1130 | if (!(t->flags & ACPI_LPI_STATE_FLAGS_ENABLED)) | |
1131 | continue; | |
1132 | ||
1133 | if (flat_state_cnt >= ACPI_PROCESSOR_MAX_POWER) { | |
1134 | pr_warn("Limiting number of LPI states to max (%d)\n", | |
1135 | ACPI_PROCESSOR_MAX_POWER); | |
1136 | pr_warn("Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n"); | |
1137 | break; | |
1138 | } | |
1139 | ||
1140 | flpi = &pr->power.lpi_states[flat_state_cnt]; | |
1141 | ||
1142 | if (!prev_level) { /* leaf/processor node */ | |
1143 | memcpy(flpi, t, sizeof(*t)); | |
1144 | stash_composite_state(curr_level, flpi); | |
1145 | flat_state_cnt++; | |
1146 | continue; | |
1147 | } | |
1148 | ||
1149 | for (i = 0; i < prev_level->composite_states_size; i++) { | |
1150 | p = prev_level->composite_states[i]; | |
1151 | if (t->index <= p->enable_parent_state && | |
1152 | combine_lpi_states(p, t, flpi)) { | |
1153 | stash_composite_state(curr_level, flpi); | |
1154 | flat_state_cnt++; | |
1155 | flpi++; | |
1156 | } | |
1157 | } | |
1158 | } | |
1159 | ||
1160 | kfree(curr_level->entries); | |
1161 | return 0; | |
1162 | } | |
1163 | ||
1164 | static int acpi_processor_get_lpi_info(struct acpi_processor *pr) | |
1165 | { | |
1166 | int ret, i; | |
1167 | acpi_status status; | |
1168 | acpi_handle handle = pr->handle, pr_ahandle; | |
1169 | struct acpi_device *d = NULL; | |
1170 | struct acpi_lpi_states_array info[2], *tmp, *prev, *curr; | |
1171 | ||
1172 | if (!osc_pc_lpi_support_confirmed) | |
1173 | return -EOPNOTSUPP; | |
1174 | ||
1175 | if (!acpi_has_method(handle, "_LPI")) | |
1176 | return -EINVAL; | |
1177 | ||
1178 | flat_state_cnt = 0; | |
1179 | prev = &info[0]; | |
1180 | curr = &info[1]; | |
1181 | handle = pr->handle; | |
1182 | ret = acpi_processor_evaluate_lpi(handle, prev); | |
1183 | if (ret) | |
1184 | return ret; | |
1185 | flatten_lpi_states(pr, prev, NULL); | |
1186 | ||
1187 | status = acpi_get_parent(handle, &pr_ahandle); | |
1188 | while (ACPI_SUCCESS(status)) { | |
1189 | acpi_bus_get_device(pr_ahandle, &d); | |
1190 | handle = pr_ahandle; | |
1191 | ||
1192 | if (strcmp(acpi_device_hid(d), ACPI_PROCESSOR_CONTAINER_HID)) | |
1193 | break; | |
1194 | ||
1195 | /* can be optional ? */ | |
1196 | if (!acpi_has_method(handle, "_LPI")) | |
1197 | break; | |
1198 | ||
1199 | ret = acpi_processor_evaluate_lpi(handle, curr); | |
1200 | if (ret) | |
1201 | break; | |
1202 | ||
1203 | /* flatten all the LPI states in this level of hierarchy */ | |
1204 | flatten_lpi_states(pr, curr, prev); | |
1205 | ||
1206 | tmp = prev, prev = curr, curr = tmp; | |
1207 | ||
1208 | status = acpi_get_parent(handle, &pr_ahandle); | |
1209 | } | |
1210 | ||
1211 | pr->power.count = flat_state_cnt; | |
1212 | /* reset the index after flattening */ | |
1213 | for (i = 0; i < pr->power.count; i++) | |
1214 | pr->power.lpi_states[i].index = i; | |
1215 | ||
1216 | /* Tell driver that _LPI is supported. */ | |
1217 | pr->flags.has_lpi = 1; | |
1218 | pr->flags.power = 1; | |
1219 | ||
1220 | return 0; | |
1221 | } | |
1222 | ||
1223 | int __weak acpi_processor_ffh_lpi_probe(unsigned int cpu) | |
1224 | { | |
1225 | return -ENODEV; | |
1226 | } | |
1227 | ||
1228 | int __weak acpi_processor_ffh_lpi_enter(struct acpi_lpi_state *lpi) | |
1229 | { | |
1230 | return -ENODEV; | |
1231 | } | |
1232 | ||
1233 | /** | |
1234 | * acpi_idle_lpi_enter - enters an ACPI any LPI state | |
1235 | * @dev: the target CPU | |
1236 | * @drv: cpuidle driver containing cpuidle state info | |
1237 | * @index: index of target state | |
1238 | * | |
1239 | * Return: 0 for success or negative value for error | |
1240 | */ | |
1241 | static int acpi_idle_lpi_enter(struct cpuidle_device *dev, | |
1242 | struct cpuidle_driver *drv, int index) | |
1243 | { | |
1244 | struct acpi_processor *pr; | |
1245 | struct acpi_lpi_state *lpi; | |
1246 | ||
1247 | pr = __this_cpu_read(processors); | |
1248 | ||
1249 | if (unlikely(!pr)) | |
1250 | return -EINVAL; | |
1251 | ||
1252 | lpi = &pr->power.lpi_states[index]; | |
1253 | if (lpi->entry_method == ACPI_CSTATE_FFH) | |
1254 | return acpi_processor_ffh_lpi_enter(lpi); | |
1255 | ||
1256 | return -EINVAL; | |
1257 | } | |
1258 | ||
1259 | static int acpi_processor_setup_lpi_states(struct acpi_processor *pr) | |
1260 | { | |
1261 | int i; | |
1262 | struct acpi_lpi_state *lpi; | |
1263 | struct cpuidle_state *state; | |
1264 | struct cpuidle_driver *drv = &acpi_idle_driver; | |
1265 | ||
1266 | if (!pr->flags.has_lpi) | |
1267 | return -EOPNOTSUPP; | |
1268 | ||
1269 | for (i = 0; i < pr->power.count && i < CPUIDLE_STATE_MAX; i++) { | |
1270 | lpi = &pr->power.lpi_states[i]; | |
1271 | ||
1272 | state = &drv->states[i]; | |
1273 | snprintf(state->name, CPUIDLE_NAME_LEN, "LPI-%d", i); | |
1274 | strlcpy(state->desc, lpi->desc, CPUIDLE_DESC_LEN); | |
1275 | state->exit_latency = lpi->wake_latency; | |
1276 | state->target_residency = lpi->min_residency; | |
1277 | if (lpi->arch_flags) | |
1278 | state->flags |= CPUIDLE_FLAG_TIMER_STOP; | |
1279 | state->enter = acpi_idle_lpi_enter; | |
1280 | drv->safe_state_index = i; | |
1281 | } | |
1282 | ||
1283 | drv->state_count = i; | |
1284 | ||
1285 | return 0; | |
1286 | } | |
1287 | ||
1288 | /** | |
1289 | * acpi_processor_setup_cpuidle_states- prepares and configures cpuidle | |
1290 | * global state data i.e. idle routines | |
1291 | * | |
1292 | * @pr: the ACPI processor | |
1293 | */ | |
1294 | static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr) | |
1295 | { | |
1296 | int i; | |
1297 | struct cpuidle_driver *drv = &acpi_idle_driver; | |
1298 | ||
1299 | if (!pr->flags.power_setup_done || !pr->flags.power) | |
1300 | return -EINVAL; | |
1301 | ||
1302 | drv->safe_state_index = -1; | |
dc2251bf | 1303 | for (i = ACPI_IDLE_STATE_START; i < CPUIDLE_STATE_MAX; i++) { |
a36a7fec SH |
1304 | drv->states[i].name[0] = '\0'; |
1305 | drv->states[i].desc[0] = '\0'; | |
1306 | } | |
1307 | ||
1308 | if (pr->flags.has_lpi) | |
1309 | return acpi_processor_setup_lpi_states(pr); | |
1310 | ||
1311 | return acpi_processor_setup_cstates(pr); | |
1312 | } | |
1313 | ||
1314 | /** | |
1315 | * acpi_processor_setup_cpuidle_dev - prepares and configures CPUIDLE | |
1316 | * device i.e. per-cpu data | |
1317 | * | |
1318 | * @pr: the ACPI processor | |
1319 | * @dev : the cpuidle device | |
1320 | */ | |
1321 | static int acpi_processor_setup_cpuidle_dev(struct acpi_processor *pr, | |
1322 | struct cpuidle_device *dev) | |
1323 | { | |
1324 | if (!pr->flags.power_setup_done || !pr->flags.power || !dev) | |
1325 | return -EINVAL; | |
1326 | ||
1327 | dev->cpu = pr->id; | |
1328 | if (pr->flags.has_lpi) | |
1329 | return acpi_processor_ffh_lpi_probe(pr->id); | |
1330 | ||
1331 | return acpi_processor_setup_cpuidle_cx(pr, dev); | |
1332 | } | |
1333 | ||
1334 | static int acpi_processor_get_power_info(struct acpi_processor *pr) | |
1335 | { | |
1336 | int ret; | |
1337 | ||
1338 | ret = acpi_processor_get_lpi_info(pr); | |
1339 | if (ret) | |
1340 | ret = acpi_processor_get_cstate_info(pr); | |
1341 | ||
1342 | return ret; | |
1343 | } | |
1344 | ||
46bcfad7 | 1345 | int acpi_processor_hotplug(struct acpi_processor *pr) |
4f86d3a8 | 1346 | { |
dcb84f33 | 1347 | int ret = 0; |
e8b1b59d | 1348 | struct cpuidle_device *dev; |
4f86d3a8 | 1349 | |
d1896049 | 1350 | if (disabled_by_idle_boot_param()) |
36a91358 VP |
1351 | return 0; |
1352 | ||
4f86d3a8 LB |
1353 | if (!pr->flags.power_setup_done) |
1354 | return -ENODEV; | |
1355 | ||
e8b1b59d | 1356 | dev = per_cpu(acpi_cpuidle_device, pr->id); |
4f86d3a8 | 1357 | cpuidle_pause_and_lock(); |
3d339dcb | 1358 | cpuidle_disable_device(dev); |
a36a7fec SH |
1359 | ret = acpi_processor_get_power_info(pr); |
1360 | if (!ret && pr->flags.power) { | |
1361 | acpi_processor_setup_cpuidle_dev(pr, dev); | |
3d339dcb | 1362 | ret = cpuidle_enable_device(dev); |
dcb84f33 | 1363 | } |
4f86d3a8 LB |
1364 | cpuidle_resume_and_unlock(); |
1365 | ||
1366 | return ret; | |
1367 | } | |
1368 | ||
a36a7fec | 1369 | int acpi_processor_power_state_has_changed(struct acpi_processor *pr) |
46bcfad7 DD |
1370 | { |
1371 | int cpu; | |
1372 | struct acpi_processor *_pr; | |
3d339dcb | 1373 | struct cpuidle_device *dev; |
46bcfad7 DD |
1374 | |
1375 | if (disabled_by_idle_boot_param()) | |
1376 | return 0; | |
1377 | ||
46bcfad7 DD |
1378 | if (!pr->flags.power_setup_done) |
1379 | return -ENODEV; | |
1380 | ||
1381 | /* | |
1382 | * FIXME: Design the ACPI notification to make it once per | |
1383 | * system instead of once per-cpu. This condition is a hack | |
1384 | * to make the code that updates C-States be called once. | |
1385 | */ | |
1386 | ||
9505626d | 1387 | if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) { |
46bcfad7 | 1388 | |
46bcfad7 DD |
1389 | /* Protect against cpu-hotplug */ |
1390 | get_online_cpus(); | |
6726655d | 1391 | cpuidle_pause_and_lock(); |
46bcfad7 DD |
1392 | |
1393 | /* Disable all cpuidle devices */ | |
1394 | for_each_online_cpu(cpu) { | |
1395 | _pr = per_cpu(processors, cpu); | |
1396 | if (!_pr || !_pr->flags.power_setup_done) | |
1397 | continue; | |
3d339dcb DL |
1398 | dev = per_cpu(acpi_cpuidle_device, cpu); |
1399 | cpuidle_disable_device(dev); | |
46bcfad7 DD |
1400 | } |
1401 | ||
1402 | /* Populate Updated C-state information */ | |
f427e5f1 | 1403 | acpi_processor_get_power_info(pr); |
46bcfad7 DD |
1404 | acpi_processor_setup_cpuidle_states(pr); |
1405 | ||
1406 | /* Enable all cpuidle devices */ | |
1407 | for_each_online_cpu(cpu) { | |
1408 | _pr = per_cpu(processors, cpu); | |
1409 | if (!_pr || !_pr->flags.power_setup_done) | |
1410 | continue; | |
1411 | acpi_processor_get_power_info(_pr); | |
1412 | if (_pr->flags.power) { | |
3d339dcb | 1413 | dev = per_cpu(acpi_cpuidle_device, cpu); |
a36a7fec | 1414 | acpi_processor_setup_cpuidle_dev(_pr, dev); |
3d339dcb | 1415 | cpuidle_enable_device(dev); |
46bcfad7 DD |
1416 | } |
1417 | } | |
46bcfad7 | 1418 | cpuidle_resume_and_unlock(); |
6726655d | 1419 | put_online_cpus(); |
46bcfad7 DD |
1420 | } |
1421 | ||
1422 | return 0; | |
1423 | } | |
1424 | ||
1425 | static int acpi_processor_registered; | |
1426 | ||
fe7bf106 | 1427 | int acpi_processor_power_init(struct acpi_processor *pr) |
1da177e4 | 1428 | { |
46bcfad7 | 1429 | int retval; |
3d339dcb | 1430 | struct cpuidle_device *dev; |
1da177e4 | 1431 | |
d1896049 | 1432 | if (disabled_by_idle_boot_param()) |
36a91358 | 1433 | return 0; |
1da177e4 | 1434 | |
35ae7133 | 1435 | acpi_processor_cstate_first_run_checks(); |
1da177e4 | 1436 | |
35ae7133 SH |
1437 | if (!acpi_processor_get_power_info(pr)) |
1438 | pr->flags.power_setup_done = 1; | |
1da177e4 LT |
1439 | |
1440 | /* | |
1441 | * Install the idle handler if processor power management is supported. | |
1442 | * Note that we use previously set idle handler will be used on | |
1443 | * platforms that only support C1. | |
1444 | */ | |
36a91358 | 1445 | if (pr->flags.power) { |
46bcfad7 DD |
1446 | /* Register acpi_idle_driver if not already registered */ |
1447 | if (!acpi_processor_registered) { | |
1448 | acpi_processor_setup_cpuidle_states(pr); | |
1449 | retval = cpuidle_register_driver(&acpi_idle_driver); | |
1450 | if (retval) | |
1451 | return retval; | |
b6ec26fb SH |
1452 | pr_debug("%s registered with cpuidle\n", |
1453 | acpi_idle_driver.name); | |
46bcfad7 | 1454 | } |
3d339dcb DL |
1455 | |
1456 | dev = kzalloc(sizeof(*dev), GFP_KERNEL); | |
1457 | if (!dev) | |
1458 | return -ENOMEM; | |
1459 | per_cpu(acpi_cpuidle_device, pr->id) = dev; | |
1460 | ||
a36a7fec | 1461 | acpi_processor_setup_cpuidle_dev(pr, dev); |
3d339dcb | 1462 | |
46bcfad7 DD |
1463 | /* Register per-cpu cpuidle_device. Cpuidle driver |
1464 | * must already be registered before registering device | |
1465 | */ | |
3d339dcb | 1466 | retval = cpuidle_register_device(dev); |
46bcfad7 DD |
1467 | if (retval) { |
1468 | if (acpi_processor_registered == 0) | |
1469 | cpuidle_unregister_driver(&acpi_idle_driver); | |
1470 | return retval; | |
1471 | } | |
1472 | acpi_processor_registered++; | |
1da177e4 | 1473 | } |
d550d98d | 1474 | return 0; |
1da177e4 LT |
1475 | } |
1476 | ||
38a991b6 | 1477 | int acpi_processor_power_exit(struct acpi_processor *pr) |
1da177e4 | 1478 | { |
3d339dcb DL |
1479 | struct cpuidle_device *dev = per_cpu(acpi_cpuidle_device, pr->id); |
1480 | ||
d1896049 | 1481 | if (disabled_by_idle_boot_param()) |
36a91358 VP |
1482 | return 0; |
1483 | ||
46bcfad7 | 1484 | if (pr->flags.power) { |
3d339dcb | 1485 | cpuidle_unregister_device(dev); |
46bcfad7 DD |
1486 | acpi_processor_registered--; |
1487 | if (acpi_processor_registered == 0) | |
1488 | cpuidle_unregister_driver(&acpi_idle_driver); | |
1489 | } | |
1da177e4 | 1490 | |
46bcfad7 | 1491 | pr->flags.power_setup_done = 0; |
d550d98d | 1492 | return 0; |
1da177e4 | 1493 | } |