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1da177e4 LT |
1 | /* |
2 | * processor_idle - idle state submodule to the ACPI processor driver | |
3 | * | |
4 | * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> | |
5 | * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> | |
c5ab81ca | 6 | * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de> |
1da177e4 LT |
7 | * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> |
8 | * - Added processor hotplug support | |
02df8b93 VP |
9 | * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> |
10 | * - Added support for C3 on SMP | |
1da177e4 LT |
11 | * |
12 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
13 | * | |
14 | * This program is free software; you can redistribute it and/or modify | |
15 | * it under the terms of the GNU General Public License as published by | |
16 | * the Free Software Foundation; either version 2 of the License, or (at | |
17 | * your option) any later version. | |
18 | * | |
19 | * This program is distributed in the hope that it will be useful, but | |
20 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
22 | * General Public License for more details. | |
23 | * | |
24 | * You should have received a copy of the GNU General Public License along | |
25 | * with this program; if not, write to the Free Software Foundation, Inc., | |
26 | * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. | |
27 | * | |
28 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
29 | */ | |
30 | ||
31 | #include <linux/kernel.h> | |
32 | #include <linux/module.h> | |
33 | #include <linux/init.h> | |
34 | #include <linux/cpufreq.h> | |
35 | #include <linux/proc_fs.h> | |
36 | #include <linux/seq_file.h> | |
37 | #include <linux/acpi.h> | |
38 | #include <linux/dmi.h> | |
39 | #include <linux/moduleparam.h> | |
4e57b681 | 40 | #include <linux/sched.h> /* need_resched() */ |
5c87579e | 41 | #include <linux/latency.h> |
1da177e4 | 42 | |
3434933b TG |
43 | /* |
44 | * Include the apic definitions for x86 to have the APIC timer related defines | |
45 | * available also for UP (on SMP it gets magically included via linux/smp.h). | |
46 | * asm/acpi.h is not an option, as it would require more include magic. Also | |
47 | * creating an empty asm-ia64/apic.h would just trade pest vs. cholera. | |
48 | */ | |
49 | #ifdef CONFIG_X86 | |
50 | #include <asm/apic.h> | |
51 | #endif | |
52 | ||
1da177e4 LT |
53 | #include <asm/io.h> |
54 | #include <asm/uaccess.h> | |
55 | ||
56 | #include <acpi/acpi_bus.h> | |
57 | #include <acpi/processor.h> | |
58 | ||
59 | #define ACPI_PROCESSOR_COMPONENT 0x01000000 | |
60 | #define ACPI_PROCESSOR_CLASS "processor" | |
61 | #define ACPI_PROCESSOR_DRIVER_NAME "ACPI Processor Driver" | |
62 | #define _COMPONENT ACPI_PROCESSOR_COMPONENT | |
4be44fcd | 63 | ACPI_MODULE_NAME("acpi_processor") |
1da177e4 | 64 | #define ACPI_PROCESSOR_FILE_POWER "power" |
1da177e4 LT |
65 | #define US_TO_PM_TIMER_TICKS(t) ((t * (PM_TIMER_FREQUENCY/1000)) / 1000) |
66 | #define C2_OVERHEAD 4 /* 1us (3.579 ticks per us) */ | |
67 | #define C3_OVERHEAD 4 /* 1us (3.579 ticks per us) */ | |
b6835052 | 68 | static void (*pm_idle_save) (void) __read_mostly; |
1da177e4 LT |
69 | module_param(max_cstate, uint, 0644); |
70 | ||
b6835052 | 71 | static unsigned int nocst __read_mostly; |
1da177e4 LT |
72 | module_param(nocst, uint, 0000); |
73 | ||
74 | /* | |
75 | * bm_history -- bit-mask with a bit per jiffy of bus-master activity | |
76 | * 1000 HZ: 0xFFFFFFFF: 32 jiffies = 32ms | |
77 | * 800 HZ: 0xFFFFFFFF: 32 jiffies = 40ms | |
78 | * 100 HZ: 0x0000000F: 4 jiffies = 40ms | |
79 | * reduce history for more aggressive entry into C3 | |
80 | */ | |
b6835052 | 81 | static unsigned int bm_history __read_mostly = |
4be44fcd | 82 | (HZ >= 800 ? 0xFFFFFFFF : ((1U << (HZ / 25)) - 1)); |
1da177e4 LT |
83 | module_param(bm_history, uint, 0644); |
84 | /* -------------------------------------------------------------------------- | |
85 | Power Management | |
86 | -------------------------------------------------------------------------- */ | |
87 | ||
88 | /* | |
89 | * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3. | |
90 | * For now disable this. Probably a bug somewhere else. | |
91 | * | |
92 | * To skip this limit, boot/load with a large max_cstate limit. | |
93 | */ | |
335f16be | 94 | static int set_max_cstate(struct dmi_system_id *id) |
1da177e4 LT |
95 | { |
96 | if (max_cstate > ACPI_PROCESSOR_MAX_POWER) | |
97 | return 0; | |
98 | ||
3d35600a | 99 | printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate." |
4be44fcd LB |
100 | " Override with \"processor.max_cstate=%d\"\n", id->ident, |
101 | (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1); | |
1da177e4 | 102 | |
3d35600a | 103 | max_cstate = (long)id->driver_data; |
1da177e4 LT |
104 | |
105 | return 0; | |
106 | } | |
107 | ||
7ded5689 AR |
108 | /* Actually this shouldn't be __cpuinitdata, would be better to fix the |
109 | callers to only run once -AK */ | |
110 | static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = { | |
f831335d BS |
111 | { set_max_cstate, "IBM ThinkPad R40e", { |
112 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
113 | DMI_MATCH(DMI_BIOS_VERSION,"1SET70WW")}, (void *)1}, | |
876c184b TR |
114 | { set_max_cstate, "IBM ThinkPad R40e", { |
115 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
116 | DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW")}, (void *)1}, | |
117 | { set_max_cstate, "IBM ThinkPad R40e", { | |
118 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
119 | DMI_MATCH(DMI_BIOS_VERSION,"1SET43WW") }, (void*)1}, | |
120 | { set_max_cstate, "IBM ThinkPad R40e", { | |
121 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
122 | DMI_MATCH(DMI_BIOS_VERSION,"1SET45WW") }, (void*)1}, | |
123 | { set_max_cstate, "IBM ThinkPad R40e", { | |
124 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
125 | DMI_MATCH(DMI_BIOS_VERSION,"1SET47WW") }, (void*)1}, | |
126 | { set_max_cstate, "IBM ThinkPad R40e", { | |
127 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
128 | DMI_MATCH(DMI_BIOS_VERSION,"1SET50WW") }, (void*)1}, | |
129 | { set_max_cstate, "IBM ThinkPad R40e", { | |
130 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
131 | DMI_MATCH(DMI_BIOS_VERSION,"1SET52WW") }, (void*)1}, | |
132 | { set_max_cstate, "IBM ThinkPad R40e", { | |
133 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
134 | DMI_MATCH(DMI_BIOS_VERSION,"1SET55WW") }, (void*)1}, | |
135 | { set_max_cstate, "IBM ThinkPad R40e", { | |
136 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
137 | DMI_MATCH(DMI_BIOS_VERSION,"1SET56WW") }, (void*)1}, | |
138 | { set_max_cstate, "IBM ThinkPad R40e", { | |
139 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
140 | DMI_MATCH(DMI_BIOS_VERSION,"1SET59WW") }, (void*)1}, | |
141 | { set_max_cstate, "IBM ThinkPad R40e", { | |
142 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
143 | DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW") }, (void*)1}, | |
144 | { set_max_cstate, "IBM ThinkPad R40e", { | |
145 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
146 | DMI_MATCH(DMI_BIOS_VERSION,"1SET61WW") }, (void*)1}, | |
147 | { set_max_cstate, "IBM ThinkPad R40e", { | |
148 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
149 | DMI_MATCH(DMI_BIOS_VERSION,"1SET62WW") }, (void*)1}, | |
150 | { set_max_cstate, "IBM ThinkPad R40e", { | |
151 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
152 | DMI_MATCH(DMI_BIOS_VERSION,"1SET64WW") }, (void*)1}, | |
153 | { set_max_cstate, "IBM ThinkPad R40e", { | |
154 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
155 | DMI_MATCH(DMI_BIOS_VERSION,"1SET65WW") }, (void*)1}, | |
156 | { set_max_cstate, "IBM ThinkPad R40e", { | |
157 | DMI_MATCH(DMI_BIOS_VENDOR,"IBM"), | |
158 | DMI_MATCH(DMI_BIOS_VERSION,"1SET68WW") }, (void*)1}, | |
159 | { set_max_cstate, "Medion 41700", { | |
160 | DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"), | |
161 | DMI_MATCH(DMI_BIOS_VERSION,"R01-A1J")}, (void *)1}, | |
162 | { set_max_cstate, "Clevo 5600D", { | |
163 | DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"), | |
164 | DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")}, | |
4be44fcd | 165 | (void *)2}, |
1da177e4 LT |
166 | {}, |
167 | }; | |
168 | ||
4be44fcd | 169 | static inline u32 ticks_elapsed(u32 t1, u32 t2) |
1da177e4 LT |
170 | { |
171 | if (t2 >= t1) | |
172 | return (t2 - t1); | |
cee324b1 | 173 | else if (!(acpi_gbl_FADT.flags & ACPI_FADT_32BIT_TIMER)) |
1da177e4 LT |
174 | return (((0x00FFFFFF - t1) + t2) & 0x00FFFFFF); |
175 | else | |
176 | return ((0xFFFFFFFF - t1) + t2); | |
177 | } | |
178 | ||
1da177e4 | 179 | static void |
4be44fcd LB |
180 | acpi_processor_power_activate(struct acpi_processor *pr, |
181 | struct acpi_processor_cx *new) | |
1da177e4 | 182 | { |
4be44fcd | 183 | struct acpi_processor_cx *old; |
1da177e4 LT |
184 | |
185 | if (!pr || !new) | |
186 | return; | |
187 | ||
188 | old = pr->power.state; | |
189 | ||
190 | if (old) | |
191 | old->promotion.count = 0; | |
4be44fcd | 192 | new->demotion.count = 0; |
1da177e4 LT |
193 | |
194 | /* Cleanup from old state. */ | |
195 | if (old) { | |
196 | switch (old->type) { | |
197 | case ACPI_STATE_C3: | |
198 | /* Disable bus master reload */ | |
02df8b93 | 199 | if (new->type != ACPI_STATE_C3 && pr->flags.bm_check) |
d8c71b6d | 200 | acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0); |
1da177e4 LT |
201 | break; |
202 | } | |
203 | } | |
204 | ||
205 | /* Prepare to use new state. */ | |
206 | switch (new->type) { | |
207 | case ACPI_STATE_C3: | |
208 | /* Enable bus master reload */ | |
02df8b93 | 209 | if (old->type != ACPI_STATE_C3 && pr->flags.bm_check) |
d8c71b6d | 210 | acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 1); |
1da177e4 LT |
211 | break; |
212 | } | |
213 | ||
214 | pr->power.state = new; | |
215 | ||
216 | return; | |
217 | } | |
218 | ||
64c7c8f8 NP |
219 | static void acpi_safe_halt(void) |
220 | { | |
495ab9c0 | 221 | current_thread_info()->status &= ~TS_POLLING; |
0888f06a IM |
222 | /* |
223 | * TS_POLLING-cleared state must be visible before we | |
224 | * test NEED_RESCHED: | |
225 | */ | |
226 | smp_mb(); | |
64c7c8f8 NP |
227 | if (!need_resched()) |
228 | safe_halt(); | |
495ab9c0 | 229 | current_thread_info()->status |= TS_POLLING; |
64c7c8f8 NP |
230 | } |
231 | ||
4be44fcd | 232 | static atomic_t c3_cpu_count; |
1da177e4 | 233 | |
991528d7 VP |
234 | /* Common C-state entry for C2, C3, .. */ |
235 | static void acpi_cstate_enter(struct acpi_processor_cx *cstate) | |
236 | { | |
237 | if (cstate->space_id == ACPI_CSTATE_FFH) { | |
238 | /* Call into architectural FFH based C-state */ | |
239 | acpi_processor_ffh_cstate_enter(cstate); | |
240 | } else { | |
241 | int unused; | |
242 | /* IO port based C-state */ | |
243 | inb(cstate->address); | |
244 | /* Dummy wait op - must do something useless after P_LVL2 read | |
245 | because chipsets cannot guarantee that STPCLK# signal | |
246 | gets asserted in time to freeze execution properly. */ | |
cee324b1 | 247 | unused = inl(acpi_gbl_FADT.xpm_timer_block.address); |
991528d7 VP |
248 | } |
249 | } | |
250 | ||
169a0abb TG |
251 | #ifdef ARCH_APICTIMER_STOPS_ON_C3 |
252 | ||
253 | /* | |
254 | * Some BIOS implementations switch to C3 in the published C2 state. | |
255 | * This seems to be a common problem on AMD boxen, but other vendors | |
256 | * are affected too. We pick the most conservative approach: we assume | |
257 | * that the local APIC stops in both C2 and C3. | |
258 | */ | |
259 | static void acpi_timer_check_state(int state, struct acpi_processor *pr, | |
260 | struct acpi_processor_cx *cx) | |
261 | { | |
262 | struct acpi_processor_power *pwr = &pr->power; | |
263 | ||
264 | /* | |
265 | * Check, if one of the previous states already marked the lapic | |
266 | * unstable | |
267 | */ | |
268 | if (pwr->timer_broadcast_on_state < state) | |
269 | return; | |
270 | ||
271 | if (cx->type >= ACPI_STATE_C2) | |
272 | pr->power.timer_broadcast_on_state = state; | |
273 | } | |
274 | ||
275 | static void acpi_propagate_timer_broadcast(struct acpi_processor *pr) | |
276 | { | |
277 | cpumask_t mask = cpumask_of_cpu(pr->id); | |
278 | ||
279 | if (pr->power.timer_broadcast_on_state < INT_MAX) | |
280 | on_each_cpu(switch_APIC_timer_to_ipi, &mask, 1, 1); | |
281 | else | |
282 | on_each_cpu(switch_ipi_to_APIC_timer, &mask, 1, 1); | |
283 | } | |
284 | ||
285 | #else | |
286 | ||
287 | static void acpi_timer_check_state(int state, struct acpi_processor *pr, | |
288 | struct acpi_processor_cx *cstate) { } | |
289 | static void acpi_propagate_timer_broadcast(struct acpi_processor *pr) { } | |
290 | ||
291 | #endif | |
292 | ||
4be44fcd | 293 | static void acpi_processor_idle(void) |
1da177e4 | 294 | { |
4be44fcd | 295 | struct acpi_processor *pr = NULL; |
1da177e4 LT |
296 | struct acpi_processor_cx *cx = NULL; |
297 | struct acpi_processor_cx *next_state = NULL; | |
4be44fcd LB |
298 | int sleep_ticks = 0; |
299 | u32 t1, t2 = 0; | |
1da177e4 | 300 | |
64c7c8f8 | 301 | pr = processors[smp_processor_id()]; |
1da177e4 LT |
302 | if (!pr) |
303 | return; | |
304 | ||
305 | /* | |
306 | * Interrupts must be disabled during bus mastering calculations and | |
307 | * for C2/C3 transitions. | |
308 | */ | |
309 | local_irq_disable(); | |
310 | ||
311 | /* | |
312 | * Check whether we truly need to go idle, or should | |
313 | * reschedule: | |
314 | */ | |
315 | if (unlikely(need_resched())) { | |
316 | local_irq_enable(); | |
317 | return; | |
318 | } | |
319 | ||
320 | cx = pr->power.state; | |
64c7c8f8 NP |
321 | if (!cx) { |
322 | if (pm_idle_save) | |
323 | pm_idle_save(); | |
324 | else | |
325 | acpi_safe_halt(); | |
326 | return; | |
327 | } | |
1da177e4 LT |
328 | |
329 | /* | |
330 | * Check BM Activity | |
331 | * ----------------- | |
332 | * Check for bus mastering activity (if required), record, and check | |
333 | * for demotion. | |
334 | */ | |
335 | if (pr->flags.bm_check) { | |
4be44fcd LB |
336 | u32 bm_status = 0; |
337 | unsigned long diff = jiffies - pr->power.bm_check_timestamp; | |
1da177e4 | 338 | |
c5ab81ca DB |
339 | if (diff > 31) |
340 | diff = 31; | |
1da177e4 | 341 | |
c5ab81ca | 342 | pr->power.bm_activity <<= diff; |
1da177e4 | 343 | |
d8c71b6d | 344 | acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status); |
1da177e4 | 345 | if (bm_status) { |
c5ab81ca | 346 | pr->power.bm_activity |= 0x1; |
d8c71b6d | 347 | acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS, 1); |
1da177e4 LT |
348 | } |
349 | /* | |
350 | * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect | |
351 | * the true state of bus mastering activity; forcing us to | |
352 | * manually check the BMIDEA bit of each IDE channel. | |
353 | */ | |
354 | else if (errata.piix4.bmisx) { | |
355 | if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01) | |
4be44fcd | 356 | || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01)) |
c5ab81ca | 357 | pr->power.bm_activity |= 0x1; |
1da177e4 LT |
358 | } |
359 | ||
360 | pr->power.bm_check_timestamp = jiffies; | |
361 | ||
362 | /* | |
c4a001b1 | 363 | * If bus mastering is or was active this jiffy, demote |
1da177e4 LT |
364 | * to avoid a faulty transition. Note that the processor |
365 | * won't enter a low-power state during this call (to this | |
c4a001b1 | 366 | * function) but should upon the next. |
1da177e4 LT |
367 | * |
368 | * TBD: A better policy might be to fallback to the demotion | |
369 | * state (use it for this quantum only) istead of | |
370 | * demoting -- and rely on duration as our sole demotion | |
371 | * qualification. This may, however, introduce DMA | |
372 | * issues (e.g. floppy DMA transfer overrun/underrun). | |
373 | */ | |
c4a001b1 DB |
374 | if ((pr->power.bm_activity & 0x1) && |
375 | cx->demotion.threshold.bm) { | |
1da177e4 LT |
376 | local_irq_enable(); |
377 | next_state = cx->demotion.state; | |
378 | goto end; | |
379 | } | |
380 | } | |
381 | ||
4c033552 VP |
382 | #ifdef CONFIG_HOTPLUG_CPU |
383 | /* | |
384 | * Check for P_LVL2_UP flag before entering C2 and above on | |
385 | * an SMP system. We do it here instead of doing it at _CST/P_LVL | |
386 | * detection phase, to work cleanly with logical CPU hotplug. | |
387 | */ | |
388 | if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) && | |
cee324b1 | 389 | !pr->flags.has_cst && !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) |
1e483969 | 390 | cx = &pr->power.states[ACPI_STATE_C1]; |
4c033552 | 391 | #endif |
1e483969 | 392 | |
1da177e4 LT |
393 | /* |
394 | * Sleep: | |
395 | * ------ | |
396 | * Invoke the current Cx state to put the processor to sleep. | |
397 | */ | |
2a298a35 | 398 | if (cx->type == ACPI_STATE_C2 || cx->type == ACPI_STATE_C3) { |
495ab9c0 | 399 | current_thread_info()->status &= ~TS_POLLING; |
0888f06a IM |
400 | /* |
401 | * TS_POLLING-cleared state must be visible before we | |
402 | * test NEED_RESCHED: | |
403 | */ | |
404 | smp_mb(); | |
2a298a35 | 405 | if (need_resched()) { |
495ab9c0 | 406 | current_thread_info()->status |= TS_POLLING; |
af2eb17b | 407 | local_irq_enable(); |
2a298a35 NP |
408 | return; |
409 | } | |
410 | } | |
411 | ||
1da177e4 LT |
412 | switch (cx->type) { |
413 | ||
414 | case ACPI_STATE_C1: | |
415 | /* | |
416 | * Invoke C1. | |
417 | * Use the appropriate idle routine, the one that would | |
418 | * be used without acpi C-states. | |
419 | */ | |
420 | if (pm_idle_save) | |
421 | pm_idle_save(); | |
422 | else | |
64c7c8f8 NP |
423 | acpi_safe_halt(); |
424 | ||
1da177e4 | 425 | /* |
4be44fcd | 426 | * TBD: Can't get time duration while in C1, as resumes |
1da177e4 LT |
427 | * go to an ISR rather than here. Need to instrument |
428 | * base interrupt handler. | |
429 | */ | |
430 | sleep_ticks = 0xFFFFFFFF; | |
431 | break; | |
432 | ||
433 | case ACPI_STATE_C2: | |
434 | /* Get start time (ticks) */ | |
cee324b1 | 435 | t1 = inl(acpi_gbl_FADT.xpm_timer_block.address); |
1da177e4 | 436 | /* Invoke C2 */ |
991528d7 | 437 | acpi_cstate_enter(cx); |
1da177e4 | 438 | /* Get end time (ticks) */ |
cee324b1 | 439 | t2 = inl(acpi_gbl_FADT.xpm_timer_block.address); |
539eb11e JS |
440 | |
441 | #ifdef CONFIG_GENERIC_TIME | |
442 | /* TSC halts in C2, so notify users */ | |
443 | mark_tsc_unstable(); | |
444 | #endif | |
1da177e4 LT |
445 | /* Re-enable interrupts */ |
446 | local_irq_enable(); | |
495ab9c0 | 447 | current_thread_info()->status |= TS_POLLING; |
1da177e4 | 448 | /* Compute time (ticks) that we were actually asleep */ |
4be44fcd LB |
449 | sleep_ticks = |
450 | ticks_elapsed(t1, t2) - cx->latency_ticks - C2_OVERHEAD; | |
1da177e4 LT |
451 | break; |
452 | ||
453 | case ACPI_STATE_C3: | |
4be44fcd | 454 | |
02df8b93 VP |
455 | if (pr->flags.bm_check) { |
456 | if (atomic_inc_return(&c3_cpu_count) == | |
4be44fcd | 457 | num_online_cpus()) { |
02df8b93 VP |
458 | /* |
459 | * All CPUs are trying to go to C3 | |
460 | * Disable bus master arbitration | |
461 | */ | |
d8c71b6d | 462 | acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1); |
02df8b93 VP |
463 | } |
464 | } else { | |
465 | /* SMP with no shared cache... Invalidate cache */ | |
466 | ACPI_FLUSH_CPU_CACHE(); | |
467 | } | |
4be44fcd | 468 | |
1da177e4 | 469 | /* Get start time (ticks) */ |
cee324b1 | 470 | t1 = inl(acpi_gbl_FADT.xpm_timer_block.address); |
1da177e4 | 471 | /* Invoke C3 */ |
991528d7 | 472 | acpi_cstate_enter(cx); |
1da177e4 | 473 | /* Get end time (ticks) */ |
cee324b1 | 474 | t2 = inl(acpi_gbl_FADT.xpm_timer_block.address); |
02df8b93 VP |
475 | if (pr->flags.bm_check) { |
476 | /* Enable bus master arbitration */ | |
477 | atomic_dec(&c3_cpu_count); | |
d8c71b6d | 478 | acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0); |
02df8b93 VP |
479 | } |
480 | ||
539eb11e JS |
481 | #ifdef CONFIG_GENERIC_TIME |
482 | /* TSC halts in C3, so notify users */ | |
483 | mark_tsc_unstable(); | |
484 | #endif | |
1da177e4 LT |
485 | /* Re-enable interrupts */ |
486 | local_irq_enable(); | |
495ab9c0 | 487 | current_thread_info()->status |= TS_POLLING; |
1da177e4 | 488 | /* Compute time (ticks) that we were actually asleep */ |
4be44fcd LB |
489 | sleep_ticks = |
490 | ticks_elapsed(t1, t2) - cx->latency_ticks - C3_OVERHEAD; | |
1da177e4 LT |
491 | break; |
492 | ||
493 | default: | |
494 | local_irq_enable(); | |
495 | return; | |
496 | } | |
a3c6598f DB |
497 | cx->usage++; |
498 | if ((cx->type != ACPI_STATE_C1) && (sleep_ticks > 0)) | |
499 | cx->time += sleep_ticks; | |
1da177e4 LT |
500 | |
501 | next_state = pr->power.state; | |
502 | ||
1e483969 DSL |
503 | #ifdef CONFIG_HOTPLUG_CPU |
504 | /* Don't do promotion/demotion */ | |
505 | if ((cx->type == ACPI_STATE_C1) && (num_online_cpus() > 1) && | |
cee324b1 | 506 | !pr->flags.has_cst && !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) { |
1e483969 DSL |
507 | next_state = cx; |
508 | goto end; | |
509 | } | |
510 | #endif | |
511 | ||
1da177e4 LT |
512 | /* |
513 | * Promotion? | |
514 | * ---------- | |
515 | * Track the number of longs (time asleep is greater than threshold) | |
516 | * and promote when the count threshold is reached. Note that bus | |
517 | * mastering activity may prevent promotions. | |
518 | * Do not promote above max_cstate. | |
519 | */ | |
520 | if (cx->promotion.state && | |
521 | ((cx->promotion.state - pr->power.states) <= max_cstate)) { | |
5c87579e AV |
522 | if (sleep_ticks > cx->promotion.threshold.ticks && |
523 | cx->promotion.state->latency <= system_latency_constraint()) { | |
1da177e4 | 524 | cx->promotion.count++; |
4be44fcd LB |
525 | cx->demotion.count = 0; |
526 | if (cx->promotion.count >= | |
527 | cx->promotion.threshold.count) { | |
1da177e4 | 528 | if (pr->flags.bm_check) { |
4be44fcd LB |
529 | if (! |
530 | (pr->power.bm_activity & cx-> | |
531 | promotion.threshold.bm)) { | |
532 | next_state = | |
533 | cx->promotion.state; | |
1da177e4 LT |
534 | goto end; |
535 | } | |
4be44fcd | 536 | } else { |
1da177e4 LT |
537 | next_state = cx->promotion.state; |
538 | goto end; | |
539 | } | |
540 | } | |
541 | } | |
542 | } | |
543 | ||
544 | /* | |
545 | * Demotion? | |
546 | * --------- | |
547 | * Track the number of shorts (time asleep is less than time threshold) | |
548 | * and demote when the usage threshold is reached. | |
549 | */ | |
550 | if (cx->demotion.state) { | |
551 | if (sleep_ticks < cx->demotion.threshold.ticks) { | |
552 | cx->demotion.count++; | |
553 | cx->promotion.count = 0; | |
554 | if (cx->demotion.count >= cx->demotion.threshold.count) { | |
555 | next_state = cx->demotion.state; | |
556 | goto end; | |
557 | } | |
558 | } | |
559 | } | |
560 | ||
4be44fcd | 561 | end: |
1da177e4 LT |
562 | /* |
563 | * Demote if current state exceeds max_cstate | |
5c87579e | 564 | * or if the latency of the current state is unacceptable |
1da177e4 | 565 | */ |
5c87579e AV |
566 | if ((pr->power.state - pr->power.states) > max_cstate || |
567 | pr->power.state->latency > system_latency_constraint()) { | |
1da177e4 LT |
568 | if (cx->demotion.state) |
569 | next_state = cx->demotion.state; | |
570 | } | |
571 | ||
572 | /* | |
573 | * New Cx State? | |
574 | * ------------- | |
575 | * If we're going to start using a new Cx state we must clean up | |
576 | * from the previous and prepare to use the new. | |
577 | */ | |
578 | if (next_state != pr->power.state) | |
579 | acpi_processor_power_activate(pr, next_state); | |
1da177e4 LT |
580 | } |
581 | ||
4be44fcd | 582 | static int acpi_processor_set_power_policy(struct acpi_processor *pr) |
1da177e4 LT |
583 | { |
584 | unsigned int i; | |
585 | unsigned int state_is_set = 0; | |
586 | struct acpi_processor_cx *lower = NULL; | |
587 | struct acpi_processor_cx *higher = NULL; | |
588 | struct acpi_processor_cx *cx; | |
589 | ||
1da177e4 LT |
590 | |
591 | if (!pr) | |
d550d98d | 592 | return -EINVAL; |
1da177e4 LT |
593 | |
594 | /* | |
595 | * This function sets the default Cx state policy (OS idle handler). | |
596 | * Our scheme is to promote quickly to C2 but more conservatively | |
597 | * to C3. We're favoring C2 for its characteristics of low latency | |
598 | * (quick response), good power savings, and ability to allow bus | |
599 | * mastering activity. Note that the Cx state policy is completely | |
600 | * customizable and can be altered dynamically. | |
601 | */ | |
602 | ||
603 | /* startup state */ | |
4be44fcd | 604 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { |
1da177e4 LT |
605 | cx = &pr->power.states[i]; |
606 | if (!cx->valid) | |
607 | continue; | |
608 | ||
609 | if (!state_is_set) | |
610 | pr->power.state = cx; | |
611 | state_is_set++; | |
612 | break; | |
4be44fcd | 613 | } |
1da177e4 LT |
614 | |
615 | if (!state_is_set) | |
d550d98d | 616 | return -ENODEV; |
1da177e4 LT |
617 | |
618 | /* demotion */ | |
4be44fcd | 619 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { |
1da177e4 LT |
620 | cx = &pr->power.states[i]; |
621 | if (!cx->valid) | |
622 | continue; | |
623 | ||
624 | if (lower) { | |
625 | cx->demotion.state = lower; | |
626 | cx->demotion.threshold.ticks = cx->latency_ticks; | |
627 | cx->demotion.threshold.count = 1; | |
628 | if (cx->type == ACPI_STATE_C3) | |
629 | cx->demotion.threshold.bm = bm_history; | |
630 | } | |
631 | ||
632 | lower = cx; | |
633 | } | |
634 | ||
635 | /* promotion */ | |
636 | for (i = (ACPI_PROCESSOR_MAX_POWER - 1); i > 0; i--) { | |
637 | cx = &pr->power.states[i]; | |
638 | if (!cx->valid) | |
639 | continue; | |
640 | ||
641 | if (higher) { | |
4be44fcd | 642 | cx->promotion.state = higher; |
1da177e4 LT |
643 | cx->promotion.threshold.ticks = cx->latency_ticks; |
644 | if (cx->type >= ACPI_STATE_C2) | |
645 | cx->promotion.threshold.count = 4; | |
646 | else | |
647 | cx->promotion.threshold.count = 10; | |
648 | if (higher->type == ACPI_STATE_C3) | |
649 | cx->promotion.threshold.bm = bm_history; | |
650 | } | |
651 | ||
652 | higher = cx; | |
653 | } | |
654 | ||
d550d98d | 655 | return 0; |
1da177e4 LT |
656 | } |
657 | ||
4be44fcd | 658 | static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr) |
1da177e4 | 659 | { |
1da177e4 LT |
660 | |
661 | if (!pr) | |
d550d98d | 662 | return -EINVAL; |
1da177e4 LT |
663 | |
664 | if (!pr->pblk) | |
d550d98d | 665 | return -ENODEV; |
1da177e4 | 666 | |
1da177e4 | 667 | /* if info is obtained from pblk/fadt, type equals state */ |
1da177e4 LT |
668 | pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2; |
669 | pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3; | |
670 | ||
4c033552 VP |
671 | #ifndef CONFIG_HOTPLUG_CPU |
672 | /* | |
673 | * Check for P_LVL2_UP flag before entering C2 and above on | |
674 | * an SMP system. | |
675 | */ | |
ad71860a | 676 | if ((num_online_cpus() > 1) && |
cee324b1 | 677 | !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) |
d550d98d | 678 | return -ENODEV; |
4c033552 VP |
679 | #endif |
680 | ||
1da177e4 LT |
681 | /* determine C2 and C3 address from pblk */ |
682 | pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4; | |
683 | pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5; | |
684 | ||
685 | /* determine latencies from FADT */ | |
cee324b1 AS |
686 | pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency; |
687 | pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency; | |
1da177e4 LT |
688 | |
689 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
690 | "lvl2[0x%08x] lvl3[0x%08x]\n", | |
691 | pr->power.states[ACPI_STATE_C2].address, | |
692 | pr->power.states[ACPI_STATE_C3].address)); | |
693 | ||
d550d98d | 694 | return 0; |
1da177e4 LT |
695 | } |
696 | ||
991528d7 | 697 | static int acpi_processor_get_power_info_default(struct acpi_processor *pr) |
acf05f4b | 698 | { |
991528d7 VP |
699 | if (!pr->power.states[ACPI_STATE_C1].valid) { |
700 | /* set the first C-State to C1 */ | |
701 | /* all processors need to support C1 */ | |
702 | pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1; | |
703 | pr->power.states[ACPI_STATE_C1].valid = 1; | |
704 | } | |
705 | /* the C0 state only exists as a filler in our array */ | |
acf05f4b | 706 | pr->power.states[ACPI_STATE_C0].valid = 1; |
d550d98d | 707 | return 0; |
acf05f4b VP |
708 | } |
709 | ||
4be44fcd | 710 | static int acpi_processor_get_power_info_cst(struct acpi_processor *pr) |
1da177e4 | 711 | { |
4be44fcd LB |
712 | acpi_status status = 0; |
713 | acpi_integer count; | |
cf824788 | 714 | int current_count; |
4be44fcd LB |
715 | int i; |
716 | struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; | |
717 | union acpi_object *cst; | |
1da177e4 | 718 | |
1da177e4 | 719 | |
1da177e4 | 720 | if (nocst) |
d550d98d | 721 | return -ENODEV; |
1da177e4 | 722 | |
991528d7 | 723 | current_count = 0; |
1da177e4 LT |
724 | |
725 | status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer); | |
726 | if (ACPI_FAILURE(status)) { | |
727 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n")); | |
d550d98d | 728 | return -ENODEV; |
4be44fcd | 729 | } |
1da177e4 | 730 | |
50dd0969 | 731 | cst = buffer.pointer; |
1da177e4 LT |
732 | |
733 | /* There must be at least 2 elements */ | |
734 | if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) { | |
6468463a | 735 | printk(KERN_ERR PREFIX "not enough elements in _CST\n"); |
1da177e4 LT |
736 | status = -EFAULT; |
737 | goto end; | |
738 | } | |
739 | ||
740 | count = cst->package.elements[0].integer.value; | |
741 | ||
742 | /* Validate number of power states. */ | |
743 | if (count < 1 || count != cst->package.count - 1) { | |
6468463a | 744 | printk(KERN_ERR PREFIX "count given by _CST is not valid\n"); |
1da177e4 LT |
745 | status = -EFAULT; |
746 | goto end; | |
747 | } | |
748 | ||
1da177e4 LT |
749 | /* Tell driver that at least _CST is supported. */ |
750 | pr->flags.has_cst = 1; | |
751 | ||
752 | for (i = 1; i <= count; i++) { | |
753 | union acpi_object *element; | |
754 | union acpi_object *obj; | |
755 | struct acpi_power_register *reg; | |
756 | struct acpi_processor_cx cx; | |
757 | ||
758 | memset(&cx, 0, sizeof(cx)); | |
759 | ||
50dd0969 | 760 | element = &(cst->package.elements[i]); |
1da177e4 LT |
761 | if (element->type != ACPI_TYPE_PACKAGE) |
762 | continue; | |
763 | ||
764 | if (element->package.count != 4) | |
765 | continue; | |
766 | ||
50dd0969 | 767 | obj = &(element->package.elements[0]); |
1da177e4 LT |
768 | |
769 | if (obj->type != ACPI_TYPE_BUFFER) | |
770 | continue; | |
771 | ||
4be44fcd | 772 | reg = (struct acpi_power_register *)obj->buffer.pointer; |
1da177e4 LT |
773 | |
774 | if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO && | |
4be44fcd | 775 | (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) |
1da177e4 LT |
776 | continue; |
777 | ||
1da177e4 | 778 | /* There should be an easy way to extract an integer... */ |
50dd0969 | 779 | obj = &(element->package.elements[1]); |
1da177e4 LT |
780 | if (obj->type != ACPI_TYPE_INTEGER) |
781 | continue; | |
782 | ||
783 | cx.type = obj->integer.value; | |
991528d7 VP |
784 | /* |
785 | * Some buggy BIOSes won't list C1 in _CST - | |
786 | * Let acpi_processor_get_power_info_default() handle them later | |
787 | */ | |
788 | if (i == 1 && cx.type != ACPI_STATE_C1) | |
789 | current_count++; | |
790 | ||
791 | cx.address = reg->address; | |
792 | cx.index = current_count + 1; | |
793 | ||
794 | cx.space_id = ACPI_CSTATE_SYSTEMIO; | |
795 | if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) { | |
796 | if (acpi_processor_ffh_cstate_probe | |
797 | (pr->id, &cx, reg) == 0) { | |
798 | cx.space_id = ACPI_CSTATE_FFH; | |
799 | } else if (cx.type != ACPI_STATE_C1) { | |
800 | /* | |
801 | * C1 is a special case where FIXED_HARDWARE | |
802 | * can be handled in non-MWAIT way as well. | |
803 | * In that case, save this _CST entry info. | |
804 | * That is, we retain space_id of SYSTEM_IO for | |
805 | * halt based C1. | |
806 | * Otherwise, ignore this info and continue. | |
807 | */ | |
808 | continue; | |
809 | } | |
810 | } | |
1da177e4 | 811 | |
50dd0969 | 812 | obj = &(element->package.elements[2]); |
1da177e4 LT |
813 | if (obj->type != ACPI_TYPE_INTEGER) |
814 | continue; | |
815 | ||
816 | cx.latency = obj->integer.value; | |
817 | ||
50dd0969 | 818 | obj = &(element->package.elements[3]); |
1da177e4 LT |
819 | if (obj->type != ACPI_TYPE_INTEGER) |
820 | continue; | |
821 | ||
822 | cx.power = obj->integer.value; | |
823 | ||
cf824788 JM |
824 | current_count++; |
825 | memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx)); | |
826 | ||
827 | /* | |
828 | * We support total ACPI_PROCESSOR_MAX_POWER - 1 | |
829 | * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1) | |
830 | */ | |
831 | if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) { | |
832 | printk(KERN_WARNING | |
833 | "Limiting number of power states to max (%d)\n", | |
834 | ACPI_PROCESSOR_MAX_POWER); | |
835 | printk(KERN_WARNING | |
836 | "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n"); | |
837 | break; | |
838 | } | |
1da177e4 LT |
839 | } |
840 | ||
4be44fcd | 841 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n", |
cf824788 | 842 | current_count)); |
1da177e4 LT |
843 | |
844 | /* Validate number of power states discovered */ | |
cf824788 | 845 | if (current_count < 2) |
6d93c648 | 846 | status = -EFAULT; |
1da177e4 | 847 | |
4be44fcd | 848 | end: |
02438d87 | 849 | kfree(buffer.pointer); |
1da177e4 | 850 | |
d550d98d | 851 | return status; |
1da177e4 LT |
852 | } |
853 | ||
1da177e4 LT |
854 | static void acpi_processor_power_verify_c2(struct acpi_processor_cx *cx) |
855 | { | |
1da177e4 LT |
856 | |
857 | if (!cx->address) | |
d550d98d | 858 | return; |
1da177e4 LT |
859 | |
860 | /* | |
861 | * C2 latency must be less than or equal to 100 | |
862 | * microseconds. | |
863 | */ | |
864 | else if (cx->latency > ACPI_PROCESSOR_MAX_C2_LATENCY) { | |
865 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
4be44fcd | 866 | "latency too large [%d]\n", cx->latency)); |
d550d98d | 867 | return; |
1da177e4 LT |
868 | } |
869 | ||
1da177e4 LT |
870 | /* |
871 | * Otherwise we've met all of our C2 requirements. | |
872 | * Normalize the C2 latency to expidite policy | |
873 | */ | |
874 | cx->valid = 1; | |
875 | cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency); | |
876 | ||
d550d98d | 877 | return; |
1da177e4 LT |
878 | } |
879 | ||
4be44fcd LB |
880 | static void acpi_processor_power_verify_c3(struct acpi_processor *pr, |
881 | struct acpi_processor_cx *cx) | |
1da177e4 | 882 | { |
02df8b93 VP |
883 | static int bm_check_flag; |
884 | ||
1da177e4 LT |
885 | |
886 | if (!cx->address) | |
d550d98d | 887 | return; |
1da177e4 LT |
888 | |
889 | /* | |
890 | * C3 latency must be less than or equal to 1000 | |
891 | * microseconds. | |
892 | */ | |
893 | else if (cx->latency > ACPI_PROCESSOR_MAX_C3_LATENCY) { | |
894 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
4be44fcd | 895 | "latency too large [%d]\n", cx->latency)); |
d550d98d | 896 | return; |
1da177e4 LT |
897 | } |
898 | ||
1da177e4 LT |
899 | /* |
900 | * PIIX4 Erratum #18: We don't support C3 when Type-F (fast) | |
901 | * DMA transfers are used by any ISA device to avoid livelock. | |
902 | * Note that we could disable Type-F DMA (as recommended by | |
903 | * the erratum), but this is known to disrupt certain ISA | |
904 | * devices thus we take the conservative approach. | |
905 | */ | |
906 | else if (errata.piix4.fdma) { | |
907 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
4be44fcd | 908 | "C3 not supported on PIIX4 with Type-F DMA\n")); |
d550d98d | 909 | return; |
1da177e4 LT |
910 | } |
911 | ||
02df8b93 VP |
912 | /* All the logic here assumes flags.bm_check is same across all CPUs */ |
913 | if (!bm_check_flag) { | |
914 | /* Determine whether bm_check is needed based on CPU */ | |
915 | acpi_processor_power_init_bm_check(&(pr->flags), pr->id); | |
916 | bm_check_flag = pr->flags.bm_check; | |
917 | } else { | |
918 | pr->flags.bm_check = bm_check_flag; | |
919 | } | |
920 | ||
921 | if (pr->flags.bm_check) { | |
02df8b93 VP |
922 | /* bus mastering control is necessary */ |
923 | if (!pr->flags.bm_control) { | |
924 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
4be44fcd | 925 | "C3 support requires bus mastering control\n")); |
d550d98d | 926 | return; |
02df8b93 VP |
927 | } |
928 | } else { | |
02df8b93 VP |
929 | /* |
930 | * WBINVD should be set in fadt, for C3 state to be | |
931 | * supported on when bm_check is not required. | |
932 | */ | |
cee324b1 | 933 | if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) { |
02df8b93 | 934 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
4be44fcd LB |
935 | "Cache invalidation should work properly" |
936 | " for C3 to be enabled on SMP systems\n")); | |
d550d98d | 937 | return; |
02df8b93 | 938 | } |
d8c71b6d | 939 | acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0); |
02df8b93 VP |
940 | } |
941 | ||
1da177e4 LT |
942 | /* |
943 | * Otherwise we've met all of our C3 requirements. | |
944 | * Normalize the C3 latency to expidite policy. Enable | |
945 | * checking of bus mastering status (bm_check) so we can | |
946 | * use this in our C3 policy | |
947 | */ | |
948 | cx->valid = 1; | |
949 | cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency); | |
1da177e4 | 950 | |
d550d98d | 951 | return; |
1da177e4 LT |
952 | } |
953 | ||
1da177e4 LT |
954 | static int acpi_processor_power_verify(struct acpi_processor *pr) |
955 | { | |
956 | unsigned int i; | |
957 | unsigned int working = 0; | |
6eb0a0fd | 958 | |
169a0abb | 959 | pr->power.timer_broadcast_on_state = INT_MAX; |
6eb0a0fd | 960 | |
4be44fcd | 961 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { |
1da177e4 LT |
962 | struct acpi_processor_cx *cx = &pr->power.states[i]; |
963 | ||
964 | switch (cx->type) { | |
965 | case ACPI_STATE_C1: | |
966 | cx->valid = 1; | |
967 | break; | |
968 | ||
969 | case ACPI_STATE_C2: | |
970 | acpi_processor_power_verify_c2(cx); | |
169a0abb TG |
971 | if (cx->valid) |
972 | acpi_timer_check_state(i, pr, cx); | |
1da177e4 LT |
973 | break; |
974 | ||
975 | case ACPI_STATE_C3: | |
976 | acpi_processor_power_verify_c3(pr, cx); | |
bd663347 | 977 | if (cx->valid) |
169a0abb | 978 | acpi_timer_check_state(i, pr, cx); |
1da177e4 LT |
979 | break; |
980 | } | |
981 | ||
982 | if (cx->valid) | |
983 | working++; | |
984 | } | |
bd663347 | 985 | |
169a0abb | 986 | acpi_propagate_timer_broadcast(pr); |
1da177e4 LT |
987 | |
988 | return (working); | |
989 | } | |
990 | ||
4be44fcd | 991 | static int acpi_processor_get_power_info(struct acpi_processor *pr) |
1da177e4 LT |
992 | { |
993 | unsigned int i; | |
994 | int result; | |
995 | ||
1da177e4 LT |
996 | |
997 | /* NOTE: the idle thread may not be running while calling | |
998 | * this function */ | |
999 | ||
991528d7 VP |
1000 | /* Zero initialize all the C-states info. */ |
1001 | memset(pr->power.states, 0, sizeof(pr->power.states)); | |
1002 | ||
1da177e4 | 1003 | result = acpi_processor_get_power_info_cst(pr); |
6d93c648 | 1004 | if (result == -ENODEV) |
c5a114f1 | 1005 | result = acpi_processor_get_power_info_fadt(pr); |
6d93c648 | 1006 | |
991528d7 VP |
1007 | if (result) |
1008 | return result; | |
1009 | ||
1010 | acpi_processor_get_power_info_default(pr); | |
1011 | ||
cf824788 | 1012 | pr->power.count = acpi_processor_power_verify(pr); |
1da177e4 LT |
1013 | |
1014 | /* | |
1015 | * Set Default Policy | |
1016 | * ------------------ | |
1017 | * Now that we know which states are supported, set the default | |
1018 | * policy. Note that this policy can be changed dynamically | |
1019 | * (e.g. encourage deeper sleeps to conserve battery life when | |
1020 | * not on AC). | |
1021 | */ | |
1022 | result = acpi_processor_set_power_policy(pr); | |
1023 | if (result) | |
d550d98d | 1024 | return result; |
1da177e4 LT |
1025 | |
1026 | /* | |
1027 | * if one state of type C2 or C3 is available, mark this | |
1028 | * CPU as being "idle manageable" | |
1029 | */ | |
1030 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { | |
acf05f4b | 1031 | if (pr->power.states[i].valid) { |
1da177e4 | 1032 | pr->power.count = i; |
2203d6ed LT |
1033 | if (pr->power.states[i].type >= ACPI_STATE_C2) |
1034 | pr->flags.power = 1; | |
acf05f4b | 1035 | } |
1da177e4 LT |
1036 | } |
1037 | ||
d550d98d | 1038 | return 0; |
1da177e4 LT |
1039 | } |
1040 | ||
4be44fcd | 1041 | int acpi_processor_cst_has_changed(struct acpi_processor *pr) |
1da177e4 | 1042 | { |
4be44fcd | 1043 | int result = 0; |
1da177e4 | 1044 | |
1da177e4 LT |
1045 | |
1046 | if (!pr) | |
d550d98d | 1047 | return -EINVAL; |
1da177e4 | 1048 | |
4be44fcd | 1049 | if (nocst) { |
d550d98d | 1050 | return -ENODEV; |
1da177e4 LT |
1051 | } |
1052 | ||
1053 | if (!pr->flags.power_setup_done) | |
d550d98d | 1054 | return -ENODEV; |
1da177e4 LT |
1055 | |
1056 | /* Fall back to the default idle loop */ | |
1057 | pm_idle = pm_idle_save; | |
4be44fcd | 1058 | synchronize_sched(); /* Relies on interrupts forcing exit from idle. */ |
1da177e4 LT |
1059 | |
1060 | pr->flags.power = 0; | |
1061 | result = acpi_processor_get_power_info(pr); | |
1062 | if ((pr->flags.power == 1) && (pr->flags.power_setup_done)) | |
1063 | pm_idle = acpi_processor_idle; | |
1064 | ||
d550d98d | 1065 | return result; |
1da177e4 LT |
1066 | } |
1067 | ||
1068 | /* proc interface */ | |
1069 | ||
1070 | static int acpi_processor_power_seq_show(struct seq_file *seq, void *offset) | |
1071 | { | |
50dd0969 | 1072 | struct acpi_processor *pr = seq->private; |
4be44fcd | 1073 | unsigned int i; |
1da177e4 | 1074 | |
1da177e4 LT |
1075 | |
1076 | if (!pr) | |
1077 | goto end; | |
1078 | ||
1079 | seq_printf(seq, "active state: C%zd\n" | |
4be44fcd | 1080 | "max_cstate: C%d\n" |
5c87579e AV |
1081 | "bus master activity: %08x\n" |
1082 | "maximum allowed latency: %d usec\n", | |
4be44fcd | 1083 | pr->power.state ? pr->power.state - pr->power.states : 0, |
5c87579e AV |
1084 | max_cstate, (unsigned)pr->power.bm_activity, |
1085 | system_latency_constraint()); | |
1da177e4 LT |
1086 | |
1087 | seq_puts(seq, "states:\n"); | |
1088 | ||
1089 | for (i = 1; i <= pr->power.count; i++) { | |
1090 | seq_printf(seq, " %cC%d: ", | |
4be44fcd LB |
1091 | (&pr->power.states[i] == |
1092 | pr->power.state ? '*' : ' '), i); | |
1da177e4 LT |
1093 | |
1094 | if (!pr->power.states[i].valid) { | |
1095 | seq_puts(seq, "<not supported>\n"); | |
1096 | continue; | |
1097 | } | |
1098 | ||
1099 | switch (pr->power.states[i].type) { | |
1100 | case ACPI_STATE_C1: | |
1101 | seq_printf(seq, "type[C1] "); | |
1102 | break; | |
1103 | case ACPI_STATE_C2: | |
1104 | seq_printf(seq, "type[C2] "); | |
1105 | break; | |
1106 | case ACPI_STATE_C3: | |
1107 | seq_printf(seq, "type[C3] "); | |
1108 | break; | |
1109 | default: | |
1110 | seq_printf(seq, "type[--] "); | |
1111 | break; | |
1112 | } | |
1113 | ||
1114 | if (pr->power.states[i].promotion.state) | |
1115 | seq_printf(seq, "promotion[C%zd] ", | |
4be44fcd LB |
1116 | (pr->power.states[i].promotion.state - |
1117 | pr->power.states)); | |
1da177e4 LT |
1118 | else |
1119 | seq_puts(seq, "promotion[--] "); | |
1120 | ||
1121 | if (pr->power.states[i].demotion.state) | |
1122 | seq_printf(seq, "demotion[C%zd] ", | |
4be44fcd LB |
1123 | (pr->power.states[i].demotion.state - |
1124 | pr->power.states)); | |
1da177e4 LT |
1125 | else |
1126 | seq_puts(seq, "demotion[--] "); | |
1127 | ||
a3c6598f | 1128 | seq_printf(seq, "latency[%03d] usage[%08d] duration[%020llu]\n", |
4be44fcd | 1129 | pr->power.states[i].latency, |
a3c6598f | 1130 | pr->power.states[i].usage, |
b0b7eaaf | 1131 | (unsigned long long)pr->power.states[i].time); |
1da177e4 LT |
1132 | } |
1133 | ||
4be44fcd | 1134 | end: |
d550d98d | 1135 | return 0; |
1da177e4 LT |
1136 | } |
1137 | ||
1138 | static int acpi_processor_power_open_fs(struct inode *inode, struct file *file) | |
1139 | { | |
1140 | return single_open(file, acpi_processor_power_seq_show, | |
4be44fcd | 1141 | PDE(inode)->data); |
1da177e4 LT |
1142 | } |
1143 | ||
d7508032 | 1144 | static const struct file_operations acpi_processor_power_fops = { |
4be44fcd LB |
1145 | .open = acpi_processor_power_open_fs, |
1146 | .read = seq_read, | |
1147 | .llseek = seq_lseek, | |
1148 | .release = single_release, | |
1da177e4 LT |
1149 | }; |
1150 | ||
1fec74a9 | 1151 | #ifdef CONFIG_SMP |
5c87579e AV |
1152 | static void smp_callback(void *v) |
1153 | { | |
1154 | /* we already woke the CPU up, nothing more to do */ | |
1155 | } | |
1156 | ||
1157 | /* | |
1158 | * This function gets called when a part of the kernel has a new latency | |
1159 | * requirement. This means we need to get all processors out of their C-state, | |
1160 | * and then recalculate a new suitable C-state. Just do a cross-cpu IPI; that | |
1161 | * wakes them all right up. | |
1162 | */ | |
1163 | static int acpi_processor_latency_notify(struct notifier_block *b, | |
1164 | unsigned long l, void *v) | |
1165 | { | |
1166 | smp_call_function(smp_callback, NULL, 0, 1); | |
1167 | return NOTIFY_OK; | |
1168 | } | |
1169 | ||
1170 | static struct notifier_block acpi_processor_latency_notifier = { | |
1171 | .notifier_call = acpi_processor_latency_notify, | |
1172 | }; | |
1fec74a9 | 1173 | #endif |
5c87579e | 1174 | |
7af8b660 | 1175 | int __cpuinit acpi_processor_power_init(struct acpi_processor *pr, |
4be44fcd | 1176 | struct acpi_device *device) |
1da177e4 | 1177 | { |
4be44fcd | 1178 | acpi_status status = 0; |
b6835052 | 1179 | static int first_run; |
4be44fcd | 1180 | struct proc_dir_entry *entry = NULL; |
1da177e4 LT |
1181 | unsigned int i; |
1182 | ||
1da177e4 LT |
1183 | |
1184 | if (!first_run) { | |
1185 | dmi_check_system(processor_power_dmi_table); | |
1186 | if (max_cstate < ACPI_C_STATES_MAX) | |
4be44fcd LB |
1187 | printk(KERN_NOTICE |
1188 | "ACPI: processor limited to max C-state %d\n", | |
1189 | max_cstate); | |
1da177e4 | 1190 | first_run++; |
1fec74a9 | 1191 | #ifdef CONFIG_SMP |
5c87579e | 1192 | register_latency_notifier(&acpi_processor_latency_notifier); |
1fec74a9 | 1193 | #endif |
1da177e4 LT |
1194 | } |
1195 | ||
02df8b93 | 1196 | if (!pr) |
d550d98d | 1197 | return -EINVAL; |
02df8b93 | 1198 | |
cee324b1 | 1199 | if (acpi_gbl_FADT.cst_control && !nocst) { |
4be44fcd | 1200 | status = |
cee324b1 | 1201 | acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8); |
1da177e4 | 1202 | if (ACPI_FAILURE(status)) { |
a6fc6720 TR |
1203 | ACPI_EXCEPTION((AE_INFO, status, |
1204 | "Notifying BIOS of _CST ability failed")); | |
1da177e4 LT |
1205 | } |
1206 | } | |
1207 | ||
1208 | acpi_processor_get_power_info(pr); | |
1209 | ||
1210 | /* | |
1211 | * Install the idle handler if processor power management is supported. | |
1212 | * Note that we use previously set idle handler will be used on | |
1213 | * platforms that only support C1. | |
1214 | */ | |
1215 | if ((pr->flags.power) && (!boot_option_idle_override)) { | |
1216 | printk(KERN_INFO PREFIX "CPU%d (power states:", pr->id); | |
1217 | for (i = 1; i <= pr->power.count; i++) | |
1218 | if (pr->power.states[i].valid) | |
4be44fcd LB |
1219 | printk(" C%d[C%d]", i, |
1220 | pr->power.states[i].type); | |
1da177e4 LT |
1221 | printk(")\n"); |
1222 | ||
1223 | if (pr->id == 0) { | |
1224 | pm_idle_save = pm_idle; | |
1225 | pm_idle = acpi_processor_idle; | |
1226 | } | |
1227 | } | |
1228 | ||
1229 | /* 'power' [R] */ | |
1230 | entry = create_proc_entry(ACPI_PROCESSOR_FILE_POWER, | |
4be44fcd | 1231 | S_IRUGO, acpi_device_dir(device)); |
1da177e4 | 1232 | if (!entry) |
a6fc6720 | 1233 | return -EIO; |
1da177e4 LT |
1234 | else { |
1235 | entry->proc_fops = &acpi_processor_power_fops; | |
1236 | entry->data = acpi_driver_data(device); | |
1237 | entry->owner = THIS_MODULE; | |
1238 | } | |
1239 | ||
1240 | pr->flags.power_setup_done = 1; | |
1241 | ||
d550d98d | 1242 | return 0; |
1da177e4 LT |
1243 | } |
1244 | ||
4be44fcd LB |
1245 | int acpi_processor_power_exit(struct acpi_processor *pr, |
1246 | struct acpi_device *device) | |
1da177e4 | 1247 | { |
1da177e4 LT |
1248 | |
1249 | pr->flags.power_setup_done = 0; | |
1250 | ||
1251 | if (acpi_device_dir(device)) | |
4be44fcd LB |
1252 | remove_proc_entry(ACPI_PROCESSOR_FILE_POWER, |
1253 | acpi_device_dir(device)); | |
1da177e4 LT |
1254 | |
1255 | /* Unregister the idle handler when processor #0 is removed. */ | |
1256 | if (pr->id == 0) { | |
1257 | pm_idle = pm_idle_save; | |
1258 | ||
1259 | /* | |
1260 | * We are about to unload the current idle thread pm callback | |
1261 | * (pm_idle), Wait for all processors to update cached/local | |
1262 | * copies of pm_idle before proceeding. | |
1263 | */ | |
1264 | cpu_idle_wait(); | |
1fec74a9 | 1265 | #ifdef CONFIG_SMP |
5c87579e | 1266 | unregister_latency_notifier(&acpi_processor_latency_notifier); |
1fec74a9 | 1267 | #endif |
1da177e4 LT |
1268 | } |
1269 | ||
d550d98d | 1270 | return 0; |
1da177e4 | 1271 | } |