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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * processor_idle - idle state submodule to the ACPI processor driver | |
3 | * | |
4 | * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> | |
5 | * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> | |
c5ab81ca | 6 | * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de> |
1da177e4 LT |
7 | * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> |
8 | * - Added processor hotplug support | |
02df8b93 VP |
9 | * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> |
10 | * - Added support for C3 on SMP | |
1da177e4 LT |
11 | * |
12 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
13 | * | |
14 | * This program is free software; you can redistribute it and/or modify | |
15 | * it under the terms of the GNU General Public License as published by | |
16 | * the Free Software Foundation; either version 2 of the License, or (at | |
17 | * your option) any later version. | |
18 | * | |
19 | * This program is distributed in the hope that it will be useful, but | |
20 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
22 | * General Public License for more details. | |
23 | * | |
24 | * You should have received a copy of the GNU General Public License along | |
25 | * with this program; if not, write to the Free Software Foundation, Inc., | |
26 | * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. | |
27 | * | |
28 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
29 | */ | |
30 | ||
1da177e4 | 31 | #include <linux/module.h> |
1da177e4 LT |
32 | #include <linux/acpi.h> |
33 | #include <linux/dmi.h> | |
e2668fb5 | 34 | #include <linux/sched.h> /* need_resched() */ |
e9e2cdb4 | 35 | #include <linux/clockchips.h> |
4f86d3a8 | 36 | #include <linux/cpuidle.h> |
0a3b15ac | 37 | #include <linux/syscore_ops.h> |
1da177e4 | 38 | |
3434933b TG |
39 | /* |
40 | * Include the apic definitions for x86 to have the APIC timer related defines | |
41 | * available also for UP (on SMP it gets magically included via linux/smp.h). | |
42 | * asm/acpi.h is not an option, as it would require more include magic. Also | |
43 | * creating an empty asm-ia64/apic.h would just trade pest vs. cholera. | |
44 | */ | |
45 | #ifdef CONFIG_X86 | |
46 | #include <asm/apic.h> | |
47 | #endif | |
48 | ||
1da177e4 LT |
49 | #include <acpi/acpi_bus.h> |
50 | #include <acpi/processor.h> | |
51 | ||
a192a958 LB |
52 | #define PREFIX "ACPI: " |
53 | ||
1da177e4 | 54 | #define ACPI_PROCESSOR_CLASS "processor" |
1da177e4 | 55 | #define _COMPONENT ACPI_PROCESSOR_COMPONENT |
f52fd66d | 56 | ACPI_MODULE_NAME("processor_idle"); |
1da177e4 | 57 | |
4f86d3a8 LB |
58 | static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER; |
59 | module_param(max_cstate, uint, 0000); | |
b6835052 | 60 | static unsigned int nocst __read_mostly; |
1da177e4 | 61 | module_param(nocst, uint, 0000); |
d3e7e99f LB |
62 | static int bm_check_disable __read_mostly; |
63 | module_param(bm_check_disable, uint, 0000); | |
1da177e4 | 64 | |
25de5718 | 65 | static unsigned int latency_factor __read_mostly = 2; |
4963f620 | 66 | module_param(latency_factor, uint, 0644); |
1da177e4 | 67 | |
3d339dcb DL |
68 | static DEFINE_PER_CPU(struct cpuidle_device *, acpi_cpuidle_device); |
69 | ||
6240a10d AS |
70 | static DEFINE_PER_CPU(struct acpi_processor_cx * [CPUIDLE_STATE_MAX], |
71 | acpi_cstate); | |
ac3ebafa | 72 | |
d1896049 TR |
73 | static int disabled_by_idle_boot_param(void) |
74 | { | |
75 | return boot_option_idle_override == IDLE_POLL || | |
d1896049 TR |
76 | boot_option_idle_override == IDLE_HALT; |
77 | } | |
78 | ||
1da177e4 LT |
79 | /* |
80 | * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3. | |
81 | * For now disable this. Probably a bug somewhere else. | |
82 | * | |
83 | * To skip this limit, boot/load with a large max_cstate limit. | |
84 | */ | |
1855256c | 85 | static int set_max_cstate(const struct dmi_system_id *id) |
1da177e4 LT |
86 | { |
87 | if (max_cstate > ACPI_PROCESSOR_MAX_POWER) | |
88 | return 0; | |
89 | ||
3d35600a | 90 | printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate." |
4be44fcd LB |
91 | " Override with \"processor.max_cstate=%d\"\n", id->ident, |
92 | (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1); | |
1da177e4 | 93 | |
3d35600a | 94 | max_cstate = (long)id->driver_data; |
1da177e4 LT |
95 | |
96 | return 0; | |
97 | } | |
98 | ||
7ded5689 AR |
99 | /* Actually this shouldn't be __cpuinitdata, would be better to fix the |
100 | callers to only run once -AK */ | |
101 | static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = { | |
876c184b TR |
102 | { set_max_cstate, "Clevo 5600D", { |
103 | DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"), | |
104 | DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")}, | |
4be44fcd | 105 | (void *)2}, |
370d5cd8 AV |
106 | { set_max_cstate, "Pavilion zv5000", { |
107 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
108 | DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")}, | |
109 | (void *)1}, | |
110 | { set_max_cstate, "Asus L8400B", { | |
111 | DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."), | |
112 | DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")}, | |
113 | (void *)1}, | |
1da177e4 LT |
114 | {}, |
115 | }; | |
116 | ||
4f86d3a8 | 117 | |
2e906655 | 118 | /* |
119 | * Callers should disable interrupts before the call and enable | |
120 | * interrupts after return. | |
121 | */ | |
ddc081a1 VP |
122 | static void acpi_safe_halt(void) |
123 | { | |
124 | current_thread_info()->status &= ~TS_POLLING; | |
125 | /* | |
126 | * TS_POLLING-cleared state must be visible before we | |
127 | * test NEED_RESCHED: | |
128 | */ | |
129 | smp_mb(); | |
71e93d15 | 130 | if (!need_resched()) { |
ddc081a1 | 131 | safe_halt(); |
71e93d15 VP |
132 | local_irq_disable(); |
133 | } | |
ddc081a1 VP |
134 | current_thread_info()->status |= TS_POLLING; |
135 | } | |
136 | ||
169a0abb TG |
137 | #ifdef ARCH_APICTIMER_STOPS_ON_C3 |
138 | ||
139 | /* | |
140 | * Some BIOS implementations switch to C3 in the published C2 state. | |
296d93cd LT |
141 | * This seems to be a common problem on AMD boxen, but other vendors |
142 | * are affected too. We pick the most conservative approach: we assume | |
143 | * that the local APIC stops in both C2 and C3. | |
169a0abb | 144 | */ |
7e275cc4 | 145 | static void lapic_timer_check_state(int state, struct acpi_processor *pr, |
169a0abb TG |
146 | struct acpi_processor_cx *cx) |
147 | { | |
148 | struct acpi_processor_power *pwr = &pr->power; | |
e585bef8 | 149 | u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2; |
169a0abb | 150 | |
db954b58 VP |
151 | if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT)) |
152 | return; | |
153 | ||
02c68a02 | 154 | if (amd_e400_c1e_detected) |
87ad57ba SL |
155 | type = ACPI_STATE_C1; |
156 | ||
169a0abb TG |
157 | /* |
158 | * Check, if one of the previous states already marked the lapic | |
159 | * unstable | |
160 | */ | |
161 | if (pwr->timer_broadcast_on_state < state) | |
162 | return; | |
163 | ||
e585bef8 | 164 | if (cx->type >= type) |
296d93cd | 165 | pr->power.timer_broadcast_on_state = state; |
169a0abb TG |
166 | } |
167 | ||
918aae42 | 168 | static void __lapic_timer_propagate_broadcast(void *arg) |
169a0abb | 169 | { |
f833bab8 | 170 | struct acpi_processor *pr = (struct acpi_processor *) arg; |
e9e2cdb4 TG |
171 | unsigned long reason; |
172 | ||
173 | reason = pr->power.timer_broadcast_on_state < INT_MAX ? | |
174 | CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF; | |
175 | ||
176 | clockevents_notify(reason, &pr->id); | |
e9e2cdb4 TG |
177 | } |
178 | ||
918aae42 HS |
179 | static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) |
180 | { | |
181 | smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast, | |
182 | (void *)pr, 1); | |
183 | } | |
184 | ||
e9e2cdb4 | 185 | /* Power(C) State timer broadcast control */ |
7e275cc4 | 186 | static void lapic_timer_state_broadcast(struct acpi_processor *pr, |
e9e2cdb4 TG |
187 | struct acpi_processor_cx *cx, |
188 | int broadcast) | |
189 | { | |
e9e2cdb4 TG |
190 | int state = cx - pr->power.states; |
191 | ||
192 | if (state >= pr->power.timer_broadcast_on_state) { | |
193 | unsigned long reason; | |
194 | ||
195 | reason = broadcast ? CLOCK_EVT_NOTIFY_BROADCAST_ENTER : | |
196 | CLOCK_EVT_NOTIFY_BROADCAST_EXIT; | |
197 | clockevents_notify(reason, &pr->id); | |
198 | } | |
169a0abb TG |
199 | } |
200 | ||
201 | #else | |
202 | ||
7e275cc4 | 203 | static void lapic_timer_check_state(int state, struct acpi_processor *pr, |
169a0abb | 204 | struct acpi_processor_cx *cstate) { } |
7e275cc4 LB |
205 | static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { } |
206 | static void lapic_timer_state_broadcast(struct acpi_processor *pr, | |
e9e2cdb4 TG |
207 | struct acpi_processor_cx *cx, |
208 | int broadcast) | |
209 | { | |
210 | } | |
169a0abb TG |
211 | |
212 | #endif | |
213 | ||
0a3b15ac | 214 | #ifdef CONFIG_PM_SLEEP |
815ab0fd LB |
215 | static u32 saved_bm_rld; |
216 | ||
95d45d4c | 217 | static int acpi_processor_suspend(void) |
815ab0fd LB |
218 | { |
219 | acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &saved_bm_rld); | |
0a3b15ac | 220 | return 0; |
815ab0fd | 221 | } |
0a3b15ac | 222 | |
95d45d4c | 223 | static void acpi_processor_resume(void) |
815ab0fd LB |
224 | { |
225 | u32 resumed_bm_rld; | |
226 | ||
227 | acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &resumed_bm_rld); | |
0a3b15ac RW |
228 | if (resumed_bm_rld == saved_bm_rld) |
229 | return; | |
815ab0fd | 230 | |
0a3b15ac | 231 | acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, saved_bm_rld); |
815ab0fd | 232 | } |
b04e7bdb | 233 | |
0a3b15ac RW |
234 | static struct syscore_ops acpi_processor_syscore_ops = { |
235 | .suspend = acpi_processor_suspend, | |
236 | .resume = acpi_processor_resume, | |
237 | }; | |
238 | ||
239 | void acpi_processor_syscore_init(void) | |
b04e7bdb | 240 | { |
0a3b15ac | 241 | register_syscore_ops(&acpi_processor_syscore_ops); |
b04e7bdb TG |
242 | } |
243 | ||
0a3b15ac | 244 | void acpi_processor_syscore_exit(void) |
b04e7bdb | 245 | { |
0a3b15ac | 246 | unregister_syscore_ops(&acpi_processor_syscore_ops); |
b04e7bdb | 247 | } |
0a3b15ac | 248 | #endif /* CONFIG_PM_SLEEP */ |
b04e7bdb | 249 | |
592913ec | 250 | #if defined(CONFIG_X86) |
520daf72 | 251 | static void tsc_check_state(int state) |
ddb25f9a AK |
252 | { |
253 | switch (boot_cpu_data.x86_vendor) { | |
254 | case X86_VENDOR_AMD: | |
40fb1715 | 255 | case X86_VENDOR_INTEL: |
ddb25f9a AK |
256 | /* |
257 | * AMD Fam10h TSC will tick in all | |
258 | * C/P/S0/S1 states when this bit is set. | |
259 | */ | |
40fb1715 | 260 | if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC)) |
520daf72 | 261 | return; |
40fb1715 | 262 | |
ddb25f9a | 263 | /*FALL THROUGH*/ |
ddb25f9a | 264 | default: |
520daf72 LB |
265 | /* TSC could halt in idle, so notify users */ |
266 | if (state > ACPI_STATE_C1) | |
267 | mark_tsc_unstable("TSC halts in idle"); | |
ddb25f9a AK |
268 | } |
269 | } | |
520daf72 LB |
270 | #else |
271 | static void tsc_check_state(int state) { return; } | |
ddb25f9a AK |
272 | #endif |
273 | ||
4be44fcd | 274 | static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr) |
1da177e4 | 275 | { |
1da177e4 LT |
276 | |
277 | if (!pr) | |
d550d98d | 278 | return -EINVAL; |
1da177e4 LT |
279 | |
280 | if (!pr->pblk) | |
d550d98d | 281 | return -ENODEV; |
1da177e4 | 282 | |
1da177e4 | 283 | /* if info is obtained from pblk/fadt, type equals state */ |
1da177e4 LT |
284 | pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2; |
285 | pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3; | |
286 | ||
4c033552 VP |
287 | #ifndef CONFIG_HOTPLUG_CPU |
288 | /* | |
289 | * Check for P_LVL2_UP flag before entering C2 and above on | |
4f86d3a8 | 290 | * an SMP system. |
4c033552 | 291 | */ |
ad71860a | 292 | if ((num_online_cpus() > 1) && |
cee324b1 | 293 | !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) |
d550d98d | 294 | return -ENODEV; |
4c033552 VP |
295 | #endif |
296 | ||
1da177e4 LT |
297 | /* determine C2 and C3 address from pblk */ |
298 | pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4; | |
299 | pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5; | |
300 | ||
301 | /* determine latencies from FADT */ | |
ba494bee BM |
302 | pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.c2_latency; |
303 | pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.c3_latency; | |
1da177e4 | 304 | |
5d76b6f6 LB |
305 | /* |
306 | * FADT specified C2 latency must be less than or equal to | |
307 | * 100 microseconds. | |
308 | */ | |
ba494bee | 309 | if (acpi_gbl_FADT.c2_latency > ACPI_PROCESSOR_MAX_C2_LATENCY) { |
5d76b6f6 | 310 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
ba494bee | 311 | "C2 latency too large [%d]\n", acpi_gbl_FADT.c2_latency)); |
5d76b6f6 LB |
312 | /* invalidate C2 */ |
313 | pr->power.states[ACPI_STATE_C2].address = 0; | |
314 | } | |
315 | ||
a6d72c18 LB |
316 | /* |
317 | * FADT supplied C3 latency must be less than or equal to | |
318 | * 1000 microseconds. | |
319 | */ | |
ba494bee | 320 | if (acpi_gbl_FADT.c3_latency > ACPI_PROCESSOR_MAX_C3_LATENCY) { |
a6d72c18 | 321 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
ba494bee | 322 | "C3 latency too large [%d]\n", acpi_gbl_FADT.c3_latency)); |
a6d72c18 LB |
323 | /* invalidate C3 */ |
324 | pr->power.states[ACPI_STATE_C3].address = 0; | |
325 | } | |
326 | ||
1da177e4 LT |
327 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
328 | "lvl2[0x%08x] lvl3[0x%08x]\n", | |
329 | pr->power.states[ACPI_STATE_C2].address, | |
330 | pr->power.states[ACPI_STATE_C3].address)); | |
331 | ||
d550d98d | 332 | return 0; |
1da177e4 LT |
333 | } |
334 | ||
991528d7 | 335 | static int acpi_processor_get_power_info_default(struct acpi_processor *pr) |
acf05f4b | 336 | { |
991528d7 VP |
337 | if (!pr->power.states[ACPI_STATE_C1].valid) { |
338 | /* set the first C-State to C1 */ | |
339 | /* all processors need to support C1 */ | |
340 | pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1; | |
341 | pr->power.states[ACPI_STATE_C1].valid = 1; | |
0fda6b40 | 342 | pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT; |
991528d7 VP |
343 | } |
344 | /* the C0 state only exists as a filler in our array */ | |
acf05f4b | 345 | pr->power.states[ACPI_STATE_C0].valid = 1; |
d550d98d | 346 | return 0; |
acf05f4b VP |
347 | } |
348 | ||
4be44fcd | 349 | static int acpi_processor_get_power_info_cst(struct acpi_processor *pr) |
1da177e4 | 350 | { |
4be44fcd | 351 | acpi_status status = 0; |
439913ff | 352 | u64 count; |
cf824788 | 353 | int current_count; |
4be44fcd LB |
354 | int i; |
355 | struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; | |
356 | union acpi_object *cst; | |
1da177e4 | 357 | |
1da177e4 | 358 | |
1da177e4 | 359 | if (nocst) |
d550d98d | 360 | return -ENODEV; |
1da177e4 | 361 | |
991528d7 | 362 | current_count = 0; |
1da177e4 LT |
363 | |
364 | status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer); | |
365 | if (ACPI_FAILURE(status)) { | |
366 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n")); | |
d550d98d | 367 | return -ENODEV; |
4be44fcd | 368 | } |
1da177e4 | 369 | |
50dd0969 | 370 | cst = buffer.pointer; |
1da177e4 LT |
371 | |
372 | /* There must be at least 2 elements */ | |
373 | if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) { | |
6468463a | 374 | printk(KERN_ERR PREFIX "not enough elements in _CST\n"); |
1da177e4 LT |
375 | status = -EFAULT; |
376 | goto end; | |
377 | } | |
378 | ||
379 | count = cst->package.elements[0].integer.value; | |
380 | ||
381 | /* Validate number of power states. */ | |
382 | if (count < 1 || count != cst->package.count - 1) { | |
6468463a | 383 | printk(KERN_ERR PREFIX "count given by _CST is not valid\n"); |
1da177e4 LT |
384 | status = -EFAULT; |
385 | goto end; | |
386 | } | |
387 | ||
1da177e4 LT |
388 | /* Tell driver that at least _CST is supported. */ |
389 | pr->flags.has_cst = 1; | |
390 | ||
391 | for (i = 1; i <= count; i++) { | |
392 | union acpi_object *element; | |
393 | union acpi_object *obj; | |
394 | struct acpi_power_register *reg; | |
395 | struct acpi_processor_cx cx; | |
396 | ||
397 | memset(&cx, 0, sizeof(cx)); | |
398 | ||
50dd0969 | 399 | element = &(cst->package.elements[i]); |
1da177e4 LT |
400 | if (element->type != ACPI_TYPE_PACKAGE) |
401 | continue; | |
402 | ||
403 | if (element->package.count != 4) | |
404 | continue; | |
405 | ||
50dd0969 | 406 | obj = &(element->package.elements[0]); |
1da177e4 LT |
407 | |
408 | if (obj->type != ACPI_TYPE_BUFFER) | |
409 | continue; | |
410 | ||
4be44fcd | 411 | reg = (struct acpi_power_register *)obj->buffer.pointer; |
1da177e4 LT |
412 | |
413 | if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO && | |
4be44fcd | 414 | (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) |
1da177e4 LT |
415 | continue; |
416 | ||
1da177e4 | 417 | /* There should be an easy way to extract an integer... */ |
50dd0969 | 418 | obj = &(element->package.elements[1]); |
1da177e4 LT |
419 | if (obj->type != ACPI_TYPE_INTEGER) |
420 | continue; | |
421 | ||
422 | cx.type = obj->integer.value; | |
991528d7 VP |
423 | /* |
424 | * Some buggy BIOSes won't list C1 in _CST - | |
425 | * Let acpi_processor_get_power_info_default() handle them later | |
426 | */ | |
427 | if (i == 1 && cx.type != ACPI_STATE_C1) | |
428 | current_count++; | |
429 | ||
430 | cx.address = reg->address; | |
431 | cx.index = current_count + 1; | |
432 | ||
bc71bec9 | 433 | cx.entry_method = ACPI_CSTATE_SYSTEMIO; |
991528d7 VP |
434 | if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) { |
435 | if (acpi_processor_ffh_cstate_probe | |
436 | (pr->id, &cx, reg) == 0) { | |
bc71bec9 | 437 | cx.entry_method = ACPI_CSTATE_FFH; |
438 | } else if (cx.type == ACPI_STATE_C1) { | |
991528d7 VP |
439 | /* |
440 | * C1 is a special case where FIXED_HARDWARE | |
441 | * can be handled in non-MWAIT way as well. | |
442 | * In that case, save this _CST entry info. | |
991528d7 VP |
443 | * Otherwise, ignore this info and continue. |
444 | */ | |
bc71bec9 | 445 | cx.entry_method = ACPI_CSTATE_HALT; |
4fcb2fcd | 446 | snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT"); |
bc71bec9 | 447 | } else { |
991528d7 VP |
448 | continue; |
449 | } | |
da5e09a1 | 450 | if (cx.type == ACPI_STATE_C1 && |
d1896049 | 451 | (boot_option_idle_override == IDLE_NOMWAIT)) { |
c1e3b377 ZY |
452 | /* |
453 | * In most cases the C1 space_id obtained from | |
454 | * _CST object is FIXED_HARDWARE access mode. | |
455 | * But when the option of idle=halt is added, | |
456 | * the entry_method type should be changed from | |
457 | * CSTATE_FFH to CSTATE_HALT. | |
da5e09a1 ZY |
458 | * When the option of idle=nomwait is added, |
459 | * the C1 entry_method type should be | |
460 | * CSTATE_HALT. | |
c1e3b377 ZY |
461 | */ |
462 | cx.entry_method = ACPI_CSTATE_HALT; | |
463 | snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT"); | |
464 | } | |
4fcb2fcd VP |
465 | } else { |
466 | snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x", | |
467 | cx.address); | |
991528d7 | 468 | } |
1da177e4 | 469 | |
0fda6b40 VP |
470 | if (cx.type == ACPI_STATE_C1) { |
471 | cx.valid = 1; | |
472 | } | |
4fcb2fcd | 473 | |
50dd0969 | 474 | obj = &(element->package.elements[2]); |
1da177e4 LT |
475 | if (obj->type != ACPI_TYPE_INTEGER) |
476 | continue; | |
477 | ||
478 | cx.latency = obj->integer.value; | |
479 | ||
50dd0969 | 480 | obj = &(element->package.elements[3]); |
1da177e4 LT |
481 | if (obj->type != ACPI_TYPE_INTEGER) |
482 | continue; | |
483 | ||
cf824788 JM |
484 | current_count++; |
485 | memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx)); | |
486 | ||
487 | /* | |
488 | * We support total ACPI_PROCESSOR_MAX_POWER - 1 | |
489 | * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1) | |
490 | */ | |
491 | if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) { | |
492 | printk(KERN_WARNING | |
493 | "Limiting number of power states to max (%d)\n", | |
494 | ACPI_PROCESSOR_MAX_POWER); | |
495 | printk(KERN_WARNING | |
496 | "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n"); | |
497 | break; | |
498 | } | |
1da177e4 LT |
499 | } |
500 | ||
4be44fcd | 501 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n", |
cf824788 | 502 | current_count)); |
1da177e4 LT |
503 | |
504 | /* Validate number of power states discovered */ | |
cf824788 | 505 | if (current_count < 2) |
6d93c648 | 506 | status = -EFAULT; |
1da177e4 | 507 | |
4be44fcd | 508 | end: |
02438d87 | 509 | kfree(buffer.pointer); |
1da177e4 | 510 | |
d550d98d | 511 | return status; |
1da177e4 LT |
512 | } |
513 | ||
4be44fcd LB |
514 | static void acpi_processor_power_verify_c3(struct acpi_processor *pr, |
515 | struct acpi_processor_cx *cx) | |
1da177e4 | 516 | { |
ee1ca48f PV |
517 | static int bm_check_flag = -1; |
518 | static int bm_control_flag = -1; | |
02df8b93 | 519 | |
1da177e4 LT |
520 | |
521 | if (!cx->address) | |
d550d98d | 522 | return; |
1da177e4 | 523 | |
1da177e4 LT |
524 | /* |
525 | * PIIX4 Erratum #18: We don't support C3 when Type-F (fast) | |
526 | * DMA transfers are used by any ISA device to avoid livelock. | |
527 | * Note that we could disable Type-F DMA (as recommended by | |
528 | * the erratum), but this is known to disrupt certain ISA | |
529 | * devices thus we take the conservative approach. | |
530 | */ | |
531 | else if (errata.piix4.fdma) { | |
532 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
4be44fcd | 533 | "C3 not supported on PIIX4 with Type-F DMA\n")); |
d550d98d | 534 | return; |
1da177e4 LT |
535 | } |
536 | ||
02df8b93 | 537 | /* All the logic here assumes flags.bm_check is same across all CPUs */ |
ee1ca48f | 538 | if (bm_check_flag == -1) { |
02df8b93 VP |
539 | /* Determine whether bm_check is needed based on CPU */ |
540 | acpi_processor_power_init_bm_check(&(pr->flags), pr->id); | |
541 | bm_check_flag = pr->flags.bm_check; | |
ee1ca48f | 542 | bm_control_flag = pr->flags.bm_control; |
02df8b93 VP |
543 | } else { |
544 | pr->flags.bm_check = bm_check_flag; | |
ee1ca48f | 545 | pr->flags.bm_control = bm_control_flag; |
02df8b93 VP |
546 | } |
547 | ||
548 | if (pr->flags.bm_check) { | |
02df8b93 | 549 | if (!pr->flags.bm_control) { |
ed3110ef VP |
550 | if (pr->flags.has_cst != 1) { |
551 | /* bus mastering control is necessary */ | |
552 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
553 | "C3 support requires BM control\n")); | |
554 | return; | |
555 | } else { | |
556 | /* Here we enter C3 without bus mastering */ | |
557 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
558 | "C3 support without BM control\n")); | |
559 | } | |
02df8b93 VP |
560 | } |
561 | } else { | |
02df8b93 VP |
562 | /* |
563 | * WBINVD should be set in fadt, for C3 state to be | |
564 | * supported on when bm_check is not required. | |
565 | */ | |
cee324b1 | 566 | if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) { |
02df8b93 | 567 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
4be44fcd LB |
568 | "Cache invalidation should work properly" |
569 | " for C3 to be enabled on SMP systems\n")); | |
d550d98d | 570 | return; |
02df8b93 | 571 | } |
02df8b93 VP |
572 | } |
573 | ||
1da177e4 LT |
574 | /* |
575 | * Otherwise we've met all of our C3 requirements. | |
576 | * Normalize the C3 latency to expidite policy. Enable | |
577 | * checking of bus mastering status (bm_check) so we can | |
578 | * use this in our C3 policy | |
579 | */ | |
580 | cx->valid = 1; | |
4f86d3a8 | 581 | |
31878dd8 LB |
582 | /* |
583 | * On older chipsets, BM_RLD needs to be set | |
584 | * in order for Bus Master activity to wake the | |
585 | * system from C3. Newer chipsets handle DMA | |
586 | * during C3 automatically and BM_RLD is a NOP. | |
587 | * In either case, the proper way to | |
588 | * handle BM_RLD is to set it and leave it set. | |
589 | */ | |
50ffba1b | 590 | acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1); |
1da177e4 | 591 | |
d550d98d | 592 | return; |
1da177e4 LT |
593 | } |
594 | ||
1da177e4 LT |
595 | static int acpi_processor_power_verify(struct acpi_processor *pr) |
596 | { | |
597 | unsigned int i; | |
598 | unsigned int working = 0; | |
6eb0a0fd | 599 | |
169a0abb | 600 | pr->power.timer_broadcast_on_state = INT_MAX; |
6eb0a0fd | 601 | |
a0bf284b | 602 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { |
1da177e4 LT |
603 | struct acpi_processor_cx *cx = &pr->power.states[i]; |
604 | ||
605 | switch (cx->type) { | |
606 | case ACPI_STATE_C1: | |
607 | cx->valid = 1; | |
608 | break; | |
609 | ||
610 | case ACPI_STATE_C2: | |
d22edd29 LB |
611 | if (!cx->address) |
612 | break; | |
613 | cx->valid = 1; | |
1da177e4 LT |
614 | break; |
615 | ||
616 | case ACPI_STATE_C3: | |
617 | acpi_processor_power_verify_c3(pr, cx); | |
618 | break; | |
619 | } | |
7e275cc4 LB |
620 | if (!cx->valid) |
621 | continue; | |
1da177e4 | 622 | |
7e275cc4 LB |
623 | lapic_timer_check_state(i, pr, cx); |
624 | tsc_check_state(cx->type); | |
625 | working++; | |
1da177e4 | 626 | } |
bd663347 | 627 | |
918aae42 | 628 | lapic_timer_propagate_broadcast(pr); |
1da177e4 LT |
629 | |
630 | return (working); | |
631 | } | |
632 | ||
4be44fcd | 633 | static int acpi_processor_get_power_info(struct acpi_processor *pr) |
1da177e4 LT |
634 | { |
635 | unsigned int i; | |
636 | int result; | |
637 | ||
1da177e4 LT |
638 | |
639 | /* NOTE: the idle thread may not be running while calling | |
640 | * this function */ | |
641 | ||
991528d7 VP |
642 | /* Zero initialize all the C-states info. */ |
643 | memset(pr->power.states, 0, sizeof(pr->power.states)); | |
644 | ||
1da177e4 | 645 | result = acpi_processor_get_power_info_cst(pr); |
6d93c648 | 646 | if (result == -ENODEV) |
c5a114f1 | 647 | result = acpi_processor_get_power_info_fadt(pr); |
6d93c648 | 648 | |
991528d7 VP |
649 | if (result) |
650 | return result; | |
651 | ||
652 | acpi_processor_get_power_info_default(pr); | |
653 | ||
cf824788 | 654 | pr->power.count = acpi_processor_power_verify(pr); |
1da177e4 | 655 | |
1da177e4 LT |
656 | /* |
657 | * if one state of type C2 or C3 is available, mark this | |
658 | * CPU as being "idle manageable" | |
659 | */ | |
660 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { | |
acf05f4b | 661 | if (pr->power.states[i].valid) { |
1da177e4 | 662 | pr->power.count = i; |
2203d6ed LT |
663 | if (pr->power.states[i].type >= ACPI_STATE_C2) |
664 | pr->flags.power = 1; | |
acf05f4b | 665 | } |
1da177e4 LT |
666 | } |
667 | ||
d550d98d | 668 | return 0; |
1da177e4 LT |
669 | } |
670 | ||
4f86d3a8 LB |
671 | /** |
672 | * acpi_idle_bm_check - checks if bus master activity was detected | |
673 | */ | |
674 | static int acpi_idle_bm_check(void) | |
675 | { | |
676 | u32 bm_status = 0; | |
677 | ||
d3e7e99f LB |
678 | if (bm_check_disable) |
679 | return 0; | |
680 | ||
50ffba1b | 681 | acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status); |
4f86d3a8 | 682 | if (bm_status) |
50ffba1b | 683 | acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1); |
4f86d3a8 LB |
684 | /* |
685 | * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect | |
686 | * the true state of bus mastering activity; forcing us to | |
687 | * manually check the BMIDEA bit of each IDE channel. | |
688 | */ | |
689 | else if (errata.piix4.bmisx) { | |
690 | if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01) | |
691 | || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01)) | |
692 | bm_status = 1; | |
693 | } | |
694 | return bm_status; | |
695 | } | |
696 | ||
4f86d3a8 LB |
697 | /** |
698 | * acpi_idle_do_entry - a helper function that does C2 and C3 type entry | |
699 | * @cx: cstate data | |
bc71bec9 | 700 | * |
701 | * Caller disables interrupt before call and enables interrupt after return. | |
4f86d3a8 LB |
702 | */ |
703 | static inline void acpi_idle_do_entry(struct acpi_processor_cx *cx) | |
704 | { | |
dcf30997 SR |
705 | /* Don't trace irqs off for idle */ |
706 | stop_critical_timings(); | |
bc71bec9 | 707 | if (cx->entry_method == ACPI_CSTATE_FFH) { |
4f86d3a8 LB |
708 | /* Call into architectural FFH based C-state */ |
709 | acpi_processor_ffh_cstate_enter(cx); | |
bc71bec9 | 710 | } else if (cx->entry_method == ACPI_CSTATE_HALT) { |
711 | acpi_safe_halt(); | |
4f86d3a8 | 712 | } else { |
4f86d3a8 LB |
713 | /* IO port based C-state */ |
714 | inb(cx->address); | |
715 | /* Dummy wait op - must do something useless after P_LVL2 read | |
716 | because chipsets cannot guarantee that STPCLK# signal | |
717 | gets asserted in time to freeze execution properly. */ | |
cfa806f0 | 718 | inl(acpi_gbl_FADT.xpm_timer_block.address); |
4f86d3a8 | 719 | } |
dcf30997 | 720 | start_critical_timings(); |
4f86d3a8 LB |
721 | } |
722 | ||
723 | /** | |
724 | * acpi_idle_enter_c1 - enters an ACPI C1 state-type | |
725 | * @dev: the target CPU | |
46bcfad7 | 726 | * @drv: cpuidle driver containing cpuidle state info |
e978aa7d | 727 | * @index: index of target state |
4f86d3a8 LB |
728 | * |
729 | * This is equivalent to the HALT instruction. | |
730 | */ | |
731 | static int acpi_idle_enter_c1(struct cpuidle_device *dev, | |
46bcfad7 | 732 | struct cpuidle_driver *drv, int index) |
4f86d3a8 LB |
733 | { |
734 | struct acpi_processor *pr; | |
6240a10d | 735 | struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); |
9b12e18c | 736 | |
4a6f4fe8 | 737 | pr = __this_cpu_read(processors); |
4f86d3a8 LB |
738 | |
739 | if (unlikely(!pr)) | |
e978aa7d | 740 | return -EINVAL; |
4f86d3a8 | 741 | |
7e275cc4 | 742 | lapic_timer_state_broadcast(pr, cx, 1); |
bc71bec9 | 743 | acpi_idle_do_entry(cx); |
e978aa7d | 744 | |
7e275cc4 | 745 | lapic_timer_state_broadcast(pr, cx, 0); |
4f86d3a8 | 746 | |
e978aa7d | 747 | return index; |
4f86d3a8 LB |
748 | } |
749 | ||
1a022e3f BO |
750 | |
751 | /** | |
752 | * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining) | |
753 | * @dev: the target CPU | |
754 | * @index: the index of suggested state | |
755 | */ | |
756 | static int acpi_idle_play_dead(struct cpuidle_device *dev, int index) | |
757 | { | |
6240a10d | 758 | struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); |
1a022e3f BO |
759 | |
760 | ACPI_FLUSH_CPU_CACHE(); | |
761 | ||
762 | while (1) { | |
763 | ||
764 | if (cx->entry_method == ACPI_CSTATE_HALT) | |
54f70077 | 765 | safe_halt(); |
1a022e3f BO |
766 | else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) { |
767 | inb(cx->address); | |
768 | /* See comment in acpi_idle_do_entry() */ | |
769 | inl(acpi_gbl_FADT.xpm_timer_block.address); | |
770 | } else | |
771 | return -ENODEV; | |
772 | } | |
773 | ||
774 | /* Never reached */ | |
775 | return 0; | |
776 | } | |
777 | ||
4f86d3a8 LB |
778 | /** |
779 | * acpi_idle_enter_simple - enters an ACPI state without BM handling | |
780 | * @dev: the target CPU | |
46bcfad7 | 781 | * @drv: cpuidle driver with cpuidle state information |
e978aa7d | 782 | * @index: the index of suggested state |
4f86d3a8 LB |
783 | */ |
784 | static int acpi_idle_enter_simple(struct cpuidle_device *dev, | |
46bcfad7 | 785 | struct cpuidle_driver *drv, int index) |
4f86d3a8 LB |
786 | { |
787 | struct acpi_processor *pr; | |
6240a10d | 788 | struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); |
50629118 | 789 | |
4a6f4fe8 | 790 | pr = __this_cpu_read(processors); |
4f86d3a8 LB |
791 | |
792 | if (unlikely(!pr)) | |
e978aa7d | 793 | return -EINVAL; |
e196441b | 794 | |
d306ebc2 PV |
795 | if (cx->entry_method != ACPI_CSTATE_FFH) { |
796 | current_thread_info()->status &= ~TS_POLLING; | |
797 | /* | |
798 | * TS_POLLING-cleared state must be visible before we test | |
799 | * NEED_RESCHED: | |
800 | */ | |
801 | smp_mb(); | |
4f86d3a8 | 802 | |
02cf4f98 LB |
803 | if (unlikely(need_resched())) { |
804 | current_thread_info()->status |= TS_POLLING; | |
e978aa7d | 805 | return -EINVAL; |
02cf4f98 | 806 | } |
4f86d3a8 LB |
807 | } |
808 | ||
e17bcb43 TG |
809 | /* |
810 | * Must be done before busmaster disable as we might need to | |
811 | * access HPET ! | |
812 | */ | |
7e275cc4 | 813 | lapic_timer_state_broadcast(pr, cx, 1); |
e17bcb43 | 814 | |
4f86d3a8 LB |
815 | if (cx->type == ACPI_STATE_C3) |
816 | ACPI_FLUSH_CPU_CACHE(); | |
817 | ||
50629118 VP |
818 | /* Tell the scheduler that we are going deep-idle: */ |
819 | sched_clock_idle_sleep_event(); | |
4f86d3a8 | 820 | acpi_idle_do_entry(cx); |
4f86d3a8 | 821 | |
a474a515 | 822 | sched_clock_idle_wakeup_event(0); |
e978aa7d | 823 | |
02cf4f98 LB |
824 | if (cx->entry_method != ACPI_CSTATE_FFH) |
825 | current_thread_info()->status |= TS_POLLING; | |
4f86d3a8 | 826 | |
7e275cc4 | 827 | lapic_timer_state_broadcast(pr, cx, 0); |
e978aa7d | 828 | return index; |
4f86d3a8 LB |
829 | } |
830 | ||
831 | static int c3_cpu_count; | |
e12f65f7 | 832 | static DEFINE_RAW_SPINLOCK(c3_lock); |
4f86d3a8 LB |
833 | |
834 | /** | |
835 | * acpi_idle_enter_bm - enters C3 with proper BM handling | |
836 | * @dev: the target CPU | |
46bcfad7 | 837 | * @drv: cpuidle driver containing state data |
e978aa7d | 838 | * @index: the index of suggested state |
4f86d3a8 LB |
839 | * |
840 | * If BM is detected, the deepest non-C3 idle state is entered instead. | |
841 | */ | |
842 | static int acpi_idle_enter_bm(struct cpuidle_device *dev, | |
46bcfad7 | 843 | struct cpuidle_driver *drv, int index) |
4f86d3a8 LB |
844 | { |
845 | struct acpi_processor *pr; | |
6240a10d | 846 | struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); |
50629118 | 847 | |
4a6f4fe8 | 848 | pr = __this_cpu_read(processors); |
4f86d3a8 LB |
849 | |
850 | if (unlikely(!pr)) | |
e978aa7d | 851 | return -EINVAL; |
4f86d3a8 | 852 | |
718be4aa | 853 | if (!cx->bm_sts_skip && acpi_idle_bm_check()) { |
46bcfad7 DD |
854 | if (drv->safe_state_index >= 0) { |
855 | return drv->states[drv->safe_state_index].enter(dev, | |
856 | drv, drv->safe_state_index); | |
ddc081a1 | 857 | } else { |
8651f97b | 858 | acpi_safe_halt(); |
75cc5235 | 859 | return -EBUSY; |
ddc081a1 VP |
860 | } |
861 | } | |
862 | ||
d306ebc2 PV |
863 | if (cx->entry_method != ACPI_CSTATE_FFH) { |
864 | current_thread_info()->status &= ~TS_POLLING; | |
865 | /* | |
866 | * TS_POLLING-cleared state must be visible before we test | |
867 | * NEED_RESCHED: | |
868 | */ | |
869 | smp_mb(); | |
4f86d3a8 | 870 | |
02cf4f98 LB |
871 | if (unlikely(need_resched())) { |
872 | current_thread_info()->status |= TS_POLLING; | |
e978aa7d | 873 | return -EINVAL; |
02cf4f98 | 874 | } |
4f86d3a8 LB |
875 | } |
876 | ||
996520c1 VP |
877 | acpi_unlazy_tlb(smp_processor_id()); |
878 | ||
50629118 VP |
879 | /* Tell the scheduler that we are going deep-idle: */ |
880 | sched_clock_idle_sleep_event(); | |
4f86d3a8 LB |
881 | /* |
882 | * Must be done before busmaster disable as we might need to | |
883 | * access HPET ! | |
884 | */ | |
7e275cc4 | 885 | lapic_timer_state_broadcast(pr, cx, 1); |
4f86d3a8 | 886 | |
ddc081a1 VP |
887 | /* |
888 | * disable bus master | |
889 | * bm_check implies we need ARB_DIS | |
890 | * !bm_check implies we need cache flush | |
891 | * bm_control implies whether we can do ARB_DIS | |
892 | * | |
893 | * That leaves a case where bm_check is set and bm_control is | |
894 | * not set. In that case we cannot do much, we enter C3 | |
895 | * without doing anything. | |
896 | */ | |
897 | if (pr->flags.bm_check && pr->flags.bm_control) { | |
e12f65f7 | 898 | raw_spin_lock(&c3_lock); |
4f86d3a8 LB |
899 | c3_cpu_count++; |
900 | /* Disable bus master arbitration when all CPUs are in C3 */ | |
901 | if (c3_cpu_count == num_online_cpus()) | |
50ffba1b | 902 | acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1); |
e12f65f7 | 903 | raw_spin_unlock(&c3_lock); |
ddc081a1 VP |
904 | } else if (!pr->flags.bm_check) { |
905 | ACPI_FLUSH_CPU_CACHE(); | |
906 | } | |
4f86d3a8 | 907 | |
ddc081a1 | 908 | acpi_idle_do_entry(cx); |
4f86d3a8 | 909 | |
ddc081a1 VP |
910 | /* Re-enable bus master arbitration */ |
911 | if (pr->flags.bm_check && pr->flags.bm_control) { | |
e12f65f7 | 912 | raw_spin_lock(&c3_lock); |
50ffba1b | 913 | acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0); |
4f86d3a8 | 914 | c3_cpu_count--; |
e12f65f7 | 915 | raw_spin_unlock(&c3_lock); |
4f86d3a8 | 916 | } |
e978aa7d | 917 | |
a474a515 | 918 | sched_clock_idle_wakeup_event(0); |
4f86d3a8 | 919 | |
02cf4f98 LB |
920 | if (cx->entry_method != ACPI_CSTATE_FFH) |
921 | current_thread_info()->status |= TS_POLLING; | |
4f86d3a8 | 922 | |
7e275cc4 | 923 | lapic_timer_state_broadcast(pr, cx, 0); |
e978aa7d | 924 | return index; |
4f86d3a8 LB |
925 | } |
926 | ||
927 | struct cpuidle_driver acpi_idle_driver = { | |
928 | .name = "acpi_idle", | |
929 | .owner = THIS_MODULE, | |
930 | }; | |
931 | ||
932 | /** | |
46bcfad7 DD |
933 | * acpi_processor_setup_cpuidle_cx - prepares and configures CPUIDLE |
934 | * device i.e. per-cpu data | |
935 | * | |
4f86d3a8 | 936 | * @pr: the ACPI processor |
6ef0f086 | 937 | * @dev : the cpuidle device |
4f86d3a8 | 938 | */ |
6ef0f086 DL |
939 | static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr, |
940 | struct cpuidle_device *dev) | |
4f86d3a8 | 941 | { |
9a0b8415 | 942 | int i, count = CPUIDLE_DRIVER_STATE_START; |
4f86d3a8 | 943 | struct acpi_processor_cx *cx; |
4f86d3a8 LB |
944 | |
945 | if (!pr->flags.power_setup_done) | |
946 | return -EINVAL; | |
947 | ||
948 | if (pr->flags.power == 0) { | |
949 | return -EINVAL; | |
950 | } | |
951 | ||
b88a634a KRW |
952 | if (!dev) |
953 | return -EINVAL; | |
954 | ||
dcb84f33 | 955 | dev->cpu = pr->id; |
4fcb2fcd | 956 | |
615dfd93 LB |
957 | if (max_cstate == 0) |
958 | max_cstate = 1; | |
959 | ||
4f86d3a8 LB |
960 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { |
961 | cx = &pr->power.states[i]; | |
4f86d3a8 LB |
962 | |
963 | if (!cx->valid) | |
964 | continue; | |
965 | ||
966 | #ifdef CONFIG_HOTPLUG_CPU | |
967 | if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) && | |
968 | !pr->flags.has_cst && | |
969 | !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) | |
970 | continue; | |
1fec74a9 | 971 | #endif |
6240a10d | 972 | per_cpu(acpi_cstate[count], dev->cpu) = cx; |
4f86d3a8 | 973 | |
46bcfad7 DD |
974 | count++; |
975 | if (count == CPUIDLE_STATE_MAX) | |
976 | break; | |
977 | } | |
978 | ||
979 | dev->state_count = count; | |
980 | ||
981 | if (!count) | |
982 | return -EINVAL; | |
983 | ||
984 | return 0; | |
985 | } | |
986 | ||
987 | /** | |
988 | * acpi_processor_setup_cpuidle states- prepares and configures cpuidle | |
989 | * global state data i.e. idle routines | |
990 | * | |
991 | * @pr: the ACPI processor | |
992 | */ | |
993 | static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr) | |
994 | { | |
995 | int i, count = CPUIDLE_DRIVER_STATE_START; | |
996 | struct acpi_processor_cx *cx; | |
997 | struct cpuidle_state *state; | |
998 | struct cpuidle_driver *drv = &acpi_idle_driver; | |
999 | ||
1000 | if (!pr->flags.power_setup_done) | |
1001 | return -EINVAL; | |
1002 | ||
1003 | if (pr->flags.power == 0) | |
1004 | return -EINVAL; | |
1005 | ||
1006 | drv->safe_state_index = -1; | |
4fcb2fcd | 1007 | for (i = 0; i < CPUIDLE_STATE_MAX; i++) { |
46bcfad7 DD |
1008 | drv->states[i].name[0] = '\0'; |
1009 | drv->states[i].desc[0] = '\0'; | |
4fcb2fcd VP |
1010 | } |
1011 | ||
615dfd93 LB |
1012 | if (max_cstate == 0) |
1013 | max_cstate = 1; | |
1014 | ||
4f86d3a8 LB |
1015 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { |
1016 | cx = &pr->power.states[i]; | |
4f86d3a8 LB |
1017 | |
1018 | if (!cx->valid) | |
1019 | continue; | |
1020 | ||
1021 | #ifdef CONFIG_HOTPLUG_CPU | |
1022 | if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) && | |
1023 | !pr->flags.has_cst && | |
1024 | !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) | |
1025 | continue; | |
1fec74a9 | 1026 | #endif |
4f86d3a8 | 1027 | |
46bcfad7 | 1028 | state = &drv->states[count]; |
4f86d3a8 | 1029 | snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i); |
4fcb2fcd | 1030 | strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN); |
4f86d3a8 | 1031 | state->exit_latency = cx->latency; |
4963f620 | 1032 | state->target_residency = cx->latency * latency_factor; |
4f86d3a8 LB |
1033 | |
1034 | state->flags = 0; | |
1035 | switch (cx->type) { | |
1036 | case ACPI_STATE_C1: | |
8e92b660 VP |
1037 | if (cx->entry_method == ACPI_CSTATE_FFH) |
1038 | state->flags |= CPUIDLE_FLAG_TIME_VALID; | |
1039 | ||
4f86d3a8 | 1040 | state->enter = acpi_idle_enter_c1; |
1a022e3f | 1041 | state->enter_dead = acpi_idle_play_dead; |
46bcfad7 | 1042 | drv->safe_state_index = count; |
4f86d3a8 LB |
1043 | break; |
1044 | ||
1045 | case ACPI_STATE_C2: | |
4f86d3a8 LB |
1046 | state->flags |= CPUIDLE_FLAG_TIME_VALID; |
1047 | state->enter = acpi_idle_enter_simple; | |
1a022e3f | 1048 | state->enter_dead = acpi_idle_play_dead; |
46bcfad7 | 1049 | drv->safe_state_index = count; |
4f86d3a8 LB |
1050 | break; |
1051 | ||
1052 | case ACPI_STATE_C3: | |
4f86d3a8 | 1053 | state->flags |= CPUIDLE_FLAG_TIME_VALID; |
4f86d3a8 LB |
1054 | state->enter = pr->flags.bm_check ? |
1055 | acpi_idle_enter_bm : | |
1056 | acpi_idle_enter_simple; | |
1057 | break; | |
1058 | } | |
1059 | ||
1060 | count++; | |
9a0b8415 | 1061 | if (count == CPUIDLE_STATE_MAX) |
1062 | break; | |
4f86d3a8 LB |
1063 | } |
1064 | ||
46bcfad7 | 1065 | drv->state_count = count; |
4f86d3a8 LB |
1066 | |
1067 | if (!count) | |
1068 | return -EINVAL; | |
1069 | ||
4f86d3a8 LB |
1070 | return 0; |
1071 | } | |
1072 | ||
46bcfad7 | 1073 | int acpi_processor_hotplug(struct acpi_processor *pr) |
4f86d3a8 | 1074 | { |
dcb84f33 | 1075 | int ret = 0; |
e8b1b59d | 1076 | struct cpuidle_device *dev; |
4f86d3a8 | 1077 | |
d1896049 | 1078 | if (disabled_by_idle_boot_param()) |
36a91358 VP |
1079 | return 0; |
1080 | ||
4f86d3a8 LB |
1081 | if (!pr) |
1082 | return -EINVAL; | |
1083 | ||
1084 | if (nocst) { | |
1085 | return -ENODEV; | |
1086 | } | |
1087 | ||
1088 | if (!pr->flags.power_setup_done) | |
1089 | return -ENODEV; | |
1090 | ||
e8b1b59d | 1091 | dev = per_cpu(acpi_cpuidle_device, pr->id); |
4f86d3a8 | 1092 | cpuidle_pause_and_lock(); |
3d339dcb | 1093 | cpuidle_disable_device(dev); |
4f86d3a8 | 1094 | acpi_processor_get_power_info(pr); |
dcb84f33 | 1095 | if (pr->flags.power) { |
6ef0f086 | 1096 | acpi_processor_setup_cpuidle_cx(pr, dev); |
3d339dcb | 1097 | ret = cpuidle_enable_device(dev); |
dcb84f33 | 1098 | } |
4f86d3a8 LB |
1099 | cpuidle_resume_and_unlock(); |
1100 | ||
1101 | return ret; | |
1102 | } | |
1103 | ||
46bcfad7 DD |
1104 | int acpi_processor_cst_has_changed(struct acpi_processor *pr) |
1105 | { | |
1106 | int cpu; | |
1107 | struct acpi_processor *_pr; | |
3d339dcb | 1108 | struct cpuidle_device *dev; |
46bcfad7 DD |
1109 | |
1110 | if (disabled_by_idle_boot_param()) | |
1111 | return 0; | |
1112 | ||
1113 | if (!pr) | |
1114 | return -EINVAL; | |
1115 | ||
1116 | if (nocst) | |
1117 | return -ENODEV; | |
1118 | ||
1119 | if (!pr->flags.power_setup_done) | |
1120 | return -ENODEV; | |
1121 | ||
1122 | /* | |
1123 | * FIXME: Design the ACPI notification to make it once per | |
1124 | * system instead of once per-cpu. This condition is a hack | |
1125 | * to make the code that updates C-States be called once. | |
1126 | */ | |
1127 | ||
9505626d | 1128 | if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) { |
46bcfad7 DD |
1129 | |
1130 | cpuidle_pause_and_lock(); | |
1131 | /* Protect against cpu-hotplug */ | |
1132 | get_online_cpus(); | |
1133 | ||
1134 | /* Disable all cpuidle devices */ | |
1135 | for_each_online_cpu(cpu) { | |
1136 | _pr = per_cpu(processors, cpu); | |
1137 | if (!_pr || !_pr->flags.power_setup_done) | |
1138 | continue; | |
3d339dcb DL |
1139 | dev = per_cpu(acpi_cpuidle_device, cpu); |
1140 | cpuidle_disable_device(dev); | |
46bcfad7 DD |
1141 | } |
1142 | ||
1143 | /* Populate Updated C-state information */ | |
f427e5f1 | 1144 | acpi_processor_get_power_info(pr); |
46bcfad7 DD |
1145 | acpi_processor_setup_cpuidle_states(pr); |
1146 | ||
1147 | /* Enable all cpuidle devices */ | |
1148 | for_each_online_cpu(cpu) { | |
1149 | _pr = per_cpu(processors, cpu); | |
1150 | if (!_pr || !_pr->flags.power_setup_done) | |
1151 | continue; | |
1152 | acpi_processor_get_power_info(_pr); | |
1153 | if (_pr->flags.power) { | |
3d339dcb | 1154 | dev = per_cpu(acpi_cpuidle_device, cpu); |
6ef0f086 | 1155 | acpi_processor_setup_cpuidle_cx(_pr, dev); |
3d339dcb | 1156 | cpuidle_enable_device(dev); |
46bcfad7 DD |
1157 | } |
1158 | } | |
1159 | put_online_cpus(); | |
1160 | cpuidle_resume_and_unlock(); | |
1161 | } | |
1162 | ||
1163 | return 0; | |
1164 | } | |
1165 | ||
1166 | static int acpi_processor_registered; | |
1167 | ||
38a991b6 | 1168 | int __cpuinit acpi_processor_power_init(struct acpi_processor *pr) |
1da177e4 | 1169 | { |
4be44fcd | 1170 | acpi_status status = 0; |
46bcfad7 | 1171 | int retval; |
3d339dcb | 1172 | struct cpuidle_device *dev; |
b6835052 | 1173 | static int first_run; |
1da177e4 | 1174 | |
d1896049 | 1175 | if (disabled_by_idle_boot_param()) |
36a91358 | 1176 | return 0; |
1da177e4 LT |
1177 | |
1178 | if (!first_run) { | |
1179 | dmi_check_system(processor_power_dmi_table); | |
c1c30634 | 1180 | max_cstate = acpi_processor_cstate_check(max_cstate); |
1da177e4 | 1181 | if (max_cstate < ACPI_C_STATES_MAX) |
4be44fcd LB |
1182 | printk(KERN_NOTICE |
1183 | "ACPI: processor limited to max C-state %d\n", | |
1184 | max_cstate); | |
1da177e4 LT |
1185 | first_run++; |
1186 | } | |
1187 | ||
02df8b93 | 1188 | if (!pr) |
d550d98d | 1189 | return -EINVAL; |
02df8b93 | 1190 | |
cee324b1 | 1191 | if (acpi_gbl_FADT.cst_control && !nocst) { |
4be44fcd | 1192 | status = |
cee324b1 | 1193 | acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8); |
1da177e4 | 1194 | if (ACPI_FAILURE(status)) { |
a6fc6720 TR |
1195 | ACPI_EXCEPTION((AE_INFO, status, |
1196 | "Notifying BIOS of _CST ability failed")); | |
1da177e4 LT |
1197 | } |
1198 | } | |
1199 | ||
1200 | acpi_processor_get_power_info(pr); | |
4f86d3a8 | 1201 | pr->flags.power_setup_done = 1; |
1da177e4 LT |
1202 | |
1203 | /* | |
1204 | * Install the idle handler if processor power management is supported. | |
1205 | * Note that we use previously set idle handler will be used on | |
1206 | * platforms that only support C1. | |
1207 | */ | |
36a91358 | 1208 | if (pr->flags.power) { |
46bcfad7 DD |
1209 | /* Register acpi_idle_driver if not already registered */ |
1210 | if (!acpi_processor_registered) { | |
1211 | acpi_processor_setup_cpuidle_states(pr); | |
1212 | retval = cpuidle_register_driver(&acpi_idle_driver); | |
1213 | if (retval) | |
1214 | return retval; | |
1215 | printk(KERN_DEBUG "ACPI: %s registered with cpuidle\n", | |
1216 | acpi_idle_driver.name); | |
1217 | } | |
3d339dcb DL |
1218 | |
1219 | dev = kzalloc(sizeof(*dev), GFP_KERNEL); | |
1220 | if (!dev) | |
1221 | return -ENOMEM; | |
1222 | per_cpu(acpi_cpuidle_device, pr->id) = dev; | |
1223 | ||
6ef0f086 | 1224 | acpi_processor_setup_cpuidle_cx(pr, dev); |
3d339dcb | 1225 | |
46bcfad7 DD |
1226 | /* Register per-cpu cpuidle_device. Cpuidle driver |
1227 | * must already be registered before registering device | |
1228 | */ | |
3d339dcb | 1229 | retval = cpuidle_register_device(dev); |
46bcfad7 DD |
1230 | if (retval) { |
1231 | if (acpi_processor_registered == 0) | |
1232 | cpuidle_unregister_driver(&acpi_idle_driver); | |
1233 | return retval; | |
1234 | } | |
1235 | acpi_processor_registered++; | |
1da177e4 | 1236 | } |
d550d98d | 1237 | return 0; |
1da177e4 LT |
1238 | } |
1239 | ||
38a991b6 | 1240 | int acpi_processor_power_exit(struct acpi_processor *pr) |
1da177e4 | 1241 | { |
3d339dcb DL |
1242 | struct cpuidle_device *dev = per_cpu(acpi_cpuidle_device, pr->id); |
1243 | ||
d1896049 | 1244 | if (disabled_by_idle_boot_param()) |
36a91358 VP |
1245 | return 0; |
1246 | ||
46bcfad7 | 1247 | if (pr->flags.power) { |
3d339dcb | 1248 | cpuidle_unregister_device(dev); |
46bcfad7 DD |
1249 | acpi_processor_registered--; |
1250 | if (acpi_processor_registered == 0) | |
1251 | cpuidle_unregister_driver(&acpi_idle_driver); | |
1252 | } | |
1da177e4 | 1253 | |
46bcfad7 | 1254 | pr->flags.power_setup_done = 0; |
d550d98d | 1255 | return 0; |
1da177e4 | 1256 | } |