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mtip32xx: remove unused variable 'port->allocated'
[mirror_ubuntu-artful-kernel.git] / drivers / block / mtip32xx / mtip32xx.c
CommitLineData
88523a61
SB
1/*
2 * Driver for the Micron P320 SSD
3 * Copyright (C) 2011 Micron Technology, Inc.
4 *
5 * Portions of this code were derived from works subjected to the
6 * following copyright:
7 * Copyright (C) 2009 Integrated Device Technology, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 */
20
21#include <linux/pci.h>
22#include <linux/interrupt.h>
23#include <linux/ata.h>
24#include <linux/delay.h>
25#include <linux/hdreg.h>
26#include <linux/uaccess.h>
27#include <linux/random.h>
28#include <linux/smp.h>
29#include <linux/compat.h>
30#include <linux/fs.h>
0e838c62 31#include <linux/module.h>
88523a61
SB
32#include <linux/genhd.h>
33#include <linux/blkdev.h>
ffc771b3 34#include <linux/blk-mq.h>
88523a61
SB
35#include <linux/bio.h>
36#include <linux/dma-mapping.h>
37#include <linux/idr.h>
60ec0eec 38#include <linux/kthread.h>
88523a61 39#include <../drivers/ata/ahci.h>
45038367 40#include <linux/export.h>
7b421d24 41#include <linux/debugfs.h>
f45c40a9 42#include <linux/prefetch.h>
88523a61
SB
43#include "mtip32xx.h"
44
45#define HW_CMD_SLOT_SZ (MTIP_MAX_COMMAND_SLOTS * 32)
188b9f49
SB
46
47/* DMA region containing RX Fis, Identify, RLE10, and SMART buffers */
48#define AHCI_RX_FIS_SZ 0x100
49#define AHCI_RX_FIS_OFFSET 0x0
50#define AHCI_IDFY_SZ ATA_SECT_SIZE
51#define AHCI_IDFY_OFFSET 0x400
52#define AHCI_SECTBUF_SZ ATA_SECT_SIZE
53#define AHCI_SECTBUF_OFFSET 0x800
54#define AHCI_SMARTBUF_SZ ATA_SECT_SIZE
55#define AHCI_SMARTBUF_OFFSET 0xC00
56/* 0x100 + 0x200 + 0x200 + 0x200 is smaller than 4k but we pad it out */
57#define BLOCK_DMA_ALLOC_SZ 4096
58
59/* DMA region containing command table (should be 8192 bytes) */
60#define AHCI_CMD_SLOT_SZ sizeof(struct mtip_cmd_hdr)
61#define AHCI_CMD_TBL_SZ (MTIP_MAX_COMMAND_SLOTS * AHCI_CMD_SLOT_SZ)
62#define AHCI_CMD_TBL_OFFSET 0x0
63
64/* DMA region per command (contains header and SGL) */
65#define AHCI_CMD_TBL_HDR_SZ 0x80
66#define AHCI_CMD_TBL_HDR_OFFSET 0x0
67#define AHCI_CMD_TBL_SGL_SZ (MTIP_MAX_SG * sizeof(struct mtip_cmd_sg))
68#define AHCI_CMD_TBL_SGL_OFFSET AHCI_CMD_TBL_HDR_SZ
69#define CMD_DMA_ALLOC_SZ (AHCI_CMD_TBL_SGL_SZ + AHCI_CMD_TBL_HDR_SZ)
70
88523a61 71
45038367 72#define HOST_CAP_NZDMA (1 << 19)
88523a61
SB
73#define HOST_HSORG 0xFC
74#define HSORG_DISABLE_SLOTGRP_INTR (1<<24)
75#define HSORG_DISABLE_SLOTGRP_PXIS (1<<16)
76#define HSORG_HWREV 0xFF00
77#define HSORG_STYLE 0x8
78#define HSORG_SLOTGROUPS 0x7
79
80#define PORT_COMMAND_ISSUE 0x38
81#define PORT_SDBV 0x7C
82
83#define PORT_OFFSET 0x100
84#define PORT_MEM_SIZE 0x80
85
86#define PORT_IRQ_ERR \
87 (PORT_IRQ_HBUS_ERR | PORT_IRQ_IF_ERR | PORT_IRQ_CONNECT | \
88 PORT_IRQ_PHYRDY | PORT_IRQ_UNK_FIS | PORT_IRQ_BAD_PMP | \
89 PORT_IRQ_TF_ERR | PORT_IRQ_HBUS_DATA_ERR | PORT_IRQ_IF_NONFATAL | \
90 PORT_IRQ_OVERFLOW)
91#define PORT_IRQ_LEGACY \
92 (PORT_IRQ_PIOS_FIS | PORT_IRQ_D2H_REG_FIS)
93#define PORT_IRQ_HANDLED \
94 (PORT_IRQ_SDB_FIS | PORT_IRQ_LEGACY | \
95 PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR | \
96 PORT_IRQ_CONNECT | PORT_IRQ_PHYRDY)
97#define DEF_PORT_IRQ \
98 (PORT_IRQ_ERR | PORT_IRQ_LEGACY | PORT_IRQ_SDB_FIS)
99
100/* product numbers */
101#define MTIP_PRODUCT_UNKNOWN 0x00
102#define MTIP_PRODUCT_ASICFPGA 0x11
103
104/* Device instance number, incremented each time a device is probed. */
105static int instance;
106
0caff003
AT
107struct list_head online_list;
108struct list_head removing_list;
109spinlock_t dev_lock;
110
88523a61
SB
111/*
112 * Global variable used to hold the major block device number
113 * allocated in mtip_init().
114 */
3ff147d3 115static int mtip_major;
7b421d24 116static struct dentry *dfs_parent;
0caff003 117static struct dentry *dfs_device_status;
88523a61 118
16c906e5
AT
119static u32 cpu_use[NR_CPUS];
120
88523a61
SB
121static DEFINE_SPINLOCK(rssd_index_lock);
122static DEFINE_IDA(rssd_index_ida);
123
62ee8c13
AT
124static int mtip_block_initialize(struct driver_data *dd);
125
16d02c04 126#ifdef CONFIG_COMPAT
88523a61
SB
127struct mtip_compat_ide_task_request_s {
128 __u8 io_ports[8];
129 __u8 hob_ports[8];
130 ide_reg_valid_t out_flags;
131 ide_reg_valid_t in_flags;
132 int data_phase;
133 int req_cmd;
134 compat_ulong_t out_size;
135 compat_ulong_t in_size;
136};
16d02c04 137#endif
88523a61 138
6316668f
JA
139/*
140 * This function check_for_surprise_removal is called
141 * while card is removed from the system and it will
142 * read the vendor id from the configration space
143 *
144 * @pdev Pointer to the pci_dev structure.
145 *
146 * return value
147 * true if device removed, else false
148 */
149static bool mtip_check_surprise_removal(struct pci_dev *pdev)
150{
151 u16 vendor_id = 0;
8f8b8995
AT
152 struct driver_data *dd = pci_get_drvdata(pdev);
153
154 if (dd->sr)
155 return true;
6316668f
JA
156
157 /* Read the vendorID from the configuration space */
158 pci_read_config_word(pdev, 0x00, &vendor_id);
8f8b8995
AT
159 if (vendor_id == 0xFFFF) {
160 dd->sr = true;
161 if (dd->queue)
162 set_bit(QUEUE_FLAG_DEAD, &dd->queue->queue_flags);
163 else
164 dev_warn(&dd->pdev->dev,
165 "%s: dd->queue is NULL\n", __func__);
166 if (dd->port) {
167 set_bit(MTIP_PF_SR_CLEANUP_BIT, &dd->port->flags);
168 wake_up_interruptible(&dd->port->svc_wait);
169 } else
170 dev_warn(&dd->pdev->dev,
171 "%s: dd->port is NULL\n", __func__);
6316668f 172 return true; /* device removed */
6316668f
JA
173 }
174
8f8b8995 175 return false; /* device present */
6316668f
JA
176}
177
ffc771b3 178static struct mtip_cmd *mtip_get_int_command(struct driver_data *dd)
88523a61 179{
ffc771b3 180 struct request *rq;
88523a61 181
61789765 182 rq = blk_mq_alloc_request(dd->queue, 0, __GFP_WAIT, true);
ffc771b3
JA
183 return blk_mq_rq_to_pdu(rq);
184}
88523a61 185
ffc771b3
JA
186static void mtip_put_int_command(struct driver_data *dd, struct mtip_cmd *cmd)
187{
188 blk_put_request(blk_mq_rq_from_pdu(cmd));
88523a61
SB
189}
190
191/*
ffc771b3 192 * Once we add support for one hctx per mtip group, this will change a bit
88523a61 193 */
ffc771b3
JA
194static struct request *mtip_rq_from_tag(struct driver_data *dd,
195 unsigned int tag)
196{
0e62f51f
JA
197 struct blk_mq_hw_ctx *hctx = dd->queue->queue_hw_ctx[0];
198
199 return blk_mq_tag_to_rq(hctx->tags, tag);
ffc771b3
JA
200}
201
202static struct mtip_cmd *mtip_cmd_from_tag(struct driver_data *dd,
203 unsigned int tag)
88523a61 204{
ffc771b3
JA
205 struct request *rq = mtip_rq_from_tag(dd, tag);
206
207 return blk_mq_rq_to_pdu(rq);
88523a61
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208}
209
8f8b8995
AT
210/*
211 * IO completion function.
212 *
213 * This completion function is called by the driver ISR when a
214 * command that was issued by the kernel completes. It first calls the
215 * asynchronous completion function which normally calls back into the block
216 * layer passing the asynchronous callback data, then unmaps the
217 * scatter list associated with the completed command, and finally
218 * clears the allocated bit associated with the completed command.
219 *
220 * @port Pointer to the port data structure.
221 * @tag Tag of the command.
222 * @data Pointer to driver_data.
223 * @status Completion status.
224 *
225 * return value
226 * None
227 */
228static void mtip_async_complete(struct mtip_port *port,
ffc771b3 229 int tag, struct mtip_cmd *cmd, int status)
8f8b8995 230{
ffc771b3
JA
231 struct driver_data *dd = port->dd;
232 struct request *rq;
8f8b8995
AT
233
234 if (unlikely(!dd) || unlikely(!port))
235 return;
236
8f8b8995
AT
237 if (unlikely(status == PORT_IRQ_TF_ERR)) {
238 dev_warn(&port->dd->pdev->dev,
239 "Command tag %d failed due to TFE\n", tag);
240 }
241
ffc771b3
JA
242 /* Unmap the DMA scatter list entries */
243 dma_unmap_sg(&dd->pdev->dev, cmd->sg, cmd->scatter_ents, cmd->direction);
8f8b8995 244
ffc771b3 245 rq = mtip_rq_from_tag(dd, tag);
8f8b8995 246
ffc771b3
JA
247 if (unlikely(cmd->unaligned))
248 up(&port->cmd_slot_unal);
8f8b8995 249
c8a446ad 250 blk_mq_end_request(rq, status ? -EIO : 0);
8f8b8995
AT
251}
252
88523a61 253/*
6316668f 254 * Reset the HBA (without sleeping)
88523a61 255 *
6316668f 256 * @dd Pointer to the driver data structure.
88523a61
SB
257 *
258 * return value
6316668f
JA
259 * 0 The reset was successful.
260 * -1 The HBA Reset bit did not clear.
88523a61 261 */
d0d096b1 262static int mtip_hba_reset(struct driver_data *dd)
88523a61 263{
6316668f 264 unsigned long timeout;
88523a61 265
6316668f
JA
266 /* Set the reset bit */
267 writel(HOST_RESET, dd->mmio + HOST_CTL);
88523a61 268
6316668f
JA
269 /* Flush */
270 readl(dd->mmio + HOST_CTL);
88523a61 271
d0d096b1
AT
272 /* Spin for up to 2 seconds, waiting for reset acknowledgement */
273 timeout = jiffies + msecs_to_jiffies(2000);
274 do {
275 mdelay(10);
276 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))
277 return -1;
88523a61 278
d0d096b1
AT
279 } while ((readl(dd->mmio + HOST_CTL) & HOST_RESET)
280 && time_before(jiffies, timeout));
45038367 281
6316668f
JA
282 if (readl(dd->mmio + HOST_CTL) & HOST_RESET)
283 return -1;
88523a61 284
6316668f 285 return 0;
88523a61
SB
286}
287
288/*
6316668f 289 * Issue a command to the hardware.
88523a61 290 *
6316668f
JA
291 * Set the appropriate bit in the s_active and Command Issue hardware
292 * registers, causing hardware command processing to begin.
88523a61 293 *
6316668f
JA
294 * @port Pointer to the port structure.
295 * @tag The tag of the command to be issued.
88523a61
SB
296 *
297 * return value
6316668f 298 * None
88523a61 299 */
6316668f 300static inline void mtip_issue_ncq_command(struct mtip_port *port, int tag)
88523a61 301{
16c906e5 302 int group = tag >> 5;
88523a61 303
16c906e5
AT
304 /* guard SACT and CI registers */
305 spin_lock(&port->cmd_issue_lock[group]);
6316668f
JA
306 writel((1 << MTIP_TAG_BIT(tag)),
307 port->s_active[MTIP_TAG_INDEX(tag)]);
308 writel((1 << MTIP_TAG_BIT(tag)),
309 port->cmd_issue[MTIP_TAG_INDEX(tag)]);
16c906e5 310 spin_unlock(&port->cmd_issue_lock[group]);
88523a61
SB
311}
312
313/*
314 * Enable/disable the reception of FIS
315 *
316 * @port Pointer to the port data structure
317 * @enable 1 to enable, 0 to disable
318 *
319 * return value
320 * Previous state: 1 enabled, 0 disabled
321 */
322static int mtip_enable_fis(struct mtip_port *port, int enable)
323{
324 u32 tmp;
325
326 /* enable FIS reception */
327 tmp = readl(port->mmio + PORT_CMD);
328 if (enable)
329 writel(tmp | PORT_CMD_FIS_RX, port->mmio + PORT_CMD);
330 else
331 writel(tmp & ~PORT_CMD_FIS_RX, port->mmio + PORT_CMD);
332
333 /* Flush */
334 readl(port->mmio + PORT_CMD);
335
336 return (((tmp & PORT_CMD_FIS_RX) == PORT_CMD_FIS_RX));
337}
338
339/*
340 * Enable/disable the DMA engine
341 *
342 * @port Pointer to the port data structure
343 * @enable 1 to enable, 0 to disable
344 *
345 * return value
346 * Previous state: 1 enabled, 0 disabled.
347 */
348static int mtip_enable_engine(struct mtip_port *port, int enable)
349{
350 u32 tmp;
351
352 /* enable FIS reception */
353 tmp = readl(port->mmio + PORT_CMD);
354 if (enable)
355 writel(tmp | PORT_CMD_START, port->mmio + PORT_CMD);
356 else
357 writel(tmp & ~PORT_CMD_START, port->mmio + PORT_CMD);
358
359 readl(port->mmio + PORT_CMD);
360 return (((tmp & PORT_CMD_START) == PORT_CMD_START));
361}
362
363/*
364 * Enables the port DMA engine and FIS reception.
365 *
366 * return value
367 * None
368 */
369static inline void mtip_start_port(struct mtip_port *port)
370{
371 /* Enable FIS reception */
372 mtip_enable_fis(port, 1);
373
374 /* Enable the DMA engine */
375 mtip_enable_engine(port, 1);
376}
377
378/*
379 * Deinitialize a port by disabling port interrupts, the DMA engine,
380 * and FIS reception.
381 *
382 * @port Pointer to the port structure
383 *
384 * return value
385 * None
386 */
387static inline void mtip_deinit_port(struct mtip_port *port)
388{
389 /* Disable interrupts on this port */
390 writel(0, port->mmio + PORT_IRQ_MASK);
391
392 /* Disable the DMA engine */
393 mtip_enable_engine(port, 0);
394
395 /* Disable FIS reception */
396 mtip_enable_fis(port, 0);
397}
398
399/*
400 * Initialize a port.
401 *
402 * This function deinitializes the port by calling mtip_deinit_port() and
403 * then initializes it by setting the command header and RX FIS addresses,
404 * clearing the SError register and any pending port interrupts before
405 * re-enabling the default set of port interrupts.
406 *
407 * @port Pointer to the port structure.
408 *
409 * return value
410 * None
411 */
412static void mtip_init_port(struct mtip_port *port)
413{
414 int i;
415 mtip_deinit_port(port);
416
417 /* Program the command list base and FIS base addresses */
418 if (readl(port->dd->mmio + HOST_CAP) & HOST_CAP_64) {
419 writel((port->command_list_dma >> 16) >> 16,
420 port->mmio + PORT_LST_ADDR_HI);
421 writel((port->rxfis_dma >> 16) >> 16,
422 port->mmio + PORT_FIS_ADDR_HI);
423 }
424
60ec0eec 425 writel(port->command_list_dma & 0xFFFFFFFF,
88523a61 426 port->mmio + PORT_LST_ADDR);
60ec0eec 427 writel(port->rxfis_dma & 0xFFFFFFFF, port->mmio + PORT_FIS_ADDR);
88523a61
SB
428
429 /* Clear SError */
430 writel(readl(port->mmio + PORT_SCR_ERR), port->mmio + PORT_SCR_ERR);
431
6316668f
JA
432 /* reset the completed registers.*/
433 for (i = 0; i < port->dd->slot_groups; i++)
434 writel(0xFFFFFFFF, port->completed[i]);
88523a61 435
6316668f 436 /* Clear any pending interrupts for this port */
6bb688c0 437 writel(readl(port->mmio + PORT_IRQ_STAT), port->mmio + PORT_IRQ_STAT);
88523a61 438
22be2e6e
AT
439 /* Clear any pending interrupts on the HBA. */
440 writel(readl(port->dd->mmio + HOST_IRQ_STAT),
441 port->dd->mmio + HOST_IRQ_STAT);
442
6316668f
JA
443 /* Enable port interrupts */
444 writel(DEF_PORT_IRQ, port->mmio + PORT_IRQ_MASK);
88523a61
SB
445}
446
447/*
448 * Restart a port
449 *
450 * @port Pointer to the port data structure.
451 *
452 * return value
453 * None
454 */
6316668f 455static void mtip_restart_port(struct mtip_port *port)
88523a61
SB
456{
457 unsigned long timeout;
458
459 /* Disable the DMA engine */
460 mtip_enable_engine(port, 0);
461
462 /* Chip quirk: wait up to 500ms for PxCMD.CR == 0 */
463 timeout = jiffies + msecs_to_jiffies(500);
464 while ((readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON)
465 && time_before(jiffies, timeout))
466 ;
467
8a857a88 468 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
45038367
AT
469 return;
470
88523a61
SB
471 /*
472 * Chip quirk: escalate to hba reset if
473 * PxCMD.CR not clear after 500 ms
474 */
475 if (readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON) {
476 dev_warn(&port->dd->pdev->dev,
477 "PxCMD.CR not clear, escalating reset\n");
478
d0d096b1 479 if (mtip_hba_reset(port->dd))
88523a61
SB
480 dev_err(&port->dd->pdev->dev,
481 "HBA reset escalation failed.\n");
482
483 /* 30 ms delay before com reset to quiesce chip */
484 mdelay(30);
485 }
486
487 dev_warn(&port->dd->pdev->dev, "Issuing COM reset\n");
488
489 /* Set PxSCTL.DET */
490 writel(readl(port->mmio + PORT_SCR_CTL) |
491 1, port->mmio + PORT_SCR_CTL);
492 readl(port->mmio + PORT_SCR_CTL);
493
494 /* Wait 1 ms to quiesce chip function */
495 timeout = jiffies + msecs_to_jiffies(1);
496 while (time_before(jiffies, timeout))
497 ;
498
8a857a88 499 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
45038367
AT
500 return;
501
88523a61
SB
502 /* Clear PxSCTL.DET */
503 writel(readl(port->mmio + PORT_SCR_CTL) & ~1,
504 port->mmio + PORT_SCR_CTL);
505 readl(port->mmio + PORT_SCR_CTL);
506
507 /* Wait 500 ms for bit 0 of PORT_SCR_STS to be set */
508 timeout = jiffies + msecs_to_jiffies(500);
509 while (((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0)
510 && time_before(jiffies, timeout))
511 ;
512
8a857a88 513 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
45038367
AT
514 return;
515
88523a61
SB
516 if ((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0)
517 dev_warn(&port->dd->pdev->dev,
518 "COM reset failed\n");
519
22be2e6e
AT
520 mtip_init_port(port);
521 mtip_start_port(port);
88523a61 522
88523a61
SB
523}
524
d0d096b1
AT
525static int mtip_device_reset(struct driver_data *dd)
526{
527 int rv = 0;
528
529 if (mtip_check_surprise_removal(dd->pdev))
530 return 0;
531
532 if (mtip_hba_reset(dd) < 0)
533 rv = -EFAULT;
534
535 mdelay(1);
536 mtip_init_port(dd->port);
537 mtip_start_port(dd->port);
538
539 /* Enable interrupts on the HBA. */
540 writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
541 dd->mmio + HOST_CTL);
542 return rv;
543}
544
95fea2f1
AT
545/*
546 * Helper function for tag logging
547 */
548static void print_tags(struct driver_data *dd,
549 char *msg,
550 unsigned long *tagbits,
551 int cnt)
552{
553 unsigned char tagmap[128];
554 int group, tagmap_len = 0;
555
556 memset(tagmap, 0, sizeof(tagmap));
557 for (group = SLOTBITS_IN_LONGS; group > 0; group--)
ffc771b3 558 tagmap_len += sprintf(tagmap + tagmap_len, "%016lX ",
95fea2f1
AT
559 tagbits[group-1]);
560 dev_warn(&dd->pdev->dev,
561 "%d command(s) %s: tagmap [%s]", cnt, msg, tagmap);
562}
563
6316668f
JA
564/*
565 * Internal command completion callback function.
566 *
567 * This function is normally called by the driver ISR when an internal
568 * command completed. This function signals the command completion by
569 * calling complete().
570 *
571 * @port Pointer to the port data structure.
572 * @tag Tag of the command that has completed.
573 * @data Pointer to a completion structure.
574 * @status Completion status.
575 *
576 * return value
577 * None
578 */
579static void mtip_completion(struct mtip_port *port,
ffc771b3 580 int tag, struct mtip_cmd *command, int status)
6316668f 581{
ffc771b3 582 struct completion *waiting = command->comp_data;
6316668f
JA
583 if (unlikely(status == PORT_IRQ_TF_ERR))
584 dev_warn(&port->dd->pdev->dev,
585 "Internal command %d completed with TFE\n", tag);
586
6316668f
JA
587 complete(waiting);
588}
589
8182b495 590static void mtip_null_completion(struct mtip_port *port,
ffc771b3 591 int tag, struct mtip_cmd *command, int status)
8182b495 592{
8182b495
AT
593}
594
f6587217
AT
595static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer,
596 dma_addr_t buffer_dma, unsigned int sectors);
597static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id,
598 struct smart_attr *attrib);
88523a61
SB
599/*
600 * Handle an error.
601 *
602 * @dd Pointer to the DRIVER_DATA structure.
603 *
604 * return value
605 * None
606 */
607static void mtip_handle_tfe(struct driver_data *dd)
608{
f6587217 609 int group, tag, bit, reissue, rv;
88523a61 610 struct mtip_port *port;
f6587217 611 struct mtip_cmd *cmd;
88523a61
SB
612 u32 completed;
613 struct host_to_dev_fis *fis;
614 unsigned long tagaccum[SLOTBITS_IN_LONGS];
95fea2f1 615 unsigned int cmd_cnt = 0;
f6587217
AT
616 unsigned char *buf;
617 char *fail_reason = NULL;
618 int fail_all_ncq_write = 0, fail_all_ncq_cmds = 0;
88523a61
SB
619
620 dev_warn(&dd->pdev->dev, "Taskfile error\n");
621
622 port = dd->port;
623
d02e1f0a
AT
624 set_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags);
625
a7806fad 626 if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags)) {
ffc771b3 627 cmd = mtip_cmd_from_tag(dd, MTIP_TAG_INTERNAL);
d02e1f0a
AT
628 dbg_printk(MTIP_DRV_NAME " TFE for the internal command\n");
629
d02e1f0a
AT
630 if (cmd->comp_data && cmd->comp_func) {
631 cmd->comp_func(port, MTIP_TAG_INTERNAL,
ffc771b3 632 cmd, PORT_IRQ_TF_ERR);
d02e1f0a
AT
633 }
634 goto handle_tfe_exit;
635 }
88523a61 636
95fea2f1
AT
637 /* clear the tag accumulator */
638 memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long));
639
88523a61
SB
640 /* Loop through all the groups */
641 for (group = 0; group < dd->slot_groups; group++) {
642 completed = readl(port->completed[group]);
643
ffc771b3
JA
644 dev_warn(&dd->pdev->dev, "g=%u, comp=%x\n", group, completed);
645
88523a61
SB
646 /* clear completed status register in the hardware.*/
647 writel(completed, port->completed[group]);
648
88523a61
SB
649 /* Process successfully completed commands */
650 for (bit = 0; bit < 32 && completed; bit++) {
651 if (!(completed & (1<<bit)))
652 continue;
653 tag = (group << 5) + bit;
654
655 /* Skip the internal command slot */
656 if (tag == MTIP_TAG_INTERNAL)
657 continue;
658
ffc771b3 659 cmd = mtip_cmd_from_tag(dd, tag);
f6587217 660 if (likely(cmd->comp_func)) {
88523a61 661 set_bit(tag, tagaccum);
95fea2f1 662 cmd_cnt++;
ffc771b3 663 cmd->comp_func(port, tag, cmd, 0);
88523a61
SB
664 } else {
665 dev_err(&port->dd->pdev->dev,
666 "Missing completion func for tag %d",
667 tag);
668 if (mtip_check_surprise_removal(dd->pdev)) {
88523a61
SB
669 /* don't proceed further */
670 return;
671 }
672 }
673 }
674 }
95fea2f1
AT
675
676 print_tags(dd, "completed (TFE)", tagaccum, cmd_cnt);
88523a61
SB
677
678 /* Restart the port */
679 mdelay(20);
680 mtip_restart_port(port);
681
f6587217
AT
682 /* Trying to determine the cause of the error */
683 rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ,
684 dd->port->log_buf,
685 dd->port->log_buf_dma, 1);
686 if (rv) {
687 dev_warn(&dd->pdev->dev,
688 "Error in READ LOG EXT (10h) command\n");
689 /* non-critical error, don't fail the load */
690 } else {
691 buf = (unsigned char *)dd->port->log_buf;
692 if (buf[259] & 0x1) {
693 dev_info(&dd->pdev->dev,
694 "Write protect bit is set.\n");
8a857a88 695 set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag);
f6587217
AT
696 fail_all_ncq_write = 1;
697 fail_reason = "write protect";
698 }
699 if (buf[288] == 0xF7) {
700 dev_info(&dd->pdev->dev,
701 "Exceeded Tmax, drive in thermal shutdown.\n");
8a857a88 702 set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag);
f6587217
AT
703 fail_all_ncq_cmds = 1;
704 fail_reason = "thermal shutdown";
705 }
706 if (buf[288] == 0xBF) {
26d58057 707 set_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag);
f6587217 708 dev_info(&dd->pdev->dev,
26d58057 709 "Drive indicates rebuild has failed. Secure erase required.\n");
f6587217
AT
710 fail_all_ncq_cmds = 1;
711 fail_reason = "rebuild failed";
712 }
713 }
714
88523a61
SB
715 /* clear the tag accumulator */
716 memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long));
717
718 /* Loop through all the groups */
719 for (group = 0; group < dd->slot_groups; group++) {
720 for (bit = 0; bit < 32; bit++) {
721 reissue = 1;
722 tag = (group << 5) + bit;
ffc771b3 723 cmd = mtip_cmd_from_tag(dd, tag);
88523a61 724
f6587217 725 fis = (struct host_to_dev_fis *)cmd->command;
88523a61
SB
726
727 /* Should re-issue? */
728 if (tag == MTIP_TAG_INTERNAL ||
729 fis->command == ATA_CMD_SET_FEATURES)
730 reissue = 0;
f6587217
AT
731 else {
732 if (fail_all_ncq_cmds ||
733 (fail_all_ncq_write &&
734 fis->command == ATA_CMD_FPDMA_WRITE)) {
735 dev_warn(&dd->pdev->dev,
736 " Fail: %s w/tag %d [%s].\n",
737 fis->command == ATA_CMD_FPDMA_WRITE ?
738 "write" : "read",
739 tag,
740 fail_reason != NULL ?
741 fail_reason : "unknown");
f6587217
AT
742 if (cmd->comp_func) {
743 cmd->comp_func(port, tag,
ffc771b3 744 cmd, -ENODATA);
f6587217
AT
745 }
746 continue;
747 }
748 }
88523a61
SB
749
750 /*
751 * First check if this command has
752 * exceeded its retries.
753 */
f6587217 754 if (reissue && (cmd->retries-- > 0)) {
88523a61
SB
755
756 set_bit(tag, tagaccum);
757
88523a61
SB
758 /* Re-issue the command. */
759 mtip_issue_ncq_command(port, tag);
760
761 continue;
762 }
763
764 /* Retire a command that will not be reissued */
765 dev_warn(&port->dd->pdev->dev,
766 "retiring tag %d\n", tag);
88523a61 767
f6587217 768 if (cmd->comp_func)
ffc771b3 769 cmd->comp_func(port, tag, cmd, PORT_IRQ_TF_ERR);
88523a61
SB
770 else
771 dev_warn(&port->dd->pdev->dev,
772 "Bad completion for tag %d\n",
773 tag);
774 }
775 }
95fea2f1 776 print_tags(dd, "reissued (TFE)", tagaccum, cmd_cnt);
88523a61 777
d02e1f0a 778handle_tfe_exit:
60ec0eec 779 /* clear eh_active */
8a857a88 780 clear_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags);
60ec0eec 781 wake_up_interruptible(&port->svc_wait);
88523a61
SB
782}
783
784/*
785 * Handle a set device bits interrupt
786 */
16c906e5
AT
787static inline void mtip_workq_sdbfx(struct mtip_port *port, int group,
788 u32 completed)
88523a61 789{
16c906e5
AT
790 struct driver_data *dd = port->dd;
791 int tag, bit;
88523a61
SB
792 struct mtip_cmd *command;
793
16c906e5
AT
794 if (!completed) {
795 WARN_ON_ONCE(!completed);
796 return;
797 }
798 /* clear completed status register in the hardware.*/
799 writel(completed, port->completed[group]);
88523a61 800
16c906e5
AT
801 /* Process completed commands. */
802 for (bit = 0; (bit < 32) && completed; bit++) {
803 if (completed & 0x01) {
804 tag = (group << 5) | bit;
88523a61 805
16c906e5
AT
806 /* skip internal command slot. */
807 if (unlikely(tag == MTIP_TAG_INTERNAL))
808 continue;
88523a61 809
ffc771b3
JA
810 command = mtip_cmd_from_tag(dd, tag);
811 if (likely(command->comp_func))
812 command->comp_func(port, tag, command, 0);
813 else {
8f8b8995
AT
814 dev_dbg(&dd->pdev->dev,
815 "Null completion for tag %d",
16c906e5 816 tag);
88523a61 817
16c906e5
AT
818 if (mtip_check_surprise_removal(
819 dd->pdev)) {
16c906e5 820 return;
88523a61
SB
821 }
822 }
823 }
16c906e5 824 completed >>= 1;
88523a61 825 }
16c906e5
AT
826
827 /* If last, re-enable interrupts */
828 if (atomic_dec_return(&dd->irq_workers_active) == 0)
829 writel(0xffffffff, dd->mmio + HOST_IRQ_STAT);
88523a61
SB
830}
831
832/*
833 * Process legacy pio and d2h interrupts
834 */
835static inline void mtip_process_legacy(struct driver_data *dd, u32 port_stat)
836{
837 struct mtip_port *port = dd->port;
ffc771b3 838 struct mtip_cmd *cmd = mtip_cmd_from_tag(dd, MTIP_TAG_INTERNAL);
88523a61 839
8a857a88 840 if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags) &&
60ec0eec 841 (cmd != NULL) && !(readl(port->cmd_issue[MTIP_TAG_INTERNAL])
88523a61
SB
842 & (1 << MTIP_TAG_INTERNAL))) {
843 if (cmd->comp_func) {
ffc771b3 844 cmd->comp_func(port, MTIP_TAG_INTERNAL, cmd, 0);
88523a61
SB
845 return;
846 }
847 }
848
88523a61
SB
849 return;
850}
851
852/*
853 * Demux and handle errors
854 */
855static inline void mtip_process_errors(struct driver_data *dd, u32 port_stat)
856{
88523a61
SB
857
858 if (unlikely(port_stat & PORT_IRQ_CONNECT)) {
859 dev_warn(&dd->pdev->dev,
860 "Clearing PxSERR.DIAG.x\n");
861 writel((1 << 26), dd->port->mmio + PORT_SCR_ERR);
862 }
863
864 if (unlikely(port_stat & PORT_IRQ_PHYRDY)) {
865 dev_warn(&dd->pdev->dev,
866 "Clearing PxSERR.DIAG.n\n");
867 writel((1 << 16), dd->port->mmio + PORT_SCR_ERR);
868 }
869
870 if (unlikely(port_stat & ~PORT_IRQ_HANDLED)) {
871 dev_warn(&dd->pdev->dev,
872 "Port stat errors %x unhandled\n",
873 (port_stat & ~PORT_IRQ_HANDLED));
9b204fbf
AT
874 if (mtip_check_surprise_removal(dd->pdev))
875 return;
876 }
877 if (likely(port_stat & (PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR))) {
878 set_bit(MTIP_PF_EH_ACTIVE_BIT, &dd->port->flags);
879 wake_up_interruptible(&dd->port->svc_wait);
88523a61
SB
880 }
881}
882
883static inline irqreturn_t mtip_handle_irq(struct driver_data *data)
884{
885 struct driver_data *dd = (struct driver_data *) data;
886 struct mtip_port *port = dd->port;
887 u32 hba_stat, port_stat;
888 int rv = IRQ_NONE;
16c906e5
AT
889 int do_irq_enable = 1, i, workers;
890 struct mtip_work *twork;
88523a61
SB
891
892 hba_stat = readl(dd->mmio + HOST_IRQ_STAT);
893 if (hba_stat) {
894 rv = IRQ_HANDLED;
895
896 /* Acknowledge the interrupt status on the port.*/
897 port_stat = readl(port->mmio + PORT_IRQ_STAT);
898 writel(port_stat, port->mmio + PORT_IRQ_STAT);
899
900 /* Demux port status */
16c906e5
AT
901 if (likely(port_stat & PORT_IRQ_SDB_FIS)) {
902 do_irq_enable = 0;
903 WARN_ON_ONCE(atomic_read(&dd->irq_workers_active) != 0);
904
905 /* Start at 1: group zero is always local? */
906 for (i = 0, workers = 0; i < MTIP_MAX_SLOT_GROUPS;
907 i++) {
908 twork = &dd->work[i];
909 twork->completed = readl(port->completed[i]);
910 if (twork->completed)
911 workers++;
912 }
913
914 atomic_set(&dd->irq_workers_active, workers);
915 if (workers) {
916 for (i = 1; i < MTIP_MAX_SLOT_GROUPS; i++) {
917 twork = &dd->work[i];
918 if (twork->completed)
919 queue_work_on(
920 twork->cpu_binding,
921 dd->isr_workq,
922 &twork->work);
923 }
924
925 if (likely(dd->work[0].completed))
926 mtip_workq_sdbfx(port, 0,
927 dd->work[0].completed);
928
929 } else {
930 /*
931 * Chip quirk: SDB interrupt but nothing
932 * to complete
933 */
934 do_irq_enable = 1;
935 }
936 }
88523a61
SB
937
938 if (unlikely(port_stat & PORT_IRQ_ERR)) {
939 if (unlikely(mtip_check_surprise_removal(dd->pdev))) {
88523a61
SB
940 /* don't proceed further */
941 return IRQ_HANDLED;
942 }
8a857a88 943 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
45038367
AT
944 &dd->dd_flag))
945 return rv;
88523a61
SB
946
947 mtip_process_errors(dd, port_stat & PORT_IRQ_ERR);
948 }
949
950 if (unlikely(port_stat & PORT_IRQ_LEGACY))
951 mtip_process_legacy(dd, port_stat & PORT_IRQ_LEGACY);
952 }
953
954 /* acknowledge interrupt */
16c906e5
AT
955 if (unlikely(do_irq_enable))
956 writel(hba_stat, dd->mmio + HOST_IRQ_STAT);
88523a61
SB
957
958 return rv;
959}
960
88523a61
SB
961/*
962 * HBA interrupt subroutine.
963 *
964 * @irq IRQ number.
965 * @instance Pointer to the driver data structure.
966 *
967 * return value
968 * IRQ_HANDLED A HBA interrupt was pending and handled.
969 * IRQ_NONE This interrupt was not for the HBA.
970 */
971static irqreturn_t mtip_irq_handler(int irq, void *instance)
972{
973 struct driver_data *dd = instance;
16c906e5
AT
974
975 return mtip_handle_irq(dd);
88523a61
SB
976}
977
978static void mtip_issue_non_ncq_command(struct mtip_port *port, int tag)
979{
88523a61
SB
980 writel(1 << MTIP_TAG_BIT(tag),
981 port->cmd_issue[MTIP_TAG_INDEX(tag)]);
982}
983
c74b0f58
AT
984static bool mtip_pause_ncq(struct mtip_port *port,
985 struct host_to_dev_fis *fis)
986{
987 struct host_to_dev_fis *reply;
988 unsigned long task_file_data;
989
990 reply = port->rxfis + RX_FIS_D2H_REG;
991 task_file_data = readl(port->mmio+PORT_TFDATA);
992
12a166c9
AT
993 if (fis->command == ATA_CMD_SEC_ERASE_UNIT)
994 clear_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag);
995
996 if ((task_file_data & 1))
c74b0f58
AT
997 return false;
998
999 if (fis->command == ATA_CMD_SEC_ERASE_PREP) {
1000 set_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags);
12a166c9 1001 set_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag);
c74b0f58
AT
1002 port->ic_pause_timer = jiffies;
1003 return true;
1004 } else if ((fis->command == ATA_CMD_DOWNLOAD_MICRO) &&
1005 (fis->features == 0x03)) {
1006 set_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags);
1007 port->ic_pause_timer = jiffies;
1008 return true;
1009 } else if ((fis->command == ATA_CMD_SEC_ERASE_UNIT) ||
1010 ((fis->command == 0xFC) &&
1011 (fis->features == 0x27 || fis->features == 0x72 ||
1012 fis->features == 0x62 || fis->features == 0x26))) {
1013 /* Com reset after secure erase or lowlevel format */
1014 mtip_restart_port(port);
1015 return false;
1016 }
1017
1018 return false;
1019}
1020
88523a61
SB
1021/*
1022 * Wait for port to quiesce
1023 *
1024 * @port Pointer to port data structure
1025 * @timeout Max duration to wait (ms)
1026 *
1027 * return value
1028 * 0 Success
1029 * -EBUSY Commands still active
1030 */
1031static int mtip_quiesce_io(struct mtip_port *port, unsigned long timeout)
1032{
1033 unsigned long to;
3e54a3d1
DC
1034 unsigned int n;
1035 unsigned int active = 1;
88523a61 1036
9acf03cf
JA
1037 blk_mq_stop_hw_queues(port->dd->queue);
1038
88523a61
SB
1039 to = jiffies + msecs_to_jiffies(timeout);
1040 do {
8a857a88
AT
1041 if (test_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags) &&
1042 test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) {
60ec0eec
AT
1043 msleep(20);
1044 continue; /* svc thd is actively issuing commands */
1045 }
9b204fbf
AT
1046
1047 msleep(100);
1048 if (mtip_check_surprise_removal(port->dd->pdev))
1049 goto err_fault;
8a857a88 1050 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
9acf03cf 1051 goto err_fault;
9b204fbf 1052
88523a61
SB
1053 /*
1054 * Ignore s_active bit 0 of array element 0.
1055 * This bit will always be set
1056 */
60ec0eec 1057 active = readl(port->s_active[0]) & 0xFFFFFFFE;
88523a61
SB
1058 for (n = 1; n < port->dd->slot_groups; n++)
1059 active |= readl(port->s_active[n]);
1060
1061 if (!active)
1062 break;
88523a61
SB
1063 } while (time_before(jiffies, to));
1064
9acf03cf 1065 blk_mq_start_stopped_hw_queues(port->dd->queue, true);
88523a61 1066 return active ? -EBUSY : 0;
9acf03cf
JA
1067err_fault:
1068 blk_mq_start_stopped_hw_queues(port->dd->queue, true);
1069 return -EFAULT;
88523a61
SB
1070}
1071
1072/*
1073 * Execute an internal command and wait for the completion.
1074 *
1075 * @port Pointer to the port data structure.
1076 * @fis Pointer to the FIS that describes the command.
60ec0eec 1077 * @fis_len Length in WORDS of the FIS.
88523a61 1078 * @buffer DMA accessible for command data.
60ec0eec 1079 * @buf_len Length, in bytes, of the data buffer.
88523a61
SB
1080 * @opts Command header options, excluding the FIS length
1081 * and the number of PRD entries.
1082 * @timeout Time in ms to wait for the command to complete.
1083 *
1084 * return value
1085 * 0 Command completed successfully.
1086 * -EFAULT The buffer address is not correctly aligned.
1087 * -EBUSY Internal command or other IO in progress.
1088 * -EAGAIN Time out waiting for command to complete.
1089 */
1090static int mtip_exec_internal_command(struct mtip_port *port,
8182b495 1091 struct host_to_dev_fis *fis,
60ec0eec 1092 int fis_len,
88523a61 1093 dma_addr_t buffer,
60ec0eec 1094 int buf_len,
88523a61
SB
1095 u32 opts,
1096 gfp_t atomic,
1097 unsigned long timeout)
1098{
1099 struct mtip_cmd_sg *command_sg;
1100 DECLARE_COMPLETION_ONSTACK(wait);
ffc771b3 1101 struct mtip_cmd *int_cmd;
d0d096b1 1102 struct driver_data *dd = port->dd;
ffc771b3 1103 int rv = 0;
88523a61
SB
1104
1105 /* Make sure the buffer is 8 byte aligned. This is asic specific. */
1106 if (buffer & 0x00000007) {
d0d096b1 1107 dev_err(&dd->pdev->dev, "SG buffer is not 8 byte aligned\n");
88523a61
SB
1108 return -EFAULT;
1109 }
1110
ffc771b3
JA
1111 int_cmd = mtip_get_int_command(dd);
1112
8a857a88 1113 set_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
c74b0f58
AT
1114 port->ic_pause_timer = 0;
1115
d0d096b1
AT
1116 clear_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags);
1117 clear_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags);
88523a61
SB
1118
1119 if (atomic == GFP_KERNEL) {
8182b495
AT
1120 if (fis->command != ATA_CMD_STANDBYNOW1) {
1121 /* wait for io to complete if non atomic */
9b204fbf
AT
1122 if (mtip_quiesce_io(port,
1123 MTIP_QUIESCE_IO_TIMEOUT_MS) < 0) {
d0d096b1 1124 dev_warn(&dd->pdev->dev,
8182b495 1125 "Failed to quiesce IO\n");
ffc771b3 1126 mtip_put_int_command(dd, int_cmd);
8a857a88 1127 clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
8182b495
AT
1128 wake_up_interruptible(&port->svc_wait);
1129 return -EBUSY;
1130 }
88523a61
SB
1131 }
1132
1133 /* Set the completion function and data for the command. */
1134 int_cmd->comp_data = &wait;
1135 int_cmd->comp_func = mtip_completion;
1136
1137 } else {
1138 /* Clear completion - we're going to poll */
1139 int_cmd->comp_data = NULL;
8182b495 1140 int_cmd->comp_func = mtip_null_completion;
88523a61
SB
1141 }
1142
1143 /* Copy the command to the command table */
60ec0eec 1144 memcpy(int_cmd->command, fis, fis_len*4);
88523a61
SB
1145
1146 /* Populate the SG list */
1147 int_cmd->command_header->opts =
60ec0eec
AT
1148 __force_bit2int cpu_to_le32(opts | fis_len);
1149 if (buf_len) {
88523a61
SB
1150 command_sg = int_cmd->command + AHCI_CMD_TBL_HDR_SZ;
1151
60ec0eec
AT
1152 command_sg->info =
1153 __force_bit2int cpu_to_le32((buf_len-1) & 0x3FFFFF);
1154 command_sg->dba =
1155 __force_bit2int cpu_to_le32(buffer & 0xFFFFFFFF);
1156 command_sg->dba_upper =
1157 __force_bit2int cpu_to_le32((buffer >> 16) >> 16);
88523a61 1158
60ec0eec
AT
1159 int_cmd->command_header->opts |=
1160 __force_bit2int cpu_to_le32((1 << 16));
88523a61
SB
1161 }
1162
1163 /* Populate the command header */
1164 int_cmd->command_header->byte_count = 0;
1165
1166 /* Issue the command to the hardware */
1167 mtip_issue_non_ncq_command(port, MTIP_TAG_INTERNAL);
1168
88523a61
SB
1169 if (atomic == GFP_KERNEL) {
1170 /* Wait for the command to complete or timeout. */
9b204fbf 1171 if ((rv = wait_for_completion_interruptible_timeout(
88523a61 1172 &wait,
9b204fbf 1173 msecs_to_jiffies(timeout))) <= 0) {
d0d096b1
AT
1174 if (rv == -ERESTARTSYS) { /* interrupted */
1175 dev_err(&dd->pdev->dev,
1176 "Internal command [%02X] was interrupted after %lu ms\n",
1177 fis->command, timeout);
1178 rv = -EINTR;
1179 goto exec_ic_exit;
1180 } else if (rv == 0) /* timeout */
1181 dev_err(&dd->pdev->dev,
1182 "Internal command did not complete [%02X] within timeout of %lu ms\n",
1183 fis->command, timeout);
1184 else
1185 dev_err(&dd->pdev->dev,
1186 "Internal command [%02X] wait returned code [%d] after %lu ms - unhandled\n",
1187 fis->command, rv, timeout);
1188
1189 if (mtip_check_surprise_removal(dd->pdev) ||
8a857a88 1190 test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
d0d096b1
AT
1191 &dd->dd_flag)) {
1192 dev_err(&dd->pdev->dev,
1193 "Internal command [%02X] wait returned due to SR\n",
1194 fis->command);
45038367
AT
1195 rv = -ENXIO;
1196 goto exec_ic_exit;
1197 }
d0d096b1 1198 mtip_device_reset(dd); /* recover from timeout issue */
88523a61 1199 rv = -EAGAIN;
d0d096b1 1200 goto exec_ic_exit;
88523a61 1201 }
88523a61 1202 } else {
d0d096b1
AT
1203 u32 hba_stat, port_stat;
1204
88523a61
SB
1205 /* Spin for <timeout> checking if command still outstanding */
1206 timeout = jiffies + msecs_to_jiffies(timeout);
8182b495
AT
1207 while ((readl(port->cmd_issue[MTIP_TAG_INTERNAL])
1208 & (1 << MTIP_TAG_INTERNAL))
1209 && time_before(jiffies, timeout)) {
d0d096b1 1210 if (mtip_check_surprise_removal(dd->pdev)) {
8182b495
AT
1211 rv = -ENXIO;
1212 goto exec_ic_exit;
1213 }
1214 if ((fis->command != ATA_CMD_STANDBYNOW1) &&
8a857a88 1215 test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
d0d096b1 1216 &dd->dd_flag)) {
45038367
AT
1217 rv = -ENXIO;
1218 goto exec_ic_exit;
1219 }
d0d096b1
AT
1220 port_stat = readl(port->mmio + PORT_IRQ_STAT);
1221 if (!port_stat)
1222 continue;
1223
1224 if (port_stat & PORT_IRQ_ERR) {
1225 dev_err(&dd->pdev->dev,
1226 "Internal command [%02X] failed\n",
1227 fis->command);
1228 mtip_device_reset(dd);
1229 rv = -EIO;
1230 goto exec_ic_exit;
1231 } else {
1232 writel(port_stat, port->mmio + PORT_IRQ_STAT);
1233 hba_stat = readl(dd->mmio + HOST_IRQ_STAT);
1234 if (hba_stat)
1235 writel(hba_stat,
1236 dd->mmio + HOST_IRQ_STAT);
d02e1f0a 1237 }
d0d096b1 1238 break;
45038367 1239 }
d02e1f0a 1240 }
88523a61 1241
d02e1f0a 1242 if (readl(port->cmd_issue[MTIP_TAG_INTERNAL])
88523a61 1243 & (1 << MTIP_TAG_INTERNAL)) {
d02e1f0a 1244 rv = -ENXIO;
d0d096b1
AT
1245 if (!test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) {
1246 mtip_device_reset(dd);
88523a61
SB
1247 rv = -EAGAIN;
1248 }
1249 }
45038367 1250exec_ic_exit:
88523a61 1251 /* Clear the allocated and active bits for the internal command. */
ffc771b3 1252 mtip_put_int_command(dd, int_cmd);
c74b0f58
AT
1253 if (rv >= 0 && mtip_pause_ncq(port, fis)) {
1254 /* NCQ paused */
1255 return rv;
1256 }
8a857a88 1257 clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
60ec0eec 1258 wake_up_interruptible(&port->svc_wait);
88523a61
SB
1259
1260 return rv;
1261}
1262
1263/*
1264 * Byte-swap ATA ID strings.
1265 *
1266 * ATA identify data contains strings in byte-swapped 16-bit words.
1267 * They must be swapped (on all architectures) to be usable as C strings.
1268 * This function swaps bytes in-place.
1269 *
1270 * @buf The buffer location of the string
1271 * @len The number of bytes to swap
1272 *
1273 * return value
1274 * None
1275 */
1276static inline void ata_swap_string(u16 *buf, unsigned int len)
1277{
1278 int i;
1279 for (i = 0; i < (len/2); i++)
1280 be16_to_cpus(&buf[i]);
1281}
1282
670a6414
AT
1283static void mtip_set_timeout(struct driver_data *dd,
1284 struct host_to_dev_fis *fis,
1285 unsigned int *timeout, u8 erasemode)
1286{
1287 switch (fis->command) {
1288 case ATA_CMD_DOWNLOAD_MICRO:
1289 *timeout = 120000; /* 2 minutes */
1290 break;
1291 case ATA_CMD_SEC_ERASE_UNIT:
1292 case 0xFC:
1293 if (erasemode)
1294 *timeout = ((*(dd->port->identify + 90) * 2) * 60000);
1295 else
1296 *timeout = ((*(dd->port->identify + 89) * 2) * 60000);
1297 break;
1298 case ATA_CMD_STANDBYNOW1:
1299 *timeout = 120000; /* 2 minutes */
1300 break;
1301 case 0xF7:
1302 case 0xFA:
1303 *timeout = 60000; /* 60 seconds */
1304 break;
1305 case ATA_CMD_SMART:
1306 *timeout = 15000; /* 15 seconds */
1307 break;
1308 default:
9b204fbf 1309 *timeout = MTIP_IOCTL_CMD_TIMEOUT_MS;
670a6414
AT
1310 break;
1311 }
1312}
1313
88523a61
SB
1314/*
1315 * Request the device identity information.
1316 *
1317 * If a user space buffer is not specified, i.e. is NULL, the
1318 * identify information is still read from the drive and placed
1319 * into the identify data buffer (@e port->identify) in the
1320 * port data structure.
1321 * When the identify buffer contains valid identify information @e
1322 * port->identify_valid is non-zero.
1323 *
1324 * @port Pointer to the port structure.
1325 * @user_buffer A user space buffer where the identify data should be
1326 * copied.
1327 *
1328 * return value
1329 * 0 Command completed successfully.
1330 * -EFAULT An error occurred while coping data to the user buffer.
1331 * -1 Command failed.
1332 */
1333static int mtip_get_identify(struct mtip_port *port, void __user *user_buffer)
1334{
1335 int rv = 0;
1336 struct host_to_dev_fis fis;
1337
8a857a88 1338 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
45038367
AT
1339 return -EFAULT;
1340
88523a61
SB
1341 /* Build the FIS. */
1342 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1343 fis.type = 0x27;
1344 fis.opts = 1 << 7;
1345 fis.command = ATA_CMD_ID_ATA;
1346
1347 /* Set the identify information as invalid. */
1348 port->identify_valid = 0;
1349
1350 /* Clear the identify information. */
1351 memset(port->identify, 0, sizeof(u16) * ATA_ID_WORDS);
1352
1353 /* Execute the command. */
1354 if (mtip_exec_internal_command(port,
1355 &fis,
1356 5,
1357 port->identify_dma,
1358 sizeof(u16) * ATA_ID_WORDS,
1359 0,
1360 GFP_KERNEL,
9b204fbf 1361 MTIP_INT_CMD_TIMEOUT_MS)
88523a61
SB
1362 < 0) {
1363 rv = -1;
1364 goto out;
1365 }
1366
1367 /*
1368 * Perform any necessary byte-swapping. Yes, the kernel does in fact
1369 * perform field-sensitive swapping on the string fields.
1370 * See the kernel use of ata_id_string() for proof of this.
1371 */
1372#ifdef __LITTLE_ENDIAN
1373 ata_swap_string(port->identify + 27, 40); /* model string*/
1374 ata_swap_string(port->identify + 23, 8); /* firmware string*/
1375 ata_swap_string(port->identify + 10, 20); /* serial# string*/
1376#else
1377 {
1378 int i;
1379 for (i = 0; i < ATA_ID_WORDS; i++)
1380 port->identify[i] = le16_to_cpu(port->identify[i]);
1381 }
1382#endif
1383
26d58057
SB
1384 /* Check security locked state */
1385 if (port->identify[128] & 0x4)
1386 set_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag);
1387 else
1388 clear_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag);
1389
68466cbf 1390#ifdef MTIP_TRIM /* Disabling TRIM support temporarily */
15283469
AT
1391 /* Demux ID.DRAT & ID.RZAT to determine trim support */
1392 if (port->identify[69] & (1 << 14) && port->identify[69] & (1 << 5))
1393 port->dd->trim_supp = true;
1394 else
68466cbf 1395#endif
15283469
AT
1396 port->dd->trim_supp = false;
1397
88523a61
SB
1398 /* Set the identify buffer as valid. */
1399 port->identify_valid = 1;
1400
1401 if (user_buffer) {
1402 if (copy_to_user(
1403 user_buffer,
1404 port->identify,
1405 ATA_ID_WORDS * sizeof(u16))) {
1406 rv = -EFAULT;
1407 goto out;
1408 }
1409 }
1410
1411out:
88523a61
SB
1412 return rv;
1413}
1414
1415/*
1416 * Issue a standby immediate command to the device.
1417 *
1418 * @port Pointer to the port structure.
1419 *
1420 * return value
1421 * 0 Command was executed successfully.
1422 * -1 An error occurred while executing the command.
1423 */
1424static int mtip_standby_immediate(struct mtip_port *port)
1425{
1426 int rv;
1427 struct host_to_dev_fis fis;
f6587217 1428 unsigned long start;
670a6414 1429 unsigned int timeout;
88523a61 1430
88523a61
SB
1431 /* Build the FIS. */
1432 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1433 fis.type = 0x27;
1434 fis.opts = 1 << 7;
1435 fis.command = ATA_CMD_STANDBYNOW1;
1436
670a6414
AT
1437 mtip_set_timeout(port->dd, &fis, &timeout, 0);
1438
f6587217 1439 start = jiffies;
88523a61
SB
1440 rv = mtip_exec_internal_command(port,
1441 &fis,
1442 5,
1443 0,
1444 0,
1445 0,
f6587217 1446 GFP_ATOMIC,
670a6414 1447 timeout);
f6587217
AT
1448 dbg_printk(MTIP_DRV_NAME "Time taken to complete standby cmd: %d ms\n",
1449 jiffies_to_msecs(jiffies - start));
1450 if (rv)
1451 dev_warn(&port->dd->pdev->dev,
1452 "STANDBY IMMEDIATE command failed.\n");
1453
1454 return rv;
1455}
1456
1457/*
1458 * Issue a READ LOG EXT command to the device.
1459 *
1460 * @port pointer to the port structure.
1461 * @page page number to fetch
1462 * @buffer pointer to buffer
1463 * @buffer_dma dma address corresponding to @buffer
1464 * @sectors page length to fetch, in sectors
1465 *
1466 * return value
1467 * @rv return value from mtip_exec_internal_command()
1468 */
1469static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer,
1470 dma_addr_t buffer_dma, unsigned int sectors)
1471{
1472 struct host_to_dev_fis fis;
1473
1474 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1475 fis.type = 0x27;
1476 fis.opts = 1 << 7;
1477 fis.command = ATA_CMD_READ_LOG_EXT;
1478 fis.sect_count = sectors & 0xFF;
1479 fis.sect_cnt_ex = (sectors >> 8) & 0xFF;
1480 fis.lba_low = page;
1481 fis.lba_mid = 0;
1482 fis.device = ATA_DEVICE_OBS;
1483
1484 memset(buffer, 0, sectors * ATA_SECT_SIZE);
1485
1486 return mtip_exec_internal_command(port,
1487 &fis,
1488 5,
1489 buffer_dma,
1490 sectors * ATA_SECT_SIZE,
1491 0,
1492 GFP_ATOMIC,
9b204fbf 1493 MTIP_INT_CMD_TIMEOUT_MS);
f6587217
AT
1494}
1495
1496/*
1497 * Issue a SMART READ DATA command to the device.
1498 *
1499 * @port pointer to the port structure.
1500 * @buffer pointer to buffer
1501 * @buffer_dma dma address corresponding to @buffer
1502 *
1503 * return value
1504 * @rv return value from mtip_exec_internal_command()
1505 */
1506static int mtip_get_smart_data(struct mtip_port *port, u8 *buffer,
1507 dma_addr_t buffer_dma)
1508{
1509 struct host_to_dev_fis fis;
1510
1511 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1512 fis.type = 0x27;
1513 fis.opts = 1 << 7;
1514 fis.command = ATA_CMD_SMART;
1515 fis.features = 0xD0;
1516 fis.sect_count = 1;
1517 fis.lba_mid = 0x4F;
1518 fis.lba_hi = 0xC2;
1519 fis.device = ATA_DEVICE_OBS;
1520
1521 return mtip_exec_internal_command(port,
1522 &fis,
1523 5,
1524 buffer_dma,
1525 ATA_SECT_SIZE,
1526 0,
1527 GFP_ATOMIC,
88523a61 1528 15000);
f6587217
AT
1529}
1530
1531/*
1532 * Get the value of a smart attribute
1533 *
1534 * @port pointer to the port structure
1535 * @id attribute number
1536 * @attrib pointer to return attrib information corresponding to @id
1537 *
1538 * return value
1539 * -EINVAL NULL buffer passed or unsupported attribute @id.
1540 * -EPERM Identify data not valid, SMART not supported or not enabled
1541 */
1542static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id,
1543 struct smart_attr *attrib)
1544{
1545 int rv, i;
1546 struct smart_attr *pattr;
1547
1548 if (!attrib)
1549 return -EINVAL;
1550
1551 if (!port->identify_valid) {
1552 dev_warn(&port->dd->pdev->dev, "IDENTIFY DATA not valid\n");
1553 return -EPERM;
1554 }
1555 if (!(port->identify[82] & 0x1)) {
1556 dev_warn(&port->dd->pdev->dev, "SMART not supported\n");
1557 return -EPERM;
1558 }
1559 if (!(port->identify[85] & 0x1)) {
1560 dev_warn(&port->dd->pdev->dev, "SMART not enabled\n");
1561 return -EPERM;
1562 }
1563
1564 memset(port->smart_buf, 0, ATA_SECT_SIZE);
1565 rv = mtip_get_smart_data(port, port->smart_buf, port->smart_buf_dma);
1566 if (rv) {
1567 dev_warn(&port->dd->pdev->dev, "Failed to ge SMART data\n");
1568 return rv;
1569 }
1570
1571 pattr = (struct smart_attr *)(port->smart_buf + 2);
1572 for (i = 0; i < 29; i++, pattr++)
1573 if (pattr->attr_id == id) {
1574 memcpy(attrib, pattr, sizeof(struct smart_attr));
1575 break;
1576 }
1577
1578 if (i == 29) {
1579 dev_warn(&port->dd->pdev->dev,
1580 "Query for invalid SMART attribute ID\n");
1581 rv = -EINVAL;
1582 }
88523a61 1583
88523a61
SB
1584 return rv;
1585}
1586
15283469
AT
1587/*
1588 * Trim unused sectors
1589 *
1590 * @dd pointer to driver_data structure
1591 * @lba starting lba
1592 * @len # of 512b sectors to trim
1593 *
1594 * return value
1595 * -ENOMEM Out of dma memory
1596 * -EINVAL Invalid parameters passed in, trim not supported
1597 * -EIO Error submitting trim request to hw
1598 */
d0d096b1
AT
1599static int mtip_send_trim(struct driver_data *dd, unsigned int lba,
1600 unsigned int len)
15283469
AT
1601{
1602 int i, rv = 0;
1603 u64 tlba, tlen, sect_left;
1604 struct mtip_trim_entry *buf;
1605 dma_addr_t dma_addr;
1606 struct host_to_dev_fis fis;
1607
1608 if (!len || dd->trim_supp == false)
1609 return -EINVAL;
1610
1611 /* Trim request too big */
1612 WARN_ON(len > (MTIP_MAX_TRIM_ENTRY_LEN * MTIP_MAX_TRIM_ENTRIES));
1613
1614 /* Trim request not aligned on 4k boundary */
1615 WARN_ON(len % 8 != 0);
1616
1617 /* Warn if vu_trim structure is too big */
1618 WARN_ON(sizeof(struct mtip_trim) > ATA_SECT_SIZE);
1619
1620 /* Allocate a DMA buffer for the trim structure */
1621 buf = dmam_alloc_coherent(&dd->pdev->dev, ATA_SECT_SIZE, &dma_addr,
1622 GFP_KERNEL);
1623 if (!buf)
1624 return -ENOMEM;
1625 memset(buf, 0, ATA_SECT_SIZE);
1626
1627 for (i = 0, sect_left = len, tlba = lba;
1628 i < MTIP_MAX_TRIM_ENTRIES && sect_left;
1629 i++) {
1630 tlen = (sect_left >= MTIP_MAX_TRIM_ENTRY_LEN ?
1631 MTIP_MAX_TRIM_ENTRY_LEN :
1632 sect_left);
1633 buf[i].lba = __force_bit2int cpu_to_le32(tlba);
1634 buf[i].range = __force_bit2int cpu_to_le16(tlen);
1635 tlba += tlen;
1636 sect_left -= tlen;
1637 }
1638 WARN_ON(sect_left != 0);
1639
1640 /* Build the fis */
1641 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1642 fis.type = 0x27;
1643 fis.opts = 1 << 7;
1644 fis.command = 0xfb;
1645 fis.features = 0x60;
1646 fis.sect_count = 1;
1647 fis.device = ATA_DEVICE_OBS;
1648
1649 if (mtip_exec_internal_command(dd->port,
1650 &fis,
1651 5,
1652 dma_addr,
1653 ATA_SECT_SIZE,
1654 0,
1655 GFP_KERNEL,
1656 MTIP_TRIM_TIMEOUT_MS) < 0)
1657 rv = -EIO;
1658
1659 dmam_free_coherent(&dd->pdev->dev, ATA_SECT_SIZE, buf, dma_addr);
1660 return rv;
1661}
1662
88523a61
SB
1663/*
1664 * Get the drive capacity.
1665 *
1666 * @dd Pointer to the device data structure.
1667 * @sectors Pointer to the variable that will receive the sector count.
1668 *
1669 * return value
1670 * 1 Capacity was returned successfully.
1671 * 0 The identify information is invalid.
1672 */
6316668f 1673static bool mtip_hw_get_capacity(struct driver_data *dd, sector_t *sectors)
88523a61
SB
1674{
1675 struct mtip_port *port = dd->port;
1676 u64 total, raw0, raw1, raw2, raw3;
1677 raw0 = port->identify[100];
1678 raw1 = port->identify[101];
1679 raw2 = port->identify[102];
1680 raw3 = port->identify[103];
1681 total = raw0 | raw1<<16 | raw2<<32 | raw3<<48;
1682 *sectors = total;
1683 return (bool) !!port->identify_valid;
1684}
1685
88523a61
SB
1686/*
1687 * Display the identify command data.
1688 *
1689 * @port Pointer to the port data structure.
1690 *
1691 * return value
1692 * None
1693 */
1694static void mtip_dump_identify(struct mtip_port *port)
1695{
1696 sector_t sectors;
1697 unsigned short revid;
1698 char cbuf[42];
1699
1700 if (!port->identify_valid)
1701 return;
1702
1703 strlcpy(cbuf, (char *)(port->identify+10), 21);
1704 dev_info(&port->dd->pdev->dev,
1705 "Serial No.: %s\n", cbuf);
1706
1707 strlcpy(cbuf, (char *)(port->identify+23), 9);
1708 dev_info(&port->dd->pdev->dev,
1709 "Firmware Ver.: %s\n", cbuf);
1710
1711 strlcpy(cbuf, (char *)(port->identify+27), 41);
1712 dev_info(&port->dd->pdev->dev, "Model: %s\n", cbuf);
1713
26d58057
SB
1714 dev_info(&port->dd->pdev->dev, "Security: %04x %s\n",
1715 port->identify[128],
1716 port->identify[128] & 0x4 ? "(LOCKED)" : "");
1717
88523a61
SB
1718 if (mtip_hw_get_capacity(port->dd, &sectors))
1719 dev_info(&port->dd->pdev->dev,
1720 "Capacity: %llu sectors (%llu MB)\n",
1721 (u64)sectors,
1722 ((u64)sectors) * ATA_SECT_SIZE >> 20);
1723
1724 pci_read_config_word(port->dd->pdev, PCI_REVISION_ID, &revid);
60ec0eec 1725 switch (revid & 0xFF) {
88523a61
SB
1726 case 0x1:
1727 strlcpy(cbuf, "A0", 3);
1728 break;
1729 case 0x3:
1730 strlcpy(cbuf, "A2", 3);
1731 break;
1732 default:
1733 strlcpy(cbuf, "?", 2);
1734 break;
1735 }
1736 dev_info(&port->dd->pdev->dev,
1737 "Card Type: %s\n", cbuf);
1738}
1739
1740/*
1741 * Map the commands scatter list into the command table.
1742 *
1743 * @command Pointer to the command.
1744 * @nents Number of scatter list entries.
1745 *
1746 * return value
1747 * None
1748 */
1749static inline void fill_command_sg(struct driver_data *dd,
1750 struct mtip_cmd *command,
1751 int nents)
1752{
1753 int n;
1754 unsigned int dma_len;
1755 struct mtip_cmd_sg *command_sg;
1756 struct scatterlist *sg = command->sg;
1757
1758 command_sg = command->command + AHCI_CMD_TBL_HDR_SZ;
1759
1760 for (n = 0; n < nents; n++) {
1761 dma_len = sg_dma_len(sg);
1762 if (dma_len > 0x400000)
1763 dev_err(&dd->pdev->dev,
1764 "DMA segment length truncated\n");
60ec0eec
AT
1765 command_sg->info = __force_bit2int
1766 cpu_to_le32((dma_len-1) & 0x3FFFFF);
1767 command_sg->dba = __force_bit2int
1768 cpu_to_le32(sg_dma_address(sg));
1769 command_sg->dba_upper = __force_bit2int
1770 cpu_to_le32((sg_dma_address(sg) >> 16) >> 16);
88523a61
SB
1771 command_sg++;
1772 sg++;
1773 }
1774}
1775
1776/*
1777 * @brief Execute a drive command.
1778 *
1779 * return value 0 The command completed successfully.
1780 * return value -1 An error occurred while executing the command.
1781 */
6316668f 1782static int exec_drive_task(struct mtip_port *port, u8 *command)
88523a61
SB
1783{
1784 struct host_to_dev_fis fis;
1785 struct host_to_dev_fis *reply = (port->rxfis + RX_FIS_D2H_REG);
9b204fbf 1786 unsigned int to;
88523a61 1787
88523a61
SB
1788 /* Build the FIS. */
1789 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1790 fis.type = 0x27;
1791 fis.opts = 1 << 7;
1792 fis.command = command[0];
1793 fis.features = command[1];
1794 fis.sect_count = command[2];
1795 fis.sector = command[3];
1796 fis.cyl_low = command[4];
1797 fis.cyl_hi = command[5];
1798 fis.device = command[6] & ~0x10; /* Clear the dev bit*/
1799
9b204fbf
AT
1800 mtip_set_timeout(port->dd, &fis, &to, 0);
1801
c74b0f58 1802 dbg_printk(MTIP_DRV_NAME " %s: User Command: cmd %x, feat %x, nsect %x, sect %x, lcyl %x, hcyl %x, sel %x\n",
88523a61
SB
1803 __func__,
1804 command[0],
1805 command[1],
1806 command[2],
1807 command[3],
1808 command[4],
1809 command[5],
1810 command[6]);
1811
1812 /* Execute the command. */
1813 if (mtip_exec_internal_command(port,
1814 &fis,
1815 5,
1816 0,
1817 0,
1818 0,
1819 GFP_KERNEL,
9b204fbf 1820 to) < 0) {
88523a61
SB
1821 return -1;
1822 }
1823
1824 command[0] = reply->command; /* Status*/
1825 command[1] = reply->features; /* Error*/
1826 command[4] = reply->cyl_low;
1827 command[5] = reply->cyl_hi;
1828
c74b0f58 1829 dbg_printk(MTIP_DRV_NAME " %s: Completion Status: stat %x, err %x , cyl_lo %x cyl_hi %x\n",
88523a61
SB
1830 __func__,
1831 command[0],
1832 command[1],
1833 command[4],
1834 command[5]);
1835
88523a61
SB
1836 return 0;
1837}
1838
1839/*
1840 * @brief Execute a drive command.
1841 *
1842 * @param port Pointer to the port data structure.
1843 * @param command Pointer to the user specified command parameters.
1844 * @param user_buffer Pointer to the user space buffer where read sector
1845 * data should be copied.
1846 *
1847 * return value 0 The command completed successfully.
1848 * return value -EFAULT An error occurred while copying the completion
1849 * data to the user space buffer.
1850 * return value -1 An error occurred while executing the command.
1851 */
6316668f
JA
1852static int exec_drive_command(struct mtip_port *port, u8 *command,
1853 void __user *user_buffer)
88523a61
SB
1854{
1855 struct host_to_dev_fis fis;
e602878f
AT
1856 struct host_to_dev_fis *reply;
1857 u8 *buf = NULL;
1858 dma_addr_t dma_addr = 0;
1859 int rv = 0, xfer_sz = command[3];
9b204fbf 1860 unsigned int to;
e602878f
AT
1861
1862 if (xfer_sz) {
97651ea6 1863 if (!user_buffer)
e602878f
AT
1864 return -EFAULT;
1865
1866 buf = dmam_alloc_coherent(&port->dd->pdev->dev,
1867 ATA_SECT_SIZE * xfer_sz,
1868 &dma_addr,
1869 GFP_KERNEL);
1870 if (!buf) {
1871 dev_err(&port->dd->pdev->dev,
1872 "Memory allocation failed (%d bytes)\n",
1873 ATA_SECT_SIZE * xfer_sz);
1874 return -ENOMEM;
1875 }
1876 memset(buf, 0, ATA_SECT_SIZE * xfer_sz);
1877 }
88523a61 1878
88523a61
SB
1879 /* Build the FIS. */
1880 memset(&fis, 0, sizeof(struct host_to_dev_fis));
e602878f
AT
1881 fis.type = 0x27;
1882 fis.opts = 1 << 7;
1883 fis.command = command[0];
88523a61
SB
1884 fis.features = command[2];
1885 fis.sect_count = command[3];
1886 if (fis.command == ATA_CMD_SMART) {
1887 fis.sector = command[1];
60ec0eec
AT
1888 fis.cyl_low = 0x4F;
1889 fis.cyl_hi = 0xC2;
88523a61
SB
1890 }
1891
9b204fbf
AT
1892 mtip_set_timeout(port->dd, &fis, &to, 0);
1893
e602878f
AT
1894 if (xfer_sz)
1895 reply = (port->rxfis + RX_FIS_PIO_SETUP);
1896 else
1897 reply = (port->rxfis + RX_FIS_D2H_REG);
1898
88523a61 1899 dbg_printk(MTIP_DRV_NAME
c74b0f58 1900 " %s: User Command: cmd %x, sect %x, "
88523a61
SB
1901 "feat %x, sectcnt %x\n",
1902 __func__,
1903 command[0],
1904 command[1],
1905 command[2],
1906 command[3]);
1907
88523a61
SB
1908 /* Execute the command. */
1909 if (mtip_exec_internal_command(port,
1910 &fis,
1911 5,
e602878f
AT
1912 (xfer_sz ? dma_addr : 0),
1913 (xfer_sz ? ATA_SECT_SIZE * xfer_sz : 0),
88523a61
SB
1914 0,
1915 GFP_KERNEL,
9b204fbf 1916 to)
88523a61 1917 < 0) {
e602878f
AT
1918 rv = -EFAULT;
1919 goto exit_drive_command;
88523a61
SB
1920 }
1921
1922 /* Collect the completion status. */
1923 command[0] = reply->command; /* Status*/
1924 command[1] = reply->features; /* Error*/
e602878f 1925 command[2] = reply->sect_count;
88523a61
SB
1926
1927 dbg_printk(MTIP_DRV_NAME
c74b0f58 1928 " %s: Completion Status: stat %x, "
e602878f 1929 "err %x, nsect %x\n",
88523a61
SB
1930 __func__,
1931 command[0],
1932 command[1],
1933 command[2]);
1934
e602878f 1935 if (xfer_sz) {
88523a61 1936 if (copy_to_user(user_buffer,
e602878f 1937 buf,
88523a61 1938 ATA_SECT_SIZE * command[3])) {
e602878f
AT
1939 rv = -EFAULT;
1940 goto exit_drive_command;
88523a61
SB
1941 }
1942 }
e602878f
AT
1943exit_drive_command:
1944 if (buf)
1945 dmam_free_coherent(&port->dd->pdev->dev,
1946 ATA_SECT_SIZE * xfer_sz, buf, dma_addr);
1947 return rv;
88523a61
SB
1948}
1949
1950/*
1951 * Indicates whether a command has a single sector payload.
1952 *
1953 * @command passed to the device to perform the certain event.
1954 * @features passed to the device to perform the certain event.
1955 *
1956 * return value
1957 * 1 command is one that always has a single sector payload,
1958 * regardless of the value in the Sector Count field.
1959 * 0 otherwise
1960 *
1961 */
1962static unsigned int implicit_sector(unsigned char command,
1963 unsigned char features)
1964{
1965 unsigned int rv = 0;
1966
1967 /* list of commands that have an implicit sector count of 1 */
1968 switch (command) {
60ec0eec
AT
1969 case ATA_CMD_SEC_SET_PASS:
1970 case ATA_CMD_SEC_UNLOCK:
1971 case ATA_CMD_SEC_ERASE_PREP:
1972 case ATA_CMD_SEC_ERASE_UNIT:
1973 case ATA_CMD_SEC_FREEZE_LOCK:
1974 case ATA_CMD_SEC_DISABLE_PASS:
1975 case ATA_CMD_PMP_READ:
1976 case ATA_CMD_PMP_WRITE:
88523a61
SB
1977 rv = 1;
1978 break;
60ec0eec
AT
1979 case ATA_CMD_SET_MAX:
1980 if (features == ATA_SET_MAX_UNLOCK)
88523a61
SB
1981 rv = 1;
1982 break;
60ec0eec
AT
1983 case ATA_CMD_SMART:
1984 if ((features == ATA_SMART_READ_VALUES) ||
1985 (features == ATA_SMART_READ_THRESHOLDS))
88523a61
SB
1986 rv = 1;
1987 break;
60ec0eec
AT
1988 case ATA_CMD_CONF_OVERLAY:
1989 if ((features == ATA_DCO_IDENTIFY) ||
1990 (features == ATA_DCO_SET))
88523a61
SB
1991 rv = 1;
1992 break;
1993 }
1994 return rv;
1995}
2df7aa96 1996
88523a61
SB
1997/*
1998 * Executes a taskfile
1999 * See ide_taskfile_ioctl() for derivation
2000 */
2001static int exec_drive_taskfile(struct driver_data *dd,
ef0f1587
JA
2002 void __user *buf,
2003 ide_task_request_t *req_task,
2004 int outtotal)
88523a61
SB
2005{
2006 struct host_to_dev_fis fis;
2007 struct host_to_dev_fis *reply;
88523a61
SB
2008 u8 *outbuf = NULL;
2009 u8 *inbuf = NULL;
16d02c04
JA
2010 dma_addr_t outbuf_dma = 0;
2011 dma_addr_t inbuf_dma = 0;
2012 dma_addr_t dma_buffer = 0;
88523a61 2013 int err = 0;
88523a61
SB
2014 unsigned int taskin = 0;
2015 unsigned int taskout = 0;
2016 u8 nsect = 0;
2df7aa96 2017 unsigned int timeout;
88523a61
SB
2018 unsigned int force_single_sector;
2019 unsigned int transfer_size;
2020 unsigned long task_file_data;
ef0f1587 2021 int intotal = outtotal + req_task->out_size;
4453bc88 2022 int erasemode = 0;
88523a61
SB
2023
2024 taskout = req_task->out_size;
2025 taskin = req_task->in_size;
2026 /* 130560 = 512 * 0xFF*/
2027 if (taskin > 130560 || taskout > 130560) {
2028 err = -EINVAL;
2029 goto abort;
2030 }
2031
2032 if (taskout) {
2033 outbuf = kzalloc(taskout, GFP_KERNEL);
2034 if (outbuf == NULL) {
2035 err = -ENOMEM;
2036 goto abort;
2037 }
2038 if (copy_from_user(outbuf, buf + outtotal, taskout)) {
2039 err = -EFAULT;
2040 goto abort;
2041 }
2042 outbuf_dma = pci_map_single(dd->pdev,
2043 outbuf,
2044 taskout,
2045 DMA_TO_DEVICE);
16d02c04 2046 if (outbuf_dma == 0) {
88523a61
SB
2047 err = -ENOMEM;
2048 goto abort;
2049 }
2050 dma_buffer = outbuf_dma;
2051 }
2052
2053 if (taskin) {
2054 inbuf = kzalloc(taskin, GFP_KERNEL);
2055 if (inbuf == NULL) {
2056 err = -ENOMEM;
2057 goto abort;
2058 }
2059
2060 if (copy_from_user(inbuf, buf + intotal, taskin)) {
2061 err = -EFAULT;
2062 goto abort;
2063 }
2064 inbuf_dma = pci_map_single(dd->pdev,
2065 inbuf,
2066 taskin, DMA_FROM_DEVICE);
16d02c04 2067 if (inbuf_dma == 0) {
88523a61
SB
2068 err = -ENOMEM;
2069 goto abort;
2070 }
2071 dma_buffer = inbuf_dma;
2072 }
2073
2074 /* only supports PIO and non-data commands from this ioctl. */
2075 switch (req_task->data_phase) {
2076 case TASKFILE_OUT:
2077 nsect = taskout / ATA_SECT_SIZE;
2078 reply = (dd->port->rxfis + RX_FIS_PIO_SETUP);
2079 break;
2080 case TASKFILE_IN:
2081 reply = (dd->port->rxfis + RX_FIS_PIO_SETUP);
2082 break;
2083 case TASKFILE_NO_DATA:
2084 reply = (dd->port->rxfis + RX_FIS_D2H_REG);
2085 break;
2086 default:
2087 err = -EINVAL;
2088 goto abort;
2089 }
2090
88523a61
SB
2091 /* Build the FIS. */
2092 memset(&fis, 0, sizeof(struct host_to_dev_fis));
2093
2094 fis.type = 0x27;
2095 fis.opts = 1 << 7;
2096 fis.command = req_task->io_ports[7];
2097 fis.features = req_task->io_ports[1];
2098 fis.sect_count = req_task->io_ports[2];
2099 fis.lba_low = req_task->io_ports[3];
2100 fis.lba_mid = req_task->io_ports[4];
2101 fis.lba_hi = req_task->io_ports[5];
2102 /* Clear the dev bit*/
2103 fis.device = req_task->io_ports[6] & ~0x10;
2104
2105 if ((req_task->in_flags.all == 0) && (req_task->out_flags.all & 1)) {
2106 req_task->in_flags.all =
2107 IDE_TASKFILE_STD_IN_FLAGS |
2108 (IDE_HOB_STD_IN_FLAGS << 8);
2109 fis.lba_low_ex = req_task->hob_ports[3];
2110 fis.lba_mid_ex = req_task->hob_ports[4];
2111 fis.lba_hi_ex = req_task->hob_ports[5];
2112 fis.features_ex = req_task->hob_ports[1];
2113 fis.sect_cnt_ex = req_task->hob_ports[2];
2114
2115 } else {
2116 req_task->in_flags.all = IDE_TASKFILE_STD_IN_FLAGS;
2117 }
2118
2119 force_single_sector = implicit_sector(fis.command, fis.features);
2120
2121 if ((taskin || taskout) && (!fis.sect_count)) {
2122 if (nsect)
2123 fis.sect_count = nsect;
2124 else {
2125 if (!force_single_sector) {
2126 dev_warn(&dd->pdev->dev,
2127 "data movement but "
2128 "sect_count is 0\n");
88523a61
SB
2129 err = -EINVAL;
2130 goto abort;
2131 }
2132 }
2133 }
2134
2135 dbg_printk(MTIP_DRV_NAME
c74b0f58 2136 " %s: cmd %x, feat %x, nsect %x,"
88523a61
SB
2137 " sect/lbal %x, lcyl/lbam %x, hcyl/lbah %x,"
2138 " head/dev %x\n",
c74b0f58 2139 __func__,
88523a61
SB
2140 fis.command,
2141 fis.features,
2142 fis.sect_count,
2143 fis.lba_low,
2144 fis.lba_mid,
2145 fis.lba_hi,
2146 fis.device);
2147
4453bc88 2148 /* check for erase mode support during secure erase.*/
3208795e
SM
2149 if ((fis.command == ATA_CMD_SEC_ERASE_UNIT) && outbuf &&
2150 (outbuf[0] & MTIP_SEC_ERASE_MODE)) {
4453bc88
SM
2151 erasemode = 1;
2152 }
2153
2154 mtip_set_timeout(dd, &fis, &timeout, erasemode);
88523a61
SB
2155
2156 /* Determine the correct transfer size.*/
2157 if (force_single_sector)
2158 transfer_size = ATA_SECT_SIZE;
2159 else
2160 transfer_size = ATA_SECT_SIZE * fis.sect_count;
2161
2162 /* Execute the command.*/
2163 if (mtip_exec_internal_command(dd->port,
2164 &fis,
2165 5,
2166 dma_buffer,
2167 transfer_size,
2168 0,
2169 GFP_KERNEL,
2170 timeout) < 0) {
88523a61
SB
2171 err = -EIO;
2172 goto abort;
2173 }
2174
2175 task_file_data = readl(dd->port->mmio+PORT_TFDATA);
2176
2177 if ((req_task->data_phase == TASKFILE_IN) && !(task_file_data & 1)) {
2178 reply = dd->port->rxfis + RX_FIS_PIO_SETUP;
2179 req_task->io_ports[7] = reply->control;
2180 } else {
2181 reply = dd->port->rxfis + RX_FIS_D2H_REG;
2182 req_task->io_ports[7] = reply->command;
2183 }
2184
2185 /* reclaim the DMA buffers.*/
2186 if (inbuf_dma)
2187 pci_unmap_single(dd->pdev, inbuf_dma,
2188 taskin, DMA_FROM_DEVICE);
2189 if (outbuf_dma)
2190 pci_unmap_single(dd->pdev, outbuf_dma,
2191 taskout, DMA_TO_DEVICE);
16d02c04
JA
2192 inbuf_dma = 0;
2193 outbuf_dma = 0;
88523a61
SB
2194
2195 /* return the ATA registers to the caller.*/
2196 req_task->io_ports[1] = reply->features;
2197 req_task->io_ports[2] = reply->sect_count;
2198 req_task->io_ports[3] = reply->lba_low;
2199 req_task->io_ports[4] = reply->lba_mid;
2200 req_task->io_ports[5] = reply->lba_hi;
2201 req_task->io_ports[6] = reply->device;
2202
2203 if (req_task->out_flags.all & 1) {
2204
2205 req_task->hob_ports[3] = reply->lba_low_ex;
2206 req_task->hob_ports[4] = reply->lba_mid_ex;
2207 req_task->hob_ports[5] = reply->lba_hi_ex;
2208 req_task->hob_ports[1] = reply->features_ex;
2209 req_task->hob_ports[2] = reply->sect_cnt_ex;
2210 }
88523a61 2211 dbg_printk(MTIP_DRV_NAME
c74b0f58 2212 " %s: Completion: stat %x,"
88523a61
SB
2213 "err %x, sect_cnt %x, lbalo %x,"
2214 "lbamid %x, lbahi %x, dev %x\n",
2215 __func__,
2216 req_task->io_ports[7],
2217 req_task->io_ports[1],
2218 req_task->io_ports[2],
2219 req_task->io_ports[3],
2220 req_task->io_ports[4],
2221 req_task->io_ports[5],
2222 req_task->io_ports[6]);
2223
88523a61
SB
2224 if (taskout) {
2225 if (copy_to_user(buf + outtotal, outbuf, taskout)) {
2226 err = -EFAULT;
2227 goto abort;
2228 }
2229 }
2230 if (taskin) {
2231 if (copy_to_user(buf + intotal, inbuf, taskin)) {
2232 err = -EFAULT;
2233 goto abort;
2234 }
2235 }
2236abort:
2237 if (inbuf_dma)
2238 pci_unmap_single(dd->pdev, inbuf_dma,
2239 taskin, DMA_FROM_DEVICE);
2240 if (outbuf_dma)
2241 pci_unmap_single(dd->pdev, outbuf_dma,
2242 taskout, DMA_TO_DEVICE);
88523a61
SB
2243 kfree(outbuf);
2244 kfree(inbuf);
2245
2246 return err;
2247}
2248
2249/*
2250 * Handle IOCTL calls from the Block Layer.
2251 *
2252 * This function is called by the Block Layer when it receives an IOCTL
2253 * command that it does not understand. If the IOCTL command is not supported
2254 * this function returns -ENOTTY.
2255 *
2256 * @dd Pointer to the driver data structure.
2257 * @cmd IOCTL command passed from the Block Layer.
2258 * @arg IOCTL argument passed from the Block Layer.
2259 *
2260 * return value
2261 * 0 The IOCTL completed successfully.
2262 * -ENOTTY The specified command is not supported.
2263 * -EFAULT An error occurred copying data to a user space buffer.
2264 * -EIO An error occurred while executing the command.
2265 */
ef0f1587
JA
2266static int mtip_hw_ioctl(struct driver_data *dd, unsigned int cmd,
2267 unsigned long arg)
88523a61
SB
2268{
2269 switch (cmd) {
2270 case HDIO_GET_IDENTITY:
971890f2
AT
2271 {
2272 if (copy_to_user((void __user *)arg, dd->port->identify,
2273 sizeof(u16) * ATA_ID_WORDS))
2274 return -EFAULT;
88523a61 2275 break;
971890f2 2276 }
88523a61
SB
2277 case HDIO_DRIVE_CMD:
2278 {
2279 u8 drive_command[4];
2280
2281 /* Copy the user command info to our buffer. */
2282 if (copy_from_user(drive_command,
2283 (void __user *) arg,
2284 sizeof(drive_command)))
2285 return -EFAULT;
2286
2287 /* Execute the drive command. */
2288 if (exec_drive_command(dd->port,
2289 drive_command,
2290 (void __user *) (arg+4)))
2291 return -EIO;
2292
2293 /* Copy the status back to the users buffer. */
2294 if (copy_to_user((void __user *) arg,
2295 drive_command,
2296 sizeof(drive_command)))
2297 return -EFAULT;
2298
2299 break;
2300 }
2301 case HDIO_DRIVE_TASK:
2302 {
2303 u8 drive_command[7];
2304
2305 /* Copy the user command info to our buffer. */
2306 if (copy_from_user(drive_command,
2307 (void __user *) arg,
2308 sizeof(drive_command)))
2309 return -EFAULT;
2310
2311 /* Execute the drive command. */
2312 if (exec_drive_task(dd->port, drive_command))
2313 return -EIO;
2314
2315 /* Copy the status back to the users buffer. */
2316 if (copy_to_user((void __user *) arg,
2317 drive_command,
2318 sizeof(drive_command)))
2319 return -EFAULT;
2320
2321 break;
2322 }
ef0f1587
JA
2323 case HDIO_DRIVE_TASKFILE: {
2324 ide_task_request_t req_task;
2325 int ret, outtotal;
2326
2327 if (copy_from_user(&req_task, (void __user *) arg,
2328 sizeof(req_task)))
2329 return -EFAULT;
2330
2331 outtotal = sizeof(req_task);
2332
2333 ret = exec_drive_taskfile(dd, (void __user *) arg,
2334 &req_task, outtotal);
2335
60ec0eec
AT
2336 if (copy_to_user((void __user *) arg, &req_task,
2337 sizeof(req_task)))
ef0f1587
JA
2338 return -EFAULT;
2339
2340 return ret;
2341 }
88523a61
SB
2342
2343 default:
2344 return -EINVAL;
2345 }
2346 return 0;
2347}
2348
2349/*
2350 * Submit an IO to the hw
2351 *
2352 * This function is called by the block layer to issue an io
2353 * to the device. Upon completion, the callback function will
2354 * be called with the data parameter passed as the callback data.
2355 *
2356 * @dd Pointer to the driver data structure.
2357 * @start First sector to read.
2358 * @nsect Number of sectors to read.
2359 * @nents Number of entries in scatter list for the read command.
2360 * @tag The tag of this read command.
2361 * @callback Pointer to the function that should be called
2362 * when the read completes.
2363 * @data Callback data passed to the callback function
2364 * when the read completes.
88523a61
SB
2365 * @dir Direction (read or write)
2366 *
2367 * return value
2368 * None
2369 */
ffc771b3
JA
2370static void mtip_hw_submit_io(struct driver_data *dd, struct request *rq,
2371 struct mtip_cmd *command, int nents,
2372 struct blk_mq_hw_ctx *hctx)
88523a61
SB
2373{
2374 struct host_to_dev_fis *fis;
2375 struct mtip_port *port = dd->port;
ffc771b3
JA
2376 int dma_dir = rq_data_dir(rq) == READ ? DMA_FROM_DEVICE : DMA_TO_DEVICE;
2377 u64 start = blk_rq_pos(rq);
2378 unsigned int nsect = blk_rq_sectors(rq);
88523a61
SB
2379
2380 /* Map the scatter list for DMA access */
45038367 2381 nents = dma_map_sg(&dd->pdev->dev, command->sg, nents, dma_dir);
88523a61 2382
f45c40a9
SB
2383 prefetch(&port->flags);
2384
88523a61
SB
2385 command->scatter_ents = nents;
2386
2387 /*
2388 * The number of retries for this command before it is
2389 * reported as a failure to the upper layers.
2390 */
2391 command->retries = MTIP_MAX_RETRIES;
2392
2393 /* Fill out fis */
2394 fis = command->command;
2395 fis->type = 0x27;
2396 fis->opts = 1 << 7;
f45c40a9 2397 if (dma_dir == DMA_FROM_DEVICE)
ffc771b3
JA
2398 fis->command = ATA_CMD_FPDMA_READ;
2399 else
2400 fis->command = ATA_CMD_FPDMA_WRITE;
eda45314
SM
2401 fis->lba_low = start & 0xFF;
2402 fis->lba_mid = (start >> 8) & 0xFF;
2403 fis->lba_hi = (start >> 16) & 0xFF;
2404 fis->lba_low_ex = (start >> 24) & 0xFF;
2405 fis->lba_mid_ex = (start >> 32) & 0xFF;
2406 fis->lba_hi_ex = (start >> 40) & 0xFF;
88523a61 2407 fis->device = 1 << 6;
60ec0eec
AT
2408 fis->features = nsect & 0xFF;
2409 fis->features_ex = (nsect >> 8) & 0xFF;
ffc771b3 2410 fis->sect_count = ((rq->tag << 3) | (rq->tag >> 5));
88523a61
SB
2411 fis->sect_cnt_ex = 0;
2412 fis->control = 0;
2413 fis->res2 = 0;
2414 fis->res3 = 0;
2415 fill_command_sg(dd, command, nents);
2416
f45c40a9 2417 if (unlikely(command->unaligned))
2077d947
AT
2418 fis->device |= 1 << 7;
2419
88523a61 2420 /* Populate the command header */
60ec0eec
AT
2421 command->command_header->opts =
2422 __force_bit2int cpu_to_le32(
2423 (nents << 16) | 5 | AHCI_CMD_PREFETCH);
88523a61
SB
2424 command->command_header->byte_count = 0;
2425
2426 /*
2427 * Set the completion function and data for the command
2428 * within this layer.
2429 */
2430 command->comp_data = dd;
2431 command->comp_func = mtip_async_complete;
45038367 2432 command->direction = dma_dir;
88523a61 2433
88523a61 2434 /*
60ec0eec
AT
2435 * To prevent this command from being issued
2436 * if an internal command is in progress or error handling is active.
88523a61 2437 */
f45c40a9 2438 if (unlikely(port->flags & MTIP_PF_PAUSE_IO)) {
ffc771b3 2439 set_bit(rq->tag, port->cmds_to_issue);
8a857a88 2440 set_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags);
60ec0eec
AT
2441 return;
2442 }
88523a61
SB
2443
2444 /* Issue the command to the hardware */
ffc771b3 2445 mtip_issue_ncq_command(port, rq->tag);
88523a61
SB
2446}
2447
2448/*
7412ff13 2449 * Sysfs status dump.
88523a61
SB
2450 *
2451 * @dev Pointer to the device structure, passed by the kernrel.
2452 * @attr Pointer to the device_attribute structure passed by the kernel.
2453 * @buf Pointer to the char buffer that will receive the stats info.
2454 *
2455 * return value
2456 * The size, in bytes, of the data copied into buf.
2457 */
f6587217
AT
2458static ssize_t mtip_hw_show_status(struct device *dev,
2459 struct device_attribute *attr,
2460 char *buf)
2461{
2462 struct driver_data *dd = dev_to_disk(dev)->private_data;
2463 int size = 0;
2464
8a857a88 2465 if (test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag))
f6587217 2466 size += sprintf(buf, "%s", "thermal_shutdown\n");
8a857a88 2467 else if (test_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag))
f6587217
AT
2468 size += sprintf(buf, "%s", "write_protect\n");
2469 else
2470 size += sprintf(buf, "%s", "online\n");
2471
2472 return size;
2473}
2474
f6587217 2475static DEVICE_ATTR(status, S_IRUGO, mtip_hw_show_status, NULL);
88523a61 2476
0caff003
AT
2477/* debugsfs entries */
2478
2479static ssize_t show_device_status(struct device_driver *drv, char *buf)
2480{
2481 int size = 0;
2482 struct driver_data *dd, *tmp;
2483 unsigned long flags;
2484 char id_buf[42];
2485 u16 status = 0;
2486
2487 spin_lock_irqsave(&dev_lock, flags);
2488 size += sprintf(&buf[size], "Devices Present:\n");
2489 list_for_each_entry_safe(dd, tmp, &online_list, online_list) {
c66bb3f0 2490 if (dd->pdev) {
0caff003
AT
2491 if (dd->port &&
2492 dd->port->identify &&
2493 dd->port->identify_valid) {
2494 strlcpy(id_buf,
2495 (char *) (dd->port->identify + 10), 21);
2496 status = *(dd->port->identify + 141);
2497 } else {
2498 memset(id_buf, 0, 42);
2499 status = 0;
2500 }
2501
2502 if (dd->port &&
2503 test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) {
2504 size += sprintf(&buf[size],
2505 " device %s %s (ftl rebuild %d %%)\n",
2506 dev_name(&dd->pdev->dev),
2507 id_buf,
2508 status);
2509 } else {
2510 size += sprintf(&buf[size],
2511 " device %s %s\n",
2512 dev_name(&dd->pdev->dev),
2513 id_buf);
2514 }
2515 }
2516 }
2517
2518 size += sprintf(&buf[size], "Devices Being Removed:\n");
2519 list_for_each_entry_safe(dd, tmp, &removing_list, remove_list) {
c66bb3f0 2520 if (dd->pdev) {
0caff003
AT
2521 if (dd->port &&
2522 dd->port->identify &&
2523 dd->port->identify_valid) {
2524 strlcpy(id_buf,
2525 (char *) (dd->port->identify+10), 21);
2526 status = *(dd->port->identify + 141);
2527 } else {
2528 memset(id_buf, 0, 42);
2529 status = 0;
2530 }
2531
2532 if (dd->port &&
2533 test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) {
2534 size += sprintf(&buf[size],
2535 " device %s %s (ftl rebuild %d %%)\n",
2536 dev_name(&dd->pdev->dev),
2537 id_buf,
2538 status);
2539 } else {
2540 size += sprintf(&buf[size],
2541 " device %s %s\n",
2542 dev_name(&dd->pdev->dev),
2543 id_buf);
2544 }
2545 }
2546 }
2547 spin_unlock_irqrestore(&dev_lock, flags);
2548
2549 return size;
2550}
2551
2552static ssize_t mtip_hw_read_device_status(struct file *f, char __user *ubuf,
2553 size_t len, loff_t *offset)
2554{
c8afd0dc 2555 struct driver_data *dd = (struct driver_data *)f->private_data;
0caff003 2556 int size = *offset;
c8afd0dc
DM
2557 char *buf;
2558 int rv = 0;
0caff003
AT
2559
2560 if (!len || *offset)
2561 return 0;
2562
c8afd0dc
DM
2563 buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL);
2564 if (!buf) {
2565 dev_err(&dd->pdev->dev,
2566 "Memory allocation: status buffer\n");
2567 return -ENOMEM;
2568 }
2569
0caff003
AT
2570 size += show_device_status(NULL, buf);
2571
2572 *offset = size <= len ? size : len;
2573 size = copy_to_user(ubuf, buf, *offset);
2574 if (size)
c8afd0dc 2575 rv = -EFAULT;
0caff003 2576
c8afd0dc
DM
2577 kfree(buf);
2578 return rv ? rv : *offset;
0caff003
AT
2579}
2580
7b421d24
AT
2581static ssize_t mtip_hw_read_registers(struct file *f, char __user *ubuf,
2582 size_t len, loff_t *offset)
2583{
2584 struct driver_data *dd = (struct driver_data *)f->private_data;
c8afd0dc 2585 char *buf;
7b421d24
AT
2586 u32 group_allocated;
2587 int size = *offset;
c8afd0dc 2588 int n, rv = 0;
7b421d24
AT
2589
2590 if (!len || size)
2591 return 0;
2592
c8afd0dc
DM
2593 buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL);
2594 if (!buf) {
2595 dev_err(&dd->pdev->dev,
2596 "Memory allocation: register buffer\n");
2597 return -ENOMEM;
2598 }
2599
7b421d24
AT
2600 size += sprintf(&buf[size], "H/ S ACTive : [ 0x");
2601
2602 for (n = dd->slot_groups-1; n >= 0; n--)
2603 size += sprintf(&buf[size], "%08X ",
2604 readl(dd->port->s_active[n]));
2605
2606 size += sprintf(&buf[size], "]\n");
2607 size += sprintf(&buf[size], "H/ Command Issue : [ 0x");
2608
2609 for (n = dd->slot_groups-1; n >= 0; n--)
2610 size += sprintf(&buf[size], "%08X ",
2611 readl(dd->port->cmd_issue[n]));
2612
2613 size += sprintf(&buf[size], "]\n");
2614 size += sprintf(&buf[size], "H/ Completed : [ 0x");
2615
2616 for (n = dd->slot_groups-1; n >= 0; n--)
2617 size += sprintf(&buf[size], "%08X ",
2618 readl(dd->port->completed[n]));
2619
2620 size += sprintf(&buf[size], "]\n");
2621 size += sprintf(&buf[size], "H/ PORT IRQ STAT : [ 0x%08X ]\n",
2622 readl(dd->port->mmio + PORT_IRQ_STAT));
2623 size += sprintf(&buf[size], "H/ HOST IRQ STAT : [ 0x%08X ]\n",
2624 readl(dd->mmio + HOST_IRQ_STAT));
2625 size += sprintf(&buf[size], "\n");
2626
7b421d24
AT
2627 size += sprintf(&buf[size], "L/ Commands in Q : [ 0x");
2628
2629 for (n = dd->slot_groups-1; n >= 0; n--) {
2630 if (sizeof(long) > sizeof(u32))
2631 group_allocated =
2632 dd->port->cmds_to_issue[n/2] >> (32*(n&1));
2633 else
2634 group_allocated = dd->port->cmds_to_issue[n];
2635 size += sprintf(&buf[size], "%08X ", group_allocated);
2636 }
2637 size += sprintf(&buf[size], "]\n");
2638
2639 *offset = size <= len ? size : len;
2640 size = copy_to_user(ubuf, buf, *offset);
2641 if (size)
c8afd0dc 2642 rv = -EFAULT;
7b421d24 2643
c8afd0dc
DM
2644 kfree(buf);
2645 return rv ? rv : *offset;
7b421d24
AT
2646}
2647
2648static ssize_t mtip_hw_read_flags(struct file *f, char __user *ubuf,
2649 size_t len, loff_t *offset)
2650{
2651 struct driver_data *dd = (struct driver_data *)f->private_data;
c8afd0dc 2652 char *buf;
7b421d24 2653 int size = *offset;
c8afd0dc 2654 int rv = 0;
7b421d24
AT
2655
2656 if (!len || size)
2657 return 0;
2658
c8afd0dc
DM
2659 buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL);
2660 if (!buf) {
2661 dev_err(&dd->pdev->dev,
2662 "Memory allocation: flag buffer\n");
2663 return -ENOMEM;
2664 }
2665
7b421d24
AT
2666 size += sprintf(&buf[size], "Flag-port : [ %08lX ]\n",
2667 dd->port->flags);
2668 size += sprintf(&buf[size], "Flag-dd : [ %08lX ]\n",
2669 dd->dd_flag);
2670
2671 *offset = size <= len ? size : len;
2672 size = copy_to_user(ubuf, buf, *offset);
2673 if (size)
c8afd0dc 2674 rv = -EFAULT;
7b421d24 2675
c8afd0dc
DM
2676 kfree(buf);
2677 return rv ? rv : *offset;
7b421d24
AT
2678}
2679
0caff003
AT
2680static const struct file_operations mtip_device_status_fops = {
2681 .owner = THIS_MODULE,
2682 .open = simple_open,
2683 .read = mtip_hw_read_device_status,
2684 .llseek = no_llseek,
2685};
2686
7b421d24
AT
2687static const struct file_operations mtip_regs_fops = {
2688 .owner = THIS_MODULE,
2689 .open = simple_open,
2690 .read = mtip_hw_read_registers,
2691 .llseek = no_llseek,
2692};
2693
2694static const struct file_operations mtip_flags_fops = {
2695 .owner = THIS_MODULE,
2696 .open = simple_open,
2697 .read = mtip_hw_read_flags,
2698 .llseek = no_llseek,
2699};
2700
88523a61
SB
2701/*
2702 * Create the sysfs related attributes.
2703 *
2704 * @dd Pointer to the driver data structure.
2705 * @kobj Pointer to the kobj for the block device.
2706 *
2707 * return value
2708 * 0 Operation completed successfully.
2709 * -EINVAL Invalid parameter.
2710 */
6316668f 2711static int mtip_hw_sysfs_init(struct driver_data *dd, struct kobject *kobj)
88523a61
SB
2712{
2713 if (!kobj || !dd)
2714 return -EINVAL;
2715
f6587217
AT
2716 if (sysfs_create_file(kobj, &dev_attr_status.attr))
2717 dev_warn(&dd->pdev->dev,
2718 "Error creating 'status' sysfs entry\n");
88523a61
SB
2719 return 0;
2720}
2721
2722/*
2723 * Remove the sysfs related attributes.
2724 *
2725 * @dd Pointer to the driver data structure.
2726 * @kobj Pointer to the kobj for the block device.
2727 *
2728 * return value
2729 * 0 Operation completed successfully.
2730 * -EINVAL Invalid parameter.
2731 */
6316668f 2732static int mtip_hw_sysfs_exit(struct driver_data *dd, struct kobject *kobj)
88523a61
SB
2733{
2734 if (!kobj || !dd)
2735 return -EINVAL;
2736
f6587217 2737 sysfs_remove_file(kobj, &dev_attr_status.attr);
88523a61
SB
2738
2739 return 0;
2740}
2741
7b421d24
AT
2742static int mtip_hw_debugfs_init(struct driver_data *dd)
2743{
2744 if (!dfs_parent)
2745 return -1;
2746
2747 dd->dfs_node = debugfs_create_dir(dd->disk->disk_name, dfs_parent);
2748 if (IS_ERR_OR_NULL(dd->dfs_node)) {
2749 dev_warn(&dd->pdev->dev,
2750 "Error creating node %s under debugfs\n",
2751 dd->disk->disk_name);
2752 dd->dfs_node = NULL;
2753 return -1;
2754 }
2755
2756 debugfs_create_file("flags", S_IRUGO, dd->dfs_node, dd,
2757 &mtip_flags_fops);
2758 debugfs_create_file("registers", S_IRUGO, dd->dfs_node, dd,
2759 &mtip_regs_fops);
2760
2761 return 0;
2762}
2763
2764static void mtip_hw_debugfs_exit(struct driver_data *dd)
2765{
974a51a2
SB
2766 if (dd->dfs_node)
2767 debugfs_remove_recursive(dd->dfs_node);
7b421d24
AT
2768}
2769
8f8b8995
AT
2770static int mtip_free_orphan(struct driver_data *dd)
2771{
2772 struct kobject *kobj;
2773
2774 if (dd->bdev) {
2775 if (dd->bdev->bd_holders >= 1)
2776 return -2;
2777
2778 bdput(dd->bdev);
2779 dd->bdev = NULL;
2780 }
2781
2782 mtip_hw_debugfs_exit(dd);
2783
2784 spin_lock(&rssd_index_lock);
2785 ida_remove(&rssd_index_ida, dd->index);
2786 spin_unlock(&rssd_index_lock);
2787
2788 if (!test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag) &&
2789 test_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag)) {
2790 put_disk(dd->disk);
2791 } else {
2792 if (dd->disk) {
2793 kobj = kobject_get(&disk_to_dev(dd->disk)->kobj);
2794 if (kobj) {
2795 mtip_hw_sysfs_exit(dd, kobj);
2796 kobject_put(kobj);
2797 }
2798 del_gendisk(dd->disk);
02b48265 2799 put_disk(dd->disk);
8f8b8995
AT
2800 dd->disk = NULL;
2801 }
2802 if (dd->queue) {
2803 dd->queue->queuedata = NULL;
2804 blk_cleanup_queue(dd->queue);
ffc771b3 2805 blk_mq_free_tag_set(&dd->tags);
8f8b8995
AT
2806 dd->queue = NULL;
2807 }
2808 }
2809 kfree(dd);
2810 return 0;
2811}
7b421d24 2812
88523a61
SB
2813/*
2814 * Perform any init/resume time hardware setup
2815 *
2816 * @dd Pointer to the driver data structure.
2817 *
2818 * return value
2819 * None
2820 */
2821static inline void hba_setup(struct driver_data *dd)
2822{
2823 u32 hwdata;
2824 hwdata = readl(dd->mmio + HOST_HSORG);
2825
2826 /* interrupt bug workaround: use only 1 IS bit.*/
2827 writel(hwdata |
2828 HSORG_DISABLE_SLOTGRP_INTR |
2829 HSORG_DISABLE_SLOTGRP_PXIS,
2830 dd->mmio + HOST_HSORG);
2831}
2832
2077d947
AT
2833static int mtip_device_unaligned_constrained(struct driver_data *dd)
2834{
2835 return (dd->pdev->device == P420M_DEVICE_ID ? 1 : 0);
2836}
2837
88523a61
SB
2838/*
2839 * Detect the details of the product, and store anything needed
2840 * into the driver data structure. This includes product type and
2841 * version and number of slot groups.
2842 *
2843 * @dd Pointer to the driver data structure.
2844 *
2845 * return value
2846 * None
2847 */
2848static void mtip_detect_product(struct driver_data *dd)
2849{
2850 u32 hwdata;
2851 unsigned int rev, slotgroups;
2852
2853 /*
2854 * HBA base + 0xFC [15:0] - vendor-specific hardware interface
2855 * info register:
2856 * [15:8] hardware/software interface rev#
2857 * [ 3] asic-style interface
2858 * [ 2:0] number of slot groups, minus 1 (only valid for asic-style).
2859 */
2860 hwdata = readl(dd->mmio + HOST_HSORG);
2861
2862 dd->product_type = MTIP_PRODUCT_UNKNOWN;
2863 dd->slot_groups = 1;
2864
2865 if (hwdata & 0x8) {
2866 dd->product_type = MTIP_PRODUCT_ASICFPGA;
2867 rev = (hwdata & HSORG_HWREV) >> 8;
2868 slotgroups = (hwdata & HSORG_SLOTGROUPS) + 1;
2869 dev_info(&dd->pdev->dev,
2870 "ASIC-FPGA design, HS rev 0x%x, "
2871 "%i slot groups [%i slots]\n",
2872 rev,
2873 slotgroups,
2874 slotgroups * 32);
2875
2876 if (slotgroups > MTIP_MAX_SLOT_GROUPS) {
2877 dev_warn(&dd->pdev->dev,
2878 "Warning: driver only supports "
2879 "%i slot groups.\n", MTIP_MAX_SLOT_GROUPS);
2880 slotgroups = MTIP_MAX_SLOT_GROUPS;
2881 }
2882 dd->slot_groups = slotgroups;
2883 return;
2884 }
2885
2886 dev_warn(&dd->pdev->dev, "Unrecognized product id\n");
2887}
2888
2889/*
2890 * Blocking wait for FTL rebuild to complete
2891 *
2892 * @dd Pointer to the DRIVER_DATA structure.
2893 *
2894 * return value
2895 * 0 FTL rebuild completed successfully
2896 * -EFAULT FTL rebuild error/timeout/interruption
2897 */
2898static int mtip_ftl_rebuild_poll(struct driver_data *dd)
2899{
2900 unsigned long timeout, cnt = 0, start;
2901
2902 dev_warn(&dd->pdev->dev,
2903 "FTL rebuild in progress. Polling for completion.\n");
2904
2905 start = jiffies;
88523a61
SB
2906 timeout = jiffies + msecs_to_jiffies(MTIP_FTL_REBUILD_TIMEOUT_MS);
2907
2908 do {
8a857a88 2909 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
45038367
AT
2910 &dd->dd_flag)))
2911 return -EFAULT;
88523a61
SB
2912 if (mtip_check_surprise_removal(dd->pdev))
2913 return -EFAULT;
60ec0eec 2914
88523a61
SB
2915 if (mtip_get_identify(dd->port, NULL) < 0)
2916 return -EFAULT;
2917
2918 if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) ==
2919 MTIP_FTL_REBUILD_MAGIC) {
2920 ssleep(1);
2921 /* Print message every 3 minutes */
2922 if (cnt++ >= 180) {
2923 dev_warn(&dd->pdev->dev,
2924 "FTL rebuild in progress (%d secs).\n",
2925 jiffies_to_msecs(jiffies - start) / 1000);
2926 cnt = 0;
2927 }
2928 } else {
2929 dev_warn(&dd->pdev->dev,
2930 "FTL rebuild complete (%d secs).\n",
2931 jiffies_to_msecs(jiffies - start) / 1000);
62ee8c13 2932 mtip_block_initialize(dd);
45038367 2933 return 0;
88523a61
SB
2934 }
2935 ssleep(10);
2936 } while (time_before(jiffies, timeout));
2937
2938 /* Check for timeout */
45038367 2939 dev_err(&dd->pdev->dev,
88523a61
SB
2940 "Timed out waiting for FTL rebuild to complete (%d secs).\n",
2941 jiffies_to_msecs(jiffies - start) / 1000);
45038367 2942 return -EFAULT;
88523a61
SB
2943}
2944
60ec0eec
AT
2945/*
2946 * service thread to issue queued commands
2947 *
2948 * @data Pointer to the driver data structure.
2949 *
2950 * return value
2951 * 0
2952 */
2953
2954static int mtip_service_thread(void *data)
2955{
2956 struct driver_data *dd = (struct driver_data *)data;
2957 unsigned long slot, slot_start, slot_wrap;
2958 unsigned int num_cmd_slots = dd->slot_groups * 32;
2959 struct mtip_port *port = dd->port;
8f8b8995 2960 int ret;
60ec0eec
AT
2961
2962 while (1) {
9b204fbf
AT
2963 if (kthread_should_stop() ||
2964 test_bit(MTIP_PF_SVC_THD_STOP_BIT, &port->flags))
2965 goto st_out;
2966 clear_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags);
2967
60ec0eec
AT
2968 /*
2969 * the condition is to check neither an internal command is
2970 * is in progress nor error handling is active
2971 */
2972 wait_event_interruptible(port->svc_wait, (port->flags) &&
c74b0f58 2973 !(port->flags & MTIP_PF_PAUSE_IO));
60ec0eec 2974
8f8b8995
AT
2975 set_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags);
2976
9b204fbf
AT
2977 if (kthread_should_stop() ||
2978 test_bit(MTIP_PF_SVC_THD_STOP_BIT, &port->flags))
2979 goto st_out;
2980
8f8b8995
AT
2981 /* If I am an orphan, start self cleanup */
2982 if (test_bit(MTIP_PF_SR_CLEANUP_BIT, &port->flags))
60ec0eec
AT
2983 break;
2984
8a857a88 2985 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
45038367 2986 &dd->dd_flag)))
8f8b8995 2987 goto st_out;
c74b0f58 2988
9b204fbf
AT
2989restart_eh:
2990 /* Demux bits: start with error handling */
2991 if (test_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags)) {
2992 mtip_handle_tfe(dd);
2993 clear_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags);
2994 }
2995
2996 if (test_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags))
2997 goto restart_eh;
2998
8a857a88 2999 if (test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) {
60ec0eec
AT
3000 slot = 1;
3001 /* used to restrict the loop to one iteration */
3002 slot_start = num_cmd_slots;
3003 slot_wrap = 0;
3004 while (1) {
3005 slot = find_next_bit(port->cmds_to_issue,
3006 num_cmd_slots, slot);
3007 if (slot_wrap == 1) {
3008 if ((slot_start >= slot) ||
3009 (slot >= num_cmd_slots))
3010 break;
3011 }
3012 if (unlikely(slot_start == num_cmd_slots))
3013 slot_start = slot;
3014
3015 if (unlikely(slot == num_cmd_slots)) {
3016 slot = 1;
3017 slot_wrap = 1;
3018 continue;
3019 }
3020
3021 /* Issue the command to the hardware */
3022 mtip_issue_ncq_command(port, slot);
3023
60ec0eec
AT
3024 clear_bit(slot, port->cmds_to_issue);
3025 }
3026
8a857a88 3027 clear_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags);
9b204fbf
AT
3028 }
3029
3030 if (test_bit(MTIP_PF_REBUILD_BIT, &port->flags)) {
8f8b8995 3031 if (mtip_ftl_rebuild_poll(dd) < 0)
8a857a88 3032 set_bit(MTIP_DDF_REBUILD_FAILED_BIT,
8182b495 3033 &dd->dd_flag);
8a857a88 3034 clear_bit(MTIP_PF_REBUILD_BIT, &port->flags);
60ec0eec 3035 }
8f8b8995
AT
3036 }
3037
3038 /* wait for pci remove to exit */
3039 while (1) {
3040 if (test_bit(MTIP_DDF_REMOVE_DONE_BIT, &dd->dd_flag))
62ee8c13 3041 break;
8f8b8995
AT
3042 msleep_interruptible(1000);
3043 if (kthread_should_stop())
3044 goto st_out;
60ec0eec 3045 }
8f8b8995
AT
3046
3047 while (1) {
3048 ret = mtip_free_orphan(dd);
3049 if (!ret) {
3050 /* NOTE: All data structures are invalid, do not
3051 * access any here */
3052 return 0;
3053 }
3054 msleep_interruptible(1000);
3055 if (kthread_should_stop())
3056 goto st_out;
3057 }
3058st_out:
60ec0eec
AT
3059 return 0;
3060}
3061
188b9f49
SB
3062/*
3063 * DMA region teardown
3064 *
3065 * @dd Pointer to driver_data structure
3066 *
3067 * return value
3068 * None
3069 */
3070static void mtip_dma_free(struct driver_data *dd)
3071{
188b9f49
SB
3072 struct mtip_port *port = dd->port;
3073
3074 if (port->block1)
3075 dmam_free_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ,
3076 port->block1, port->block1_dma);
3077
3078 if (port->command_list) {
3079 dmam_free_coherent(&dd->pdev->dev, AHCI_CMD_TBL_SZ,
3080 port->command_list, port->command_list_dma);
3081 }
188b9f49
SB
3082}
3083
3084/*
3085 * DMA region setup
3086 *
3087 * @dd Pointer to driver_data structure
3088 *
3089 * return value
3090 * -ENOMEM Not enough free DMA region space to initialize driver
3091 */
3092static int mtip_dma_alloc(struct driver_data *dd)
3093{
3094 struct mtip_port *port = dd->port;
188b9f49
SB
3095
3096 /* Allocate dma memory for RX Fis, Identify, and Sector Bufffer */
3097 port->block1 =
3098 dmam_alloc_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ,
3099 &port->block1_dma, GFP_KERNEL);
3100 if (!port->block1)
3101 return -ENOMEM;
3102 memset(port->block1, 0, BLOCK_DMA_ALLOC_SZ);
3103
3104 /* Allocate dma memory for command list */
3105 port->command_list =
3106 dmam_alloc_coherent(&dd->pdev->dev, AHCI_CMD_TBL_SZ,
3107 &port->command_list_dma, GFP_KERNEL);
3108 if (!port->command_list) {
3109 dmam_free_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ,
3110 port->block1, port->block1_dma);
3111 port->block1 = NULL;
3112 port->block1_dma = 0;
3113 return -ENOMEM;
3114 }
3115 memset(port->command_list, 0, AHCI_CMD_TBL_SZ);
3116
3117 /* Setup all pointers into first DMA region */
3118 port->rxfis = port->block1 + AHCI_RX_FIS_OFFSET;
3119 port->rxfis_dma = port->block1_dma + AHCI_RX_FIS_OFFSET;
3120 port->identify = port->block1 + AHCI_IDFY_OFFSET;
3121 port->identify_dma = port->block1_dma + AHCI_IDFY_OFFSET;
3122 port->log_buf = port->block1 + AHCI_SECTBUF_OFFSET;
3123 port->log_buf_dma = port->block1_dma + AHCI_SECTBUF_OFFSET;
3124 port->smart_buf = port->block1 + AHCI_SMARTBUF_OFFSET;
3125 port->smart_buf_dma = port->block1_dma + AHCI_SMARTBUF_OFFSET;
3126
ffc771b3
JA
3127 return 0;
3128}
188b9f49 3129
ffc771b3
JA
3130static int mtip_hw_get_identify(struct driver_data *dd)
3131{
3132 struct smart_attr attr242;
3133 unsigned char *buf;
3134 int rv;
188b9f49 3135
ffc771b3
JA
3136 if (mtip_get_identify(dd->port, NULL) < 0)
3137 return -EFAULT;
188b9f49 3138
ffc771b3
JA
3139 if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) ==
3140 MTIP_FTL_REBUILD_MAGIC) {
3141 set_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags);
3142 return MTIP_FTL_REBUILD_MAGIC;
3143 }
3144 mtip_dump_identify(dd->port);
188b9f49 3145
ffc771b3
JA
3146 /* check write protect, over temp and rebuild statuses */
3147 rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ,
3148 dd->port->log_buf,
3149 dd->port->log_buf_dma, 1);
3150 if (rv) {
3151 dev_warn(&dd->pdev->dev,
3152 "Error in READ LOG EXT (10h) command\n");
3153 /* non-critical error, don't fail the load */
3154 } else {
3155 buf = (unsigned char *)dd->port->log_buf;
3156 if (buf[259] & 0x1) {
3157 dev_info(&dd->pdev->dev,
3158 "Write protect bit is set.\n");
3159 set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag);
3160 }
3161 if (buf[288] == 0xF7) {
3162 dev_info(&dd->pdev->dev,
3163 "Exceeded Tmax, drive in thermal shutdown.\n");
3164 set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag);
3165 }
3166 if (buf[288] == 0xBF) {
3167 dev_info(&dd->pdev->dev,
3168 "Drive indicates rebuild has failed.\n");
3169 /* TODO */
3170 }
188b9f49 3171 }
ffc771b3
JA
3172
3173 /* get write protect progess */
3174 memset(&attr242, 0, sizeof(struct smart_attr));
3175 if (mtip_get_smart_attr(dd->port, 242, &attr242))
3176 dev_warn(&dd->pdev->dev,
3177 "Unable to check write protect progress\n");
3178 else
3179 dev_info(&dd->pdev->dev,
3180 "Write protect progress: %u%% (%u blocks)\n",
3181 attr242.cur, le32_to_cpu(attr242.data));
3182
3183 return rv;
188b9f49
SB
3184}
3185
88523a61
SB
3186/*
3187 * Called once for each card.
3188 *
3189 * @dd Pointer to the driver data structure.
3190 *
3191 * return value
3192 * 0 on success, else an error code.
3193 */
6316668f 3194static int mtip_hw_init(struct driver_data *dd)
88523a61
SB
3195{
3196 int i;
3197 int rv;
3198 unsigned int num_command_slots;
45038367 3199 unsigned long timeout, timetaken;
88523a61
SB
3200
3201 dd->mmio = pcim_iomap_table(dd->pdev)[MTIP_ABAR];
3202
3203 mtip_detect_product(dd);
3204 if (dd->product_type == MTIP_PRODUCT_UNKNOWN) {
3205 rv = -EIO;
3206 goto out1;
3207 }
3208 num_command_slots = dd->slot_groups * 32;
3209
3210 hba_setup(dd);
3211
16c906e5
AT
3212 dd->port = kzalloc_node(sizeof(struct mtip_port), GFP_KERNEL,
3213 dd->numa_node);
88523a61
SB
3214 if (!dd->port) {
3215 dev_err(&dd->pdev->dev,
3216 "Memory allocation: port structure\n");
3217 return -ENOMEM;
3218 }
3219
16c906e5
AT
3220 /* Continue workqueue setup */
3221 for (i = 0; i < MTIP_MAX_SLOT_GROUPS; i++)
3222 dd->work[i].port = dd->port;
3223
2077d947
AT
3224 /* Enable unaligned IO constraints for some devices */
3225 if (mtip_device_unaligned_constrained(dd))
3226 dd->unal_qdepth = MTIP_MAX_UNALIGNED_SLOTS;
3227 else
3228 dd->unal_qdepth = 0;
3229
2077d947 3230 sema_init(&dd->port->cmd_slot_unal, dd->unal_qdepth);
88523a61
SB
3231
3232 /* Spinlock to prevent concurrent issue */
16c906e5
AT
3233 for (i = 0; i < MTIP_MAX_SLOT_GROUPS; i++)
3234 spin_lock_init(&dd->port->cmd_issue_lock[i]);
88523a61
SB
3235
3236 /* Set the port mmio base address. */
3237 dd->port->mmio = dd->mmio + PORT_OFFSET;
3238 dd->port->dd = dd;
3239
188b9f49
SB
3240 /* DMA allocations */
3241 rv = mtip_dma_alloc(dd);
3242 if (rv < 0)
88523a61 3243 goto out1;
88523a61
SB
3244
3245 /* Setup the pointers to the extended s_active and CI registers. */
3246 for (i = 0; i < dd->slot_groups; i++) {
3247 dd->port->s_active[i] =
3248 dd->port->mmio + i*0x80 + PORT_SCR_ACT;
3249 dd->port->cmd_issue[i] =
3250 dd->port->mmio + i*0x80 + PORT_COMMAND_ISSUE;
3251 dd->port->completed[i] =
3252 dd->port->mmio + i*0x80 + PORT_SDBV;
3253 }
3254
45038367
AT
3255 timetaken = jiffies;
3256 timeout = jiffies + msecs_to_jiffies(30000);
3257 while (((readl(dd->port->mmio + PORT_SCR_STAT) & 0x0F) != 0x03) &&
3258 time_before(jiffies, timeout)) {
3259 mdelay(100);
3260 }
3261 if (unlikely(mtip_check_surprise_removal(dd->pdev))) {
3262 timetaken = jiffies - timetaken;
3263 dev_warn(&dd->pdev->dev,
3264 "Surprise removal detected at %u ms\n",
3265 jiffies_to_msecs(timetaken));
3266 rv = -ENODEV;
3267 goto out2 ;
3268 }
8a857a88 3269 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) {
45038367
AT
3270 timetaken = jiffies - timetaken;
3271 dev_warn(&dd->pdev->dev,
3272 "Removal detected at %u ms\n",
3273 jiffies_to_msecs(timetaken));
3274 rv = -EFAULT;
88523a61
SB
3275 goto out2;
3276 }
3277
45038367
AT
3278 /* Conditionally reset the HBA. */
3279 if (!(readl(dd->mmio + HOST_CAP) & HOST_CAP_NZDMA)) {
3280 if (mtip_hba_reset(dd) < 0) {
3281 dev_err(&dd->pdev->dev,
3282 "Card did not reset within timeout\n");
3283 rv = -EIO;
3284 goto out2;
3285 }
3286 } else {
3287 /* Clear any pending interrupts on the HBA */
3288 writel(readl(dd->mmio + HOST_IRQ_STAT),
3289 dd->mmio + HOST_IRQ_STAT);
3290 }
3291
88523a61
SB
3292 mtip_init_port(dd->port);
3293 mtip_start_port(dd->port);
3294
3295 /* Setup the ISR and enable interrupts. */
3296 rv = devm_request_irq(&dd->pdev->dev,
3297 dd->pdev->irq,
3298 mtip_irq_handler,
3299 IRQF_SHARED,
3300 dev_driver_string(&dd->pdev->dev),
3301 dd);
3302
3303 if (rv) {
3304 dev_err(&dd->pdev->dev,
3305 "Unable to allocate IRQ %d\n", dd->pdev->irq);
3306 goto out2;
3307 }
16c906e5 3308 irq_set_affinity_hint(dd->pdev->irq, get_cpu_mask(dd->isr_binding));
88523a61
SB
3309
3310 /* Enable interrupts on the HBA. */
3311 writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
3312 dd->mmio + HOST_CTL);
3313
60ec0eec
AT
3314 init_waitqueue_head(&dd->port->svc_wait);
3315
8a857a88 3316 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) {
45038367
AT
3317 rv = -EFAULT;
3318 goto out3;
3319 }
3320
88523a61
SB
3321 return rv;
3322
3323out3:
88523a61
SB
3324 /* Disable interrupts on the HBA. */
3325 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
3326 dd->mmio + HOST_CTL);
3327
16c906e5
AT
3328 /* Release the IRQ. */
3329 irq_set_affinity_hint(dd->pdev->irq, NULL);
88523a61
SB
3330 devm_free_irq(&dd->pdev->dev, dd->pdev->irq, dd);
3331
3332out2:
3333 mtip_deinit_port(dd->port);
188b9f49 3334 mtip_dma_free(dd);
88523a61 3335
88523a61
SB
3336out1:
3337 /* Free the memory allocated for the for structure. */
3338 kfree(dd->port);
3339
3340 return rv;
3341}
3342
ffc771b3
JA
3343static void mtip_standby_drive(struct driver_data *dd)
3344{
3345 if (dd->sr)
3346 return;
3347
3348 /*
3349 * Send standby immediate (E0h) to the drive so that it
3350 * saves its state.
3351 */
3352 if (!test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags) &&
3353 !test_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag))
3354 if (mtip_standby_immediate(dd->port))
3355 dev_warn(&dd->pdev->dev,
3356 "STANDBY IMMEDIATE failed\n");
3357}
3358
88523a61
SB
3359/*
3360 * Called to deinitialize an interface.
3361 *
3362 * @dd Pointer to the driver data structure.
3363 *
3364 * return value
3365 * 0
3366 */
6316668f 3367static int mtip_hw_exit(struct driver_data *dd)
88523a61
SB
3368{
3369 /*
3370 * Send standby immediate (E0h) to the drive so that it
3371 * saves its state.
3372 */
8f8b8995 3373 if (!dd->sr) {
88523a61
SB
3374 /* de-initialize the port. */
3375 mtip_deinit_port(dd->port);
3376
3377 /* Disable interrupts on the HBA. */
3378 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
3379 dd->mmio + HOST_CTL);
3380 }
3381
88523a61 3382 /* Release the IRQ. */
16c906e5 3383 irq_set_affinity_hint(dd->pdev->irq, NULL);
88523a61
SB
3384 devm_free_irq(&dd->pdev->dev, dd->pdev->irq, dd);
3385
188b9f49
SB
3386 /* Free dma regions */
3387 mtip_dma_free(dd);
3388
88523a61
SB
3389 /* Free the memory allocated for the for structure. */
3390 kfree(dd->port);
8f8b8995 3391 dd->port = NULL;
88523a61
SB
3392
3393 return 0;
3394}
3395
3396/*
3397 * Issue a Standby Immediate command to the device.
3398 *
3399 * This function is called by the Block Layer just before the
3400 * system powers off during a shutdown.
3401 *
3402 * @dd Pointer to the driver data structure.
3403 *
3404 * return value
3405 * 0
3406 */
6316668f 3407static int mtip_hw_shutdown(struct driver_data *dd)
88523a61
SB
3408{
3409 /*
3410 * Send standby immediate (E0h) to the drive so that it
3411 * saves its state.
3412 */
8f8b8995
AT
3413 if (!dd->sr && dd->port)
3414 mtip_standby_immediate(dd->port);
88523a61
SB
3415
3416 return 0;
3417}
3418
3419/*
3420 * Suspend function
3421 *
3422 * This function is called by the Block Layer just before the
3423 * system hibernates.
3424 *
3425 * @dd Pointer to the driver data structure.
3426 *
3427 * return value
3428 * 0 Suspend was successful
3429 * -EFAULT Suspend was not successful
3430 */
6316668f 3431static int mtip_hw_suspend(struct driver_data *dd)
88523a61
SB
3432{
3433 /*
3434 * Send standby immediate (E0h) to the drive
3435 * so that it saves its state.
3436 */
3437 if (mtip_standby_immediate(dd->port) != 0) {
3438 dev_err(&dd->pdev->dev,
3439 "Failed standby-immediate command\n");
3440 return -EFAULT;
3441 }
3442
3443 /* Disable interrupts on the HBA.*/
3444 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
3445 dd->mmio + HOST_CTL);
3446 mtip_deinit_port(dd->port);
3447
3448 return 0;
3449}
3450
3451/*
3452 * Resume function
3453 *
3454 * This function is called by the Block Layer as the
3455 * system resumes.
3456 *
3457 * @dd Pointer to the driver data structure.
3458 *
3459 * return value
3460 * 0 Resume was successful
3461 * -EFAULT Resume was not successful
3462 */
6316668f 3463static int mtip_hw_resume(struct driver_data *dd)
88523a61
SB
3464{
3465 /* Perform any needed hardware setup steps */
3466 hba_setup(dd);
3467
3468 /* Reset the HBA */
3469 if (mtip_hba_reset(dd) != 0) {
3470 dev_err(&dd->pdev->dev,
3471 "Unable to reset the HBA\n");
3472 return -EFAULT;
3473 }
3474
3475 /*
3476 * Enable the port, DMA engine, and FIS reception specific
3477 * h/w in controller.
3478 */
3479 mtip_init_port(dd->port);
3480 mtip_start_port(dd->port);
3481
3482 /* Enable interrupts on the HBA.*/
3483 writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
3484 dd->mmio + HOST_CTL);
3485
3486 return 0;
3487}
3488
88523a61
SB
3489/*
3490 * Helper function for reusing disk name
3491 * upon hot insertion.
3492 */
3493static int rssd_disk_name_format(char *prefix,
3494 int index,
3495 char *buf,
3496 int buflen)
3497{
3498 const int base = 'z' - 'a' + 1;
3499 char *begin = buf + strlen(prefix);
3500 char *end = buf + buflen;
3501 char *p;
3502 int unit;
3503
3504 p = end - 1;
3505 *p = '\0';
3506 unit = base;
3507 do {
3508 if (p == begin)
3509 return -EINVAL;
3510 *--p = 'a' + (index % unit);
3511 index = (index / unit) - 1;
3512 } while (index >= 0);
3513
3514 memmove(begin, p, end - p);
3515 memcpy(buf, prefix, strlen(prefix));
3516
3517 return 0;
3518}
3519
3520/*
3521 * Block layer IOCTL handler.
3522 *
3523 * @dev Pointer to the block_device structure.
3524 * @mode ignored
3525 * @cmd IOCTL command passed from the user application.
3526 * @arg Argument passed from the user application.
3527 *
3528 * return value
3529 * 0 IOCTL completed successfully.
3530 * -ENOTTY IOCTL not supported or invalid driver data
3531 * structure pointer.
3532 */
3533static int mtip_block_ioctl(struct block_device *dev,
3534 fmode_t mode,
3535 unsigned cmd,
3536 unsigned long arg)
3537{
3538 struct driver_data *dd = dev->bd_disk->private_data;
3539
3540 if (!capable(CAP_SYS_ADMIN))
3541 return -EACCES;
3542
3543 if (!dd)
3544 return -ENOTTY;
3545
8a857a88 3546 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)))
45038367
AT
3547 return -ENOTTY;
3548
88523a61
SB
3549 switch (cmd) {
3550 case BLKFLSBUF:
60ec0eec 3551 return -ENOTTY;
88523a61 3552 default:
ef0f1587 3553 return mtip_hw_ioctl(dd, cmd, arg);
88523a61
SB
3554 }
3555}
3556
16d02c04 3557#ifdef CONFIG_COMPAT
88523a61
SB
3558/*
3559 * Block layer compat IOCTL handler.
3560 *
3561 * @dev Pointer to the block_device structure.
3562 * @mode ignored
3563 * @cmd IOCTL command passed from the user application.
3564 * @arg Argument passed from the user application.
3565 *
3566 * return value
3567 * 0 IOCTL completed successfully.
3568 * -ENOTTY IOCTL not supported or invalid driver data
3569 * structure pointer.
3570 */
3571static int mtip_block_compat_ioctl(struct block_device *dev,
3572 fmode_t mode,
3573 unsigned cmd,
3574 unsigned long arg)
3575{
3576 struct driver_data *dd = dev->bd_disk->private_data;
3577
3578 if (!capable(CAP_SYS_ADMIN))
3579 return -EACCES;
3580
3581 if (!dd)
3582 return -ENOTTY;
3583
8a857a88 3584 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)))
45038367
AT
3585 return -ENOTTY;
3586
88523a61
SB
3587 switch (cmd) {
3588 case BLKFLSBUF:
60ec0eec 3589 return -ENOTTY;
ef0f1587 3590 case HDIO_DRIVE_TASKFILE: {
60ec0eec 3591 struct mtip_compat_ide_task_request_s __user *compat_req_task;
ef0f1587
JA
3592 ide_task_request_t req_task;
3593 int compat_tasksize, outtotal, ret;
3594
60ec0eec
AT
3595 compat_tasksize =
3596 sizeof(struct mtip_compat_ide_task_request_s);
ef0f1587
JA
3597
3598 compat_req_task =
3599 (struct mtip_compat_ide_task_request_s __user *) arg;
3600
3601 if (copy_from_user(&req_task, (void __user *) arg,
60ec0eec 3602 compat_tasksize - (2 * sizeof(compat_long_t))))
ef0f1587
JA
3603 return -EFAULT;
3604
3605 if (get_user(req_task.out_size, &compat_req_task->out_size))
3606 return -EFAULT;
3607
3608 if (get_user(req_task.in_size, &compat_req_task->in_size))
3609 return -EFAULT;
3610
3611 outtotal = sizeof(struct mtip_compat_ide_task_request_s);
3612
3613 ret = exec_drive_taskfile(dd, (void __user *) arg,
3614 &req_task, outtotal);
3615
3616 if (copy_to_user((void __user *) arg, &req_task,
3617 compat_tasksize -
3618 (2 * sizeof(compat_long_t))))
3619 return -EFAULT;
3620
3621 if (put_user(req_task.out_size, &compat_req_task->out_size))
3622 return -EFAULT;
3623
3624 if (put_user(req_task.in_size, &compat_req_task->in_size))
3625 return -EFAULT;
3626
3627 return ret;
3628 }
88523a61 3629 default:
ef0f1587 3630 return mtip_hw_ioctl(dd, cmd, arg);
88523a61
SB
3631 }
3632}
16d02c04 3633#endif
88523a61
SB
3634
3635/*
3636 * Obtain the geometry of the device.
3637 *
3638 * You may think that this function is obsolete, but some applications,
3639 * fdisk for example still used CHS values. This function describes the
3640 * device as having 224 heads and 56 sectors per cylinder. These values are
3641 * chosen so that each cylinder is aligned on a 4KB boundary. Since a
3642 * partition is described in terms of a start and end cylinder this means
3643 * that each partition is also 4KB aligned. Non-aligned partitions adversely
3644 * affects performance.
3645 *
3646 * @dev Pointer to the block_device strucutre.
3647 * @geo Pointer to a hd_geometry structure.
3648 *
3649 * return value
3650 * 0 Operation completed successfully.
3651 * -ENOTTY An error occurred while reading the drive capacity.
3652 */
3653static int mtip_block_getgeo(struct block_device *dev,
3654 struct hd_geometry *geo)
3655{
3656 struct driver_data *dd = dev->bd_disk->private_data;
3657 sector_t capacity;
3658
3659 if (!dd)
3660 return -ENOTTY;
3661
3662 if (!(mtip_hw_get_capacity(dd, &capacity))) {
3663 dev_warn(&dd->pdev->dev,
3664 "Could not get drive capacity.\n");
3665 return -ENOTTY;
3666 }
3667
3668 geo->heads = 224;
3669 geo->sectors = 56;
60ec0eec 3670 sector_div(capacity, (geo->heads * geo->sectors));
88523a61 3671 geo->cylinders = capacity;
88523a61
SB
3672 return 0;
3673}
3674
3675/*
3676 * Block device operation function.
3677 *
3678 * This structure contains pointers to the functions required by the block
3679 * layer.
3680 */
3681static const struct block_device_operations mtip_block_ops = {
3682 .ioctl = mtip_block_ioctl,
16d02c04 3683#ifdef CONFIG_COMPAT
88523a61 3684 .compat_ioctl = mtip_block_compat_ioctl,
16d02c04 3685#endif
88523a61
SB
3686 .getgeo = mtip_block_getgeo,
3687 .owner = THIS_MODULE
3688};
3689
3690/*
3691 * Block layer make request function.
3692 *
3693 * This function is called by the kernel to process a BIO for
3694 * the P320 device.
3695 *
3696 * @queue Pointer to the request queue. Unused other than to obtain
3697 * the driver data structure.
ffc771b3 3698 * @rq Pointer to the request.
88523a61 3699 *
88523a61 3700 */
ffc771b3 3701static int mtip_submit_request(struct blk_mq_hw_ctx *hctx, struct request *rq)
88523a61 3702{
ffc771b3
JA
3703 struct driver_data *dd = hctx->queue->queuedata;
3704 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3705 unsigned int nents;
88523a61 3706
c74b0f58
AT
3707 if (unlikely(dd->dd_flag & MTIP_DDF_STOP_IO)) {
3708 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
3709 &dd->dd_flag))) {
ffc771b3 3710 return -ENXIO;
c74b0f58
AT
3711 }
3712 if (unlikely(test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag))) {
ffc771b3 3713 return -ENODATA;
c74b0f58
AT
3714 }
3715 if (unlikely(test_bit(MTIP_DDF_WRITE_PROTECT_BIT,
3716 &dd->dd_flag) &&
ffc771b3
JA
3717 rq_data_dir(rq))) {
3718 return -ENODATA;
8f8b8995 3719 }
ffc771b3
JA
3720 if (unlikely(test_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag)))
3721 return -ENODATA;
3722 if (test_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag))
3723 return -ENXIO;
45038367
AT
3724 }
3725
ffc771b3
JA
3726 if (rq->cmd_flags & REQ_DISCARD) {
3727 int err;
15283469 3728
ffc771b3 3729 err = mtip_send_trim(dd, blk_rq_pos(rq), blk_rq_sectors(rq));
c8a446ad 3730 blk_mq_end_request(rq, err);
ffc771b3 3731 return 0;
88523a61
SB
3732 }
3733
ffc771b3
JA
3734 /* Create the scatter list for this request. */
3735 nents = blk_rq_map_sg(hctx->queue, rq, cmd->sg);
3736
3737 /* Issue the read/write. */
3738 mtip_hw_submit_io(dd, rq, cmd, nents, hctx);
3739 return 0;
3740}
3741
3742static bool mtip_check_unal_depth(struct blk_mq_hw_ctx *hctx,
3743 struct request *rq)
3744{
3745 struct driver_data *dd = hctx->queue->queuedata;
3746 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3747
f45c40a9 3748 if (rq_data_dir(rq) == READ || !dd->unal_qdepth)
ffc771b3
JA
3749 return false;
3750
3751 /*
3752 * If unaligned depth must be limited on this controller, mark it
3753 * as unaligned if the IO isn't on a 4k boundary (start of length).
3754 */
3755 if (blk_rq_sectors(rq) <= 64) {
3756 if ((blk_rq_pos(rq) & 7) || (blk_rq_sectors(rq) & 7))
3757 cmd->unaligned = 1;
2077d947
AT
3758 }
3759
ffc771b3
JA
3760 if (cmd->unaligned && down_trylock(&dd->port->cmd_slot_unal))
3761 return true;
88523a61 3762
ffc771b3
JA
3763 return false;
3764}
88523a61 3765
74c45052
JA
3766static int mtip_queue_rq(struct blk_mq_hw_ctx *hctx,
3767 const struct blk_mq_queue_data *bd)
ffc771b3 3768{
74c45052 3769 struct request *rq = bd->rq;
ffc771b3 3770 int ret;
88523a61 3771
f45c40a9 3772 if (unlikely(mtip_check_unal_depth(hctx, rq)))
ffc771b3
JA
3773 return BLK_MQ_RQ_QUEUE_BUSY;
3774
e2490073
CH
3775 blk_mq_start_request(rq);
3776
ffc771b3 3777 ret = mtip_submit_request(hctx, rq);
f45c40a9 3778 if (likely(!ret))
ffc771b3
JA
3779 return BLK_MQ_RQ_QUEUE_OK;
3780
3781 rq->errors = ret;
3782 return BLK_MQ_RQ_QUEUE_ERROR;
88523a61
SB
3783}
3784
ffc771b3
JA
3785static void mtip_free_cmd(void *data, struct request *rq,
3786 unsigned int hctx_idx, unsigned int request_idx)
3787{
3788 struct driver_data *dd = data;
3789 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3790
3791 if (!cmd->command)
3792 return;
3793
3794 dmam_free_coherent(&dd->pdev->dev, CMD_DMA_ALLOC_SZ,
3795 cmd->command, cmd->command_dma);
3796}
3797
3798static int mtip_init_cmd(void *data, struct request *rq, unsigned int hctx_idx,
3799 unsigned int request_idx, unsigned int numa_node)
3800{
3801 struct driver_data *dd = data;
3802 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3803 u32 host_cap_64 = readl(dd->mmio + HOST_CAP) & HOST_CAP_64;
3804
3805 cmd->command = dmam_alloc_coherent(&dd->pdev->dev, CMD_DMA_ALLOC_SZ,
3806 &cmd->command_dma, GFP_KERNEL);
3807 if (!cmd->command)
3808 return -ENOMEM;
3809
3810 memset(cmd->command, 0, CMD_DMA_ALLOC_SZ);
3811
3812 /* Point the command headers at the command tables. */
3813 cmd->command_header = dd->port->command_list +
3814 (sizeof(struct mtip_cmd_hdr) * request_idx);
3815 cmd->command_header_dma = dd->port->command_list_dma +
3816 (sizeof(struct mtip_cmd_hdr) * request_idx);
3817
3818 if (host_cap_64)
3819 cmd->command_header->ctbau = __force_bit2int cpu_to_le32((cmd->command_dma >> 16) >> 16);
3820
3821 cmd->command_header->ctba = __force_bit2int cpu_to_le32(cmd->command_dma & 0xFFFFFFFF);
3822
3823 sg_init_table(cmd->sg, MTIP_MAX_SG);
3824 return 0;
3825}
3826
3827static struct blk_mq_ops mtip_mq_ops = {
3828 .queue_rq = mtip_queue_rq,
3829 .map_queue = blk_mq_map_queue,
ffc771b3
JA
3830 .init_request = mtip_init_cmd,
3831 .exit_request = mtip_free_cmd,
3832};
3833
88523a61
SB
3834/*
3835 * Block layer initialization function.
3836 *
3837 * This function is called once by the PCI layer for each P320
3838 * device that is connected to the system.
3839 *
3840 * @dd Pointer to the driver data structure.
3841 *
3842 * return value
3843 * 0 on success else an error code.
3844 */
6316668f 3845static int mtip_block_initialize(struct driver_data *dd)
88523a61 3846{
62ee8c13 3847 int rv = 0, wait_for_rebuild = 0;
88523a61
SB
3848 sector_t capacity;
3849 unsigned int index = 0;
3850 struct kobject *kobj;
60ec0eec 3851 unsigned char thd_name[16];
88523a61 3852
62ee8c13
AT
3853 if (dd->disk)
3854 goto skip_create_disk; /* hw init done, before rebuild */
3855
ffc771b3 3856 if (mtip_hw_init(dd)) {
88523a61
SB
3857 rv = -EINVAL;
3858 goto protocol_init_error;
3859 }
3860
16c906e5 3861 dd->disk = alloc_disk_node(MTIP_MAX_MINORS, dd->numa_node);
88523a61
SB
3862 if (dd->disk == NULL) {
3863 dev_err(&dd->pdev->dev,
3864 "Unable to allocate gendisk structure\n");
3865 rv = -EINVAL;
3866 goto alloc_disk_error;
3867 }
3868
3869 /* Generate the disk name, implemented same as in sd.c */
3870 do {
3871 if (!ida_pre_get(&rssd_index_ida, GFP_KERNEL))
3872 goto ida_get_error;
3873
3874 spin_lock(&rssd_index_lock);
3875 rv = ida_get_new(&rssd_index_ida, &index);
3876 spin_unlock(&rssd_index_lock);
3877 } while (rv == -EAGAIN);
3878
3879 if (rv)
3880 goto ida_get_error;
3881
3882 rv = rssd_disk_name_format("rssd",
3883 index,
3884 dd->disk->disk_name,
3885 DISK_NAME_LEN);
3886 if (rv)
3887 goto disk_index_error;
3888
3889 dd->disk->driverfs_dev = &dd->pdev->dev;
3890 dd->disk->major = dd->major;
3891 dd->disk->first_minor = dd->instance * MTIP_MAX_MINORS;
3892 dd->disk->fops = &mtip_block_ops;
88523a61 3893 dd->disk->private_data = dd;
88523a61
SB
3894 dd->index = index;
3895
8f8b8995
AT
3896 mtip_hw_debugfs_init(dd);
3897
62ee8c13 3898skip_create_disk:
ffc771b3
JA
3899 memset(&dd->tags, 0, sizeof(dd->tags));
3900 dd->tags.ops = &mtip_mq_ops;
3901 dd->tags.nr_hw_queues = 1;
3902 dd->tags.queue_depth = MTIP_MAX_COMMAND_SLOTS;
3903 dd->tags.reserved_tags = 1;
3904 dd->tags.cmd_size = sizeof(struct mtip_cmd);
3905 dd->tags.numa_node = dd->numa_node;
3906 dd->tags.flags = BLK_MQ_F_SHOULD_MERGE;
3907 dd->tags.driver_data = dd;
3908
3909 rv = blk_mq_alloc_tag_set(&dd->tags);
3910 if (rv) {
3911 dev_err(&dd->pdev->dev,
3912 "Unable to allocate request queue\n");
ffc771b3
JA
3913 goto block_queue_alloc_init_error;
3914 }
3915
62ee8c13 3916 /* Allocate the request queue. */
ffc771b3 3917 dd->queue = blk_mq_init_queue(&dd->tags);
a8a642cc 3918 if (IS_ERR(dd->queue)) {
62ee8c13
AT
3919 dev_err(&dd->pdev->dev,
3920 "Unable to allocate request queue\n");
3921 rv = -ENOMEM;
3922 goto block_queue_alloc_init_error;
3923 }
3924
62ee8c13
AT
3925 dd->disk->queue = dd->queue;
3926 dd->queue->queuedata = dd;
3927
ffc771b3
JA
3928 /* Initialize the protocol layer. */
3929 wait_for_rebuild = mtip_hw_get_identify(dd);
3930 if (wait_for_rebuild < 0) {
3931 dev_err(&dd->pdev->dev,
3932 "Protocol layer initialization failed\n");
3933 rv = -EINVAL;
3934 goto init_hw_cmds_error;
3935 }
3936
3937 /*
3938 * if rebuild pending, start the service thread, and delay the block
3939 * queue creation and add_disk()
3940 */
3941 if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC)
3942 goto start_service_thread;
3943
62ee8c13
AT
3944 /* Set device limits. */
3945 set_bit(QUEUE_FLAG_NONROT, &dd->queue->queue_flags);
b277da0a 3946 clear_bit(QUEUE_FLAG_ADD_RANDOM, &dd->queue->queue_flags);
62ee8c13
AT
3947 blk_queue_max_segments(dd->queue, MTIP_MAX_SG);
3948 blk_queue_physical_block_size(dd->queue, 4096);
6c8ab698
AT
3949 blk_queue_max_hw_sectors(dd->queue, 0xffff);
3950 blk_queue_max_segment_size(dd->queue, 0x400000);
62ee8c13 3951 blk_queue_io_min(dd->queue, 4096);
1044b1bb 3952 blk_queue_bounce_limit(dd->queue, dd->pdev->dma_mask);
6c8ab698 3953
4e8670e2
AT
3954 /*
3955 * write back cache is not supported in the device. FUA depends on
3956 * write back cache support, hence setting flush support to zero.
3957 */
62ee8c13
AT
3958 blk_queue_flush(dd->queue, 0);
3959
15283469
AT
3960 /* Signal trim support */
3961 if (dd->trim_supp == true) {
3962 set_bit(QUEUE_FLAG_DISCARD, &dd->queue->queue_flags);
3963 dd->queue->limits.discard_granularity = 4096;
3964 blk_queue_max_discard_sectors(dd->queue,
3965 MTIP_MAX_TRIM_ENTRY_LEN * MTIP_MAX_TRIM_ENTRIES);
3966 dd->queue->limits.discard_zeroes_data = 0;
3967 }
3968
88523a61
SB
3969 /* Set the capacity of the device in 512 byte sectors. */
3970 if (!(mtip_hw_get_capacity(dd, &capacity))) {
3971 dev_warn(&dd->pdev->dev,
3972 "Could not read drive capacity\n");
3973 rv = -EIO;
3974 goto read_capacity_error;
3975 }
3976 set_capacity(dd->disk, capacity);
3977
3978 /* Enable the block device and add it to /dev */
3979 add_disk(dd->disk);
3980
8f8b8995 3981 dd->bdev = bdget_disk(dd->disk, 0);
88523a61
SB
3982 /*
3983 * Now that the disk is active, initialize any sysfs attributes
3984 * managed by the protocol layer.
3985 */
3986 kobj = kobject_get(&disk_to_dev(dd->disk)->kobj);
3987 if (kobj) {
3988 mtip_hw_sysfs_init(dd, kobj);
3989 kobject_put(kobj);
3990 }
3991
45038367 3992 if (dd->mtip_svc_handler) {
8a857a88 3993 set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag);
62ee8c13 3994 return rv; /* service thread created for handling rebuild */
45038367 3995 }
62ee8c13
AT
3996
3997start_service_thread:
60ec0eec 3998 sprintf(thd_name, "mtip_svc_thd_%02d", index);
16c906e5 3999 dd->mtip_svc_handler = kthread_create_on_node(mtip_service_thread,
f170168b
KC
4000 dd, dd->numa_node, "%s",
4001 thd_name);
60ec0eec
AT
4002
4003 if (IS_ERR(dd->mtip_svc_handler)) {
c74b0f58 4004 dev_err(&dd->pdev->dev, "service thread failed to start\n");
60ec0eec
AT
4005 dd->mtip_svc_handler = NULL;
4006 rv = -EFAULT;
62ee8c13 4007 goto kthread_run_error;
60ec0eec 4008 }
16c906e5 4009 wake_up_process(dd->mtip_svc_handler);
45038367
AT
4010 if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC)
4011 rv = wait_for_rebuild;
4012
88523a61
SB
4013 return rv;
4014
62ee8c13 4015kthread_run_error:
8f8b8995
AT
4016 bdput(dd->bdev);
4017 dd->bdev = NULL;
7b421d24 4018
62ee8c13 4019 /* Delete our gendisk. This also removes the device from /dev */
88523a61
SB
4020 del_gendisk(dd->disk);
4021
62ee8c13 4022read_capacity_error:
ffc771b3 4023init_hw_cmds_error:
62ee8c13 4024 blk_cleanup_queue(dd->queue);
ffc771b3 4025 blk_mq_free_tag_set(&dd->tags);
62ee8c13 4026block_queue_alloc_init_error:
8f8b8995 4027 mtip_hw_debugfs_exit(dd);
88523a61
SB
4028disk_index_error:
4029 spin_lock(&rssd_index_lock);
4030 ida_remove(&rssd_index_ida, index);
4031 spin_unlock(&rssd_index_lock);
4032
4033ida_get_error:
4034 put_disk(dd->disk);
4035
4036alloc_disk_error:
62ee8c13 4037 mtip_hw_exit(dd); /* De-initialize the protocol layer. */
88523a61
SB
4038
4039protocol_init_error:
4040 return rv;
4041}
4042
4043/*
4044 * Block layer deinitialization function.
4045 *
4046 * Called by the PCI layer as each P320 device is removed.
4047 *
4048 * @dd Pointer to the driver data structure.
4049 *
4050 * return value
4051 * 0
4052 */
6316668f 4053static int mtip_block_remove(struct driver_data *dd)
88523a61
SB
4054{
4055 struct kobject *kobj;
60ec0eec 4056
8f8b8995
AT
4057 if (!dd->sr) {
4058 mtip_hw_debugfs_exit(dd);
60ec0eec 4059
8f8b8995
AT
4060 if (dd->mtip_svc_handler) {
4061 set_bit(MTIP_PF_SVC_THD_STOP_BIT, &dd->port->flags);
4062 wake_up_interruptible(&dd->port->svc_wait);
4063 kthread_stop(dd->mtip_svc_handler);
45038367 4064 }
88523a61 4065
8f8b8995
AT
4066 /* Clean up the sysfs attributes, if created */
4067 if (test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag)) {
4068 kobj = kobject_get(&disk_to_dev(dd->disk)->kobj);
4069 if (kobj) {
4070 mtip_hw_sysfs_exit(dd, kobj);
4071 kobject_put(kobj);
4072 }
4073 }
ffc771b3
JA
4074
4075 mtip_standby_drive(dd);
4076
8f8b8995
AT
4077 /*
4078 * Delete our gendisk structure. This also removes the device
4079 * from /dev
4080 */
4081 if (dd->bdev) {
4082 bdput(dd->bdev);
4083 dd->bdev = NULL;
4084 }
4085 if (dd->disk) {
02b48265 4086 del_gendisk(dd->disk);
8f8b8995 4087 if (dd->disk->queue) {
8f8b8995 4088 blk_cleanup_queue(dd->queue);
ffc771b3 4089 blk_mq_free_tag_set(&dd->tags);
8f8b8995 4090 dd->queue = NULL;
02b48265
ATS
4091 }
4092 put_disk(dd->disk);
8f8b8995
AT
4093 }
4094 dd->disk = NULL;
8182b495 4095
8f8b8995
AT
4096 spin_lock(&rssd_index_lock);
4097 ida_remove(&rssd_index_ida, dd->index);
4098 spin_unlock(&rssd_index_lock);
4099 } else {
4100 dev_info(&dd->pdev->dev, "device %s surprise removal\n",
4101 dd->disk->disk_name);
4102 }
88523a61
SB
4103
4104 /* De-initialize the protocol layer. */
4105 mtip_hw_exit(dd);
4106
4107 return 0;
4108}
4109
4110/*
4111 * Function called by the PCI layer when just before the
4112 * machine shuts down.
4113 *
4114 * If a protocol layer shutdown function is present it will be called
4115 * by this function.
4116 *
4117 * @dd Pointer to the driver data structure.
4118 *
4119 * return value
4120 * 0
4121 */
6316668f 4122static int mtip_block_shutdown(struct driver_data *dd)
88523a61 4123{
ffc771b3
JA
4124 mtip_hw_shutdown(dd);
4125
88523a61 4126 /* Delete our gendisk structure, and cleanup the blk queue. */
58c49df3 4127 if (dd->disk) {
5a79e1ac
AT
4128 dev_info(&dd->pdev->dev,
4129 "Shutting down %s ...\n", dd->disk->disk_name);
4130
02b48265 4131 del_gendisk(dd->disk);
5a79e1ac 4132 if (dd->disk->queue) {
5a79e1ac 4133 blk_cleanup_queue(dd->queue);
ffc771b3 4134 blk_mq_free_tag_set(&dd->tags);
02b48265
ATS
4135 }
4136 put_disk(dd->disk);
5a79e1ac
AT
4137 dd->disk = NULL;
4138 dd->queue = NULL;
58c49df3
AT
4139 }
4140
8182b495
AT
4141 spin_lock(&rssd_index_lock);
4142 ida_remove(&rssd_index_ida, dd->index);
4143 spin_unlock(&rssd_index_lock);
88523a61
SB
4144 return 0;
4145}
4146
6316668f 4147static int mtip_block_suspend(struct driver_data *dd)
88523a61
SB
4148{
4149 dev_info(&dd->pdev->dev,
4150 "Suspending %s ...\n", dd->disk->disk_name);
4151 mtip_hw_suspend(dd);
4152 return 0;
4153}
4154
6316668f 4155static int mtip_block_resume(struct driver_data *dd)
88523a61
SB
4156{
4157 dev_info(&dd->pdev->dev, "Resuming %s ...\n",
4158 dd->disk->disk_name);
4159 mtip_hw_resume(dd);
4160 return 0;
4161}
4162
16c906e5
AT
4163static void drop_cpu(int cpu)
4164{
4165 cpu_use[cpu]--;
4166}
4167
4168static int get_least_used_cpu_on_node(int node)
4169{
4170 int cpu, least_used_cpu, least_cnt;
4171 const struct cpumask *node_mask;
4172
4173 node_mask = cpumask_of_node(node);
4174 least_used_cpu = cpumask_first(node_mask);
4175 least_cnt = cpu_use[least_used_cpu];
4176 cpu = least_used_cpu;
4177
4178 for_each_cpu(cpu, node_mask) {
4179 if (cpu_use[cpu] < least_cnt) {
4180 least_used_cpu = cpu;
4181 least_cnt = cpu_use[cpu];
4182 }
4183 }
4184 cpu_use[least_used_cpu]++;
4185 return least_used_cpu;
4186}
4187
4188/* Helper for selecting a node in round robin mode */
4189static inline int mtip_get_next_rr_node(void)
4190{
4191 static int next_node = -1;
4192
4193 if (next_node == -1) {
4194 next_node = first_online_node;
4195 return next_node;
4196 }
4197
4198 next_node = next_online_node(next_node);
4199 if (next_node == MAX_NUMNODES)
4200 next_node = first_online_node;
4201 return next_node;
4202}
4203
25bac122
FW
4204static DEFINE_HANDLER(0);
4205static DEFINE_HANDLER(1);
4206static DEFINE_HANDLER(2);
4207static DEFINE_HANDLER(3);
4208static DEFINE_HANDLER(4);
4209static DEFINE_HANDLER(5);
4210static DEFINE_HANDLER(6);
4211static DEFINE_HANDLER(7);
16c906e5 4212
d1e714db
AT
4213static void mtip_disable_link_opts(struct driver_data *dd, struct pci_dev *pdev)
4214{
4215 int pos;
4216 unsigned short pcie_dev_ctrl;
4217
4218 pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
4219 if (pos) {
4220 pci_read_config_word(pdev,
4221 pos + PCI_EXP_DEVCTL,
4222 &pcie_dev_ctrl);
4223 if (pcie_dev_ctrl & (1 << 11) ||
4224 pcie_dev_ctrl & (1 << 4)) {
4225 dev_info(&dd->pdev->dev,
4226 "Disabling ERO/No-Snoop on bridge device %04x:%04x\n",
4227 pdev->vendor, pdev->device);
4228 pcie_dev_ctrl &= ~(PCI_EXP_DEVCTL_NOSNOOP_EN |
4229 PCI_EXP_DEVCTL_RELAX_EN);
4230 pci_write_config_word(pdev,
4231 pos + PCI_EXP_DEVCTL,
4232 pcie_dev_ctrl);
4233 }
4234 }
4235}
4236
4237static void mtip_fix_ero_nosnoop(struct driver_data *dd, struct pci_dev *pdev)
4238{
4239 /*
4240 * This workaround is specific to AMD/ATI chipset with a PCI upstream
4241 * device with device id 0x5aXX
4242 */
4243 if (pdev->bus && pdev->bus->self) {
4244 if (pdev->bus->self->vendor == PCI_VENDOR_ID_ATI &&
4245 ((pdev->bus->self->device & 0xff00) == 0x5a00)) {
4246 mtip_disable_link_opts(dd, pdev->bus->self);
4247 } else {
4248 /* Check further up the topology */
4249 struct pci_dev *parent_dev = pdev->bus->self;
4250 if (parent_dev->bus &&
4251 parent_dev->bus->parent &&
4252 parent_dev->bus->parent->self &&
4253 parent_dev->bus->parent->self->vendor ==
4254 PCI_VENDOR_ID_ATI &&
4255 (parent_dev->bus->parent->self->device &
4256 0xff00) == 0x5a00) {
4257 mtip_disable_link_opts(dd,
4258 parent_dev->bus->parent->self);
4259 }
4260 }
4261 }
4262}
4263
88523a61
SB
4264/*
4265 * Called for each supported PCI device detected.
4266 *
4267 * This function allocates the private data structure, enables the
4268 * PCI device and then calls the block layer initialization function.
4269 *
4270 * return value
4271 * 0 on success else an error code.
4272 */
4273static int mtip_pci_probe(struct pci_dev *pdev,
4274 const struct pci_device_id *ent)
4275{
4276 int rv = 0;
4277 struct driver_data *dd = NULL;
16c906e5
AT
4278 char cpu_list[256];
4279 const struct cpumask *node_mask;
4280 int cpu, i = 0, j = 0;
4281 int my_node = NUMA_NO_NODE;
0caff003 4282 unsigned long flags;
88523a61
SB
4283
4284 /* Allocate memory for this devices private data. */
16c906e5
AT
4285 my_node = pcibus_to_node(pdev->bus);
4286 if (my_node != NUMA_NO_NODE) {
4287 if (!node_online(my_node))
4288 my_node = mtip_get_next_rr_node();
4289 } else {
4290 dev_info(&pdev->dev, "Kernel not reporting proximity, choosing a node\n");
4291 my_node = mtip_get_next_rr_node();
4292 }
4293 dev_info(&pdev->dev, "NUMA node %d (closest: %d,%d, probe on %d:%d)\n",
4294 my_node, pcibus_to_node(pdev->bus), dev_to_node(&pdev->dev),
7f328908 4295 cpu_to_node(raw_smp_processor_id()), raw_smp_processor_id());
16c906e5
AT
4296
4297 dd = kzalloc_node(sizeof(struct driver_data), GFP_KERNEL, my_node);
88523a61
SB
4298 if (dd == NULL) {
4299 dev_err(&pdev->dev,
4300 "Unable to allocate memory for driver data\n");
4301 return -ENOMEM;
4302 }
4303
88523a61
SB
4304 /* Attach the private data to this PCI device. */
4305 pci_set_drvdata(pdev, dd);
4306
4307 rv = pcim_enable_device(pdev);
4308 if (rv < 0) {
4309 dev_err(&pdev->dev, "Unable to enable device\n");
4310 goto iomap_err;
4311 }
4312
4313 /* Map BAR5 to memory. */
4314 rv = pcim_iomap_regions(pdev, 1 << MTIP_ABAR, MTIP_DRV_NAME);
4315 if (rv < 0) {
4316 dev_err(&pdev->dev, "Unable to map regions\n");
4317 goto iomap_err;
4318 }
4319
4320 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
4321 rv = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
4322
4323 if (rv) {
4324 rv = pci_set_consistent_dma_mask(pdev,
4325 DMA_BIT_MASK(32));
4326 if (rv) {
4327 dev_warn(&pdev->dev,
4328 "64-bit DMA enable failed\n");
4329 goto setmask_err;
4330 }
4331 }
4332 }
4333
16c906e5
AT
4334 /* Copy the info we may need later into the private data structure. */
4335 dd->major = mtip_major;
4336 dd->instance = instance;
4337 dd->pdev = pdev;
4338 dd->numa_node = my_node;
4339
0caff003
AT
4340 INIT_LIST_HEAD(&dd->online_list);
4341 INIT_LIST_HEAD(&dd->remove_list);
4342
16c906e5
AT
4343 memset(dd->workq_name, 0, 32);
4344 snprintf(dd->workq_name, 31, "mtipq%d", dd->instance);
88523a61 4345
16c906e5
AT
4346 dd->isr_workq = create_workqueue(dd->workq_name);
4347 if (!dd->isr_workq) {
4348 dev_warn(&pdev->dev, "Can't create wq %d\n", dd->instance);
d137c830 4349 rv = -ENOMEM;
16c906e5
AT
4350 goto block_initialize_err;
4351 }
4352
4353 memset(cpu_list, 0, sizeof(cpu_list));
4354
4355 node_mask = cpumask_of_node(dd->numa_node);
4356 if (!cpumask_empty(node_mask)) {
4357 for_each_cpu(cpu, node_mask)
4358 {
4359 snprintf(&cpu_list[j], 256 - j, "%d ", cpu);
4360 j = strlen(cpu_list);
4361 }
4362
4363 dev_info(&pdev->dev, "Node %d on package %d has %d cpu(s): %s\n",
4364 dd->numa_node,
4365 topology_physical_package_id(cpumask_first(node_mask)),
4366 nr_cpus_node(dd->numa_node),
4367 cpu_list);
4368 } else
4369 dev_dbg(&pdev->dev, "mtip32xx: node_mask empty\n");
4370
4371 dd->isr_binding = get_least_used_cpu_on_node(dd->numa_node);
4372 dev_info(&pdev->dev, "Initial IRQ binding node:cpu %d:%d\n",
4373 cpu_to_node(dd->isr_binding), dd->isr_binding);
4374
4375 /* first worker context always runs in ISR */
4376 dd->work[0].cpu_binding = dd->isr_binding;
4377 dd->work[1].cpu_binding = get_least_used_cpu_on_node(dd->numa_node);
4378 dd->work[2].cpu_binding = get_least_used_cpu_on_node(dd->numa_node);
4379 dd->work[3].cpu_binding = dd->work[0].cpu_binding;
4380 dd->work[4].cpu_binding = dd->work[1].cpu_binding;
4381 dd->work[5].cpu_binding = dd->work[2].cpu_binding;
4382 dd->work[6].cpu_binding = dd->work[2].cpu_binding;
4383 dd->work[7].cpu_binding = dd->work[1].cpu_binding;
4384
4385 /* Log the bindings */
4386 for_each_present_cpu(cpu) {
4387 memset(cpu_list, 0, sizeof(cpu_list));
4388 for (i = 0, j = 0; i < MTIP_MAX_SLOT_GROUPS; i++) {
4389 if (dd->work[i].cpu_binding == cpu) {
4390 snprintf(&cpu_list[j], 256 - j, "%d ", i);
4391 j = strlen(cpu_list);
4392 }
4393 }
4394 if (j)
4395 dev_info(&pdev->dev, "CPU %d: WQs %s\n", cpu, cpu_list);
4396 }
4397
4398 INIT_WORK(&dd->work[0].work, mtip_workq_sdbf0);
4399 INIT_WORK(&dd->work[1].work, mtip_workq_sdbf1);
4400 INIT_WORK(&dd->work[2].work, mtip_workq_sdbf2);
4401 INIT_WORK(&dd->work[3].work, mtip_workq_sdbf3);
4402 INIT_WORK(&dd->work[4].work, mtip_workq_sdbf4);
4403 INIT_WORK(&dd->work[5].work, mtip_workq_sdbf5);
4404 INIT_WORK(&dd->work[6].work, mtip_workq_sdbf6);
4405 INIT_WORK(&dd->work[7].work, mtip_workq_sdbf7);
4406
4407 pci_set_master(pdev);
d137c830
WY
4408 rv = pci_enable_msi(pdev);
4409 if (rv) {
88523a61
SB
4410 dev_warn(&pdev->dev,
4411 "Unable to enable MSI interrupt.\n");
cf91f39b 4412 goto msi_initialize_err;
88523a61
SB
4413 }
4414
d1e714db
AT
4415 mtip_fix_ero_nosnoop(dd, pdev);
4416
88523a61
SB
4417 /* Initialize the block layer. */
4418 rv = mtip_block_initialize(dd);
4419 if (rv < 0) {
4420 dev_err(&pdev->dev,
4421 "Unable to initialize block layer\n");
4422 goto block_initialize_err;
4423 }
4424
4425 /*
4426 * Increment the instance count so that each device has a unique
4427 * instance number.
4428 */
4429 instance++;
45038367 4430 if (rv != MTIP_FTL_REBUILD_MAGIC)
8a857a88 4431 set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag);
6b06d35f
AT
4432 else
4433 rv = 0; /* device in rebuild state, return 0 from probe */
0caff003
AT
4434
4435 /* Add to online list even if in ftl rebuild */
4436 spin_lock_irqsave(&dev_lock, flags);
4437 list_add(&dd->online_list, &online_list);
4438 spin_unlock_irqrestore(&dev_lock, flags);
4439
88523a61
SB
4440 goto done;
4441
4442block_initialize_err:
4443 pci_disable_msi(pdev);
cf91f39b
AG
4444
4445msi_initialize_err:
16c906e5
AT
4446 if (dd->isr_workq) {
4447 flush_workqueue(dd->isr_workq);
4448 destroy_workqueue(dd->isr_workq);
4449 drop_cpu(dd->work[0].cpu_binding);
4450 drop_cpu(dd->work[1].cpu_binding);
4451 drop_cpu(dd->work[2].cpu_binding);
4452 }
88523a61
SB
4453setmask_err:
4454 pcim_iounmap_regions(pdev, 1 << MTIP_ABAR);
4455
4456iomap_err:
4457 kfree(dd);
4458 pci_set_drvdata(pdev, NULL);
4459 return rv;
4460done:
88523a61
SB
4461 return rv;
4462}
4463
4464/*
4465 * Called for each probed device when the device is removed or the
4466 * driver is unloaded.
4467 *
4468 * return value
4469 * None
4470 */
4471static void mtip_pci_remove(struct pci_dev *pdev)
4472{
4473 struct driver_data *dd = pci_get_drvdata(pdev);
8f8b8995 4474 unsigned long flags, to;
88523a61 4475
8a857a88 4476 set_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag);
45038367 4477
0caff003
AT
4478 spin_lock_irqsave(&dev_lock, flags);
4479 list_del_init(&dd->online_list);
4480 list_add(&dd->remove_list, &removing_list);
4481 spin_unlock_irqrestore(&dev_lock, flags);
4482
8f8b8995
AT
4483 mtip_check_surprise_removal(pdev);
4484 synchronize_irq(dd->pdev->irq);
4485
4486 /* Spin until workers are done */
4487 to = jiffies + msecs_to_jiffies(4000);
4488 do {
4489 msleep(20);
4490 } while (atomic_read(&dd->irq_workers_active) != 0 &&
4491 time_before(jiffies, to));
4492
4493 if (atomic_read(&dd->irq_workers_active) != 0) {
4494 dev_warn(&dd->pdev->dev,
4495 "Completion workers still active!\n");
88523a61 4496 }
88523a61
SB
4497
4498 /* Clean up the block layer. */
4499 mtip_block_remove(dd);
4500
16c906e5
AT
4501 if (dd->isr_workq) {
4502 flush_workqueue(dd->isr_workq);
4503 destroy_workqueue(dd->isr_workq);
4504 drop_cpu(dd->work[0].cpu_binding);
4505 drop_cpu(dd->work[1].cpu_binding);
4506 drop_cpu(dd->work[2].cpu_binding);
4507 }
4508
88523a61
SB
4509 pci_disable_msi(pdev);
4510
0caff003
AT
4511 spin_lock_irqsave(&dev_lock, flags);
4512 list_del_init(&dd->remove_list);
4513 spin_unlock_irqrestore(&dev_lock, flags);
4514
8f8b8995
AT
4515 if (!dd->sr)
4516 kfree(dd);
4517 else
4518 set_bit(MTIP_DDF_REMOVE_DONE_BIT, &dd->dd_flag);
4519
88523a61 4520 pcim_iounmap_regions(pdev, 1 << MTIP_ABAR);
8f8b8995 4521 pci_set_drvdata(pdev, NULL);
88523a61
SB
4522}
4523
4524/*
4525 * Called for each probed device when the device is suspended.
4526 *
4527 * return value
4528 * 0 Success
4529 * <0 Error
4530 */
4531static int mtip_pci_suspend(struct pci_dev *pdev, pm_message_t mesg)
4532{
4533 int rv = 0;
4534 struct driver_data *dd = pci_get_drvdata(pdev);
4535
4536 if (!dd) {
4537 dev_err(&pdev->dev,
4538 "Driver private datastructure is NULL\n");
4539 return -EFAULT;
4540 }
4541
8a857a88 4542 set_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag);
88523a61
SB
4543
4544 /* Disable ports & interrupts then send standby immediate */
4545 rv = mtip_block_suspend(dd);
4546 if (rv < 0) {
4547 dev_err(&pdev->dev,
4548 "Failed to suspend controller\n");
4549 return rv;
4550 }
4551
4552 /*
4553 * Save the pci config space to pdev structure &
4554 * disable the device
4555 */
4556 pci_save_state(pdev);
4557 pci_disable_device(pdev);
4558
4559 /* Move to Low power state*/
4560 pci_set_power_state(pdev, PCI_D3hot);
4561
4562 return rv;
4563}
4564
4565/*
4566 * Called for each probed device when the device is resumed.
4567 *
4568 * return value
4569 * 0 Success
4570 * <0 Error
4571 */
4572static int mtip_pci_resume(struct pci_dev *pdev)
4573{
4574 int rv = 0;
4575 struct driver_data *dd;
4576
4577 dd = pci_get_drvdata(pdev);
4578 if (!dd) {
4579 dev_err(&pdev->dev,
4580 "Driver private datastructure is NULL\n");
4581 return -EFAULT;
4582 }
4583
4584 /* Move the device to active State */
4585 pci_set_power_state(pdev, PCI_D0);
4586
4587 /* Restore PCI configuration space */
4588 pci_restore_state(pdev);
4589
4590 /* Enable the PCI device*/
4591 rv = pcim_enable_device(pdev);
4592 if (rv < 0) {
4593 dev_err(&pdev->dev,
4594 "Failed to enable card during resume\n");
4595 goto err;
4596 }
4597 pci_set_master(pdev);
4598
4599 /*
4600 * Calls hbaReset, initPort, & startPort function
4601 * then enables interrupts
4602 */
4603 rv = mtip_block_resume(dd);
4604 if (rv < 0)
4605 dev_err(&pdev->dev, "Unable to resume\n");
4606
4607err:
8a857a88 4608 clear_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag);
88523a61
SB
4609
4610 return rv;
4611}
4612
4613/*
4614 * Shutdown routine
4615 *
4616 * return value
4617 * None
4618 */
4619static void mtip_pci_shutdown(struct pci_dev *pdev)
4620{
4621 struct driver_data *dd = pci_get_drvdata(pdev);
4622 if (dd)
4623 mtip_block_shutdown(dd);
4624}
4625
88523a61 4626/* Table of device ids supported by this driver. */
9baa3c34 4627static const struct pci_device_id mtip_pci_tbl[] = {
1a131458
AT
4628 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320H_DEVICE_ID) },
4629 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320M_DEVICE_ID) },
4630 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320S_DEVICE_ID) },
4631 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P325M_DEVICE_ID) },
4632 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P420H_DEVICE_ID) },
4633 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P420M_DEVICE_ID) },
4634 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P425M_DEVICE_ID) },
88523a61
SB
4635 { 0 }
4636};
4637
4638/* Structure that describes the PCI driver functions. */
3ff147d3 4639static struct pci_driver mtip_pci_driver = {
88523a61
SB
4640 .name = MTIP_DRV_NAME,
4641 .id_table = mtip_pci_tbl,
4642 .probe = mtip_pci_probe,
4643 .remove = mtip_pci_remove,
4644 .suspend = mtip_pci_suspend,
4645 .resume = mtip_pci_resume,
4646 .shutdown = mtip_pci_shutdown,
4647};
4648
4649MODULE_DEVICE_TABLE(pci, mtip_pci_tbl);
4650
4651/*
4652 * Module initialization function.
4653 *
4654 * Called once when the module is loaded. This function allocates a major
4655 * block device number to the Cyclone devices and registers the PCI layer
4656 * of the driver.
4657 *
4658 * Return value
4659 * 0 on success else error code.
4660 */
4661static int __init mtip_init(void)
4662{
6d27f09a
RS
4663 int error;
4664
45422e74 4665 pr_info(MTIP_DRV_NAME " Version " MTIP_DRV_VERSION "\n");
88523a61 4666
0caff003
AT
4667 spin_lock_init(&dev_lock);
4668
4669 INIT_LIST_HEAD(&online_list);
4670 INIT_LIST_HEAD(&removing_list);
4671
88523a61 4672 /* Allocate a major block device number to use with this driver. */
6d27f09a
RS
4673 error = register_blkdev(0, MTIP_DRV_NAME);
4674 if (error <= 0) {
45422e74 4675 pr_err("Unable to register block device (%d)\n",
6d27f09a 4676 error);
88523a61
SB
4677 return -EBUSY;
4678 }
6d27f09a 4679 mtip_major = error;
88523a61 4680
0caff003
AT
4681 dfs_parent = debugfs_create_dir("rssd", NULL);
4682 if (IS_ERR_OR_NULL(dfs_parent)) {
4683 pr_warn("Error creating debugfs parent\n");
4684 dfs_parent = NULL;
4685 }
4686 if (dfs_parent) {
4687 dfs_device_status = debugfs_create_file("device_status",
4688 S_IRUGO, dfs_parent, NULL,
4689 &mtip_device_status_fops);
4690 if (IS_ERR_OR_NULL(dfs_device_status)) {
4691 pr_err("Error creating device_status node\n");
4692 dfs_device_status = NULL;
7b421d24
AT
4693 }
4694 }
4695
88523a61 4696 /* Register our PCI operations. */
6d27f09a 4697 error = pci_register_driver(&mtip_pci_driver);
7b421d24
AT
4698 if (error) {
4699 debugfs_remove(dfs_parent);
6d27f09a 4700 unregister_blkdev(mtip_major, MTIP_DRV_NAME);
7b421d24 4701 }
6d27f09a
RS
4702
4703 return error;
88523a61
SB
4704}
4705
4706/*
4707 * Module de-initialization function.
4708 *
4709 * Called once when the module is unloaded. This function deallocates
4710 * the major block device number allocated by mtip_init() and
4711 * unregisters the PCI layer of the driver.
4712 *
4713 * Return value
4714 * none
4715 */
4716static void __exit mtip_exit(void)
4717{
4718 /* Release the allocated major block device number. */
4719 unregister_blkdev(mtip_major, MTIP_DRV_NAME);
4720
4721 /* Unregister the PCI driver. */
4722 pci_unregister_driver(&mtip_pci_driver);
af5ded8c
AT
4723
4724 debugfs_remove_recursive(dfs_parent);
88523a61
SB
4725}
4726
4727MODULE_AUTHOR("Micron Technology, Inc");
4728MODULE_DESCRIPTION("Micron RealSSD PCIe Block Driver");
4729MODULE_LICENSE("GPL");
4730MODULE_VERSION(MTIP_DRV_VERSION);
4731
4732module_init(mtip_init);
4733module_exit(mtip_exit);