]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blame - drivers/char/mxser.c
projects / mirror_ubuntu-bionic-kernel.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Char: mxser, remove predefined isa support
[mirror_ubuntu-bionic-kernel.git] / drivers / char / mxser.c
CommitLineData
1da177e4
LT		 1/*
2 * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
3 *
80ff8a80
JS		 4 * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com).
5 * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com>
1da177e4 6 *
1c45607a
JS		 7 * This code is loosely based on the 1.8 moxa driver which is based on
8 * Linux serial driver, written by Linus Torvalds, Theodore T'so and
9 * others.
1da177e4
LT		 10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
8ea2c2ec 14 * (at your option) any later version.
1da177e4 15 *
1da177e4
LT		 16 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
17 * <alan@redhat.com>. The original 1.8 code is available on www.moxa.com.
18 * - Fixed x86_64 cleanness
1da177e4
LT		 19 */
20
1da177e4 21#include <linux/module.h>
1da177e4
LT		 22#include <linux/errno.h>
23#include <linux/signal.h>
24#include <linux/sched.h>
25#include <linux/timer.h>
26#include <linux/interrupt.h>
27#include <linux/tty.h>
28#include <linux/tty_flip.h>
29#include <linux/serial.h>
30#include <linux/serial_reg.h>
31#include <linux/major.h>
32#include <linux/string.h>
33#include <linux/fcntl.h>
34#include <linux/ptrace.h>
35#include <linux/gfp.h>
36#include <linux/ioport.h>
37#include <linux/mm.h>
1da177e4
LT		 38#include <linux/delay.h>
39#include <linux/pci.h>
1977f032 40#include <linux/bitops.h>
1da177e4
LT		 41
42#include <asm/system.h>
43#include <asm/io.h>
44#include <asm/irq.h>
1da177e4
LT		 45#include <asm/uaccess.h>
46
47#include "mxser.h"
48
e129deff 49#define MXSER_VERSION "2.0.4" /* 1.12 */
1da177e4
LT		 50#define MXSERMAJOR 174
51#define MXSERCUMAJOR 175
52
1da177e4 53#define MXSER_BOARDS 4 /* Max. boards */
1da177e4 54#define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
1c45607a
JS		 55#define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD)
56#define MXSER_ISR_PASS_LIMIT 100
1da177e4 57
1c45607a
JS		 58/*CheckIsMoxaMust return value*/
59#define MOXA_OTHER_UART 0x00
60#define MOXA_MUST_MU150_HWID 0x01
61#define MOXA_MUST_MU860_HWID 0x02
62
1da177e4
LT		 63#define WAKEUP_CHARS 256
64
65#define UART_MCR_AFE 0x20
66#define UART_LSR_SPECIAL 0x1E
67
e129deff 68#define PCI_DEVICE_ID_POS104UL 0x1044
1c45607a 69#define PCI_DEVICE_ID_CB108 0x1080
e129deff 70#define PCI_DEVICE_ID_CP102UF 0x1023
1c45607a 71#define PCI_DEVICE_ID_CB114 0x1142
80ff8a80 72#define PCI_DEVICE_ID_CP114UL 0x1143
1c45607a
JS		 73#define PCI_DEVICE_ID_CB134I 0x1341
74#define PCI_DEVICE_ID_CP138U 0x1380
1da177e4 75
1da177e4
LT		 76
77#define C168_ASIC_ID 1
78#define C104_ASIC_ID 2
79#define C102_ASIC_ID 0xB
80#define CI132_ASIC_ID 4
81#define CI134_ASIC_ID 3
82#define CI104J_ASIC_ID 5
83
1c45607a
JS		 84#define MXSER_HIGHBAUD 1
85#define MXSER_HAS2 2
1da177e4 86
8ea2c2ec 87/* This is only for PCI */
1c45607a 88static const struct {
1da177e4
LT		 89 int type;
90 int tx_fifo;
91 int rx_fifo;
92 int xmit_fifo_size;
93 int rx_high_water;
94 int rx_trigger;
95 int rx_low_water;
96 long max_baud;
1c45607a 97} Gpci_uart_info[] = {
1da177e4
LT		 98 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
99 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
100 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
101};
1c45607a 102#define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info)
1da177e4 103
1c45607a
JS		 104struct mxser_cardinfo {
105 char *name;
106 unsigned int nports;
107 unsigned int flags;
108};
1da177e4 109
1c45607a
JS		 110static const struct mxser_cardinfo mxser_cards[] = {
111/* 0*/ { "C168 series", 8, },
112 { "C104 series", 4, },
113 { "CI-104J series", 4, },
114 { "C168H/PCI series", 8, },
115 { "C104H/PCI series", 4, },
116/* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */
117 { "CI-132 series", 4, MXSER_HAS2 },
118 { "CI-134 series", 4, },
119 { "CP-132 series", 2, },
120 { "CP-114 series", 4, },
121/*10*/ { "CT-114 series", 4, },
122 { "CP-102 series", 2, MXSER_HIGHBAUD },
123 { "CP-104U series", 4, },
124 { "CP-168U series", 8, },
125 { "CP-132U series", 2, },
126/*15*/ { "CP-134U series", 4, },
127 { "CP-104JU series", 4, },
128 { "Moxa UC7000 Serial", 8, }, /* RC7000 */
129 { "CP-118U series", 8, },
130 { "CP-102UL series", 2, },
131/*20*/ { "CP-102U series", 2, },
132 { "CP-118EL series", 8, },
133 { "CP-168EL series", 8, },
134 { "CP-104EL series", 4, },
135 { "CB-108 series", 8, },
136/*25*/ { "CB-114 series", 4, },
137 { "CB-134I series", 4, },
138 { "CP-138U series", 8, },
80ff8a80 139 { "POS-104UL series", 4, },
e129deff
JS		 140 { "CP-114UL series", 4, },
141/*30*/ { "CP-102UF series", 2, }
1c45607a 142};
1da177e4 143
1c45607a
JS		 144/* driver_data correspond to the lines in the structure above
145 see also ISA probe function before you change something */
1da177e4 146static struct pci_device_id mxser_pcibrds[] = {
1c45607a
JS		 147 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 },
148 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 },
149 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 },
150 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 },
151 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 },
152 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 },
153 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 },
154 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 },
155 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 },
156 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 },
157 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 },
158 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 },
159 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 },
160 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 },
161 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 },
162 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 },
163 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 },
164 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 },
165 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 },
166 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 },
167 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 },
168 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 },
169 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 },
80ff8a80 170 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 },
e129deff 171 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 },
1c45607a 172 { }
1da177e4 173};
1da177e4
LT		 174MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
175
1df00924 176static unsigned long ioaddr[MXSER_BOARDS];
1da177e4 177static int ttymajor = MXSERMAJOR;
1da177e4
LT		 178
179/* Variables for insmod */
180
181MODULE_AUTHOR("Casper Yang");
182MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
1df00924
JS		 183module_param_array(ioaddr, ulong, NULL, 0);
184MODULE_PARM_DESC(ioaddr, "ISA io addresses to look for a moxa board");
8d3b33f6 185module_param(ttymajor, int, 0);
1da177e4
LT		 186MODULE_LICENSE("GPL");
187
188struct mxser_log {
189 int tick;
190 unsigned long rxcnt[MXSER_PORTS];
191 unsigned long txcnt[MXSER_PORTS];
192};
193
194
195struct mxser_mon {
196 unsigned long rxcnt;
197 unsigned long txcnt;
198 unsigned long up_rxcnt;
199 unsigned long up_txcnt;
200 int modem_status;
201 unsigned char hold_reason;
202};
203
204struct mxser_mon_ext {
205 unsigned long rx_cnt[32];
206 unsigned long tx_cnt[32];
207 unsigned long up_rxcnt[32];
208 unsigned long up_txcnt[32];
209 int modem_status[32];
210
211 long baudrate[32];
212 int databits[32];
213 int stopbits[32];
214 int parity[32];
215 int flowctrl[32];
216 int fifo[32];
217 int iftype[32];
218};
8ea2c2ec 219
1c45607a
JS		 220struct mxser_board;
221
222struct mxser_port {
0ad9e7d1 223 struct tty_port port;
1c45607a 224 struct mxser_board *board;
1c45607a
JS		 225
226 unsigned long ioaddr;
227 unsigned long opmode_ioaddr;
228 int max_baud;
1da177e4 229
1da177e4
LT		 230 int rx_high_water;
231 int rx_trigger; /* Rx fifo trigger level */
232 int rx_low_water;
233 int baud_base; /* max. speed */
1da177e4 234 int type; /* UART type */
1c45607a 235
1da177e4 236 int x_char; /* xon/xoff character */
1da177e4
LT		 237 int IER; /* Interrupt Enable Register */
238 int MCR; /* Modem control register */
1c45607a
JS		 239
240 unsigned char stop_rx;
241 unsigned char ldisc_stop_rx;
242
243 int custom_divisor;
1c45607a 244 unsigned char err_shadow;
1c45607a 245
1c45607a
JS		 246 struct async_icount icount; /* kernel counters for 4 input interrupts */
247 int timeout;
248
249 int read_status_mask;
250 int ignore_status_mask;
251 int xmit_fifo_size;
1da177e4
LT		 252 int xmit_head;
253 int xmit_tail;
254 int xmit_cnt;
1c45607a 255
606d099c 256 struct ktermios normal_termios;
1c45607a 257
1da177e4 258 struct mxser_mon mon_data;
1c45607a 259
1da177e4 260 spinlock_t slock;
1c45607a
JS		 261 wait_queue_head_t delta_msr_wait;
262};
263
264struct mxser_board {
265 unsigned int idx;
266 int irq;
267 const struct mxser_cardinfo *info;
268 unsigned long vector;
269 unsigned long vector_mask;
270
271 int chip_flag;
272 int uart_type;
273
274 struct mxser_port ports[MXSER_PORTS_PER_BOARD];
1da177e4
LT		 275};
276
1da177e4
LT		 277struct mxser_mstatus {
278 tcflag_t cflag;
279 int cts;
280 int dsr;
281 int ri;
282 int dcd;
283};
284
1c45607a 285static struct mxser_board mxser_boards[MXSER_BOARDS];
1da177e4 286static struct tty_driver *mxvar_sdriver;
1da177e4 287static struct mxser_log mxvar_log;
1da177e4 288static int mxser_set_baud_method[MXSER_PORTS + 1];
1da177e4 289
148ff86b
CH		 290static void mxser_enable_must_enchance_mode(unsigned long baseio)
291{
292 u8 oldlcr;
293 u8 efr;
294
295 oldlcr = inb(baseio + UART_LCR);
296 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
297
298 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
299 efr |= MOXA_MUST_EFR_EFRB_ENABLE;
300
301 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
302 outb(oldlcr, baseio + UART_LCR);
303}
304
305static void mxser_disable_must_enchance_mode(unsigned long baseio)
306{
307 u8 oldlcr;
308 u8 efr;
309
310 oldlcr = inb(baseio + UART_LCR);
311 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
312
313 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
314 efr &= ~MOXA_MUST_EFR_EFRB_ENABLE;
315
316 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
317 outb(oldlcr, baseio + UART_LCR);
318}
319
320static void mxser_set_must_xon1_value(unsigned long baseio, u8 value)
321{
322 u8 oldlcr;
323 u8 efr;
324
325 oldlcr = inb(baseio + UART_LCR);
326 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
327
328 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
329 efr &= ~MOXA_MUST_EFR_BANK_MASK;
330 efr |= MOXA_MUST_EFR_BANK0;
331
332 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
333 outb(value, baseio + MOXA_MUST_XON1_REGISTER);
334 outb(oldlcr, baseio + UART_LCR);
335}
336
337static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value)
338{
339 u8 oldlcr;
340 u8 efr;
341
342 oldlcr = inb(baseio + UART_LCR);
343 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
344
345 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
346 efr &= ~MOXA_MUST_EFR_BANK_MASK;
347 efr |= MOXA_MUST_EFR_BANK0;
348
349 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
350 outb(value, baseio + MOXA_MUST_XOFF1_REGISTER);
351 outb(oldlcr, baseio + UART_LCR);
352}
353
354static void mxser_set_must_fifo_value(struct mxser_port *info)
355{
356 u8 oldlcr;
357 u8 efr;
358
359 oldlcr = inb(info->ioaddr + UART_LCR);
360 outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR);
361
362 efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER);
363 efr &= ~MOXA_MUST_EFR_BANK_MASK;
364 efr |= MOXA_MUST_EFR_BANK1;
365
366 outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER);
367 outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER);
368 outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER);
369 outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER);
370 outb(oldlcr, info->ioaddr + UART_LCR);
371}
372
373static void mxser_set_must_enum_value(unsigned long baseio, u8 value)
374{
375 u8 oldlcr;
376 u8 efr;
377
378 oldlcr = inb(baseio + UART_LCR);
379 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
380
381 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
382 efr &= ~MOXA_MUST_EFR_BANK_MASK;
383 efr |= MOXA_MUST_EFR_BANK2;
384
385 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
386 outb(value, baseio + MOXA_MUST_ENUM_REGISTER);
387 outb(oldlcr, baseio + UART_LCR);
388}
389
390static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId)
391{
392 u8 oldlcr;
393 u8 efr;
394
395 oldlcr = inb(baseio + UART_LCR);
396 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
397
398 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
399 efr &= ~MOXA_MUST_EFR_BANK_MASK;
400 efr |= MOXA_MUST_EFR_BANK2;
401
402 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
403 *pId = inb(baseio + MOXA_MUST_HWID_REGISTER);
404 outb(oldlcr, baseio + UART_LCR);
405}
406
407static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio)
408{
409 u8 oldlcr;
410 u8 efr;
411
412 oldlcr = inb(baseio + UART_LCR);
413 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
414
415 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
416 efr &= ~MOXA_MUST_EFR_SF_MASK;
417
418 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
419 outb(oldlcr, baseio + UART_LCR);
420}
421
422static void mxser_enable_must_tx_software_flow_control(unsigned long baseio)
423{
424 u8 oldlcr;
425 u8 efr;
426
427 oldlcr = inb(baseio + UART_LCR);
428 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
429
430 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
431 efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
432 efr |= MOXA_MUST_EFR_SF_TX1;
433
434 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
435 outb(oldlcr, baseio + UART_LCR);
436}
437
438static void mxser_disable_must_tx_software_flow_control(unsigned long baseio)
439{
440 u8 oldlcr;
441 u8 efr;
442
443 oldlcr = inb(baseio + UART_LCR);
444 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
445
446 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
447 efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
448
449 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
450 outb(oldlcr, baseio + UART_LCR);
451}
452
453static void mxser_enable_must_rx_software_flow_control(unsigned long baseio)
454{
455 u8 oldlcr;
456 u8 efr;
457
458 oldlcr = inb(baseio + UART_LCR);
459 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
460
461 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
462 efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
463 efr |= MOXA_MUST_EFR_SF_RX1;
464
465 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
466 outb(oldlcr, baseio + UART_LCR);
467}
468
469static void mxser_disable_must_rx_software_flow_control(unsigned long baseio)
470{
471 u8 oldlcr;
472 u8 efr;
473
474 oldlcr = inb(baseio + UART_LCR);
475 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
476
477 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
478 efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
479
480 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
481 outb(oldlcr, baseio + UART_LCR);
482}
483
b8cc5549 484#ifdef CONFIG_PCI
1c45607a 485static int __devinit CheckIsMoxaMust(unsigned long io)
1da177e4
LT		 486{
487 u8 oldmcr, hwid;
488 int i;
489
490 outb(0, io + UART_LCR);
148ff86b 491 mxser_disable_must_enchance_mode(io);
1da177e4
LT		 492 oldmcr = inb(io + UART_MCR);
493 outb(0, io + UART_MCR);
148ff86b 494 mxser_set_must_xon1_value(io, 0x11);
1da177e4
LT		 495 if ((hwid = inb(io + UART_MCR)) != 0) {
496 outb(oldmcr, io + UART_MCR);
8ea2c2ec 497 return MOXA_OTHER_UART;
1da177e4
LT		 498 }
499
148ff86b 500 mxser_get_must_hardware_id(io, &hwid);
1c45607a
JS		 501 for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */
502 if (hwid == Gpci_uart_info[i].type)
8ea2c2ec 503 return (int)hwid;
1da177e4
LT		 504 }
505 return MOXA_OTHER_UART;
506}
b8cc5549 507#endif
1da177e4 508
1c45607a 509static void process_txrx_fifo(struct mxser_port *info)
1da177e4
LT		 510{
511 int i;
512
513 if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
514 info->rx_trigger = 1;
515 info->rx_high_water = 1;
516 info->rx_low_water = 1;
517 info->xmit_fifo_size = 1;
1c45607a
JS		 518 } else
519 for (i = 0; i < UART_INFO_NUM; i++)
520 if (info->board->chip_flag == Gpci_uart_info[i].type) {
1da177e4
LT		 521 info->rx_trigger = Gpci_uart_info[i].rx_trigger;
522 info->rx_low_water = Gpci_uart_info[i].rx_low_water;
523 info->rx_high_water = Gpci_uart_info[i].rx_high_water;
524 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
525 break;
526 }
1da177e4
LT		 527}
528
1c45607a 529static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
1da177e4 530{
72800df9 531 static unsigned char mxser_msr[MXSER_PORTS + 1];
1c45607a 532 unsigned char status = 0;
1da177e4 533
1c45607a 534 status = inb(baseaddr + UART_MSR);
1da177e4 535
1c45607a
JS		 536 mxser_msr[port] &= 0x0F;
537 mxser_msr[port] |= status;
538 status = mxser_msr[port];
539 if (mode)
540 mxser_msr[port] = 0;
1da177e4 541
1c45607a
JS		 542 return status;
543}
1da177e4 544
1c45607a
JS		 545static int mxser_block_til_ready(struct tty_struct *tty, struct file *filp,
546 struct mxser_port *port)
547{
548 DECLARE_WAITQUEUE(wait, current);
549 int retval;
550 int do_clocal = 0;
551 unsigned long flags;
1da177e4 552
1c45607a
JS		 553 /*
554 * If non-blocking mode is set, or the port is not enabled,
555 * then make the check up front and then exit.
556 */
557 if ((filp->f_flags & O_NONBLOCK) ||
558 test_bit(TTY_IO_ERROR, &tty->flags)) {
0ad9e7d1 559 port->port.flags |= ASYNC_NORMAL_ACTIVE;
1c45607a
JS		 560 return 0;
561 }
1da177e4 562
1c45607a
JS		 563 if (tty->termios->c_cflag & CLOCAL)
564 do_clocal = 1;
1da177e4 565
1da177e4 566 /*
1c45607a
JS		 567 * Block waiting for the carrier detect and the line to become
568 * free (i.e., not in use by the callout). While we are in
0ad9e7d1 569 * this loop, port->port.count is dropped by one, so that
1c45607a
JS		 570 * mxser_close() knows when to free things. We restore it upon
571 * exit, either normal or abnormal.
1da177e4 572 */
1c45607a 573 retval = 0;
0ad9e7d1 574 add_wait_queue(&port->port.open_wait, &wait);
1da177e4 575
1c45607a
JS		 576 spin_lock_irqsave(&port->slock, flags);
577 if (!tty_hung_up_p(filp))
0ad9e7d1 578 port->port.count--;
1c45607a 579 spin_unlock_irqrestore(&port->slock, flags);
0ad9e7d1 580 port->port.blocked_open++;
1c45607a
JS		 581 while (1) {
582 spin_lock_irqsave(&port->slock, flags);
583 outb(inb(port->ioaddr + UART_MCR) |
584 UART_MCR_DTR | UART_MCR_RTS, port->ioaddr + UART_MCR);
585 spin_unlock_irqrestore(&port->slock, flags);
586 set_current_state(TASK_INTERRUPTIBLE);
0ad9e7d1
AC		 587 if (tty_hung_up_p(filp) || !(port->port.flags & ASYNC_INITIALIZED)) {
588 if (port->port.flags & ASYNC_HUP_NOTIFY)
1c45607a
JS		 589 retval = -EAGAIN;
590 else
591 retval = -ERESTARTSYS;
592 break;
593 }
0ad9e7d1 594 if (!(port->port.flags & ASYNC_CLOSING) &&
1c45607a
JS		 595 (do_clocal ||
596 (inb(port->ioaddr + UART_MSR) & UART_MSR_DCD)))
597 break;
598 if (signal_pending(current)) {
599 retval = -ERESTARTSYS;
600 break;
601 }
602 schedule();
1da177e4 603 }
1c45607a 604 set_current_state(TASK_RUNNING);
0ad9e7d1 605 remove_wait_queue(&port->port.open_wait, &wait);
1c45607a 606 if (!tty_hung_up_p(filp))
0ad9e7d1
AC		 607 port->port.count++;
608 port->port.blocked_open--;
1c45607a 609 if (retval)
1da177e4 610 return retval;
0ad9e7d1 611 port->port.flags |= ASYNC_NORMAL_ACTIVE;
1da177e4
LT		 612 return 0;
613}
614
1c45607a 615static int mxser_set_baud(struct mxser_port *info, long newspd)
1da177e4 616{
1c45607a
JS		 617 int quot = 0, baud;
618 unsigned char cval;
1da177e4 619
0ad9e7d1 620 if (!info->port.tty || !info->port.tty->termios)
1c45607a 621 return -1;
1da177e4 622
1c45607a
JS		 623 if (!(info->ioaddr))
624 return -1;
1da177e4 625
1c45607a
JS		 626 if (newspd > info->max_baud)
627 return -1;
1da177e4 628
1c45607a
JS		 629 if (newspd == 134) {
630 quot = 2 * info->baud_base / 269;
0ad9e7d1 631 tty_encode_baud_rate(info->port.tty, 134, 134);
1c45607a
JS		 632 } else if (newspd) {
633 quot = info->baud_base / newspd;
634 if (quot == 0)
635 quot = 1;
636 baud = info->baud_base/quot;
0ad9e7d1 637 tty_encode_baud_rate(info->port.tty, baud, baud);
1c45607a
JS		 638 } else {
639 quot = 0;
640 }
1da177e4 641
1c45607a
JS		 642 info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
643 info->timeout += HZ / 50; /* Add .02 seconds of slop */
1da177e4 644
1c45607a
JS		 645 if (quot) {
646 info->MCR |= UART_MCR_DTR;
647 outb(info->MCR, info->ioaddr + UART_MCR);
648 } else {
649 info->MCR &= ~UART_MCR_DTR;
650 outb(info->MCR, info->ioaddr + UART_MCR);
651 return 0;
652 }
1da177e4 653
1c45607a 654 cval = inb(info->ioaddr + UART_LCR);
1da177e4 655
1c45607a 656 outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
1da177e4 657
1c45607a
JS		 658 outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
659 outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
660 outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
1da177e4 661
1c45607a 662#ifdef BOTHER
0ad9e7d1 663 if (C_BAUD(info->port.tty) == BOTHER) {
1c45607a
JS		 664 quot = info->baud_base % newspd;
665 quot *= 8;
666 if (quot % newspd > newspd / 2) {
667 quot /= newspd;
668 quot++;
669 } else
670 quot /= newspd;
671
148ff86b 672 mxser_set_must_enum_value(info->ioaddr, quot);
1c45607a
JS		 673 } else
674#endif
148ff86b 675 mxser_set_must_enum_value(info->ioaddr, 0);
1da177e4 676
8ea2c2ec 677 return 0;
1da177e4 678}
1da177e4 679
1c45607a
JS		 680/*
681 * This routine is called to set the UART divisor registers to match
682 * the specified baud rate for a serial port.
683 */
684static int mxser_change_speed(struct mxser_port *info,
685 struct ktermios *old_termios)
1da177e4 686{
1c45607a
JS		 687 unsigned cflag, cval, fcr;
688 int ret = 0;
689 unsigned char status;
1da177e4 690
0ad9e7d1 691 if (!info->port.tty || !info->port.tty->termios)
1c45607a 692 return ret;
0ad9e7d1 693 cflag = info->port.tty->termios->c_cflag;
1c45607a
JS		 694 if (!(info->ioaddr))
695 return ret;
1da177e4 696
0ad9e7d1
AC		 697 if (mxser_set_baud_method[info->port.tty->index] == 0)
698 mxser_set_baud(info, tty_get_baud_rate(info->port.tty));
1da177e4 699
1c45607a
JS		 700 /* byte size and parity */
701 switch (cflag & CSIZE) {
702 case CS5:
703 cval = 0x00;
704 break;
705 case CS6:
706 cval = 0x01;
707 break;
708 case CS7:
709 cval = 0x02;
710 break;
711 case CS8:
712 cval = 0x03;
713 break;
714 default:
715 cval = 0x00;
716 break; /* too keep GCC shut... */
717 }
718 if (cflag & CSTOPB)
719 cval |= 0x04;
720 if (cflag & PARENB)
721 cval |= UART_LCR_PARITY;
722 if (!(cflag & PARODD))
723 cval |= UART_LCR_EPAR;
724 if (cflag & CMSPAR)
725 cval |= UART_LCR_SPAR;
1da177e4 726
1c45607a
JS		 727 if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
728 if (info->board->chip_flag) {
729 fcr = UART_FCR_ENABLE_FIFO;
730 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
148ff86b 731 mxser_set_must_fifo_value(info);
1c45607a
JS		 732 } else
733 fcr = 0;
734 } else {
735 fcr = UART_FCR_ENABLE_FIFO;
736 if (info->board->chip_flag) {
737 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
148ff86b 738 mxser_set_must_fifo_value(info);
1c45607a
JS		 739 } else {
740 switch (info->rx_trigger) {
741 case 1:
742 fcr |= UART_FCR_TRIGGER_1;
743 break;
744 case 4:
745 fcr |= UART_FCR_TRIGGER_4;
746 break;
747 case 8:
748 fcr |= UART_FCR_TRIGGER_8;
749 break;
750 default:
751 fcr |= UART_FCR_TRIGGER_14;
752 break;
753 }
1da177e4 754 }
1da177e4
LT		 755 }
756
1c45607a
JS		 757 /* CTS flow control flag and modem status interrupts */
758 info->IER &= ~UART_IER_MSI;
759 info->MCR &= ~UART_MCR_AFE;
760 if (cflag & CRTSCTS) {
0ad9e7d1 761 info->port.flags |= ASYNC_CTS_FLOW;
1c45607a
JS		 762 info->IER |= UART_IER_MSI;
763 if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
764 info->MCR |= UART_MCR_AFE;
765 } else {
766 status = inb(info->ioaddr + UART_MSR);
0ad9e7d1 767 if (info->port.tty->hw_stopped) {
1c45607a 768 if (status & UART_MSR_CTS) {
0ad9e7d1 769 info->port.tty->hw_stopped = 0;
1c45607a
JS		 770 if (info->type != PORT_16550A &&
771 !info->board->chip_flag) {
772 outb(info->IER & ~UART_IER_THRI,
773 info->ioaddr +
774 UART_IER);
775 info->IER |= UART_IER_THRI;
776 outb(info->IER, info->ioaddr +
777 UART_IER);
778 }
0ad9e7d1 779 tty_wakeup(info->port.tty);
1c45607a
JS		 780 }
781 } else {
782 if (!(status & UART_MSR_CTS)) {
0ad9e7d1 783 info->port.tty->hw_stopped = 1;
1c45607a
JS		 784 if ((info->type != PORT_16550A) &&
785 (!info->board->chip_flag)) {
786 info->IER &= ~UART_IER_THRI;
787 outb(info->IER, info->ioaddr +
788 UART_IER);
789 }
790 }
791 }
1da177e4 792 }
1c45607a 793 } else {
0ad9e7d1 794 info->port.flags &= ~ASYNC_CTS_FLOW;
1c45607a
JS		 795 }
796 outb(info->MCR, info->ioaddr + UART_MCR);
797 if (cflag & CLOCAL) {
0ad9e7d1 798 info->port.flags &= ~ASYNC_CHECK_CD;
1c45607a 799 } else {
0ad9e7d1 800 info->port.flags |= ASYNC_CHECK_CD;
1c45607a
JS		 801 info->IER |= UART_IER_MSI;
802 }
803 outb(info->IER, info->ioaddr + UART_IER);
804
805 /*
806 * Set up parity check flag
807 */
808 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
0ad9e7d1 809 if (I_INPCK(info->port.tty))
1c45607a 810 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
0ad9e7d1 811 if (I_BRKINT(info->port.tty) || I_PARMRK(info->port.tty))
1c45607a 812 info->read_status_mask |= UART_LSR_BI;
1da177e4 813
1c45607a 814 info->ignore_status_mask = 0;
1da177e4 815
0ad9e7d1 816 if (I_IGNBRK(info->port.tty)) {
1c45607a
JS		 817 info->ignore_status_mask |= UART_LSR_BI;
818 info->read_status_mask |= UART_LSR_BI;
8ea2c2ec 819 /*
1c45607a
JS		 820 * If we're ignore parity and break indicators, ignore
821 * overruns too. (For real raw support).
8ea2c2ec 822 */
0ad9e7d1 823 if (I_IGNPAR(info->port.tty)) {
1c45607a
JS		 824 info->ignore_status_mask |=
825 UART_LSR_OE |
826 UART_LSR_PE |
827 UART_LSR_FE;
828 info->read_status_mask |=
829 UART_LSR_OE |
830 UART_LSR_PE |
831 UART_LSR_FE;
832 }
1da177e4 833 }
1c45607a 834 if (info->board->chip_flag) {
0ad9e7d1
AC		 835 mxser_set_must_xon1_value(info->ioaddr, START_CHAR(info->port.tty));
836 mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(info->port.tty));
837 if (I_IXON(info->port.tty)) {
148ff86b
CH		 838 mxser_enable_must_rx_software_flow_control(
839 info->ioaddr);
1c45607a 840 } else {
148ff86b
CH		 841 mxser_disable_must_rx_software_flow_control(
842 info->ioaddr);
1da177e4 843 }
0ad9e7d1 844 if (I_IXOFF(info->port.tty)) {
148ff86b
CH		 845 mxser_enable_must_tx_software_flow_control(
846 info->ioaddr);
1c45607a 847 } else {
148ff86b
CH		 848 mxser_disable_must_tx_software_flow_control(
849 info->ioaddr);
1da177e4
LT		 850 }
851 }
1da177e4 852
1da177e4 853
1c45607a
JS		 854 outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
855 outb(cval, info->ioaddr + UART_LCR);
1da177e4 856
1c45607a 857 return ret;
1da177e4
LT		 858}
859
1c45607a 860static void mxser_check_modem_status(struct mxser_port *port, int status)
1da177e4 861{
1c45607a
JS		 862 /* update input line counters */
863 if (status & UART_MSR_TERI)
864 port->icount.rng++;
865 if (status & UART_MSR_DDSR)
866 port->icount.dsr++;
867 if (status & UART_MSR_DDCD)
868 port->icount.dcd++;
869 if (status & UART_MSR_DCTS)
870 port->icount.cts++;
871 port->mon_data.modem_status = status;
872 wake_up_interruptible(&port->delta_msr_wait);
1da177e4 873
0ad9e7d1 874 if ((port->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
1c45607a 875 if (status & UART_MSR_DCD)
0ad9e7d1 876 wake_up_interruptible(&port->port.open_wait);
1c45607a 877 }
1da177e4 878
0ad9e7d1
AC		 879 if (port->port.flags & ASYNC_CTS_FLOW) {
880 if (port->port.tty->hw_stopped) {
1c45607a 881 if (status & UART_MSR_CTS) {
0ad9e7d1 882 port->port.tty->hw_stopped = 0;
1c45607a
JS		 883
884 if ((port->type != PORT_16550A) &&
885 (!port->board->chip_flag)) {
886 outb(port->IER & ~UART_IER_THRI,
887 port->ioaddr + UART_IER);
888 port->IER |= UART_IER_THRI;
889 outb(port->IER, port->ioaddr +
890 UART_IER);
891 }
0ad9e7d1 892 tty_wakeup(port->port.tty);
1c45607a
JS		 893 }
894 } else {
895 if (!(status & UART_MSR_CTS)) {
0ad9e7d1 896 port->port.tty->hw_stopped = 1;
1c45607a
JS		 897 if (port->type != PORT_16550A &&
898 !port->board->chip_flag) {
899 port->IER &= ~UART_IER_THRI;
900 outb(port->IER, port->ioaddr +
901 UART_IER);
902 }
903 }
904 }
1da177e4
LT		 905 }
906}
907
1c45607a 908static int mxser_startup(struct mxser_port *info)
1da177e4 909{
1c45607a
JS		 910 unsigned long page;
911 unsigned long flags;
1da177e4 912
1c45607a
JS		 913 page = __get_free_page(GFP_KERNEL);
914 if (!page)
915 return -ENOMEM;
1da177e4 916
1c45607a 917 spin_lock_irqsave(&info->slock, flags);
1da177e4 918
0ad9e7d1 919 if (info->port.flags & ASYNC_INITIALIZED) {
1c45607a
JS		 920 free_page(page);
921 spin_unlock_irqrestore(&info->slock, flags);
922 return 0;
923 }
6f08b72c 924
1c45607a 925 if (!info->ioaddr || !info->type) {
0ad9e7d1
AC		 926 if (info->port.tty)
927 set_bit(TTY_IO_ERROR, &info->port.tty->flags);
1c45607a
JS		 928 free_page(page);
929 spin_unlock_irqrestore(&info->slock, flags);
1da177e4 930 return 0;
1c45607a 931 }
0ad9e7d1 932 if (info->port.xmit_buf)
1c45607a
JS		 933 free_page(page);
934 else
0ad9e7d1 935 info->port.xmit_buf = (unsigned char *) page;
1da177e4 936
1da177e4 937 /*
1c45607a
JS		 938 * Clear the FIFO buffers and disable them
939 * (they will be reenabled in mxser_change_speed())
1da177e4 940 */
1c45607a
JS		 941 if (info->board->chip_flag)
942 outb((UART_FCR_CLEAR_RCVR |
943 UART_FCR_CLEAR_XMIT |
944 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
945 else
946 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
947 info->ioaddr + UART_FCR);
1da177e4 948
1c45607a
JS		 949 /*
950 * At this point there's no way the LSR could still be 0xFF;
951 * if it is, then bail out, because there's likely no UART
952 * here.
953 */
954 if (inb(info->ioaddr + UART_LSR) == 0xff) {
955 spin_unlock_irqrestore(&info->slock, flags);
956 if (capable(CAP_SYS_ADMIN)) {
0ad9e7d1
AC		 957 if (info->port.tty)
958 set_bit(TTY_IO_ERROR, &info->port.tty->flags);
1c45607a
JS		 959 return 0;
960 } else
961 return -ENODEV;
962 }
1da177e4 963
1c45607a
JS		 964 /*
965 * Clear the interrupt registers.
966 */
967 (void) inb(info->ioaddr + UART_LSR);
968 (void) inb(info->ioaddr + UART_RX);
969 (void) inb(info->ioaddr + UART_IIR);
970 (void) inb(info->ioaddr + UART_MSR);
971
972 /*
973 * Now, initialize the UART
974 */
975 outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
976 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
977 outb(info->MCR, info->ioaddr + UART_MCR);
978
979 /*
980 * Finally, enable interrupts
981 */
982 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
983
984 if (info->board->chip_flag)
985 info->IER |= MOXA_MUST_IER_EGDAI;
986 outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
987
988 /*
989 * And clear the interrupt registers again for luck.
990 */
991 (void) inb(info->ioaddr + UART_LSR);
992 (void) inb(info->ioaddr + UART_RX);
993 (void) inb(info->ioaddr + UART_IIR);
994 (void) inb(info->ioaddr + UART_MSR);
995
0ad9e7d1
AC		 996 if (info->port.tty)
997 clear_bit(TTY_IO_ERROR, &info->port.tty->flags);
1c45607a
JS		 998 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
999
1000 /*
1001 * and set the speed of the serial port
1002 */
1003 mxser_change_speed(info, NULL);
0ad9e7d1 1004 info->port.flags |= ASYNC_INITIALIZED;
1c45607a
JS		 1005 spin_unlock_irqrestore(&info->slock, flags);
1006
1007 return 0;
1008}
1009
1010/*
1011 * This routine will shutdown a serial port; interrupts maybe disabled, and
1012 * DTR is dropped if the hangup on close termio flag is on.
1013 */
1014static void mxser_shutdown(struct mxser_port *info)
1015{
1016 unsigned long flags;
1017
0ad9e7d1 1018 if (!(info->port.flags & ASYNC_INITIALIZED))
1c45607a
JS		 1019 return;
1020
1021 spin_lock_irqsave(&info->slock, flags);
1022
1023 /*
1024 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
1025 * here so the queue might never be waken up
1026 */
1027 wake_up_interruptible(&info->delta_msr_wait);
1028
1029 /*
1030 * Free the IRQ, if necessary
1031 */
0ad9e7d1
AC		 1032 if (info->port.xmit_buf) {
1033 free_page((unsigned long) info->port.xmit_buf);
1034 info->port.xmit_buf = NULL;
1da177e4
LT		 1035 }
1036
1c45607a
JS		 1037 info->IER = 0;
1038 outb(0x00, info->ioaddr + UART_IER);
1039
0ad9e7d1 1040 if (!info->port.tty || (info->port.tty->termios->c_cflag & HUPCL))
1c45607a
JS		 1041 info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
1042 outb(info->MCR, info->ioaddr + UART_MCR);
1043
1044 /* clear Rx/Tx FIFO's */
1045 if (info->board->chip_flag)
1046 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
1047 MOXA_MUST_FCR_GDA_MODE_ENABLE,
1048 info->ioaddr + UART_FCR);
1049 else
1050 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
1051 info->ioaddr + UART_FCR);
1052
1053 /* read data port to reset things */
1054 (void) inb(info->ioaddr + UART_RX);
1055
0ad9e7d1
AC		 1056 if (info->port.tty)
1057 set_bit(TTY_IO_ERROR, &info->port.tty->flags);
1c45607a 1058
0ad9e7d1 1059 info->port.flags &= ~ASYNC_INITIALIZED;
1c45607a
JS		 1060
1061 if (info->board->chip_flag)
1062 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
1063
1064 spin_unlock_irqrestore(&info->slock, flags);
1065}
1066
1067/*
1068 * This routine is called whenever a serial port is opened. It
1069 * enables interrupts for a serial port, linking in its async structure into
1070 * the IRQ chain. It also performs the serial-specific
1071 * initialization for the tty structure.
1072 */
1073static int mxser_open(struct tty_struct *tty, struct file *filp)
1074{
1075 struct mxser_port *info;
1076 unsigned long flags;
1077 int retval, line;
1078
1079 line = tty->index;
1080 if (line == MXSER_PORTS)
1081 return 0;
1082 if (line < 0 || line > MXSER_PORTS)
1083 return -ENODEV;
1084 info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
1085 if (!info->ioaddr)
1086 return -ENODEV;
1087
1088 tty->driver_data = info;
0ad9e7d1 1089 info->port.tty = tty;
8ea2c2ec 1090 /*
1c45607a
JS		 1091 * Start up serial port
1092 */
1093 spin_lock_irqsave(&info->slock, flags);
0ad9e7d1 1094 info->port.count++;
1c45607a
JS		 1095 spin_unlock_irqrestore(&info->slock, flags);
1096 retval = mxser_startup(info);
1097 if (retval)
1098 return retval;
1099
1100 retval = mxser_block_til_ready(tty, filp, info);
1101 if (retval)
1102 return retval;
1da177e4 1103
8cddd707 1104 /* unmark here for very high baud rate (ex. 921600 bps) used */
1da177e4
LT		 1105 tty->low_latency = 1;
1106 return 0;
1107}
1108
978e595f
AC		 1109static void mxser_flush_buffer(struct tty_struct *tty)
1110{
1111 struct mxser_port *info = tty->driver_data;
1112 char fcr;
1113 unsigned long flags;
1114
1115
1116 spin_lock_irqsave(&info->slock, flags);
1117 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1118
1119 fcr = inb(info->ioaddr + UART_FCR);
1120 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
1121 info->ioaddr + UART_FCR);
1122 outb(fcr, info->ioaddr + UART_FCR);
1123
1124 spin_unlock_irqrestore(&info->slock, flags);
1125
1126 tty_wakeup(tty);
1127}
1128
1129
1da177e4
LT		 1130/*
1131 * This routine is called when the serial port gets closed. First, we
1132 * wait for the last remaining data to be sent. Then, we unlink its
1133 * async structure from the interrupt chain if necessary, and we free
1134 * that IRQ if nothing is left in the chain.
1135 */
1136static void mxser_close(struct tty_struct *tty, struct file *filp)
1137{
1c45607a 1138 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1139
1140 unsigned long timeout;
1141 unsigned long flags;
1da177e4
LT		 1142
1143 if (tty->index == MXSER_PORTS)
1144 return;
1145 if (!info)
6f08b72c 1146 return;
1da177e4
LT		 1147
1148 spin_lock_irqsave(&info->slock, flags);
1149
1150 if (tty_hung_up_p(filp)) {
1151 spin_unlock_irqrestore(&info->slock, flags);
1152 return;
1153 }
0ad9e7d1 1154 if ((tty->count == 1) && (info->port.count != 1)) {
1da177e4
LT		 1155 /*
1156 * Uh, oh. tty->count is 1, which means that the tty
0ad9e7d1 1157 * structure will be freed. Info->port.count should always
1da177e4
LT		 1158 * be one in these conditions. If it's greater than
1159 * one, we've got real problems, since it means the
1160 * serial port won't be shutdown.
1161 */
8ea2c2ec 1162 printk(KERN_ERR "mxser_close: bad serial port count; "
0ad9e7d1
AC		 1163 "tty->count is 1, info->port.count is %d\n", info->port.count);
1164 info->port.count = 1;
1da177e4 1165 }
0ad9e7d1 1166 if (--info->port.count < 0) {
8ea2c2ec 1167 printk(KERN_ERR "mxser_close: bad serial port count for "
0ad9e7d1
AC		 1168 "ttys%d: %d\n", tty->index, info->port.count);
1169 info->port.count = 0;
1da177e4 1170 }
0ad9e7d1 1171 if (info->port.count) {
1da177e4
LT		 1172 spin_unlock_irqrestore(&info->slock, flags);
1173 return;
1174 }
0ad9e7d1 1175 info->port.flags |= ASYNC_CLOSING;
1da177e4
LT		 1176 spin_unlock_irqrestore(&info->slock, flags);
1177 /*
1178 * Save the termios structure, since this port may have
1179 * separate termios for callout and dialin.
1180 */
0ad9e7d1 1181 if (info->port.flags & ASYNC_NORMAL_ACTIVE)
1da177e4
LT		 1182 info->normal_termios = *tty->termios;
1183 /*
1184 * Now we wait for the transmit buffer to clear; and we notify
1185 * the line discipline to only process XON/XOFF characters.
1186 */
1187 tty->closing = 1;
44b7d1b3
AC		 1188 if (info->port.closing_wait != ASYNC_CLOSING_WAIT_NONE)
1189 tty_wait_until_sent(tty, info->port.closing_wait);
1da177e4
LT		 1190 /*
1191 * At this point we stop accepting input. To do this, we
1192 * disable the receive line status interrupts, and tell the
1193 * interrupt driver to stop checking the data ready bit in the
1194 * line status register.
1195 */
1196 info->IER &= ~UART_IER_RLSI;
1c45607a 1197 if (info->board->chip_flag)
1da177e4 1198 info->IER &= ~MOXA_MUST_RECV_ISR;
1c45607a 1199
0ad9e7d1 1200 if (info->port.flags & ASYNC_INITIALIZED) {
1c45607a 1201 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1202 /*
1203 * Before we drop DTR, make sure the UART transmitter
1204 * has completely drained; this is especially
1205 * important if there is a transmit FIFO!
1206 */
1207 timeout = jiffies + HZ;
1c45607a 1208 while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
da4cd8df 1209 schedule_timeout_interruptible(5);
1da177e4
LT		 1210 if (time_after(jiffies, timeout))
1211 break;
1212 }
1213 }
1214 mxser_shutdown(info);
1215
978e595f 1216 mxser_flush_buffer(tty);
1c45607a
JS		 1217 tty_ldisc_flush(tty);
1218
1da177e4 1219 tty->closing = 0;
0ad9e7d1
AC		 1220 info->port.tty = NULL;
1221 if (info->port.blocked_open) {
44b7d1b3
AC		 1222 if (info->port.close_delay)
1223 schedule_timeout_interruptible(info->port.close_delay);
0ad9e7d1 1224 wake_up_interruptible(&info->port.open_wait);
1da177e4
LT		 1225 }
1226
0ad9e7d1 1227 info->port.flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING);
1da177e4
LT		 1228}
1229
1230static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
1231{
1232 int c, total = 0;
1c45607a 1233 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1234 unsigned long flags;
1235
0ad9e7d1 1236 if (!info->port.xmit_buf)
8ea2c2ec 1237 return 0;
1da177e4
LT		 1238
1239 while (1) {
8ea2c2ec
JJ		 1240 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
1241 SERIAL_XMIT_SIZE - info->xmit_head));
1da177e4
LT		 1242 if (c <= 0)
1243 break;
1244
0ad9e7d1 1245 memcpy(info->port.xmit_buf + info->xmit_head, buf, c);
1da177e4 1246 spin_lock_irqsave(&info->slock, flags);
8ea2c2ec
JJ		 1247 info->xmit_head = (info->xmit_head + c) &
1248 (SERIAL_XMIT_SIZE - 1);
1da177e4
LT		 1249 info->xmit_cnt += c;
1250 spin_unlock_irqrestore(&info->slock, flags);
1251
1252 buf += c;
1253 count -= c;
1254 total += c;
1da177e4
LT		 1255 }
1256
1c45607a 1257 if (info->xmit_cnt && !tty->stopped) {
8ea2c2ec
JJ		 1258 if (!tty->hw_stopped ||
1259 (info->type == PORT_16550A) ||
1c45607a 1260 (info->board->chip_flag)) {
1da177e4 1261 spin_lock_irqsave(&info->slock, flags);
1c45607a
JS		 1262 outb(info->IER & ~UART_IER_THRI, info->ioaddr +
1263 UART_IER);
1da177e4 1264 info->IER |= UART_IER_THRI;
1c45607a 1265 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1266 spin_unlock_irqrestore(&info->slock, flags);
1267 }
1268 }
1269 return total;
1270}
1271
0be2eade 1272static int mxser_put_char(struct tty_struct *tty, unsigned char ch)
1da177e4 1273{
1c45607a 1274 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1275 unsigned long flags;
1276
0ad9e7d1 1277 if (!info->port.xmit_buf)
0be2eade 1278 return 0;
1da177e4
LT		 1279
1280 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
0be2eade 1281 return 0;
1da177e4
LT		 1282
1283 spin_lock_irqsave(&info->slock, flags);
0ad9e7d1 1284 info->port.xmit_buf[info->xmit_head++] = ch;
1da177e4
LT		 1285 info->xmit_head &= SERIAL_XMIT_SIZE - 1;
1286 info->xmit_cnt++;
1287 spin_unlock_irqrestore(&info->slock, flags);
1c45607a 1288 if (!tty->stopped) {
8ea2c2ec
JJ		 1289 if (!tty->hw_stopped ||
1290 (info->type == PORT_16550A) ||
1c45607a 1291 info->board->chip_flag) {
1da177e4 1292 spin_lock_irqsave(&info->slock, flags);
1c45607a 1293 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1da177e4 1294 info->IER |= UART_IER_THRI;
1c45607a 1295 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1296 spin_unlock_irqrestore(&info->slock, flags);
1297 }
1298 }
0be2eade 1299 return 1;
1da177e4
LT		 1300}
1301
1302
1303static void mxser_flush_chars(struct tty_struct *tty)
1304{
1c45607a 1305 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1306 unsigned long flags;
1307
8ea2c2ec
JJ		 1308 if (info->xmit_cnt <= 0 ||
1309 tty->stopped ||
0ad9e7d1 1310 !info->port.xmit_buf ||
8ea2c2ec
JJ		 1311 (tty->hw_stopped &&
1312 (info->type != PORT_16550A) &&
1c45607a 1313 (!info->board->chip_flag)
8ea2c2ec 1314 ))
1da177e4
LT		 1315 return;
1316
1317 spin_lock_irqsave(&info->slock, flags);
1318
1c45607a 1319 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1da177e4 1320 info->IER |= UART_IER_THRI;
1c45607a 1321 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1322
1323 spin_unlock_irqrestore(&info->slock, flags);
1324}
1325
1326static int mxser_write_room(struct tty_struct *tty)
1327{
1c45607a 1328 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1329 int ret;
1330
1331 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
1332 if (ret < 0)
1333 ret = 0;
8ea2c2ec 1334 return ret;
1da177e4
LT		 1335}
1336
1337static int mxser_chars_in_buffer(struct tty_struct *tty)
1338{
1c45607a 1339 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1340 return info->xmit_cnt;
1341}
1342
1c45607a
JS		 1343/*
1344 * ------------------------------------------------------------
1345 * friends of mxser_ioctl()
1346 * ------------------------------------------------------------
1347 */
1348static int mxser_get_serial_info(struct mxser_port *info,
1349 struct serial_struct __user *retinfo)
1350{
1351 struct serial_struct tmp = {
1352 .type = info->type,
0ad9e7d1 1353 .line = info->port.tty->index,
1c45607a
JS		 1354 .port = info->ioaddr,
1355 .irq = info->board->irq,
0ad9e7d1 1356 .flags = info->port.flags,
1c45607a 1357 .baud_base = info->baud_base,
44b7d1b3
AC		 1358 .close_delay = info->port.close_delay,
1359 .closing_wait = info->port.closing_wait,
1c45607a
JS		 1360 .custom_divisor = info->custom_divisor,
1361 .hub6 = 0
1362 };
1363 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
1364 return -EFAULT;
1365 return 0;
1366}
1367
1368static int mxser_set_serial_info(struct mxser_port *info,
1369 struct serial_struct __user *new_info)
1da177e4 1370{
1c45607a 1371 struct serial_struct new_serial;
80ff8a80 1372 speed_t baud;
1c45607a
JS		 1373 unsigned long sl_flags;
1374 unsigned int flags;
1375 int retval = 0;
1da177e4 1376
1c45607a 1377 if (!new_info || !info->ioaddr)
80ff8a80 1378 return -ENODEV;
1c45607a
JS		 1379 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
1380 return -EFAULT;
1da177e4 1381
80ff8a80
JS		 1382 if (new_serial.irq != info->board->irq ||
1383 new_serial.port != info->ioaddr)
1384 return -EINVAL;
1da177e4 1385
0ad9e7d1 1386 flags = info->port.flags & ASYNC_SPD_MASK;
1da177e4 1387
1c45607a
JS		 1388 if (!capable(CAP_SYS_ADMIN)) {
1389 if ((new_serial.baud_base != info->baud_base) ||
44b7d1b3 1390 (new_serial.close_delay != info->port.close_delay) ||
0ad9e7d1 1391 ((new_serial.flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK)))
1c45607a 1392 return -EPERM;
0ad9e7d1 1393 info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) |
1c45607a
JS		 1394 (new_serial.flags & ASYNC_USR_MASK));
1395 } else {
1da177e4 1396 /*
1c45607a
JS		 1397 * OK, past this point, all the error checking has been done.
1398 * At this point, we start making changes.....
1da177e4 1399 */
0ad9e7d1 1400 info->port.flags = ((info->port.flags & ~ASYNC_FLAGS) |
1c45607a 1401 (new_serial.flags & ASYNC_FLAGS));
44b7d1b3
AC		 1402 info->port.close_delay = new_serial.close_delay * HZ / 100;
1403 info->port.closing_wait = new_serial.closing_wait * HZ / 100;
0ad9e7d1
AC		 1404 info->port.tty->low_latency =
1405 (info->port.flags & ASYNC_LOW_LATENCY) ? 1 : 0;
0ad9e7d1 1406 if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST &&
80ff8a80
JS		 1407 (new_serial.baud_base != info->baud_base ||
1408 new_serial.custom_divisor !=
1409 info->custom_divisor)) {
1410 baud = new_serial.baud_base / new_serial.custom_divisor;
0ad9e7d1 1411 tty_encode_baud_rate(info->port.tty, baud, baud);
80ff8a80 1412 }
1c45607a 1413 }
fc83815c 1414
1c45607a 1415 info->type = new_serial.type;
1da177e4 1416
1c45607a
JS		 1417 process_txrx_fifo(info);
1418
0ad9e7d1
AC		 1419 if (info->port.flags & ASYNC_INITIALIZED) {
1420 if (flags != (info->port.flags & ASYNC_SPD_MASK)) {
1c45607a
JS		 1421 spin_lock_irqsave(&info->slock, sl_flags);
1422 mxser_change_speed(info, NULL);
1423 spin_unlock_irqrestore(&info->slock, sl_flags);
1da177e4 1424 }
1c45607a
JS		 1425 } else
1426 retval = mxser_startup(info);
1da177e4 1427
1c45607a
JS		 1428 return retval;
1429}
1da177e4 1430
1c45607a
JS		 1431/*
1432 * mxser_get_lsr_info - get line status register info
1433 *
1434 * Purpose: Let user call ioctl() to get info when the UART physically
1435 * is emptied. On bus types like RS485, the transmitter must
1436 * release the bus after transmitting. This must be done when
1437 * the transmit shift register is empty, not be done when the
1438 * transmit holding register is empty. This functionality
1439 * allows an RS485 driver to be written in user space.
1440 */
1441static int mxser_get_lsr_info(struct mxser_port *info,
1442 unsigned int __user *value)
1443{
1444 unsigned char status;
1445 unsigned int result;
1446 unsigned long flags;
1da177e4 1447
1c45607a
JS		 1448 spin_lock_irqsave(&info->slock, flags);
1449 status = inb(info->ioaddr + UART_LSR);
1450 spin_unlock_irqrestore(&info->slock, flags);
1451 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
1452 return put_user(result, value);
1453}
1da177e4 1454
1c45607a
JS		 1455static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
1456{
1457 struct mxser_port *info = tty->driver_data;
1458 unsigned char control, status;
1459 unsigned long flags;
1da177e4 1460
8ea2c2ec 1461
1c45607a
JS		 1462 if (tty->index == MXSER_PORTS)
1463 return -ENOIOCTLCMD;
1464 if (test_bit(TTY_IO_ERROR, &tty->flags))
1465 return -EIO;
1da177e4 1466
1c45607a 1467 control = info->MCR;
1da177e4 1468
1c45607a
JS		 1469 spin_lock_irqsave(&info->slock, flags);
1470 status = inb(info->ioaddr + UART_MSR);
1471 if (status & UART_MSR_ANY_DELTA)
1472 mxser_check_modem_status(info, status);
1473 spin_unlock_irqrestore(&info->slock, flags);
1474 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
1475 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
1476 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
1477 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
1478 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
1479 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1480}
1da177e4 1481
1c45607a
JS		 1482static int mxser_tiocmset(struct tty_struct *tty, struct file *file,
1483 unsigned int set, unsigned int clear)
1484{
1485 struct mxser_port *info = tty->driver_data;
1486 unsigned long flags;
1da177e4 1487
1da177e4 1488
1c45607a
JS		 1489 if (tty->index == MXSER_PORTS)
1490 return -ENOIOCTLCMD;
1491 if (test_bit(TTY_IO_ERROR, &tty->flags))
1492 return -EIO;
1da177e4 1493
1c45607a 1494 spin_lock_irqsave(&info->slock, flags);
1da177e4 1495
1c45607a
JS		 1496 if (set & TIOCM_RTS)
1497 info->MCR |= UART_MCR_RTS;
1498 if (set & TIOCM_DTR)
1499 info->MCR |= UART_MCR_DTR;
1da177e4 1500
1c45607a
JS		 1501 if (clear & TIOCM_RTS)
1502 info->MCR &= ~UART_MCR_RTS;
1503 if (clear & TIOCM_DTR)
1504 info->MCR &= ~UART_MCR_DTR;
8ea2c2ec 1505
1c45607a
JS		 1506 outb(info->MCR, info->ioaddr + UART_MCR);
1507 spin_unlock_irqrestore(&info->slock, flags);
1508 return 0;
1509}
1da177e4 1510
1c45607a
JS		 1511static int __init mxser_program_mode(int port)
1512{
1513 int id, i, j, n;
1514
1515 outb(0, port);
1516 outb(0, port);
1517 outb(0, port);
1518 (void)inb(port);
1519 (void)inb(port);
1520 outb(0, port);
1521 (void)inb(port);
1522
1523 id = inb(port + 1) & 0x1F;
1524 if ((id != C168_ASIC_ID) &&
1525 (id != C104_ASIC_ID) &&
1526 (id != C102_ASIC_ID) &&
1527 (id != CI132_ASIC_ID) &&
1528 (id != CI134_ASIC_ID) &&
1529 (id != CI104J_ASIC_ID))
1530 return -1;
1531 for (i = 0, j = 0; i < 4; i++) {
1532 n = inb(port + 2);
1533 if (n == 'M') {
1534 j = 1;
1535 } else if ((j == 1) && (n == 1)) {
1536 j = 2;
1537 break;
1538 } else
1539 j = 0;
1da177e4 1540 }
1c45607a
JS		 1541 if (j != 2)
1542 id = -2;
1543 return id;
1da177e4
LT		 1544}
1545
1c45607a
JS		 1546static void __init mxser_normal_mode(int port)
1547{
1548 int i, n;
1549
1550 outb(0xA5, port + 1);
1551 outb(0x80, port + 3);
1552 outb(12, port + 0); /* 9600 bps */
1553 outb(0, port + 1);
1554 outb(0x03, port + 3); /* 8 data bits */
1555 outb(0x13, port + 4); /* loop back mode */
1556 for (i = 0; i < 16; i++) {
1557 n = inb(port + 5);
1558 if ((n & 0x61) == 0x60)
1559 break;
1560 if ((n & 1) == 1)
1561 (void)inb(port);
1562 }
1563 outb(0x00, port + 4);
1564}
1565
1566#define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
1567#define CHIP_DO 0x02 /* Serial Data Output in Eprom */
1568#define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
1569#define CHIP_DI 0x08 /* Serial Data Input in Eprom */
1570#define EN_CCMD 0x000 /* Chip's command register */
1571#define EN0_RSARLO 0x008 /* Remote start address reg 0 */
1572#define EN0_RSARHI 0x009 /* Remote start address reg 1 */
1573#define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
1574#define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
1575#define EN0_DCFG 0x00E /* Data configuration reg WR */
1576#define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
1577#define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
1578#define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
1579static int __init mxser_read_register(int port, unsigned short *regs)
1580{
1581 int i, k, value, id;
1582 unsigned int j;
1583
1584 id = mxser_program_mode(port);
1585 if (id < 0)
1586 return id;
1587 for (i = 0; i < 14; i++) {
1588 k = (i & 0x3F) | 0x180;
1589 for (j = 0x100; j > 0; j >>= 1) {
1590 outb(CHIP_CS, port);
1591 if (k & j) {
1592 outb(CHIP_CS | CHIP_DO, port);
1593 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
1594 } else {
1595 outb(CHIP_CS, port);
1596 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
1597 }
1598 }
1599 (void)inb(port);
1600 value = 0;
1601 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
1602 outb(CHIP_CS, port);
1603 outb(CHIP_CS | CHIP_SK, port);
1604 if (inb(port) & CHIP_DI)
1605 value |= j;
1606 }
1607 regs[i] = value;
1608 outb(0, port);
1609 }
1610 mxser_normal_mode(port);
1611 return id;
1612}
1da177e4
LT		 1613
1614static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
1615{
1c45607a
JS		 1616 struct mxser_port *port;
1617 int result, status;
1618 unsigned int i, j;
9d6d162d 1619 int ret = 0;
1da177e4
LT		 1620
1621 switch (cmd) {
1da177e4 1622 case MOXA_GET_MAJOR:
41aee9a1
JS		 1623 printk(KERN_WARNING "mxser: '%s' uses deprecated ioctl %x, fix "
1624 "your userspace\n", current->comm, cmd);
1c45607a 1625 return put_user(ttymajor, (int __user *)argp);
1da177e4
LT		 1626
1627 case MOXA_CHKPORTENABLE:
1628 result = 0;
9d6d162d 1629 lock_kernel();
1c45607a
JS		 1630 for (i = 0; i < MXSER_BOARDS; i++)
1631 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
1632 if (mxser_boards[i].ports[j].ioaddr)
1633 result |= (1 << i);
9d6d162d 1634 unlock_kernel();
8ea2c2ec 1635 return put_user(result, (unsigned long __user *)argp);
1da177e4 1636 case MOXA_GETDATACOUNT:
9d6d162d 1637 lock_kernel();
1da177e4 1638 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
9d6d162d
AC		 1639 ret = -EFAULT;
1640 unlock_kernel();
1641 return ret;
72800df9
JS		 1642 case MOXA_GETMSTATUS: {
1643 struct mxser_mstatus ms, __user *msu = argp;
9d6d162d 1644 lock_kernel();
1c45607a
JS		 1645 for (i = 0; i < MXSER_BOARDS; i++)
1646 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
1647 port = &mxser_boards[i].ports[j];
72800df9 1648 memset(&ms, 0, sizeof(ms));
1c45607a 1649
72800df9
JS		 1650 if (!port->ioaddr)
1651 goto copy;
1da177e4 1652
0ad9e7d1 1653 if (!port->port.tty || !port->port.tty->termios)
72800df9 1654 ms.cflag = port->normal_termios.c_cflag;
1c45607a 1655 else
72800df9 1656 ms.cflag = port->port.tty->termios->c_cflag;
1da177e4 1657
1c45607a 1658 status = inb(port->ioaddr + UART_MSR);
72800df9
JS		 1659 if (status & UART_MSR_DCD)
1660 ms.dcd = 1;
1661 if (status & UART_MSR_DSR)
1662 ms.dsr = 1;
1663 if (status & UART_MSR_CTS)
1664 ms.cts = 1;
1665 copy:
1666 if (copy_to_user(msu, &ms, sizeof(ms))) {
1667 unlock_kernel();
1668 return -EFAULT;
1669 }
1670 msu++;
1c45607a 1671 }
9d6d162d 1672 unlock_kernel();
1da177e4 1673 return 0;
72800df9 1674 }
8ea2c2ec 1675 case MOXA_ASPP_MON_EXT: {
72800df9
JS		 1676 struct mxser_mon_ext *me; /* it's 2k, stack unfriendly */
1677 unsigned int cflag, iflag, p;
1678 u8 opmode;
1679
1680 me = kzalloc(sizeof(*me), GFP_KERNEL);
1681 if (!me)
1682 return -ENOMEM;
1c45607a 1683
9d6d162d 1684 lock_kernel();
72800df9
JS		 1685 for (i = 0, p = 0; i < MXSER_BOARDS; i++) {
1686 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++, p++) {
1687 if (p >= ARRAY_SIZE(me->rx_cnt)) {
1688 i = MXSER_BOARDS;
1689 break;
1690 }
1c45607a
JS		 1691 port = &mxser_boards[i].ports[j];
1692 if (!port->ioaddr)
1da177e4
LT		 1693 continue;
1694
72800df9 1695 status = mxser_get_msr(port->ioaddr, 0, p);
1c45607a 1696
1da177e4 1697 if (status & UART_MSR_TERI)
1c45607a 1698 port->icount.rng++;
1da177e4 1699 if (status & UART_MSR_DDSR)
1c45607a 1700 port->icount.dsr++;
1da177e4 1701 if (status & UART_MSR_DDCD)
1c45607a 1702 port->icount.dcd++;
1da177e4 1703 if (status & UART_MSR_DCTS)
1c45607a
JS		 1704 port->icount.cts++;
1705
1706 port->mon_data.modem_status = status;
72800df9
JS		 1707 me->rx_cnt[p] = port->mon_data.rxcnt;
1708 me->tx_cnt[p] = port->mon_data.txcnt;
1709 me->up_rxcnt[p] = port->mon_data.up_rxcnt;
1710 me->up_txcnt[p] = port->mon_data.up_txcnt;
1711 me->modem_status[p] =
1c45607a 1712 port->mon_data.modem_status;
72800df9 1713 me->baudrate[p] = tty_get_baud_rate(port->port.tty);
1c45607a 1714
0ad9e7d1 1715 if (!port->port.tty || !port->port.tty->termios) {
1c45607a
JS		 1716 cflag = port->normal_termios.c_cflag;
1717 iflag = port->normal_termios.c_iflag;
1da177e4 1718 } else {
0ad9e7d1
AC		 1719 cflag = port->port.tty->termios->c_cflag;
1720 iflag = port->port.tty->termios->c_iflag;
1da177e4
LT		 1721 }
1722
72800df9
JS		 1723 me->databits[p] = cflag & CSIZE;
1724 me->stopbits[p] = cflag & CSTOPB;
1725 me->parity[p] = cflag & (PARENB | PARODD |
1726 CMSPAR);
1da177e4
LT		 1727
1728 if (cflag & CRTSCTS)
72800df9 1729 me->flowctrl[p] |= 0x03;
1da177e4
LT		 1730
1731 if (iflag & (IXON | IXOFF))
72800df9 1732 me->flowctrl[p] |= 0x0C;
1da177e4 1733
1c45607a 1734 if (port->type == PORT_16550A)
72800df9 1735 me->fifo[p] = 1;
1da177e4 1736
72800df9
JS		 1737 opmode = inb(port->opmode_ioaddr) >>
1738 ((p % 4) * 2);
1da177e4 1739 opmode &= OP_MODE_MASK;
72800df9 1740 me->iftype[p] = opmode;
1da177e4 1741 }
9d6d162d
AC		 1742 }
1743 unlock_kernel();
72800df9
JS		 1744 if (copy_to_user(argp, me, sizeof(*me)))
1745 ret = -EFAULT;
1746 kfree(me);
1747 return ret;
9d6d162d
AC		 1748 }
1749 default:
1da177e4
LT		 1750 return -ENOIOCTLCMD;
1751 }
1752 return 0;
1753}
1754
1c45607a
JS		 1755static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg,
1756 struct async_icount *cprev)
1da177e4 1757{
1c45607a
JS		 1758 struct async_icount cnow;
1759 unsigned long flags;
1760 int ret;
1da177e4 1761
1c45607a
JS		 1762 spin_lock_irqsave(&info->slock, flags);
1763 cnow = info->icount; /* atomic copy */
1764 spin_unlock_irqrestore(&info->slock, flags);
1da177e4 1765
1c45607a
JS		 1766 ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) ||
1767 ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) ||
1768 ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) ||
1769 ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts));
1da177e4 1770
1c45607a
JS		 1771 *cprev = cnow;
1772
1773 return ret;
1774}
1775
1776static int mxser_ioctl(struct tty_struct *tty, struct file *file,
1777 unsigned int cmd, unsigned long arg)
1da177e4 1778{
1c45607a
JS		 1779 struct mxser_port *info = tty->driver_data;
1780 struct async_icount cnow;
1c45607a
JS		 1781 unsigned long flags;
1782 void __user *argp = (void __user *)arg;
1783 int retval;
1da177e4 1784
1c45607a
JS		 1785 if (tty->index == MXSER_PORTS)
1786 return mxser_ioctl_special(cmd, argp);
1da177e4 1787
1c45607a
JS		 1788 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
1789 int p;
1790 unsigned long opmode;
1791 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
1792 int shiftbit;
1793 unsigned char val, mask;
1da177e4 1794
1c45607a
JS		 1795 p = tty->index % 4;
1796 if (cmd == MOXA_SET_OP_MODE) {
1797 if (get_user(opmode, (int __user *) argp))
1798 return -EFAULT;
1799 if (opmode != RS232_MODE &&
1800 opmode != RS485_2WIRE_MODE &&
1801 opmode != RS422_MODE &&
1802 opmode != RS485_4WIRE_MODE)
1803 return -EFAULT;
9d6d162d 1804 lock_kernel();
1c45607a
JS		 1805 mask = ModeMask[p];
1806 shiftbit = p * 2;
1807 val = inb(info->opmode_ioaddr);
1808 val &= mask;
1809 val |= (opmode << shiftbit);
1810 outb(val, info->opmode_ioaddr);
9d6d162d 1811 unlock_kernel();
1c45607a 1812 } else {
9d6d162d 1813 lock_kernel();
1c45607a
JS		 1814 shiftbit = p * 2;
1815 opmode = inb(info->opmode_ioaddr) >> shiftbit;
1816 opmode &= OP_MODE_MASK;
9d6d162d 1817 unlock_kernel();
1c45607a
JS		 1818 if (put_user(opmode, (int __user *)argp))
1819 return -EFAULT;
1820 }
1821 return 0;
1822 }
1823
1824 if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && cmd != TIOCGICOUNT &&
1825 test_bit(TTY_IO_ERROR, &tty->flags))
1826 return -EIO;
1827
1828 switch (cmd) {
1c45607a 1829 case TIOCGSERIAL:
9d6d162d
AC		 1830 lock_kernel();
1831 retval = mxser_get_serial_info(info, argp);
1832 unlock_kernel();
1833 return retval;
1c45607a 1834 case TIOCSSERIAL:
9d6d162d
AC		 1835 lock_kernel();
1836 retval = mxser_set_serial_info(info, argp);
1837 unlock_kernel();
1838 return retval;
1c45607a 1839 case TIOCSERGETLSR: /* Get line status register */
9d6d162d 1840 return mxser_get_lsr_info(info, argp);
1c45607a
JS		 1841 /*
1842 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1843 * - mask passed in arg for lines of interest
1844 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1845 * Caller should use TIOCGICOUNT to see which one it was
1846 */
1847 case TIOCMIWAIT:
1848 spin_lock_irqsave(&info->slock, flags);
1849 cnow = info->icount; /* note the counters on entry */
1850 spin_unlock_irqrestore(&info->slock, flags);
1851
1852 return wait_event_interruptible(info->delta_msr_wait,
1853 mxser_cflags_changed(info, arg, &cnow));
1854 /*
1855 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1856 * Return: write counters to the user passed counter struct
1857 * NB: both 1->0 and 0->1 transitions are counted except for
1858 * RI where only 0->1 is counted.
1859 */
41aee9a1
JS		 1860 case TIOCGICOUNT: {
1861 struct serial_icounter_struct icnt = { 0 };
1c45607a
JS		 1862 spin_lock_irqsave(&info->slock, flags);
1863 cnow = info->icount;
1864 spin_unlock_irqrestore(&info->slock, flags);
41aee9a1
JS		 1865
1866 icnt.frame = cnow.frame;
1867 icnt.brk = cnow.brk;
1868 icnt.overrun = cnow.overrun;
1869 icnt.buf_overrun = cnow.buf_overrun;
1870 icnt.parity = cnow.parity;
1871 icnt.rx = cnow.rx;
1872 icnt.tx = cnow.tx;
1873 icnt.cts = cnow.cts;
1874 icnt.dsr = cnow.dsr;
1875 icnt.rng = cnow.rng;
1876 icnt.dcd = cnow.dcd;
1877
1878 return copy_to_user(argp, &icnt, sizeof(icnt)) ? -EFAULT : 0;
1879 }
1c45607a
JS		 1880 case MOXA_HighSpeedOn:
1881 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
1882 case MOXA_SDS_RSTICOUNTER:
9d6d162d 1883 lock_kernel();
1c45607a
JS		 1884 info->mon_data.rxcnt = 0;
1885 info->mon_data.txcnt = 0;
9d6d162d 1886 unlock_kernel();
1c45607a
JS		 1887 return 0;
1888
1889 case MOXA_ASPP_OQUEUE:{
1890 int len, lsr;
1891
9d6d162d 1892 lock_kernel();
1c45607a 1893 len = mxser_chars_in_buffer(tty);
1c45607a 1894 lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT;
1c45607a 1895 len += (lsr ? 0 : 1);
9d6d162d 1896 unlock_kernel();
1c45607a
JS		 1897
1898 return put_user(len, (int __user *)argp);
1899 }
1900 case MOXA_ASPP_MON: {
1901 int mcr, status;
1902
9d6d162d 1903 lock_kernel();
1c45607a
JS		 1904 status = mxser_get_msr(info->ioaddr, 1, tty->index);
1905 mxser_check_modem_status(info, status);
1906
1907 mcr = inb(info->ioaddr + UART_MCR);
1908 if (mcr & MOXA_MUST_MCR_XON_FLAG)
1909 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
1910 else
1911 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
1912
1913 if (mcr & MOXA_MUST_MCR_TX_XON)
1914 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
1915 else
1916 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
1917
0ad9e7d1 1918 if (info->port.tty->hw_stopped)
1c45607a
JS		 1919 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
1920 else
1921 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
9d6d162d 1922 unlock_kernel();
1c45607a
JS		 1923 if (copy_to_user(argp, &info->mon_data,
1924 sizeof(struct mxser_mon)))
1925 return -EFAULT;
1926
1927 return 0;
1928 }
1929 case MOXA_ASPP_LSTATUS: {
1930 if (put_user(info->err_shadow, (unsigned char __user *)argp))
1931 return -EFAULT;
1932
1933 info->err_shadow = 0;
1934 return 0;
1935 }
1936 case MOXA_SET_BAUD_METHOD: {
1937 int method;
1938
1939 if (get_user(method, (int __user *)argp))
1940 return -EFAULT;
1941 mxser_set_baud_method[tty->index] = method;
1942 return put_user(method, (int __user *)argp);
1943 }
1944 default:
1945 return -ENOIOCTLCMD;
1946 }
1947 return 0;
1948}
1949
1950static void mxser_stoprx(struct tty_struct *tty)
1951{
1952 struct mxser_port *info = tty->driver_data;
1953
1954 info->ldisc_stop_rx = 1;
1955 if (I_IXOFF(tty)) {
1956 if (info->board->chip_flag) {
1957 info->IER &= ~MOXA_MUST_RECV_ISR;
1958 outb(info->IER, info->ioaddr + UART_IER);
1959 } else {
1960 info->x_char = STOP_CHAR(tty);
1961 outb(0, info->ioaddr + UART_IER);
1962 info->IER |= UART_IER_THRI;
1963 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1964 }
1965 }
1966
0ad9e7d1 1967 if (info->port.tty->termios->c_cflag & CRTSCTS) {
1c45607a
JS		 1968 info->MCR &= ~UART_MCR_RTS;
1969 outb(info->MCR, info->ioaddr + UART_MCR);
1da177e4
LT		 1970 }
1971}
1972
1973/*
1974 * This routine is called by the upper-layer tty layer to signal that
1975 * incoming characters should be throttled.
1976 */
1977static void mxser_throttle(struct tty_struct *tty)
1978{
1da177e4 1979 mxser_stoprx(tty);
1da177e4
LT		 1980}
1981
1982static void mxser_unthrottle(struct tty_struct *tty)
1983{
1c45607a 1984 struct mxser_port *info = tty->driver_data;
1da177e4 1985
1c45607a
JS		 1986 /* startrx */
1987 info->ldisc_stop_rx = 0;
1988 if (I_IXOFF(tty)) {
1989 if (info->x_char)
1990 info->x_char = 0;
1991 else {
1992 if (info->board->chip_flag) {
1993 info->IER |= MOXA_MUST_RECV_ISR;
1994 outb(info->IER, info->ioaddr + UART_IER);
1995 } else {
1996 info->x_char = START_CHAR(tty);
1997 outb(0, info->ioaddr + UART_IER);
1998 info->IER |= UART_IER_THRI;
1999 outb(info->IER, info->ioaddr + UART_IER);
2000 }
1da177e4 2001 }
1c45607a 2002 }
1da177e4 2003
0ad9e7d1 2004 if (info->port.tty->termios->c_cflag & CRTSCTS) {
1c45607a
JS		 2005 info->MCR |= UART_MCR_RTS;
2006 outb(info->MCR, info->ioaddr + UART_MCR);
1da177e4
LT		 2007 }
2008}
2009
2010/*
2011 * mxser_stop() and mxser_start()
2012 *
2013 * This routines are called before setting or resetting tty->stopped.
2014 * They enable or disable transmitter interrupts, as necessary.
2015 */
2016static void mxser_stop(struct tty_struct *tty)
2017{
1c45607a 2018 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 2019 unsigned long flags;
2020
2021 spin_lock_irqsave(&info->slock, flags);
2022 if (info->IER & UART_IER_THRI) {
2023 info->IER &= ~UART_IER_THRI;
1c45607a 2024 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 2025 }
2026 spin_unlock_irqrestore(&info->slock, flags);
2027}
2028
2029static void mxser_start(struct tty_struct *tty)
2030{
1c45607a 2031 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 2032 unsigned long flags;
2033
2034 spin_lock_irqsave(&info->slock, flags);
0ad9e7d1 2035 if (info->xmit_cnt && info->port.xmit_buf) {
1c45607a 2036 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1da177e4 2037 info->IER |= UART_IER_THRI;
1c45607a 2038 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 2039 }
2040 spin_unlock_irqrestore(&info->slock, flags);
2041}
2042
1c45607a
JS		 2043static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
2044{
2045 struct mxser_port *info = tty->driver_data;
2046 unsigned long flags;
2047
2048 spin_lock_irqsave(&info->slock, flags);
2049 mxser_change_speed(info, old_termios);
2050 spin_unlock_irqrestore(&info->slock, flags);
2051
2052 if ((old_termios->c_cflag & CRTSCTS) &&
2053 !(tty->termios->c_cflag & CRTSCTS)) {
2054 tty->hw_stopped = 0;
2055 mxser_start(tty);
2056 }
2057
2058 /* Handle sw stopped */
2059 if ((old_termios->c_iflag & IXON) &&
2060 !(tty->termios->c_iflag & IXON)) {
2061 tty->stopped = 0;
2062
2063 if (info->board->chip_flag) {
2064 spin_lock_irqsave(&info->slock, flags);
148ff86b
CH		 2065 mxser_disable_must_rx_software_flow_control(
2066 info->ioaddr);
1c45607a
JS		 2067 spin_unlock_irqrestore(&info->slock, flags);
2068 }
2069
2070 mxser_start(tty);
2071 }
2072}
2073
1da177e4
LT		 2074/*
2075 * mxser_wait_until_sent() --- wait until the transmitter is empty
2076 */
2077static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
2078{
1c45607a 2079 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 2080 unsigned long orig_jiffies, char_time;
2081 int lsr;
2082
2083 if (info->type == PORT_UNKNOWN)
2084 return;
2085
2086 if (info->xmit_fifo_size == 0)
2087 return; /* Just in case.... */
2088
2089 orig_jiffies = jiffies;
2090 /*
2091 * Set the check interval to be 1/5 of the estimated time to
2092 * send a single character, and make it at least 1. The check
2093 * interval should also be less than the timeout.
2094 *
2095 * Note: we have to use pretty tight timings here to satisfy
2096 * the NIST-PCTS.
2097 */
2098 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
2099 char_time = char_time / 5;
2100 if (char_time == 0)
2101 char_time = 1;
2102 if (timeout && timeout < char_time)
2103 char_time = timeout;
2104 /*
2105 * If the transmitter hasn't cleared in twice the approximate
2106 * amount of time to send the entire FIFO, it probably won't
2107 * ever clear. This assumes the UART isn't doing flow
2108 * control, which is currently the case. Hence, if it ever
2109 * takes longer than info->timeout, this is probably due to a
2110 * UART bug of some kind. So, we clamp the timeout parameter at
2111 * 2*info->timeout.
2112 */
2113 if (!timeout || timeout > 2 * info->timeout)
2114 timeout = 2 * info->timeout;
2115#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
8ea2c2ec
JJ		 2116 printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
2117 timeout, char_time);
1da177e4
LT		 2118 printk("jiff=%lu...", jiffies);
2119#endif
978e595f 2120 lock_kernel();
1c45607a 2121 while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
1da177e4
LT		 2122#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2123 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
2124#endif
da4cd8df 2125 schedule_timeout_interruptible(char_time);
1da177e4 2126 if (signal_pending(current))
1c45607a
JS		 2127 break;
2128 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2129 break;
1da177e4 2130 }
1c45607a 2131 set_current_state(TASK_RUNNING);
978e595f 2132 unlock_kernel();
1da177e4 2133
1c45607a
JS		 2134#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2135 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
2136#endif
2137}
1da177e4 2138
1c45607a
JS		 2139/*
2140 * This routine is called by tty_hangup() when a hangup is signaled.
2141 */
2142static void mxser_hangup(struct tty_struct *tty)
2143{
2144 struct mxser_port *info = tty->driver_data;
1da177e4 2145
1c45607a
JS		 2146 mxser_flush_buffer(tty);
2147 mxser_shutdown(info);
0ad9e7d1
AC		 2148 info->port.count = 0;
2149 info->port.flags &= ~ASYNC_NORMAL_ACTIVE;
2150 info->port.tty = NULL;
2151 wake_up_interruptible(&info->port.open_wait);
1da177e4
LT		 2152}
2153
1c45607a
JS		 2154/*
2155 * mxser_rs_break() --- routine which turns the break handling on or off
2156 */
9e98966c 2157static int mxser_rs_break(struct tty_struct *tty, int break_state)
1da177e4 2158{
1c45607a 2159 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 2160 unsigned long flags;
2161
1c45607a
JS		 2162 spin_lock_irqsave(&info->slock, flags);
2163 if (break_state == -1)
2164 outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
2165 info->ioaddr + UART_LCR);
2166 else
2167 outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
2168 info->ioaddr + UART_LCR);
2169 spin_unlock_irqrestore(&info->slock, flags);
9e98966c 2170 return 0;
1c45607a 2171}
1da177e4 2172
1c45607a
JS		 2173static void mxser_receive_chars(struct mxser_port *port, int *status)
2174{
0ad9e7d1 2175 struct tty_struct *tty = port->port.tty;
1c45607a
JS		 2176 unsigned char ch, gdl;
2177 int ignored = 0;
2178 int cnt = 0;
2179 int recv_room;
2180 int max = 256;
1da177e4 2181
1c45607a
JS		 2182 recv_room = tty->receive_room;
2183 if ((recv_room == 0) && (!port->ldisc_stop_rx))
2184 mxser_stoprx(tty);
1da177e4 2185
1c45607a 2186 if (port->board->chip_flag != MOXA_OTHER_UART) {
1da177e4 2187
1c45607a
JS		 2188 if (*status & UART_LSR_SPECIAL)
2189 goto intr_old;
2190 if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
2191 (*status & MOXA_MUST_LSR_RERR))
2192 goto intr_old;
2193 if (*status & MOXA_MUST_LSR_RERR)
2194 goto intr_old;
1da177e4 2195
1c45607a
JS		 2196 gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
2197
2198 if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
2199 gdl &= MOXA_MUST_GDL_MASK;
2200 if (gdl >= recv_room) {
2201 if (!port->ldisc_stop_rx)
2202 mxser_stoprx(tty);
2203 }
2204 while (gdl--) {
2205 ch = inb(port->ioaddr + UART_RX);
2206 tty_insert_flip_char(tty, ch, 0);
2207 cnt++;
2208 }
2209 goto end_intr;
1da177e4 2210 }
1c45607a
JS		 2211intr_old:
2212
2213 do {
2214 if (max-- < 0)
2215 break;
1da177e4 2216
1c45607a
JS		 2217 ch = inb(port->ioaddr + UART_RX);
2218 if (port->board->chip_flag && (*status & UART_LSR_OE))
2219 outb(0x23, port->ioaddr + UART_FCR);
2220 *status &= port->read_status_mask;
2221 if (*status & port->ignore_status_mask) {
2222 if (++ignored > 100)
2223 break;
2224 } else {
2225 char flag = 0;
2226 if (*status & UART_LSR_SPECIAL) {
2227 if (*status & UART_LSR_BI) {
2228 flag = TTY_BREAK;
2229 port->icount.brk++;
1da177e4 2230
0ad9e7d1 2231 if (port->port.flags & ASYNC_SAK)
1c45607a
JS		 2232 do_SAK(tty);
2233 } else if (*status & UART_LSR_PE) {
2234 flag = TTY_PARITY;
2235 port->icount.parity++;
2236 } else if (*status & UART_LSR_FE) {
2237 flag = TTY_FRAME;
2238 port->icount.frame++;
2239 } else if (*status & UART_LSR_OE) {
2240 flag = TTY_OVERRUN;
2241 port->icount.overrun++;
2242 } else
2243 flag = TTY_BREAK;
2244 }
2245 tty_insert_flip_char(tty, ch, flag);
2246 cnt++;
2247 if (cnt >= recv_room) {
2248 if (!port->ldisc_stop_rx)
2249 mxser_stoprx(tty);
2250 break;
2251 }
1da177e4 2252
1c45607a 2253 }
1da177e4 2254
1c45607a
JS		 2255 if (port->board->chip_flag)
2256 break;
1da177e4 2257
1c45607a
JS		 2258 *status = inb(port->ioaddr + UART_LSR);
2259 } while (*status & UART_LSR_DR);
1da177e4 2260
1c45607a 2261end_intr:
0ad9e7d1 2262 mxvar_log.rxcnt[port->port.tty->index] += cnt;
1c45607a
JS		 2263 port->mon_data.rxcnt += cnt;
2264 port->mon_data.up_rxcnt += cnt;
1da177e4 2265
1c45607a
JS		 2266 /*
2267 * We are called from an interrupt context with &port->slock
2268 * being held. Drop it temporarily in order to prevent
2269 * recursive locking.
2270 */
2271 spin_unlock(&port->slock);
2272 tty_flip_buffer_push(tty);
2273 spin_lock(&port->slock);
1da177e4
LT		 2274}
2275
1c45607a 2276static void mxser_transmit_chars(struct mxser_port *port)
1da177e4 2277{
1c45607a 2278 int count, cnt;
1da177e4 2279
1c45607a
JS		 2280 if (port->x_char) {
2281 outb(port->x_char, port->ioaddr + UART_TX);
2282 port->x_char = 0;
0ad9e7d1 2283 mxvar_log.txcnt[port->port.tty->index]++;
1c45607a
JS		 2284 port->mon_data.txcnt++;
2285 port->mon_data.up_txcnt++;
2286 port->icount.tx++;
2287 return;
2288 }
1da177e4 2289
0ad9e7d1 2290 if (port->port.xmit_buf == NULL)
1c45607a 2291 return;
1da177e4 2292
0ad9e7d1
AC		 2293 if ((port->xmit_cnt <= 0) || port->port.tty->stopped ||
2294 (port->port.tty->hw_stopped &&
1c45607a
JS		 2295 (port->type != PORT_16550A) &&
2296 (!port->board->chip_flag))) {
2297 port->IER &= ~UART_IER_THRI;
2298 outb(port->IER, port->ioaddr + UART_IER);
2299 return;
1da177e4
LT		 2300 }
2301
1c45607a
JS		 2302 cnt = port->xmit_cnt;
2303 count = port->xmit_fifo_size;
2304 do {
0ad9e7d1 2305 outb(port->port.xmit_buf[port->xmit_tail++],
1c45607a
JS		 2306 port->ioaddr + UART_TX);
2307 port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
2308 if (--port->xmit_cnt <= 0)
2309 break;
2310 } while (--count > 0);
0ad9e7d1 2311 mxvar_log.txcnt[port->port.tty->index] += (cnt - port->xmit_cnt);
1da177e4 2312
1c45607a
JS		 2313 port->mon_data.txcnt += (cnt - port->xmit_cnt);
2314 port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
2315 port->icount.tx += (cnt - port->xmit_cnt);
1da177e4 2316
1c45607a 2317 if (port->xmit_cnt < WAKEUP_CHARS)
0ad9e7d1 2318 tty_wakeup(port->port.tty);
1c45607a
JS		 2319
2320 if (port->xmit_cnt <= 0) {
2321 port->IER &= ~UART_IER_THRI;
2322 outb(port->IER, port->ioaddr + UART_IER);
1da177e4 2323 }
1da177e4
LT		 2324}
2325
2326/*
1c45607a 2327 * This is the serial driver's generic interrupt routine
1da177e4 2328 */
1c45607a 2329static irqreturn_t mxser_interrupt(int irq, void *dev_id)
1da177e4 2330{
1c45607a
JS		 2331 int status, iir, i;
2332 struct mxser_board *brd = NULL;
2333 struct mxser_port *port;
2334 int max, irqbits, bits, msr;
2335 unsigned int int_cnt, pass_counter = 0;
2336 int handled = IRQ_NONE;
1da177e4 2337
1c45607a
JS		 2338 for (i = 0; i < MXSER_BOARDS; i++)
2339 if (dev_id == &mxser_boards[i]) {
2340 brd = dev_id;
2341 break;
2342 }
1da177e4 2343
1c45607a
JS		 2344 if (i == MXSER_BOARDS)
2345 goto irq_stop;
2346 if (brd == NULL)
2347 goto irq_stop;
2348 max = brd->info->nports;
2349 while (pass_counter++ < MXSER_ISR_PASS_LIMIT) {
2350 irqbits = inb(brd->vector) & brd->vector_mask;
2351 if (irqbits == brd->vector_mask)
2352 break;
1da177e4 2353
1c45607a
JS		 2354 handled = IRQ_HANDLED;
2355 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
2356 if (irqbits == brd->vector_mask)
2357 break;
2358 if (bits & irqbits)
2359 continue;
2360 port = &brd->ports[i];
2361
2362 int_cnt = 0;
2363 spin_lock(&port->slock);
2364 do {
2365 iir = inb(port->ioaddr + UART_IIR);
2366 if (iir & UART_IIR_NO_INT)
2367 break;
2368 iir &= MOXA_MUST_IIR_MASK;
0ad9e7d1
AC		 2369 if (!port->port.tty ||
2370 (port->port.flags & ASYNC_CLOSING) ||
2371 !(port->port.flags &
1c45607a
JS		 2372 ASYNC_INITIALIZED)) {
2373 status = inb(port->ioaddr + UART_LSR);
2374 outb(0x27, port->ioaddr + UART_FCR);
2375 inb(port->ioaddr + UART_MSR);
2376 break;
2377 }
1da177e4 2378
1c45607a
JS		 2379 status = inb(port->ioaddr + UART_LSR);
2380
2381 if (status & UART_LSR_PE)
2382 port->err_shadow |= NPPI_NOTIFY_PARITY;
2383 if (status & UART_LSR_FE)
2384 port->err_shadow |= NPPI_NOTIFY_FRAMING;
2385 if (status & UART_LSR_OE)
2386 port->err_shadow |=
2387 NPPI_NOTIFY_HW_OVERRUN;
2388 if (status & UART_LSR_BI)
2389 port->err_shadow |= NPPI_NOTIFY_BREAK;
2390
2391 if (port->board->chip_flag) {
2392 if (iir == MOXA_MUST_IIR_GDA ||
2393 iir == MOXA_MUST_IIR_RDA ||
2394 iir == MOXA_MUST_IIR_RTO ||
2395 iir == MOXA_MUST_IIR_LSR)
2396 mxser_receive_chars(port,
2397 &status);
2398
2399 } else {
2400 status &= port->read_status_mask;
2401 if (status & UART_LSR_DR)
2402 mxser_receive_chars(port,
2403 &status);
2404 }
2405 msr = inb(port->ioaddr + UART_MSR);
2406 if (msr & UART_MSR_ANY_DELTA)
2407 mxser_check_modem_status(port, msr);
2408
2409 if (port->board->chip_flag) {
2410 if (iir == 0x02 && (status &
2411 UART_LSR_THRE))
2412 mxser_transmit_chars(port);
2413 } else {
2414 if (status & UART_LSR_THRE)
2415 mxser_transmit_chars(port);
2416 }
2417 } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
2418 spin_unlock(&port->slock);
2419 }
2420 }
1da177e4 2421
1c45607a
JS		 2422irq_stop:
2423 return handled;
2424}
1da177e4 2425
1c45607a
JS		 2426static const struct tty_operations mxser_ops = {
2427 .open = mxser_open,
2428 .close = mxser_close,
2429 .write = mxser_write,
2430 .put_char = mxser_put_char,
2431 .flush_chars = mxser_flush_chars,
2432 .write_room = mxser_write_room,
2433 .chars_in_buffer = mxser_chars_in_buffer,
2434 .flush_buffer = mxser_flush_buffer,
2435 .ioctl = mxser_ioctl,
2436 .throttle = mxser_throttle,
2437 .unthrottle = mxser_unthrottle,
2438 .set_termios = mxser_set_termios,
2439 .stop = mxser_stop,
2440 .start = mxser_start,
2441 .hangup = mxser_hangup,
2442 .break_ctl = mxser_rs_break,
2443 .wait_until_sent = mxser_wait_until_sent,
2444 .tiocmget = mxser_tiocmget,
2445 .tiocmset = mxser_tiocmset,
2446};
1da177e4 2447
1c45607a
JS		 2448/*
2449 * The MOXA Smartio/Industio serial driver boot-time initialization code!
2450 */
1da177e4 2451
1c45607a
JS		 2452static void mxser_release_res(struct mxser_board *brd, struct pci_dev *pdev,
2453 unsigned int irq)
2454{
2455 if (irq)
2456 free_irq(brd->irq, brd);
2457 if (pdev != NULL) { /* PCI */
2458#ifdef CONFIG_PCI
2459 pci_release_region(pdev, 2);
2460 pci_release_region(pdev, 3);
2461#endif
2462 } else {
2463 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
2464 release_region(brd->vector, 1);
2465 }
1da177e4
LT		 2466}
2467
1c45607a
JS		 2468static int __devinit mxser_initbrd(struct mxser_board *brd,
2469 struct pci_dev *pdev)
1da177e4 2470{
1c45607a
JS		 2471 struct mxser_port *info;
2472 unsigned int i;
2473 int retval;
1da177e4 2474
83766bc6
JS		 2475 printk(KERN_INFO "mxser: max. baud rate = %d bps\n",
2476 brd->ports[0].max_baud);
1da177e4 2477
1c45607a
JS		 2478 for (i = 0; i < brd->info->nports; i++) {
2479 info = &brd->ports[i];
44b7d1b3 2480 tty_port_init(&info->port);
1c45607a
JS		 2481 info->board = brd;
2482 info->stop_rx = 0;
2483 info->ldisc_stop_rx = 0;
1da177e4 2484
1c45607a
JS		 2485 /* Enhance mode enabled here */
2486 if (brd->chip_flag != MOXA_OTHER_UART)
148ff86b 2487 mxser_enable_must_enchance_mode(info->ioaddr);
1da177e4 2488
0ad9e7d1 2489 info->port.flags = ASYNC_SHARE_IRQ;
1c45607a 2490 info->type = brd->uart_type;
1da177e4 2491
1c45607a 2492 process_txrx_fifo(info);
1da177e4 2493
1c45607a 2494 info->custom_divisor = info->baud_base * 16;
44b7d1b3
AC		 2495 info->port.close_delay = 5 * HZ / 10;
2496 info->port.closing_wait = 30 * HZ;
1c45607a 2497 info->normal_termios = mxvar_sdriver->init_termios;
1c45607a
JS		 2498 init_waitqueue_head(&info->delta_msr_wait);
2499 memset(&info->mon_data, 0, sizeof(struct mxser_mon));
2500 info->err_shadow = 0;
2501 spin_lock_init(&info->slock);
1da177e4 2502
1c45607a
JS		 2503 /* before set INT ISR, disable all int */
2504 outb(inb(info->ioaddr + UART_IER) & 0xf0,
2505 info->ioaddr + UART_IER);
2506 }
1da177e4 2507
1c45607a
JS		 2508 retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser",
2509 brd);
2510 if (retval) {
2511 printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
2512 "conflict with another device.\n",
2513 brd->info->name, brd->irq);
2514 /* We hold resources, we need to release them. */
2515 mxser_release_res(brd, pdev, 0);
2516 }
2517 return retval;
2518}
1da177e4 2519
1c45607a 2520static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
1da177e4
LT		 2521{
2522 int id, i, bits;
2523 unsigned short regs[16], irq;
2524 unsigned char scratch, scratch2;
2525
1c45607a 2526 brd->chip_flag = MOXA_OTHER_UART;
1da177e4
LT		 2527
2528 id = mxser_read_register(cap, regs);
1c45607a
JS		 2529 switch (id) {
2530 case C168_ASIC_ID:
2531 brd->info = &mxser_cards[0];
2532 break;
2533 case C104_ASIC_ID:
2534 brd->info = &mxser_cards[1];
2535 break;
2536 case CI104J_ASIC_ID:
2537 brd->info = &mxser_cards[2];
2538 break;
2539 case C102_ASIC_ID:
2540 brd->info = &mxser_cards[5];
2541 break;
2542 case CI132_ASIC_ID:
2543 brd->info = &mxser_cards[6];
2544 break;
2545 case CI134_ASIC_ID:
2546 brd->info = &mxser_cards[7];
2547 break;
2548 default:
8ea2c2ec 2549 return 0;
1c45607a 2550 }
1da177e4
LT		 2551
2552 irq = 0;
1c45607a
JS		 2553 /* some ISA cards have 2 ports, but we want to see them as 4-port (why?)
2554 Flag-hack checks if configuration should be read as 2-port here. */
2555 if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) {
1da177e4
LT		 2556 irq = regs[9] & 0xF000;
2557 irq = irq | (irq >> 4);
2558 if (irq != (regs[9] & 0xFF00))
83766bc6 2559 goto err_irqconflict;
1c45607a 2560 } else if (brd->info->nports == 4) {
1da177e4
LT		 2561 irq = regs[9] & 0xF000;
2562 irq = irq | (irq >> 4);
2563 irq = irq | (irq >> 8);
2564 if (irq != regs[9])
83766bc6 2565 goto err_irqconflict;
1c45607a 2566 } else if (brd->info->nports == 8) {
1da177e4
LT		 2567 irq = regs[9] & 0xF000;
2568 irq = irq | (irq >> 4);
2569 irq = irq | (irq >> 8);
2570 if ((irq != regs[9]) || (irq != regs[10]))
83766bc6 2571 goto err_irqconflict;
1da177e4
LT		 2572 }
2573
83766bc6
JS		 2574 if (!irq) {
2575 printk(KERN_ERR "mxser: interrupt number unset\n");
2576 return -EIO;
2577 }
1c45607a 2578 brd->irq = ((int)(irq & 0xF000) >> 12);
1da177e4 2579 for (i = 0; i < 8; i++)
1c45607a 2580 brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
83766bc6
JS		 2581 if ((regs[12] & 0x80) == 0) {
2582 printk(KERN_ERR "mxser: invalid interrupt vector\n");
2583 return -EIO;
2584 }
1c45607a 2585 brd->vector = (int)regs[11]; /* interrupt vector */
1da177e4 2586 if (id == 1)
1c45607a 2587 brd->vector_mask = 0x00FF;
1da177e4 2588 else
1c45607a 2589 brd->vector_mask = 0x000F;
1da177e4
LT		 2590 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
2591 if (regs[12] & bits) {
1c45607a
JS		 2592 brd->ports[i].baud_base = 921600;
2593 brd->ports[i].max_baud = 921600;
1da177e4 2594 } else {
1c45607a
JS		 2595 brd->ports[i].baud_base = 115200;
2596 brd->ports[i].max_baud = 115200;
1da177e4
LT		 2597 }
2598 }
2599 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
2600 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
2601 outb(0, cap + UART_EFR); /* EFR is the same as FCR */
2602 outb(scratch2, cap + UART_LCR);
2603 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
2604 scratch = inb(cap + UART_IIR);
2605
2606 if (scratch & 0xC0)
1c45607a 2607 brd->uart_type = PORT_16550A;
1da177e4 2608 else
1c45607a
JS		 2609 brd->uart_type = PORT_16450;
2610 if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports,
83766bc6
JS		 2611 "mxser(IO)")) {
2612 printk(KERN_ERR "mxser: can't request ports I/O region: "
2613 "0x%.8lx-0x%.8lx\n",
2614 brd->ports[0].ioaddr, brd->ports[0].ioaddr +
2615 8 * brd->info->nports - 1);
2616 return -EIO;
2617 }
1c45607a
JS		 2618 if (!request_region(brd->vector, 1, "mxser(vector)")) {
2619 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
83766bc6
JS		 2620 printk(KERN_ERR "mxser: can't request interrupt vector region: "
2621 "0x%.8lx-0x%.8lx\n",
2622 brd->ports[0].ioaddr, brd->ports[0].ioaddr +
2623 8 * brd->info->nports - 1);
2624 return -EIO;
1c45607a
JS		 2625 }
2626 return brd->info->nports;
83766bc6
JS		 2627
2628err_irqconflict:
2629 printk(KERN_ERR "mxser: invalid interrupt number\n");
2630 return -EIO;
1da177e4
LT		 2631}
2632
1c45607a
JS		 2633static int __devinit mxser_probe(struct pci_dev *pdev,
2634 const struct pci_device_id *ent)
1da177e4 2635{
1c45607a
JS		 2636#ifdef CONFIG_PCI
2637 struct mxser_board *brd;
2638 unsigned int i, j;
2639 unsigned long ioaddress;
2640 int retval = -EINVAL;
1da177e4 2641
1c45607a
JS		 2642 for (i = 0; i < MXSER_BOARDS; i++)
2643 if (mxser_boards[i].info == NULL)
2644 break;
2645
2646 if (i >= MXSER_BOARDS) {
83766bc6
JS		 2647 dev_err(&pdev->dev, "too many boards found (maximum %d), board "
2648 "not configured\n", MXSER_BOARDS);
1c45607a
JS		 2649 goto err;
2650 }
2651
2652 brd = &mxser_boards[i];
2653 brd->idx = i * MXSER_PORTS_PER_BOARD;
83766bc6 2654 dev_info(&pdev->dev, "found MOXA %s board (BusNo=%d, DevNo=%d)\n",
1c45607a
JS		 2655 mxser_cards[ent->driver_data].name,
2656 pdev->bus->number, PCI_SLOT(pdev->devfn));
2657
2658 retval = pci_enable_device(pdev);
2659 if (retval) {
83766bc6 2660 dev_err(&pdev->dev, "PCI enable failed\n");
1c45607a
JS		 2661 goto err;
2662 }
2663
2664 /* io address */
2665 ioaddress = pci_resource_start(pdev, 2);
2666 retval = pci_request_region(pdev, 2, "mxser(IO)");
2667 if (retval)
2668 goto err;
2669
2670 brd->info = &mxser_cards[ent->driver_data];
2671 for (i = 0; i < brd->info->nports; i++)
2672 brd->ports[i].ioaddr = ioaddress + 8 * i;
2673
2674 /* vector */
2675 ioaddress = pci_resource_start(pdev, 3);
2676 retval = pci_request_region(pdev, 3, "mxser(vector)");
2677 if (retval)
2678 goto err_relio;
2679 brd->vector = ioaddress;
2680
2681 /* irq */
2682 brd->irq = pdev->irq;
2683
2684 brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
2685 brd->uart_type = PORT_16550A;
2686 brd->vector_mask = 0;
2687
2688 for (i = 0; i < brd->info->nports; i++) {
2689 for (j = 0; j < UART_INFO_NUM; j++) {
2690 if (Gpci_uart_info[j].type == brd->chip_flag) {
2691 brd->ports[i].max_baud =
2692 Gpci_uart_info[j].max_baud;
2693
2694 /* exception....CP-102 */
2695 if (brd->info->flags & MXSER_HIGHBAUD)
2696 brd->ports[i].max_baud = 921600;
2697 break;
1da177e4
LT		 2698 }
2699 }
1c45607a
JS		 2700 }
2701
2702 if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
2703 for (i = 0; i < brd->info->nports; i++) {
2704 if (i < 4)
2705 brd->ports[i].opmode_ioaddr = ioaddress + 4;
2706 else
2707 brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
1da177e4 2708 }
1c45607a
JS		 2709 outb(0, ioaddress + 4); /* default set to RS232 mode */
2710 outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
1da177e4 2711 }
1c45607a
JS		 2712
2713 for (i = 0; i < brd->info->nports; i++) {
2714 brd->vector_mask |= (1 << i);
2715 brd->ports[i].baud_base = 921600;
2716 }
2717
2718 /* mxser_initbrd will hook ISR. */
2719 retval = mxser_initbrd(brd, pdev);
2720 if (retval)
2721 goto err_null;
2722
2723 for (i = 0; i < brd->info->nports; i++)
2724 tty_register_device(mxvar_sdriver, brd->idx + i, &pdev->dev);
2725
2726 pci_set_drvdata(pdev, brd);
2727
2728 return 0;
2729err_relio:
2730 pci_release_region(pdev, 2);
2731err_null:
2732 brd->info = NULL;
2733err:
2734 return retval;
2735#else
2736 return -ENODEV;
2737#endif
1da177e4
LT		 2738}
2739
1c45607a 2740static void __devexit mxser_remove(struct pci_dev *pdev)
1da177e4 2741{
1c45607a
JS		 2742 struct mxser_board *brd = pci_get_drvdata(pdev);
2743 unsigned int i;
1da177e4 2744
1c45607a
JS		 2745 for (i = 0; i < brd->info->nports; i++)
2746 tty_unregister_device(mxvar_sdriver, brd->idx + i);
1da177e4 2747
1c45607a
JS		 2748 mxser_release_res(brd, pdev, 1);
2749 brd->info = NULL;
1da177e4
LT		 2750}
2751
1c45607a
JS		 2752static struct pci_driver mxser_driver = {
2753 .name = "mxser",
2754 .id_table = mxser_pcibrds,
2755 .probe = mxser_probe,
2756 .remove = __devexit_p(mxser_remove)
2757};
2758
2759static int __init mxser_module_init(void)
1da177e4 2760{
1c45607a 2761 struct mxser_board *brd;
1df00924
JS		 2762 unsigned int b, i, m;
2763 int retval;
1da177e4 2764
1c45607a
JS		 2765 pr_debug("Loading module mxser ...\n");
2766
2767 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
2768 if (!mxvar_sdriver)
2769 return -ENOMEM;
2770
2771 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
2772 MXSER_VERSION);
2773
2774 /* Initialize the tty_driver structure */
2775 mxvar_sdriver->owner = THIS_MODULE;
2776 mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
2777 mxvar_sdriver->name = "ttyMI";
2778 mxvar_sdriver->major = ttymajor;
2779 mxvar_sdriver->minor_start = 0;
2780 mxvar_sdriver->num = MXSER_PORTS + 1;
2781 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
2782 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
2783 mxvar_sdriver->init_termios = tty_std_termios;
2784 mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
2785 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
2786 tty_set_operations(mxvar_sdriver, &mxser_ops);
2787
2788 retval = tty_register_driver(mxvar_sdriver);
2789 if (retval) {
2790 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
2791 "tty driver !\n");
2792 goto err_put;
1da177e4 2793 }
1c45607a 2794
1c45607a 2795 /* Start finding ISA boards here */
1df00924
JS		 2796 for (m = 0, b = 0; b < MXSER_BOARDS; b++) {
2797 if (!ioaddr[b])
2798 continue;
2799
2800 brd = &mxser_boards[m];
2801 retval = mxser_get_ISA_conf(!ioaddr[b], brd);
2802 if (retval <= 0) {
2803 brd->info = NULL;
2804 continue;
2805 }
1c45607a 2806
1df00924
JS		 2807 printk(KERN_INFO "mxser: found MOXA %s board (CAP=0x%lx)\n",
2808 brd->info->name, ioaddr[b]);
83766bc6 2809
1df00924
JS		 2810 /* mxser_initbrd will hook ISR. */
2811 if (mxser_initbrd(brd, NULL) < 0) {
2812 brd->info = NULL;
2813 continue;
2814 }
1c45607a 2815
1df00924
JS		 2816 brd->idx = m * MXSER_PORTS_PER_BOARD;
2817 for (i = 0; i < brd->info->nports; i++)
2818 tty_register_device(mxvar_sdriver, brd->idx + i, NULL);
1c45607a 2819
1df00924
JS		 2820 m++;
2821 }
1c45607a
JS		 2822
2823 retval = pci_register_driver(&mxser_driver);
2824 if (retval) {
83766bc6 2825 printk(KERN_ERR "mxser: can't register pci driver\n");
1c45607a
JS		 2826 if (!m) {
2827 retval = -ENODEV;
2828 goto err_unr;
2829 } /* else: we have some ISA cards under control */
2830 }
2831
2832 pr_debug("Done.\n");
2833
2834 return 0;
2835err_unr:
2836 tty_unregister_driver(mxvar_sdriver);
2837err_put:
2838 put_tty_driver(mxvar_sdriver);
2839 return retval;
2840}
2841
2842static void __exit mxser_module_exit(void)
2843{
2844 unsigned int i, j;
2845
2846 pr_debug("Unloading module mxser ...\n");
2847
2848 pci_unregister_driver(&mxser_driver);
2849
2850 for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */
2851 if (mxser_boards[i].info != NULL)
2852 for (j = 0; j < mxser_boards[i].info->nports; j++)
2853 tty_unregister_device(mxvar_sdriver,
2854 mxser_boards[i].idx + j);
2855 tty_unregister_driver(mxvar_sdriver);
2856 put_tty_driver(mxvar_sdriver);
2857
2858 for (i = 0; i < MXSER_BOARDS; i++)
2859 if (mxser_boards[i].info != NULL)
2860 mxser_release_res(&mxser_boards[i], NULL, 1);
2861
2862 pr_debug("Done.\n");
1da177e4
LT		 2863}
2864
2865module_init(mxser_module_init);
2866module_exit(mxser_module_exit);
ubuntu-bionic-kernel mirror