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serial: replace the state mutex with the tty port mutex
[mirror_ubuntu-bionic-kernel.git] / drivers / char / mxser.c
CommitLineData
1da177e4
LT		 1/*
2 * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
3 *
80ff8a80
JS		 4 * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com).
5 * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com>
1da177e4 6 *
1c45607a
JS		 7 * This code is loosely based on the 1.8 moxa driver which is based on
8 * Linux serial driver, written by Linus Torvalds, Theodore T'so and
9 * others.
1da177e4
LT		 10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
8ea2c2ec 14 * (at your option) any later version.
1da177e4 15 *
1da177e4 16 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
8eb04cf3
AC		 17 * <alan@lxorguk.ukuu.org.uk>. The original 1.8 code is available on
18 * www.moxa.com.
1da177e4 19 * - Fixed x86_64 cleanness
1da177e4
LT		 20 */
21
1da177e4 22#include <linux/module.h>
1da177e4
LT		 23#include <linux/errno.h>
24#include <linux/signal.h>
25#include <linux/sched.h>
405f5571 26#include <linux/smp_lock.h>
1da177e4
LT		 27#include <linux/timer.h>
28#include <linux/interrupt.h>
29#include <linux/tty.h>
30#include <linux/tty_flip.h>
31#include <linux/serial.h>
32#include <linux/serial_reg.h>
33#include <linux/major.h>
34#include <linux/string.h>
35#include <linux/fcntl.h>
36#include <linux/ptrace.h>
37#include <linux/gfp.h>
38#include <linux/ioport.h>
39#include <linux/mm.h>
1da177e4
LT		 40#include <linux/delay.h>
41#include <linux/pci.h>
1977f032 42#include <linux/bitops.h>
1da177e4
LT		 43
44#include <asm/system.h>
45#include <asm/io.h>
46#include <asm/irq.h>
1da177e4
LT		 47#include <asm/uaccess.h>
48
49#include "mxser.h"
50
e129deff 51#define MXSER_VERSION "2.0.4" /* 1.12 */
1da177e4 52#define MXSERMAJOR 174
1da177e4 53
1da177e4 54#define MXSER_BOARDS 4 /* Max. boards */
1da177e4 55#define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
1c45607a
JS		 56#define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD)
57#define MXSER_ISR_PASS_LIMIT 100
1da177e4 58
1c45607a
JS		 59/*CheckIsMoxaMust return value*/
60#define MOXA_OTHER_UART 0x00
61#define MOXA_MUST_MU150_HWID 0x01
62#define MOXA_MUST_MU860_HWID 0x02
63
1da177e4
LT		 64#define WAKEUP_CHARS 256
65
66#define UART_MCR_AFE 0x20
67#define UART_LSR_SPECIAL 0x1E
68
e129deff 69#define PCI_DEVICE_ID_POS104UL 0x1044
1c45607a 70#define PCI_DEVICE_ID_CB108 0x1080
e129deff 71#define PCI_DEVICE_ID_CP102UF 0x1023
1c45607a 72#define PCI_DEVICE_ID_CB114 0x1142
80ff8a80 73#define PCI_DEVICE_ID_CP114UL 0x1143
1c45607a
JS		 74#define PCI_DEVICE_ID_CB134I 0x1341
75#define PCI_DEVICE_ID_CP138U 0x1380
1da177e4 76
1da177e4
LT		 77
78#define C168_ASIC_ID 1
79#define C104_ASIC_ID 2
80#define C102_ASIC_ID 0xB
81#define CI132_ASIC_ID 4
82#define CI134_ASIC_ID 3
83#define CI104J_ASIC_ID 5
84
1c45607a
JS		 85#define MXSER_HIGHBAUD 1
86#define MXSER_HAS2 2
1da177e4 87
8ea2c2ec 88/* This is only for PCI */
1c45607a 89static const struct {
1da177e4
LT		 90 int type;
91 int tx_fifo;
92 int rx_fifo;
93 int xmit_fifo_size;
94 int rx_high_water;
95 int rx_trigger;
96 int rx_low_water;
97 long max_baud;
1c45607a 98} Gpci_uart_info[] = {
1da177e4
LT		 99 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
100 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
101 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
102};
1c45607a 103#define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info)
1da177e4 104
1c45607a
JS		 105struct mxser_cardinfo {
106 char *name;
107 unsigned int nports;
108 unsigned int flags;
109};
1da177e4 110
1c45607a
JS		 111static const struct mxser_cardinfo mxser_cards[] = {
112/* 0*/ { "C168 series", 8, },
113 { "C104 series", 4, },
114 { "CI-104J series", 4, },
115 { "C168H/PCI series", 8, },
116 { "C104H/PCI series", 4, },
117/* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */
118 { "CI-132 series", 4, MXSER_HAS2 },
119 { "CI-134 series", 4, },
120 { "CP-132 series", 2, },
121 { "CP-114 series", 4, },
122/*10*/ { "CT-114 series", 4, },
123 { "CP-102 series", 2, MXSER_HIGHBAUD },
124 { "CP-104U series", 4, },
125 { "CP-168U series", 8, },
126 { "CP-132U series", 2, },
127/*15*/ { "CP-134U series", 4, },
128 { "CP-104JU series", 4, },
129 { "Moxa UC7000 Serial", 8, }, /* RC7000 */
130 { "CP-118U series", 8, },
131 { "CP-102UL series", 2, },
132/*20*/ { "CP-102U series", 2, },
133 { "CP-118EL series", 8, },
134 { "CP-168EL series", 8, },
135 { "CP-104EL series", 4, },
136 { "CB-108 series", 8, },
137/*25*/ { "CB-114 series", 4, },
138 { "CB-134I series", 4, },
139 { "CP-138U series", 8, },
80ff8a80 140 { "POS-104UL series", 4, },
e129deff
JS		 141 { "CP-114UL series", 4, },
142/*30*/ { "CP-102UF series", 2, }
1c45607a 143};
1da177e4 144
1c45607a
JS		 145/* driver_data correspond to the lines in the structure above
146 see also ISA probe function before you change something */
1da177e4 147static struct pci_device_id mxser_pcibrds[] = {
1c45607a
JS		 148 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 },
149 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 },
150 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 },
151 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 },
152 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 },
153 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 },
154 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 },
155 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 },
156 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 },
157 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 },
158 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 },
159 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 },
160 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 },
161 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 },
162 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 },
163 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 },
164 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 },
165 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 },
166 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 },
167 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 },
168 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 },
169 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 },
170 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 },
80ff8a80 171 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 },
e129deff 172 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 },
1c45607a 173 { }
1da177e4 174};
1da177e4
LT		 175MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
176
1df00924 177static unsigned long ioaddr[MXSER_BOARDS];
1da177e4 178static int ttymajor = MXSERMAJOR;
1da177e4
LT		 179
180/* Variables for insmod */
181
182MODULE_AUTHOR("Casper Yang");
183MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
1df00924
JS		 184module_param_array(ioaddr, ulong, NULL, 0);
185MODULE_PARM_DESC(ioaddr, "ISA io addresses to look for a moxa board");
8d3b33f6 186module_param(ttymajor, int, 0);
1da177e4
LT		 187MODULE_LICENSE("GPL");
188
189struct mxser_log {
190 int tick;
191 unsigned long rxcnt[MXSER_PORTS];
192 unsigned long txcnt[MXSER_PORTS];
193};
194
1da177e4
LT		 195struct mxser_mon {
196 unsigned long rxcnt;
197 unsigned long txcnt;
198 unsigned long up_rxcnt;
199 unsigned long up_txcnt;
200 int modem_status;
201 unsigned char hold_reason;
202};
203
204struct mxser_mon_ext {
205 unsigned long rx_cnt[32];
206 unsigned long tx_cnt[32];
207 unsigned long up_rxcnt[32];
208 unsigned long up_txcnt[32];
209 int modem_status[32];
210
211 long baudrate[32];
212 int databits[32];
213 int stopbits[32];
214 int parity[32];
215 int flowctrl[32];
216 int fifo[32];
217 int iftype[32];
218};
8ea2c2ec 219
1c45607a
JS		 220struct mxser_board;
221
222struct mxser_port {
0ad9e7d1 223 struct tty_port port;
1c45607a 224 struct mxser_board *board;
1c45607a
JS		 225
226 unsigned long ioaddr;
227 unsigned long opmode_ioaddr;
228 int max_baud;
1da177e4 229
1da177e4
LT		 230 int rx_high_water;
231 int rx_trigger; /* Rx fifo trigger level */
232 int rx_low_water;
233 int baud_base; /* max. speed */
1da177e4 234 int type; /* UART type */
1c45607a 235
1da177e4 236 int x_char; /* xon/xoff character */
1da177e4
LT		 237 int IER; /* Interrupt Enable Register */
238 int MCR; /* Modem control register */
1c45607a
JS		 239
240 unsigned char stop_rx;
241 unsigned char ldisc_stop_rx;
242
243 int custom_divisor;
1c45607a 244 unsigned char err_shadow;
1c45607a 245
1c45607a
JS		 246 struct async_icount icount; /* kernel counters for 4 input interrupts */
247 int timeout;
248
249 int read_status_mask;
250 int ignore_status_mask;
251 int xmit_fifo_size;
1da177e4
LT		 252 int xmit_head;
253 int xmit_tail;
254 int xmit_cnt;
1c45607a 255
606d099c 256 struct ktermios normal_termios;
1c45607a 257
1da177e4 258 struct mxser_mon mon_data;
1c45607a 259
1da177e4 260 spinlock_t slock;
1c45607a
JS		 261 wait_queue_head_t delta_msr_wait;
262};
263
264struct mxser_board {
265 unsigned int idx;
266 int irq;
267 const struct mxser_cardinfo *info;
268 unsigned long vector;
269 unsigned long vector_mask;
270
271 int chip_flag;
272 int uart_type;
273
274 struct mxser_port ports[MXSER_PORTS_PER_BOARD];
1da177e4
LT		 275};
276
1da177e4
LT		 277struct mxser_mstatus {
278 tcflag_t cflag;
279 int cts;
280 int dsr;
281 int ri;
282 int dcd;
283};
284
1c45607a 285static struct mxser_board mxser_boards[MXSER_BOARDS];
1da177e4 286static struct tty_driver *mxvar_sdriver;
1da177e4 287static struct mxser_log mxvar_log;
1da177e4 288static int mxser_set_baud_method[MXSER_PORTS + 1];
1da177e4 289
148ff86b
CH		 290static void mxser_enable_must_enchance_mode(unsigned long baseio)
291{
292 u8 oldlcr;
293 u8 efr;
294
295 oldlcr = inb(baseio + UART_LCR);
296 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
297
298 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
299 efr |= MOXA_MUST_EFR_EFRB_ENABLE;
300
301 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
302 outb(oldlcr, baseio + UART_LCR);
303}
304
305static void mxser_disable_must_enchance_mode(unsigned long baseio)
306{
307 u8 oldlcr;
308 u8 efr;
309
310 oldlcr = inb(baseio + UART_LCR);
311 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
312
313 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
314 efr &= ~MOXA_MUST_EFR_EFRB_ENABLE;
315
316 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
317 outb(oldlcr, baseio + UART_LCR);
318}
319
320static void mxser_set_must_xon1_value(unsigned long baseio, u8 value)
321{
322 u8 oldlcr;
323 u8 efr;
324
325 oldlcr = inb(baseio + UART_LCR);
326 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
327
328 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
329 efr &= ~MOXA_MUST_EFR_BANK_MASK;
330 efr |= MOXA_MUST_EFR_BANK0;
331
332 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
333 outb(value, baseio + MOXA_MUST_XON1_REGISTER);
334 outb(oldlcr, baseio + UART_LCR);
335}
336
337static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value)
338{
339 u8 oldlcr;
340 u8 efr;
341
342 oldlcr = inb(baseio + UART_LCR);
343 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
344
345 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
346 efr &= ~MOXA_MUST_EFR_BANK_MASK;
347 efr |= MOXA_MUST_EFR_BANK0;
348
349 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
350 outb(value, baseio + MOXA_MUST_XOFF1_REGISTER);
351 outb(oldlcr, baseio + UART_LCR);
352}
353
354static void mxser_set_must_fifo_value(struct mxser_port *info)
355{
356 u8 oldlcr;
357 u8 efr;
358
359 oldlcr = inb(info->ioaddr + UART_LCR);
360 outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR);
361
362 efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER);
363 efr &= ~MOXA_MUST_EFR_BANK_MASK;
364 efr |= MOXA_MUST_EFR_BANK1;
365
366 outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER);
367 outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER);
368 outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER);
369 outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER);
370 outb(oldlcr, info->ioaddr + UART_LCR);
371}
372
373static void mxser_set_must_enum_value(unsigned long baseio, u8 value)
374{
375 u8 oldlcr;
376 u8 efr;
377
378 oldlcr = inb(baseio + UART_LCR);
379 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
380
381 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
382 efr &= ~MOXA_MUST_EFR_BANK_MASK;
383 efr |= MOXA_MUST_EFR_BANK2;
384
385 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
386 outb(value, baseio + MOXA_MUST_ENUM_REGISTER);
387 outb(oldlcr, baseio + UART_LCR);
388}
389
390static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId)
391{
392 u8 oldlcr;
393 u8 efr;
394
395 oldlcr = inb(baseio + UART_LCR);
396 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
397
398 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
399 efr &= ~MOXA_MUST_EFR_BANK_MASK;
400 efr |= MOXA_MUST_EFR_BANK2;
401
402 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
403 *pId = inb(baseio + MOXA_MUST_HWID_REGISTER);
404 outb(oldlcr, baseio + UART_LCR);
405}
406
407static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio)
408{
409 u8 oldlcr;
410 u8 efr;
411
412 oldlcr = inb(baseio + UART_LCR);
413 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
414
415 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
416 efr &= ~MOXA_MUST_EFR_SF_MASK;
417
418 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
419 outb(oldlcr, baseio + UART_LCR);
420}
421
422static void mxser_enable_must_tx_software_flow_control(unsigned long baseio)
423{
424 u8 oldlcr;
425 u8 efr;
426
427 oldlcr = inb(baseio + UART_LCR);
428 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
429
430 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
431 efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
432 efr |= MOXA_MUST_EFR_SF_TX1;
433
434 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
435 outb(oldlcr, baseio + UART_LCR);
436}
437
438static void mxser_disable_must_tx_software_flow_control(unsigned long baseio)
439{
440 u8 oldlcr;
441 u8 efr;
442
443 oldlcr = inb(baseio + UART_LCR);
444 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
445
446 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
447 efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
448
449 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
450 outb(oldlcr, baseio + UART_LCR);
451}
452
453static void mxser_enable_must_rx_software_flow_control(unsigned long baseio)
454{
455 u8 oldlcr;
456 u8 efr;
457
458 oldlcr = inb(baseio + UART_LCR);
459 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
460
461 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
462 efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
463 efr |= MOXA_MUST_EFR_SF_RX1;
464
465 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
466 outb(oldlcr, baseio + UART_LCR);
467}
468
469static void mxser_disable_must_rx_software_flow_control(unsigned long baseio)
470{
471 u8 oldlcr;
472 u8 efr;
473
474 oldlcr = inb(baseio + UART_LCR);
475 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
476
477 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
478 efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
479
480 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
481 outb(oldlcr, baseio + UART_LCR);
482}
483
b8cc5549 484#ifdef CONFIG_PCI
1c45607a 485static int __devinit CheckIsMoxaMust(unsigned long io)
1da177e4
LT		 486{
487 u8 oldmcr, hwid;
488 int i;
489
490 outb(0, io + UART_LCR);
148ff86b 491 mxser_disable_must_enchance_mode(io);
1da177e4
LT		 492 oldmcr = inb(io + UART_MCR);
493 outb(0, io + UART_MCR);
148ff86b 494 mxser_set_must_xon1_value(io, 0x11);
1da177e4
LT		 495 if ((hwid = inb(io + UART_MCR)) != 0) {
496 outb(oldmcr, io + UART_MCR);
8ea2c2ec 497 return MOXA_OTHER_UART;
1da177e4
LT		 498 }
499
148ff86b 500 mxser_get_must_hardware_id(io, &hwid);
1c45607a
JS		 501 for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */
502 if (hwid == Gpci_uart_info[i].type)
8ea2c2ec 503 return (int)hwid;
1da177e4
LT		 504 }
505 return MOXA_OTHER_UART;
506}
b8cc5549 507#endif
1da177e4 508
1c45607a 509static void process_txrx_fifo(struct mxser_port *info)
1da177e4
LT		 510{
511 int i;
512
513 if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
514 info->rx_trigger = 1;
515 info->rx_high_water = 1;
516 info->rx_low_water = 1;
517 info->xmit_fifo_size = 1;
1c45607a
JS		 518 } else
519 for (i = 0; i < UART_INFO_NUM; i++)
520 if (info->board->chip_flag == Gpci_uart_info[i].type) {
1da177e4
LT		 521 info->rx_trigger = Gpci_uart_info[i].rx_trigger;
522 info->rx_low_water = Gpci_uart_info[i].rx_low_water;
523 info->rx_high_water = Gpci_uart_info[i].rx_high_water;
524 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
525 break;
526 }
1da177e4
LT		 527}
528
1c45607a 529static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
1da177e4 530{
72800df9 531 static unsigned char mxser_msr[MXSER_PORTS + 1];
1c45607a 532 unsigned char status = 0;
1da177e4 533
1c45607a 534 status = inb(baseaddr + UART_MSR);
1da177e4 535
1c45607a
JS		 536 mxser_msr[port] &= 0x0F;
537 mxser_msr[port] |= status;
538 status = mxser_msr[port];
539 if (mode)
540 mxser_msr[port] = 0;
1da177e4 541
1c45607a
JS		 542 return status;
543}
1da177e4 544
31f35939
AC		 545static int mxser_carrier_raised(struct tty_port *port)
546{
547 struct mxser_port *mp = container_of(port, struct mxser_port, port);
548 return (inb(mp->ioaddr + UART_MSR) & UART_MSR_DCD)?1:0;
549}
550
fcc8ac18 551static void mxser_dtr_rts(struct tty_port *port, int on)
5d951fb4
AC		 552{
553 struct mxser_port *mp = container_of(port, struct mxser_port, port);
554 unsigned long flags;
555
556 spin_lock_irqsave(&mp->slock, flags);
fcc8ac18
AC		 557 if (on)
558 outb(inb(mp->ioaddr + UART_MCR) |
559 UART_MCR_DTR | UART_MCR_RTS, mp->ioaddr + UART_MCR);
560 else
561 outb(inb(mp->ioaddr + UART_MCR)&~(UART_MCR_DTR | UART_MCR_RTS),
562 mp->ioaddr + UART_MCR);
5d951fb4
AC		 563 spin_unlock_irqrestore(&mp->slock, flags);
564}
565
216ba023 566static int mxser_set_baud(struct tty_struct *tty, long newspd)
1da177e4 567{
216ba023 568 struct mxser_port *info = tty->driver_data;
1c45607a
JS		 569 int quot = 0, baud;
570 unsigned char cval;
1da177e4 571
216ba023 572 if (!info->ioaddr)
1c45607a 573 return -1;
1da177e4 574
1c45607a
JS		 575 if (newspd > info->max_baud)
576 return -1;
1da177e4 577
1c45607a
JS		 578 if (newspd == 134) {
579 quot = 2 * info->baud_base / 269;
216ba023 580 tty_encode_baud_rate(tty, 134, 134);
1c45607a
JS		 581 } else if (newspd) {
582 quot = info->baud_base / newspd;
583 if (quot == 0)
584 quot = 1;
585 baud = info->baud_base/quot;
216ba023 586 tty_encode_baud_rate(tty, baud, baud);
1c45607a
JS		 587 } else {
588 quot = 0;
589 }
1da177e4 590
1c45607a
JS		 591 info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
592 info->timeout += HZ / 50; /* Add .02 seconds of slop */
1da177e4 593
1c45607a
JS		 594 if (quot) {
595 info->MCR |= UART_MCR_DTR;
596 outb(info->MCR, info->ioaddr + UART_MCR);
597 } else {
598 info->MCR &= ~UART_MCR_DTR;
599 outb(info->MCR, info->ioaddr + UART_MCR);
600 return 0;
601 }
1da177e4 602
1c45607a 603 cval = inb(info->ioaddr + UART_LCR);
1da177e4 604
1c45607a 605 outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
1da177e4 606
1c45607a
JS		 607 outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
608 outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
609 outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
1da177e4 610
1c45607a 611#ifdef BOTHER
216ba023 612 if (C_BAUD(tty) == BOTHER) {
1c45607a
JS		 613 quot = info->baud_base % newspd;
614 quot *= 8;
615 if (quot % newspd > newspd / 2) {
616 quot /= newspd;
617 quot++;
618 } else
619 quot /= newspd;
620
148ff86b 621 mxser_set_must_enum_value(info->ioaddr, quot);
1c45607a
JS		 622 } else
623#endif
148ff86b 624 mxser_set_must_enum_value(info->ioaddr, 0);
1da177e4 625
8ea2c2ec 626 return 0;
1da177e4 627}
1da177e4 628
1c45607a
JS		 629/*
630 * This routine is called to set the UART divisor registers to match
631 * the specified baud rate for a serial port.
632 */
216ba023
AC		 633static int mxser_change_speed(struct tty_struct *tty,
634 struct ktermios *old_termios)
1da177e4 635{
216ba023 636 struct mxser_port *info = tty->driver_data;
1c45607a
JS		 637 unsigned cflag, cval, fcr;
638 int ret = 0;
639 unsigned char status;
1da177e4 640
216ba023
AC		 641 cflag = tty->termios->c_cflag;
642 if (!info->ioaddr)
1c45607a 643 return ret;
1da177e4 644
216ba023
AC		 645 if (mxser_set_baud_method[tty->index] == 0)
646 mxser_set_baud(tty, tty_get_baud_rate(tty));
1da177e4 647
1c45607a
JS		 648 /* byte size and parity */
649 switch (cflag & CSIZE) {
650 case CS5:
651 cval = 0x00;
652 break;
653 case CS6:
654 cval = 0x01;
655 break;
656 case CS7:
657 cval = 0x02;
658 break;
659 case CS8:
660 cval = 0x03;
661 break;
662 default:
663 cval = 0x00;
664 break; /* too keep GCC shut... */
665 }
666 if (cflag & CSTOPB)
667 cval |= 0x04;
668 if (cflag & PARENB)
669 cval |= UART_LCR_PARITY;
670 if (!(cflag & PARODD))
671 cval |= UART_LCR_EPAR;
672 if (cflag & CMSPAR)
673 cval |= UART_LCR_SPAR;
1da177e4 674
1c45607a
JS		 675 if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
676 if (info->board->chip_flag) {
677 fcr = UART_FCR_ENABLE_FIFO;
678 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
148ff86b 679 mxser_set_must_fifo_value(info);
1c45607a
JS		 680 } else
681 fcr = 0;
682 } else {
683 fcr = UART_FCR_ENABLE_FIFO;
684 if (info->board->chip_flag) {
685 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
148ff86b 686 mxser_set_must_fifo_value(info);
1c45607a
JS		 687 } else {
688 switch (info->rx_trigger) {
689 case 1:
690 fcr |= UART_FCR_TRIGGER_1;
691 break;
692 case 4:
693 fcr |= UART_FCR_TRIGGER_4;
694 break;
695 case 8:
696 fcr |= UART_FCR_TRIGGER_8;
697 break;
698 default:
699 fcr |= UART_FCR_TRIGGER_14;
700 break;
701 }
1da177e4 702 }
1da177e4
LT		 703 }
704
1c45607a
JS		 705 /* CTS flow control flag and modem status interrupts */
706 info->IER &= ~UART_IER_MSI;
707 info->MCR &= ~UART_MCR_AFE;
708 if (cflag & CRTSCTS) {
0ad9e7d1 709 info->port.flags |= ASYNC_CTS_FLOW;
1c45607a
JS		 710 info->IER |= UART_IER_MSI;
711 if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
712 info->MCR |= UART_MCR_AFE;
713 } else {
714 status = inb(info->ioaddr + UART_MSR);
216ba023 715 if (tty->hw_stopped) {
1c45607a 716 if (status & UART_MSR_CTS) {
216ba023 717 tty->hw_stopped = 0;
1c45607a
JS		 718 if (info->type != PORT_16550A &&
719 !info->board->chip_flag) {
720 outb(info->IER & ~UART_IER_THRI,
721 info->ioaddr +
722 UART_IER);
723 info->IER |= UART_IER_THRI;
724 outb(info->IER, info->ioaddr +
725 UART_IER);
726 }
216ba023 727 tty_wakeup(tty);
1c45607a
JS		 728 }
729 } else {
730 if (!(status & UART_MSR_CTS)) {
216ba023 731 tty->hw_stopped = 1;
1c45607a
JS		 732 if ((info->type != PORT_16550A) &&
733 (!info->board->chip_flag)) {
734 info->IER &= ~UART_IER_THRI;
735 outb(info->IER, info->ioaddr +
736 UART_IER);
737 }
738 }
739 }
1da177e4 740 }
1c45607a 741 } else {
0ad9e7d1 742 info->port.flags &= ~ASYNC_CTS_FLOW;
1c45607a
JS		 743 }
744 outb(info->MCR, info->ioaddr + UART_MCR);
745 if (cflag & CLOCAL) {
0ad9e7d1 746 info->port.flags &= ~ASYNC_CHECK_CD;
1c45607a 747 } else {
0ad9e7d1 748 info->port.flags |= ASYNC_CHECK_CD;
1c45607a
JS		 749 info->IER |= UART_IER_MSI;
750 }
751 outb(info->IER, info->ioaddr + UART_IER);
752
753 /*
754 * Set up parity check flag
755 */
756 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
216ba023 757 if (I_INPCK(tty))
1c45607a 758 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
216ba023 759 if (I_BRKINT(tty) || I_PARMRK(tty))
1c45607a 760 info->read_status_mask |= UART_LSR_BI;
1da177e4 761
1c45607a 762 info->ignore_status_mask = 0;
1da177e4 763
216ba023 764 if (I_IGNBRK(tty)) {
1c45607a
JS		 765 info->ignore_status_mask |= UART_LSR_BI;
766 info->read_status_mask |= UART_LSR_BI;
8ea2c2ec 767 /*
1c45607a
JS		 768 * If we're ignore parity and break indicators, ignore
769 * overruns too. (For real raw support).
8ea2c2ec 770 */
216ba023 771 if (I_IGNPAR(tty)) {
1c45607a
JS		 772 info->ignore_status_mask |=
773 UART_LSR_OE |
774 UART_LSR_PE |
775 UART_LSR_FE;
776 info->read_status_mask |=
777 UART_LSR_OE |
778 UART_LSR_PE |
779 UART_LSR_FE;
780 }
1da177e4 781 }
1c45607a 782 if (info->board->chip_flag) {
216ba023
AC		 783 mxser_set_must_xon1_value(info->ioaddr, START_CHAR(tty));
784 mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(tty));
785 if (I_IXON(tty)) {
148ff86b
CH		 786 mxser_enable_must_rx_software_flow_control(
787 info->ioaddr);
1c45607a 788 } else {
148ff86b
CH		 789 mxser_disable_must_rx_software_flow_control(
790 info->ioaddr);
1da177e4 791 }
216ba023 792 if (I_IXOFF(tty)) {
148ff86b
CH		 793 mxser_enable_must_tx_software_flow_control(
794 info->ioaddr);
1c45607a 795 } else {
148ff86b
CH		 796 mxser_disable_must_tx_software_flow_control(
797 info->ioaddr);
1da177e4
LT		 798 }
799 }
1da177e4 800
1da177e4 801
1c45607a
JS		 802 outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
803 outb(cval, info->ioaddr + UART_LCR);
1da177e4 804
1c45607a 805 return ret;
1da177e4
LT		 806}
807
216ba023
AC		 808static void mxser_check_modem_status(struct tty_struct *tty,
809 struct mxser_port *port, int status)
1da177e4 810{
1c45607a
JS		 811 /* update input line counters */
812 if (status & UART_MSR_TERI)
813 port->icount.rng++;
814 if (status & UART_MSR_DDSR)
815 port->icount.dsr++;
816 if (status & UART_MSR_DDCD)
817 port->icount.dcd++;
818 if (status & UART_MSR_DCTS)
819 port->icount.cts++;
820 port->mon_data.modem_status = status;
821 wake_up_interruptible(&port->delta_msr_wait);
1da177e4 822
0ad9e7d1 823 if ((port->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
1c45607a 824 if (status & UART_MSR_DCD)
0ad9e7d1 825 wake_up_interruptible(&port->port.open_wait);
1c45607a 826 }
1da177e4 827
0ad9e7d1 828 if (port->port.flags & ASYNC_CTS_FLOW) {
216ba023 829 if (tty->hw_stopped) {
1c45607a 830 if (status & UART_MSR_CTS) {
216ba023 831 tty->hw_stopped = 0;
1c45607a
JS		 832
833 if ((port->type != PORT_16550A) &&
834 (!port->board->chip_flag)) {
835 outb(port->IER & ~UART_IER_THRI,
836 port->ioaddr + UART_IER);
837 port->IER |= UART_IER_THRI;
838 outb(port->IER, port->ioaddr +
839 UART_IER);
840 }
216ba023 841 tty_wakeup(tty);
1c45607a
JS		 842 }
843 } else {
844 if (!(status & UART_MSR_CTS)) {
216ba023 845 tty->hw_stopped = 1;
1c45607a
JS		 846 if (port->type != PORT_16550A &&
847 !port->board->chip_flag) {
848 port->IER &= ~UART_IER_THRI;
849 outb(port->IER, port->ioaddr +
850 UART_IER);
851 }
852 }
853 }
1da177e4
LT		 854 }
855}
856
216ba023 857static int mxser_startup(struct tty_struct *tty)
1da177e4 858{
216ba023 859 struct mxser_port *info = tty->driver_data;
1c45607a
JS		 860 unsigned long page;
861 unsigned long flags;
1da177e4 862
1c45607a
JS		 863 page = __get_free_page(GFP_KERNEL);
864 if (!page)
865 return -ENOMEM;
1da177e4 866
1c45607a 867 spin_lock_irqsave(&info->slock, flags);
1da177e4 868
0ad9e7d1 869 if (info->port.flags & ASYNC_INITIALIZED) {
1c45607a
JS		 870 free_page(page);
871 spin_unlock_irqrestore(&info->slock, flags);
872 return 0;
873 }
6f08b72c 874
1c45607a 875 if (!info->ioaddr || !info->type) {
216ba023 876 set_bit(TTY_IO_ERROR, &tty->flags);
1c45607a
JS		 877 free_page(page);
878 spin_unlock_irqrestore(&info->slock, flags);
1da177e4 879 return 0;
1c45607a 880 }
0ad9e7d1 881 if (info->port.xmit_buf)
1c45607a
JS		 882 free_page(page);
883 else
0ad9e7d1 884 info->port.xmit_buf = (unsigned char *) page;
1da177e4 885
1da177e4 886 /*
1c45607a
JS		 887 * Clear the FIFO buffers and disable them
888 * (they will be reenabled in mxser_change_speed())
1da177e4 889 */
1c45607a
JS		 890 if (info->board->chip_flag)
891 outb((UART_FCR_CLEAR_RCVR |
892 UART_FCR_CLEAR_XMIT |
893 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
894 else
895 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
896 info->ioaddr + UART_FCR);
1da177e4 897
1c45607a
JS		 898 /*
899 * At this point there's no way the LSR could still be 0xFF;
900 * if it is, then bail out, because there's likely no UART
901 * here.
902 */
903 if (inb(info->ioaddr + UART_LSR) == 0xff) {
904 spin_unlock_irqrestore(&info->slock, flags);
905 if (capable(CAP_SYS_ADMIN)) {
216ba023
AC		 906 if (tty)
907 set_bit(TTY_IO_ERROR, &tty->flags);
1c45607a
JS		 908 return 0;
909 } else
910 return -ENODEV;
911 }
1da177e4 912
1c45607a
JS		 913 /*
914 * Clear the interrupt registers.
915 */
916 (void) inb(info->ioaddr + UART_LSR);
917 (void) inb(info->ioaddr + UART_RX);
918 (void) inb(info->ioaddr + UART_IIR);
919 (void) inb(info->ioaddr + UART_MSR);
920
921 /*
922 * Now, initialize the UART
923 */
924 outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
925 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
926 outb(info->MCR, info->ioaddr + UART_MCR);
927
928 /*
929 * Finally, enable interrupts
930 */
931 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
932
933 if (info->board->chip_flag)
934 info->IER |= MOXA_MUST_IER_EGDAI;
935 outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
936
937 /*
938 * And clear the interrupt registers again for luck.
939 */
940 (void) inb(info->ioaddr + UART_LSR);
941 (void) inb(info->ioaddr + UART_RX);
942 (void) inb(info->ioaddr + UART_IIR);
943 (void) inb(info->ioaddr + UART_MSR);
944
216ba023 945 clear_bit(TTY_IO_ERROR, &tty->flags);
1c45607a
JS		 946 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
947
948 /*
949 * and set the speed of the serial port
950 */
216ba023 951 mxser_change_speed(tty, NULL);
0ad9e7d1 952 info->port.flags |= ASYNC_INITIALIZED;
1c45607a
JS		 953 spin_unlock_irqrestore(&info->slock, flags);
954
955 return 0;
956}
957
958/*
959 * This routine will shutdown a serial port; interrupts maybe disabled, and
960 * DTR is dropped if the hangup on close termio flag is on.
961 */
216ba023 962static void mxser_shutdown(struct tty_struct *tty)
1c45607a 963{
216ba023 964 struct mxser_port *info = tty->driver_data;
1c45607a
JS		 965 unsigned long flags;
966
0ad9e7d1 967 if (!(info->port.flags & ASYNC_INITIALIZED))
1c45607a
JS		 968 return;
969
970 spin_lock_irqsave(&info->slock, flags);
971
972 /*
973 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
974 * here so the queue might never be waken up
975 */
976 wake_up_interruptible(&info->delta_msr_wait);
977
978 /*
979 * Free the IRQ, if necessary
980 */
0ad9e7d1
AC		 981 if (info->port.xmit_buf) {
982 free_page((unsigned long) info->port.xmit_buf);
983 info->port.xmit_buf = NULL;
1da177e4
LT		 984 }
985
1c45607a
JS		 986 info->IER = 0;
987 outb(0x00, info->ioaddr + UART_IER);
988
216ba023 989 if (tty->termios->c_cflag & HUPCL)
1c45607a
JS		 990 info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
991 outb(info->MCR, info->ioaddr + UART_MCR);
992
993 /* clear Rx/Tx FIFO's */
994 if (info->board->chip_flag)
995 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
996 MOXA_MUST_FCR_GDA_MODE_ENABLE,
997 info->ioaddr + UART_FCR);
998 else
999 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
1000 info->ioaddr + UART_FCR);
1001
1002 /* read data port to reset things */
1003 (void) inb(info->ioaddr + UART_RX);
1004
216ba023 1005 set_bit(TTY_IO_ERROR, &tty->flags);
1c45607a 1006
0ad9e7d1 1007 info->port.flags &= ~ASYNC_INITIALIZED;
1c45607a
JS		 1008
1009 if (info->board->chip_flag)
1010 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
1011
1012 spin_unlock_irqrestore(&info->slock, flags);
1013}
1014
1015/*
1016 * This routine is called whenever a serial port is opened. It
1017 * enables interrupts for a serial port, linking in its async structure into
1018 * the IRQ chain. It also performs the serial-specific
1019 * initialization for the tty structure.
1020 */
1021static int mxser_open(struct tty_struct *tty, struct file *filp)
1022{
1023 struct mxser_port *info;
1024 unsigned long flags;
1025 int retval, line;
1026
1027 line = tty->index;
1028 if (line == MXSER_PORTS)
1029 return 0;
1030 if (line < 0 || line > MXSER_PORTS)
1031 return -ENODEV;
1032 info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
1033 if (!info->ioaddr)
1034 return -ENODEV;
1035
1036 tty->driver_data = info;
216ba023 1037 tty_port_tty_set(&info->port, tty);
8ea2c2ec 1038 /*
1c45607a
JS		 1039 * Start up serial port
1040 */
3b6826b2 1041 spin_lock_irqsave(&info->port.lock, flags);
0ad9e7d1 1042 info->port.count++;
3b6826b2 1043 spin_unlock_irqrestore(&info->port.lock, flags);
216ba023 1044 retval = mxser_startup(tty);
1c45607a
JS		 1045 if (retval)
1046 return retval;
1047
36c621d8 1048 retval = tty_port_block_til_ready(&info->port, tty, filp);
1c45607a
JS		 1049 if (retval)
1050 return retval;
1da177e4 1051
1da177e4
LT		 1052 return 0;
1053}
1054
978e595f
AC		 1055static void mxser_flush_buffer(struct tty_struct *tty)
1056{
1057 struct mxser_port *info = tty->driver_data;
1058 char fcr;
1059 unsigned long flags;
1060
1061
1062 spin_lock_irqsave(&info->slock, flags);
1063 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1064
1065 fcr = inb(info->ioaddr + UART_FCR);
1066 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
1067 info->ioaddr + UART_FCR);
1068 outb(fcr, info->ioaddr + UART_FCR);
1069
1070 spin_unlock_irqrestore(&info->slock, flags);
1071
1072 tty_wakeup(tty);
1073}
1074
1075
1e2b0254 1076static void mxser_close_port(struct tty_struct *tty, struct tty_port *port)
1da177e4 1077{
1e2b0254 1078 struct mxser_port *info = container_of(port, struct mxser_port, port);
1da177e4 1079 unsigned long timeout;
1da177e4
LT		 1080 /*
1081 * Save the termios structure, since this port may have
1082 * separate termios for callout and dialin.
a6614999
AC		 1083 *
1084 * FIXME: Can this go ?
1da177e4 1085 */
1e2b0254 1086 if (port->flags & ASYNC_NORMAL_ACTIVE)
1da177e4 1087 info->normal_termios = *tty->termios;
1da177e4
LT		 1088 /*
1089 * At this point we stop accepting input. To do this, we
1090 * disable the receive line status interrupts, and tell the
1091 * interrupt driver to stop checking the data ready bit in the
1092 * line status register.
1093 */
1094 info->IER &= ~UART_IER_RLSI;
1c45607a 1095 if (info->board->chip_flag)
1da177e4 1096 info->IER &= ~MOXA_MUST_RECV_ISR;
1c45607a 1097
1e2b0254 1098 if (port->flags & ASYNC_INITIALIZED) {
1c45607a 1099 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1100 /*
1101 * Before we drop DTR, make sure the UART transmitter
1102 * has completely drained; this is especially
1103 * important if there is a transmit FIFO!
1104 */
1105 timeout = jiffies + HZ;
1c45607a 1106 while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
da4cd8df 1107 schedule_timeout_interruptible(5);
1da177e4
LT		 1108 if (time_after(jiffies, timeout))
1109 break;
1110 }
1111 }
216ba023 1112 mxser_shutdown(tty);
1da177e4 1113
1e2b0254
AC		 1114}
1115
1116/*
1117 * This routine is called when the serial port gets closed. First, we
1118 * wait for the last remaining data to be sent. Then, we unlink its
1119 * async structure from the interrupt chain if necessary, and we free
1120 * that IRQ if nothing is left in the chain.
1121 */
1122static void mxser_close(struct tty_struct *tty, struct file *filp)
1123{
1124 struct mxser_port *info = tty->driver_data;
1125 struct tty_port *port = &info->port;
1126
1127 if (tty->index == MXSER_PORTS)
1128 return;
1129 if (tty_port_close_start(port, tty, filp) == 0)
1130 return;
1131 mxser_close_port(tty, port);
1132 mxser_flush_buffer(tty);
a6614999
AC		 1133 /* Right now the tty_port set is done outside of the close_end helper
1134 as we don't yet have everyone using refcounts */
1135 tty_port_close_end(port, tty);
1136 tty_port_tty_set(port, NULL);
1da177e4
LT		 1137}
1138
1139static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
1140{
1141 int c, total = 0;
1c45607a 1142 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1143 unsigned long flags;
1144
0ad9e7d1 1145 if (!info->port.xmit_buf)
8ea2c2ec 1146 return 0;
1da177e4
LT		 1147
1148 while (1) {
8ea2c2ec
JJ		 1149 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
1150 SERIAL_XMIT_SIZE - info->xmit_head));
1da177e4
LT		 1151 if (c <= 0)
1152 break;
1153
0ad9e7d1 1154 memcpy(info->port.xmit_buf + info->xmit_head, buf, c);
1da177e4 1155 spin_lock_irqsave(&info->slock, flags);
8ea2c2ec
JJ		 1156 info->xmit_head = (info->xmit_head + c) &
1157 (SERIAL_XMIT_SIZE - 1);
1da177e4
LT		 1158 info->xmit_cnt += c;
1159 spin_unlock_irqrestore(&info->slock, flags);
1160
1161 buf += c;
1162 count -= c;
1163 total += c;
1da177e4
LT		 1164 }
1165
1c45607a 1166 if (info->xmit_cnt && !tty->stopped) {
8ea2c2ec
JJ		 1167 if (!tty->hw_stopped ||
1168 (info->type == PORT_16550A) ||
1c45607a 1169 (info->board->chip_flag)) {
1da177e4 1170 spin_lock_irqsave(&info->slock, flags);
1c45607a
JS		 1171 outb(info->IER & ~UART_IER_THRI, info->ioaddr +
1172 UART_IER);
1da177e4 1173 info->IER |= UART_IER_THRI;
1c45607a 1174 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1175 spin_unlock_irqrestore(&info->slock, flags);
1176 }
1177 }
1178 return total;
1179}
1180
0be2eade 1181static int mxser_put_char(struct tty_struct *tty, unsigned char ch)
1da177e4 1182{
1c45607a 1183 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1184 unsigned long flags;
1185
0ad9e7d1 1186 if (!info->port.xmit_buf)
0be2eade 1187 return 0;
1da177e4
LT		 1188
1189 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
0be2eade 1190 return 0;
1da177e4
LT		 1191
1192 spin_lock_irqsave(&info->slock, flags);
0ad9e7d1 1193 info->port.xmit_buf[info->xmit_head++] = ch;
1da177e4
LT		 1194 info->xmit_head &= SERIAL_XMIT_SIZE - 1;
1195 info->xmit_cnt++;
1196 spin_unlock_irqrestore(&info->slock, flags);
1c45607a 1197 if (!tty->stopped) {
8ea2c2ec
JJ		 1198 if (!tty->hw_stopped ||
1199 (info->type == PORT_16550A) ||
1c45607a 1200 info->board->chip_flag) {
1da177e4 1201 spin_lock_irqsave(&info->slock, flags);
1c45607a 1202 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1da177e4 1203 info->IER |= UART_IER_THRI;
1c45607a 1204 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1205 spin_unlock_irqrestore(&info->slock, flags);
1206 }
1207 }
0be2eade 1208 return 1;
1da177e4
LT		 1209}
1210
1211
1212static void mxser_flush_chars(struct tty_struct *tty)
1213{
1c45607a 1214 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1215 unsigned long flags;
1216
ace7dd96
JS		 1217 if (info->xmit_cnt <= 0 || tty->stopped || !info->port.xmit_buf ||
1218 (tty->hw_stopped && info->type != PORT_16550A &&
1219 !info->board->chip_flag))
1da177e4
LT		 1220 return;
1221
1222 spin_lock_irqsave(&info->slock, flags);
1223
1c45607a 1224 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1da177e4 1225 info->IER |= UART_IER_THRI;
1c45607a 1226 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1227
1228 spin_unlock_irqrestore(&info->slock, flags);
1229}
1230
1231static int mxser_write_room(struct tty_struct *tty)
1232{
1c45607a 1233 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1234 int ret;
1235
1236 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
ace7dd96 1237 return ret < 0 ? 0 : ret;
1da177e4
LT		 1238}
1239
1240static int mxser_chars_in_buffer(struct tty_struct *tty)
1241{
1c45607a 1242 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1243 return info->xmit_cnt;
1244}
1245
1c45607a
JS		 1246/*
1247 * ------------------------------------------------------------
1248 * friends of mxser_ioctl()
1249 * ------------------------------------------------------------
1250 */
216ba023 1251static int mxser_get_serial_info(struct tty_struct *tty,
1c45607a
JS		 1252 struct serial_struct __user *retinfo)
1253{
216ba023 1254 struct mxser_port *info = tty->driver_data;
1c45607a
JS		 1255 struct serial_struct tmp = {
1256 .type = info->type,
216ba023 1257 .line = tty->index,
1c45607a
JS		 1258 .port = info->ioaddr,
1259 .irq = info->board->irq,
0ad9e7d1 1260 .flags = info->port.flags,
1c45607a 1261 .baud_base = info->baud_base,
44b7d1b3
AC		 1262 .close_delay = info->port.close_delay,
1263 .closing_wait = info->port.closing_wait,
1c45607a
JS		 1264 .custom_divisor = info->custom_divisor,
1265 .hub6 = 0
1266 };
1267 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
1268 return -EFAULT;
1269 return 0;
1270}
1271
216ba023 1272static int mxser_set_serial_info(struct tty_struct *tty,
1c45607a 1273 struct serial_struct __user *new_info)
1da177e4 1274{
216ba023 1275 struct mxser_port *info = tty->driver_data;
1c45607a 1276 struct serial_struct new_serial;
80ff8a80 1277 speed_t baud;
1c45607a
JS		 1278 unsigned long sl_flags;
1279 unsigned int flags;
1280 int retval = 0;
1da177e4 1281
1c45607a 1282 if (!new_info || !info->ioaddr)
80ff8a80 1283 return -ENODEV;
1c45607a
JS		 1284 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
1285 return -EFAULT;
1da177e4 1286
80ff8a80
JS		 1287 if (new_serial.irq != info->board->irq ||
1288 new_serial.port != info->ioaddr)
1289 return -EINVAL;
1da177e4 1290
0ad9e7d1 1291 flags = info->port.flags & ASYNC_SPD_MASK;
1da177e4 1292
1c45607a
JS		 1293 if (!capable(CAP_SYS_ADMIN)) {
1294 if ((new_serial.baud_base != info->baud_base) ||
44b7d1b3 1295 (new_serial.close_delay != info->port.close_delay) ||
0ad9e7d1 1296 ((new_serial.flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK)))
1c45607a 1297 return -EPERM;
0ad9e7d1 1298 info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) |
1c45607a
JS		 1299 (new_serial.flags & ASYNC_USR_MASK));
1300 } else {
1da177e4 1301 /*
1c45607a
JS		 1302 * OK, past this point, all the error checking has been done.
1303 * At this point, we start making changes.....
1da177e4 1304 */
0ad9e7d1 1305 info->port.flags = ((info->port.flags & ~ASYNC_FLAGS) |
1c45607a 1306 (new_serial.flags & ASYNC_FLAGS));
44b7d1b3
AC		 1307 info->port.close_delay = new_serial.close_delay * HZ / 100;
1308 info->port.closing_wait = new_serial.closing_wait * HZ / 100;
216ba023
AC		 1309 tty->low_latency = (info->port.flags & ASYNC_LOW_LATENCY)
1310 ? 1 : 0;
0ad9e7d1 1311 if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST &&
80ff8a80
JS		 1312 (new_serial.baud_base != info->baud_base ||
1313 new_serial.custom_divisor !=
1314 info->custom_divisor)) {
1315 baud = new_serial.baud_base / new_serial.custom_divisor;
216ba023 1316 tty_encode_baud_rate(tty, baud, baud);
80ff8a80 1317 }
1c45607a 1318 }
fc83815c 1319
1c45607a 1320 info->type = new_serial.type;
1da177e4 1321
1c45607a
JS		 1322 process_txrx_fifo(info);
1323
0ad9e7d1
AC		 1324 if (info->port.flags & ASYNC_INITIALIZED) {
1325 if (flags != (info->port.flags & ASYNC_SPD_MASK)) {
1c45607a 1326 spin_lock_irqsave(&info->slock, sl_flags);
216ba023 1327 mxser_change_speed(tty, NULL);
1c45607a 1328 spin_unlock_irqrestore(&info->slock, sl_flags);
1da177e4 1329 }
1c45607a 1330 } else
216ba023 1331 retval = mxser_startup(tty);
1da177e4 1332
1c45607a
JS		 1333 return retval;
1334}
1da177e4 1335
1c45607a
JS		 1336/*
1337 * mxser_get_lsr_info - get line status register info
1338 *
1339 * Purpose: Let user call ioctl() to get info when the UART physically
1340 * is emptied. On bus types like RS485, the transmitter must
1341 * release the bus after transmitting. This must be done when
1342 * the transmit shift register is empty, not be done when the
1343 * transmit holding register is empty. This functionality
1344 * allows an RS485 driver to be written in user space.
1345 */
1346static int mxser_get_lsr_info(struct mxser_port *info,
1347 unsigned int __user *value)
1348{
1349 unsigned char status;
1350 unsigned int result;
1351 unsigned long flags;
1da177e4 1352
1c45607a
JS		 1353 spin_lock_irqsave(&info->slock, flags);
1354 status = inb(info->ioaddr + UART_LSR);
1355 spin_unlock_irqrestore(&info->slock, flags);
1356 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
1357 return put_user(result, value);
1358}
1da177e4 1359
1c45607a
JS		 1360static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
1361{
1362 struct mxser_port *info = tty->driver_data;
1363 unsigned char control, status;
1364 unsigned long flags;
1da177e4 1365
8ea2c2ec 1366
1c45607a
JS		 1367 if (tty->index == MXSER_PORTS)
1368 return -ENOIOCTLCMD;
1369 if (test_bit(TTY_IO_ERROR, &tty->flags))
1370 return -EIO;
1da177e4 1371
1c45607a 1372 control = info->MCR;
1da177e4 1373
1c45607a
JS		 1374 spin_lock_irqsave(&info->slock, flags);
1375 status = inb(info->ioaddr + UART_MSR);
1376 if (status & UART_MSR_ANY_DELTA)
216ba023 1377 mxser_check_modem_status(tty, info, status);
1c45607a
JS		 1378 spin_unlock_irqrestore(&info->slock, flags);
1379 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
1380 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
1381 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
1382 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
1383 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
1384 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1385}
1da177e4 1386
1c45607a
JS		 1387static int mxser_tiocmset(struct tty_struct *tty, struct file *file,
1388 unsigned int set, unsigned int clear)
1389{
1390 struct mxser_port *info = tty->driver_data;
1391 unsigned long flags;
1da177e4 1392
1da177e4 1393
1c45607a
JS		 1394 if (tty->index == MXSER_PORTS)
1395 return -ENOIOCTLCMD;
1396 if (test_bit(TTY_IO_ERROR, &tty->flags))
1397 return -EIO;
1da177e4 1398
1c45607a 1399 spin_lock_irqsave(&info->slock, flags);
1da177e4 1400
1c45607a
JS		 1401 if (set & TIOCM_RTS)
1402 info->MCR |= UART_MCR_RTS;
1403 if (set & TIOCM_DTR)
1404 info->MCR |= UART_MCR_DTR;
1da177e4 1405
1c45607a
JS		 1406 if (clear & TIOCM_RTS)
1407 info->MCR &= ~UART_MCR_RTS;
1408 if (clear & TIOCM_DTR)
1409 info->MCR &= ~UART_MCR_DTR;
8ea2c2ec 1410
1c45607a
JS		 1411 outb(info->MCR, info->ioaddr + UART_MCR);
1412 spin_unlock_irqrestore(&info->slock, flags);
1413 return 0;
1414}
1da177e4 1415
1c45607a
JS		 1416static int __init mxser_program_mode(int port)
1417{
1418 int id, i, j, n;
1419
1420 outb(0, port);
1421 outb(0, port);
1422 outb(0, port);
1423 (void)inb(port);
1424 (void)inb(port);
1425 outb(0, port);
1426 (void)inb(port);
1427
1428 id = inb(port + 1) & 0x1F;
1429 if ((id != C168_ASIC_ID) &&
1430 (id != C104_ASIC_ID) &&
1431 (id != C102_ASIC_ID) &&
1432 (id != CI132_ASIC_ID) &&
1433 (id != CI134_ASIC_ID) &&
1434 (id != CI104J_ASIC_ID))
1435 return -1;
1436 for (i = 0, j = 0; i < 4; i++) {
1437 n = inb(port + 2);
1438 if (n == 'M') {
1439 j = 1;
1440 } else if ((j == 1) && (n == 1)) {
1441 j = 2;
1442 break;
1443 } else
1444 j = 0;
1da177e4 1445 }
1c45607a
JS		 1446 if (j != 2)
1447 id = -2;
1448 return id;
1da177e4
LT		 1449}
1450
1c45607a
JS		 1451static void __init mxser_normal_mode(int port)
1452{
1453 int i, n;
1454
1455 outb(0xA5, port + 1);
1456 outb(0x80, port + 3);
1457 outb(12, port + 0); /* 9600 bps */
1458 outb(0, port + 1);
1459 outb(0x03, port + 3); /* 8 data bits */
1460 outb(0x13, port + 4); /* loop back mode */
1461 for (i = 0; i < 16; i++) {
1462 n = inb(port + 5);
1463 if ((n & 0x61) == 0x60)
1464 break;
1465 if ((n & 1) == 1)
1466 (void)inb(port);
1467 }
1468 outb(0x00, port + 4);
1469}
1470
1471#define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
1472#define CHIP_DO 0x02 /* Serial Data Output in Eprom */
1473#define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
1474#define CHIP_DI 0x08 /* Serial Data Input in Eprom */
1475#define EN_CCMD 0x000 /* Chip's command register */
1476#define EN0_RSARLO 0x008 /* Remote start address reg 0 */
1477#define EN0_RSARHI 0x009 /* Remote start address reg 1 */
1478#define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
1479#define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
1480#define EN0_DCFG 0x00E /* Data configuration reg WR */
1481#define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
1482#define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
1483#define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
1484static int __init mxser_read_register(int port, unsigned short *regs)
1485{
1486 int i, k, value, id;
1487 unsigned int j;
1488
1489 id = mxser_program_mode(port);
1490 if (id < 0)
1491 return id;
1492 for (i = 0; i < 14; i++) {
1493 k = (i & 0x3F) | 0x180;
1494 for (j = 0x100; j > 0; j >>= 1) {
1495 outb(CHIP_CS, port);
1496 if (k & j) {
1497 outb(CHIP_CS | CHIP_DO, port);
1498 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
1499 } else {
1500 outb(CHIP_CS, port);
1501 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
1502 }
1503 }
1504 (void)inb(port);
1505 value = 0;
1506 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
1507 outb(CHIP_CS, port);
1508 outb(CHIP_CS | CHIP_SK, port);
1509 if (inb(port) & CHIP_DI)
1510 value |= j;
1511 }
1512 regs[i] = value;
1513 outb(0, port);
1514 }
1515 mxser_normal_mode(port);
1516 return id;
1517}
1da177e4
LT		 1518
1519static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
1520{
1c45607a 1521 struct mxser_port *port;
216ba023 1522 struct tty_struct *tty;
1c45607a
JS		 1523 int result, status;
1524 unsigned int i, j;
9d6d162d 1525 int ret = 0;
1da177e4
LT		 1526
1527 switch (cmd) {
1da177e4 1528 case MOXA_GET_MAJOR:
8f3d137e
JS		 1529 if (printk_ratelimit())
1530 printk(KERN_WARNING "mxser: '%s' uses deprecated ioctl "
1531 "%x (GET_MAJOR), fix your userspace\n",
1532 current->comm, cmd);
1c45607a 1533 return put_user(ttymajor, (int __user *)argp);
1da177e4
LT		 1534
1535 case MOXA_CHKPORTENABLE:
1536 result = 0;
9d6d162d 1537 lock_kernel();
1c45607a
JS		 1538 for (i = 0; i < MXSER_BOARDS; i++)
1539 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
1540 if (mxser_boards[i].ports[j].ioaddr)
1541 result |= (1 << i);
9d6d162d 1542 unlock_kernel();
8ea2c2ec 1543 return put_user(result, (unsigned long __user *)argp);
1da177e4 1544 case MOXA_GETDATACOUNT:
9d6d162d 1545 lock_kernel();
1da177e4 1546 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
9d6d162d
AC		 1547 ret = -EFAULT;
1548 unlock_kernel();
1549 return ret;
72800df9
JS		 1550 case MOXA_GETMSTATUS: {
1551 struct mxser_mstatus ms, __user *msu = argp;
9d6d162d 1552 lock_kernel();
1c45607a
JS		 1553 for (i = 0; i < MXSER_BOARDS; i++)
1554 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
1555 port = &mxser_boards[i].ports[j];
72800df9 1556 memset(&ms, 0, sizeof(ms));
1c45607a 1557
72800df9
JS		 1558 if (!port->ioaddr)
1559 goto copy;
216ba023
AC		 1560
1561 tty = tty_port_tty_get(&port->port);
1da177e4 1562
216ba023 1563 if (!tty || !tty->termios)
72800df9 1564 ms.cflag = port->normal_termios.c_cflag;
1c45607a 1565 else
216ba023
AC		 1566 ms.cflag = tty->termios->c_cflag;
1567 tty_kref_put(tty);
1c45607a 1568 status = inb(port->ioaddr + UART_MSR);
72800df9
JS		 1569 if (status & UART_MSR_DCD)
1570 ms.dcd = 1;
1571 if (status & UART_MSR_DSR)
1572 ms.dsr = 1;
1573 if (status & UART_MSR_CTS)
1574 ms.cts = 1;
1575 copy:
1576 if (copy_to_user(msu, &ms, sizeof(ms))) {
1577 unlock_kernel();
1578 return -EFAULT;
1579 }
1580 msu++;
1c45607a 1581 }
9d6d162d 1582 unlock_kernel();
1da177e4 1583 return 0;
72800df9 1584 }
8ea2c2ec 1585 case MOXA_ASPP_MON_EXT: {
72800df9
JS		 1586 struct mxser_mon_ext *me; /* it's 2k, stack unfriendly */
1587 unsigned int cflag, iflag, p;
1588 u8 opmode;
1589
1590 me = kzalloc(sizeof(*me), GFP_KERNEL);
1591 if (!me)
1592 return -ENOMEM;
1c45607a 1593
9d6d162d 1594 lock_kernel();
72800df9
JS		 1595 for (i = 0, p = 0; i < MXSER_BOARDS; i++) {
1596 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++, p++) {
1597 if (p >= ARRAY_SIZE(me->rx_cnt)) {
1598 i = MXSER_BOARDS;
1599 break;
1600 }
1c45607a
JS		 1601 port = &mxser_boards[i].ports[j];
1602 if (!port->ioaddr)
1da177e4
LT		 1603 continue;
1604
72800df9 1605 status = mxser_get_msr(port->ioaddr, 0, p);
1c45607a 1606
1da177e4 1607 if (status & UART_MSR_TERI)
1c45607a 1608 port->icount.rng++;
1da177e4 1609 if (status & UART_MSR_DDSR)
1c45607a 1610 port->icount.dsr++;
1da177e4 1611 if (status & UART_MSR_DDCD)
1c45607a 1612 port->icount.dcd++;
1da177e4 1613 if (status & UART_MSR_DCTS)
1c45607a
JS		 1614 port->icount.cts++;
1615
1616 port->mon_data.modem_status = status;
72800df9
JS		 1617 me->rx_cnt[p] = port->mon_data.rxcnt;
1618 me->tx_cnt[p] = port->mon_data.txcnt;
1619 me->up_rxcnt[p] = port->mon_data.up_rxcnt;
1620 me->up_txcnt[p] = port->mon_data.up_txcnt;
1621 me->modem_status[p] =
1c45607a 1622 port->mon_data.modem_status;
216ba023 1623 tty = tty_port_tty_get(&port->port);
1c45607a 1624
216ba023 1625 if (!tty || !tty->termios) {
1c45607a
JS		 1626 cflag = port->normal_termios.c_cflag;
1627 iflag = port->normal_termios.c_iflag;
216ba023 1628 me->baudrate[p] = tty_termios_baud_rate(&port->normal_termios);
1da177e4 1629 } else {
216ba023
AC		 1630 cflag = tty->termios->c_cflag;
1631 iflag = tty->termios->c_iflag;
1632 me->baudrate[p] = tty_get_baud_rate(tty);
1da177e4 1633 }
216ba023 1634 tty_kref_put(tty);
1da177e4 1635
72800df9
JS		 1636 me->databits[p] = cflag & CSIZE;
1637 me->stopbits[p] = cflag & CSTOPB;
1638 me->parity[p] = cflag & (PARENB | PARODD |
1639 CMSPAR);
1da177e4
LT		 1640
1641 if (cflag & CRTSCTS)
72800df9 1642 me->flowctrl[p] |= 0x03;
1da177e4
LT		 1643
1644 if (iflag & (IXON | IXOFF))
72800df9 1645 me->flowctrl[p] |= 0x0C;
1da177e4 1646
1c45607a 1647 if (port->type == PORT_16550A)
72800df9 1648 me->fifo[p] = 1;
1da177e4 1649
72800df9
JS		 1650 opmode = inb(port->opmode_ioaddr) >>
1651 ((p % 4) * 2);
1da177e4 1652 opmode &= OP_MODE_MASK;
72800df9 1653 me->iftype[p] = opmode;
1da177e4 1654 }
9d6d162d
AC		 1655 }
1656 unlock_kernel();
72800df9
JS		 1657 if (copy_to_user(argp, me, sizeof(*me)))
1658 ret = -EFAULT;
1659 kfree(me);
1660 return ret;
9d6d162d
AC		 1661 }
1662 default:
1da177e4
LT		 1663 return -ENOIOCTLCMD;
1664 }
1665 return 0;
1666}
1667
1c45607a
JS		 1668static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg,
1669 struct async_icount *cprev)
1da177e4 1670{
1c45607a
JS		 1671 struct async_icount cnow;
1672 unsigned long flags;
1673 int ret;
1da177e4 1674
1c45607a
JS		 1675 spin_lock_irqsave(&info->slock, flags);
1676 cnow = info->icount; /* atomic copy */
1677 spin_unlock_irqrestore(&info->slock, flags);
1da177e4 1678
1c45607a
JS		 1679 ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) ||
1680 ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) ||
1681 ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) ||
1682 ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts));
1da177e4 1683
1c45607a
JS		 1684 *cprev = cnow;
1685
1686 return ret;
1687}
1688
1689static int mxser_ioctl(struct tty_struct *tty, struct file *file,
1690 unsigned int cmd, unsigned long arg)
1da177e4 1691{
1c45607a
JS		 1692 struct mxser_port *info = tty->driver_data;
1693 struct async_icount cnow;
1c45607a
JS		 1694 unsigned long flags;
1695 void __user *argp = (void __user *)arg;
1696 int retval;
1da177e4 1697
1c45607a
JS		 1698 if (tty->index == MXSER_PORTS)
1699 return mxser_ioctl_special(cmd, argp);
1da177e4 1700
1c45607a
JS		 1701 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
1702 int p;
1703 unsigned long opmode;
1704 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
1705 int shiftbit;
1706 unsigned char val, mask;
1da177e4 1707
1c45607a
JS		 1708 p = tty->index % 4;
1709 if (cmd == MOXA_SET_OP_MODE) {
1710 if (get_user(opmode, (int __user *) argp))
1711 return -EFAULT;
1712 if (opmode != RS232_MODE &&
1713 opmode != RS485_2WIRE_MODE &&
1714 opmode != RS422_MODE &&
1715 opmode != RS485_4WIRE_MODE)
1716 return -EFAULT;
9d6d162d 1717 lock_kernel();
1c45607a
JS		 1718 mask = ModeMask[p];
1719 shiftbit = p * 2;
1720 val = inb(info->opmode_ioaddr);
1721 val &= mask;
1722 val |= (opmode << shiftbit);
1723 outb(val, info->opmode_ioaddr);
9d6d162d 1724 unlock_kernel();
1c45607a 1725 } else {
9d6d162d 1726 lock_kernel();
1c45607a
JS		 1727 shiftbit = p * 2;
1728 opmode = inb(info->opmode_ioaddr) >> shiftbit;
1729 opmode &= OP_MODE_MASK;
9d6d162d 1730 unlock_kernel();
1c45607a
JS		 1731 if (put_user(opmode, (int __user *)argp))
1732 return -EFAULT;
1733 }
1734 return 0;
1735 }
1736
1737 if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && cmd != TIOCGICOUNT &&
1738 test_bit(TTY_IO_ERROR, &tty->flags))
1739 return -EIO;
1740
1741 switch (cmd) {
1c45607a 1742 case TIOCGSERIAL:
9d6d162d 1743 lock_kernel();
216ba023 1744 retval = mxser_get_serial_info(tty, argp);
9d6d162d
AC		 1745 unlock_kernel();
1746 return retval;
1c45607a 1747 case TIOCSSERIAL:
9d6d162d 1748 lock_kernel();
216ba023 1749 retval = mxser_set_serial_info(tty, argp);
9d6d162d
AC		 1750 unlock_kernel();
1751 return retval;
1c45607a 1752 case TIOCSERGETLSR: /* Get line status register */
9d6d162d 1753 return mxser_get_lsr_info(info, argp);
1c45607a
JS		 1754 /*
1755 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1756 * - mask passed in arg for lines of interest
1757 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1758 * Caller should use TIOCGICOUNT to see which one it was
1759 */
1760 case TIOCMIWAIT:
1761 spin_lock_irqsave(&info->slock, flags);
1762 cnow = info->icount; /* note the counters on entry */
1763 spin_unlock_irqrestore(&info->slock, flags);
1764
1765 return wait_event_interruptible(info->delta_msr_wait,
1766 mxser_cflags_changed(info, arg, &cnow));
1767 /*
1768 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1769 * Return: write counters to the user passed counter struct
1770 * NB: both 1->0 and 0->1 transitions are counted except for
1771 * RI where only 0->1 is counted.
1772 */
41aee9a1
JS		 1773 case TIOCGICOUNT: {
1774 struct serial_icounter_struct icnt = { 0 };
1c45607a
JS		 1775 spin_lock_irqsave(&info->slock, flags);
1776 cnow = info->icount;
1777 spin_unlock_irqrestore(&info->slock, flags);
41aee9a1
JS		 1778
1779 icnt.frame = cnow.frame;
1780 icnt.brk = cnow.brk;
1781 icnt.overrun = cnow.overrun;
1782 icnt.buf_overrun = cnow.buf_overrun;
1783 icnt.parity = cnow.parity;
1784 icnt.rx = cnow.rx;
1785 icnt.tx = cnow.tx;
1786 icnt.cts = cnow.cts;
1787 icnt.dsr = cnow.dsr;
1788 icnt.rng = cnow.rng;
1789 icnt.dcd = cnow.dcd;
1790
1791 return copy_to_user(argp, &icnt, sizeof(icnt)) ? -EFAULT : 0;
1792 }
1c45607a
JS		 1793 case MOXA_HighSpeedOn:
1794 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
1795 case MOXA_SDS_RSTICOUNTER:
9d6d162d 1796 lock_kernel();
1c45607a
JS		 1797 info->mon_data.rxcnt = 0;
1798 info->mon_data.txcnt = 0;
9d6d162d 1799 unlock_kernel();
1c45607a
JS		 1800 return 0;
1801
1802 case MOXA_ASPP_OQUEUE:{
1803 int len, lsr;
1804
9d6d162d 1805 lock_kernel();
1c45607a 1806 len = mxser_chars_in_buffer(tty);
1c45607a 1807 lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT;
1c45607a 1808 len += (lsr ? 0 : 1);
9d6d162d 1809 unlock_kernel();
1c45607a
JS		 1810
1811 return put_user(len, (int __user *)argp);
1812 }
1813 case MOXA_ASPP_MON: {
1814 int mcr, status;
1815
9d6d162d 1816 lock_kernel();
1c45607a 1817 status = mxser_get_msr(info->ioaddr, 1, tty->index);
216ba023 1818 mxser_check_modem_status(tty, info, status);
1c45607a
JS		 1819
1820 mcr = inb(info->ioaddr + UART_MCR);
1821 if (mcr & MOXA_MUST_MCR_XON_FLAG)
1822 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
1823 else
1824 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
1825
1826 if (mcr & MOXA_MUST_MCR_TX_XON)
1827 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
1828 else
1829 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
1830
216ba023 1831 if (tty->hw_stopped)
1c45607a
JS		 1832 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
1833 else
1834 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
9d6d162d 1835 unlock_kernel();
1c45607a
JS		 1836 if (copy_to_user(argp, &info->mon_data,
1837 sizeof(struct mxser_mon)))
1838 return -EFAULT;
1839
1840 return 0;
1841 }
1842 case MOXA_ASPP_LSTATUS: {
1843 if (put_user(info->err_shadow, (unsigned char __user *)argp))
1844 return -EFAULT;
1845
1846 info->err_shadow = 0;
1847 return 0;
1848 }
1849 case MOXA_SET_BAUD_METHOD: {
1850 int method;
1851
1852 if (get_user(method, (int __user *)argp))
1853 return -EFAULT;
1854 mxser_set_baud_method[tty->index] = method;
1855 return put_user(method, (int __user *)argp);
1856 }
1857 default:
1858 return -ENOIOCTLCMD;
1859 }
1860 return 0;
1861}
1862
1863static void mxser_stoprx(struct tty_struct *tty)
1864{
1865 struct mxser_port *info = tty->driver_data;
1866
1867 info->ldisc_stop_rx = 1;
1868 if (I_IXOFF(tty)) {
1869 if (info->board->chip_flag) {
1870 info->IER &= ~MOXA_MUST_RECV_ISR;
1871 outb(info->IER, info->ioaddr + UART_IER);
1872 } else {
1873 info->x_char = STOP_CHAR(tty);
1874 outb(0, info->ioaddr + UART_IER);
1875 info->IER |= UART_IER_THRI;
1876 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1877 }
1878 }
1879
216ba023 1880 if (tty->termios->c_cflag & CRTSCTS) {
1c45607a
JS		 1881 info->MCR &= ~UART_MCR_RTS;
1882 outb(info->MCR, info->ioaddr + UART_MCR);
1da177e4
LT		 1883 }
1884}
1885
1886/*
1887 * This routine is called by the upper-layer tty layer to signal that
1888 * incoming characters should be throttled.
1889 */
1890static void mxser_throttle(struct tty_struct *tty)
1891{
1da177e4 1892 mxser_stoprx(tty);
1da177e4
LT		 1893}
1894
1895static void mxser_unthrottle(struct tty_struct *tty)
1896{
1c45607a 1897 struct mxser_port *info = tty->driver_data;
1da177e4 1898
1c45607a
JS		 1899 /* startrx */
1900 info->ldisc_stop_rx = 0;
1901 if (I_IXOFF(tty)) {
1902 if (info->x_char)
1903 info->x_char = 0;
1904 else {
1905 if (info->board->chip_flag) {
1906 info->IER |= MOXA_MUST_RECV_ISR;
1907 outb(info->IER, info->ioaddr + UART_IER);
1908 } else {
1909 info->x_char = START_CHAR(tty);
1910 outb(0, info->ioaddr + UART_IER);
1911 info->IER |= UART_IER_THRI;
1912 outb(info->IER, info->ioaddr + UART_IER);
1913 }
1da177e4 1914 }
1c45607a 1915 }
1da177e4 1916
216ba023 1917 if (tty->termios->c_cflag & CRTSCTS) {
1c45607a
JS		 1918 info->MCR |= UART_MCR_RTS;
1919 outb(info->MCR, info->ioaddr + UART_MCR);
1da177e4
LT		 1920 }
1921}
1922
1923/*
1924 * mxser_stop() and mxser_start()
1925 *
1926 * This routines are called before setting or resetting tty->stopped.
1927 * They enable or disable transmitter interrupts, as necessary.
1928 */
1929static void mxser_stop(struct tty_struct *tty)
1930{
1c45607a 1931 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1932 unsigned long flags;
1933
1934 spin_lock_irqsave(&info->slock, flags);
1935 if (info->IER & UART_IER_THRI) {
1936 info->IER &= ~UART_IER_THRI;
1c45607a 1937 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1938 }
1939 spin_unlock_irqrestore(&info->slock, flags);
1940}
1941
1942static void mxser_start(struct tty_struct *tty)
1943{
1c45607a 1944 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1945 unsigned long flags;
1946
1947 spin_lock_irqsave(&info->slock, flags);
0ad9e7d1 1948 if (info->xmit_cnt && info->port.xmit_buf) {
1c45607a 1949 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1da177e4 1950 info->IER |= UART_IER_THRI;
1c45607a 1951 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1952 }
1953 spin_unlock_irqrestore(&info->slock, flags);
1954}
1955
1c45607a
JS		 1956static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
1957{
1958 struct mxser_port *info = tty->driver_data;
1959 unsigned long flags;
1960
1961 spin_lock_irqsave(&info->slock, flags);
216ba023 1962 mxser_change_speed(tty, old_termios);
1c45607a
JS		 1963 spin_unlock_irqrestore(&info->slock, flags);
1964
1965 if ((old_termios->c_cflag & CRTSCTS) &&
1966 !(tty->termios->c_cflag & CRTSCTS)) {
1967 tty->hw_stopped = 0;
1968 mxser_start(tty);
1969 }
1970
1971 /* Handle sw stopped */
1972 if ((old_termios->c_iflag & IXON) &&
1973 !(tty->termios->c_iflag & IXON)) {
1974 tty->stopped = 0;
1975
1976 if (info->board->chip_flag) {
1977 spin_lock_irqsave(&info->slock, flags);
148ff86b
CH		 1978 mxser_disable_must_rx_software_flow_control(
1979 info->ioaddr);
1c45607a
JS		 1980 spin_unlock_irqrestore(&info->slock, flags);
1981 }
1982
1983 mxser_start(tty);
1984 }
1985}
1986
1da177e4
LT		 1987/*
1988 * mxser_wait_until_sent() --- wait until the transmitter is empty
1989 */
1990static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
1991{
1c45607a 1992 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1993 unsigned long orig_jiffies, char_time;
1994 int lsr;
1995
1996 if (info->type == PORT_UNKNOWN)
1997 return;
1998
1999 if (info->xmit_fifo_size == 0)
2000 return; /* Just in case.... */
2001
2002 orig_jiffies = jiffies;
2003 /*
2004 * Set the check interval to be 1/5 of the estimated time to
2005 * send a single character, and make it at least 1. The check
2006 * interval should also be less than the timeout.
2007 *
2008 * Note: we have to use pretty tight timings here to satisfy
2009 * the NIST-PCTS.
2010 */
2011 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
2012 char_time = char_time / 5;
2013 if (char_time == 0)
2014 char_time = 1;
2015 if (timeout && timeout < char_time)
2016 char_time = timeout;
2017 /*
2018 * If the transmitter hasn't cleared in twice the approximate
2019 * amount of time to send the entire FIFO, it probably won't
2020 * ever clear. This assumes the UART isn't doing flow
2021 * control, which is currently the case. Hence, if it ever
2022 * takes longer than info->timeout, this is probably due to a
2023 * UART bug of some kind. So, we clamp the timeout parameter at
2024 * 2*info->timeout.
2025 */
2026 if (!timeout || timeout > 2 * info->timeout)
2027 timeout = 2 * info->timeout;
2028#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
8ea2c2ec
JJ		 2029 printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
2030 timeout, char_time);
1da177e4
LT		 2031 printk("jiff=%lu...", jiffies);
2032#endif
978e595f 2033 lock_kernel();
1c45607a 2034 while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
1da177e4
LT		 2035#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2036 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
2037#endif
da4cd8df 2038 schedule_timeout_interruptible(char_time);
1da177e4 2039 if (signal_pending(current))
1c45607a
JS		 2040 break;
2041 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2042 break;
1da177e4 2043 }
1c45607a 2044 set_current_state(TASK_RUNNING);
978e595f 2045 unlock_kernel();
1da177e4 2046
1c45607a
JS		 2047#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2048 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
2049#endif
2050}
1da177e4 2051
1c45607a
JS		 2052/*
2053 * This routine is called by tty_hangup() when a hangup is signaled.
2054 */
2055static void mxser_hangup(struct tty_struct *tty)
2056{
2057 struct mxser_port *info = tty->driver_data;
1da177e4 2058
1c45607a 2059 mxser_flush_buffer(tty);
216ba023 2060 mxser_shutdown(tty);
3b6826b2 2061 tty_port_hangup(&info->port);
1da177e4
LT		 2062}
2063
1c45607a
JS		 2064/*
2065 * mxser_rs_break() --- routine which turns the break handling on or off
2066 */
9e98966c 2067static int mxser_rs_break(struct tty_struct *tty, int break_state)
1da177e4 2068{
1c45607a 2069 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 2070 unsigned long flags;
2071
1c45607a
JS		 2072 spin_lock_irqsave(&info->slock, flags);
2073 if (break_state == -1)
2074 outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
2075 info->ioaddr + UART_LCR);
2076 else
2077 outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
2078 info->ioaddr + UART_LCR);
2079 spin_unlock_irqrestore(&info->slock, flags);
9e98966c 2080 return 0;
1c45607a 2081}
1da177e4 2082
216ba023
AC		 2083static void mxser_receive_chars(struct tty_struct *tty,
2084 struct mxser_port *port, int *status)
1c45607a 2085{
1c45607a
JS		 2086 unsigned char ch, gdl;
2087 int ignored = 0;
2088 int cnt = 0;
2089 int recv_room;
2090 int max = 256;
1da177e4 2091
1c45607a 2092 recv_room = tty->receive_room;
216ba023 2093 if (recv_room == 0 && !port->ldisc_stop_rx)
1c45607a 2094 mxser_stoprx(tty);
1c45607a 2095 if (port->board->chip_flag != MOXA_OTHER_UART) {
1da177e4 2096
1c45607a
JS		 2097 if (*status & UART_LSR_SPECIAL)
2098 goto intr_old;
2099 if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
2100 (*status & MOXA_MUST_LSR_RERR))
2101 goto intr_old;
2102 if (*status & MOXA_MUST_LSR_RERR)
2103 goto intr_old;
1da177e4 2104
1c45607a
JS		 2105 gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
2106
2107 if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
2108 gdl &= MOXA_MUST_GDL_MASK;
2109 if (gdl >= recv_room) {
2110 if (!port->ldisc_stop_rx)
2111 mxser_stoprx(tty);
2112 }
2113 while (gdl--) {
2114 ch = inb(port->ioaddr + UART_RX);
2115 tty_insert_flip_char(tty, ch, 0);
2116 cnt++;
2117 }
2118 goto end_intr;
1da177e4 2119 }
1c45607a
JS		 2120intr_old:
2121
2122 do {
2123 if (max-- < 0)
2124 break;
1da177e4 2125
1c45607a
JS		 2126 ch = inb(port->ioaddr + UART_RX);
2127 if (port->board->chip_flag && (*status & UART_LSR_OE))
2128 outb(0x23, port->ioaddr + UART_FCR);
2129 *status &= port->read_status_mask;
2130 if (*status & port->ignore_status_mask) {
2131 if (++ignored > 100)
2132 break;
2133 } else {
2134 char flag = 0;
2135 if (*status & UART_LSR_SPECIAL) {
2136 if (*status & UART_LSR_BI) {
2137 flag = TTY_BREAK;
2138 port->icount.brk++;
1da177e4 2139
0ad9e7d1 2140 if (port->port.flags & ASYNC_SAK)
1c45607a
JS		 2141 do_SAK(tty);
2142 } else if (*status & UART_LSR_PE) {
2143 flag = TTY_PARITY;
2144 port->icount.parity++;
2145 } else if (*status & UART_LSR_FE) {
2146 flag = TTY_FRAME;
2147 port->icount.frame++;
2148 } else if (*status & UART_LSR_OE) {
2149 flag = TTY_OVERRUN;
2150 port->icount.overrun++;
2151 } else
2152 flag = TTY_BREAK;
2153 }
2154 tty_insert_flip_char(tty, ch, flag);
2155 cnt++;
2156 if (cnt >= recv_room) {
2157 if (!port->ldisc_stop_rx)
2158 mxser_stoprx(tty);
2159 break;
2160 }
1da177e4 2161
1c45607a 2162 }
1da177e4 2163
1c45607a
JS		 2164 if (port->board->chip_flag)
2165 break;
1da177e4 2166
1c45607a
JS		 2167 *status = inb(port->ioaddr + UART_LSR);
2168 } while (*status & UART_LSR_DR);
1da177e4 2169
1c45607a 2170end_intr:
216ba023 2171 mxvar_log.rxcnt[tty->index] += cnt;
1c45607a
JS		 2172 port->mon_data.rxcnt += cnt;
2173 port->mon_data.up_rxcnt += cnt;
1da177e4 2174
1c45607a
JS		 2175 /*
2176 * We are called from an interrupt context with &port->slock
2177 * being held. Drop it temporarily in order to prevent
2178 * recursive locking.
2179 */
2180 spin_unlock(&port->slock);
2181 tty_flip_buffer_push(tty);
2182 spin_lock(&port->slock);
1da177e4
LT		 2183}
2184
216ba023 2185static void mxser_transmit_chars(struct tty_struct *tty, struct mxser_port *port)
1da177e4 2186{
1c45607a 2187 int count, cnt;
1da177e4 2188
1c45607a
JS		 2189 if (port->x_char) {
2190 outb(port->x_char, port->ioaddr + UART_TX);
2191 port->x_char = 0;
216ba023 2192 mxvar_log.txcnt[tty->index]++;
1c45607a
JS		 2193 port->mon_data.txcnt++;
2194 port->mon_data.up_txcnt++;
2195 port->icount.tx++;
2196 return;
2197 }
1da177e4 2198
0ad9e7d1 2199 if (port->port.xmit_buf == NULL)
1c45607a 2200 return;
1da177e4 2201
216ba023
AC		 2202 if (port->xmit_cnt <= 0 || tty->stopped ||
2203 (tty->hw_stopped &&
1c45607a
JS		 2204 (port->type != PORT_16550A) &&
2205 (!port->board->chip_flag))) {
2206 port->IER &= ~UART_IER_THRI;
2207 outb(port->IER, port->ioaddr + UART_IER);
2208 return;
1da177e4
LT		 2209 }
2210
1c45607a
JS		 2211 cnt = port->xmit_cnt;
2212 count = port->xmit_fifo_size;
2213 do {
0ad9e7d1 2214 outb(port->port.xmit_buf[port->xmit_tail++],
1c45607a
JS		 2215 port->ioaddr + UART_TX);
2216 port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
2217 if (--port->xmit_cnt <= 0)
2218 break;
2219 } while (--count > 0);
216ba023 2220 mxvar_log.txcnt[tty->index] += (cnt - port->xmit_cnt);
1da177e4 2221
1c45607a
JS		 2222 port->mon_data.txcnt += (cnt - port->xmit_cnt);
2223 port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
2224 port->icount.tx += (cnt - port->xmit_cnt);
1da177e4 2225
216ba023
AC		 2226 if (port->xmit_cnt < WAKEUP_CHARS && tty)
2227 tty_wakeup(tty);
1c45607a
JS		 2228
2229 if (port->xmit_cnt <= 0) {
2230 port->IER &= ~UART_IER_THRI;
2231 outb(port->IER, port->ioaddr + UART_IER);
1da177e4 2232 }
1da177e4
LT		 2233}
2234
2235/*
1c45607a 2236 * This is the serial driver's generic interrupt routine
1da177e4 2237 */
1c45607a 2238static irqreturn_t mxser_interrupt(int irq, void *dev_id)
1da177e4 2239{
1c45607a
JS		 2240 int status, iir, i;
2241 struct mxser_board *brd = NULL;
2242 struct mxser_port *port;
2243 int max, irqbits, bits, msr;
2244 unsigned int int_cnt, pass_counter = 0;
2245 int handled = IRQ_NONE;
216ba023 2246 struct tty_struct *tty;
1da177e4 2247
1c45607a
JS		 2248 for (i = 0; i < MXSER_BOARDS; i++)
2249 if (dev_id == &mxser_boards[i]) {
2250 brd = dev_id;
2251 break;
2252 }
1da177e4 2253
1c45607a
JS		 2254 if (i == MXSER_BOARDS)
2255 goto irq_stop;
2256 if (brd == NULL)
2257 goto irq_stop;
2258 max = brd->info->nports;
2259 while (pass_counter++ < MXSER_ISR_PASS_LIMIT) {
2260 irqbits = inb(brd->vector) & brd->vector_mask;
2261 if (irqbits == brd->vector_mask)
2262 break;
1da177e4 2263
1c45607a
JS		 2264 handled = IRQ_HANDLED;
2265 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
2266 if (irqbits == brd->vector_mask)
2267 break;
2268 if (bits & irqbits)
2269 continue;
2270 port = &brd->ports[i];
2271
2272 int_cnt = 0;
2273 spin_lock(&port->slock);
2274 do {
2275 iir = inb(port->ioaddr + UART_IIR);
2276 if (iir & UART_IIR_NO_INT)
2277 break;
2278 iir &= MOXA_MUST_IIR_MASK;
216ba023
AC		 2279 tty = tty_port_tty_get(&port->port);
2280 if (!tty ||
0ad9e7d1
AC		 2281 (port->port.flags & ASYNC_CLOSING) ||
2282 !(port->port.flags &
1c45607a
JS		 2283 ASYNC_INITIALIZED)) {
2284 status = inb(port->ioaddr + UART_LSR);
2285 outb(0x27, port->ioaddr + UART_FCR);
2286 inb(port->ioaddr + UART_MSR);
216ba023 2287 tty_kref_put(tty);
1c45607a
JS		 2288 break;
2289 }
1da177e4 2290
1c45607a
JS		 2291 status = inb(port->ioaddr + UART_LSR);
2292
2293 if (status & UART_LSR_PE)
2294 port->err_shadow |= NPPI_NOTIFY_PARITY;
2295 if (status & UART_LSR_FE)
2296 port->err_shadow |= NPPI_NOTIFY_FRAMING;
2297 if (status & UART_LSR_OE)
2298 port->err_shadow |=
2299 NPPI_NOTIFY_HW_OVERRUN;
2300 if (status & UART_LSR_BI)
2301 port->err_shadow |= NPPI_NOTIFY_BREAK;
2302
2303 if (port->board->chip_flag) {
2304 if (iir == MOXA_MUST_IIR_GDA ||
2305 iir == MOXA_MUST_IIR_RDA ||
2306 iir == MOXA_MUST_IIR_RTO ||
2307 iir == MOXA_MUST_IIR_LSR)
216ba023 2308 mxser_receive_chars(tty, port,
1c45607a
JS		 2309 &status);
2310
2311 } else {
2312 status &= port->read_status_mask;
2313 if (status & UART_LSR_DR)
216ba023 2314 mxser_receive_chars(tty, port,
1c45607a
JS		 2315 &status);
2316 }
2317 msr = inb(port->ioaddr + UART_MSR);
2318 if (msr & UART_MSR_ANY_DELTA)
216ba023 2319 mxser_check_modem_status(tty, port, msr);
1c45607a
JS		 2320
2321 if (port->board->chip_flag) {
2322 if (iir == 0x02 && (status &
2323 UART_LSR_THRE))
216ba023 2324 mxser_transmit_chars(tty, port);
1c45607a
JS		 2325 } else {
2326 if (status & UART_LSR_THRE)
216ba023 2327 mxser_transmit_chars(tty, port);
1c45607a 2328 }
216ba023 2329 tty_kref_put(tty);
1c45607a
JS		 2330 } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
2331 spin_unlock(&port->slock);
2332 }
2333 }
1da177e4 2334
1c45607a
JS		 2335irq_stop:
2336 return handled;
2337}
1da177e4 2338
1c45607a
JS		 2339static const struct tty_operations mxser_ops = {
2340 .open = mxser_open,
2341 .close = mxser_close,
2342 .write = mxser_write,
2343 .put_char = mxser_put_char,
2344 .flush_chars = mxser_flush_chars,
2345 .write_room = mxser_write_room,
2346 .chars_in_buffer = mxser_chars_in_buffer,
2347 .flush_buffer = mxser_flush_buffer,
2348 .ioctl = mxser_ioctl,
2349 .throttle = mxser_throttle,
2350 .unthrottle = mxser_unthrottle,
2351 .set_termios = mxser_set_termios,
2352 .stop = mxser_stop,
2353 .start = mxser_start,
2354 .hangup = mxser_hangup,
2355 .break_ctl = mxser_rs_break,
2356 .wait_until_sent = mxser_wait_until_sent,
2357 .tiocmget = mxser_tiocmget,
2358 .tiocmset = mxser_tiocmset,
2359};
1da177e4 2360
31f35939
AC		 2361struct tty_port_operations mxser_port_ops = {
2362 .carrier_raised = mxser_carrier_raised,
fcc8ac18 2363 .dtr_rts = mxser_dtr_rts,
31f35939
AC		 2364};
2365
1c45607a
JS		 2366/*
2367 * The MOXA Smartio/Industio serial driver boot-time initialization code!
2368 */
1da177e4 2369
1c45607a
JS		 2370static void mxser_release_res(struct mxser_board *brd, struct pci_dev *pdev,
2371 unsigned int irq)
2372{
2373 if (irq)
2374 free_irq(brd->irq, brd);
2375 if (pdev != NULL) { /* PCI */
2376#ifdef CONFIG_PCI
2377 pci_release_region(pdev, 2);
2378 pci_release_region(pdev, 3);
2379#endif
2380 } else {
2381 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
2382 release_region(brd->vector, 1);
2383 }
1da177e4
LT		 2384}
2385
1c45607a
JS		 2386static int __devinit mxser_initbrd(struct mxser_board *brd,
2387 struct pci_dev *pdev)
1da177e4 2388{
1c45607a
JS		 2389 struct mxser_port *info;
2390 unsigned int i;
2391 int retval;
1da177e4 2392
83766bc6
JS		 2393 printk(KERN_INFO "mxser: max. baud rate = %d bps\n",
2394 brd->ports[0].max_baud);
1da177e4 2395
1c45607a
JS		 2396 for (i = 0; i < brd->info->nports; i++) {
2397 info = &brd->ports[i];
44b7d1b3 2398 tty_port_init(&info->port);
31f35939 2399 info->port.ops = &mxser_port_ops;
1c45607a
JS		 2400 info->board = brd;
2401 info->stop_rx = 0;
2402 info->ldisc_stop_rx = 0;
1da177e4 2403
1c45607a
JS		 2404 /* Enhance mode enabled here */
2405 if (brd->chip_flag != MOXA_OTHER_UART)
148ff86b 2406 mxser_enable_must_enchance_mode(info->ioaddr);
1da177e4 2407
0ad9e7d1 2408 info->port.flags = ASYNC_SHARE_IRQ;
1c45607a 2409 info->type = brd->uart_type;
1da177e4 2410
1c45607a 2411 process_txrx_fifo(info);
1da177e4 2412
1c45607a 2413 info->custom_divisor = info->baud_base * 16;
44b7d1b3
AC		 2414 info->port.close_delay = 5 * HZ / 10;
2415 info->port.closing_wait = 30 * HZ;
1c45607a 2416 info->normal_termios = mxvar_sdriver->init_termios;
1c45607a
JS		 2417 init_waitqueue_head(&info->delta_msr_wait);
2418 memset(&info->mon_data, 0, sizeof(struct mxser_mon));
2419 info->err_shadow = 0;
2420 spin_lock_init(&info->slock);
1da177e4 2421
1c45607a
JS		 2422 /* before set INT ISR, disable all int */
2423 outb(inb(info->ioaddr + UART_IER) & 0xf0,
2424 info->ioaddr + UART_IER);
2425 }
1da177e4 2426
1c45607a
JS		 2427 retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser",
2428 brd);
2429 if (retval) {
2430 printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
2431 "conflict with another device.\n",
2432 brd->info->name, brd->irq);
2433 /* We hold resources, we need to release them. */
2434 mxser_release_res(brd, pdev, 0);
2435 }
2436 return retval;
2437}
1da177e4 2438
1c45607a 2439static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
1da177e4
LT		 2440{
2441 int id, i, bits;
2442 unsigned short regs[16], irq;
2443 unsigned char scratch, scratch2;
2444
1c45607a 2445 brd->chip_flag = MOXA_OTHER_UART;
1da177e4
LT		 2446
2447 id = mxser_read_register(cap, regs);
1c45607a
JS		 2448 switch (id) {
2449 case C168_ASIC_ID:
2450 brd->info = &mxser_cards[0];
2451 break;
2452 case C104_ASIC_ID:
2453 brd->info = &mxser_cards[1];
2454 break;
2455 case CI104J_ASIC_ID:
2456 brd->info = &mxser_cards[2];
2457 break;
2458 case C102_ASIC_ID:
2459 brd->info = &mxser_cards[5];
2460 break;
2461 case CI132_ASIC_ID:
2462 brd->info = &mxser_cards[6];
2463 break;
2464 case CI134_ASIC_ID:
2465 brd->info = &mxser_cards[7];
2466 break;
2467 default:
8ea2c2ec 2468 return 0;
1c45607a 2469 }
1da177e4
LT		 2470
2471 irq = 0;
1c45607a
JS		 2472 /* some ISA cards have 2 ports, but we want to see them as 4-port (why?)
2473 Flag-hack checks if configuration should be read as 2-port here. */
2474 if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) {
1da177e4
LT		 2475 irq = regs[9] & 0xF000;
2476 irq = irq | (irq >> 4);
2477 if (irq != (regs[9] & 0xFF00))
83766bc6 2478 goto err_irqconflict;
1c45607a 2479 } else if (brd->info->nports == 4) {
1da177e4
LT		 2480 irq = regs[9] & 0xF000;
2481 irq = irq | (irq >> 4);
2482 irq = irq | (irq >> 8);
2483 if (irq != regs[9])
83766bc6 2484 goto err_irqconflict;
1c45607a 2485 } else if (brd->info->nports == 8) {
1da177e4
LT		 2486 irq = regs[9] & 0xF000;
2487 irq = irq | (irq >> 4);
2488 irq = irq | (irq >> 8);
2489 if ((irq != regs[9]) || (irq != regs[10]))
83766bc6 2490 goto err_irqconflict;
1da177e4
LT		 2491 }
2492
83766bc6
JS		 2493 if (!irq) {
2494 printk(KERN_ERR "mxser: interrupt number unset\n");
2495 return -EIO;
2496 }
1c45607a 2497 brd->irq = ((int)(irq & 0xF000) >> 12);
1da177e4 2498 for (i = 0; i < 8; i++)
1c45607a 2499 brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
83766bc6
JS		 2500 if ((regs[12] & 0x80) == 0) {
2501 printk(KERN_ERR "mxser: invalid interrupt vector\n");
2502 return -EIO;
2503 }
1c45607a 2504 brd->vector = (int)regs[11]; /* interrupt vector */
1da177e4 2505 if (id == 1)
1c45607a 2506 brd->vector_mask = 0x00FF;
1da177e4 2507 else
1c45607a 2508 brd->vector_mask = 0x000F;
1da177e4
LT		 2509 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
2510 if (regs[12] & bits) {
1c45607a
JS		 2511 brd->ports[i].baud_base = 921600;
2512 brd->ports[i].max_baud = 921600;
1da177e4 2513 } else {
1c45607a
JS		 2514 brd->ports[i].baud_base = 115200;
2515 brd->ports[i].max_baud = 115200;
1da177e4
LT		 2516 }
2517 }
2518 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
2519 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
2520 outb(0, cap + UART_EFR); /* EFR is the same as FCR */
2521 outb(scratch2, cap + UART_LCR);
2522 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
2523 scratch = inb(cap + UART_IIR);
2524
2525 if (scratch & 0xC0)
1c45607a 2526 brd->uart_type = PORT_16550A;
1da177e4 2527 else
1c45607a
JS		 2528 brd->uart_type = PORT_16450;
2529 if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports,
83766bc6
JS		 2530 "mxser(IO)")) {
2531 printk(KERN_ERR "mxser: can't request ports I/O region: "
2532 "0x%.8lx-0x%.8lx\n",
2533 brd->ports[0].ioaddr, brd->ports[0].ioaddr +
2534 8 * brd->info->nports - 1);
2535 return -EIO;
2536 }
1c45607a
JS		 2537 if (!request_region(brd->vector, 1, "mxser(vector)")) {
2538 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
83766bc6
JS		 2539 printk(KERN_ERR "mxser: can't request interrupt vector region: "
2540 "0x%.8lx-0x%.8lx\n",
2541 brd->ports[0].ioaddr, brd->ports[0].ioaddr +
2542 8 * brd->info->nports - 1);
2543 return -EIO;
1c45607a
JS		 2544 }
2545 return brd->info->nports;
83766bc6
JS		 2546
2547err_irqconflict:
2548 printk(KERN_ERR "mxser: invalid interrupt number\n");
2549 return -EIO;
1da177e4
LT		 2550}
2551
1c45607a
JS		 2552static int __devinit mxser_probe(struct pci_dev *pdev,
2553 const struct pci_device_id *ent)
1da177e4 2554{
1c45607a
JS		 2555#ifdef CONFIG_PCI
2556 struct mxser_board *brd;
2557 unsigned int i, j;
2558 unsigned long ioaddress;
2559 int retval = -EINVAL;
1da177e4 2560
1c45607a
JS		 2561 for (i = 0; i < MXSER_BOARDS; i++)
2562 if (mxser_boards[i].info == NULL)
2563 break;
2564
2565 if (i >= MXSER_BOARDS) {
83766bc6
JS		 2566 dev_err(&pdev->dev, "too many boards found (maximum %d), board "
2567 "not configured\n", MXSER_BOARDS);
1c45607a
JS		 2568 goto err;
2569 }
2570
2571 brd = &mxser_boards[i];
2572 brd->idx = i * MXSER_PORTS_PER_BOARD;
83766bc6 2573 dev_info(&pdev->dev, "found MOXA %s board (BusNo=%d, DevNo=%d)\n",
1c45607a
JS		 2574 mxser_cards[ent->driver_data].name,
2575 pdev->bus->number, PCI_SLOT(pdev->devfn));
2576
2577 retval = pci_enable_device(pdev);
2578 if (retval) {
83766bc6 2579 dev_err(&pdev->dev, "PCI enable failed\n");
1c45607a
JS		 2580 goto err;
2581 }
2582
2583 /* io address */
2584 ioaddress = pci_resource_start(pdev, 2);
2585 retval = pci_request_region(pdev, 2, "mxser(IO)");
2586 if (retval)
2587 goto err;
2588
2589 brd->info = &mxser_cards[ent->driver_data];
2590 for (i = 0; i < brd->info->nports; i++)
2591 brd->ports[i].ioaddr = ioaddress + 8 * i;
2592
2593 /* vector */
2594 ioaddress = pci_resource_start(pdev, 3);
2595 retval = pci_request_region(pdev, 3, "mxser(vector)");
2596 if (retval)
2597 goto err_relio;
2598 brd->vector = ioaddress;
2599
2600 /* irq */
2601 brd->irq = pdev->irq;
2602
2603 brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
2604 brd->uart_type = PORT_16550A;
2605 brd->vector_mask = 0;
2606
2607 for (i = 0; i < brd->info->nports; i++) {
2608 for (j = 0; j < UART_INFO_NUM; j++) {
2609 if (Gpci_uart_info[j].type == brd->chip_flag) {
2610 brd->ports[i].max_baud =
2611 Gpci_uart_info[j].max_baud;
2612
2613 /* exception....CP-102 */
2614 if (brd->info->flags & MXSER_HIGHBAUD)
2615 brd->ports[i].max_baud = 921600;
2616 break;
1da177e4
LT		 2617 }
2618 }
1c45607a
JS		 2619 }
2620
2621 if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
2622 for (i = 0; i < brd->info->nports; i++) {
2623 if (i < 4)
2624 brd->ports[i].opmode_ioaddr = ioaddress + 4;
2625 else
2626 brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
1da177e4 2627 }
1c45607a
JS		 2628 outb(0, ioaddress + 4); /* default set to RS232 mode */
2629 outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
1da177e4 2630 }
1c45607a
JS		 2631
2632 for (i = 0; i < brd->info->nports; i++) {
2633 brd->vector_mask |= (1 << i);
2634 brd->ports[i].baud_base = 921600;
2635 }
2636
2637 /* mxser_initbrd will hook ISR. */
2638 retval = mxser_initbrd(brd, pdev);
2639 if (retval)
2640 goto err_null;
2641
2642 for (i = 0; i < brd->info->nports; i++)
2643 tty_register_device(mxvar_sdriver, brd->idx + i, &pdev->dev);
2644
2645 pci_set_drvdata(pdev, brd);
2646
2647 return 0;
2648err_relio:
2649 pci_release_region(pdev, 2);
2650err_null:
2651 brd->info = NULL;
2652err:
2653 return retval;
2654#else
2655 return -ENODEV;
2656#endif
1da177e4
LT		 2657}
2658
1c45607a 2659static void __devexit mxser_remove(struct pci_dev *pdev)
1da177e4 2660{
1c45607a
JS		 2661 struct mxser_board *brd = pci_get_drvdata(pdev);
2662 unsigned int i;
1da177e4 2663
1c45607a
JS		 2664 for (i = 0; i < brd->info->nports; i++)
2665 tty_unregister_device(mxvar_sdriver, brd->idx + i);
1da177e4 2666
1c45607a
JS		 2667 mxser_release_res(brd, pdev, 1);
2668 brd->info = NULL;
1da177e4
LT		 2669}
2670
1c45607a
JS		 2671static struct pci_driver mxser_driver = {
2672 .name = "mxser",
2673 .id_table = mxser_pcibrds,
2674 .probe = mxser_probe,
2675 .remove = __devexit_p(mxser_remove)
2676};
2677
2678static int __init mxser_module_init(void)
1da177e4 2679{
1c45607a 2680 struct mxser_board *brd;
1df00924
JS		 2681 unsigned int b, i, m;
2682 int retval;
1da177e4 2683
1c45607a
JS		 2684 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
2685 if (!mxvar_sdriver)
2686 return -ENOMEM;
2687
2688 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
2689 MXSER_VERSION);
2690
2691 /* Initialize the tty_driver structure */
2692 mxvar_sdriver->owner = THIS_MODULE;
2693 mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
2694 mxvar_sdriver->name = "ttyMI";
2695 mxvar_sdriver->major = ttymajor;
2696 mxvar_sdriver->minor_start = 0;
2697 mxvar_sdriver->num = MXSER_PORTS + 1;
2698 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
2699 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
2700 mxvar_sdriver->init_termios = tty_std_termios;
2701 mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
2702 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
2703 tty_set_operations(mxvar_sdriver, &mxser_ops);
2704
2705 retval = tty_register_driver(mxvar_sdriver);
2706 if (retval) {
2707 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
2708 "tty driver !\n");
2709 goto err_put;
1da177e4 2710 }
1c45607a 2711
1c45607a 2712 /* Start finding ISA boards here */
1df00924
JS		 2713 for (m = 0, b = 0; b < MXSER_BOARDS; b++) {
2714 if (!ioaddr[b])
2715 continue;
2716
2717 brd = &mxser_boards[m];
96050dfb 2718 retval = mxser_get_ISA_conf(ioaddr[b], brd);
1df00924
JS		 2719 if (retval <= 0) {
2720 brd->info = NULL;
2721 continue;
2722 }
1c45607a 2723
1df00924
JS		 2724 printk(KERN_INFO "mxser: found MOXA %s board (CAP=0x%lx)\n",
2725 brd->info->name, ioaddr[b]);
83766bc6 2726
1df00924
JS		 2727 /* mxser_initbrd will hook ISR. */
2728 if (mxser_initbrd(brd, NULL) < 0) {
2729 brd->info = NULL;
2730 continue;
2731 }
1c45607a 2732
1df00924
JS		 2733 brd->idx = m * MXSER_PORTS_PER_BOARD;
2734 for (i = 0; i < brd->info->nports; i++)
2735 tty_register_device(mxvar_sdriver, brd->idx + i, NULL);
1c45607a 2736
1df00924
JS		 2737 m++;
2738 }
1c45607a
JS		 2739
2740 retval = pci_register_driver(&mxser_driver);
2741 if (retval) {
83766bc6 2742 printk(KERN_ERR "mxser: can't register pci driver\n");
1c45607a
JS		 2743 if (!m) {
2744 retval = -ENODEV;
2745 goto err_unr;
2746 } /* else: we have some ISA cards under control */
2747 }
2748
1c45607a
JS		 2749 return 0;
2750err_unr:
2751 tty_unregister_driver(mxvar_sdriver);
2752err_put:
2753 put_tty_driver(mxvar_sdriver);
2754 return retval;
2755}
2756
2757static void __exit mxser_module_exit(void)
2758{
2759 unsigned int i, j;
2760
1c45607a
JS		 2761 pci_unregister_driver(&mxser_driver);
2762
2763 for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */
2764 if (mxser_boards[i].info != NULL)
2765 for (j = 0; j < mxser_boards[i].info->nports; j++)
2766 tty_unregister_device(mxvar_sdriver,
2767 mxser_boards[i].idx + j);
2768 tty_unregister_driver(mxvar_sdriver);
2769 put_tty_driver(mxvar_sdriver);
2770
2771 for (i = 0; i < MXSER_BOARDS; i++)
2772 if (mxser_boards[i].info != NULL)
2773 mxser_release_res(&mxser_boards[i], NULL, 1);
1da177e4
LT		 2774}
2775
2776module_init(mxser_module_init);
2777module_exit(mxser_module_exit);
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