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Commit | Line | Data |
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95ceafd4 SG |
1 | /* |
2 | * Copyright (C) 2012 Freescale Semiconductor, Inc. | |
3 | * | |
748c8766 VK |
4 | * Copyright (C) 2014 Linaro. |
5 | * Viresh Kumar <viresh.kumar@linaro.org> | |
6 | * | |
95ceafd4 SG |
7 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
12 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
13 | ||
14 | #include <linux/clk.h> | |
e1825b25 | 15 | #include <linux/cpu.h> |
77cff592 | 16 | #include <linux/cpu_cooling.h> |
95ceafd4 | 17 | #include <linux/cpufreq.h> |
77cff592 | 18 | #include <linux/cpumask.h> |
95ceafd4 SG |
19 | #include <linux/err.h> |
20 | #include <linux/module.h> | |
21 | #include <linux/of.h> | |
e4db1c74 | 22 | #include <linux/pm_opp.h> |
5553f9e2 | 23 | #include <linux/platform_device.h> |
95ceafd4 SG |
24 | #include <linux/regulator/consumer.h> |
25 | #include <linux/slab.h> | |
77cff592 | 26 | #include <linux/thermal.h> |
95ceafd4 | 27 | |
297a6622 VK |
28 | #include "cpufreq-dt.h" |
29 | ||
d2f31f1d | 30 | struct private_data { |
91291d9a | 31 | struct opp_table *opp_table; |
d2f31f1d | 32 | struct device *cpu_dev; |
d2f31f1d | 33 | struct thermal_cooling_device *cdev; |
050794aa | 34 | const char *reg_name; |
d2f31f1d | 35 | }; |
95ceafd4 | 36 | |
21c36d35 BZ |
37 | static struct freq_attr *cpufreq_dt_attr[] = { |
38 | &cpufreq_freq_attr_scaling_available_freqs, | |
39 | NULL, /* Extra space for boost-attr if required */ | |
40 | NULL, | |
41 | }; | |
42 | ||
bbcf0719 | 43 | static int set_target(struct cpufreq_policy *policy, unsigned int index) |
95ceafd4 | 44 | { |
d2f31f1d | 45 | struct private_data *priv = policy->driver_data; |
95ceafd4 | 46 | |
78c3ba5d VK |
47 | return dev_pm_opp_set_rate(priv->cpu_dev, |
48 | policy->freq_table[index].frequency * 1000); | |
95ceafd4 SG |
49 | } |
50 | ||
050794aa VK |
51 | /* |
52 | * An earlier version of opp-v1 bindings used to name the regulator | |
53 | * "cpu0-supply", we still need to handle that for backwards compatibility. | |
54 | */ | |
df2c8ec2 | 55 | static const char *find_supply_name(struct device *dev) |
050794aa | 56 | { |
df2c8ec2 | 57 | struct device_node *np; |
050794aa VK |
58 | struct property *pp; |
59 | int cpu = dev->id; | |
df2c8ec2 VK |
60 | const char *name = NULL; |
61 | ||
62 | np = of_node_get(dev->of_node); | |
63 | ||
64 | /* This must be valid for sure */ | |
65 | if (WARN_ON(!np)) | |
66 | return NULL; | |
050794aa VK |
67 | |
68 | /* Try "cpu0" for older DTs */ | |
69 | if (!cpu) { | |
70 | pp = of_find_property(np, "cpu0-supply", NULL); | |
df2c8ec2 VK |
71 | if (pp) { |
72 | name = "cpu0"; | |
73 | goto node_put; | |
74 | } | |
050794aa VK |
75 | } |
76 | ||
77 | pp = of_find_property(np, "cpu-supply", NULL); | |
df2c8ec2 VK |
78 | if (pp) { |
79 | name = "cpu"; | |
80 | goto node_put; | |
81 | } | |
050794aa VK |
82 | |
83 | dev_dbg(dev, "no regulator for cpu%d\n", cpu); | |
df2c8ec2 VK |
84 | node_put: |
85 | of_node_put(np); | |
86 | return name; | |
050794aa VK |
87 | } |
88 | ||
dd02a3d9 | 89 | static int resources_available(void) |
95ceafd4 | 90 | { |
d2f31f1d VK |
91 | struct device *cpu_dev; |
92 | struct regulator *cpu_reg; | |
93 | struct clk *cpu_clk; | |
94 | int ret = 0; | |
dd02a3d9 | 95 | const char *name; |
95ceafd4 | 96 | |
dd02a3d9 | 97 | cpu_dev = get_cpu_device(0); |
e1825b25 | 98 | if (!cpu_dev) { |
dd02a3d9 | 99 | pr_err("failed to get cpu0 device\n"); |
e1825b25 SH |
100 | return -ENODEV; |
101 | } | |
6754f556 | 102 | |
dd02a3d9 VK |
103 | cpu_clk = clk_get(cpu_dev, NULL); |
104 | ret = PTR_ERR_OR_ZERO(cpu_clk); | |
b331bc20 | 105 | if (ret) { |
fc31d6f5 | 106 | /* |
dd02a3d9 VK |
107 | * If cpu's clk node is present, but clock is not yet |
108 | * registered, we should try defering probe. | |
fc31d6f5 | 109 | */ |
dd02a3d9 VK |
110 | if (ret == -EPROBE_DEFER) |
111 | dev_dbg(cpu_dev, "clock not ready, retry\n"); | |
112 | else | |
113 | dev_err(cpu_dev, "failed to get clock: %d\n", ret); | |
2d2c5e0e | 114 | |
dd02a3d9 | 115 | return ret; |
fc31d6f5 NM |
116 | } |
117 | ||
dd02a3d9 VK |
118 | clk_put(cpu_clk); |
119 | ||
120 | name = find_supply_name(cpu_dev); | |
121 | /* Platform doesn't require regulator */ | |
122 | if (!name) | |
123 | return 0; | |
d2f31f1d | 124 | |
dd02a3d9 VK |
125 | cpu_reg = regulator_get_optional(cpu_dev, name); |
126 | ret = PTR_ERR_OR_ZERO(cpu_reg); | |
127 | if (ret) { | |
48a8624b | 128 | /* |
dd02a3d9 VK |
129 | * If cpu's regulator supply node is present, but regulator is |
130 | * not yet registered, we should try defering probe. | |
48a8624b VK |
131 | */ |
132 | if (ret == -EPROBE_DEFER) | |
dd02a3d9 | 133 | dev_dbg(cpu_dev, "cpu0 regulator not ready, retry\n"); |
48a8624b | 134 | else |
dd02a3d9 VK |
135 | dev_dbg(cpu_dev, "no regulator for cpu0: %d\n", ret); |
136 | ||
137 | return ret; | |
d2f31f1d VK |
138 | } |
139 | ||
dd02a3d9 VK |
140 | regulator_put(cpu_reg); |
141 | return 0; | |
d2f31f1d VK |
142 | } |
143 | ||
bbcf0719 | 144 | static int cpufreq_init(struct cpufreq_policy *policy) |
d2f31f1d VK |
145 | { |
146 | struct cpufreq_frequency_table *freq_table; | |
91291d9a | 147 | struct opp_table *opp_table = NULL; |
d2f31f1d VK |
148 | struct private_data *priv; |
149 | struct device *cpu_dev; | |
d2f31f1d VK |
150 | struct clk *cpu_clk; |
151 | unsigned int transition_latency; | |
1530b996 | 152 | bool fallback = false; |
050794aa | 153 | const char *name; |
d2f31f1d VK |
154 | int ret; |
155 | ||
dd02a3d9 VK |
156 | cpu_dev = get_cpu_device(policy->cpu); |
157 | if (!cpu_dev) { | |
158 | pr_err("failed to get cpu%d device\n", policy->cpu); | |
159 | return -ENODEV; | |
160 | } | |
161 | ||
162 | cpu_clk = clk_get(cpu_dev, NULL); | |
163 | if (IS_ERR(cpu_clk)) { | |
164 | ret = PTR_ERR(cpu_clk); | |
165 | dev_err(cpu_dev, "%s: failed to get clk: %d\n", __func__, ret); | |
d2f31f1d VK |
166 | return ret; |
167 | } | |
48a8624b | 168 | |
2e02d872 | 169 | /* Get OPP-sharing information from "operating-points-v2" bindings */ |
8f8d37b2 | 170 | ret = dev_pm_opp_of_get_sharing_cpus(cpu_dev, policy->cpus); |
2e02d872 | 171 | if (ret) { |
1530b996 VK |
172 | if (ret != -ENOENT) |
173 | goto out_put_clk; | |
174 | ||
2e02d872 VK |
175 | /* |
176 | * operating-points-v2 not supported, fallback to old method of | |
1530b996 VK |
177 | * finding shared-OPPs for backward compatibility if the |
178 | * platform hasn't set sharing CPUs. | |
2e02d872 | 179 | */ |
1530b996 VK |
180 | if (dev_pm_opp_get_sharing_cpus(cpu_dev, policy->cpus)) |
181 | fallback = true; | |
2e02d872 VK |
182 | } |
183 | ||
050794aa VK |
184 | /* |
185 | * OPP layer will be taking care of regulators now, but it needs to know | |
186 | * the name of the regulator first. | |
187 | */ | |
df2c8ec2 | 188 | name = find_supply_name(cpu_dev); |
050794aa | 189 | if (name) { |
dfbe4678 | 190 | opp_table = dev_pm_opp_set_regulators(cpu_dev, &name, 1); |
91291d9a SB |
191 | if (IS_ERR(opp_table)) { |
192 | ret = PTR_ERR(opp_table); | |
050794aa VK |
193 | dev_err(cpu_dev, "Failed to set regulator for cpu%d: %d\n", |
194 | policy->cpu, ret); | |
dd02a3d9 | 195 | goto out_put_clk; |
050794aa VK |
196 | } |
197 | } | |
198 | ||
2e02d872 VK |
199 | /* |
200 | * Initialize OPP tables for all policy->cpus. They will be shared by | |
201 | * all CPUs which have marked their CPUs shared with OPP bindings. | |
202 | * | |
203 | * For platforms not using operating-points-v2 bindings, we do this | |
204 | * before updating policy->cpus. Otherwise, we will end up creating | |
205 | * duplicate OPPs for policy->cpus. | |
206 | * | |
207 | * OPPs might be populated at runtime, don't check for error here | |
208 | */ | |
8f8d37b2 | 209 | dev_pm_opp_of_cpumask_add_table(policy->cpus); |
2e02d872 | 210 | |
7d5d0c8b VK |
211 | /* |
212 | * But we need OPP table to function so if it is not there let's | |
213 | * give platform code chance to provide it for us. | |
214 | */ | |
215 | ret = dev_pm_opp_get_opp_count(cpu_dev); | |
216 | if (ret <= 0) { | |
896d6a4c | 217 | dev_dbg(cpu_dev, "OPP table is not ready, deferring probe\n"); |
7d5d0c8b VK |
218 | ret = -EPROBE_DEFER; |
219 | goto out_free_opp; | |
220 | } | |
221 | ||
1530b996 | 222 | if (fallback) { |
eb96924a | 223 | cpumask_setall(policy->cpus); |
2e02d872 VK |
224 | |
225 | /* | |
226 | * OPP tables are initialized only for policy->cpu, do it for | |
227 | * others as well. | |
228 | */ | |
8f8d37b2 | 229 | ret = dev_pm_opp_set_sharing_cpus(cpu_dev, policy->cpus); |
8bc86284 VK |
230 | if (ret) |
231 | dev_err(cpu_dev, "%s: failed to mark OPPs as shared: %d\n", | |
232 | __func__, ret); | |
2e02d872 | 233 | } |
95ceafd4 | 234 | |
d2f31f1d VK |
235 | priv = kzalloc(sizeof(*priv), GFP_KERNEL); |
236 | if (!priv) { | |
237 | ret = -ENOMEM; | |
2f0f609f | 238 | goto out_free_opp; |
95ceafd4 SG |
239 | } |
240 | ||
050794aa | 241 | priv->reg_name = name; |
91291d9a | 242 | priv->opp_table = opp_table; |
95ceafd4 | 243 | |
045ee45c LS |
244 | ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table); |
245 | if (ret) { | |
896d6a4c | 246 | dev_err(cpu_dev, "failed to init cpufreq table: %d\n", ret); |
045ee45c LS |
247 | goto out_free_priv; |
248 | } | |
249 | ||
d2f31f1d | 250 | priv->cpu_dev = cpu_dev; |
d2f31f1d | 251 | policy->driver_data = priv; |
d2f31f1d | 252 | policy->clk = cpu_clk; |
953ba9ff | 253 | |
3aa26a3b | 254 | policy->suspend_freq = dev_pm_opp_get_suspend_opp_freq(cpu_dev) / 1000; |
953ba9ff | 255 | |
34e5a527 TP |
256 | ret = cpufreq_table_validate_and_show(policy, freq_table); |
257 | if (ret) { | |
258 | dev_err(cpu_dev, "%s: invalid frequency table: %d\n", __func__, | |
259 | ret); | |
9a004428 | 260 | goto out_free_cpufreq_table; |
d15fa862 VK |
261 | } |
262 | ||
263 | /* Support turbo/boost mode */ | |
264 | if (policy_has_boost_freq(policy)) { | |
265 | /* This gets disabled by core on driver unregister */ | |
266 | ret = cpufreq_enable_boost_support(); | |
267 | if (ret) | |
268 | goto out_free_cpufreq_table; | |
21c36d35 | 269 | cpufreq_dt_attr[1] = &cpufreq_freq_attr_scaling_boost_freqs; |
34e5a527 TP |
270 | } |
271 | ||
755b888f VK |
272 | transition_latency = dev_pm_opp_get_max_transition_latency(cpu_dev); |
273 | if (!transition_latency) | |
274 | transition_latency = CPUFREQ_ETERNAL; | |
275 | ||
34e5a527 TP |
276 | policy->cpuinfo.transition_latency = transition_latency; |
277 | ||
95ceafd4 SG |
278 | return 0; |
279 | ||
9a004428 | 280 | out_free_cpufreq_table: |
5d4879cd | 281 | dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table); |
045ee45c LS |
282 | out_free_priv: |
283 | kfree(priv); | |
2f0f609f | 284 | out_free_opp: |
8f8d37b2 | 285 | dev_pm_opp_of_cpumask_remove_table(policy->cpus); |
050794aa | 286 | if (name) |
dfbe4678 | 287 | dev_pm_opp_put_regulators(opp_table); |
dd02a3d9 | 288 | out_put_clk: |
ed4b053c | 289 | clk_put(cpu_clk); |
d2f31f1d VK |
290 | |
291 | return ret; | |
292 | } | |
293 | ||
bbcf0719 | 294 | static int cpufreq_exit(struct cpufreq_policy *policy) |
d2f31f1d VK |
295 | { |
296 | struct private_data *priv = policy->driver_data; | |
297 | ||
17ad13ba | 298 | cpufreq_cooling_unregister(priv->cdev); |
d2f31f1d | 299 | dev_pm_opp_free_cpufreq_table(priv->cpu_dev, &policy->freq_table); |
8f8d37b2 | 300 | dev_pm_opp_of_cpumask_remove_table(policy->related_cpus); |
050794aa | 301 | if (priv->reg_name) |
dfbe4678 | 302 | dev_pm_opp_put_regulators(priv->opp_table); |
050794aa | 303 | |
d2f31f1d | 304 | clk_put(policy->clk); |
d2f31f1d VK |
305 | kfree(priv); |
306 | ||
307 | return 0; | |
308 | } | |
309 | ||
9a004428 VK |
310 | static void cpufreq_ready(struct cpufreq_policy *policy) |
311 | { | |
312 | struct private_data *priv = policy->driver_data; | |
313 | struct device_node *np = of_node_get(priv->cpu_dev->of_node); | |
314 | ||
315 | if (WARN_ON(!np)) | |
316 | return; | |
317 | ||
318 | /* | |
319 | * For now, just loading the cooling device; | |
320 | * thermal DT code takes care of matching them. | |
321 | */ | |
322 | if (of_find_property(np, "#cooling-cells", NULL)) { | |
f8fa8ae0 PA |
323 | u32 power_coefficient = 0; |
324 | ||
325 | of_property_read_u32(np, "dynamic-power-coefficient", | |
326 | &power_coefficient); | |
327 | ||
328 | priv->cdev = of_cpufreq_power_cooling_register(np, | |
4d753aa7 | 329 | policy, power_coefficient, NULL); |
9a004428 VK |
330 | if (IS_ERR(priv->cdev)) { |
331 | dev_err(priv->cpu_dev, | |
332 | "running cpufreq without cooling device: %ld\n", | |
333 | PTR_ERR(priv->cdev)); | |
334 | ||
335 | priv->cdev = NULL; | |
336 | } | |
337 | } | |
338 | ||
339 | of_node_put(np); | |
340 | } | |
341 | ||
bbcf0719 | 342 | static struct cpufreq_driver dt_cpufreq_driver = { |
d2f31f1d VK |
343 | .flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK, |
344 | .verify = cpufreq_generic_frequency_table_verify, | |
bbcf0719 | 345 | .target_index = set_target, |
d2f31f1d | 346 | .get = cpufreq_generic_get, |
bbcf0719 VK |
347 | .init = cpufreq_init, |
348 | .exit = cpufreq_exit, | |
9a004428 | 349 | .ready = cpufreq_ready, |
bbcf0719 | 350 | .name = "cpufreq-dt", |
21c36d35 | 351 | .attr = cpufreq_dt_attr, |
953ba9ff | 352 | .suspend = cpufreq_generic_suspend, |
d2f31f1d VK |
353 | }; |
354 | ||
bbcf0719 | 355 | static int dt_cpufreq_probe(struct platform_device *pdev) |
d2f31f1d | 356 | { |
297a6622 | 357 | struct cpufreq_dt_platform_data *data = dev_get_platdata(&pdev->dev); |
d2f31f1d VK |
358 | int ret; |
359 | ||
360 | /* | |
361 | * All per-cluster (CPUs sharing clock/voltages) initialization is done | |
362 | * from ->init(). In probe(), we just need to make sure that clk and | |
363 | * regulators are available. Else defer probe and retry. | |
364 | * | |
365 | * FIXME: Is checking this only for CPU0 sufficient ? | |
366 | */ | |
dd02a3d9 | 367 | ret = resources_available(); |
d2f31f1d VK |
368 | if (ret) |
369 | return ret; | |
370 | ||
297a6622 VK |
371 | if (data && data->have_governor_per_policy) |
372 | dt_cpufreq_driver.flags |= CPUFREQ_HAVE_GOVERNOR_PER_POLICY; | |
373 | ||
bbcf0719 | 374 | ret = cpufreq_register_driver(&dt_cpufreq_driver); |
d2f31f1d | 375 | if (ret) |
dd02a3d9 | 376 | dev_err(&pdev->dev, "failed register driver: %d\n", ret); |
d2f31f1d | 377 | |
95ceafd4 SG |
378 | return ret; |
379 | } | |
5553f9e2 | 380 | |
bbcf0719 | 381 | static int dt_cpufreq_remove(struct platform_device *pdev) |
5553f9e2 | 382 | { |
bbcf0719 | 383 | cpufreq_unregister_driver(&dt_cpufreq_driver); |
5553f9e2 SG |
384 | return 0; |
385 | } | |
386 | ||
bbcf0719 | 387 | static struct platform_driver dt_cpufreq_platdrv = { |
5553f9e2 | 388 | .driver = { |
bbcf0719 | 389 | .name = "cpufreq-dt", |
5553f9e2 | 390 | }, |
bbcf0719 VK |
391 | .probe = dt_cpufreq_probe, |
392 | .remove = dt_cpufreq_remove, | |
5553f9e2 | 393 | }; |
bbcf0719 | 394 | module_platform_driver(dt_cpufreq_platdrv); |
95ceafd4 | 395 | |
07949bf9 | 396 | MODULE_ALIAS("platform:cpufreq-dt"); |
748c8766 | 397 | MODULE_AUTHOR("Viresh Kumar <viresh.kumar@linaro.org>"); |
95ceafd4 | 398 | MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>"); |
bbcf0719 | 399 | MODULE_DESCRIPTION("Generic cpufreq driver"); |
95ceafd4 | 400 | MODULE_LICENSE("GPL"); |