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42099322 DS |
1 | /* |
2 | * drivers/cpufreq/spear-cpufreq.c | |
3 | * | |
4 | * CPU Frequency Scaling for SPEAr platform | |
5 | * | |
6 | * Copyright (C) 2012 ST Microelectronics | |
7 | * Deepak Sikri <deepak.sikri@st.com> | |
8 | * | |
9 | * This file is licensed under the terms of the GNU General Public | |
10 | * License version 2. This program is licensed "as is" without any | |
11 | * warranty of any kind, whether express or implied. | |
12 | */ | |
13 | ||
14 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
15 | ||
16 | #include <linux/clk.h> | |
17 | #include <linux/cpufreq.h> | |
18 | #include <linux/err.h> | |
19 | #include <linux/init.h> | |
20 | #include <linux/module.h> | |
c0e46948 | 21 | #include <linux/of_device.h> |
42099322 DS |
22 | #include <linux/slab.h> |
23 | #include <linux/types.h> | |
24 | ||
25 | /* SPEAr CPUFreq driver data structure */ | |
26 | static struct { | |
27 | struct clk *clk; | |
28 | unsigned int transition_latency; | |
29 | struct cpufreq_frequency_table *freq_tbl; | |
30 | u32 cnt; | |
31 | } spear_cpufreq; | |
32 | ||
42099322 DS |
33 | static unsigned int spear_cpufreq_get(unsigned int cpu) |
34 | { | |
35 | return clk_get_rate(spear_cpufreq.clk) / 1000; | |
36 | } | |
37 | ||
38 | static struct clk *spear1340_cpu_get_possible_parent(unsigned long newfreq) | |
39 | { | |
40 | struct clk *sys_pclk; | |
41 | int pclk; | |
42 | /* | |
43 | * In SPEAr1340, cpu clk's parent sys clk can take input from | |
44 | * following sources | |
45 | */ | |
46 | const char *sys_clk_src[] = { | |
47 | "sys_syn_clk", | |
48 | "pll1_clk", | |
49 | "pll2_clk", | |
50 | "pll3_clk", | |
51 | }; | |
52 | ||
53 | /* | |
54 | * As sys clk can have multiple source with their own range | |
55 | * limitation so we choose possible sources accordingly | |
56 | */ | |
57 | if (newfreq <= 300000000) | |
58 | pclk = 0; /* src is sys_syn_clk */ | |
59 | else if (newfreq > 300000000 && newfreq <= 500000000) | |
60 | pclk = 3; /* src is pll3_clk */ | |
61 | else if (newfreq == 600000000) | |
62 | pclk = 1; /* src is pll1_clk */ | |
63 | else | |
64 | return ERR_PTR(-EINVAL); | |
65 | ||
66 | /* Get parent to sys clock */ | |
67 | sys_pclk = clk_get(NULL, sys_clk_src[pclk]); | |
68 | if (IS_ERR(sys_pclk)) | |
69 | pr_err("Failed to get %s clock\n", sys_clk_src[pclk]); | |
70 | ||
71 | return sys_pclk; | |
72 | } | |
73 | ||
74 | /* | |
75 | * In SPEAr1340, we cannot use newfreq directly because we need to actually | |
76 | * access a source clock (clk) which might not be ancestor of cpu at present. | |
77 | * Hence in SPEAr1340 we would operate on source clock directly before switching | |
78 | * cpu clock to it. | |
79 | */ | |
80 | static int spear1340_set_cpu_rate(struct clk *sys_pclk, unsigned long newfreq) | |
81 | { | |
82 | struct clk *sys_clk; | |
83 | int ret = 0; | |
84 | ||
85 | sys_clk = clk_get_parent(spear_cpufreq.clk); | |
86 | if (IS_ERR(sys_clk)) { | |
87 | pr_err("failed to get cpu's parent (sys) clock\n"); | |
88 | return PTR_ERR(sys_clk); | |
89 | } | |
90 | ||
91 | /* Set the rate of the source clock before changing the parent */ | |
92 | ret = clk_set_rate(sys_pclk, newfreq); | |
93 | if (ret) { | |
94 | pr_err("Failed to set sys clk rate to %lu\n", newfreq); | |
95 | return ret; | |
96 | } | |
97 | ||
98 | ret = clk_set_parent(sys_clk, sys_pclk); | |
99 | if (ret) { | |
100 | pr_err("Failed to set sys clk parent\n"); | |
101 | return ret; | |
102 | } | |
103 | ||
104 | return 0; | |
105 | } | |
106 | ||
107 | static int spear_cpufreq_target(struct cpufreq_policy *policy, | |
9c0ebcf7 | 108 | unsigned int index) |
42099322 DS |
109 | { |
110 | struct cpufreq_freqs freqs; | |
bb25f13a | 111 | long newfreq; |
42099322 | 112 | struct clk *srcclk; |
9c0ebcf7 | 113 | int ret, mult = 1; |
42099322 | 114 | |
42099322 | 115 | freqs.old = spear_cpufreq_get(0); |
42099322 | 116 | newfreq = spear_cpufreq.freq_tbl[index].frequency * 1000; |
9c0ebcf7 | 117 | |
42099322 DS |
118 | if (of_machine_is_compatible("st,spear1340")) { |
119 | /* | |
120 | * SPEAr1340 is special in the sense that due to the possibility | |
121 | * of multiple clock sources for cpu clk's parent we can have | |
122 | * different clock source for different frequency of cpu clk. | |
123 | * Hence we need to choose one from amongst these possible clock | |
124 | * sources. | |
125 | */ | |
126 | srcclk = spear1340_cpu_get_possible_parent(newfreq); | |
127 | if (IS_ERR(srcclk)) { | |
128 | pr_err("Failed to get src clk\n"); | |
129 | return PTR_ERR(srcclk); | |
130 | } | |
131 | ||
132 | /* SPEAr1340: src clk is always 2 * intended cpu clk */ | |
133 | mult = 2; | |
134 | } else { | |
135 | /* | |
136 | * src clock to be altered is ancestor of cpu clock. Hence we | |
137 | * can directly work on cpu clk | |
138 | */ | |
139 | srcclk = spear_cpufreq.clk; | |
140 | } | |
141 | ||
142 | newfreq = clk_round_rate(srcclk, newfreq * mult); | |
143 | if (newfreq < 0) { | |
144 | pr_err("clk_round_rate failed for cpu src clock\n"); | |
145 | return newfreq; | |
146 | } | |
147 | ||
148 | freqs.new = newfreq / 1000; | |
149 | freqs.new /= mult; | |
6f35a65f | 150 | |
b43a7ffb | 151 | cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE); |
42099322 DS |
152 | |
153 | if (mult == 2) | |
154 | ret = spear1340_set_cpu_rate(srcclk, newfreq); | |
155 | else | |
156 | ret = clk_set_rate(spear_cpufreq.clk, newfreq); | |
157 | ||
158 | /* Get current rate after clk_set_rate, in case of failure */ | |
159 | if (ret) { | |
160 | pr_err("CPU Freq: cpu clk_set_rate failed: %d\n", ret); | |
161 | freqs.new = clk_get_rate(spear_cpufreq.clk) / 1000; | |
162 | } | |
163 | ||
b43a7ffb | 164 | cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE); |
42099322 DS |
165 | return ret; |
166 | } | |
167 | ||
168 | static int spear_cpufreq_init(struct cpufreq_policy *policy) | |
169 | { | |
7a936bd0 VK |
170 | return cpufreq_generic_init(policy, spear_cpufreq.freq_tbl, |
171 | spear_cpufreq.transition_latency); | |
42099322 DS |
172 | } |
173 | ||
42099322 DS |
174 | static struct cpufreq_driver spear_cpufreq_driver = { |
175 | .name = "cpufreq-spear", | |
176 | .flags = CPUFREQ_STICKY, | |
e2132fa6 | 177 | .verify = cpufreq_generic_frequency_table_verify, |
9c0ebcf7 | 178 | .target_index = spear_cpufreq_target, |
42099322 DS |
179 | .get = spear_cpufreq_get, |
180 | .init = spear_cpufreq_init, | |
e2132fa6 VK |
181 | .exit = cpufreq_generic_exit, |
182 | .attr = cpufreq_generic_attr, | |
42099322 DS |
183 | }; |
184 | ||
185 | static int spear_cpufreq_driver_init(void) | |
186 | { | |
187 | struct device_node *np; | |
188 | const struct property *prop; | |
189 | struct cpufreq_frequency_table *freq_tbl; | |
190 | const __be32 *val; | |
191 | int cnt, i, ret; | |
192 | ||
c0e46948 | 193 | np = of_cpu_device_node_get(0); |
42099322 DS |
194 | if (!np) { |
195 | pr_err("No cpu node found"); | |
196 | return -ENODEV; | |
197 | } | |
198 | ||
199 | if (of_property_read_u32(np, "clock-latency", | |
200 | &spear_cpufreq.transition_latency)) | |
201 | spear_cpufreq.transition_latency = CPUFREQ_ETERNAL; | |
202 | ||
203 | prop = of_find_property(np, "cpufreq_tbl", NULL); | |
204 | if (!prop || !prop->value) { | |
205 | pr_err("Invalid cpufreq_tbl"); | |
206 | ret = -ENODEV; | |
207 | goto out_put_node; | |
208 | } | |
209 | ||
210 | cnt = prop->length / sizeof(u32); | |
211 | val = prop->value; | |
212 | ||
213 | freq_tbl = kmalloc(sizeof(*freq_tbl) * (cnt + 1), GFP_KERNEL); | |
214 | if (!freq_tbl) { | |
215 | ret = -ENOMEM; | |
216 | goto out_put_node; | |
217 | } | |
218 | ||
219 | for (i = 0; i < cnt; i++) { | |
50701588 | 220 | freq_tbl[i].driver_data = i; |
42099322 DS |
221 | freq_tbl[i].frequency = be32_to_cpup(val++); |
222 | } | |
223 | ||
50701588 | 224 | freq_tbl[i].driver_data = i; |
42099322 DS |
225 | freq_tbl[i].frequency = CPUFREQ_TABLE_END; |
226 | ||
227 | spear_cpufreq.freq_tbl = freq_tbl; | |
228 | ||
229 | of_node_put(np); | |
230 | ||
231 | spear_cpufreq.clk = clk_get(NULL, "cpu_clk"); | |
232 | if (IS_ERR(spear_cpufreq.clk)) { | |
233 | pr_err("Unable to get CPU clock\n"); | |
234 | ret = PTR_ERR(spear_cpufreq.clk); | |
235 | goto out_put_mem; | |
236 | } | |
237 | ||
238 | ret = cpufreq_register_driver(&spear_cpufreq_driver); | |
239 | if (!ret) | |
240 | return 0; | |
241 | ||
242 | pr_err("failed register driver: %d\n", ret); | |
243 | clk_put(spear_cpufreq.clk); | |
244 | ||
245 | out_put_mem: | |
246 | kfree(freq_tbl); | |
247 | return ret; | |
248 | ||
249 | out_put_node: | |
250 | of_node_put(np); | |
251 | return ret; | |
252 | } | |
253 | late_initcall(spear_cpufreq_driver_init); | |
254 | ||
255 | MODULE_AUTHOR("Deepak Sikri <deepak.sikri@st.com>"); | |
256 | MODULE_DESCRIPTION("SPEAr CPUFreq driver"); | |
257 | MODULE_LICENSE("GPL"); |