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Commit | Line | Data |
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4a776f0a HS |
1 | /* |
2 | * DMA Engine test module | |
3 | * | |
4 | * Copyright (C) 2007 Atmel Corporation | |
851b7e16 | 5 | * Copyright (C) 2013 Intel Corporation |
4a776f0a HS |
6 | * |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
872f05c6 DW |
11 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
12 | ||
4a776f0a | 13 | #include <linux/delay.h> |
b7f080cf | 14 | #include <linux/dma-mapping.h> |
4a776f0a | 15 | #include <linux/dmaengine.h> |
981ed70d | 16 | #include <linux/freezer.h> |
4a776f0a HS |
17 | #include <linux/init.h> |
18 | #include <linux/kthread.h> | |
19 | #include <linux/module.h> | |
20 | #include <linux/moduleparam.h> | |
21 | #include <linux/random.h> | |
5a0e3ad6 | 22 | #include <linux/slab.h> |
4a776f0a HS |
23 | #include <linux/wait.h> |
24 | ||
25 | static unsigned int test_buf_size = 16384; | |
a6c268d0 | 26 | module_param(test_buf_size, uint, S_IRUGO | S_IWUSR); |
4a776f0a HS |
27 | MODULE_PARM_DESC(test_buf_size, "Size of the memcpy test buffer"); |
28 | ||
06190d84 | 29 | static char test_channel[20]; |
a6c268d0 AS |
30 | module_param_string(channel, test_channel, sizeof(test_channel), |
31 | S_IRUGO | S_IWUSR); | |
4a776f0a HS |
32 | MODULE_PARM_DESC(channel, "Bus ID of the channel to test (default: any)"); |
33 | ||
a85159fe | 34 | static char test_device[32]; |
a6c268d0 AS |
35 | module_param_string(device, test_device, sizeof(test_device), |
36 | S_IRUGO | S_IWUSR); | |
4a776f0a HS |
37 | MODULE_PARM_DESC(device, "Bus ID of the DMA Engine to test (default: any)"); |
38 | ||
39 | static unsigned int threads_per_chan = 1; | |
a6c268d0 | 40 | module_param(threads_per_chan, uint, S_IRUGO | S_IWUSR); |
4a776f0a HS |
41 | MODULE_PARM_DESC(threads_per_chan, |
42 | "Number of threads to start per channel (default: 1)"); | |
43 | ||
44 | static unsigned int max_channels; | |
a6c268d0 | 45 | module_param(max_channels, uint, S_IRUGO | S_IWUSR); |
33df8ca0 | 46 | MODULE_PARM_DESC(max_channels, |
4a776f0a HS |
47 | "Maximum number of channels to use (default: all)"); |
48 | ||
0a2ff57d | 49 | static unsigned int iterations; |
a6c268d0 | 50 | module_param(iterations, uint, S_IRUGO | S_IWUSR); |
0a2ff57d NF |
51 | MODULE_PARM_DESC(iterations, |
52 | "Iterations before stopping test (default: infinite)"); | |
53 | ||
a0d4cb44 KA |
54 | static unsigned int sg_buffers = 1; |
55 | module_param(sg_buffers, uint, S_IRUGO | S_IWUSR); | |
56 | MODULE_PARM_DESC(sg_buffers, | |
57 | "Number of scatter gather buffers (default: 1)"); | |
58 | ||
d8646724 | 59 | static unsigned int dmatest; |
a0d4cb44 KA |
60 | module_param(dmatest, uint, S_IRUGO | S_IWUSR); |
61 | MODULE_PARM_DESC(dmatest, | |
d8646724 | 62 | "dmatest 0-memcpy 1-slave_sg (default: 0)"); |
a0d4cb44 | 63 | |
b54d5cb9 | 64 | static unsigned int xor_sources = 3; |
a6c268d0 | 65 | module_param(xor_sources, uint, S_IRUGO | S_IWUSR); |
b54d5cb9 DW |
66 | MODULE_PARM_DESC(xor_sources, |
67 | "Number of xor source buffers (default: 3)"); | |
68 | ||
58691d64 | 69 | static unsigned int pq_sources = 3; |
a6c268d0 | 70 | module_param(pq_sources, uint, S_IRUGO | S_IWUSR); |
58691d64 DW |
71 | MODULE_PARM_DESC(pq_sources, |
72 | "Number of p+q source buffers (default: 3)"); | |
73 | ||
d42efe6b | 74 | static int timeout = 3000; |
a6c268d0 | 75 | module_param(timeout, uint, S_IRUGO | S_IWUSR); |
85ee7a1d JP |
76 | MODULE_PARM_DESC(timeout, "Transfer Timeout in msec (default: 3000), " |
77 | "Pass -1 for infinite timeout"); | |
d42efe6b | 78 | |
e3b9c347 DW |
79 | static bool noverify; |
80 | module_param(noverify, bool, S_IRUGO | S_IWUSR); | |
81 | MODULE_PARM_DESC(noverify, "Disable random data setup and verification"); | |
4a776f0a | 82 | |
50137a7d DW |
83 | static bool verbose; |
84 | module_param(verbose, bool, S_IRUGO | S_IWUSR); | |
85 | MODULE_PARM_DESC(verbose, "Enable \"success\" result messages (default: off)"); | |
4a776f0a | 86 | |
e03e93a9 | 87 | /** |
15b8a8ea | 88 | * struct dmatest_params - test parameters. |
e03e93a9 AS |
89 | * @buf_size: size of the memcpy test buffer |
90 | * @channel: bus ID of the channel to test | |
91 | * @device: bus ID of the DMA Engine to test | |
92 | * @threads_per_chan: number of threads to start per channel | |
93 | * @max_channels: maximum number of channels to use | |
94 | * @iterations: iterations before stopping test | |
95 | * @xor_sources: number of xor source buffers | |
96 | * @pq_sources: number of p+q source buffers | |
97 | * @timeout: transfer timeout in msec, -1 for infinite timeout | |
98 | */ | |
15b8a8ea | 99 | struct dmatest_params { |
e03e93a9 AS |
100 | unsigned int buf_size; |
101 | char channel[20]; | |
a85159fe | 102 | char device[32]; |
e03e93a9 AS |
103 | unsigned int threads_per_chan; |
104 | unsigned int max_channels; | |
105 | unsigned int iterations; | |
106 | unsigned int xor_sources; | |
107 | unsigned int pq_sources; | |
108 | int timeout; | |
e3b9c347 | 109 | bool noverify; |
15b8a8ea AS |
110 | }; |
111 | ||
112 | /** | |
113 | * struct dmatest_info - test information. | |
114 | * @params: test parameters | |
851b7e16 | 115 | * @lock: access protection to the fields of this structure |
15b8a8ea | 116 | */ |
a310d037 | 117 | static struct dmatest_info { |
15b8a8ea AS |
118 | /* Test parameters */ |
119 | struct dmatest_params params; | |
838cc704 AS |
120 | |
121 | /* Internal state */ | |
122 | struct list_head channels; | |
123 | unsigned int nr_channels; | |
851b7e16 | 124 | struct mutex lock; |
a310d037 DW |
125 | bool did_init; |
126 | } test_info = { | |
127 | .channels = LIST_HEAD_INIT(test_info.channels), | |
128 | .lock = __MUTEX_INITIALIZER(test_info.lock), | |
129 | }; | |
851b7e16 | 130 | |
a310d037 DW |
131 | static int dmatest_run_set(const char *val, const struct kernel_param *kp); |
132 | static int dmatest_run_get(char *val, const struct kernel_param *kp); | |
9c27847d | 133 | static const struct kernel_param_ops run_ops = { |
a310d037 DW |
134 | .set = dmatest_run_set, |
135 | .get = dmatest_run_get, | |
e03e93a9 | 136 | }; |
a310d037 DW |
137 | static bool dmatest_run; |
138 | module_param_cb(run, &run_ops, &dmatest_run, S_IRUGO | S_IWUSR); | |
139 | MODULE_PARM_DESC(run, "Run the test (default: false)"); | |
e03e93a9 | 140 | |
a310d037 DW |
141 | /* Maximum amount of mismatched bytes in buffer to print */ |
142 | #define MAX_ERROR_COUNT 32 | |
143 | ||
144 | /* | |
145 | * Initialization patterns. All bytes in the source buffer has bit 7 | |
146 | * set, all bytes in the destination buffer has bit 7 cleared. | |
147 | * | |
148 | * Bit 6 is set for all bytes which are to be copied by the DMA | |
149 | * engine. Bit 5 is set for all bytes which are to be overwritten by | |
150 | * the DMA engine. | |
151 | * | |
152 | * The remaining bits are the inverse of a counter which increments by | |
153 | * one for each byte address. | |
154 | */ | |
155 | #define PATTERN_SRC 0x80 | |
156 | #define PATTERN_DST 0x00 | |
157 | #define PATTERN_COPY 0x40 | |
158 | #define PATTERN_OVERWRITE 0x20 | |
159 | #define PATTERN_COUNT_MASK 0x1f | |
851b7e16 | 160 | |
a310d037 DW |
161 | struct dmatest_thread { |
162 | struct list_head node; | |
163 | struct dmatest_info *info; | |
164 | struct task_struct *task; | |
165 | struct dma_chan *chan; | |
166 | u8 **srcs; | |
d6481608 | 167 | u8 **usrcs; |
a310d037 | 168 | u8 **dsts; |
d6481608 | 169 | u8 **udsts; |
a310d037 DW |
170 | enum dma_transaction_type type; |
171 | bool done; | |
172 | }; | |
95019c8c | 173 | |
a310d037 DW |
174 | struct dmatest_chan { |
175 | struct list_head node; | |
176 | struct dma_chan *chan; | |
177 | struct list_head threads; | |
e03e93a9 AS |
178 | }; |
179 | ||
2d88ce76 DW |
180 | static DECLARE_WAIT_QUEUE_HEAD(thread_wait); |
181 | static bool wait; | |
182 | ||
183 | static bool is_threaded_test_run(struct dmatest_info *info) | |
184 | { | |
185 | struct dmatest_chan *dtc; | |
186 | ||
187 | list_for_each_entry(dtc, &info->channels, node) { | |
188 | struct dmatest_thread *thread; | |
189 | ||
190 | list_for_each_entry(thread, &dtc->threads, node) { | |
191 | if (!thread->done) | |
192 | return true; | |
193 | } | |
194 | } | |
195 | ||
196 | return false; | |
197 | } | |
198 | ||
199 | static int dmatest_wait_get(char *val, const struct kernel_param *kp) | |
200 | { | |
201 | struct dmatest_info *info = &test_info; | |
202 | struct dmatest_params *params = &info->params; | |
203 | ||
204 | if (params->iterations) | |
205 | wait_event(thread_wait, !is_threaded_test_run(info)); | |
206 | wait = true; | |
207 | return param_get_bool(val, kp); | |
208 | } | |
209 | ||
9c27847d | 210 | static const struct kernel_param_ops wait_ops = { |
2d88ce76 DW |
211 | .get = dmatest_wait_get, |
212 | .set = param_set_bool, | |
213 | }; | |
214 | module_param_cb(wait, &wait_ops, &wait, S_IRUGO); | |
215 | MODULE_PARM_DESC(wait, "Wait for tests to complete (default: false)"); | |
e03e93a9 | 216 | |
15b8a8ea | 217 | static bool dmatest_match_channel(struct dmatest_params *params, |
e03e93a9 | 218 | struct dma_chan *chan) |
4a776f0a | 219 | { |
15b8a8ea | 220 | if (params->channel[0] == '\0') |
4a776f0a | 221 | return true; |
15b8a8ea | 222 | return strcmp(dma_chan_name(chan), params->channel) == 0; |
4a776f0a HS |
223 | } |
224 | ||
15b8a8ea | 225 | static bool dmatest_match_device(struct dmatest_params *params, |
e03e93a9 | 226 | struct dma_device *device) |
4a776f0a | 227 | { |
15b8a8ea | 228 | if (params->device[0] == '\0') |
4a776f0a | 229 | return true; |
15b8a8ea | 230 | return strcmp(dev_name(device->dev), params->device) == 0; |
4a776f0a HS |
231 | } |
232 | ||
233 | static unsigned long dmatest_random(void) | |
234 | { | |
235 | unsigned long buf; | |
236 | ||
be9fa5a4 | 237 | prandom_bytes(&buf, sizeof(buf)); |
4a776f0a HS |
238 | return buf; |
239 | } | |
240 | ||
e03e93a9 AS |
241 | static void dmatest_init_srcs(u8 **bufs, unsigned int start, unsigned int len, |
242 | unsigned int buf_size) | |
4a776f0a HS |
243 | { |
244 | unsigned int i; | |
b54d5cb9 DW |
245 | u8 *buf; |
246 | ||
247 | for (; (buf = *bufs); bufs++) { | |
248 | for (i = 0; i < start; i++) | |
249 | buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK); | |
250 | for ( ; i < start + len; i++) | |
251 | buf[i] = PATTERN_SRC | PATTERN_COPY | |
c019894e | 252 | | (~i & PATTERN_COUNT_MASK); |
e03e93a9 | 253 | for ( ; i < buf_size; i++) |
b54d5cb9 DW |
254 | buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK); |
255 | buf++; | |
256 | } | |
4a776f0a HS |
257 | } |
258 | ||
e03e93a9 AS |
259 | static void dmatest_init_dsts(u8 **bufs, unsigned int start, unsigned int len, |
260 | unsigned int buf_size) | |
4a776f0a HS |
261 | { |
262 | unsigned int i; | |
b54d5cb9 DW |
263 | u8 *buf; |
264 | ||
265 | for (; (buf = *bufs); bufs++) { | |
266 | for (i = 0; i < start; i++) | |
267 | buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK); | |
268 | for ( ; i < start + len; i++) | |
269 | buf[i] = PATTERN_DST | PATTERN_OVERWRITE | |
270 | | (~i & PATTERN_COUNT_MASK); | |
e03e93a9 | 271 | for ( ; i < buf_size; i++) |
b54d5cb9 DW |
272 | buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK); |
273 | } | |
4a776f0a HS |
274 | } |
275 | ||
7b610178 DW |
276 | static void dmatest_mismatch(u8 actual, u8 pattern, unsigned int index, |
277 | unsigned int counter, bool is_srcbuf) | |
278 | { | |
279 | u8 diff = actual ^ pattern; | |
280 | u8 expected = pattern | (~counter & PATTERN_COUNT_MASK); | |
281 | const char *thread_name = current->comm; | |
282 | ||
283 | if (is_srcbuf) | |
284 | pr_warn("%s: srcbuf[0x%x] overwritten! Expected %02x, got %02x\n", | |
285 | thread_name, index, expected, actual); | |
286 | else if ((pattern & PATTERN_COPY) | |
287 | && (diff & (PATTERN_COPY | PATTERN_OVERWRITE))) | |
288 | pr_warn("%s: dstbuf[0x%x] not copied! Expected %02x, got %02x\n", | |
289 | thread_name, index, expected, actual); | |
290 | else if (diff & PATTERN_SRC) | |
291 | pr_warn("%s: dstbuf[0x%x] was copied! Expected %02x, got %02x\n", | |
292 | thread_name, index, expected, actual); | |
293 | else | |
294 | pr_warn("%s: dstbuf[0x%x] mismatch! Expected %02x, got %02x\n", | |
295 | thread_name, index, expected, actual); | |
296 | } | |
297 | ||
298 | static unsigned int dmatest_verify(u8 **bufs, unsigned int start, | |
299 | unsigned int end, unsigned int counter, u8 pattern, | |
300 | bool is_srcbuf) | |
4a776f0a HS |
301 | { |
302 | unsigned int i; | |
303 | unsigned int error_count = 0; | |
304 | u8 actual; | |
b54d5cb9 DW |
305 | u8 expected; |
306 | u8 *buf; | |
307 | unsigned int counter_orig = counter; | |
308 | ||
309 | for (; (buf = *bufs); bufs++) { | |
310 | counter = counter_orig; | |
311 | for (i = start; i < end; i++) { | |
312 | actual = buf[i]; | |
313 | expected = pattern | (~counter & PATTERN_COUNT_MASK); | |
314 | if (actual != expected) { | |
7b610178 DW |
315 | if (error_count < MAX_ERROR_COUNT) |
316 | dmatest_mismatch(actual, pattern, i, | |
317 | counter, is_srcbuf); | |
b54d5cb9 DW |
318 | error_count++; |
319 | } | |
320 | counter++; | |
4a776f0a | 321 | } |
4a776f0a HS |
322 | } |
323 | ||
74b5c07a | 324 | if (error_count > MAX_ERROR_COUNT) |
7b610178 | 325 | pr_warn("%s: %u errors suppressed\n", |
74b5c07a | 326 | current->comm, error_count - MAX_ERROR_COUNT); |
4a776f0a HS |
327 | |
328 | return error_count; | |
329 | } | |
330 | ||
adfa543e TH |
331 | /* poor man's completion - we want to use wait_event_freezable() on it */ |
332 | struct dmatest_done { | |
333 | bool done; | |
334 | wait_queue_head_t *wait; | |
335 | }; | |
336 | ||
337 | static void dmatest_callback(void *arg) | |
e44e0aa3 | 338 | { |
adfa543e TH |
339 | struct dmatest_done *done = arg; |
340 | ||
341 | done->done = true; | |
342 | wake_up_all(done->wait); | |
e44e0aa3 DW |
343 | } |
344 | ||
8be9e32b AM |
345 | static unsigned int min_odd(unsigned int x, unsigned int y) |
346 | { | |
347 | unsigned int val = min(x, y); | |
348 | ||
349 | return val % 2 ? val : val - 1; | |
350 | } | |
351 | ||
872f05c6 DW |
352 | static void result(const char *err, unsigned int n, unsigned int src_off, |
353 | unsigned int dst_off, unsigned int len, unsigned long data) | |
d86b2f29 | 354 | { |
2acec150 | 355 | pr_info("%s: result #%u: '%s' with src_off=0x%x dst_off=0x%x len=0x%x (%lu)\n", |
872f05c6 | 356 | current->comm, n, err, src_off, dst_off, len, data); |
d86b2f29 AS |
357 | } |
358 | ||
872f05c6 DW |
359 | static void dbg_result(const char *err, unsigned int n, unsigned int src_off, |
360 | unsigned int dst_off, unsigned int len, | |
361 | unsigned long data) | |
95019c8c | 362 | { |
2acec150 | 363 | pr_debug("%s: result #%u: '%s' with src_off=0x%x dst_off=0x%x len=0x%x (%lu)\n", |
a835bb85 | 364 | current->comm, n, err, src_off, dst_off, len, data); |
95019c8c AS |
365 | } |
366 | ||
a835bb85 AS |
367 | #define verbose_result(err, n, src_off, dst_off, len, data) ({ \ |
368 | if (verbose) \ | |
369 | result(err, n, src_off, dst_off, len, data); \ | |
370 | else \ | |
371 | dbg_result(err, n, src_off, dst_off, len, data);\ | |
50137a7d | 372 | }) |
95019c8c | 373 | |
86727443 | 374 | static unsigned long long dmatest_persec(s64 runtime, unsigned int val) |
d86b2f29 | 375 | { |
86727443 | 376 | unsigned long long per_sec = 1000000; |
d86b2f29 | 377 | |
86727443 DW |
378 | if (runtime <= 0) |
379 | return 0; | |
95019c8c | 380 | |
86727443 DW |
381 | /* drop precision until runtime is 32-bits */ |
382 | while (runtime > UINT_MAX) { | |
383 | runtime >>= 1; | |
384 | per_sec <<= 1; | |
95019c8c AS |
385 | } |
386 | ||
86727443 DW |
387 | per_sec *= val; |
388 | do_div(per_sec, runtime); | |
389 | return per_sec; | |
95019c8c AS |
390 | } |
391 | ||
86727443 | 392 | static unsigned long long dmatest_KBs(s64 runtime, unsigned long long len) |
95019c8c | 393 | { |
86727443 | 394 | return dmatest_persec(runtime, len >> 10); |
95019c8c AS |
395 | } |
396 | ||
4a776f0a HS |
397 | /* |
398 | * This function repeatedly tests DMA transfers of various lengths and | |
b54d5cb9 DW |
399 | * offsets for a given operation type until it is told to exit by |
400 | * kthread_stop(). There may be multiple threads running this function | |
401 | * in parallel for a single channel, and there may be multiple channels | |
402 | * being tested in parallel. | |
4a776f0a HS |
403 | * |
404 | * Before each test, the source and destination buffer is initialized | |
405 | * with a known pattern. This pattern is different depending on | |
406 | * whether it's in an area which is supposed to be copied or | |
407 | * overwritten, and different in the source and destination buffers. | |
408 | * So if the DMA engine doesn't copy exactly what we tell it to copy, | |
409 | * we'll notice. | |
410 | */ | |
411 | static int dmatest_func(void *data) | |
412 | { | |
adfa543e | 413 | DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_wait); |
4a776f0a | 414 | struct dmatest_thread *thread = data; |
adfa543e | 415 | struct dmatest_done done = { .wait = &done_wait }; |
e03e93a9 | 416 | struct dmatest_info *info; |
15b8a8ea | 417 | struct dmatest_params *params; |
4a776f0a | 418 | struct dma_chan *chan; |
8be9e32b | 419 | struct dma_device *dev; |
4a776f0a HS |
420 | unsigned int error_count; |
421 | unsigned int failed_tests = 0; | |
422 | unsigned int total_tests = 0; | |
423 | dma_cookie_t cookie; | |
424 | enum dma_status status; | |
b54d5cb9 | 425 | enum dma_ctrl_flags flags; |
945b5af3 | 426 | u8 *pq_coefs = NULL; |
4a776f0a | 427 | int ret; |
b54d5cb9 DW |
428 | int src_cnt; |
429 | int dst_cnt; | |
430 | int i; | |
e9405ef0 | 431 | ktime_t ktime, start, diff; |
8b0e1953 TG |
432 | ktime_t filltime = 0; |
433 | ktime_t comparetime = 0; | |
86727443 DW |
434 | s64 runtime = 0; |
435 | unsigned long long total_len = 0; | |
d6481608 | 436 | u8 align = 0; |
4a776f0a | 437 | |
adfa543e | 438 | set_freezable(); |
4a776f0a HS |
439 | |
440 | ret = -ENOMEM; | |
4a776f0a HS |
441 | |
442 | smp_rmb(); | |
e03e93a9 | 443 | info = thread->info; |
15b8a8ea | 444 | params = &info->params; |
4a776f0a | 445 | chan = thread->chan; |
8be9e32b | 446 | dev = chan->device; |
d6481608 DJ |
447 | if (thread->type == DMA_MEMCPY) { |
448 | align = dev->copy_align; | |
b54d5cb9 | 449 | src_cnt = dst_cnt = 1; |
d6481608 DJ |
450 | } else if (thread->type == DMA_SG) { |
451 | align = dev->copy_align; | |
a0d4cb44 | 452 | src_cnt = dst_cnt = sg_buffers; |
d6481608 | 453 | } else if (thread->type == DMA_XOR) { |
8be9e32b | 454 | /* force odd to ensure dst = src */ |
15b8a8ea | 455 | src_cnt = min_odd(params->xor_sources | 1, dev->max_xor); |
b54d5cb9 | 456 | dst_cnt = 1; |
d6481608 | 457 | align = dev->xor_align; |
58691d64 | 458 | } else if (thread->type == DMA_PQ) { |
8be9e32b | 459 | /* force odd to ensure dst = src */ |
15b8a8ea | 460 | src_cnt = min_odd(params->pq_sources | 1, dma_maxpq(dev, 0)); |
58691d64 | 461 | dst_cnt = 2; |
d6481608 | 462 | align = dev->pq_align; |
945b5af3 | 463 | |
31d18257 | 464 | pq_coefs = kmalloc(params->pq_sources + 1, GFP_KERNEL); |
945b5af3 AS |
465 | if (!pq_coefs) |
466 | goto err_thread_type; | |
467 | ||
94de648d | 468 | for (i = 0; i < src_cnt; i++) |
58691d64 | 469 | pq_coefs[i] = 1; |
b54d5cb9 | 470 | } else |
945b5af3 | 471 | goto err_thread_type; |
b54d5cb9 | 472 | |
31d18257 | 473 | thread->srcs = kcalloc(src_cnt + 1, sizeof(u8 *), GFP_KERNEL); |
b54d5cb9 DW |
474 | if (!thread->srcs) |
475 | goto err_srcs; | |
d6481608 DJ |
476 | |
477 | thread->usrcs = kcalloc(src_cnt + 1, sizeof(u8 *), GFP_KERNEL); | |
478 | if (!thread->usrcs) | |
479 | goto err_usrcs; | |
480 | ||
b54d5cb9 | 481 | for (i = 0; i < src_cnt; i++) { |
d6481608 DJ |
482 | thread->usrcs[i] = kmalloc(params->buf_size + align, |
483 | GFP_KERNEL); | |
484 | if (!thread->usrcs[i]) | |
b54d5cb9 | 485 | goto err_srcbuf; |
d6481608 DJ |
486 | |
487 | /* align srcs to alignment restriction */ | |
488 | if (align) | |
489 | thread->srcs[i] = PTR_ALIGN(thread->usrcs[i], align); | |
490 | else | |
491 | thread->srcs[i] = thread->usrcs[i]; | |
b54d5cb9 DW |
492 | } |
493 | thread->srcs[i] = NULL; | |
494 | ||
31d18257 | 495 | thread->dsts = kcalloc(dst_cnt + 1, sizeof(u8 *), GFP_KERNEL); |
b54d5cb9 DW |
496 | if (!thread->dsts) |
497 | goto err_dsts; | |
d6481608 DJ |
498 | |
499 | thread->udsts = kcalloc(dst_cnt + 1, sizeof(u8 *), GFP_KERNEL); | |
500 | if (!thread->udsts) | |
501 | goto err_udsts; | |
502 | ||
b54d5cb9 | 503 | for (i = 0; i < dst_cnt; i++) { |
d6481608 DJ |
504 | thread->udsts[i] = kmalloc(params->buf_size + align, |
505 | GFP_KERNEL); | |
506 | if (!thread->udsts[i]) | |
b54d5cb9 | 507 | goto err_dstbuf; |
d6481608 DJ |
508 | |
509 | /* align dsts to alignment restriction */ | |
510 | if (align) | |
511 | thread->dsts[i] = PTR_ALIGN(thread->udsts[i], align); | |
512 | else | |
513 | thread->dsts[i] = thread->udsts[i]; | |
b54d5cb9 DW |
514 | } |
515 | thread->dsts[i] = NULL; | |
516 | ||
e44e0aa3 DW |
517 | set_user_nice(current, 10); |
518 | ||
b203bd3f | 519 | /* |
d1cab34c | 520 | * src and dst buffers are freed by ourselves below |
b203bd3f | 521 | */ |
0776ae7b | 522 | flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT; |
4a776f0a | 523 | |
86727443 | 524 | ktime = ktime_get(); |
0a2ff57d | 525 | while (!kthread_should_stop() |
15b8a8ea | 526 | && !(params->iterations && total_tests >= params->iterations)) { |
b54d5cb9 | 527 | struct dma_async_tx_descriptor *tx = NULL; |
4076e755 DW |
528 | struct dmaengine_unmap_data *um; |
529 | dma_addr_t srcs[src_cnt]; | |
530 | dma_addr_t *dsts; | |
ede23a58 | 531 | unsigned int src_off, dst_off, len; |
a0d4cb44 KA |
532 | struct scatterlist tx_sg[src_cnt]; |
533 | struct scatterlist rx_sg[src_cnt]; | |
d86be86e | 534 | |
4a776f0a HS |
535 | total_tests++; |
536 | ||
15b8a8ea | 537 | if (1 << align > params->buf_size) { |
cfe4f275 | 538 | pr_err("%u-byte buffer too small for %d-byte alignment\n", |
15b8a8ea | 539 | params->buf_size, 1 << align); |
cfe4f275 GL |
540 | break; |
541 | } | |
542 | ||
ede23a58 | 543 | if (params->noverify) |
e3b9c347 | 544 | len = params->buf_size; |
ede23a58 AS |
545 | else |
546 | len = dmatest_random() % params->buf_size + 1; | |
547 | ||
548 | len = (len >> align) << align; | |
549 | if (!len) | |
550 | len = 1 << align; | |
551 | ||
552 | total_len += len; | |
553 | ||
554 | if (params->noverify) { | |
e3b9c347 DW |
555 | src_off = 0; |
556 | dst_off = 0; | |
557 | } else { | |
e9405ef0 | 558 | start = ktime_get(); |
e3b9c347 DW |
559 | src_off = dmatest_random() % (params->buf_size - len + 1); |
560 | dst_off = dmatest_random() % (params->buf_size - len + 1); | |
561 | ||
562 | src_off = (src_off >> align) << align; | |
563 | dst_off = (dst_off >> align) << align; | |
564 | ||
565 | dmatest_init_srcs(thread->srcs, src_off, len, | |
566 | params->buf_size); | |
567 | dmatest_init_dsts(thread->dsts, dst_off, len, | |
568 | params->buf_size); | |
e9405ef0 SK |
569 | |
570 | diff = ktime_sub(ktime_get(), start); | |
571 | filltime = ktime_add(filltime, diff); | |
e3b9c347 DW |
572 | } |
573 | ||
31d18257 | 574 | um = dmaengine_get_unmap_data(dev->dev, src_cnt + dst_cnt, |
4076e755 DW |
575 | GFP_KERNEL); |
576 | if (!um) { | |
577 | failed_tests++; | |
578 | result("unmap data NULL", total_tests, | |
579 | src_off, dst_off, len, ret); | |
580 | continue; | |
581 | } | |
4a776f0a | 582 | |
4076e755 | 583 | um->len = params->buf_size; |
b54d5cb9 | 584 | for (i = 0; i < src_cnt; i++) { |
745c00da | 585 | void *buf = thread->srcs[i]; |
4076e755 | 586 | struct page *pg = virt_to_page(buf); |
745c00da | 587 | unsigned pg_off = (unsigned long) buf & ~PAGE_MASK; |
4076e755 DW |
588 | |
589 | um->addr[i] = dma_map_page(dev->dev, pg, pg_off, | |
590 | um->len, DMA_TO_DEVICE); | |
591 | srcs[i] = um->addr[i] + src_off; | |
592 | ret = dma_mapping_error(dev->dev, um->addr[i]); | |
afde3be1 | 593 | if (ret) { |
4076e755 | 594 | dmaengine_unmap_put(um); |
872f05c6 DW |
595 | result("src mapping error", total_tests, |
596 | src_off, dst_off, len, ret); | |
afde3be1 AS |
597 | failed_tests++; |
598 | continue; | |
599 | } | |
4076e755 | 600 | um->to_cnt++; |
b54d5cb9 | 601 | } |
d86be86e | 602 | /* map with DMA_BIDIRECTIONAL to force writeback/invalidate */ |
4076e755 | 603 | dsts = &um->addr[src_cnt]; |
b54d5cb9 | 604 | for (i = 0; i < dst_cnt; i++) { |
745c00da | 605 | void *buf = thread->dsts[i]; |
4076e755 | 606 | struct page *pg = virt_to_page(buf); |
745c00da | 607 | unsigned pg_off = (unsigned long) buf & ~PAGE_MASK; |
4076e755 DW |
608 | |
609 | dsts[i] = dma_map_page(dev->dev, pg, pg_off, um->len, | |
610 | DMA_BIDIRECTIONAL); | |
611 | ret = dma_mapping_error(dev->dev, dsts[i]); | |
afde3be1 | 612 | if (ret) { |
4076e755 | 613 | dmaengine_unmap_put(um); |
872f05c6 DW |
614 | result("dst mapping error", total_tests, |
615 | src_off, dst_off, len, ret); | |
afde3be1 AS |
616 | failed_tests++; |
617 | continue; | |
618 | } | |
4076e755 | 619 | um->bidi_cnt++; |
b54d5cb9 DW |
620 | } |
621 | ||
a0d4cb44 KA |
622 | sg_init_table(tx_sg, src_cnt); |
623 | sg_init_table(rx_sg, src_cnt); | |
624 | for (i = 0; i < src_cnt; i++) { | |
625 | sg_dma_address(&rx_sg[i]) = srcs[i]; | |
626 | sg_dma_address(&tx_sg[i]) = dsts[i] + dst_off; | |
627 | sg_dma_len(&tx_sg[i]) = len; | |
628 | sg_dma_len(&rx_sg[i]) = len; | |
629 | } | |
630 | ||
b54d5cb9 DW |
631 | if (thread->type == DMA_MEMCPY) |
632 | tx = dev->device_prep_dma_memcpy(chan, | |
4076e755 DW |
633 | dsts[0] + dst_off, |
634 | srcs[0], len, flags); | |
a0d4cb44 KA |
635 | else if (thread->type == DMA_SG) |
636 | tx = dev->device_prep_dma_sg(chan, tx_sg, src_cnt, | |
637 | rx_sg, src_cnt, flags); | |
b54d5cb9 DW |
638 | else if (thread->type == DMA_XOR) |
639 | tx = dev->device_prep_dma_xor(chan, | |
4076e755 DW |
640 | dsts[0] + dst_off, |
641 | srcs, src_cnt, | |
b54d5cb9 | 642 | len, flags); |
58691d64 DW |
643 | else if (thread->type == DMA_PQ) { |
644 | dma_addr_t dma_pq[dst_cnt]; | |
645 | ||
646 | for (i = 0; i < dst_cnt; i++) | |
4076e755 DW |
647 | dma_pq[i] = dsts[i] + dst_off; |
648 | tx = dev->device_prep_dma_pq(chan, dma_pq, srcs, | |
94de648d | 649 | src_cnt, pq_coefs, |
58691d64 DW |
650 | len, flags); |
651 | } | |
d86be86e | 652 | |
d86be86e | 653 | if (!tx) { |
4076e755 | 654 | dmaengine_unmap_put(um); |
872f05c6 DW |
655 | result("prep error", total_tests, src_off, |
656 | dst_off, len, ret); | |
d86be86e AN |
657 | msleep(100); |
658 | failed_tests++; | |
659 | continue; | |
660 | } | |
e44e0aa3 | 661 | |
adfa543e | 662 | done.done = false; |
e44e0aa3 | 663 | tx->callback = dmatest_callback; |
adfa543e | 664 | tx->callback_param = &done; |
d86be86e AN |
665 | cookie = tx->tx_submit(tx); |
666 | ||
4a776f0a | 667 | if (dma_submit_error(cookie)) { |
4076e755 | 668 | dmaengine_unmap_put(um); |
872f05c6 DW |
669 | result("submit error", total_tests, src_off, |
670 | dst_off, len, ret); | |
4a776f0a HS |
671 | msleep(100); |
672 | failed_tests++; | |
673 | continue; | |
674 | } | |
b54d5cb9 | 675 | dma_async_issue_pending(chan); |
4a776f0a | 676 | |
bcc567e3 | 677 | wait_event_freezable_timeout(done_wait, done.done, |
15b8a8ea | 678 | msecs_to_jiffies(params->timeout)); |
981ed70d | 679 | |
e44e0aa3 | 680 | status = dma_async_is_tx_complete(chan, cookie, NULL, NULL); |
4a776f0a | 681 | |
adfa543e TH |
682 | if (!done.done) { |
683 | /* | |
684 | * We're leaving the timed out dma operation with | |
685 | * dangling pointer to done_wait. To make this | |
686 | * correct, we'll need to allocate wait_done for | |
687 | * each test iteration and perform "who's gonna | |
688 | * free it this time?" dancing. For now, just | |
689 | * leave it dangling. | |
690 | */ | |
4076e755 | 691 | dmaengine_unmap_put(um); |
872f05c6 DW |
692 | result("test timed out", total_tests, src_off, dst_off, |
693 | len, 0); | |
e44e0aa3 DW |
694 | failed_tests++; |
695 | continue; | |
19e9f99f | 696 | } else if (status != DMA_COMPLETE) { |
4076e755 | 697 | dmaengine_unmap_put(um); |
872f05c6 DW |
698 | result(status == DMA_ERROR ? |
699 | "completion error status" : | |
700 | "completion busy status", total_tests, src_off, | |
701 | dst_off, len, ret); | |
4a776f0a HS |
702 | failed_tests++; |
703 | continue; | |
704 | } | |
e44e0aa3 | 705 | |
4076e755 | 706 | dmaengine_unmap_put(um); |
4a776f0a | 707 | |
e3b9c347 | 708 | if (params->noverify) { |
50137a7d DW |
709 | verbose_result("test passed", total_tests, src_off, |
710 | dst_off, len, 0); | |
e3b9c347 DW |
711 | continue; |
712 | } | |
4a776f0a | 713 | |
e9405ef0 | 714 | start = ktime_get(); |
872f05c6 | 715 | pr_debug("%s: verifying source buffer...\n", current->comm); |
e3b9c347 | 716 | error_count = dmatest_verify(thread->srcs, 0, src_off, |
4a776f0a | 717 | 0, PATTERN_SRC, true); |
7b610178 DW |
718 | error_count += dmatest_verify(thread->srcs, src_off, |
719 | src_off + len, src_off, | |
720 | PATTERN_SRC | PATTERN_COPY, true); | |
721 | error_count += dmatest_verify(thread->srcs, src_off + len, | |
722 | params->buf_size, src_off + len, | |
723 | PATTERN_SRC, true); | |
724 | ||
872f05c6 | 725 | pr_debug("%s: verifying dest buffer...\n", current->comm); |
7b610178 | 726 | error_count += dmatest_verify(thread->dsts, 0, dst_off, |
4a776f0a | 727 | 0, PATTERN_DST, false); |
7b610178 DW |
728 | error_count += dmatest_verify(thread->dsts, dst_off, |
729 | dst_off + len, src_off, | |
730 | PATTERN_SRC | PATTERN_COPY, false); | |
731 | error_count += dmatest_verify(thread->dsts, dst_off + len, | |
732 | params->buf_size, dst_off + len, | |
733 | PATTERN_DST, false); | |
4a776f0a | 734 | |
e9405ef0 SK |
735 | diff = ktime_sub(ktime_get(), start); |
736 | comparetime = ktime_add(comparetime, diff); | |
737 | ||
4a776f0a | 738 | if (error_count) { |
872f05c6 DW |
739 | result("data error", total_tests, src_off, dst_off, |
740 | len, error_count); | |
4a776f0a HS |
741 | failed_tests++; |
742 | } else { | |
50137a7d DW |
743 | verbose_result("test passed", total_tests, src_off, |
744 | dst_off, len, 0); | |
4a776f0a HS |
745 | } |
746 | } | |
e9405ef0 SK |
747 | ktime = ktime_sub(ktime_get(), ktime); |
748 | ktime = ktime_sub(ktime, comparetime); | |
749 | ktime = ktime_sub(ktime, filltime); | |
750 | runtime = ktime_to_us(ktime); | |
4a776f0a HS |
751 | |
752 | ret = 0; | |
8e1f50d7 | 753 | err_dstbuf: |
d6481608 DJ |
754 | for (i = 0; thread->udsts[i]; i++) |
755 | kfree(thread->udsts[i]); | |
756 | kfree(thread->udsts); | |
757 | err_udsts: | |
b54d5cb9 DW |
758 | kfree(thread->dsts); |
759 | err_dsts: | |
8e1f50d7 | 760 | err_srcbuf: |
d6481608 DJ |
761 | for (i = 0; thread->usrcs[i]; i++) |
762 | kfree(thread->usrcs[i]); | |
763 | kfree(thread->usrcs); | |
764 | err_usrcs: | |
b54d5cb9 DW |
765 | kfree(thread->srcs); |
766 | err_srcs: | |
945b5af3 AS |
767 | kfree(pq_coefs); |
768 | err_thread_type: | |
86727443 DW |
769 | pr_info("%s: summary %u tests, %u failures %llu iops %llu KB/s (%d)\n", |
770 | current->comm, total_tests, failed_tests, | |
771 | dmatest_persec(runtime, total_tests), | |
772 | dmatest_KBs(runtime, total_len), ret); | |
0a2ff57d | 773 | |
9704efaa | 774 | /* terminate all transfers on specified channels */ |
5e034f7b SH |
775 | if (ret) |
776 | dmaengine_terminate_all(chan); | |
777 | ||
3e5ccd86 | 778 | thread->done = true; |
2d88ce76 | 779 | wake_up(&thread_wait); |
0a2ff57d | 780 | |
4a776f0a HS |
781 | return ret; |
782 | } | |
783 | ||
784 | static void dmatest_cleanup_channel(struct dmatest_chan *dtc) | |
785 | { | |
786 | struct dmatest_thread *thread; | |
787 | struct dmatest_thread *_thread; | |
788 | int ret; | |
789 | ||
790 | list_for_each_entry_safe(thread, _thread, &dtc->threads, node) { | |
791 | ret = kthread_stop(thread->task); | |
0adff800 DW |
792 | pr_debug("thread %s exited with status %d\n", |
793 | thread->task->comm, ret); | |
4a776f0a | 794 | list_del(&thread->node); |
2d88ce76 | 795 | put_task_struct(thread->task); |
4a776f0a HS |
796 | kfree(thread); |
797 | } | |
9704efaa VK |
798 | |
799 | /* terminate all transfers on specified channels */ | |
944ea4dd | 800 | dmaengine_terminate_all(dtc->chan); |
9704efaa | 801 | |
4a776f0a HS |
802 | kfree(dtc); |
803 | } | |
804 | ||
e03e93a9 AS |
805 | static int dmatest_add_threads(struct dmatest_info *info, |
806 | struct dmatest_chan *dtc, enum dma_transaction_type type) | |
4a776f0a | 807 | { |
15b8a8ea | 808 | struct dmatest_params *params = &info->params; |
b54d5cb9 DW |
809 | struct dmatest_thread *thread; |
810 | struct dma_chan *chan = dtc->chan; | |
811 | char *op; | |
812 | unsigned int i; | |
4a776f0a | 813 | |
b54d5cb9 DW |
814 | if (type == DMA_MEMCPY) |
815 | op = "copy"; | |
a0d4cb44 KA |
816 | else if (type == DMA_SG) |
817 | op = "sg"; | |
b54d5cb9 DW |
818 | else if (type == DMA_XOR) |
819 | op = "xor"; | |
58691d64 DW |
820 | else if (type == DMA_PQ) |
821 | op = "pq"; | |
b54d5cb9 DW |
822 | else |
823 | return -EINVAL; | |
4a776f0a | 824 | |
15b8a8ea | 825 | for (i = 0; i < params->threads_per_chan; i++) { |
4a776f0a HS |
826 | thread = kzalloc(sizeof(struct dmatest_thread), GFP_KERNEL); |
827 | if (!thread) { | |
0adff800 DW |
828 | pr_warn("No memory for %s-%s%u\n", |
829 | dma_chan_name(chan), op, i); | |
4a776f0a HS |
830 | break; |
831 | } | |
e03e93a9 | 832 | thread->info = info; |
4a776f0a | 833 | thread->chan = dtc->chan; |
b54d5cb9 | 834 | thread->type = type; |
4a776f0a | 835 | smp_wmb(); |
2d88ce76 | 836 | thread->task = kthread_create(dmatest_func, thread, "%s-%s%u", |
b54d5cb9 | 837 | dma_chan_name(chan), op, i); |
4a776f0a | 838 | if (IS_ERR(thread->task)) { |
2d88ce76 | 839 | pr_warn("Failed to create thread %s-%s%u\n", |
0adff800 | 840 | dma_chan_name(chan), op, i); |
4a776f0a HS |
841 | kfree(thread); |
842 | break; | |
843 | } | |
844 | ||
845 | /* srcbuf and dstbuf are allocated by the thread itself */ | |
2d88ce76 | 846 | get_task_struct(thread->task); |
4a776f0a | 847 | list_add_tail(&thread->node, &dtc->threads); |
2d88ce76 | 848 | wake_up_process(thread->task); |
4a776f0a HS |
849 | } |
850 | ||
b54d5cb9 DW |
851 | return i; |
852 | } | |
853 | ||
e03e93a9 AS |
854 | static int dmatest_add_channel(struct dmatest_info *info, |
855 | struct dma_chan *chan) | |
b54d5cb9 DW |
856 | { |
857 | struct dmatest_chan *dtc; | |
858 | struct dma_device *dma_dev = chan->device; | |
859 | unsigned int thread_count = 0; | |
b9033e68 | 860 | int cnt; |
b54d5cb9 DW |
861 | |
862 | dtc = kmalloc(sizeof(struct dmatest_chan), GFP_KERNEL); | |
863 | if (!dtc) { | |
0adff800 | 864 | pr_warn("No memory for %s\n", dma_chan_name(chan)); |
b54d5cb9 DW |
865 | return -ENOMEM; |
866 | } | |
867 | ||
868 | dtc->chan = chan; | |
869 | INIT_LIST_HEAD(&dtc->threads); | |
870 | ||
871 | if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) { | |
a0d4cb44 KA |
872 | if (dmatest == 0) { |
873 | cnt = dmatest_add_threads(info, dtc, DMA_MEMCPY); | |
874 | thread_count += cnt > 0 ? cnt : 0; | |
875 | } | |
b54d5cb9 | 876 | } |
a0d4cb44 KA |
877 | |
878 | if (dma_has_cap(DMA_SG, dma_dev->cap_mask)) { | |
879 | if (dmatest == 1) { | |
880 | cnt = dmatest_add_threads(info, dtc, DMA_SG); | |
881 | thread_count += cnt > 0 ? cnt : 0; | |
882 | } | |
883 | } | |
884 | ||
b54d5cb9 | 885 | if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) { |
e03e93a9 | 886 | cnt = dmatest_add_threads(info, dtc, DMA_XOR); |
f1aef8b6 | 887 | thread_count += cnt > 0 ? cnt : 0; |
b54d5cb9 | 888 | } |
58691d64 | 889 | if (dma_has_cap(DMA_PQ, dma_dev->cap_mask)) { |
e03e93a9 | 890 | cnt = dmatest_add_threads(info, dtc, DMA_PQ); |
d07a74a5 | 891 | thread_count += cnt > 0 ? cnt : 0; |
58691d64 | 892 | } |
b54d5cb9 | 893 | |
0adff800 | 894 | pr_info("Started %u threads using %s\n", |
b54d5cb9 | 895 | thread_count, dma_chan_name(chan)); |
4a776f0a | 896 | |
838cc704 AS |
897 | list_add_tail(&dtc->node, &info->channels); |
898 | info->nr_channels++; | |
4a776f0a | 899 | |
33df8ca0 | 900 | return 0; |
4a776f0a HS |
901 | } |
902 | ||
7dd60251 | 903 | static bool filter(struct dma_chan *chan, void *param) |
4a776f0a | 904 | { |
15b8a8ea | 905 | struct dmatest_params *params = param; |
e03e93a9 | 906 | |
15b8a8ea AS |
907 | if (!dmatest_match_channel(params, chan) || |
908 | !dmatest_match_device(params, chan->device)) | |
7dd60251 | 909 | return false; |
33df8ca0 | 910 | else |
7dd60251 | 911 | return true; |
4a776f0a HS |
912 | } |
913 | ||
a9e55495 DW |
914 | static void request_channels(struct dmatest_info *info, |
915 | enum dma_transaction_type type) | |
4a776f0a | 916 | { |
33df8ca0 | 917 | dma_cap_mask_t mask; |
33df8ca0 DW |
918 | |
919 | dma_cap_zero(mask); | |
a9e55495 | 920 | dma_cap_set(type, mask); |
33df8ca0 | 921 | for (;;) { |
a9e55495 DW |
922 | struct dmatest_params *params = &info->params; |
923 | struct dma_chan *chan; | |
924 | ||
15b8a8ea | 925 | chan = dma_request_channel(mask, filter, params); |
33df8ca0 | 926 | if (chan) { |
a9e55495 | 927 | if (dmatest_add_channel(info, chan)) { |
33df8ca0 DW |
928 | dma_release_channel(chan); |
929 | break; /* add_channel failed, punt */ | |
930 | } | |
931 | } else | |
932 | break; /* no more channels available */ | |
15b8a8ea AS |
933 | if (params->max_channels && |
934 | info->nr_channels >= params->max_channels) | |
33df8ca0 DW |
935 | break; /* we have all we need */ |
936 | } | |
4a776f0a | 937 | } |
4a776f0a | 938 | |
a9e55495 | 939 | static void run_threaded_test(struct dmatest_info *info) |
851b7e16 | 940 | { |
a9e55495 | 941 | struct dmatest_params *params = &info->params; |
851b7e16 | 942 | |
a9e55495 DW |
943 | /* Copy test parameters */ |
944 | params->buf_size = test_buf_size; | |
945 | strlcpy(params->channel, strim(test_channel), sizeof(params->channel)); | |
946 | strlcpy(params->device, strim(test_device), sizeof(params->device)); | |
947 | params->threads_per_chan = threads_per_chan; | |
948 | params->max_channels = max_channels; | |
949 | params->iterations = iterations; | |
950 | params->xor_sources = xor_sources; | |
951 | params->pq_sources = pq_sources; | |
952 | params->timeout = timeout; | |
e3b9c347 | 953 | params->noverify = noverify; |
a9e55495 DW |
954 | |
955 | request_channels(info, DMA_MEMCPY); | |
956 | request_channels(info, DMA_XOR); | |
a0d4cb44 | 957 | request_channels(info, DMA_SG); |
a9e55495 | 958 | request_channels(info, DMA_PQ); |
851b7e16 | 959 | } |
851b7e16 | 960 | |
a310d037 | 961 | static void stop_threaded_test(struct dmatest_info *info) |
4a776f0a | 962 | { |
33df8ca0 | 963 | struct dmatest_chan *dtc, *_dtc; |
7cbd4877 | 964 | struct dma_chan *chan; |
33df8ca0 | 965 | |
838cc704 | 966 | list_for_each_entry_safe(dtc, _dtc, &info->channels, node) { |
33df8ca0 | 967 | list_del(&dtc->node); |
7cbd4877 | 968 | chan = dtc->chan; |
33df8ca0 | 969 | dmatest_cleanup_channel(dtc); |
0adff800 | 970 | pr_debug("dropped channel %s\n", dma_chan_name(chan)); |
7cbd4877 | 971 | dma_release_channel(chan); |
33df8ca0 | 972 | } |
838cc704 AS |
973 | |
974 | info->nr_channels = 0; | |
4a776f0a | 975 | } |
e03e93a9 | 976 | |
a9e55495 | 977 | static void restart_threaded_test(struct dmatest_info *info, bool run) |
851b7e16 | 978 | { |
a310d037 DW |
979 | /* we might be called early to set run=, defer running until all |
980 | * parameters have been evaluated | |
981 | */ | |
982 | if (!info->did_init) | |
a9e55495 | 983 | return; |
851b7e16 AS |
984 | |
985 | /* Stop any running test first */ | |
a310d037 | 986 | stop_threaded_test(info); |
851b7e16 AS |
987 | |
988 | /* Run test with new parameters */ | |
a9e55495 | 989 | run_threaded_test(info); |
851b7e16 AS |
990 | } |
991 | ||
a310d037 | 992 | static int dmatest_run_get(char *val, const struct kernel_param *kp) |
851b7e16 | 993 | { |
a310d037 | 994 | struct dmatest_info *info = &test_info; |
851b7e16 AS |
995 | |
996 | mutex_lock(&info->lock); | |
a310d037 DW |
997 | if (is_threaded_test_run(info)) { |
998 | dmatest_run = true; | |
3e5ccd86 | 999 | } else { |
a310d037 DW |
1000 | stop_threaded_test(info); |
1001 | dmatest_run = false; | |
3e5ccd86 | 1002 | } |
851b7e16 | 1003 | mutex_unlock(&info->lock); |
851b7e16 | 1004 | |
a310d037 | 1005 | return param_get_bool(val, kp); |
851b7e16 AS |
1006 | } |
1007 | ||
a310d037 | 1008 | static int dmatest_run_set(const char *val, const struct kernel_param *kp) |
95019c8c | 1009 | { |
a310d037 DW |
1010 | struct dmatest_info *info = &test_info; |
1011 | int ret; | |
95019c8c | 1012 | |
a310d037 DW |
1013 | mutex_lock(&info->lock); |
1014 | ret = param_set_bool(val, kp); | |
1015 | if (ret) { | |
851b7e16 | 1016 | mutex_unlock(&info->lock); |
a310d037 | 1017 | return ret; |
95019c8c AS |
1018 | } |
1019 | ||
a310d037 DW |
1020 | if (is_threaded_test_run(info)) |
1021 | ret = -EBUSY; | |
1022 | else if (dmatest_run) | |
a9e55495 | 1023 | restart_threaded_test(info, dmatest_run); |
851b7e16 | 1024 | |
a310d037 | 1025 | mutex_unlock(&info->lock); |
851b7e16 | 1026 | |
a310d037 | 1027 | return ret; |
851b7e16 AS |
1028 | } |
1029 | ||
e03e93a9 AS |
1030 | static int __init dmatest_init(void) |
1031 | { | |
1032 | struct dmatest_info *info = &test_info; | |
2d88ce76 | 1033 | struct dmatest_params *params = &info->params; |
e03e93a9 | 1034 | |
a310d037 DW |
1035 | if (dmatest_run) { |
1036 | mutex_lock(&info->lock); | |
a9e55495 | 1037 | run_threaded_test(info); |
a310d037 DW |
1038 | mutex_unlock(&info->lock); |
1039 | } | |
838cc704 | 1040 | |
2d88ce76 DW |
1041 | if (params->iterations && wait) |
1042 | wait_event(thread_wait, !is_threaded_test_run(info)); | |
95019c8c | 1043 | |
a310d037 DW |
1044 | /* module parameters are stable, inittime tests are started, |
1045 | * let userspace take over 'run' control | |
1046 | */ | |
1047 | info->did_init = true; | |
851b7e16 | 1048 | |
851b7e16 | 1049 | return 0; |
e03e93a9 AS |
1050 | } |
1051 | /* when compiled-in wait for drivers to load first */ | |
1052 | late_initcall(dmatest_init); | |
1053 | ||
1054 | static void __exit dmatest_exit(void) | |
1055 | { | |
1056 | struct dmatest_info *info = &test_info; | |
1057 | ||
a310d037 | 1058 | mutex_lock(&info->lock); |
e03e93a9 | 1059 | stop_threaded_test(info); |
a310d037 | 1060 | mutex_unlock(&info->lock); |
e03e93a9 | 1061 | } |
4a776f0a HS |
1062 | module_exit(dmatest_exit); |
1063 | ||
e05503ef | 1064 | MODULE_AUTHOR("Haavard Skinnemoen (Atmel)"); |
4a776f0a | 1065 | MODULE_LICENSE("GPL v2"); |