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ead6db08 MG |
1 | /* |
2 | * 74Hx164 - Generic serial-in/parallel-out 8-bits shift register GPIO driver | |
3 | * | |
4 | * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org> | |
5 | * Copyright (C) 2010 Miguel Gaio <miguel.gaio@efixo.com> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
12 | #include <linux/init.h> | |
13 | #include <linux/mutex.h> | |
14 | #include <linux/spi/spi.h> | |
ead6db08 | 15 | #include <linux/gpio.h> |
20bc4d5d | 16 | #include <linux/of_gpio.h> |
ead6db08 | 17 | #include <linux/slab.h> |
bb207ef1 | 18 | #include <linux/module.h> |
ead6db08 | 19 | |
20bc4d5d MR |
20 | #define GEN_74X164_NUMBER_GPIOS 8 |
21 | ||
ead6db08 | 22 | struct gen_74x164_chip { |
ead6db08 MG |
23 | struct gpio_chip gpio_chip; |
24 | struct mutex lock; | |
20bc4d5d | 25 | u32 registers; |
902e7e60 GU |
26 | /* |
27 | * Since the registers are chained, every byte sent will make | |
28 | * the previous byte shift to the next register in the | |
29 | * chain. Thus, the first byte sent will end up in the last | |
30 | * register at the end of the transfer. So, to have a logical | |
31 | * numbering, store the bytes in reverse order. | |
32 | */ | |
410f4574 | 33 | u8 buffer[0]; |
ead6db08 MG |
34 | }; |
35 | ||
ead6db08 MG |
36 | static int __gen_74x164_write_config(struct gen_74x164_chip *chip) |
37 | { | |
771d899a GU |
38 | return spi_write(to_spi_device(chip->gpio_chip.parent), chip->buffer, |
39 | chip->registers); | |
ead6db08 MG |
40 | } |
41 | ||
ead6db08 MG |
42 | static int gen_74x164_get_value(struct gpio_chip *gc, unsigned offset) |
43 | { | |
b2afc6f3 | 44 | struct gen_74x164_chip *chip = gpiochip_get_data(gc); |
902e7e60 | 45 | u8 bank = chip->registers - 1 - offset / 8; |
20bc4d5d | 46 | u8 pin = offset % 8; |
ead6db08 MG |
47 | int ret; |
48 | ||
49 | mutex_lock(&chip->lock); | |
20bc4d5d | 50 | ret = (chip->buffer[bank] >> pin) & 0x1; |
ead6db08 MG |
51 | mutex_unlock(&chip->lock); |
52 | ||
53 | return ret; | |
54 | } | |
55 | ||
56 | static void gen_74x164_set_value(struct gpio_chip *gc, | |
57 | unsigned offset, int val) | |
58 | { | |
b2afc6f3 | 59 | struct gen_74x164_chip *chip = gpiochip_get_data(gc); |
902e7e60 | 60 | u8 bank = chip->registers - 1 - offset / 8; |
20bc4d5d | 61 | u8 pin = offset % 8; |
ead6db08 MG |
62 | |
63 | mutex_lock(&chip->lock); | |
64 | if (val) | |
20bc4d5d | 65 | chip->buffer[bank] |= (1 << pin); |
ead6db08 | 66 | else |
20bc4d5d | 67 | chip->buffer[bank] &= ~(1 << pin); |
ead6db08 MG |
68 | |
69 | __gen_74x164_write_config(chip); | |
70 | mutex_unlock(&chip->lock); | |
71 | } | |
72 | ||
d46ab682 GU |
73 | static void gen_74x164_set_multiple(struct gpio_chip *gc, unsigned long *mask, |
74 | unsigned long *bits) | |
75 | { | |
76 | struct gen_74x164_chip *chip = gpiochip_get_data(gc); | |
77 | unsigned int i, idx, shift; | |
78 | u8 bank, bankmask; | |
79 | ||
80 | mutex_lock(&chip->lock); | |
81 | for (i = 0, bank = chip->registers - 1; i < chip->registers; | |
82 | i++, bank--) { | |
83 | idx = i / sizeof(*mask); | |
84 | shift = i % sizeof(*mask) * BITS_PER_BYTE; | |
85 | bankmask = mask[idx] >> shift; | |
86 | if (!bankmask) | |
87 | continue; | |
88 | ||
89 | chip->buffer[bank] &= ~bankmask; | |
90 | chip->buffer[bank] |= bankmask & (bits[idx] >> shift); | |
91 | } | |
92 | __gen_74x164_write_config(chip); | |
93 | mutex_unlock(&chip->lock); | |
94 | } | |
95 | ||
a3cc68c3 HS |
96 | static int gen_74x164_direction_output(struct gpio_chip *gc, |
97 | unsigned offset, int val) | |
98 | { | |
99 | gen_74x164_set_value(gc, offset, val); | |
100 | return 0; | |
101 | } | |
102 | ||
3836309d | 103 | static int gen_74x164_probe(struct spi_device *spi) |
ead6db08 MG |
104 | { |
105 | struct gen_74x164_chip *chip; | |
410f4574 | 106 | u32 nregs; |
ead6db08 MG |
107 | int ret; |
108 | ||
ead6db08 MG |
109 | /* |
110 | * bits_per_word cannot be configured in platform data | |
111 | */ | |
112 | spi->bits_per_word = 8; | |
113 | ||
114 | ret = spi_setup(spi); | |
115 | if (ret < 0) | |
116 | return ret; | |
117 | ||
410f4574 GU |
118 | if (of_property_read_u32(spi->dev.of_node, "registers-number", |
119 | &nregs)) { | |
120 | dev_err(&spi->dev, | |
121 | "Missing registers-number property in the DT.\n"); | |
122 | return -EINVAL; | |
123 | } | |
124 | ||
125 | chip = devm_kzalloc(&spi->dev, sizeof(*chip) + nregs, GFP_KERNEL); | |
ead6db08 MG |
126 | if (!chip) |
127 | return -ENOMEM; | |
128 | ||
6c0cf42b | 129 | spi_set_drvdata(spi, chip); |
ead6db08 | 130 | |
a3cc68c3 HS |
131 | chip->gpio_chip.label = spi->modalias; |
132 | chip->gpio_chip.direction_output = gen_74x164_direction_output; | |
ead6db08 MG |
133 | chip->gpio_chip.get = gen_74x164_get_value; |
134 | chip->gpio_chip.set = gen_74x164_set_value; | |
d46ab682 | 135 | chip->gpio_chip.set_multiple = gen_74x164_set_multiple; |
61e73804 | 136 | chip->gpio_chip.base = -1; |
20bc4d5d | 137 | |
410f4574 | 138 | chip->registers = nregs; |
20bc4d5d | 139 | chip->gpio_chip.ngpio = GEN_74X164_NUMBER_GPIOS * chip->registers; |
20bc4d5d | 140 | |
9fb1f39e | 141 | chip->gpio_chip.can_sleep = true; |
58383c78 | 142 | chip->gpio_chip.parent = &spi->dev; |
ead6db08 MG |
143 | chip->gpio_chip.owner = THIS_MODULE; |
144 | ||
bcc0562c AS |
145 | mutex_init(&chip->lock); |
146 | ||
ead6db08 MG |
147 | ret = __gen_74x164_write_config(chip); |
148 | if (ret) { | |
149 | dev_err(&spi->dev, "Failed writing: %d\n", ret); | |
150 | goto exit_destroy; | |
151 | } | |
152 | ||
b2afc6f3 | 153 | ret = gpiochip_add_data(&chip->gpio_chip, chip); |
bcc0562c AS |
154 | if (!ret) |
155 | return 0; | |
ead6db08 MG |
156 | |
157 | exit_destroy: | |
ead6db08 | 158 | mutex_destroy(&chip->lock); |
bcc0562c | 159 | |
ead6db08 MG |
160 | return ret; |
161 | } | |
162 | ||
206210ce | 163 | static int gen_74x164_remove(struct spi_device *spi) |
ead6db08 | 164 | { |
bcc0562c | 165 | struct gen_74x164_chip *chip = spi_get_drvdata(spi); |
ead6db08 | 166 | |
9f5132ae | 167 | gpiochip_remove(&chip->gpio_chip); |
168 | mutex_destroy(&chip->lock); | |
ead6db08 | 169 | |
9f5132ae | 170 | return 0; |
ead6db08 MG |
171 | } |
172 | ||
0a90a9fb MR |
173 | static const struct of_device_id gen_74x164_dt_ids[] = { |
174 | { .compatible = "fairchild,74hc595" }, | |
80018bd9 | 175 | { .compatible = "nxp,74lvc594" }, |
0a90a9fb MR |
176 | {}, |
177 | }; | |
178 | MODULE_DEVICE_TABLE(of, gen_74x164_dt_ids); | |
179 | ||
ead6db08 MG |
180 | static struct spi_driver gen_74x164_driver = { |
181 | .driver = { | |
a3cc68c3 | 182 | .name = "74x164", |
187a53a5 | 183 | .of_match_table = gen_74x164_dt_ids, |
ead6db08 MG |
184 | }, |
185 | .probe = gen_74x164_probe, | |
8283c4ff | 186 | .remove = gen_74x164_remove, |
ead6db08 | 187 | }; |
ab3b8782 | 188 | module_spi_driver(gen_74x164_driver); |
ead6db08 MG |
189 | |
190 | MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>"); | |
191 | MODULE_AUTHOR("Miguel Gaio <miguel.gaio@efixo.com>"); | |
192 | MODULE_DESCRIPTION("GPIO expander driver for 74X164 8-bits shift register"); | |
193 | MODULE_LICENSE("GPL v2"); |