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Commit | Line | Data |
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4562236b HW |
1 | /* |
2 | * link_encoder.h | |
3 | * | |
4 | * Created on: Oct 6, 2015 | |
5 | * Author: yonsun | |
6 | */ | |
7 | ||
8 | #ifndef LINK_ENCODER_H_ | |
9 | #define LINK_ENCODER_H_ | |
10 | ||
11 | #include "grph_object_defs.h" | |
12 | #include "signal_types.h" | |
13 | #include "dc_types.h" | |
14 | ||
15 | struct dc_context; | |
16 | struct encoder_set_dp_phy_pattern_param; | |
17 | struct link_mst_stream_allocation_table; | |
18 | struct dc_link_settings; | |
19 | struct link_training_settings; | |
4562236b HW |
20 | struct pipe_ctx; |
21 | ||
22 | struct encoder_init_data { | |
23 | enum channel_id channel; | |
24 | struct graphics_object_id connector; | |
25 | enum hpd_source_id hpd_source; | |
26 | /* TODO: in DAL2, here was pointer to EventManagerInterface */ | |
27 | struct graphics_object_id encoder; | |
28 | struct dc_context *ctx; | |
29 | enum transmitter transmitter; | |
30 | }; | |
31 | ||
32 | struct encoder_feature_support { | |
33 | union { | |
34 | struct { | |
4562236b HW |
35 | uint32_t IS_HBR2_CAPABLE:1; |
36 | uint32_t IS_HBR3_CAPABLE:1; | |
4562236b HW |
37 | uint32_t IS_TPS3_CAPABLE:1; |
38 | uint32_t IS_TPS4_CAPABLE:1; | |
4562236b HW |
39 | uint32_t IS_YCBCR_CAPABLE:1; |
40 | } bits; | |
41 | uint32_t raw; | |
42 | } flags; | |
4dfb0bad | 43 | |
4562236b | 44 | enum dc_color_depth max_hdmi_deep_color; |
4562236b HW |
45 | unsigned int max_hdmi_pixel_clock; |
46 | bool ycbcr420_supported; | |
47 | }; | |
48 | ||
4562236b HW |
49 | union dpcd_psr_configuration { |
50 | struct { | |
51 | unsigned char ENABLE : 1; | |
52 | unsigned char TRANSMITTER_ACTIVE_IN_PSR : 1; | |
53 | unsigned char CRC_VERIFICATION : 1; | |
54 | unsigned char FRAME_CAPTURE_INDICATION : 1; | |
55 | /* For eDP 1.4, PSR v2*/ | |
56 | unsigned char LINE_CAPTURE_INDICATION : 1; | |
57 | /* For eDP 1.4, PSR v2*/ | |
58 | unsigned char IRQ_HPD_WITH_CRC_ERROR : 1; | |
59 | unsigned char RESERVED : 2; | |
60 | } bits; | |
61 | unsigned char raw; | |
62 | }; | |
63 | ||
64 | union psr_error_status { | |
65 | struct { | |
66 | unsigned char LINK_CRC_ERROR :1; | |
67 | unsigned char RFB_STORAGE_ERROR :1; | |
68 | unsigned char RESERVED :6; | |
69 | } bits; | |
70 | unsigned char raw; | |
71 | }; | |
72 | ||
73 | union psr_sink_psr_status { | |
74 | struct { | |
75 | unsigned char SINK_SELF_REFRESH_STATUS :3; | |
76 | unsigned char RESERVED :5; | |
77 | } bits; | |
78 | unsigned char raw; | |
79 | }; | |
80 | ||
4562236b HW |
81 | struct link_encoder { |
82 | const struct link_encoder_funcs *funcs; | |
83 | int32_t aux_channel_offset; | |
84 | struct dc_context *ctx; | |
85 | struct graphics_object_id id; | |
86 | struct graphics_object_id connector; | |
4562236b HW |
87 | uint32_t output_signals; |
88 | enum engine_id preferred_engine; | |
89 | struct encoder_feature_support features; | |
90 | enum transmitter transmitter; | |
91 | enum hpd_source_id hpd_source; | |
92 | }; | |
93 | ||
94 | struct link_encoder_funcs { | |
95 | bool (*validate_output_with_stream)( | |
0971c40e | 96 | struct link_encoder *enc, const struct dc_stream_state *stream); |
4562236b HW |
97 | void (*hw_init)(struct link_encoder *enc); |
98 | void (*setup)(struct link_encoder *enc, | |
99 | enum signal_type signal); | |
100 | void (*enable_tmds_output)(struct link_encoder *enc, | |
101 | enum clock_source_id clock_source, | |
102 | enum dc_color_depth color_depth, | |
103 | bool hdmi, | |
104 | bool dual_link, | |
105 | uint32_t pixel_clock); | |
106 | void (*enable_dp_output)(struct link_encoder *enc, | |
107 | const struct dc_link_settings *link_settings, | |
108 | enum clock_source_id clock_source); | |
109 | void (*enable_dp_mst_output)(struct link_encoder *enc, | |
110 | const struct dc_link_settings *link_settings, | |
111 | enum clock_source_id clock_source); | |
112 | void (*disable_output)(struct link_encoder *link_enc, | |
113 | enum signal_type signal); | |
114 | void (*dp_set_lane_settings)(struct link_encoder *enc, | |
115 | const struct link_training_settings *link_settings); | |
116 | void (*dp_set_phy_pattern)(struct link_encoder *enc, | |
117 | const struct encoder_set_dp_phy_pattern_param *para); | |
118 | void (*update_mst_stream_allocation_table)( | |
119 | struct link_encoder *enc, | |
120 | const struct link_mst_stream_allocation_table *table); | |
3548f073 AZ |
121 | void (*psr_program_dp_dphy_fast_training)(struct link_encoder *enc, |
122 | bool exit_link_training_required); | |
123 | void (*psr_program_secondary_packet)(struct link_encoder *enc, | |
124 | unsigned int sdp_transmit_line_num_deadline); | |
4562236b HW |
125 | void (*backlight_control) (struct link_encoder *enc, |
126 | bool enable); | |
127 | void (*power_control) (struct link_encoder *enc, | |
128 | bool power_up); | |
129 | void (*connect_dig_be_to_fe)(struct link_encoder *enc, | |
130 | enum engine_id engine, | |
131 | bool connect); | |
132 | void (*enable_hpd)(struct link_encoder *enc); | |
133 | void (*disable_hpd)(struct link_encoder *enc); | |
134 | void (*destroy)(struct link_encoder **enc); | |
135 | }; | |
136 | ||
137 | #endif /* LINK_ENCODER_H_ */ |