[mirror_ubuntu-bionic-kernel.git] / drivers / gpu / drm / i915 / i915_gem_object.h

/*
 * Copyright © 2016 Intel Corporation
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
 * IN THE SOFTWARE.
 *
 */

#ifndef __I915_GEM_OBJECT_H__
#define __I915_GEM_OBJECT_H__

#include <linux/reservation.h>

#include <drm/drm_vma_manager.h>
#include <drm/drm_gem.h>
#include <drm/drmP.h>

#include <drm/i915_drm.h>

#include "i915_selftest.h"

struct drm_i915_gem_object_ops {
	unsigned int flags;
#define I915_GEM_OBJECT_HAS_STRUCT_PAGE BIT(0)
#define I915_GEM_OBJECT_IS_SHRINKABLE   BIT(1)

	/* Interface between the GEM object and its backing storage.
	 * get_pages() is called once prior to the use of the associated set
	 * of pages before to binding them into the GTT, and put_pages() is
	 * called after we no longer need them. As we expect there to be
	 * associated cost with migrating pages between the backing storage
	 * and making them available for the GPU (e.g. clflush), we may hold
	 * onto the pages after they are no longer referenced by the GPU
	 * in case they may be used again shortly (for example migrating the
	 * pages to a different memory domain within the GTT). put_pages()
	 * will therefore most likely be called when the object itself is
	 * being released or under memory pressure (where we attempt to
	 * reap pages for the shrinker).
	 */
	struct sg_table *(*get_pages)(struct drm_i915_gem_object *);
	void (*put_pages)(struct drm_i915_gem_object *, struct sg_table *);

	int (*pwrite)(struct drm_i915_gem_object *,
		      const struct drm_i915_gem_pwrite *);

	int (*dmabuf_export)(struct drm_i915_gem_object *);
	void (*release)(struct drm_i915_gem_object *);
};

struct drm_i915_gem_object {
	struct drm_gem_object base;

	const struct drm_i915_gem_object_ops *ops;

	/**
	 * @vma_list: List of VMAs backed by this object
	 *
	 * The VMA on this list are ordered by type, all GGTT vma are placed
	 * at the head and all ppGTT vma are placed at the tail. The different
	 * types of GGTT vma are unordered between themselves, use the
	 * @vma_tree (which has a defined order between all VMA) to find an
	 * exact match.
	 */
	struct list_head vma_list;
	/**
	 * @vma_tree: Ordered tree of VMAs backed by this object
	 *
	 * All VMA created for this object are placed in the @vma_tree for
	 * fast retrieval via a binary search in i915_vma_instance().
	 * They are also added to @vma_list for easy iteration.
	 */
	struct rb_root vma_tree;
	struct i915_vma *vma_hashed;

	/** Stolen memory for this object, instead of being backed by shmem. */
	struct drm_mm_node *stolen;
	struct list_head global_link;
	union {
		struct rcu_head rcu;
		struct llist_node freed;
	};

	/**
	 * Whether the object is currently in the GGTT mmap.
	 */
	struct list_head userfault_link;

	struct list_head batch_pool_link;
	I915_SELFTEST_DECLARE(struct list_head st_link);

	unsigned long flags;

	/**
	 * Have we taken a reference for the object for incomplete GPU
	 * activity?
	 */
#define I915_BO_ACTIVE_REF 0

	/*
	 * Is the object to be mapped as read-only to the GPU
	 * Only honoured if hardware has relevant pte bit
	 */
	unsigned long gt_ro:1;
	unsigned int cache_level:3;
	unsigned int cache_dirty:1;
	unsigned int cache_coherent:1;

	atomic_t frontbuffer_bits;
	unsigned int frontbuffer_ggtt_origin; /* write once */
	struct i915_gem_active frontbuffer_write;

	/** Current tiling stride for the object, if it's tiled. */
	unsigned int tiling_and_stride;
#define FENCE_MINIMUM_STRIDE 128 /* See i915_tiling_ok() */
#define TILING_MASK (FENCE_MINIMUM_STRIDE-1)
#define STRIDE_MASK (~TILING_MASK)

	/** Count of VMA actually bound by this object */
	unsigned int bind_count;
	unsigned int active_count;
	unsigned int pin_display;

	struct {
		struct mutex lock; /* protects the pages and their use */
		atomic_t pages_pin_count;

		struct sg_table *pages;
		void *mapping;

		struct i915_gem_object_page_iter {
			struct scatterlist *sg_pos;
			unsigned int sg_idx; /* in pages, but 32bit eek! */

			struct radix_tree_root radix;
			struct mutex lock; /* protects this cache */
		} get_page;

		/**
		 * Advice: are the backing pages purgeable?
		 */
		unsigned int madv:2;

		/**
		 * This is set if the object has been written to since the
		 * pages were last acquired.
		 */
		bool dirty:1;

		/**
		 * This is set if the object has been pinned due to unknown
		 * swizzling.
		 */
		bool quirked:1;
	} mm;

	/** Breadcrumb of last rendering to the buffer.
	 * There can only be one writer, but we allow for multiple readers.
	 * If there is a writer that necessarily implies that all other
	 * read requests are complete - but we may only be lazily clearing
	 * the read requests. A read request is naturally the most recent
	 * request on a ring, so we may have two different write and read
	 * requests on one ring where the write request is older than the
	 * read request. This allows for the CPU to read from an active
	 * buffer by only waiting for the write to complete.
	 */
	struct reservation_object *resv;

	/** References from framebuffers, locks out tiling changes. */
	unsigned int framebuffer_references;

	/** Record of address bit 17 of each page at last unbind. */
	unsigned long *bit_17;

	union {
		struct i915_gem_userptr {
			uintptr_t ptr;
			unsigned read_only :1;

			struct i915_mm_struct *mm;
			struct i915_mmu_object *mmu_object;
			struct work_struct *work;
		} userptr;

		unsigned long scratch;
	};

	/** for phys allocated objects */
	struct drm_dma_handle *phys_handle;

	struct reservation_object __builtin_resv;
};

static inline struct drm_i915_gem_object *
to_intel_bo(struct drm_gem_object *gem)
{
	/* Assert that to_intel_bo(NULL) == NULL */
	BUILD_BUG_ON(offsetof(struct drm_i915_gem_object, base));

	return container_of(gem, struct drm_i915_gem_object, base);
}

/**
 * i915_gem_object_lookup_rcu - look up a temporary GEM object from its handle
 * @filp: DRM file private date
 * @handle: userspace handle
 *
 * Returns:
 *
 * A pointer to the object named by the handle if such exists on @filp, NULL
 * otherwise. This object is only valid whilst under the RCU read lock, and
 * note carefully the object may be in the process of being destroyed.
 */
static inline struct drm_i915_gem_object *
i915_gem_object_lookup_rcu(struct drm_file *file, u32 handle)
{
#ifdef CONFIG_LOCKDEP
	WARN_ON(debug_locks && !lock_is_held(&rcu_lock_map));
#endif
	return idr_find(&file->object_idr, handle);
}

static inline struct drm_i915_gem_object *
i915_gem_object_lookup(struct drm_file *file, u32 handle)
{
	struct drm_i915_gem_object *obj;

	rcu_read_lock();
	obj = i915_gem_object_lookup_rcu(file, handle);
	if (obj && !kref_get_unless_zero(&obj->base.refcount))
		obj = NULL;
	rcu_read_unlock();

	return obj;
}

__deprecated
extern struct drm_gem_object *
drm_gem_object_lookup(struct drm_file *file, u32 handle);

__attribute__((nonnull))
static inline struct drm_i915_gem_object *
i915_gem_object_get(struct drm_i915_gem_object *obj)
{
	drm_gem_object_reference(&obj->base);
	return obj;
}

__deprecated
extern void drm_gem_object_reference(struct drm_gem_object *);

__attribute__((nonnull))
static inline void
i915_gem_object_put(struct drm_i915_gem_object *obj)
{
	__drm_gem_object_unreference(&obj->base);
}

__deprecated
extern void drm_gem_object_unreference(struct drm_gem_object *);

__deprecated
extern void drm_gem_object_unreference_unlocked(struct drm_gem_object *);

static inline void i915_gem_object_lock(struct drm_i915_gem_object *obj)
{
	reservation_object_lock(obj->resv, NULL);
}

static inline void i915_gem_object_unlock(struct drm_i915_gem_object *obj)
{
	reservation_object_unlock(obj->resv);
}

static inline bool
i915_gem_object_has_struct_page(const struct drm_i915_gem_object *obj)
{
	return obj->ops->flags & I915_GEM_OBJECT_HAS_STRUCT_PAGE;
}

static inline bool
i915_gem_object_is_shrinkable(const struct drm_i915_gem_object *obj)
{
	return obj->ops->flags & I915_GEM_OBJECT_IS_SHRINKABLE;
}

static inline bool
i915_gem_object_is_active(const struct drm_i915_gem_object *obj)
{
	return obj->active_count;
}

static inline bool
i915_gem_object_has_active_reference(const struct drm_i915_gem_object *obj)
{
	return test_bit(I915_BO_ACTIVE_REF, &obj->flags);
}

static inline void
i915_gem_object_set_active_reference(struct drm_i915_gem_object *obj)
{
	lockdep_assert_held(&obj->base.dev->struct_mutex);
	__set_bit(I915_BO_ACTIVE_REF, &obj->flags);
}

static inline void
i915_gem_object_clear_active_reference(struct drm_i915_gem_object *obj)
{
	lockdep_assert_held(&obj->base.dev->struct_mutex);
	__clear_bit(I915_BO_ACTIVE_REF, &obj->flags);
}

void __i915_gem_object_release_unless_active(struct drm_i915_gem_object *obj);

static inline bool
i915_gem_object_is_framebuffer(const struct drm_i915_gem_object *obj)
{
	return READ_ONCE(obj->framebuffer_references);
}

static inline unsigned int
i915_gem_object_get_tiling(struct drm_i915_gem_object *obj)
{
	return obj->tiling_and_stride & TILING_MASK;
}

static inline bool
i915_gem_object_is_tiled(struct drm_i915_gem_object *obj)
{
	return i915_gem_object_get_tiling(obj) != I915_TILING_NONE;
}

static inline unsigned int
i915_gem_object_get_stride(struct drm_i915_gem_object *obj)
{
	return obj->tiling_and_stride & STRIDE_MASK;
}

static inline unsigned int
i915_gem_tile_height(unsigned int tiling)
{
	GEM_BUG_ON(!tiling);
	return tiling == I915_TILING_Y ? 32 : 8;
}

static inline unsigned int
i915_gem_object_get_tile_height(struct drm_i915_gem_object *obj)
{
	return i915_gem_tile_height(i915_gem_object_get_tiling(obj));
}

static inline unsigned int
i915_gem_object_get_tile_row_size(struct drm_i915_gem_object *obj)
{
	return (i915_gem_object_get_stride(obj) *
		i915_gem_object_get_tile_height(obj));
}

int i915_gem_object_set_tiling(struct drm_i915_gem_object *obj,
			       unsigned int tiling, unsigned int stride);

static inline struct intel_engine_cs *
i915_gem_object_last_write_engine(struct drm_i915_gem_object *obj)
{
	struct intel_engine_cs *engine = NULL;
	struct dma_fence *fence;

	rcu_read_lock();
	fence = reservation_object_get_excl_rcu(obj->resv);
	rcu_read_unlock();

	if (fence && dma_fence_is_i915(fence) && !dma_fence_is_signaled(fence))
		engine = to_request(fence)->engine;
	dma_fence_put(fence);

	return engine;
}

void i915_gem_object_flush_if_display(struct drm_i915_gem_object *obj);

#endif
Commit	Line	Data
b42fe9ca JL	1	/*
	2	* Copyright © 2016 Intel Corporation
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice (including the next
	12	* paragraph) shall be included in all copies or substantial portions of the
	13	* Software.
	14	*
	15	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	16	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	17	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	18	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	19	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	20	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
	21	* IN THE SOFTWARE.
	22	*
	23	*/
	24
	25	#ifndef __I915_GEM_OBJECT_H__
	26	#define __I915_GEM_OBJECT_H__
	27
	28	#include <linux/reservation.h>
	29
	30	#include <drm/drm_vma_manager.h>
	31	#include <drm/drm_gem.h>
	32	#include <drm/drmP.h>
	33
	34	#include <drm/i915_drm.h>
	35
8d28ba45 CW	36	#include "i915_selftest.h"
8d28ba45 CW	37
b42fe9ca JL	38	struct drm_i915_gem_object_ops {
b42fe9ca JL	39	unsigned int flags;
22284f40 CW	40	#define I915_GEM_OBJECT_HAS_STRUCT_PAGE BIT(0)
22284f40 CW	41	#define I915_GEM_OBJECT_IS_SHRINKABLE BIT(1)
b42fe9ca JL	42
	43	/* Interface between the GEM object and its backing storage.
	44	* get_pages() is called once prior to the use of the associated set
	45	* of pages before to binding them into the GTT, and put_pages() is
	46	* called after we no longer need them. As we expect there to be
	47	* associated cost with migrating pages between the backing storage
	48	* and making them available for the GPU (e.g. clflush), we may hold
	49	* onto the pages after they are no longer referenced by the GPU
	50	* in case they may be used again shortly (for example migrating the
	51	* pages to a different memory domain within the GTT). put_pages()
	52	* will therefore most likely be called when the object itself is
	53	* being released or under memory pressure (where we attempt to
	54	* reap pages for the shrinker).
	55	*/
	56	struct sg_table (get_pages)(struct drm_i915_gem_object *);
	57	void (put_pages)(struct drm_i915_gem_object , struct sg_table *);
	58
7c55e2c5 CW	59	int (pwrite)(struct drm_i915_gem_object ,
	60	const struct drm_i915_gem_pwrite *);
	61
b42fe9ca JL	62	int (dmabuf_export)(struct drm_i915_gem_object );
	63	void (release)(struct drm_i915_gem_object );
	64	};
	65
	66	struct drm_i915_gem_object {
	67	struct drm_gem_object base;
	68
	69	const struct drm_i915_gem_object_ops *ops;
	70
b5a82425 CW	71	/**
	72	* @vma_list: List of VMAs backed by this object
	73	*
	74	* The VMA on this list are ordered by type, all GGTT vma are placed
	75	* at the head and all ppGTT vma are placed at the tail. The different
	76	* types of GGTT vma are unordered between themselves, use the
	77	* @vma_tree (which has a defined order between all VMA) to find an
	78	* exact match.
	79	*/
b42fe9ca	80	struct list_head vma_list;
b5a82425 CW	81	/**
	82	* @vma_tree: Ordered tree of VMAs backed by this object
	83	*
	84	* All VMA created for this object are placed in the @vma_tree for
	85	* fast retrieval via a binary search in i915_vma_instance().
	86	* They are also added to @vma_list for easy iteration.
	87	*/
b42fe9ca	88	struct rb_root vma_tree;
4ff4b44c	89	struct i915_vma *vma_hashed;
b42fe9ca JL	90
	91	/** Stolen memory for this object, instead of being backed by shmem. */
	92	struct drm_mm_node *stolen;
	93	struct list_head global_link;
	94	union {
	95	struct rcu_head rcu;
	96	struct llist_node freed;
	97	};
	98
	99	/**
	100	* Whether the object is currently in the GGTT mmap.
	101	*/
	102	struct list_head userfault_link;
	103
b42fe9ca	104	struct list_head batch_pool_link;
8d28ba45	105	I915_SELFTEST_DECLARE(struct list_head st_link);
b42fe9ca JL	106
	107	unsigned long flags;
	108
	109	/**
	110	* Have we taken a reference for the object for incomplete GPU
	111	* activity?
	112	*/
	113	#define I915_BO_ACTIVE_REF 0
	114
	115	/*
	116	* Is the object to be mapped as read-only to the GPU
	117	* Only honoured if hardware has relevant pte bit
	118	*/
	119	unsigned long gt_ro:1;
	120	unsigned int cache_level:3;
	121	unsigned int cache_dirty:1;
7fc92e96	122	unsigned int cache_coherent:1;
b42fe9ca JL	123
	124	atomic_t frontbuffer_bits;
	125	unsigned int frontbuffer_ggtt_origin; /* write once */
5b8c8aec	126	struct i915_gem_active frontbuffer_write;
b42fe9ca JL	127
	128	/** Current tiling stride for the object, if it's tiled. */
	129	unsigned int tiling_and_stride;
	130	#define FENCE_MINIMUM_STRIDE 128 /* See i915_tiling_ok() */
	131	#define TILING_MASK (FENCE_MINIMUM_STRIDE-1)
	132	#define STRIDE_MASK (~TILING_MASK)
	133
	134	/** Count of VMA actually bound by this object */
	135	unsigned int bind_count;
	136	unsigned int active_count;
	137	unsigned int pin_display;
	138
	139	struct {
	140	struct mutex lock; /* protects the pages and their use */
	141	atomic_t pages_pin_count;
	142
	143	struct sg_table *pages;
	144	void *mapping;
	145
	146	struct i915_gem_object_page_iter {
	147	struct scatterlist *sg_pos;
	148	unsigned int sg_idx; /* in pages, but 32bit eek! */
	149
	150	struct radix_tree_root radix;
	151	struct mutex lock; /* protects this cache */
	152	} get_page;
	153
	154	/**
	155	* Advice: are the backing pages purgeable?
	156	*/
	157	unsigned int madv:2;
	158
	159	/**
	160	* This is set if the object has been written to since the
	161	* pages were last acquired.
	162	*/
	163	bool dirty:1;
	164
	165	/**
	166	* This is set if the object has been pinned due to unknown
	167	* swizzling.
	168	*/
	169	bool quirked:1;
	170	} mm;
	171
	172	/** Breadcrumb of last rendering to the buffer.
	173	* There can only be one writer, but we allow for multiple readers.
	174	* If there is a writer that necessarily implies that all other
	175	* read requests are complete - but we may only be lazily clearing
	176	* the read requests. A read request is naturally the most recent
	177	* request on a ring, so we may have two different write and read
	178	* requests on one ring where the write request is older than the
	179	* read request. This allows for the CPU to read from an active
	180	* buffer by only waiting for the write to complete.
	181	*/
	182	struct reservation_object *resv;
	183
	184	/** References from framebuffers, locks out tiling changes. */
dd689287	185	unsigned int framebuffer_references;
b42fe9ca JL	186
	187	/** Record of address bit 17 of each page at last unbind. */
	188	unsigned long *bit_17;
	189
44653988 CW	190	union {
	191	struct i915_gem_userptr {
	192	uintptr_t ptr;
	193	unsigned read_only :1;
	194
	195	struct i915_mm_struct *mm;
	196	struct i915_mmu_object *mmu_object;
	197	struct work_struct *work;
	198	} userptr;
	199
	200	unsigned long scratch;
	201	};
b42fe9ca JL	202
	203	/** for phys allocated objects */
	204	struct drm_dma_handle *phys_handle;
	205
	206	struct reservation_object __builtin_resv;
	207	};
	208
	209	static inline struct drm_i915_gem_object *
	210	to_intel_bo(struct drm_gem_object *gem)
	211	{
	212	/* Assert that to_intel_bo(NULL) == NULL */
	213	BUILD_BUG_ON(offsetof(struct drm_i915_gem_object, base));
	214
	215	return container_of(gem, struct drm_i915_gem_object, base);
	216	}
	217
	218	/**
	219	* i915_gem_object_lookup_rcu - look up a temporary GEM object from its handle
	220	* @filp: DRM file private date
	221	* @handle: userspace handle
	222	*
	223	* Returns:
	224	*
	225	* A pointer to the object named by the handle if such exists on @filp, NULL
	226	* otherwise. This object is only valid whilst under the RCU read lock, and
	227	* note carefully the object may be in the process of being destroyed.
	228	*/
	229	static inline struct drm_i915_gem_object *
	230	i915_gem_object_lookup_rcu(struct drm_file *file, u32 handle)
	231	{
	232	#ifdef CONFIG_LOCKDEP
	233	WARN_ON(debug_locks && !lock_is_held(&rcu_lock_map));
	234	#endif
	235	return idr_find(&file->object_idr, handle);
	236	}
	237
	238	static inline struct drm_i915_gem_object *
	239	i915_gem_object_lookup(struct drm_file *file, u32 handle)
	240	{
	241	struct drm_i915_gem_object *obj;
	242
	243	rcu_read_lock();
	244	obj = i915_gem_object_lookup_rcu(file, handle);
	245	if (obj && !kref_get_unless_zero(&obj->base.refcount))
	246	obj = NULL;
	247	rcu_read_unlock();
	248
	249	return obj;
	250	}
	251
	252	__deprecated
	253	extern struct drm_gem_object *
	254	drm_gem_object_lookup(struct drm_file *file, u32 handle);
	255
	256	__attribute__((nonnull))
	257	static inline struct drm_i915_gem_object *
	258	i915_gem_object_get(struct drm_i915_gem_object *obj)
	259	{
	260	drm_gem_object_reference(&obj->base);
	261	return obj;
	262	}
	263
	264	__deprecated
	265	extern void drm_gem_object_reference(struct drm_gem_object *);
266
267	__attribute__((nonnull))
268	static inline void
269	i915_gem_object_put(struct drm_i915_gem_object *obj)
270	{
271	__drm_gem_object_unreference(&obj->base);
272	}
273
274	__deprecated
275	extern void drm_gem_object_unreference(struct drm_gem_object *);
276
277	__deprecated
278	extern void drm_gem_object_unreference_unlocked(struct drm_gem_object *);
279
dd689287 CW	280	static inline void i915_gem_object_lock(struct drm_i915_gem_object *obj)
	281	{
	282	reservation_object_lock(obj->resv, NULL);
	283	}
	284
	285	static inline void i915_gem_object_unlock(struct drm_i915_gem_object *obj)
	286	{
	287	reservation_object_unlock(obj->resv);
	288	}
	289
b42fe9ca JL	290	static inline bool
	291	i915_gem_object_has_struct_page(const struct drm_i915_gem_object *obj)
	292	{
	293	return obj->ops->flags & I915_GEM_OBJECT_HAS_STRUCT_PAGE;
	294	}
	295
	296	static inline bool
	297	i915_gem_object_is_shrinkable(const struct drm_i915_gem_object *obj)
	298	{
	299	return obj->ops->flags & I915_GEM_OBJECT_IS_SHRINKABLE;
	300	}
	301
	302	static inline bool
	303	i915_gem_object_is_active(const struct drm_i915_gem_object *obj)
	304	{
	305	return obj->active_count;
	306	}
	307
	308	static inline bool
	309	i915_gem_object_has_active_reference(const struct drm_i915_gem_object *obj)
	310	{
	311	return test_bit(I915_BO_ACTIVE_REF, &obj->flags);
	312	}
	313
	314	static inline void
	315	i915_gem_object_set_active_reference(struct drm_i915_gem_object *obj)
	316	{
	317	lockdep_assert_held(&obj->base.dev->struct_mutex);
	318	__set_bit(I915_BO_ACTIVE_REF, &obj->flags);
	319	}
	320
	321	static inline void
	322	i915_gem_object_clear_active_reference(struct drm_i915_gem_object *obj)
	323	{
	324	lockdep_assert_held(&obj->base.dev->struct_mutex);
	325	__clear_bit(I915_BO_ACTIVE_REF, &obj->flags);
	326	}
	327
	328	void __i915_gem_object_release_unless_active(struct drm_i915_gem_object *obj);
	329
dd689287 CW	330	static inline bool
	331	i915_gem_object_is_framebuffer(const struct drm_i915_gem_object *obj)
	332	{
	333	return READ_ONCE(obj->framebuffer_references);
	334	}
	335
b42fe9ca JL	336	static inline unsigned int
	337	i915_gem_object_get_tiling(struct drm_i915_gem_object *obj)
	338	{
	339	return obj->tiling_and_stride & TILING_MASK;
	340	}
	341
	342	static inline bool
	343	i915_gem_object_is_tiled(struct drm_i915_gem_object *obj)
	344	{
	345	return i915_gem_object_get_tiling(obj) != I915_TILING_NONE;
	346	}
	347
	348	static inline unsigned int
	349	i915_gem_object_get_stride(struct drm_i915_gem_object *obj)
	350	{
	351	return obj->tiling_and_stride & STRIDE_MASK;
	352	}
	353
6649a0b6 CW	354	static inline unsigned int
	355	i915_gem_tile_height(unsigned int tiling)
	356	{
	357	GEM_BUG_ON(!tiling);
	358	return tiling == I915_TILING_Y ? 32 : 8;
	359	}
	360
	361	static inline unsigned int
	362	i915_gem_object_get_tile_height(struct drm_i915_gem_object *obj)
	363	{
	364	return i915_gem_tile_height(i915_gem_object_get_tiling(obj));
	365	}
	366
	367	static inline unsigned int
	368	i915_gem_object_get_tile_row_size(struct drm_i915_gem_object *obj)
	369	{
	370	return (i915_gem_object_get_stride(obj) *
	371	i915_gem_object_get_tile_height(obj));
	372	}
	373
957870f9 CW	374	int i915_gem_object_set_tiling(struct drm_i915_gem_object *obj,
	375	unsigned int tiling, unsigned int stride);
	376
b42fe9ca JL	377	static inline struct intel_engine_cs *
	378	i915_gem_object_last_write_engine(struct drm_i915_gem_object *obj)
	379	{
	380	struct intel_engine_cs *engine = NULL;
	381	struct dma_fence *fence;
	382
	383	rcu_read_lock();
	384	fence = reservation_object_get_excl_rcu(obj->resv);
	385	rcu_read_unlock();
	386
	387	if (fence && dma_fence_is_i915(fence) && !dma_fence_is_signaled(fence))
	388	engine = to_request(fence)->engine;
	389	dma_fence_put(fence);
	390
	391	return engine;
	392	}
	393
5a97bcc6 CW	394	void i915_gem_object_flush_if_display(struct drm_i915_gem_object *obj);
5a97bcc6 CW	395
b42fe9ca JL	396	#endif
b42fe9ca JL	397