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1d8e1c75 CW |
1 | /* |
2 | * Copyright © 2006-2010 Intel Corporation | |
3 | * Copyright (c) 2006 Dave Airlie <airlied@linux.ie> | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining a | |
6 | * copy of this software and associated documentation files (the "Software"), | |
7 | * to deal in the Software without restriction, including without limitation | |
8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
9 | * and/or sell copies of the Software, and to permit persons to whom the | |
10 | * Software is furnished to do so, subject to the following conditions: | |
11 | * | |
12 | * The above copyright notice and this permission notice (including the next | |
13 | * paragraph) shall be included in all copies or substantial portions of the | |
14 | * Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | |
22 | * DEALINGS IN THE SOFTWARE. | |
23 | * | |
24 | * Authors: | |
25 | * Eric Anholt <eric@anholt.net> | |
26 | * Dave Airlie <airlied@linux.ie> | |
27 | * Jesse Barnes <jesse.barnes@intel.com> | |
28 | * Chris Wilson <chris@chris-wilson.co.uk> | |
29 | */ | |
30 | ||
a70491cc JP |
31 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
32 | ||
7bd90909 | 33 | #include <linux/moduleparam.h> |
1d8e1c75 CW |
34 | #include "intel_drv.h" |
35 | ||
ba3820ad TI |
36 | #define PCI_LBPC 0xf4 /* legacy/combination backlight modes */ |
37 | ||
1d8e1c75 | 38 | void |
4c6df4b4 | 39 | intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode, |
1d8e1c75 CW |
40 | struct drm_display_mode *adjusted_mode) |
41 | { | |
4c6df4b4 | 42 | drm_mode_copy(adjusted_mode, fixed_mode); |
a52690e4 ID |
43 | |
44 | drm_mode_set_crtcinfo(adjusted_mode, 0); | |
1d8e1c75 CW |
45 | } |
46 | ||
47 | /* adjusted_mode has been preset to be the panel's fixed mode */ | |
48 | void | |
b074cec8 JB |
49 | intel_pch_panel_fitting(struct intel_crtc *intel_crtc, |
50 | struct intel_crtc_config *pipe_config, | |
51 | int fitting_mode) | |
1d8e1c75 | 52 | { |
37327abd | 53 | struct drm_display_mode *adjusted_mode; |
1d8e1c75 CW |
54 | int x, y, width, height; |
55 | ||
b074cec8 JB |
56 | adjusted_mode = &pipe_config->adjusted_mode; |
57 | ||
1d8e1c75 CW |
58 | x = y = width = height = 0; |
59 | ||
60 | /* Native modes don't need fitting */ | |
37327abd VS |
61 | if (adjusted_mode->hdisplay == pipe_config->pipe_src_w && |
62 | adjusted_mode->vdisplay == pipe_config->pipe_src_h) | |
1d8e1c75 CW |
63 | goto done; |
64 | ||
65 | switch (fitting_mode) { | |
66 | case DRM_MODE_SCALE_CENTER: | |
37327abd VS |
67 | width = pipe_config->pipe_src_w; |
68 | height = pipe_config->pipe_src_h; | |
1d8e1c75 CW |
69 | x = (adjusted_mode->hdisplay - width + 1)/2; |
70 | y = (adjusted_mode->vdisplay - height + 1)/2; | |
71 | break; | |
72 | ||
73 | case DRM_MODE_SCALE_ASPECT: | |
74 | /* Scale but preserve the aspect ratio */ | |
75 | { | |
9084e7d2 DV |
76 | u32 scaled_width = adjusted_mode->hdisplay |
77 | * pipe_config->pipe_src_h; | |
78 | u32 scaled_height = pipe_config->pipe_src_w | |
79 | * adjusted_mode->vdisplay; | |
1d8e1c75 | 80 | if (scaled_width > scaled_height) { /* pillar */ |
37327abd | 81 | width = scaled_height / pipe_config->pipe_src_h; |
302983e9 | 82 | if (width & 1) |
0206e353 | 83 | width++; |
1d8e1c75 CW |
84 | x = (adjusted_mode->hdisplay - width + 1) / 2; |
85 | y = 0; | |
86 | height = adjusted_mode->vdisplay; | |
87 | } else if (scaled_width < scaled_height) { /* letter */ | |
37327abd | 88 | height = scaled_width / pipe_config->pipe_src_w; |
302983e9 AJ |
89 | if (height & 1) |
90 | height++; | |
1d8e1c75 CW |
91 | y = (adjusted_mode->vdisplay - height + 1) / 2; |
92 | x = 0; | |
93 | width = adjusted_mode->hdisplay; | |
94 | } else { | |
95 | x = y = 0; | |
96 | width = adjusted_mode->hdisplay; | |
97 | height = adjusted_mode->vdisplay; | |
98 | } | |
99 | } | |
100 | break; | |
101 | ||
1d8e1c75 CW |
102 | case DRM_MODE_SCALE_FULLSCREEN: |
103 | x = y = 0; | |
104 | width = adjusted_mode->hdisplay; | |
105 | height = adjusted_mode->vdisplay; | |
106 | break; | |
ab3e67f4 JB |
107 | |
108 | default: | |
109 | WARN(1, "bad panel fit mode: %d\n", fitting_mode); | |
110 | return; | |
1d8e1c75 CW |
111 | } |
112 | ||
113 | done: | |
b074cec8 JB |
114 | pipe_config->pch_pfit.pos = (x << 16) | y; |
115 | pipe_config->pch_pfit.size = (width << 16) | height; | |
fd4daa9c | 116 | pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0; |
1d8e1c75 | 117 | } |
a9573556 | 118 | |
2dd24552 JB |
119 | static void |
120 | centre_horizontally(struct drm_display_mode *mode, | |
121 | int width) | |
122 | { | |
123 | u32 border, sync_pos, blank_width, sync_width; | |
124 | ||
125 | /* keep the hsync and hblank widths constant */ | |
126 | sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start; | |
127 | blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start; | |
128 | sync_pos = (blank_width - sync_width + 1) / 2; | |
129 | ||
130 | border = (mode->hdisplay - width + 1) / 2; | |
131 | border += border & 1; /* make the border even */ | |
132 | ||
133 | mode->crtc_hdisplay = width; | |
134 | mode->crtc_hblank_start = width + border; | |
135 | mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width; | |
136 | ||
137 | mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos; | |
138 | mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width; | |
139 | } | |
140 | ||
141 | static void | |
142 | centre_vertically(struct drm_display_mode *mode, | |
143 | int height) | |
144 | { | |
145 | u32 border, sync_pos, blank_width, sync_width; | |
146 | ||
147 | /* keep the vsync and vblank widths constant */ | |
148 | sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start; | |
149 | blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start; | |
150 | sync_pos = (blank_width - sync_width + 1) / 2; | |
151 | ||
152 | border = (mode->vdisplay - height + 1) / 2; | |
153 | ||
154 | mode->crtc_vdisplay = height; | |
155 | mode->crtc_vblank_start = height + border; | |
156 | mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width; | |
157 | ||
158 | mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos; | |
159 | mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width; | |
160 | } | |
161 | ||
162 | static inline u32 panel_fitter_scaling(u32 source, u32 target) | |
163 | { | |
164 | /* | |
165 | * Floating point operation is not supported. So the FACTOR | |
166 | * is defined, which can avoid the floating point computation | |
167 | * when calculating the panel ratio. | |
168 | */ | |
169 | #define ACCURACY 12 | |
170 | #define FACTOR (1 << ACCURACY) | |
171 | u32 ratio = source * FACTOR / target; | |
172 | return (FACTOR * ratio + FACTOR/2) / FACTOR; | |
173 | } | |
174 | ||
9084e7d2 DV |
175 | static void i965_scale_aspect(struct intel_crtc_config *pipe_config, |
176 | u32 *pfit_control) | |
177 | { | |
178 | struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode; | |
179 | u32 scaled_width = adjusted_mode->hdisplay * | |
180 | pipe_config->pipe_src_h; | |
181 | u32 scaled_height = pipe_config->pipe_src_w * | |
182 | adjusted_mode->vdisplay; | |
183 | ||
184 | /* 965+ is easy, it does everything in hw */ | |
185 | if (scaled_width > scaled_height) | |
186 | *pfit_control |= PFIT_ENABLE | | |
187 | PFIT_SCALING_PILLAR; | |
188 | else if (scaled_width < scaled_height) | |
189 | *pfit_control |= PFIT_ENABLE | | |
190 | PFIT_SCALING_LETTER; | |
191 | else if (adjusted_mode->hdisplay != pipe_config->pipe_src_w) | |
192 | *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO; | |
193 | } | |
194 | ||
195 | static void i9xx_scale_aspect(struct intel_crtc_config *pipe_config, | |
196 | u32 *pfit_control, u32 *pfit_pgm_ratios, | |
197 | u32 *border) | |
198 | { | |
199 | struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode; | |
200 | u32 scaled_width = adjusted_mode->hdisplay * | |
201 | pipe_config->pipe_src_h; | |
202 | u32 scaled_height = pipe_config->pipe_src_w * | |
203 | adjusted_mode->vdisplay; | |
204 | u32 bits; | |
205 | ||
206 | /* | |
207 | * For earlier chips we have to calculate the scaling | |
208 | * ratio by hand and program it into the | |
209 | * PFIT_PGM_RATIO register | |
210 | */ | |
211 | if (scaled_width > scaled_height) { /* pillar */ | |
212 | centre_horizontally(adjusted_mode, | |
213 | scaled_height / | |
214 | pipe_config->pipe_src_h); | |
215 | ||
216 | *border = LVDS_BORDER_ENABLE; | |
217 | if (pipe_config->pipe_src_h != adjusted_mode->vdisplay) { | |
218 | bits = panel_fitter_scaling(pipe_config->pipe_src_h, | |
219 | adjusted_mode->vdisplay); | |
220 | ||
221 | *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | | |
222 | bits << PFIT_VERT_SCALE_SHIFT); | |
223 | *pfit_control |= (PFIT_ENABLE | | |
224 | VERT_INTERP_BILINEAR | | |
225 | HORIZ_INTERP_BILINEAR); | |
226 | } | |
227 | } else if (scaled_width < scaled_height) { /* letter */ | |
228 | centre_vertically(adjusted_mode, | |
229 | scaled_width / | |
230 | pipe_config->pipe_src_w); | |
231 | ||
232 | *border = LVDS_BORDER_ENABLE; | |
233 | if (pipe_config->pipe_src_w != adjusted_mode->hdisplay) { | |
234 | bits = panel_fitter_scaling(pipe_config->pipe_src_w, | |
235 | adjusted_mode->hdisplay); | |
236 | ||
237 | *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | | |
238 | bits << PFIT_VERT_SCALE_SHIFT); | |
239 | *pfit_control |= (PFIT_ENABLE | | |
240 | VERT_INTERP_BILINEAR | | |
241 | HORIZ_INTERP_BILINEAR); | |
242 | } | |
243 | } else { | |
244 | /* Aspects match, Let hw scale both directions */ | |
245 | *pfit_control |= (PFIT_ENABLE | | |
246 | VERT_AUTO_SCALE | HORIZ_AUTO_SCALE | | |
247 | VERT_INTERP_BILINEAR | | |
248 | HORIZ_INTERP_BILINEAR); | |
249 | } | |
250 | } | |
251 | ||
2dd24552 JB |
252 | void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc, |
253 | struct intel_crtc_config *pipe_config, | |
254 | int fitting_mode) | |
255 | { | |
256 | struct drm_device *dev = intel_crtc->base.dev; | |
2dd24552 | 257 | u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0; |
37327abd | 258 | struct drm_display_mode *adjusted_mode; |
2dd24552 | 259 | |
2dd24552 JB |
260 | adjusted_mode = &pipe_config->adjusted_mode; |
261 | ||
262 | /* Native modes don't need fitting */ | |
37327abd VS |
263 | if (adjusted_mode->hdisplay == pipe_config->pipe_src_w && |
264 | adjusted_mode->vdisplay == pipe_config->pipe_src_h) | |
2dd24552 JB |
265 | goto out; |
266 | ||
267 | switch (fitting_mode) { | |
268 | case DRM_MODE_SCALE_CENTER: | |
269 | /* | |
270 | * For centered modes, we have to calculate border widths & | |
271 | * heights and modify the values programmed into the CRTC. | |
272 | */ | |
37327abd VS |
273 | centre_horizontally(adjusted_mode, pipe_config->pipe_src_w); |
274 | centre_vertically(adjusted_mode, pipe_config->pipe_src_h); | |
2dd24552 JB |
275 | border = LVDS_BORDER_ENABLE; |
276 | break; | |
277 | case DRM_MODE_SCALE_ASPECT: | |
278 | /* Scale but preserve the aspect ratio */ | |
9084e7d2 DV |
279 | if (INTEL_INFO(dev)->gen >= 4) |
280 | i965_scale_aspect(pipe_config, &pfit_control); | |
281 | else | |
282 | i9xx_scale_aspect(pipe_config, &pfit_control, | |
283 | &pfit_pgm_ratios, &border); | |
2dd24552 | 284 | break; |
2dd24552 JB |
285 | case DRM_MODE_SCALE_FULLSCREEN: |
286 | /* | |
287 | * Full scaling, even if it changes the aspect ratio. | |
288 | * Fortunately this is all done for us in hw. | |
289 | */ | |
37327abd VS |
290 | if (pipe_config->pipe_src_h != adjusted_mode->vdisplay || |
291 | pipe_config->pipe_src_w != adjusted_mode->hdisplay) { | |
2dd24552 JB |
292 | pfit_control |= PFIT_ENABLE; |
293 | if (INTEL_INFO(dev)->gen >= 4) | |
294 | pfit_control |= PFIT_SCALING_AUTO; | |
295 | else | |
296 | pfit_control |= (VERT_AUTO_SCALE | | |
297 | VERT_INTERP_BILINEAR | | |
298 | HORIZ_AUTO_SCALE | | |
299 | HORIZ_INTERP_BILINEAR); | |
300 | } | |
301 | break; | |
ab3e67f4 JB |
302 | default: |
303 | WARN(1, "bad panel fit mode: %d\n", fitting_mode); | |
304 | return; | |
2dd24552 JB |
305 | } |
306 | ||
307 | /* 965+ wants fuzzy fitting */ | |
308 | /* FIXME: handle multiple panels by failing gracefully */ | |
309 | if (INTEL_INFO(dev)->gen >= 4) | |
310 | pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) | | |
311 | PFIT_FILTER_FUZZY); | |
312 | ||
313 | out: | |
314 | if ((pfit_control & PFIT_ENABLE) == 0) { | |
315 | pfit_control = 0; | |
316 | pfit_pgm_ratios = 0; | |
317 | } | |
318 | ||
319 | /* Make sure pre-965 set dither correctly for 18bpp panels. */ | |
320 | if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18) | |
321 | pfit_control |= PANEL_8TO6_DITHER_ENABLE; | |
322 | ||
2deefda5 DV |
323 | pipe_config->gmch_pfit.control = pfit_control; |
324 | pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios; | |
68fc8742 | 325 | pipe_config->gmch_pfit.lvds_border_bits = border; |
2dd24552 JB |
326 | } |
327 | ||
4dca20ef CE |
328 | static int i915_panel_invert_brightness; |
329 | MODULE_PARM_DESC(invert_brightness, "Invert backlight brightness " | |
330 | "(-1 force normal, 0 machine defaults, 1 force inversion), please " | |
7bd90909 CE |
331 | "report PCI device ID, subsystem vendor and subsystem device ID " |
332 | "to dri-devel@lists.freedesktop.org, if your machine needs it. " | |
333 | "It will then be included in an upcoming module version."); | |
4dca20ef | 334 | module_param_named(invert_brightness, i915_panel_invert_brightness, int, 0600); |
7bd688cd JN |
335 | static u32 intel_panel_compute_brightness(struct intel_connector *connector, |
336 | u32 val) | |
7bd90909 | 337 | { |
7bd688cd | 338 | struct drm_device *dev = connector->base.dev; |
4dca20ef | 339 | struct drm_i915_private *dev_priv = dev->dev_private; |
f91c15e0 JN |
340 | struct intel_panel *panel = &connector->panel; |
341 | ||
342 | WARN_ON(panel->backlight.max == 0); | |
4dca20ef CE |
343 | |
344 | if (i915_panel_invert_brightness < 0) | |
345 | return val; | |
346 | ||
347 | if (i915_panel_invert_brightness > 0 || | |
d6540632 | 348 | dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) { |
f91c15e0 | 349 | return panel->backlight.max - val; |
d6540632 | 350 | } |
7bd90909 CE |
351 | |
352 | return val; | |
353 | } | |
354 | ||
7bd688cd | 355 | static u32 pch_get_backlight(struct intel_connector *connector) |
a9573556 | 356 | { |
7bd688cd | 357 | struct drm_device *dev = connector->base.dev; |
a9573556 | 358 | struct drm_i915_private *dev_priv = dev->dev_private; |
8ba2d185 | 359 | |
7bd688cd JN |
360 | return I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; |
361 | } | |
a9573556 | 362 | |
7bd688cd JN |
363 | static u32 i9xx_get_backlight(struct intel_connector *connector) |
364 | { | |
365 | struct drm_device *dev = connector->base.dev; | |
366 | struct drm_i915_private *dev_priv = dev->dev_private; | |
636baebf | 367 | struct intel_panel *panel = &connector->panel; |
7bd688cd | 368 | u32 val; |
07bf139b | 369 | |
7bd688cd JN |
370 | val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; |
371 | if (INTEL_INFO(dev)->gen < 4) | |
372 | val >>= 1; | |
ba3820ad | 373 | |
636baebf | 374 | if (panel->backlight.combination_mode) { |
7bd688cd | 375 | u8 lbpc; |
ba3820ad | 376 | |
7bd688cd JN |
377 | pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc); |
378 | val *= lbpc; | |
a9573556 CW |
379 | } |
380 | ||
7bd688cd JN |
381 | return val; |
382 | } | |
383 | ||
384 | static u32 _vlv_get_backlight(struct drm_device *dev, enum pipe pipe) | |
385 | { | |
386 | struct drm_i915_private *dev_priv = dev->dev_private; | |
387 | ||
388 | return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK; | |
389 | } | |
390 | ||
391 | static u32 vlv_get_backlight(struct intel_connector *connector) | |
392 | { | |
393 | struct drm_device *dev = connector->base.dev; | |
394 | enum pipe pipe = intel_get_pipe_from_connector(connector); | |
395 | ||
396 | return _vlv_get_backlight(dev, pipe); | |
397 | } | |
398 | ||
399 | static u32 intel_panel_get_backlight(struct intel_connector *connector) | |
400 | { | |
401 | struct drm_device *dev = connector->base.dev; | |
402 | struct drm_i915_private *dev_priv = dev->dev_private; | |
403 | u32 val; | |
404 | unsigned long flags; | |
405 | ||
406 | spin_lock_irqsave(&dev_priv->backlight_lock, flags); | |
407 | ||
408 | val = dev_priv->display.get_backlight(connector); | |
409 | val = intel_panel_compute_brightness(connector, val); | |
8ba2d185 | 410 | |
58c68779 | 411 | spin_unlock_irqrestore(&dev_priv->backlight_lock, flags); |
8ba2d185 | 412 | |
a9573556 CW |
413 | DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val); |
414 | return val; | |
415 | } | |
416 | ||
7bd688cd | 417 | static void pch_set_backlight(struct intel_connector *connector, u32 level) |
a9573556 | 418 | { |
7bd688cd | 419 | struct drm_device *dev = connector->base.dev; |
a9573556 | 420 | struct drm_i915_private *dev_priv = dev->dev_private; |
7bd688cd JN |
421 | u32 tmp; |
422 | ||
423 | tmp = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK; | |
424 | I915_WRITE(BLC_PWM_CPU_CTL, tmp | level); | |
a9573556 CW |
425 | } |
426 | ||
7bd688cd | 427 | static void i9xx_set_backlight(struct intel_connector *connector, u32 level) |
a9573556 | 428 | { |
7bd688cd | 429 | struct drm_device *dev = connector->base.dev; |
a9573556 | 430 | struct drm_i915_private *dev_priv = dev->dev_private; |
f91c15e0 | 431 | struct intel_panel *panel = &connector->panel; |
b329b328 | 432 | u32 tmp, mask; |
ba3820ad | 433 | |
f91c15e0 JN |
434 | WARN_ON(panel->backlight.max == 0); |
435 | ||
636baebf | 436 | if (panel->backlight.combination_mode) { |
ba3820ad TI |
437 | u8 lbpc; |
438 | ||
f91c15e0 | 439 | lbpc = level * 0xfe / panel->backlight.max + 1; |
ba3820ad TI |
440 | level /= lbpc; |
441 | pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc); | |
442 | } | |
443 | ||
b329b328 JN |
444 | if (IS_GEN4(dev)) { |
445 | mask = BACKLIGHT_DUTY_CYCLE_MASK; | |
446 | } else { | |
a9573556 | 447 | level <<= 1; |
b329b328 JN |
448 | mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV; |
449 | } | |
7bd688cd | 450 | |
b329b328 | 451 | tmp = I915_READ(BLC_PWM_CTL) & ~mask; |
7bd688cd JN |
452 | I915_WRITE(BLC_PWM_CTL, tmp | level); |
453 | } | |
454 | ||
455 | static void vlv_set_backlight(struct intel_connector *connector, u32 level) | |
456 | { | |
457 | struct drm_device *dev = connector->base.dev; | |
458 | struct drm_i915_private *dev_priv = dev->dev_private; | |
459 | enum pipe pipe = intel_get_pipe_from_connector(connector); | |
460 | u32 tmp; | |
461 | ||
462 | tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK; | |
463 | I915_WRITE(VLV_BLC_PWM_CTL(pipe), tmp | level); | |
464 | } | |
465 | ||
466 | static void | |
467 | intel_panel_actually_set_backlight(struct intel_connector *connector, u32 level) | |
468 | { | |
469 | struct drm_device *dev = connector->base.dev; | |
470 | struct drm_i915_private *dev_priv = dev->dev_private; | |
471 | ||
472 | DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level); | |
473 | ||
474 | level = intel_panel_compute_brightness(connector, level); | |
475 | dev_priv->display.set_backlight(connector, level); | |
a9573556 | 476 | } |
47356eb6 | 477 | |
d6540632 | 478 | /* set backlight brightness to level in range [0..max] */ |
752aa88a JB |
479 | void intel_panel_set_backlight(struct intel_connector *connector, u32 level, |
480 | u32 max) | |
47356eb6 | 481 | { |
752aa88a | 482 | struct drm_device *dev = connector->base.dev; |
47356eb6 | 483 | struct drm_i915_private *dev_priv = dev->dev_private; |
58c68779 | 484 | struct intel_panel *panel = &connector->panel; |
752aa88a | 485 | enum pipe pipe = intel_get_pipe_from_connector(connector); |
d6540632 | 486 | u32 freq; |
8ba2d185 JN |
487 | unsigned long flags; |
488 | ||
752aa88a JB |
489 | if (pipe == INVALID_PIPE) |
490 | return; | |
491 | ||
58c68779 | 492 | spin_lock_irqsave(&dev_priv->backlight_lock, flags); |
d6540632 | 493 | |
f91c15e0 | 494 | WARN_ON(panel->backlight.max == 0); |
d6540632 | 495 | |
f91c15e0 JN |
496 | /* scale to hardware max, but be careful to not overflow */ |
497 | freq = panel->backlight.max; | |
22505b82 AL |
498 | if (freq < max) |
499 | level = level * freq / max; | |
500 | else | |
501 | level = freq / max * level; | |
47356eb6 | 502 | |
58c68779 JN |
503 | panel->backlight.level = level; |
504 | if (panel->backlight.device) | |
505 | panel->backlight.device->props.brightness = level; | |
b6b3ba5b | 506 | |
58c68779 | 507 | if (panel->backlight.enabled) |
7bd688cd | 508 | intel_panel_actually_set_backlight(connector, level); |
f91c15e0 | 509 | |
58c68779 | 510 | spin_unlock_irqrestore(&dev_priv->backlight_lock, flags); |
f52c619a TI |
511 | } |
512 | ||
7bd688cd JN |
513 | static void pch_disable_backlight(struct intel_connector *connector) |
514 | { | |
515 | struct drm_device *dev = connector->base.dev; | |
516 | struct drm_i915_private *dev_priv = dev->dev_private; | |
517 | u32 tmp; | |
518 | ||
3bd712e5 JN |
519 | intel_panel_actually_set_backlight(connector, 0); |
520 | ||
7bd688cd JN |
521 | tmp = I915_READ(BLC_PWM_CPU_CTL2); |
522 | I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE); | |
523 | ||
524 | tmp = I915_READ(BLC_PWM_PCH_CTL1); | |
525 | I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE); | |
526 | } | |
527 | ||
3bd712e5 JN |
528 | static void i9xx_disable_backlight(struct intel_connector *connector) |
529 | { | |
530 | intel_panel_actually_set_backlight(connector, 0); | |
531 | } | |
532 | ||
7bd688cd JN |
533 | static void i965_disable_backlight(struct intel_connector *connector) |
534 | { | |
535 | struct drm_device *dev = connector->base.dev; | |
536 | struct drm_i915_private *dev_priv = dev->dev_private; | |
537 | u32 tmp; | |
538 | ||
3bd712e5 JN |
539 | intel_panel_actually_set_backlight(connector, 0); |
540 | ||
7bd688cd JN |
541 | tmp = I915_READ(BLC_PWM_CTL2); |
542 | I915_WRITE(BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE); | |
543 | } | |
544 | ||
545 | static void vlv_disable_backlight(struct intel_connector *connector) | |
546 | { | |
547 | struct drm_device *dev = connector->base.dev; | |
548 | struct drm_i915_private *dev_priv = dev->dev_private; | |
549 | enum pipe pipe = intel_get_pipe_from_connector(connector); | |
550 | u32 tmp; | |
551 | ||
3bd712e5 JN |
552 | intel_panel_actually_set_backlight(connector, 0); |
553 | ||
7bd688cd JN |
554 | tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe)); |
555 | I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp & ~BLM_PWM_ENABLE); | |
556 | } | |
557 | ||
752aa88a | 558 | void intel_panel_disable_backlight(struct intel_connector *connector) |
f52c619a | 559 | { |
752aa88a | 560 | struct drm_device *dev = connector->base.dev; |
f52c619a | 561 | struct drm_i915_private *dev_priv = dev->dev_private; |
58c68779 | 562 | struct intel_panel *panel = &connector->panel; |
752aa88a | 563 | enum pipe pipe = intel_get_pipe_from_connector(connector); |
8ba2d185 JN |
564 | unsigned long flags; |
565 | ||
752aa88a JB |
566 | if (pipe == INVALID_PIPE) |
567 | return; | |
568 | ||
3f577573 JN |
569 | /* |
570 | * Do not disable backlight on the vgaswitcheroo path. When switching | |
571 | * away from i915, the other client may depend on i915 to handle the | |
572 | * backlight. This will leave the backlight on unnecessarily when | |
573 | * another client is not activated. | |
574 | */ | |
575 | if (dev->switch_power_state == DRM_SWITCH_POWER_CHANGING) { | |
576 | DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n"); | |
577 | return; | |
578 | } | |
579 | ||
58c68779 | 580 | spin_lock_irqsave(&dev_priv->backlight_lock, flags); |
47356eb6 | 581 | |
58c68779 | 582 | panel->backlight.enabled = false; |
3bd712e5 | 583 | dev_priv->display.disable_backlight(connector); |
24ded204 | 584 | |
7bd688cd JN |
585 | spin_unlock_irqrestore(&dev_priv->backlight_lock, flags); |
586 | } | |
24ded204 | 587 | |
7bd688cd JN |
588 | static void pch_enable_backlight(struct intel_connector *connector) |
589 | { | |
590 | struct drm_device *dev = connector->base.dev; | |
591 | struct drm_i915_private *dev_priv = dev->dev_private; | |
3bd712e5 | 592 | struct intel_panel *panel = &connector->panel; |
7bd688cd JN |
593 | enum pipe pipe = intel_get_pipe_from_connector(connector); |
594 | enum transcoder cpu_transcoder = | |
595 | intel_pipe_to_cpu_transcoder(dev_priv, pipe); | |
b35684b8 | 596 | u32 cpu_ctl2, pch_ctl1, pch_ctl2; |
7bd688cd | 597 | |
b35684b8 JN |
598 | cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2); |
599 | if (cpu_ctl2 & BLM_PWM_ENABLE) { | |
600 | WARN(1, "cpu backlight already enabled\n"); | |
601 | cpu_ctl2 &= ~BLM_PWM_ENABLE; | |
602 | I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2); | |
603 | } | |
7bd688cd | 604 | |
b35684b8 JN |
605 | pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); |
606 | if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { | |
607 | DRM_DEBUG_KMS("pch backlight already enabled\n"); | |
608 | pch_ctl1 &= ~BLM_PCH_PWM_ENABLE; | |
609 | I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1); | |
610 | } | |
7bd688cd JN |
611 | |
612 | if (cpu_transcoder == TRANSCODER_EDP) | |
b35684b8 | 613 | cpu_ctl2 = BLM_TRANSCODER_EDP; |
7bd688cd | 614 | else |
b35684b8 JN |
615 | cpu_ctl2 = BLM_PIPE(cpu_transcoder); |
616 | I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2); | |
7bd688cd | 617 | POSTING_READ(BLC_PWM_CPU_CTL2); |
b35684b8 | 618 | I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE); |
3bd712e5 | 619 | |
b35684b8 | 620 | /* This won't stick until the above enable. */ |
3bd712e5 | 621 | intel_panel_actually_set_backlight(connector, panel->backlight.level); |
b35684b8 JN |
622 | |
623 | pch_ctl2 = panel->backlight.max << 16; | |
624 | I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2); | |
625 | ||
b35684b8 JN |
626 | pch_ctl1 = 0; |
627 | if (panel->backlight.active_low_pwm) | |
628 | pch_ctl1 |= BLM_PCH_POLARITY; | |
629 | I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1); | |
630 | POSTING_READ(BLC_PWM_PCH_CTL1); | |
631 | I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE); | |
3bd712e5 JN |
632 | } |
633 | ||
634 | static void i9xx_enable_backlight(struct intel_connector *connector) | |
635 | { | |
b35684b8 JN |
636 | struct drm_device *dev = connector->base.dev; |
637 | struct drm_i915_private *dev_priv = dev->dev_private; | |
3bd712e5 | 638 | struct intel_panel *panel = &connector->panel; |
b35684b8 JN |
639 | u32 ctl, freq; |
640 | ||
641 | ctl = I915_READ(BLC_PWM_CTL); | |
642 | if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) { | |
643 | WARN(1, "backlight already enabled\n"); | |
644 | I915_WRITE(BLC_PWM_CTL, 0); | |
645 | } | |
3bd712e5 | 646 | |
b35684b8 JN |
647 | freq = panel->backlight.max; |
648 | if (panel->backlight.combination_mode) | |
649 | freq /= 0xff; | |
650 | ||
651 | ctl = freq << 17; | |
652 | if (IS_GEN2(dev) && panel->backlight.combination_mode) | |
653 | ctl |= BLM_LEGACY_MODE; | |
654 | if (IS_PINEVIEW(dev) && panel->backlight.active_low_pwm) | |
655 | ctl |= BLM_POLARITY_PNV; | |
656 | ||
657 | I915_WRITE(BLC_PWM_CTL, ctl); | |
658 | POSTING_READ(BLC_PWM_CTL); | |
659 | ||
660 | /* XXX: combine this into above write? */ | |
3bd712e5 | 661 | intel_panel_actually_set_backlight(connector, panel->backlight.level); |
7bd688cd | 662 | } |
8ba2d185 | 663 | |
7bd688cd JN |
664 | static void i965_enable_backlight(struct intel_connector *connector) |
665 | { | |
666 | struct drm_device *dev = connector->base.dev; | |
667 | struct drm_i915_private *dev_priv = dev->dev_private; | |
3bd712e5 | 668 | struct intel_panel *panel = &connector->panel; |
7bd688cd | 669 | enum pipe pipe = intel_get_pipe_from_connector(connector); |
b35684b8 | 670 | u32 ctl, ctl2, freq; |
7bd688cd | 671 | |
b35684b8 JN |
672 | ctl2 = I915_READ(BLC_PWM_CTL2); |
673 | if (ctl2 & BLM_PWM_ENABLE) { | |
674 | WARN(1, "backlight already enabled\n"); | |
675 | ctl2 &= ~BLM_PWM_ENABLE; | |
676 | I915_WRITE(BLC_PWM_CTL2, ctl2); | |
677 | } | |
7bd688cd | 678 | |
b35684b8 JN |
679 | freq = panel->backlight.max; |
680 | if (panel->backlight.combination_mode) | |
681 | freq /= 0xff; | |
7bd688cd | 682 | |
b35684b8 JN |
683 | ctl = freq << 16; |
684 | I915_WRITE(BLC_PWM_CTL, ctl); | |
3bd712e5 | 685 | |
b35684b8 | 686 | /* XXX: combine this into above write? */ |
3bd712e5 | 687 | intel_panel_actually_set_backlight(connector, panel->backlight.level); |
b35684b8 JN |
688 | |
689 | ctl2 = BLM_PIPE(pipe); | |
690 | if (panel->backlight.combination_mode) | |
691 | ctl2 |= BLM_COMBINATION_MODE; | |
692 | if (panel->backlight.active_low_pwm) | |
693 | ctl2 |= BLM_POLARITY_I965; | |
694 | I915_WRITE(BLC_PWM_CTL2, ctl2); | |
695 | POSTING_READ(BLC_PWM_CTL2); | |
696 | I915_WRITE(BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE); | |
7bd688cd JN |
697 | } |
698 | ||
699 | static void vlv_enable_backlight(struct intel_connector *connector) | |
700 | { | |
701 | struct drm_device *dev = connector->base.dev; | |
702 | struct drm_i915_private *dev_priv = dev->dev_private; | |
3bd712e5 | 703 | struct intel_panel *panel = &connector->panel; |
7bd688cd | 704 | enum pipe pipe = intel_get_pipe_from_connector(connector); |
b35684b8 | 705 | u32 ctl, ctl2; |
7bd688cd | 706 | |
b35684b8 JN |
707 | ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe)); |
708 | if (ctl2 & BLM_PWM_ENABLE) { | |
709 | WARN(1, "backlight already enabled\n"); | |
710 | ctl2 &= ~BLM_PWM_ENABLE; | |
711 | I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2); | |
712 | } | |
7bd688cd | 713 | |
b35684b8 JN |
714 | ctl = panel->backlight.max << 16; |
715 | I915_WRITE(VLV_BLC_PWM_CTL(pipe), ctl); | |
7bd688cd | 716 | |
b35684b8 JN |
717 | /* XXX: combine this into above write? */ |
718 | intel_panel_actually_set_backlight(connector, panel->backlight.level); | |
7bd688cd | 719 | |
b35684b8 JN |
720 | ctl2 = 0; |
721 | if (panel->backlight.active_low_pwm) | |
722 | ctl2 |= BLM_POLARITY_I965; | |
723 | I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2); | |
7bd688cd | 724 | POSTING_READ(VLV_BLC_PWM_CTL2(pipe)); |
b35684b8 | 725 | I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2 | BLM_PWM_ENABLE); |
47356eb6 CW |
726 | } |
727 | ||
752aa88a | 728 | void intel_panel_enable_backlight(struct intel_connector *connector) |
47356eb6 | 729 | { |
752aa88a | 730 | struct drm_device *dev = connector->base.dev; |
47356eb6 | 731 | struct drm_i915_private *dev_priv = dev->dev_private; |
58c68779 | 732 | struct intel_panel *panel = &connector->panel; |
752aa88a | 733 | enum pipe pipe = intel_get_pipe_from_connector(connector); |
8ba2d185 JN |
734 | unsigned long flags; |
735 | ||
752aa88a JB |
736 | if (pipe == INVALID_PIPE) |
737 | return; | |
738 | ||
6f2bcceb | 739 | DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe)); |
540b5d02 | 740 | |
58c68779 | 741 | spin_lock_irqsave(&dev_priv->backlight_lock, flags); |
47356eb6 | 742 | |
f91c15e0 JN |
743 | WARN_ON(panel->backlight.max == 0); |
744 | ||
58c68779 | 745 | if (panel->backlight.level == 0) { |
f91c15e0 | 746 | panel->backlight.level = panel->backlight.max; |
58c68779 JN |
747 | if (panel->backlight.device) |
748 | panel->backlight.device->props.brightness = | |
749 | panel->backlight.level; | |
b6b3ba5b | 750 | } |
47356eb6 | 751 | |
3bd712e5 | 752 | dev_priv->display.enable_backlight(connector); |
58c68779 | 753 | panel->backlight.enabled = true; |
8ba2d185 | 754 | |
58c68779 | 755 | spin_unlock_irqrestore(&dev_priv->backlight_lock, flags); |
47356eb6 CW |
756 | } |
757 | ||
fe16d949 CW |
758 | enum drm_connector_status |
759 | intel_panel_detect(struct drm_device *dev) | |
760 | { | |
761 | struct drm_i915_private *dev_priv = dev->dev_private; | |
762 | ||
763 | /* Assume that the BIOS does not lie through the OpRegion... */ | |
a726915c | 764 | if (!i915_panel_ignore_lid && dev_priv->opregion.lid_state) { |
fe16d949 CW |
765 | return ioread32(dev_priv->opregion.lid_state) & 0x1 ? |
766 | connector_status_connected : | |
767 | connector_status_disconnected; | |
a726915c | 768 | } |
fe16d949 | 769 | |
a726915c DV |
770 | switch (i915_panel_ignore_lid) { |
771 | case -2: | |
772 | return connector_status_connected; | |
773 | case -1: | |
774 | return connector_status_disconnected; | |
775 | default: | |
776 | return connector_status_unknown; | |
777 | } | |
fe16d949 | 778 | } |
aaa6fd2a | 779 | |
912e8b12 | 780 | #if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE) |
db31af1d | 781 | static int intel_backlight_device_update_status(struct backlight_device *bd) |
aaa6fd2a | 782 | { |
752aa88a JB |
783 | struct intel_connector *connector = bl_get_data(bd); |
784 | struct drm_device *dev = connector->base.dev; | |
785 | ||
786 | mutex_lock(&dev->mode_config.mutex); | |
540b5d02 CW |
787 | DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n", |
788 | bd->props.brightness, bd->props.max_brightness); | |
752aa88a | 789 | intel_panel_set_backlight(connector, bd->props.brightness, |
d6540632 | 790 | bd->props.max_brightness); |
752aa88a | 791 | mutex_unlock(&dev->mode_config.mutex); |
aaa6fd2a MG |
792 | return 0; |
793 | } | |
794 | ||
db31af1d | 795 | static int intel_backlight_device_get_brightness(struct backlight_device *bd) |
aaa6fd2a | 796 | { |
752aa88a JB |
797 | struct intel_connector *connector = bl_get_data(bd); |
798 | struct drm_device *dev = connector->base.dev; | |
7bd688cd | 799 | int ret; |
752aa88a JB |
800 | |
801 | mutex_lock(&dev->mode_config.mutex); | |
7bd688cd | 802 | ret = intel_panel_get_backlight(connector); |
752aa88a | 803 | mutex_unlock(&dev->mode_config.mutex); |
752aa88a | 804 | |
7bd688cd | 805 | return ret; |
aaa6fd2a MG |
806 | } |
807 | ||
db31af1d JN |
808 | static const struct backlight_ops intel_backlight_device_ops = { |
809 | .update_status = intel_backlight_device_update_status, | |
810 | .get_brightness = intel_backlight_device_get_brightness, | |
aaa6fd2a MG |
811 | }; |
812 | ||
db31af1d | 813 | static int intel_backlight_device_register(struct intel_connector *connector) |
aaa6fd2a | 814 | { |
58c68779 | 815 | struct intel_panel *panel = &connector->panel; |
aaa6fd2a | 816 | struct backlight_properties props; |
aaa6fd2a | 817 | |
58c68779 | 818 | if (WARN_ON(panel->backlight.device)) |
dc652f90 JN |
819 | return -ENODEV; |
820 | ||
7bd688cd JN |
821 | BUG_ON(panel->backlight.max == 0); |
822 | ||
af437cfd | 823 | memset(&props, 0, sizeof(props)); |
aaa6fd2a | 824 | props.type = BACKLIGHT_RAW; |
58c68779 | 825 | props.brightness = panel->backlight.level; |
7bd688cd | 826 | props.max_brightness = panel->backlight.max; |
58c68779 JN |
827 | |
828 | /* | |
829 | * Note: using the same name independent of the connector prevents | |
830 | * registration of multiple backlight devices in the driver. | |
831 | */ | |
832 | panel->backlight.device = | |
aaa6fd2a | 833 | backlight_device_register("intel_backlight", |
db31af1d JN |
834 | connector->base.kdev, |
835 | connector, | |
836 | &intel_backlight_device_ops, &props); | |
aaa6fd2a | 837 | |
58c68779 | 838 | if (IS_ERR(panel->backlight.device)) { |
aaa6fd2a | 839 | DRM_ERROR("Failed to register backlight: %ld\n", |
58c68779 JN |
840 | PTR_ERR(panel->backlight.device)); |
841 | panel->backlight.device = NULL; | |
aaa6fd2a MG |
842 | return -ENODEV; |
843 | } | |
aaa6fd2a MG |
844 | return 0; |
845 | } | |
846 | ||
db31af1d | 847 | static void intel_backlight_device_unregister(struct intel_connector *connector) |
aaa6fd2a | 848 | { |
58c68779 JN |
849 | struct intel_panel *panel = &connector->panel; |
850 | ||
851 | if (panel->backlight.device) { | |
852 | backlight_device_unregister(panel->backlight.device); | |
853 | panel->backlight.device = NULL; | |
dc652f90 | 854 | } |
aaa6fd2a | 855 | } |
db31af1d JN |
856 | #else /* CONFIG_BACKLIGHT_CLASS_DEVICE */ |
857 | static int intel_backlight_device_register(struct intel_connector *connector) | |
858 | { | |
859 | return 0; | |
860 | } | |
861 | static void intel_backlight_device_unregister(struct intel_connector *connector) | |
862 | { | |
863 | } | |
864 | #endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */ | |
865 | ||
f91c15e0 JN |
866 | /* |
867 | * Note: The setup hooks can't assume pipe is set! | |
868 | * | |
869 | * XXX: Query mode clock or hardware clock and program PWM modulation frequency | |
870 | * appropriately when it's 0. Use VBT and/or sane defaults. | |
871 | */ | |
7bd688cd JN |
872 | static int pch_setup_backlight(struct intel_connector *connector) |
873 | { | |
636baebf JN |
874 | struct drm_device *dev = connector->base.dev; |
875 | struct drm_i915_private *dev_priv = dev->dev_private; | |
7bd688cd | 876 | struct intel_panel *panel = &connector->panel; |
636baebf | 877 | u32 cpu_ctl2, pch_ctl1, pch_ctl2, val; |
7bd688cd | 878 | |
636baebf JN |
879 | pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); |
880 | panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY; | |
881 | ||
882 | pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2); | |
883 | panel->backlight.max = pch_ctl2 >> 16; | |
7bd688cd JN |
884 | if (!panel->backlight.max) |
885 | return -ENODEV; | |
886 | ||
887 | val = pch_get_backlight(connector); | |
888 | panel->backlight.level = intel_panel_compute_brightness(connector, val); | |
889 | ||
636baebf JN |
890 | cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2); |
891 | panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) && | |
892 | (pch_ctl1 & BLM_PCH_PWM_ENABLE) && panel->backlight.level != 0; | |
893 | ||
7bd688cd JN |
894 | return 0; |
895 | } | |
896 | ||
897 | static int i9xx_setup_backlight(struct intel_connector *connector) | |
898 | { | |
636baebf JN |
899 | struct drm_device *dev = connector->base.dev; |
900 | struct drm_i915_private *dev_priv = dev->dev_private; | |
7bd688cd | 901 | struct intel_panel *panel = &connector->panel; |
636baebf JN |
902 | u32 ctl, val; |
903 | ||
904 | ctl = I915_READ(BLC_PWM_CTL); | |
905 | ||
906 | if (IS_GEN2(dev)) | |
907 | panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE; | |
908 | ||
909 | if (IS_PINEVIEW(dev)) | |
910 | panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV; | |
911 | ||
912 | panel->backlight.max = ctl >> 17; | |
913 | if (panel->backlight.combination_mode) | |
914 | panel->backlight.max *= 0xff; | |
7bd688cd | 915 | |
7bd688cd JN |
916 | if (!panel->backlight.max) |
917 | return -ENODEV; | |
918 | ||
919 | val = i9xx_get_backlight(connector); | |
920 | panel->backlight.level = intel_panel_compute_brightness(connector, val); | |
921 | ||
636baebf JN |
922 | panel->backlight.enabled = panel->backlight.level != 0; |
923 | ||
7bd688cd JN |
924 | return 0; |
925 | } | |
926 | ||
927 | static int i965_setup_backlight(struct intel_connector *connector) | |
928 | { | |
636baebf JN |
929 | struct drm_device *dev = connector->base.dev; |
930 | struct drm_i915_private *dev_priv = dev->dev_private; | |
7bd688cd | 931 | struct intel_panel *panel = &connector->panel; |
636baebf JN |
932 | u32 ctl, ctl2, val; |
933 | ||
934 | ctl2 = I915_READ(BLC_PWM_CTL2); | |
935 | panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE; | |
936 | panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965; | |
937 | ||
938 | ctl = I915_READ(BLC_PWM_CTL); | |
939 | panel->backlight.max = ctl >> 16; | |
940 | if (panel->backlight.combination_mode) | |
941 | panel->backlight.max *= 0xff; | |
7bd688cd | 942 | |
7bd688cd JN |
943 | if (!panel->backlight.max) |
944 | return -ENODEV; | |
945 | ||
946 | val = i9xx_get_backlight(connector); | |
947 | panel->backlight.level = intel_panel_compute_brightness(connector, val); | |
948 | ||
636baebf JN |
949 | panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) && |
950 | panel->backlight.level != 0; | |
951 | ||
7bd688cd JN |
952 | return 0; |
953 | } | |
954 | ||
955 | static int vlv_setup_backlight(struct intel_connector *connector) | |
956 | { | |
957 | struct drm_device *dev = connector->base.dev; | |
958 | struct drm_i915_private *dev_priv = dev->dev_private; | |
959 | struct intel_panel *panel = &connector->panel; | |
960 | enum pipe pipe; | |
636baebf | 961 | u32 ctl, ctl2, val; |
7bd688cd JN |
962 | |
963 | for_each_pipe(pipe) { | |
964 | u32 cur_val = I915_READ(VLV_BLC_PWM_CTL(pipe)); | |
965 | ||
966 | /* Skip if the modulation freq is already set */ | |
967 | if (cur_val & ~BACKLIGHT_DUTY_CYCLE_MASK) | |
968 | continue; | |
969 | ||
970 | cur_val &= BACKLIGHT_DUTY_CYCLE_MASK; | |
971 | I915_WRITE(VLV_BLC_PWM_CTL(pipe), (0xf42 << 16) | | |
972 | cur_val); | |
973 | } | |
974 | ||
636baebf JN |
975 | ctl2 = I915_READ(VLV_BLC_PWM_CTL2(PIPE_A)); |
976 | panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965; | |
977 | ||
978 | ctl = I915_READ(VLV_BLC_PWM_CTL(PIPE_A)); | |
979 | panel->backlight.max = ctl >> 16; | |
7bd688cd JN |
980 | if (!panel->backlight.max) |
981 | return -ENODEV; | |
982 | ||
983 | val = _vlv_get_backlight(dev, PIPE_A); | |
984 | panel->backlight.level = intel_panel_compute_brightness(connector, val); | |
985 | ||
636baebf JN |
986 | panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) && |
987 | panel->backlight.level != 0; | |
988 | ||
7bd688cd JN |
989 | return 0; |
990 | } | |
991 | ||
0657b6b1 | 992 | int intel_panel_setup_backlight(struct drm_connector *connector) |
aaa6fd2a | 993 | { |
db31af1d | 994 | struct drm_device *dev = connector->dev; |
7bd688cd | 995 | struct drm_i915_private *dev_priv = dev->dev_private; |
db31af1d | 996 | struct intel_connector *intel_connector = to_intel_connector(connector); |
58c68779 | 997 | struct intel_panel *panel = &intel_connector->panel; |
7bd688cd JN |
998 | unsigned long flags; |
999 | int ret; | |
db31af1d | 1000 | |
7bd688cd JN |
1001 | /* set level and max in panel struct */ |
1002 | spin_lock_irqsave(&dev_priv->backlight_lock, flags); | |
1003 | ret = dev_priv->display.setup_backlight(intel_connector); | |
1004 | spin_unlock_irqrestore(&dev_priv->backlight_lock, flags); | |
1005 | ||
1006 | if (ret) { | |
1007 | DRM_DEBUG_KMS("failed to setup backlight for connector %s\n", | |
1008 | drm_get_connector_name(connector)); | |
1009 | return ret; | |
1010 | } | |
db31af1d | 1011 | |
db31af1d JN |
1012 | intel_backlight_device_register(intel_connector); |
1013 | ||
c91c9f32 JN |
1014 | panel->backlight.present = true; |
1015 | ||
c445b3b1 JN |
1016 | DRM_DEBUG_KMS("backlight initialized, %s, brightness %u/%u, " |
1017 | "sysfs interface %sregistered\n", | |
1018 | panel->backlight.enabled ? "enabled" : "disabled", | |
1019 | panel->backlight.level, panel->backlight.max, | |
1020 | panel->backlight.device ? "" : "not "); | |
1021 | ||
aaa6fd2a MG |
1022 | return 0; |
1023 | } | |
1024 | ||
db31af1d | 1025 | void intel_panel_destroy_backlight(struct drm_connector *connector) |
aaa6fd2a | 1026 | { |
db31af1d | 1027 | struct intel_connector *intel_connector = to_intel_connector(connector); |
c91c9f32 | 1028 | struct intel_panel *panel = &intel_connector->panel; |
db31af1d | 1029 | |
c91c9f32 | 1030 | panel->backlight.present = false; |
db31af1d | 1031 | intel_backlight_device_unregister(intel_connector); |
aaa6fd2a | 1032 | } |
1d508706 | 1033 | |
7bd688cd JN |
1034 | /* Set up chip specific backlight functions */ |
1035 | void intel_panel_init_backlight_funcs(struct drm_device *dev) | |
1036 | { | |
1037 | struct drm_i915_private *dev_priv = dev->dev_private; | |
1038 | ||
1039 | if (HAS_PCH_SPLIT(dev)) { | |
1040 | dev_priv->display.setup_backlight = pch_setup_backlight; | |
1041 | dev_priv->display.enable_backlight = pch_enable_backlight; | |
1042 | dev_priv->display.disable_backlight = pch_disable_backlight; | |
1043 | dev_priv->display.set_backlight = pch_set_backlight; | |
1044 | dev_priv->display.get_backlight = pch_get_backlight; | |
7bd688cd JN |
1045 | } else if (IS_VALLEYVIEW(dev)) { |
1046 | dev_priv->display.setup_backlight = vlv_setup_backlight; | |
1047 | dev_priv->display.enable_backlight = vlv_enable_backlight; | |
1048 | dev_priv->display.disable_backlight = vlv_disable_backlight; | |
1049 | dev_priv->display.set_backlight = vlv_set_backlight; | |
1050 | dev_priv->display.get_backlight = vlv_get_backlight; | |
7bd688cd JN |
1051 | } else if (IS_GEN4(dev)) { |
1052 | dev_priv->display.setup_backlight = i965_setup_backlight; | |
1053 | dev_priv->display.enable_backlight = i965_enable_backlight; | |
1054 | dev_priv->display.disable_backlight = i965_disable_backlight; | |
1055 | dev_priv->display.set_backlight = i9xx_set_backlight; | |
1056 | dev_priv->display.get_backlight = i9xx_get_backlight; | |
7bd688cd JN |
1057 | } else { |
1058 | dev_priv->display.setup_backlight = i9xx_setup_backlight; | |
3bd712e5 JN |
1059 | dev_priv->display.enable_backlight = i9xx_enable_backlight; |
1060 | dev_priv->display.disable_backlight = i9xx_disable_backlight; | |
7bd688cd JN |
1061 | dev_priv->display.set_backlight = i9xx_set_backlight; |
1062 | dev_priv->display.get_backlight = i9xx_get_backlight; | |
7bd688cd JN |
1063 | } |
1064 | } | |
1065 | ||
dd06f90e JN |
1066 | int intel_panel_init(struct intel_panel *panel, |
1067 | struct drm_display_mode *fixed_mode) | |
1d508706 | 1068 | { |
dd06f90e JN |
1069 | panel->fixed_mode = fixed_mode; |
1070 | ||
1d508706 JN |
1071 | return 0; |
1072 | } | |
1073 | ||
1074 | void intel_panel_fini(struct intel_panel *panel) | |
1075 | { | |
dd06f90e JN |
1076 | struct intel_connector *intel_connector = |
1077 | container_of(panel, struct intel_connector, panel); | |
1078 | ||
1079 | if (panel->fixed_mode) | |
1080 | drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode); | |
1d508706 | 1081 | } |