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1d8e1c75 CW |
1 | /* |
2 | * Copyright © 2006-2010 Intel Corporation | |
3 | * Copyright (c) 2006 Dave Airlie <airlied@linux.ie> | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining a | |
6 | * copy of this software and associated documentation files (the "Software"), | |
7 | * to deal in the Software without restriction, including without limitation | |
8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
9 | * and/or sell copies of the Software, and to permit persons to whom the | |
10 | * Software is furnished to do so, subject to the following conditions: | |
11 | * | |
12 | * The above copyright notice and this permission notice (including the next | |
13 | * paragraph) shall be included in all copies or substantial portions of the | |
14 | * Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | |
22 | * DEALINGS IN THE SOFTWARE. | |
23 | * | |
24 | * Authors: | |
25 | * Eric Anholt <eric@anholt.net> | |
26 | * Dave Airlie <airlied@linux.ie> | |
27 | * Jesse Barnes <jesse.barnes@intel.com> | |
28 | * Chris Wilson <chris@chris-wilson.co.uk> | |
29 | */ | |
30 | ||
a70491cc JP |
31 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
32 | ||
7bd90909 | 33 | #include <linux/moduleparam.h> |
1d8e1c75 CW |
34 | #include "intel_drv.h" |
35 | ||
ba3820ad TI |
36 | #define PCI_LBPC 0xf4 /* legacy/combination backlight modes */ |
37 | ||
1d8e1c75 | 38 | void |
4c6df4b4 | 39 | intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode, |
1d8e1c75 CW |
40 | struct drm_display_mode *adjusted_mode) |
41 | { | |
4c6df4b4 | 42 | drm_mode_copy(adjusted_mode, fixed_mode); |
a52690e4 ID |
43 | |
44 | drm_mode_set_crtcinfo(adjusted_mode, 0); | |
1d8e1c75 CW |
45 | } |
46 | ||
47 | /* adjusted_mode has been preset to be the panel's fixed mode */ | |
48 | void | |
b074cec8 JB |
49 | intel_pch_panel_fitting(struct intel_crtc *intel_crtc, |
50 | struct intel_crtc_config *pipe_config, | |
51 | int fitting_mode) | |
1d8e1c75 | 52 | { |
37327abd | 53 | struct drm_display_mode *adjusted_mode; |
1d8e1c75 CW |
54 | int x, y, width, height; |
55 | ||
b074cec8 JB |
56 | adjusted_mode = &pipe_config->adjusted_mode; |
57 | ||
1d8e1c75 CW |
58 | x = y = width = height = 0; |
59 | ||
60 | /* Native modes don't need fitting */ | |
37327abd VS |
61 | if (adjusted_mode->hdisplay == pipe_config->pipe_src_w && |
62 | adjusted_mode->vdisplay == pipe_config->pipe_src_h) | |
1d8e1c75 CW |
63 | goto done; |
64 | ||
65 | switch (fitting_mode) { | |
66 | case DRM_MODE_SCALE_CENTER: | |
37327abd VS |
67 | width = pipe_config->pipe_src_w; |
68 | height = pipe_config->pipe_src_h; | |
1d8e1c75 CW |
69 | x = (adjusted_mode->hdisplay - width + 1)/2; |
70 | y = (adjusted_mode->vdisplay - height + 1)/2; | |
71 | break; | |
72 | ||
73 | case DRM_MODE_SCALE_ASPECT: | |
74 | /* Scale but preserve the aspect ratio */ | |
75 | { | |
9084e7d2 DV |
76 | u32 scaled_width = adjusted_mode->hdisplay |
77 | * pipe_config->pipe_src_h; | |
78 | u32 scaled_height = pipe_config->pipe_src_w | |
79 | * adjusted_mode->vdisplay; | |
1d8e1c75 | 80 | if (scaled_width > scaled_height) { /* pillar */ |
37327abd | 81 | width = scaled_height / pipe_config->pipe_src_h; |
302983e9 | 82 | if (width & 1) |
0206e353 | 83 | width++; |
1d8e1c75 CW |
84 | x = (adjusted_mode->hdisplay - width + 1) / 2; |
85 | y = 0; | |
86 | height = adjusted_mode->vdisplay; | |
87 | } else if (scaled_width < scaled_height) { /* letter */ | |
37327abd | 88 | height = scaled_width / pipe_config->pipe_src_w; |
302983e9 AJ |
89 | if (height & 1) |
90 | height++; | |
1d8e1c75 CW |
91 | y = (adjusted_mode->vdisplay - height + 1) / 2; |
92 | x = 0; | |
93 | width = adjusted_mode->hdisplay; | |
94 | } else { | |
95 | x = y = 0; | |
96 | width = adjusted_mode->hdisplay; | |
97 | height = adjusted_mode->vdisplay; | |
98 | } | |
99 | } | |
100 | break; | |
101 | ||
1d8e1c75 CW |
102 | case DRM_MODE_SCALE_FULLSCREEN: |
103 | x = y = 0; | |
104 | width = adjusted_mode->hdisplay; | |
105 | height = adjusted_mode->vdisplay; | |
106 | break; | |
ab3e67f4 JB |
107 | |
108 | default: | |
109 | WARN(1, "bad panel fit mode: %d\n", fitting_mode); | |
110 | return; | |
1d8e1c75 CW |
111 | } |
112 | ||
113 | done: | |
b074cec8 JB |
114 | pipe_config->pch_pfit.pos = (x << 16) | y; |
115 | pipe_config->pch_pfit.size = (width << 16) | height; | |
fd4daa9c | 116 | pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0; |
1d8e1c75 | 117 | } |
a9573556 | 118 | |
2dd24552 JB |
119 | static void |
120 | centre_horizontally(struct drm_display_mode *mode, | |
121 | int width) | |
122 | { | |
123 | u32 border, sync_pos, blank_width, sync_width; | |
124 | ||
125 | /* keep the hsync and hblank widths constant */ | |
126 | sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start; | |
127 | blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start; | |
128 | sync_pos = (blank_width - sync_width + 1) / 2; | |
129 | ||
130 | border = (mode->hdisplay - width + 1) / 2; | |
131 | border += border & 1; /* make the border even */ | |
132 | ||
133 | mode->crtc_hdisplay = width; | |
134 | mode->crtc_hblank_start = width + border; | |
135 | mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width; | |
136 | ||
137 | mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos; | |
138 | mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width; | |
139 | } | |
140 | ||
141 | static void | |
142 | centre_vertically(struct drm_display_mode *mode, | |
143 | int height) | |
144 | { | |
145 | u32 border, sync_pos, blank_width, sync_width; | |
146 | ||
147 | /* keep the vsync and vblank widths constant */ | |
148 | sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start; | |
149 | blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start; | |
150 | sync_pos = (blank_width - sync_width + 1) / 2; | |
151 | ||
152 | border = (mode->vdisplay - height + 1) / 2; | |
153 | ||
154 | mode->crtc_vdisplay = height; | |
155 | mode->crtc_vblank_start = height + border; | |
156 | mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width; | |
157 | ||
158 | mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos; | |
159 | mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width; | |
160 | } | |
161 | ||
162 | static inline u32 panel_fitter_scaling(u32 source, u32 target) | |
163 | { | |
164 | /* | |
165 | * Floating point operation is not supported. So the FACTOR | |
166 | * is defined, which can avoid the floating point computation | |
167 | * when calculating the panel ratio. | |
168 | */ | |
169 | #define ACCURACY 12 | |
170 | #define FACTOR (1 << ACCURACY) | |
171 | u32 ratio = source * FACTOR / target; | |
172 | return (FACTOR * ratio + FACTOR/2) / FACTOR; | |
173 | } | |
174 | ||
9084e7d2 DV |
175 | static void i965_scale_aspect(struct intel_crtc_config *pipe_config, |
176 | u32 *pfit_control) | |
177 | { | |
178 | struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode; | |
179 | u32 scaled_width = adjusted_mode->hdisplay * | |
180 | pipe_config->pipe_src_h; | |
181 | u32 scaled_height = pipe_config->pipe_src_w * | |
182 | adjusted_mode->vdisplay; | |
183 | ||
184 | /* 965+ is easy, it does everything in hw */ | |
185 | if (scaled_width > scaled_height) | |
186 | *pfit_control |= PFIT_ENABLE | | |
187 | PFIT_SCALING_PILLAR; | |
188 | else if (scaled_width < scaled_height) | |
189 | *pfit_control |= PFIT_ENABLE | | |
190 | PFIT_SCALING_LETTER; | |
191 | else if (adjusted_mode->hdisplay != pipe_config->pipe_src_w) | |
192 | *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO; | |
193 | } | |
194 | ||
195 | static void i9xx_scale_aspect(struct intel_crtc_config *pipe_config, | |
196 | u32 *pfit_control, u32 *pfit_pgm_ratios, | |
197 | u32 *border) | |
198 | { | |
199 | struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode; | |
200 | u32 scaled_width = adjusted_mode->hdisplay * | |
201 | pipe_config->pipe_src_h; | |
202 | u32 scaled_height = pipe_config->pipe_src_w * | |
203 | adjusted_mode->vdisplay; | |
204 | u32 bits; | |
205 | ||
206 | /* | |
207 | * For earlier chips we have to calculate the scaling | |
208 | * ratio by hand and program it into the | |
209 | * PFIT_PGM_RATIO register | |
210 | */ | |
211 | if (scaled_width > scaled_height) { /* pillar */ | |
212 | centre_horizontally(adjusted_mode, | |
213 | scaled_height / | |
214 | pipe_config->pipe_src_h); | |
215 | ||
216 | *border = LVDS_BORDER_ENABLE; | |
217 | if (pipe_config->pipe_src_h != adjusted_mode->vdisplay) { | |
218 | bits = panel_fitter_scaling(pipe_config->pipe_src_h, | |
219 | adjusted_mode->vdisplay); | |
220 | ||
221 | *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | | |
222 | bits << PFIT_VERT_SCALE_SHIFT); | |
223 | *pfit_control |= (PFIT_ENABLE | | |
224 | VERT_INTERP_BILINEAR | | |
225 | HORIZ_INTERP_BILINEAR); | |
226 | } | |
227 | } else if (scaled_width < scaled_height) { /* letter */ | |
228 | centre_vertically(adjusted_mode, | |
229 | scaled_width / | |
230 | pipe_config->pipe_src_w); | |
231 | ||
232 | *border = LVDS_BORDER_ENABLE; | |
233 | if (pipe_config->pipe_src_w != adjusted_mode->hdisplay) { | |
234 | bits = panel_fitter_scaling(pipe_config->pipe_src_w, | |
235 | adjusted_mode->hdisplay); | |
236 | ||
237 | *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | | |
238 | bits << PFIT_VERT_SCALE_SHIFT); | |
239 | *pfit_control |= (PFIT_ENABLE | | |
240 | VERT_INTERP_BILINEAR | | |
241 | HORIZ_INTERP_BILINEAR); | |
242 | } | |
243 | } else { | |
244 | /* Aspects match, Let hw scale both directions */ | |
245 | *pfit_control |= (PFIT_ENABLE | | |
246 | VERT_AUTO_SCALE | HORIZ_AUTO_SCALE | | |
247 | VERT_INTERP_BILINEAR | | |
248 | HORIZ_INTERP_BILINEAR); | |
249 | } | |
250 | } | |
251 | ||
2dd24552 JB |
252 | void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc, |
253 | struct intel_crtc_config *pipe_config, | |
254 | int fitting_mode) | |
255 | { | |
256 | struct drm_device *dev = intel_crtc->base.dev; | |
2dd24552 | 257 | u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0; |
37327abd | 258 | struct drm_display_mode *adjusted_mode; |
2dd24552 | 259 | |
2dd24552 JB |
260 | adjusted_mode = &pipe_config->adjusted_mode; |
261 | ||
262 | /* Native modes don't need fitting */ | |
37327abd VS |
263 | if (adjusted_mode->hdisplay == pipe_config->pipe_src_w && |
264 | adjusted_mode->vdisplay == pipe_config->pipe_src_h) | |
2dd24552 JB |
265 | goto out; |
266 | ||
267 | switch (fitting_mode) { | |
268 | case DRM_MODE_SCALE_CENTER: | |
269 | /* | |
270 | * For centered modes, we have to calculate border widths & | |
271 | * heights and modify the values programmed into the CRTC. | |
272 | */ | |
37327abd VS |
273 | centre_horizontally(adjusted_mode, pipe_config->pipe_src_w); |
274 | centre_vertically(adjusted_mode, pipe_config->pipe_src_h); | |
2dd24552 JB |
275 | border = LVDS_BORDER_ENABLE; |
276 | break; | |
277 | case DRM_MODE_SCALE_ASPECT: | |
278 | /* Scale but preserve the aspect ratio */ | |
9084e7d2 DV |
279 | if (INTEL_INFO(dev)->gen >= 4) |
280 | i965_scale_aspect(pipe_config, &pfit_control); | |
281 | else | |
282 | i9xx_scale_aspect(pipe_config, &pfit_control, | |
283 | &pfit_pgm_ratios, &border); | |
2dd24552 | 284 | break; |
2dd24552 JB |
285 | case DRM_MODE_SCALE_FULLSCREEN: |
286 | /* | |
287 | * Full scaling, even if it changes the aspect ratio. | |
288 | * Fortunately this is all done for us in hw. | |
289 | */ | |
37327abd VS |
290 | if (pipe_config->pipe_src_h != adjusted_mode->vdisplay || |
291 | pipe_config->pipe_src_w != adjusted_mode->hdisplay) { | |
2dd24552 JB |
292 | pfit_control |= PFIT_ENABLE; |
293 | if (INTEL_INFO(dev)->gen >= 4) | |
294 | pfit_control |= PFIT_SCALING_AUTO; | |
295 | else | |
296 | pfit_control |= (VERT_AUTO_SCALE | | |
297 | VERT_INTERP_BILINEAR | | |
298 | HORIZ_AUTO_SCALE | | |
299 | HORIZ_INTERP_BILINEAR); | |
300 | } | |
301 | break; | |
ab3e67f4 JB |
302 | default: |
303 | WARN(1, "bad panel fit mode: %d\n", fitting_mode); | |
304 | return; | |
2dd24552 JB |
305 | } |
306 | ||
307 | /* 965+ wants fuzzy fitting */ | |
308 | /* FIXME: handle multiple panels by failing gracefully */ | |
309 | if (INTEL_INFO(dev)->gen >= 4) | |
310 | pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) | | |
311 | PFIT_FILTER_FUZZY); | |
312 | ||
313 | out: | |
314 | if ((pfit_control & PFIT_ENABLE) == 0) { | |
315 | pfit_control = 0; | |
316 | pfit_pgm_ratios = 0; | |
317 | } | |
318 | ||
319 | /* Make sure pre-965 set dither correctly for 18bpp panels. */ | |
320 | if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18) | |
321 | pfit_control |= PANEL_8TO6_DITHER_ENABLE; | |
322 | ||
2deefda5 DV |
323 | pipe_config->gmch_pfit.control = pfit_control; |
324 | pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios; | |
68fc8742 | 325 | pipe_config->gmch_pfit.lvds_border_bits = border; |
2dd24552 JB |
326 | } |
327 | ||
ba3820ad TI |
328 | static int is_backlight_combination_mode(struct drm_device *dev) |
329 | { | |
330 | struct drm_i915_private *dev_priv = dev->dev_private; | |
331 | ||
d9c638d5 | 332 | if (IS_GEN4(dev)) |
ba3820ad TI |
333 | return I915_READ(BLC_PWM_CTL2) & BLM_COMBINATION_MODE; |
334 | ||
335 | if (IS_GEN2(dev)) | |
336 | return I915_READ(BLC_PWM_CTL) & BLM_LEGACY_MODE; | |
337 | ||
338 | return 0; | |
339 | } | |
340 | ||
7bd688cd | 341 | static u32 pch_get_max_backlight(struct intel_connector *connector) |
0b0b053a | 342 | { |
7bd688cd | 343 | struct drm_device *dev = connector->base.dev; |
bfd7590d | 344 | struct drm_i915_private *dev_priv = dev->dev_private; |
0b0b053a CW |
345 | u32 val; |
346 | ||
7bd688cd JN |
347 | val = I915_READ(BLC_PWM_PCH_CTL2); |
348 | if (dev_priv->regfile.saveBLC_PWM_CTL2 == 0) { | |
349 | dev_priv->regfile.saveBLC_PWM_CTL2 = val; | |
350 | } else if (val == 0) { | |
351 | val = dev_priv->regfile.saveBLC_PWM_CTL2; | |
352 | I915_WRITE(BLC_PWM_PCH_CTL2, val); | |
353 | } | |
8ba2d185 | 354 | |
7bd688cd | 355 | val >>= 16; |
0b0b053a | 356 | |
7bd688cd JN |
357 | return val; |
358 | } | |
07bf139b | 359 | |
7bd688cd JN |
360 | static u32 i9xx_get_max_backlight(struct intel_connector *connector) |
361 | { | |
362 | struct drm_device *dev = connector->base.dev; | |
363 | struct drm_i915_private *dev_priv = dev->dev_private; | |
364 | u32 val; | |
365 | ||
366 | val = I915_READ(BLC_PWM_CTL); | |
367 | if (dev_priv->regfile.saveBLC_PWM_CTL == 0) { | |
368 | dev_priv->regfile.saveBLC_PWM_CTL = val; | |
369 | } else if (val == 0) { | |
370 | val = dev_priv->regfile.saveBLC_PWM_CTL; | |
371 | I915_WRITE(BLC_PWM_CTL, val); | |
0b0b053a CW |
372 | } |
373 | ||
7bd688cd JN |
374 | val >>= 17; |
375 | ||
376 | if (is_backlight_combination_mode(dev)) | |
377 | val *= 0xff; | |
378 | ||
0b0b053a CW |
379 | return val; |
380 | } | |
381 | ||
7bd688cd | 382 | static u32 i965_get_max_backlight(struct intel_connector *connector) |
a9573556 | 383 | { |
7bd688cd JN |
384 | struct drm_device *dev = connector->base.dev; |
385 | struct drm_i915_private *dev_priv = dev->dev_private; | |
386 | u32 val; | |
387 | ||
388 | val = I915_READ(BLC_PWM_CTL); | |
389 | if (dev_priv->regfile.saveBLC_PWM_CTL == 0) { | |
390 | dev_priv->regfile.saveBLC_PWM_CTL = val; | |
391 | dev_priv->regfile.saveBLC_PWM_CTL2 = I915_READ(BLC_PWM_CTL2); | |
392 | } else if (val == 0) { | |
393 | val = dev_priv->regfile.saveBLC_PWM_CTL; | |
394 | I915_WRITE(BLC_PWM_CTL, val); | |
395 | I915_WRITE(BLC_PWM_CTL2, dev_priv->regfile.saveBLC_PWM_CTL2); | |
396 | } | |
a9573556 | 397 | |
7bd688cd | 398 | val >>= 16; |
0b0b053a | 399 | |
7bd688cd JN |
400 | if (is_backlight_combination_mode(dev)) |
401 | val *= 0xff; | |
402 | ||
403 | return val; | |
404 | } | |
405 | ||
406 | static u32 _vlv_get_max_backlight(struct drm_device *dev, enum pipe pipe) | |
407 | { | |
408 | struct drm_i915_private *dev_priv = dev->dev_private; | |
409 | u32 val; | |
ba3820ad | 410 | |
7bd688cd JN |
411 | val = I915_READ(VLV_BLC_PWM_CTL(pipe)); |
412 | if (dev_priv->regfile.saveBLC_PWM_CTL == 0) { | |
413 | dev_priv->regfile.saveBLC_PWM_CTL = val; | |
414 | dev_priv->regfile.saveBLC_PWM_CTL2 = | |
415 | I915_READ(VLV_BLC_PWM_CTL2(pipe)); | |
416 | } else if (val == 0) { | |
417 | val = dev_priv->regfile.saveBLC_PWM_CTL; | |
418 | I915_WRITE(VLV_BLC_PWM_CTL(pipe), val); | |
419 | I915_WRITE(VLV_BLC_PWM_CTL2(pipe), | |
420 | dev_priv->regfile.saveBLC_PWM_CTL2); | |
a9573556 CW |
421 | } |
422 | ||
7bd688cd JN |
423 | if (!val) |
424 | val = 0x0f42ffff; | |
425 | ||
426 | val >>= 16; | |
427 | ||
428 | return val; | |
429 | } | |
430 | ||
431 | static u32 vlv_get_max_backlight(struct intel_connector *connector) | |
432 | { | |
433 | struct drm_device *dev = connector->base.dev; | |
434 | enum pipe pipe = intel_get_pipe_from_connector(connector); | |
435 | ||
436 | return _vlv_get_max_backlight(dev, pipe); | |
437 | } | |
438 | ||
7bd688cd JN |
439 | static u32 intel_panel_get_max_backlight(struct intel_connector *connector) |
440 | { | |
441 | struct drm_device *dev = connector->base.dev; | |
442 | struct drm_i915_private *dev_priv = dev->dev_private; | |
443 | u32 max; | |
444 | ||
445 | WARN_ON_SMP(!spin_is_locked(&dev_priv->backlight_lock)); | |
446 | ||
447 | max = dev_priv->display.get_max_backlight(connector); | |
448 | ||
a9573556 | 449 | DRM_DEBUG_DRIVER("max backlight PWM = %d\n", max); |
d6540632 | 450 | |
a9573556 CW |
451 | return max; |
452 | } | |
453 | ||
4dca20ef CE |
454 | static int i915_panel_invert_brightness; |
455 | MODULE_PARM_DESC(invert_brightness, "Invert backlight brightness " | |
456 | "(-1 force normal, 0 machine defaults, 1 force inversion), please " | |
7bd90909 CE |
457 | "report PCI device ID, subsystem vendor and subsystem device ID " |
458 | "to dri-devel@lists.freedesktop.org, if your machine needs it. " | |
459 | "It will then be included in an upcoming module version."); | |
4dca20ef | 460 | module_param_named(invert_brightness, i915_panel_invert_brightness, int, 0600); |
7bd688cd JN |
461 | static u32 intel_panel_compute_brightness(struct intel_connector *connector, |
462 | u32 val) | |
7bd90909 | 463 | { |
7bd688cd | 464 | struct drm_device *dev = connector->base.dev; |
4dca20ef | 465 | struct drm_i915_private *dev_priv = dev->dev_private; |
f91c15e0 JN |
466 | struct intel_panel *panel = &connector->panel; |
467 | ||
468 | WARN_ON(panel->backlight.max == 0); | |
4dca20ef CE |
469 | |
470 | if (i915_panel_invert_brightness < 0) | |
471 | return val; | |
472 | ||
473 | if (i915_panel_invert_brightness > 0 || | |
d6540632 | 474 | dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) { |
f91c15e0 | 475 | return panel->backlight.max - val; |
d6540632 | 476 | } |
7bd90909 CE |
477 | |
478 | return val; | |
479 | } | |
480 | ||
7bd688cd | 481 | static u32 pch_get_backlight(struct intel_connector *connector) |
a9573556 | 482 | { |
7bd688cd | 483 | struct drm_device *dev = connector->base.dev; |
a9573556 | 484 | struct drm_i915_private *dev_priv = dev->dev_private; |
8ba2d185 | 485 | |
7bd688cd JN |
486 | return I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; |
487 | } | |
a9573556 | 488 | |
7bd688cd JN |
489 | static u32 i9xx_get_backlight(struct intel_connector *connector) |
490 | { | |
491 | struct drm_device *dev = connector->base.dev; | |
492 | struct drm_i915_private *dev_priv = dev->dev_private; | |
493 | u32 val; | |
07bf139b | 494 | |
7bd688cd JN |
495 | val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; |
496 | if (INTEL_INFO(dev)->gen < 4) | |
497 | val >>= 1; | |
ba3820ad | 498 | |
7bd688cd JN |
499 | if (is_backlight_combination_mode(dev)) { |
500 | u8 lbpc; | |
ba3820ad | 501 | |
7bd688cd JN |
502 | pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc); |
503 | val *= lbpc; | |
a9573556 CW |
504 | } |
505 | ||
7bd688cd JN |
506 | return val; |
507 | } | |
508 | ||
509 | static u32 _vlv_get_backlight(struct drm_device *dev, enum pipe pipe) | |
510 | { | |
511 | struct drm_i915_private *dev_priv = dev->dev_private; | |
512 | ||
513 | return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK; | |
514 | } | |
515 | ||
516 | static u32 vlv_get_backlight(struct intel_connector *connector) | |
517 | { | |
518 | struct drm_device *dev = connector->base.dev; | |
519 | enum pipe pipe = intel_get_pipe_from_connector(connector); | |
520 | ||
521 | return _vlv_get_backlight(dev, pipe); | |
522 | } | |
523 | ||
524 | static u32 intel_panel_get_backlight(struct intel_connector *connector) | |
525 | { | |
526 | struct drm_device *dev = connector->base.dev; | |
527 | struct drm_i915_private *dev_priv = dev->dev_private; | |
528 | u32 val; | |
529 | unsigned long flags; | |
530 | ||
531 | spin_lock_irqsave(&dev_priv->backlight_lock, flags); | |
532 | ||
533 | val = dev_priv->display.get_backlight(connector); | |
534 | val = intel_panel_compute_brightness(connector, val); | |
8ba2d185 | 535 | |
58c68779 | 536 | spin_unlock_irqrestore(&dev_priv->backlight_lock, flags); |
8ba2d185 | 537 | |
a9573556 CW |
538 | DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val); |
539 | return val; | |
540 | } | |
541 | ||
7bd688cd | 542 | static void pch_set_backlight(struct intel_connector *connector, u32 level) |
a9573556 | 543 | { |
7bd688cd | 544 | struct drm_device *dev = connector->base.dev; |
a9573556 | 545 | struct drm_i915_private *dev_priv = dev->dev_private; |
7bd688cd JN |
546 | u32 tmp; |
547 | ||
548 | tmp = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK; | |
549 | I915_WRITE(BLC_PWM_CPU_CTL, tmp | level); | |
a9573556 CW |
550 | } |
551 | ||
7bd688cd | 552 | static void i9xx_set_backlight(struct intel_connector *connector, u32 level) |
a9573556 | 553 | { |
7bd688cd | 554 | struct drm_device *dev = connector->base.dev; |
a9573556 | 555 | struct drm_i915_private *dev_priv = dev->dev_private; |
f91c15e0 | 556 | struct intel_panel *panel = &connector->panel; |
b329b328 | 557 | u32 tmp, mask; |
ba3820ad | 558 | |
f91c15e0 JN |
559 | WARN_ON(panel->backlight.max == 0); |
560 | ||
0206e353 | 561 | if (is_backlight_combination_mode(dev)) { |
ba3820ad TI |
562 | u8 lbpc; |
563 | ||
f91c15e0 | 564 | lbpc = level * 0xfe / panel->backlight.max + 1; |
ba3820ad TI |
565 | level /= lbpc; |
566 | pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc); | |
567 | } | |
568 | ||
b329b328 JN |
569 | if (IS_GEN4(dev)) { |
570 | mask = BACKLIGHT_DUTY_CYCLE_MASK; | |
571 | } else { | |
a9573556 | 572 | level <<= 1; |
b329b328 JN |
573 | mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV; |
574 | } | |
7bd688cd | 575 | |
b329b328 | 576 | tmp = I915_READ(BLC_PWM_CTL) & ~mask; |
7bd688cd JN |
577 | I915_WRITE(BLC_PWM_CTL, tmp | level); |
578 | } | |
579 | ||
580 | static void vlv_set_backlight(struct intel_connector *connector, u32 level) | |
581 | { | |
582 | struct drm_device *dev = connector->base.dev; | |
583 | struct drm_i915_private *dev_priv = dev->dev_private; | |
584 | enum pipe pipe = intel_get_pipe_from_connector(connector); | |
585 | u32 tmp; | |
586 | ||
587 | tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK; | |
588 | I915_WRITE(VLV_BLC_PWM_CTL(pipe), tmp | level); | |
589 | } | |
590 | ||
591 | static void | |
592 | intel_panel_actually_set_backlight(struct intel_connector *connector, u32 level) | |
593 | { | |
594 | struct drm_device *dev = connector->base.dev; | |
595 | struct drm_i915_private *dev_priv = dev->dev_private; | |
596 | ||
597 | DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level); | |
598 | ||
599 | level = intel_panel_compute_brightness(connector, level); | |
600 | dev_priv->display.set_backlight(connector, level); | |
a9573556 | 601 | } |
47356eb6 | 602 | |
d6540632 | 603 | /* set backlight brightness to level in range [0..max] */ |
752aa88a JB |
604 | void intel_panel_set_backlight(struct intel_connector *connector, u32 level, |
605 | u32 max) | |
47356eb6 | 606 | { |
752aa88a | 607 | struct drm_device *dev = connector->base.dev; |
47356eb6 | 608 | struct drm_i915_private *dev_priv = dev->dev_private; |
58c68779 | 609 | struct intel_panel *panel = &connector->panel; |
752aa88a | 610 | enum pipe pipe = intel_get_pipe_from_connector(connector); |
d6540632 | 611 | u32 freq; |
8ba2d185 JN |
612 | unsigned long flags; |
613 | ||
752aa88a JB |
614 | if (pipe == INVALID_PIPE) |
615 | return; | |
616 | ||
58c68779 | 617 | spin_lock_irqsave(&dev_priv->backlight_lock, flags); |
d6540632 | 618 | |
f91c15e0 | 619 | WARN_ON(panel->backlight.max == 0); |
d6540632 | 620 | |
f91c15e0 JN |
621 | /* scale to hardware max, but be careful to not overflow */ |
622 | freq = panel->backlight.max; | |
22505b82 AL |
623 | if (freq < max) |
624 | level = level * freq / max; | |
625 | else | |
626 | level = freq / max * level; | |
47356eb6 | 627 | |
58c68779 JN |
628 | panel->backlight.level = level; |
629 | if (panel->backlight.device) | |
630 | panel->backlight.device->props.brightness = level; | |
b6b3ba5b | 631 | |
58c68779 | 632 | if (panel->backlight.enabled) |
7bd688cd | 633 | intel_panel_actually_set_backlight(connector, level); |
f91c15e0 | 634 | |
58c68779 | 635 | spin_unlock_irqrestore(&dev_priv->backlight_lock, flags); |
f52c619a TI |
636 | } |
637 | ||
7bd688cd JN |
638 | static void pch_disable_backlight(struct intel_connector *connector) |
639 | { | |
640 | struct drm_device *dev = connector->base.dev; | |
641 | struct drm_i915_private *dev_priv = dev->dev_private; | |
642 | u32 tmp; | |
643 | ||
3bd712e5 JN |
644 | intel_panel_actually_set_backlight(connector, 0); |
645 | ||
7bd688cd JN |
646 | tmp = I915_READ(BLC_PWM_CPU_CTL2); |
647 | I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE); | |
648 | ||
649 | tmp = I915_READ(BLC_PWM_PCH_CTL1); | |
650 | I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE); | |
651 | } | |
652 | ||
3bd712e5 JN |
653 | static void i9xx_disable_backlight(struct intel_connector *connector) |
654 | { | |
655 | intel_panel_actually_set_backlight(connector, 0); | |
656 | } | |
657 | ||
7bd688cd JN |
658 | static void i965_disable_backlight(struct intel_connector *connector) |
659 | { | |
660 | struct drm_device *dev = connector->base.dev; | |
661 | struct drm_i915_private *dev_priv = dev->dev_private; | |
662 | u32 tmp; | |
663 | ||
3bd712e5 JN |
664 | intel_panel_actually_set_backlight(connector, 0); |
665 | ||
7bd688cd JN |
666 | tmp = I915_READ(BLC_PWM_CTL2); |
667 | I915_WRITE(BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE); | |
668 | } | |
669 | ||
670 | static void vlv_disable_backlight(struct intel_connector *connector) | |
671 | { | |
672 | struct drm_device *dev = connector->base.dev; | |
673 | struct drm_i915_private *dev_priv = dev->dev_private; | |
674 | enum pipe pipe = intel_get_pipe_from_connector(connector); | |
675 | u32 tmp; | |
676 | ||
3bd712e5 JN |
677 | intel_panel_actually_set_backlight(connector, 0); |
678 | ||
7bd688cd JN |
679 | tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe)); |
680 | I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp & ~BLM_PWM_ENABLE); | |
681 | } | |
682 | ||
752aa88a | 683 | void intel_panel_disable_backlight(struct intel_connector *connector) |
f52c619a | 684 | { |
752aa88a | 685 | struct drm_device *dev = connector->base.dev; |
f52c619a | 686 | struct drm_i915_private *dev_priv = dev->dev_private; |
58c68779 | 687 | struct intel_panel *panel = &connector->panel; |
752aa88a | 688 | enum pipe pipe = intel_get_pipe_from_connector(connector); |
8ba2d185 JN |
689 | unsigned long flags; |
690 | ||
752aa88a JB |
691 | if (pipe == INVALID_PIPE) |
692 | return; | |
693 | ||
3f577573 JN |
694 | /* |
695 | * Do not disable backlight on the vgaswitcheroo path. When switching | |
696 | * away from i915, the other client may depend on i915 to handle the | |
697 | * backlight. This will leave the backlight on unnecessarily when | |
698 | * another client is not activated. | |
699 | */ | |
700 | if (dev->switch_power_state == DRM_SWITCH_POWER_CHANGING) { | |
701 | DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n"); | |
702 | return; | |
703 | } | |
704 | ||
58c68779 | 705 | spin_lock_irqsave(&dev_priv->backlight_lock, flags); |
47356eb6 | 706 | |
58c68779 | 707 | panel->backlight.enabled = false; |
3bd712e5 | 708 | dev_priv->display.disable_backlight(connector); |
24ded204 | 709 | |
7bd688cd JN |
710 | spin_unlock_irqrestore(&dev_priv->backlight_lock, flags); |
711 | } | |
24ded204 | 712 | |
7bd688cd JN |
713 | static void pch_enable_backlight(struct intel_connector *connector) |
714 | { | |
715 | struct drm_device *dev = connector->base.dev; | |
716 | struct drm_i915_private *dev_priv = dev->dev_private; | |
3bd712e5 | 717 | struct intel_panel *panel = &connector->panel; |
7bd688cd JN |
718 | enum pipe pipe = intel_get_pipe_from_connector(connector); |
719 | enum transcoder cpu_transcoder = | |
720 | intel_pipe_to_cpu_transcoder(dev_priv, pipe); | |
721 | u32 tmp; | |
a4f32fc3 | 722 | |
7bd688cd JN |
723 | tmp = I915_READ(BLC_PWM_CPU_CTL2); |
724 | ||
725 | /* Note that this can also get called through dpms changes. And | |
726 | * we don't track the backlight dpms state, hence check whether | |
727 | * we have to do anything first. */ | |
728 | if (tmp & BLM_PWM_ENABLE) | |
729 | return; | |
730 | ||
731 | if (INTEL_INFO(dev)->num_pipes == 3) | |
732 | tmp &= ~BLM_PIPE_SELECT_IVB; | |
733 | else | |
734 | tmp &= ~BLM_PIPE_SELECT; | |
735 | ||
736 | if (cpu_transcoder == TRANSCODER_EDP) | |
737 | tmp |= BLM_TRANSCODER_EDP; | |
738 | else | |
739 | tmp |= BLM_PIPE(cpu_transcoder); | |
740 | tmp &= ~BLM_PWM_ENABLE; | |
741 | ||
742 | I915_WRITE(BLC_PWM_CPU_CTL2, tmp); | |
743 | POSTING_READ(BLC_PWM_CPU_CTL2); | |
744 | I915_WRITE(BLC_PWM_CPU_CTL2, tmp | BLM_PWM_ENABLE); | |
745 | ||
746 | if (!(dev_priv->quirks & QUIRK_NO_PCH_PWM_ENABLE)) { | |
747 | tmp = I915_READ(BLC_PWM_PCH_CTL1); | |
748 | tmp |= BLM_PCH_PWM_ENABLE; | |
749 | tmp &= ~BLM_PCH_OVERRIDE_ENABLE; | |
750 | I915_WRITE(BLC_PWM_PCH_CTL1, tmp); | |
24ded204 | 751 | } |
3bd712e5 JN |
752 | |
753 | /* | |
754 | * Call below after setting BLC_PWM_CPU_CTL2 and BLC_PWM_PCH_CTL1. | |
755 | * BLC_PWM_CPU_CTL may be cleared to zero automatically when these | |
756 | * registers are set. | |
757 | */ | |
758 | intel_panel_actually_set_backlight(connector, panel->backlight.level); | |
759 | } | |
760 | ||
761 | static void i9xx_enable_backlight(struct intel_connector *connector) | |
762 | { | |
763 | struct intel_panel *panel = &connector->panel; | |
764 | ||
765 | intel_panel_actually_set_backlight(connector, panel->backlight.level); | |
7bd688cd | 766 | } |
8ba2d185 | 767 | |
7bd688cd JN |
768 | static void i965_enable_backlight(struct intel_connector *connector) |
769 | { | |
770 | struct drm_device *dev = connector->base.dev; | |
771 | struct drm_i915_private *dev_priv = dev->dev_private; | |
3bd712e5 | 772 | struct intel_panel *panel = &connector->panel; |
7bd688cd JN |
773 | enum pipe pipe = intel_get_pipe_from_connector(connector); |
774 | u32 tmp; | |
775 | ||
776 | tmp = I915_READ(BLC_PWM_CTL2); | |
777 | ||
778 | /* Note that this can also get called through dpms changes. And | |
779 | * we don't track the backlight dpms state, hence check whether | |
780 | * we have to do anything first. */ | |
781 | if (tmp & BLM_PWM_ENABLE) | |
782 | return; | |
783 | ||
784 | tmp &= ~BLM_PIPE_SELECT; | |
785 | tmp |= BLM_PIPE(pipe); | |
786 | tmp &= ~BLM_PWM_ENABLE; | |
787 | ||
788 | I915_WRITE(BLC_PWM_CTL2, tmp); | |
789 | POSTING_READ(BLC_PWM_CTL2); | |
790 | I915_WRITE(BLC_PWM_CTL2, tmp | BLM_PWM_ENABLE); | |
3bd712e5 JN |
791 | |
792 | intel_panel_actually_set_backlight(connector, panel->backlight.level); | |
7bd688cd JN |
793 | } |
794 | ||
795 | static void vlv_enable_backlight(struct intel_connector *connector) | |
796 | { | |
797 | struct drm_device *dev = connector->base.dev; | |
798 | struct drm_i915_private *dev_priv = dev->dev_private; | |
3bd712e5 | 799 | struct intel_panel *panel = &connector->panel; |
7bd688cd JN |
800 | enum pipe pipe = intel_get_pipe_from_connector(connector); |
801 | u32 tmp; | |
802 | ||
803 | tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe)); | |
804 | ||
805 | /* Note that this can also get called through dpms changes. And | |
806 | * we don't track the backlight dpms state, hence check whether | |
807 | * we have to do anything first. */ | |
808 | if (tmp & BLM_PWM_ENABLE) | |
809 | return; | |
810 | ||
7bd688cd JN |
811 | tmp &= ~BLM_PWM_ENABLE; |
812 | ||
813 | I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp); | |
814 | POSTING_READ(VLV_BLC_PWM_CTL2(pipe)); | |
815 | I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp | BLM_PWM_ENABLE); | |
3bd712e5 JN |
816 | |
817 | intel_panel_actually_set_backlight(connector, panel->backlight.level); | |
47356eb6 CW |
818 | } |
819 | ||
752aa88a | 820 | void intel_panel_enable_backlight(struct intel_connector *connector) |
47356eb6 | 821 | { |
752aa88a | 822 | struct drm_device *dev = connector->base.dev; |
47356eb6 | 823 | struct drm_i915_private *dev_priv = dev->dev_private; |
58c68779 | 824 | struct intel_panel *panel = &connector->panel; |
752aa88a | 825 | enum pipe pipe = intel_get_pipe_from_connector(connector); |
8ba2d185 JN |
826 | unsigned long flags; |
827 | ||
752aa88a JB |
828 | if (pipe == INVALID_PIPE) |
829 | return; | |
830 | ||
6f2bcceb | 831 | DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe)); |
540b5d02 | 832 | |
58c68779 | 833 | spin_lock_irqsave(&dev_priv->backlight_lock, flags); |
47356eb6 | 834 | |
f91c15e0 JN |
835 | /* XXX: transitional, call to make sure freq is set */ |
836 | intel_panel_get_max_backlight(connector); | |
837 | ||
838 | WARN_ON(panel->backlight.max == 0); | |
839 | ||
58c68779 | 840 | if (panel->backlight.level == 0) { |
f91c15e0 | 841 | panel->backlight.level = panel->backlight.max; |
58c68779 JN |
842 | if (panel->backlight.device) |
843 | panel->backlight.device->props.brightness = | |
844 | panel->backlight.level; | |
b6b3ba5b | 845 | } |
47356eb6 | 846 | |
3bd712e5 | 847 | dev_priv->display.enable_backlight(connector); |
58c68779 | 848 | panel->backlight.enabled = true; |
8ba2d185 | 849 | |
58c68779 | 850 | spin_unlock_irqrestore(&dev_priv->backlight_lock, flags); |
47356eb6 CW |
851 | } |
852 | ||
fe16d949 CW |
853 | enum drm_connector_status |
854 | intel_panel_detect(struct drm_device *dev) | |
855 | { | |
856 | struct drm_i915_private *dev_priv = dev->dev_private; | |
857 | ||
858 | /* Assume that the BIOS does not lie through the OpRegion... */ | |
a726915c | 859 | if (!i915_panel_ignore_lid && dev_priv->opregion.lid_state) { |
fe16d949 CW |
860 | return ioread32(dev_priv->opregion.lid_state) & 0x1 ? |
861 | connector_status_connected : | |
862 | connector_status_disconnected; | |
a726915c | 863 | } |
fe16d949 | 864 | |
a726915c DV |
865 | switch (i915_panel_ignore_lid) { |
866 | case -2: | |
867 | return connector_status_connected; | |
868 | case -1: | |
869 | return connector_status_disconnected; | |
870 | default: | |
871 | return connector_status_unknown; | |
872 | } | |
fe16d949 | 873 | } |
aaa6fd2a | 874 | |
912e8b12 | 875 | #if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE) |
db31af1d | 876 | static int intel_backlight_device_update_status(struct backlight_device *bd) |
aaa6fd2a | 877 | { |
752aa88a JB |
878 | struct intel_connector *connector = bl_get_data(bd); |
879 | struct drm_device *dev = connector->base.dev; | |
880 | ||
881 | mutex_lock(&dev->mode_config.mutex); | |
540b5d02 CW |
882 | DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n", |
883 | bd->props.brightness, bd->props.max_brightness); | |
752aa88a | 884 | intel_panel_set_backlight(connector, bd->props.brightness, |
d6540632 | 885 | bd->props.max_brightness); |
752aa88a | 886 | mutex_unlock(&dev->mode_config.mutex); |
aaa6fd2a MG |
887 | return 0; |
888 | } | |
889 | ||
db31af1d | 890 | static int intel_backlight_device_get_brightness(struct backlight_device *bd) |
aaa6fd2a | 891 | { |
752aa88a JB |
892 | struct intel_connector *connector = bl_get_data(bd); |
893 | struct drm_device *dev = connector->base.dev; | |
7bd688cd | 894 | int ret; |
752aa88a JB |
895 | |
896 | mutex_lock(&dev->mode_config.mutex); | |
7bd688cd | 897 | ret = intel_panel_get_backlight(connector); |
752aa88a | 898 | mutex_unlock(&dev->mode_config.mutex); |
752aa88a | 899 | |
7bd688cd | 900 | return ret; |
aaa6fd2a MG |
901 | } |
902 | ||
db31af1d JN |
903 | static const struct backlight_ops intel_backlight_device_ops = { |
904 | .update_status = intel_backlight_device_update_status, | |
905 | .get_brightness = intel_backlight_device_get_brightness, | |
aaa6fd2a MG |
906 | }; |
907 | ||
db31af1d | 908 | static int intel_backlight_device_register(struct intel_connector *connector) |
aaa6fd2a | 909 | { |
58c68779 | 910 | struct intel_panel *panel = &connector->panel; |
aaa6fd2a | 911 | struct backlight_properties props; |
aaa6fd2a | 912 | |
58c68779 | 913 | if (WARN_ON(panel->backlight.device)) |
dc652f90 JN |
914 | return -ENODEV; |
915 | ||
7bd688cd JN |
916 | BUG_ON(panel->backlight.max == 0); |
917 | ||
af437cfd | 918 | memset(&props, 0, sizeof(props)); |
aaa6fd2a | 919 | props.type = BACKLIGHT_RAW; |
58c68779 | 920 | props.brightness = panel->backlight.level; |
7bd688cd | 921 | props.max_brightness = panel->backlight.max; |
58c68779 JN |
922 | |
923 | /* | |
924 | * Note: using the same name independent of the connector prevents | |
925 | * registration of multiple backlight devices in the driver. | |
926 | */ | |
927 | panel->backlight.device = | |
aaa6fd2a | 928 | backlight_device_register("intel_backlight", |
db31af1d JN |
929 | connector->base.kdev, |
930 | connector, | |
931 | &intel_backlight_device_ops, &props); | |
aaa6fd2a | 932 | |
58c68779 | 933 | if (IS_ERR(panel->backlight.device)) { |
aaa6fd2a | 934 | DRM_ERROR("Failed to register backlight: %ld\n", |
58c68779 JN |
935 | PTR_ERR(panel->backlight.device)); |
936 | panel->backlight.device = NULL; | |
aaa6fd2a MG |
937 | return -ENODEV; |
938 | } | |
aaa6fd2a MG |
939 | return 0; |
940 | } | |
941 | ||
db31af1d | 942 | static void intel_backlight_device_unregister(struct intel_connector *connector) |
aaa6fd2a | 943 | { |
58c68779 JN |
944 | struct intel_panel *panel = &connector->panel; |
945 | ||
946 | if (panel->backlight.device) { | |
947 | backlight_device_unregister(panel->backlight.device); | |
948 | panel->backlight.device = NULL; | |
dc652f90 | 949 | } |
aaa6fd2a | 950 | } |
db31af1d JN |
951 | #else /* CONFIG_BACKLIGHT_CLASS_DEVICE */ |
952 | static int intel_backlight_device_register(struct intel_connector *connector) | |
953 | { | |
954 | return 0; | |
955 | } | |
956 | static void intel_backlight_device_unregister(struct intel_connector *connector) | |
957 | { | |
958 | } | |
959 | #endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */ | |
960 | ||
f91c15e0 JN |
961 | /* |
962 | * Note: The setup hooks can't assume pipe is set! | |
963 | * | |
964 | * XXX: Query mode clock or hardware clock and program PWM modulation frequency | |
965 | * appropriately when it's 0. Use VBT and/or sane defaults. | |
966 | */ | |
7bd688cd JN |
967 | static int pch_setup_backlight(struct intel_connector *connector) |
968 | { | |
969 | struct intel_panel *panel = &connector->panel; | |
970 | u32 val; | |
971 | ||
972 | panel->backlight.max = pch_get_max_backlight(connector); | |
973 | if (!panel->backlight.max) | |
974 | return -ENODEV; | |
975 | ||
976 | val = pch_get_backlight(connector); | |
977 | panel->backlight.level = intel_panel_compute_brightness(connector, val); | |
978 | ||
979 | return 0; | |
980 | } | |
981 | ||
982 | static int i9xx_setup_backlight(struct intel_connector *connector) | |
983 | { | |
984 | struct intel_panel *panel = &connector->panel; | |
985 | u32 val; | |
986 | ||
987 | panel->backlight.max = i9xx_get_max_backlight(connector); | |
988 | if (!panel->backlight.max) | |
989 | return -ENODEV; | |
990 | ||
991 | val = i9xx_get_backlight(connector); | |
992 | panel->backlight.level = intel_panel_compute_brightness(connector, val); | |
993 | ||
994 | return 0; | |
995 | } | |
996 | ||
997 | static int i965_setup_backlight(struct intel_connector *connector) | |
998 | { | |
999 | struct intel_panel *panel = &connector->panel; | |
1000 | u32 val; | |
1001 | ||
1002 | panel->backlight.max = i965_get_max_backlight(connector); | |
1003 | if (!panel->backlight.max) | |
1004 | return -ENODEV; | |
1005 | ||
1006 | val = i9xx_get_backlight(connector); | |
1007 | panel->backlight.level = intel_panel_compute_brightness(connector, val); | |
1008 | ||
1009 | return 0; | |
1010 | } | |
1011 | ||
1012 | static int vlv_setup_backlight(struct intel_connector *connector) | |
1013 | { | |
1014 | struct drm_device *dev = connector->base.dev; | |
1015 | struct drm_i915_private *dev_priv = dev->dev_private; | |
1016 | struct intel_panel *panel = &connector->panel; | |
1017 | enum pipe pipe; | |
1018 | u32 val; | |
1019 | ||
1020 | for_each_pipe(pipe) { | |
1021 | u32 cur_val = I915_READ(VLV_BLC_PWM_CTL(pipe)); | |
1022 | ||
1023 | /* Skip if the modulation freq is already set */ | |
1024 | if (cur_val & ~BACKLIGHT_DUTY_CYCLE_MASK) | |
1025 | continue; | |
1026 | ||
1027 | cur_val &= BACKLIGHT_DUTY_CYCLE_MASK; | |
1028 | I915_WRITE(VLV_BLC_PWM_CTL(pipe), (0xf42 << 16) | | |
1029 | cur_val); | |
1030 | } | |
1031 | ||
1032 | panel->backlight.max = _vlv_get_max_backlight(dev, PIPE_A); | |
1033 | if (!panel->backlight.max) | |
1034 | return -ENODEV; | |
1035 | ||
1036 | val = _vlv_get_backlight(dev, PIPE_A); | |
1037 | panel->backlight.level = intel_panel_compute_brightness(connector, val); | |
1038 | ||
1039 | return 0; | |
1040 | } | |
1041 | ||
0657b6b1 | 1042 | int intel_panel_setup_backlight(struct drm_connector *connector) |
aaa6fd2a | 1043 | { |
db31af1d | 1044 | struct drm_device *dev = connector->dev; |
7bd688cd | 1045 | struct drm_i915_private *dev_priv = dev->dev_private; |
db31af1d | 1046 | struct intel_connector *intel_connector = to_intel_connector(connector); |
58c68779 | 1047 | struct intel_panel *panel = &intel_connector->panel; |
7bd688cd JN |
1048 | unsigned long flags; |
1049 | int ret; | |
db31af1d | 1050 | |
7bd688cd JN |
1051 | /* set level and max in panel struct */ |
1052 | spin_lock_irqsave(&dev_priv->backlight_lock, flags); | |
1053 | ret = dev_priv->display.setup_backlight(intel_connector); | |
1054 | spin_unlock_irqrestore(&dev_priv->backlight_lock, flags); | |
1055 | ||
1056 | if (ret) { | |
1057 | DRM_DEBUG_KMS("failed to setup backlight for connector %s\n", | |
1058 | drm_get_connector_name(connector)); | |
1059 | return ret; | |
1060 | } | |
db31af1d | 1061 | |
58c68779 | 1062 | panel->backlight.enabled = panel->backlight.level != 0; |
db31af1d JN |
1063 | |
1064 | intel_backlight_device_register(intel_connector); | |
1065 | ||
c91c9f32 JN |
1066 | panel->backlight.present = true; |
1067 | ||
c445b3b1 JN |
1068 | DRM_DEBUG_KMS("backlight initialized, %s, brightness %u/%u, " |
1069 | "sysfs interface %sregistered\n", | |
1070 | panel->backlight.enabled ? "enabled" : "disabled", | |
1071 | panel->backlight.level, panel->backlight.max, | |
1072 | panel->backlight.device ? "" : "not "); | |
1073 | ||
aaa6fd2a MG |
1074 | return 0; |
1075 | } | |
1076 | ||
db31af1d | 1077 | void intel_panel_destroy_backlight(struct drm_connector *connector) |
aaa6fd2a | 1078 | { |
db31af1d | 1079 | struct intel_connector *intel_connector = to_intel_connector(connector); |
c91c9f32 | 1080 | struct intel_panel *panel = &intel_connector->panel; |
db31af1d | 1081 | |
c91c9f32 | 1082 | panel->backlight.present = false; |
db31af1d | 1083 | intel_backlight_device_unregister(intel_connector); |
aaa6fd2a | 1084 | } |
1d508706 | 1085 | |
7bd688cd JN |
1086 | /* Set up chip specific backlight functions */ |
1087 | void intel_panel_init_backlight_funcs(struct drm_device *dev) | |
1088 | { | |
1089 | struct drm_i915_private *dev_priv = dev->dev_private; | |
1090 | ||
1091 | if (HAS_PCH_SPLIT(dev)) { | |
1092 | dev_priv->display.setup_backlight = pch_setup_backlight; | |
1093 | dev_priv->display.enable_backlight = pch_enable_backlight; | |
1094 | dev_priv->display.disable_backlight = pch_disable_backlight; | |
1095 | dev_priv->display.set_backlight = pch_set_backlight; | |
1096 | dev_priv->display.get_backlight = pch_get_backlight; | |
1097 | dev_priv->display.get_max_backlight = pch_get_max_backlight; | |
1098 | } else if (IS_VALLEYVIEW(dev)) { | |
1099 | dev_priv->display.setup_backlight = vlv_setup_backlight; | |
1100 | dev_priv->display.enable_backlight = vlv_enable_backlight; | |
1101 | dev_priv->display.disable_backlight = vlv_disable_backlight; | |
1102 | dev_priv->display.set_backlight = vlv_set_backlight; | |
1103 | dev_priv->display.get_backlight = vlv_get_backlight; | |
1104 | dev_priv->display.get_max_backlight = vlv_get_max_backlight; | |
1105 | } else if (IS_GEN4(dev)) { | |
1106 | dev_priv->display.setup_backlight = i965_setup_backlight; | |
1107 | dev_priv->display.enable_backlight = i965_enable_backlight; | |
1108 | dev_priv->display.disable_backlight = i965_disable_backlight; | |
1109 | dev_priv->display.set_backlight = i9xx_set_backlight; | |
1110 | dev_priv->display.get_backlight = i9xx_get_backlight; | |
1111 | dev_priv->display.get_max_backlight = i965_get_max_backlight; | |
1112 | } else { | |
1113 | dev_priv->display.setup_backlight = i9xx_setup_backlight; | |
3bd712e5 JN |
1114 | dev_priv->display.enable_backlight = i9xx_enable_backlight; |
1115 | dev_priv->display.disable_backlight = i9xx_disable_backlight; | |
7bd688cd JN |
1116 | dev_priv->display.set_backlight = i9xx_set_backlight; |
1117 | dev_priv->display.get_backlight = i9xx_get_backlight; | |
1118 | dev_priv->display.get_max_backlight = i9xx_get_max_backlight; | |
1119 | } | |
1120 | } | |
1121 | ||
dd06f90e JN |
1122 | int intel_panel_init(struct intel_panel *panel, |
1123 | struct drm_display_mode *fixed_mode) | |
1d508706 | 1124 | { |
dd06f90e JN |
1125 | panel->fixed_mode = fixed_mode; |
1126 | ||
1d508706 JN |
1127 | return 0; |
1128 | } | |
1129 | ||
1130 | void intel_panel_fini(struct intel_panel *panel) | |
1131 | { | |
dd06f90e JN |
1132 | struct intel_connector *intel_connector = |
1133 | container_of(panel, struct intel_connector, panel); | |
1134 | ||
1135 | if (panel->fixed_mode) | |
1136 | drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode); | |
1d508706 | 1137 | } |