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6ee73861
BS
1/*
2 * Copyright (C) 2008 Maarten Maathuis.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 *
25 */
26
760285e7
DH
27#include <drm/drmP.h>
28#include <drm/drm_crtc_helper.h>
77145f1c 29
6ee73861 30#include "nouveau_fbcon.h"
042206c0 31#include "nouveau_hw.h"
332b242f
FJ
32#include "nouveau_crtc.h"
33#include "nouveau_dma.h"
77145f1c 34#include "nouveau_gem.h"
de691855 35#include "nouveau_connector.h"
45c4e0aa 36#include "nv50_display.h"
6ee73861 37
ebb945a9
BS
38#include "nouveau_fence.h"
39
e0996aea 40#include <subdev/bios/gpio.h>
77145f1c
BS
41#include <subdev/gpio.h>
42#include <engine/disp.h>
e0996aea 43
6ee73861
BS
44static void
45nouveau_user_framebuffer_destroy(struct drm_framebuffer *drm_fb)
46{
47 struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
6ee73861 48
bc9025bd
LB
49 if (fb->nvbo)
50 drm_gem_object_unreference_unlocked(fb->nvbo->gem);
6ee73861
BS
51
52 drm_framebuffer_cleanup(drm_fb);
53 kfree(fb);
54}
55
56static int
57nouveau_user_framebuffer_create_handle(struct drm_framebuffer *drm_fb,
58 struct drm_file *file_priv,
59 unsigned int *handle)
60{
61 struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
62
63 return drm_gem_handle_create(file_priv, fb->nvbo->gem, handle);
64}
65
66static const struct drm_framebuffer_funcs nouveau_framebuffer_funcs = {
67 .destroy = nouveau_user_framebuffer_destroy,
68 .create_handle = nouveau_user_framebuffer_create_handle,
69};
70
38651674 71int
45c4e0aa
BS
72nouveau_framebuffer_init(struct drm_device *dev,
73 struct nouveau_framebuffer *nv_fb,
308e5bcb 74 struct drm_mode_fb_cmd2 *mode_cmd,
45c4e0aa 75 struct nouveau_bo *nvbo)
6ee73861 76{
77145f1c 77 struct nouveau_drm *drm = nouveau_drm(dev);
45c4e0aa 78 struct drm_framebuffer *fb = &nv_fb->base;
6ee73861
BS
79 int ret;
80
45c4e0aa 81 ret = drm_framebuffer_init(dev, fb, &nouveau_framebuffer_funcs);
6ee73861 82 if (ret) {
38651674 83 return ret;
6ee73861
BS
84 }
85
45c4e0aa
BS
86 drm_helper_mode_fill_fb_struct(fb, mode_cmd);
87 nv_fb->nvbo = nvbo;
88
77145f1c 89 if (nv_device(drm->device)->card_type >= NV_50) {
45c4e0aa
BS
90 u32 tile_flags = nouveau_bo_tile_layout(nvbo);
91 if (tile_flags == 0x7a00 ||
92 tile_flags == 0xfe00)
93 nv_fb->r_dma = NvEvoFB32;
94 else
95 if (tile_flags == 0x7000)
96 nv_fb->r_dma = NvEvoFB16;
97 else
98 nv_fb->r_dma = NvEvoVRAM_LP;
99
100 switch (fb->depth) {
4f6029da
BS
101 case 8: nv_fb->r_format = 0x1e00; break;
102 case 15: nv_fb->r_format = 0xe900; break;
103 case 16: nv_fb->r_format = 0xe800; break;
45c4e0aa 104 case 24:
4f6029da
BS
105 case 32: nv_fb->r_format = 0xcf00; break;
106 case 30: nv_fb->r_format = 0xd100; break;
45c4e0aa 107 default:
77145f1c 108 NV_ERROR(drm, "unknown depth %d\n", fb->depth);
45c4e0aa
BS
109 return -EINVAL;
110 }
111
77145f1c 112 if (nv_device(drm->device)->chipset == 0x50)
45c4e0aa
BS
113 nv_fb->r_format |= (tile_flags << 8);
114
2fad3d5e 115 if (!tile_flags) {
77145f1c 116 if (nv_device(drm->device)->card_type < NV_D0)
01f2c773 117 nv_fb->r_pitch = 0x00100000 | fb->pitches[0];
2fad3d5e 118 else
01f2c773 119 nv_fb->r_pitch = 0x01000000 | fb->pitches[0];
2fad3d5e 120 } else {
45c4e0aa 121 u32 mode = nvbo->tile_mode;
77145f1c 122 if (nv_device(drm->device)->card_type >= NV_C0)
45c4e0aa 123 mode >>= 4;
01f2c773 124 nv_fb->r_pitch = ((fb->pitches[0] / 4) << 4) | mode;
45c4e0aa
BS
125 }
126 }
127
38651674 128 return 0;
6ee73861
BS
129}
130
131static struct drm_framebuffer *
132nouveau_user_framebuffer_create(struct drm_device *dev,
133 struct drm_file *file_priv,
308e5bcb 134 struct drm_mode_fb_cmd2 *mode_cmd)
6ee73861 135{
38651674 136 struct nouveau_framebuffer *nouveau_fb;
6ee73861 137 struct drm_gem_object *gem;
38651674 138 int ret;
6ee73861 139
308e5bcb 140 gem = drm_gem_object_lookup(dev, file_priv, mode_cmd->handles[0]);
6ee73861 141 if (!gem)
cce13ff7 142 return ERR_PTR(-ENOENT);
6ee73861 143
38651674
DA
144 nouveau_fb = kzalloc(sizeof(struct nouveau_framebuffer), GFP_KERNEL);
145 if (!nouveau_fb)
cce13ff7 146 return ERR_PTR(-ENOMEM);
38651674
DA
147
148 ret = nouveau_framebuffer_init(dev, nouveau_fb, mode_cmd, nouveau_gem_object(gem));
149 if (ret) {
6ee73861 150 drm_gem_object_unreference(gem);
cce13ff7 151 return ERR_PTR(ret);
6ee73861
BS
152 }
153
38651674 154 return &nouveau_fb->base;
6ee73861
BS
155}
156
27d5030a 157static const struct drm_mode_config_funcs nouveau_mode_config_funcs = {
6ee73861 158 .fb_create = nouveau_user_framebuffer_create,
eb1f8e4f 159 .output_poll_changed = nouveau_fbcon_output_poll_changed,
6ee73861
BS
160};
161
b29caa58 162
4a67d391 163struct nouveau_drm_prop_enum_list {
de691855 164 u8 gen_mask;
b29caa58
BS
165 int type;
166 char *name;
167};
168
4a67d391 169static struct nouveau_drm_prop_enum_list underscan[] = {
92854622
BS
170 { 6, UNDERSCAN_AUTO, "auto" },
171 { 6, UNDERSCAN_OFF, "off" },
172 { 6, UNDERSCAN_ON, "on" },
de691855 173 {}
b29caa58
BS
174};
175
4a67d391 176static struct nouveau_drm_prop_enum_list dither_mode[] = {
de691855
BS
177 { 7, DITHERING_MODE_AUTO, "auto" },
178 { 7, DITHERING_MODE_OFF, "off" },
179 { 1, DITHERING_MODE_ON, "on" },
180 { 6, DITHERING_MODE_STATIC2X2, "static 2x2" },
181 { 6, DITHERING_MODE_DYNAMIC2X2, "dynamic 2x2" },
182 { 4, DITHERING_MODE_TEMPORAL, "temporal" },
183 {}
184};
185
4a67d391 186static struct nouveau_drm_prop_enum_list dither_depth[] = {
de691855
BS
187 { 6, DITHERING_DEPTH_AUTO, "auto" },
188 { 6, DITHERING_DEPTH_6BPC, "6 bpc" },
189 { 6, DITHERING_DEPTH_8BPC, "8 bpc" },
190 {}
191};
192
193#define PROP_ENUM(p,gen,n,list) do { \
4a67d391 194 struct nouveau_drm_prop_enum_list *l = (list); \
de691855
BS
195 int c = 0; \
196 while (l->gen_mask) { \
197 if (l->gen_mask & (1 << (gen))) \
198 c++; \
199 l++; \
200 } \
201 if (c) { \
202 p = drm_property_create(dev, DRM_MODE_PROP_ENUM, n, c); \
203 l = (list); \
204 c = 0; \
205 while (p && l->gen_mask) { \
206 if (l->gen_mask & (1 << (gen))) { \
207 drm_property_add_enum(p, c, l->type, l->name); \
208 c++; \
209 } \
210 l++; \
211 } \
212 } \
213} while(0)
214
f62b27db
BS
215int
216nouveau_display_init(struct drm_device *dev)
217{
77145f1c
BS
218 struct nouveau_drm *drm = nouveau_drm(dev);
219 struct nouveau_display *disp = nouveau_display(dev);
220 struct nouveau_gpio *gpio = nouveau_gpio(drm->device);
52c4d767 221 struct drm_connector *connector;
f62b27db
BS
222 int ret;
223
224 ret = disp->init(dev);
52c4d767
BS
225 if (ret)
226 return ret;
227
7df898b1 228 /* enable polling for external displays */
52c4d767
BS
229 drm_kms_helper_poll_enable(dev);
230
231 /* enable hotplug interrupts */
232 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
233 struct nouveau_connector *conn = nouveau_connector(connector);
77145f1c
BS
234 if (gpio)
235 gpio->irq(gpio, 0, conn->hpd, 0xff, true);
f62b27db
BS
236 }
237
238 return ret;
239}
240
241void
242nouveau_display_fini(struct drm_device *dev)
243{
77145f1c
BS
244 struct nouveau_drm *drm = nouveau_drm(dev);
245 struct nouveau_display *disp = nouveau_display(dev);
246 struct nouveau_gpio *gpio = nouveau_gpio(drm->device);
52c4d767
BS
247 struct drm_connector *connector;
248
249 /* disable hotplug interrupts */
250 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
251 struct nouveau_connector *conn = nouveau_connector(connector);
77145f1c
BS
252 if (gpio)
253 gpio->irq(gpio, 0, conn->hpd, 0xff, false);
52c4d767 254 }
f62b27db
BS
255
256 drm_kms_helper_poll_disable(dev);
257 disp->fini(dev);
258}
259
ebb945a9
BS
260static void
261nouveau_display_vblank_notify(void *data, int crtc)
262{
263 drm_handle_vblank(data, crtc);
264}
265
266static void
267nouveau_display_vblank_get(void *data, int crtc)
268{
269 drm_vblank_get(data, crtc);
270}
271
272static void
273nouveau_display_vblank_put(void *data, int crtc)
274{
275 drm_vblank_put(data, crtc);
276}
277
27d5030a
BS
278int
279nouveau_display_create(struct drm_device *dev)
280{
77145f1c
BS
281 struct nouveau_drm *drm = nouveau_drm(dev);
282 struct nouveau_disp *pdisp = nouveau_disp(drm->device);
283 struct nouveau_display *disp;
e412e95a 284 u32 pclass = dev->pdev->class >> 8;
de691855 285 int ret, gen;
27d5030a 286
77145f1c
BS
287 disp = drm->display = kzalloc(sizeof(*disp), GFP_KERNEL);
288 if (!disp)
289 return -ENOMEM;
290
291 pdisp->vblank.data = dev;
292 pdisp->vblank.notify = nouveau_display_vblank_notify;
293 pdisp->vblank.get = nouveau_display_vblank_get;
294 pdisp->vblank.put = nouveau_display_vblank_put;
295
27d5030a
BS
296 drm_mode_config_init(dev);
297 drm_mode_create_scaling_mode_property(dev);
4ceca5f8 298 drm_mode_create_dvi_i_properties(dev);
de691855 299
77145f1c 300 if (nv_device(drm->device)->card_type < NV_50)
de691855
BS
301 gen = 0;
302 else
77145f1c 303 if (nv_device(drm->device)->card_type < NV_D0)
de691855
BS
304 gen = 1;
305 else
306 gen = 2;
307
308 PROP_ENUM(disp->dithering_mode, gen, "dithering mode", dither_mode);
309 PROP_ENUM(disp->dithering_depth, gen, "dithering depth", dither_depth);
310 PROP_ENUM(disp->underscan_property, gen, "underscan", underscan);
b29caa58
BS
311
312 disp->underscan_hborder_property =
d9bc3c02 313 drm_property_create_range(dev, 0, "underscan hborder", 0, 128);
b29caa58
BS
314
315 disp->underscan_vborder_property =
d9bc3c02 316 drm_property_create_range(dev, 0, "underscan vborder", 0, 128);
b29caa58 317
f9887d09 318 if (gen >= 1) {
df26bc9c
CB
319 disp->vibrant_hue_property =
320 drm_property_create(dev, DRM_MODE_PROP_RANGE,
321 "vibrant hue", 2);
322 disp->vibrant_hue_property->values[0] = 0;
323 disp->vibrant_hue_property->values[1] = 180; /* -90..+90 */
324
325 disp->color_vibrance_property =
326 drm_property_create(dev, DRM_MODE_PROP_RANGE,
327 "color vibrance", 2);
328 disp->color_vibrance_property->values[0] = 0;
329 disp->color_vibrance_property->values[1] = 200; /* -100..+100 */
330 }
331
e6ecefaa 332 dev->mode_config.funcs = &nouveau_mode_config_funcs;
27d5030a
BS
333 dev->mode_config.fb_base = pci_resource_start(dev->pdev, 1);
334
335 dev->mode_config.min_width = 0;
336 dev->mode_config.min_height = 0;
77145f1c 337 if (nv_device(drm->device)->card_type < NV_10) {
27d5030a
BS
338 dev->mode_config.max_width = 2048;
339 dev->mode_config.max_height = 2048;
340 } else
77145f1c 341 if (nv_device(drm->device)->card_type < NV_50) {
27d5030a
BS
342 dev->mode_config.max_width = 4096;
343 dev->mode_config.max_height = 4096;
344 } else {
345 dev->mode_config.max_width = 8192;
346 dev->mode_config.max_height = 8192;
347 }
348
f1377998
DA
349 dev->mode_config.preferred_depth = 24;
350 dev->mode_config.prefer_shadow = 1;
351
f62b27db
BS
352 drm_kms_helper_poll_init(dev);
353 drm_kms_helper_poll_disable(dev);
354
e412e95a
BS
355 if (nouveau_modeset == 1 ||
356 (nouveau_modeset < 0 && pclass == PCI_CLASS_DISPLAY_VGA)) {
9430738d
BS
357 if (nv_device(drm->device)->card_type < NV_50)
358 ret = nv04_display_create(dev);
9430738d 359 else
e225f446 360 ret = nv50_display_create(dev);
f62b27db 361 if (ret)
9430738d
BS
362 goto disp_create_err;
363
364 if (dev->mode_config.num_crtc) {
365 ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
366 if (ret)
367 goto vblank_err;
368 }
369
370 nouveau_backlight_init(dev);
f62b27db
BS
371 }
372
5ace2c9d
MS
373 return 0;
374
375vblank_err:
77145f1c 376 disp->dtor(dev);
5ace2c9d
MS
377disp_create_err:
378 drm_kms_helper_poll_fini(dev);
379 drm_mode_config_cleanup(dev);
2a44e499 380 return ret;
27d5030a
BS
381}
382
383void
384nouveau_display_destroy(struct drm_device *dev)
385{
77145f1c 386 struct nouveau_display *disp = nouveau_display(dev);
27d5030a 387
77145f1c 388 nouveau_backlight_exit(dev);
f62b27db
BS
389 drm_vblank_cleanup(dev);
390
d6bf2f37
BS
391 drm_kms_helper_poll_fini(dev);
392 drm_mode_config_cleanup(dev);
393
9430738d
BS
394 if (disp->dtor)
395 disp->dtor(dev);
f62b27db 396
77145f1c
BS
397 nouveau_drm(dev)->display = NULL;
398 kfree(disp);
399}
400
401int
402nouveau_display_suspend(struct drm_device *dev)
403{
404 struct nouveau_drm *drm = nouveau_drm(dev);
405 struct drm_crtc *crtc;
406
407 nouveau_display_fini(dev);
408
409 NV_INFO(drm, "unpinning framebuffer(s)...\n");
410 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
411 struct nouveau_framebuffer *nouveau_fb;
412
413 nouveau_fb = nouveau_framebuffer(crtc->fb);
414 if (!nouveau_fb || !nouveau_fb->nvbo)
415 continue;
416
417 nouveau_bo_unpin(nouveau_fb->nvbo);
418 }
419
420 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
421 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
422
423 nouveau_bo_unmap(nv_crtc->cursor.nvbo);
424 nouveau_bo_unpin(nv_crtc->cursor.nvbo);
425 }
426
427 return 0;
428}
429
430void
431nouveau_display_resume(struct drm_device *dev)
432{
433 struct nouveau_drm *drm = nouveau_drm(dev);
434 struct drm_crtc *crtc;
435 int ret;
436
437 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
438 struct nouveau_framebuffer *nouveau_fb;
439
440 nouveau_fb = nouveau_framebuffer(crtc->fb);
441 if (!nouveau_fb || !nouveau_fb->nvbo)
442 continue;
443
444 nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
445 }
446
447 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
448 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
449
450 ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
451 if (!ret)
452 ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
453 if (ret)
454 NV_ERROR(drm, "Could not pin/map cursor.\n");
455 }
456
457 nouveau_fbcon_set_suspend(dev, 0);
458 nouveau_fbcon_zfill_all(dev);
459
460 nouveau_display_init(dev);
461
462 /* Force CLUT to get re-loaded during modeset */
463 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
464 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
465
466 nv_crtc->lut.depth = 0;
467 }
468
469 drm_helper_resume_force_mode(dev);
470
471 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
472 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
473 u32 offset = nv_crtc->cursor.nvbo->bo.offset;
474
475 nv_crtc->cursor.set_offset(nv_crtc, offset);
476 nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
477 nv_crtc->cursor_saved_y);
478 }
27d5030a
BS
479}
480
042206c0
FJ
481int
482nouveau_vblank_enable(struct drm_device *dev, int crtc)
483{
77145f1c 484 struct nouveau_device *device = nouveau_dev(dev);
042206c0 485
77145f1c
BS
486 if (device->card_type >= NV_D0)
487 nv_mask(device, 0x6100c0 + (crtc * 0x800), 1, 1);
ebb945a9 488 else
77145f1c
BS
489 if (device->card_type >= NV_50)
490 nv_mask(device, NV50_PDISPLAY_INTR_EN_1, 0,
042206c0
FJ
491 NV50_PDISPLAY_INTR_EN_1_VBLANK_CRTC_(crtc));
492 else
493 NVWriteCRTC(dev, crtc, NV_PCRTC_INTR_EN_0,
494 NV_PCRTC_INTR_0_VBLANK);
495
496 return 0;
497}
498
499void
500nouveau_vblank_disable(struct drm_device *dev, int crtc)
501{
77145f1c 502 struct nouveau_device *device = nouveau_dev(dev);
042206c0 503
77145f1c
BS
504 if (device->card_type >= NV_D0)
505 nv_mask(device, 0x6100c0 + (crtc * 0x800), 1, 0);
ebb945a9 506 else
77145f1c
BS
507 if (device->card_type >= NV_50)
508 nv_mask(device, NV50_PDISPLAY_INTR_EN_1,
042206c0
FJ
509 NV50_PDISPLAY_INTR_EN_1_VBLANK_CRTC_(crtc), 0);
510 else
511 NVWriteCRTC(dev, crtc, NV_PCRTC_INTR_EN_0, 0);
512}
332b242f
FJ
513
514static int
515nouveau_page_flip_reserve(struct nouveau_bo *old_bo,
516 struct nouveau_bo *new_bo)
517{
518 int ret;
519
520 ret = nouveau_bo_pin(new_bo, TTM_PL_FLAG_VRAM);
521 if (ret)
522 return ret;
523
524 ret = ttm_bo_reserve(&new_bo->bo, false, false, false, 0);
525 if (ret)
526 goto fail;
527
2c14575f
MS
528 if (likely(old_bo != new_bo)) {
529 ret = ttm_bo_reserve(&old_bo->bo, false, false, false, 0);
530 if (ret)
531 goto fail_unreserve;
532 }
332b242f
FJ
533
534 return 0;
535
536fail_unreserve:
537 ttm_bo_unreserve(&new_bo->bo);
538fail:
539 nouveau_bo_unpin(new_bo);
540 return ret;
541}
542
543static void
544nouveau_page_flip_unreserve(struct nouveau_bo *old_bo,
545 struct nouveau_bo *new_bo,
546 struct nouveau_fence *fence)
547{
548 nouveau_bo_fence(new_bo, fence);
549 ttm_bo_unreserve(&new_bo->bo);
550
2c14575f
MS
551 if (likely(old_bo != new_bo)) {
552 nouveau_bo_fence(old_bo, fence);
553 ttm_bo_unreserve(&old_bo->bo);
554 }
332b242f
FJ
555
556 nouveau_bo_unpin(old_bo);
557}
558
559static int
560nouveau_page_flip_emit(struct nouveau_channel *chan,
561 struct nouveau_bo *old_bo,
562 struct nouveau_bo *new_bo,
563 struct nouveau_page_flip_state *s,
564 struct nouveau_fence **pfence)
565{
f589be88 566 struct nouveau_fence_chan *fctx = chan->fence;
77145f1c
BS
567 struct nouveau_drm *drm = chan->drm;
568 struct drm_device *dev = drm->dev;
332b242f
FJ
569 unsigned long flags;
570 int ret;
571
572 /* Queue it to the pending list */
573 spin_lock_irqsave(&dev->event_lock, flags);
f589be88 574 list_add_tail(&s->head, &fctx->flip);
332b242f
FJ
575 spin_unlock_irqrestore(&dev->event_lock, flags);
576
577 /* Synchronize with the old framebuffer */
578 ret = nouveau_fence_sync(old_bo->bo.sync_obj, chan);
579 if (ret)
580 goto fail;
581
582 /* Emit the pageflip */
d5316e25 583 ret = RING_SPACE(chan, 3);
332b242f
FJ
584 if (ret)
585 goto fail;
586
77145f1c 587 if (nv_device(drm->device)->card_type < NV_C0) {
6d597027 588 BEGIN_NV04(chan, NvSubSw, NV_SW_PAGE_FLIP, 1);
d5316e25
BS
589 OUT_RING (chan, 0x00000000);
590 OUT_RING (chan, 0x00000000);
591 } else {
6d597027 592 BEGIN_NVC0(chan, 0, NV10_SUBCHAN_REF_CNT, 1);
5e120f6e 593 OUT_RING (chan, 0);
6d597027 594 BEGIN_IMC0(chan, 0, NVSW_SUBCHAN_PAGE_FLIP, 0x0000);
d5316e25 595 }
bd2f2037 596 FIRE_RING (chan);
332b242f 597
d375e7d5 598 ret = nouveau_fence_new(chan, pfence);
332b242f
FJ
599 if (ret)
600 goto fail;
601
602 return 0;
603fail:
604 spin_lock_irqsave(&dev->event_lock, flags);
605 list_del(&s->head);
606 spin_unlock_irqrestore(&dev->event_lock, flags);
607 return ret;
608}
609
610int
611nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,
612 struct drm_pending_vblank_event *event)
613{
614 struct drm_device *dev = crtc->dev;
77145f1c 615 struct nouveau_drm *drm = nouveau_drm(dev);
332b242f
FJ
616 struct nouveau_bo *old_bo = nouveau_framebuffer(crtc->fb)->nvbo;
617 struct nouveau_bo *new_bo = nouveau_framebuffer(fb)->nvbo;
618 struct nouveau_page_flip_state *s;
d375e7d5 619 struct nouveau_channel *chan = NULL;
332b242f
FJ
620 struct nouveau_fence *fence;
621 int ret;
622
77145f1c 623 if (!drm->channel)
332b242f
FJ
624 return -ENODEV;
625
626 s = kzalloc(sizeof(*s), GFP_KERNEL);
627 if (!s)
628 return -ENOMEM;
629
630 /* Don't let the buffers go away while we flip */
631 ret = nouveau_page_flip_reserve(old_bo, new_bo);
632 if (ret)
633 goto fail_free;
634
635 /* Initialize a page flip struct */
636 *s = (struct nouveau_page_flip_state)
2503c6fa 637 { { }, event, nouveau_crtc(crtc)->index,
01f2c773 638 fb->bits_per_pixel, fb->pitches[0], crtc->x, crtc->y,
332b242f
FJ
639 new_bo->bo.offset };
640
641 /* Choose the channel the flip will be handled in */
d375e7d5
BS
642 fence = new_bo->bo.sync_obj;
643 if (fence)
ebb945a9 644 chan = fence->channel;
332b242f 645 if (!chan)
77145f1c
BS
646 chan = drm->channel;
647 mutex_lock(&chan->cli->mutex);
332b242f
FJ
648
649 /* Emit a page flip */
77145f1c 650 if (nv_device(drm->device)->card_type >= NV_50) {
e225f446 651 ret = nv50_display_flip_next(crtc, fb, chan, 0);
d7117e0d 652 if (ret) {
77145f1c 653 mutex_unlock(&chan->cli->mutex);
d7117e0d
BS
654 goto fail_unreserve;
655 }
656 }
657
332b242f 658 ret = nouveau_page_flip_emit(chan, old_bo, new_bo, s, &fence);
77145f1c 659 mutex_unlock(&chan->cli->mutex);
332b242f
FJ
660 if (ret)
661 goto fail_unreserve;
662
663 /* Update the crtc struct and cleanup */
664 crtc->fb = fb;
665
666 nouveau_page_flip_unreserve(old_bo, new_bo, fence);
667 nouveau_fence_unref(&fence);
668 return 0;
669
670fail_unreserve:
671 nouveau_page_flip_unreserve(old_bo, new_bo, NULL);
672fail_free:
673 kfree(s);
674 return ret;
675}
676
677int
678nouveau_finish_page_flip(struct nouveau_channel *chan,
679 struct nouveau_page_flip_state *ps)
680{
f589be88 681 struct nouveau_fence_chan *fctx = chan->fence;
77145f1c
BS
682 struct nouveau_drm *drm = chan->drm;
683 struct drm_device *dev = drm->dev;
332b242f
FJ
684 struct nouveau_page_flip_state *s;
685 unsigned long flags;
686
687 spin_lock_irqsave(&dev->event_lock, flags);
688
f589be88 689 if (list_empty(&fctx->flip)) {
77145f1c 690 NV_ERROR(drm, "unexpected pageflip\n");
332b242f
FJ
691 spin_unlock_irqrestore(&dev->event_lock, flags);
692 return -EINVAL;
693 }
694
f589be88 695 s = list_first_entry(&fctx->flip, struct nouveau_page_flip_state, head);
332b242f
FJ
696 if (s->event) {
697 struct drm_pending_vblank_event *e = s->event;
698 struct timeval now;
699
700 do_gettimeofday(&now);
701 e->event.sequence = 0;
702 e->event.tv_sec = now.tv_sec;
703 e->event.tv_usec = now.tv_usec;
704 list_add_tail(&e->base.link, &e->base.file_priv->event_list);
705 wake_up_interruptible(&e->base.file_priv->event_wait);
706 }
707
708 list_del(&s->head);
d7117e0d
BS
709 if (ps)
710 *ps = *s;
332b242f
FJ
711 kfree(s);
712
713 spin_unlock_irqrestore(&dev->event_lock, flags);
714 return 0;
715}
33dbc27f 716
f589be88
BS
717int
718nouveau_flip_complete(void *data)
719{
720 struct nouveau_channel *chan = data;
77145f1c 721 struct nouveau_drm *drm = chan->drm;
f589be88
BS
722 struct nouveau_page_flip_state state;
723
724 if (!nouveau_finish_page_flip(chan, &state)) {
77145f1c
BS
725 if (nv_device(drm->device)->card_type < NV_50) {
726 nv_set_crtc_base(drm->dev, state.crtc, state.offset +
f589be88
BS
727 state.y * state.pitch +
728 state.x * state.bpp / 8);
729 }
730 }
731
732 return 0;
733}
734
33dbc27f
BS
735int
736nouveau_display_dumb_create(struct drm_file *file_priv, struct drm_device *dev,
737 struct drm_mode_create_dumb *args)
738{
739 struct nouveau_bo *bo;
740 int ret;
741
742 args->pitch = roundup(args->width * (args->bpp / 8), 256);
743 args->size = args->pitch * args->height;
744 args->size = roundup(args->size, PAGE_SIZE);
745
610bd7da 746 ret = nouveau_gem_new(dev, args->size, 0, NOUVEAU_GEM_DOMAIN_VRAM, 0, 0, &bo);
33dbc27f
BS
747 if (ret)
748 return ret;
749
750 ret = drm_gem_handle_create(file_priv, bo->gem, &args->handle);
751 drm_gem_object_unreference_unlocked(bo->gem);
752 return ret;
753}
754
755int
756nouveau_display_dumb_destroy(struct drm_file *file_priv, struct drm_device *dev,
757 uint32_t handle)
758{
759 return drm_gem_handle_delete(file_priv, handle);
760}
761
762int
763nouveau_display_dumb_map_offset(struct drm_file *file_priv,
764 struct drm_device *dev,
765 uint32_t handle, uint64_t *poffset)
766{
767 struct drm_gem_object *gem;
768
769 gem = drm_gem_object_lookup(dev, file_priv, handle);
770 if (gem) {
771 struct nouveau_bo *bo = gem->driver_private;
772 *poffset = bo->bo.addr_space_offset;
773 drm_gem_object_unreference_unlocked(gem);
774 return 0;
775 }
776
777 return -ENOENT;
778}