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CommitLineData
6ee73861
BS
1/*
2 * Copyright (C) 2008 Maarten Maathuis.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 *
25 */
26
760285e7
DH
27#include <drm/drmP.h>
28#include <drm/drm_crtc_helper.h>
b580c9e2 29#include <drm/ttm/ttm_execbuf_util.h>
77145f1c 30
6ee73861 31#include "nouveau_fbcon.h"
1a646342 32#include "dispnv04/hw.h"
332b242f
FJ
33#include "nouveau_crtc.h"
34#include "nouveau_dma.h"
77145f1c 35#include "nouveau_gem.h"
de691855 36#include "nouveau_connector.h"
45c4e0aa 37#include "nv50_display.h"
6ee73861 38
ebb945a9
BS
39#include "nouveau_fence.h"
40
77145f1c 41#include <engine/disp.h>
e0996aea 42
1d7c71a3
BS
43#include <core/class.h>
44
51cb4b39
BS
45static int
46nouveau_display_vblank_handler(void *data, int head)
47{
48 struct nouveau_drm *drm = data;
49 drm_handle_vblank(drm->dev, head);
50 return NVKM_EVENT_KEEP;
51}
52
53int
54nouveau_display_vblank_enable(struct drm_device *dev, int head)
55{
56 struct nouveau_display *disp = nouveau_display(dev);
57 if (disp) {
58 nouveau_event_get(disp->vblank[head]);
59 return 0;
60 }
61 return -EIO;
62}
63
64void
65nouveau_display_vblank_disable(struct drm_device *dev, int head)
66{
67 struct nouveau_display *disp = nouveau_display(dev);
68 if (disp)
69 nouveau_event_put(disp->vblank[head]);
70}
71
72static void
73nouveau_display_vblank_fini(struct drm_device *dev)
74{
75 struct nouveau_display *disp = nouveau_display(dev);
76 int i;
77
78 if (disp->vblank) {
79 for (i = 0; i < dev->mode_config.num_crtc; i++)
80 nouveau_event_ref(NULL, &disp->vblank[i]);
81 kfree(disp->vblank);
82 disp->vblank = NULL;
83 }
84
85 drm_vblank_cleanup(dev);
86}
87
88static int
89nouveau_display_vblank_init(struct drm_device *dev)
90{
91 struct nouveau_display *disp = nouveau_display(dev);
92 struct nouveau_drm *drm = nouveau_drm(dev);
93 struct nouveau_disp *pdisp = nouveau_disp(drm->device);
94 int ret, i;
95
96 disp->vblank = kzalloc(dev->mode_config.num_crtc *
97 sizeof(*disp->vblank), GFP_KERNEL);
98 if (!disp->vblank)
99 return -ENOMEM;
100
101 for (i = 0; i < dev->mode_config.num_crtc; i++) {
102 ret = nouveau_event_new(pdisp->vblank, i,
103 nouveau_display_vblank_handler,
104 drm, &disp->vblank[i]);
105 if (ret) {
106 nouveau_display_vblank_fini(dev);
107 return ret;
108 }
109 }
110
111 ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
112 if (ret) {
113 nouveau_display_vblank_fini(dev);
114 return ret;
115 }
116
117 return 0;
118}
119
6ee73861
BS
120static void
121nouveau_user_framebuffer_destroy(struct drm_framebuffer *drm_fb)
122{
123 struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
6ee73861 124
bc9025bd 125 if (fb->nvbo)
55fb74ad 126 drm_gem_object_unreference_unlocked(&fb->nvbo->gem);
6ee73861
BS
127
128 drm_framebuffer_cleanup(drm_fb);
129 kfree(fb);
130}
131
132static int
133nouveau_user_framebuffer_create_handle(struct drm_framebuffer *drm_fb,
134 struct drm_file *file_priv,
135 unsigned int *handle)
136{
137 struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
138
55fb74ad 139 return drm_gem_handle_create(file_priv, &fb->nvbo->gem, handle);
6ee73861
BS
140}
141
142static const struct drm_framebuffer_funcs nouveau_framebuffer_funcs = {
143 .destroy = nouveau_user_framebuffer_destroy,
144 .create_handle = nouveau_user_framebuffer_create_handle,
145};
146
38651674 147int
45c4e0aa
BS
148nouveau_framebuffer_init(struct drm_device *dev,
149 struct nouveau_framebuffer *nv_fb,
308e5bcb 150 struct drm_mode_fb_cmd2 *mode_cmd,
45c4e0aa 151 struct nouveau_bo *nvbo)
6ee73861 152{
77145f1c 153 struct nouveau_drm *drm = nouveau_drm(dev);
45c4e0aa 154 struct drm_framebuffer *fb = &nv_fb->base;
6ee73861
BS
155 int ret;
156
45c4e0aa
BS
157 drm_helper_mode_fill_fb_struct(fb, mode_cmd);
158 nv_fb->nvbo = nvbo;
159
77145f1c 160 if (nv_device(drm->device)->card_type >= NV_50) {
45c4e0aa
BS
161 u32 tile_flags = nouveau_bo_tile_layout(nvbo);
162 if (tile_flags == 0x7a00 ||
163 tile_flags == 0xfe00)
164 nv_fb->r_dma = NvEvoFB32;
165 else
166 if (tile_flags == 0x7000)
167 nv_fb->r_dma = NvEvoFB16;
168 else
169 nv_fb->r_dma = NvEvoVRAM_LP;
170
171 switch (fb->depth) {
4f6029da
BS
172 case 8: nv_fb->r_format = 0x1e00; break;
173 case 15: nv_fb->r_format = 0xe900; break;
174 case 16: nv_fb->r_format = 0xe800; break;
45c4e0aa 175 case 24:
4f6029da
BS
176 case 32: nv_fb->r_format = 0xcf00; break;
177 case 30: nv_fb->r_format = 0xd100; break;
45c4e0aa 178 default:
77145f1c 179 NV_ERROR(drm, "unknown depth %d\n", fb->depth);
45c4e0aa
BS
180 return -EINVAL;
181 }
182
bd9c5a20
ML
183 if (nvbo->tile_flags & NOUVEAU_GEM_TILE_NONCONTIG) {
184 NV_ERROR(drm, "framebuffer requires contiguous bo\n");
185 return -EINVAL;
186 }
187
77145f1c 188 if (nv_device(drm->device)->chipset == 0x50)
45c4e0aa
BS
189 nv_fb->r_format |= (tile_flags << 8);
190
2fad3d5e 191 if (!tile_flags) {
77145f1c 192 if (nv_device(drm->device)->card_type < NV_D0)
01f2c773 193 nv_fb->r_pitch = 0x00100000 | fb->pitches[0];
2fad3d5e 194 else
01f2c773 195 nv_fb->r_pitch = 0x01000000 | fb->pitches[0];
2fad3d5e 196 } else {
45c4e0aa 197 u32 mode = nvbo->tile_mode;
77145f1c 198 if (nv_device(drm->device)->card_type >= NV_C0)
45c4e0aa 199 mode >>= 4;
01f2c773 200 nv_fb->r_pitch = ((fb->pitches[0] / 4) << 4) | mode;
45c4e0aa
BS
201 }
202 }
203
c7d73f6a
DV
204 ret = drm_framebuffer_init(dev, fb, &nouveau_framebuffer_funcs);
205 if (ret) {
206 return ret;
207 }
208
38651674 209 return 0;
6ee73861
BS
210}
211
212static struct drm_framebuffer *
213nouveau_user_framebuffer_create(struct drm_device *dev,
214 struct drm_file *file_priv,
308e5bcb 215 struct drm_mode_fb_cmd2 *mode_cmd)
6ee73861 216{
38651674 217 struct nouveau_framebuffer *nouveau_fb;
6ee73861 218 struct drm_gem_object *gem;
fdfb8332 219 int ret = -ENOMEM;
6ee73861 220
308e5bcb 221 gem = drm_gem_object_lookup(dev, file_priv, mode_cmd->handles[0]);
6ee73861 222 if (!gem)
cce13ff7 223 return ERR_PTR(-ENOENT);
6ee73861 224
38651674
DA
225 nouveau_fb = kzalloc(sizeof(struct nouveau_framebuffer), GFP_KERNEL);
226 if (!nouveau_fb)
fdfb8332 227 goto err_unref;
38651674
DA
228
229 ret = nouveau_framebuffer_init(dev, nouveau_fb, mode_cmd, nouveau_gem_object(gem));
fdfb8332
ML
230 if (ret)
231 goto err;
6ee73861 232
38651674 233 return &nouveau_fb->base;
fdfb8332
ML
234
235err:
236 kfree(nouveau_fb);
237err_unref:
238 drm_gem_object_unreference(gem);
239 return ERR_PTR(ret);
6ee73861
BS
240}
241
27d5030a 242static const struct drm_mode_config_funcs nouveau_mode_config_funcs = {
6ee73861 243 .fb_create = nouveau_user_framebuffer_create,
eb1f8e4f 244 .output_poll_changed = nouveau_fbcon_output_poll_changed,
6ee73861
BS
245};
246
b29caa58 247
4a67d391 248struct nouveau_drm_prop_enum_list {
de691855 249 u8 gen_mask;
b29caa58
BS
250 int type;
251 char *name;
252};
253
4a67d391 254static struct nouveau_drm_prop_enum_list underscan[] = {
92854622
BS
255 { 6, UNDERSCAN_AUTO, "auto" },
256 { 6, UNDERSCAN_OFF, "off" },
257 { 6, UNDERSCAN_ON, "on" },
de691855 258 {}
b29caa58
BS
259};
260
4a67d391 261static struct nouveau_drm_prop_enum_list dither_mode[] = {
de691855
BS
262 { 7, DITHERING_MODE_AUTO, "auto" },
263 { 7, DITHERING_MODE_OFF, "off" },
264 { 1, DITHERING_MODE_ON, "on" },
265 { 6, DITHERING_MODE_STATIC2X2, "static 2x2" },
266 { 6, DITHERING_MODE_DYNAMIC2X2, "dynamic 2x2" },
267 { 4, DITHERING_MODE_TEMPORAL, "temporal" },
268 {}
269};
270
4a67d391 271static struct nouveau_drm_prop_enum_list dither_depth[] = {
de691855
BS
272 { 6, DITHERING_DEPTH_AUTO, "auto" },
273 { 6, DITHERING_DEPTH_6BPC, "6 bpc" },
274 { 6, DITHERING_DEPTH_8BPC, "8 bpc" },
275 {}
276};
277
278#define PROP_ENUM(p,gen,n,list) do { \
4a67d391 279 struct nouveau_drm_prop_enum_list *l = (list); \
de691855
BS
280 int c = 0; \
281 while (l->gen_mask) { \
282 if (l->gen_mask & (1 << (gen))) \
283 c++; \
284 l++; \
285 } \
286 if (c) { \
287 p = drm_property_create(dev, DRM_MODE_PROP_ENUM, n, c); \
288 l = (list); \
289 c = 0; \
290 while (p && l->gen_mask) { \
291 if (l->gen_mask & (1 << (gen))) { \
292 drm_property_add_enum(p, c, l->type, l->name); \
293 c++; \
294 } \
295 l++; \
296 } \
297 } \
298} while(0)
299
f62b27db
BS
300int
301nouveau_display_init(struct drm_device *dev)
302{
77145f1c 303 struct nouveau_display *disp = nouveau_display(dev);
52c4d767 304 struct drm_connector *connector;
f62b27db
BS
305 int ret;
306
307 ret = disp->init(dev);
52c4d767
BS
308 if (ret)
309 return ret;
310
7df898b1 311 /* enable polling for external displays */
52c4d767
BS
312 drm_kms_helper_poll_enable(dev);
313
314 /* enable hotplug interrupts */
315 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
316 struct nouveau_connector *conn = nouveau_connector(connector);
51cb4b39 317 if (conn->hpd_func) nouveau_event_get(conn->hpd_func);
f62b27db
BS
318 }
319
320 return ret;
321}
322
323void
324nouveau_display_fini(struct drm_device *dev)
325{
77145f1c 326 struct nouveau_display *disp = nouveau_display(dev);
52c4d767
BS
327 struct drm_connector *connector;
328
329 /* disable hotplug interrupts */
330 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
331 struct nouveau_connector *conn = nouveau_connector(connector);
51cb4b39 332 if (conn->hpd_func) nouveau_event_put(conn->hpd_func);
52c4d767 333 }
f62b27db
BS
334
335 drm_kms_helper_poll_disable(dev);
336 disp->fini(dev);
337}
338
27d5030a
BS
339int
340nouveau_display_create(struct drm_device *dev)
341{
77145f1c 342 struct nouveau_drm *drm = nouveau_drm(dev);
77145f1c 343 struct nouveau_display *disp;
de691855 344 int ret, gen;
27d5030a 345
77145f1c
BS
346 disp = drm->display = kzalloc(sizeof(*disp), GFP_KERNEL);
347 if (!disp)
348 return -ENOMEM;
349
27d5030a
BS
350 drm_mode_config_init(dev);
351 drm_mode_create_scaling_mode_property(dev);
4ceca5f8 352 drm_mode_create_dvi_i_properties(dev);
de691855 353
77145f1c 354 if (nv_device(drm->device)->card_type < NV_50)
de691855
BS
355 gen = 0;
356 else
77145f1c 357 if (nv_device(drm->device)->card_type < NV_D0)
de691855
BS
358 gen = 1;
359 else
360 gen = 2;
361
362 PROP_ENUM(disp->dithering_mode, gen, "dithering mode", dither_mode);
363 PROP_ENUM(disp->dithering_depth, gen, "dithering depth", dither_depth);
364 PROP_ENUM(disp->underscan_property, gen, "underscan", underscan);
b29caa58
BS
365
366 disp->underscan_hborder_property =
d9bc3c02 367 drm_property_create_range(dev, 0, "underscan hborder", 0, 128);
b29caa58
BS
368
369 disp->underscan_vborder_property =
d9bc3c02 370 drm_property_create_range(dev, 0, "underscan vborder", 0, 128);
b29caa58 371
f9887d09 372 if (gen >= 1) {
03e9a040 373 /* -90..+90 */
df26bc9c 374 disp->vibrant_hue_property =
03e9a040 375 drm_property_create_range(dev, 0, "vibrant hue", 0, 180);
df26bc9c 376
03e9a040 377 /* -100..+100 */
df26bc9c 378 disp->color_vibrance_property =
03e9a040 379 drm_property_create_range(dev, 0, "color vibrance", 0, 200);
df26bc9c
CB
380 }
381
e6ecefaa 382 dev->mode_config.funcs = &nouveau_mode_config_funcs;
27d5030a
BS
383 dev->mode_config.fb_base = pci_resource_start(dev->pdev, 1);
384
385 dev->mode_config.min_width = 0;
386 dev->mode_config.min_height = 0;
77145f1c 387 if (nv_device(drm->device)->card_type < NV_10) {
27d5030a
BS
388 dev->mode_config.max_width = 2048;
389 dev->mode_config.max_height = 2048;
390 } else
77145f1c 391 if (nv_device(drm->device)->card_type < NV_50) {
27d5030a
BS
392 dev->mode_config.max_width = 4096;
393 dev->mode_config.max_height = 4096;
394 } else {
395 dev->mode_config.max_width = 8192;
396 dev->mode_config.max_height = 8192;
397 }
398
f1377998
DA
399 dev->mode_config.preferred_depth = 24;
400 dev->mode_config.prefer_shadow = 1;
401
f62b27db
BS
402 drm_kms_helper_poll_init(dev);
403 drm_kms_helper_poll_disable(dev);
404
fc162088
BS
405 if (drm->vbios.dcb.entries) {
406 if (nv_device(drm->device)->card_type < NV_50)
407 ret = nv04_display_create(dev);
408 else
409 ret = nv50_display_create(dev);
410 } else {
411 ret = 0;
412 }
9430738d 413
fc162088
BS
414 if (ret)
415 goto disp_create_err;
9430738d 416
fc162088 417 if (dev->mode_config.num_crtc) {
51cb4b39 418 ret = nouveau_display_vblank_init(dev);
fc162088
BS
419 if (ret)
420 goto vblank_err;
f62b27db
BS
421 }
422
fc162088 423 nouveau_backlight_init(dev);
5ace2c9d
MS
424 return 0;
425
426vblank_err:
77145f1c 427 disp->dtor(dev);
5ace2c9d
MS
428disp_create_err:
429 drm_kms_helper_poll_fini(dev);
430 drm_mode_config_cleanup(dev);
2a44e499 431 return ret;
27d5030a
BS
432}
433
434void
435nouveau_display_destroy(struct drm_device *dev)
436{
77145f1c 437 struct nouveau_display *disp = nouveau_display(dev);
27d5030a 438
77145f1c 439 nouveau_backlight_exit(dev);
51cb4b39 440 nouveau_display_vblank_fini(dev);
f62b27db 441
d6bf2f37
BS
442 drm_kms_helper_poll_fini(dev);
443 drm_mode_config_cleanup(dev);
444
9430738d
BS
445 if (disp->dtor)
446 disp->dtor(dev);
f62b27db 447
77145f1c
BS
448 nouveau_drm(dev)->display = NULL;
449 kfree(disp);
450}
451
452int
453nouveau_display_suspend(struct drm_device *dev)
454{
455 struct nouveau_drm *drm = nouveau_drm(dev);
456 struct drm_crtc *crtc;
457
458 nouveau_display_fini(dev);
459
5addcf0a 460 NV_SUSPEND(drm, "unpinning framebuffer(s)...\n");
77145f1c
BS
461 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
462 struct nouveau_framebuffer *nouveau_fb;
463
464 nouveau_fb = nouveau_framebuffer(crtc->fb);
465 if (!nouveau_fb || !nouveau_fb->nvbo)
466 continue;
467
468 nouveau_bo_unpin(nouveau_fb->nvbo);
469 }
470
471 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
472 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
473
474 nouveau_bo_unmap(nv_crtc->cursor.nvbo);
475 nouveau_bo_unpin(nv_crtc->cursor.nvbo);
476 }
477
478 return 0;
479}
480
481void
5addcf0a 482nouveau_display_repin(struct drm_device *dev)
77145f1c
BS
483{
484 struct nouveau_drm *drm = nouveau_drm(dev);
485 struct drm_crtc *crtc;
486 int ret;
487
488 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
489 struct nouveau_framebuffer *nouveau_fb;
490
491 nouveau_fb = nouveau_framebuffer(crtc->fb);
492 if (!nouveau_fb || !nouveau_fb->nvbo)
493 continue;
494
495 nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
496 }
497
498 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
499 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
500
501 ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
502 if (!ret)
503 ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
504 if (ret)
505 NV_ERROR(drm, "Could not pin/map cursor.\n");
506 }
5addcf0a 507}
77145f1c 508
5addcf0a
DA
509void
510nouveau_display_resume(struct drm_device *dev)
511{
512 struct drm_crtc *crtc;
77145f1c
BS
513 nouveau_display_init(dev);
514
515 /* Force CLUT to get re-loaded during modeset */
516 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
517 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
518
519 nv_crtc->lut.depth = 0;
520 }
521
522 drm_helper_resume_force_mode(dev);
523
524 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
525 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
526 u32 offset = nv_crtc->cursor.nvbo->bo.offset;
527
528 nv_crtc->cursor.set_offset(nv_crtc, offset);
529 nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
530 nv_crtc->cursor_saved_y);
531 }
27d5030a
BS
532}
533
332b242f
FJ
534static int
535nouveau_page_flip_emit(struct nouveau_channel *chan,
536 struct nouveau_bo *old_bo,
537 struct nouveau_bo *new_bo,
538 struct nouveau_page_flip_state *s,
539 struct nouveau_fence **pfence)
540{
f589be88 541 struct nouveau_fence_chan *fctx = chan->fence;
77145f1c
BS
542 struct nouveau_drm *drm = chan->drm;
543 struct drm_device *dev = drm->dev;
332b242f
FJ
544 unsigned long flags;
545 int ret;
546
547 /* Queue it to the pending list */
548 spin_lock_irqsave(&dev->event_lock, flags);
f589be88 549 list_add_tail(&s->head, &fctx->flip);
332b242f
FJ
550 spin_unlock_irqrestore(&dev->event_lock, flags);
551
552 /* Synchronize with the old framebuffer */
553 ret = nouveau_fence_sync(old_bo->bo.sync_obj, chan);
554 if (ret)
555 goto fail;
556
557 /* Emit the pageflip */
d5316e25 558 ret = RING_SPACE(chan, 3);
332b242f
FJ
559 if (ret)
560 goto fail;
561
77145f1c 562 if (nv_device(drm->device)->card_type < NV_C0) {
6d597027 563 BEGIN_NV04(chan, NvSubSw, NV_SW_PAGE_FLIP, 1);
d5316e25
BS
564 OUT_RING (chan, 0x00000000);
565 OUT_RING (chan, 0x00000000);
566 } else {
6d597027 567 BEGIN_NVC0(chan, 0, NV10_SUBCHAN_REF_CNT, 1);
5e120f6e 568 OUT_RING (chan, 0);
6d597027 569 BEGIN_IMC0(chan, 0, NVSW_SUBCHAN_PAGE_FLIP, 0x0000);
d5316e25 570 }
bd2f2037 571 FIRE_RING (chan);
332b242f 572
264ce192 573 ret = nouveau_fence_new(chan, false, pfence);
332b242f
FJ
574 if (ret)
575 goto fail;
576
577 return 0;
578fail:
579 spin_lock_irqsave(&dev->event_lock, flags);
580 list_del(&s->head);
581 spin_unlock_irqrestore(&dev->event_lock, flags);
582 return ret;
583}
584
585int
586nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,
ed8d1975
KP
587 struct drm_pending_vblank_event *event,
588 uint32_t page_flip_flags)
332b242f
FJ
589{
590 struct drm_device *dev = crtc->dev;
77145f1c 591 struct nouveau_drm *drm = nouveau_drm(dev);
332b242f
FJ
592 struct nouveau_bo *old_bo = nouveau_framebuffer(crtc->fb)->nvbo;
593 struct nouveau_bo *new_bo = nouveau_framebuffer(fb)->nvbo;
594 struct nouveau_page_flip_state *s;
d375e7d5 595 struct nouveau_channel *chan = NULL;
332b242f 596 struct nouveau_fence *fence;
060810d7
BS
597 struct ttm_validate_buffer resv[2] = {
598 { .bo = &old_bo->bo },
599 { .bo = &new_bo->bo },
600 };
b580c9e2 601 struct ww_acquire_ctx ticket;
060810d7 602 LIST_HEAD(res);
332b242f
FJ
603 int ret;
604
77145f1c 605 if (!drm->channel)
332b242f
FJ
606 return -ENODEV;
607
608 s = kzalloc(sizeof(*s), GFP_KERNEL);
609 if (!s)
610 return -ENOMEM;
611
332b242f 612 /* Choose the channel the flip will be handled in */
b580c9e2 613 spin_lock(&old_bo->bo.bdev->fence_lock);
d375e7d5
BS
614 fence = new_bo->bo.sync_obj;
615 if (fence)
ebb945a9 616 chan = fence->channel;
332b242f 617 if (!chan)
77145f1c 618 chan = drm->channel;
b580c9e2
ML
619 spin_unlock(&old_bo->bo.bdev->fence_lock);
620
b580c9e2
ML
621 if (new_bo != old_bo) {
622 ret = nouveau_bo_pin(new_bo, TTM_PL_FLAG_VRAM);
060810d7
BS
623 if (ret)
624 goto fail_free;
b580c9e2 625
060810d7 626 list_add(&resv[1].head, &res);
b580c9e2 627 }
060810d7
BS
628 list_add(&resv[0].head, &res);
629
630 mutex_lock(&chan->cli->mutex);
631 ret = ttm_eu_reserve_buffers(&ticket, &res);
632 if (ret)
633 goto fail_unpin;
b580c9e2
ML
634
635 /* Initialize a page flip struct */
636 *s = (struct nouveau_page_flip_state)
637 { { }, event, nouveau_crtc(crtc)->index,
638 fb->bits_per_pixel, fb->pitches[0], crtc->x, crtc->y,
639 new_bo->bo.offset };
640
332b242f 641 /* Emit a page flip */
77145f1c 642 if (nv_device(drm->device)->card_type >= NV_50) {
e225f446 643 ret = nv50_display_flip_next(crtc, fb, chan, 0);
060810d7 644 if (ret)
d7117e0d 645 goto fail_unreserve;
78ae0ad4
BS
646 } else {
647 struct nv04_display *dispnv04 = nv04_display(dev);
648 nouveau_bo_ref(new_bo, &dispnv04->image[nouveau_crtc(crtc)->index]);
d7117e0d
BS
649 }
650
332b242f 651 ret = nouveau_page_flip_emit(chan, old_bo, new_bo, s, &fence);
77145f1c 652 mutex_unlock(&chan->cli->mutex);
332b242f
FJ
653 if (ret)
654 goto fail_unreserve;
655
656 /* Update the crtc struct and cleanup */
657 crtc->fb = fb;
658
060810d7
BS
659 ttm_eu_fence_buffer_objects(&ticket, &res, fence);
660 if (old_bo != new_bo)
b580c9e2 661 nouveau_bo_unpin(old_bo);
332b242f
FJ
662 nouveau_fence_unref(&fence);
663 return 0;
664
665fail_unreserve:
060810d7
BS
666 ttm_eu_backoff_reservation(&ticket, &res);
667fail_unpin:
668 mutex_unlock(&chan->cli->mutex);
669 if (old_bo != new_bo)
b580c9e2 670 nouveau_bo_unpin(new_bo);
332b242f
FJ
671fail_free:
672 kfree(s);
673 return ret;
674}
675
676int
677nouveau_finish_page_flip(struct nouveau_channel *chan,
678 struct nouveau_page_flip_state *ps)
679{
f589be88 680 struct nouveau_fence_chan *fctx = chan->fence;
77145f1c
BS
681 struct nouveau_drm *drm = chan->drm;
682 struct drm_device *dev = drm->dev;
332b242f
FJ
683 struct nouveau_page_flip_state *s;
684 unsigned long flags;
685
686 spin_lock_irqsave(&dev->event_lock, flags);
687
f589be88 688 if (list_empty(&fctx->flip)) {
77145f1c 689 NV_ERROR(drm, "unexpected pageflip\n");
332b242f
FJ
690 spin_unlock_irqrestore(&dev->event_lock, flags);
691 return -EINVAL;
692 }
693
f589be88 694 s = list_first_entry(&fctx->flip, struct nouveau_page_flip_state, head);
95d38d14
RC
695 if (s->event)
696 drm_send_vblank_event(dev, -1, s->event);
332b242f
FJ
697
698 list_del(&s->head);
d7117e0d
BS
699 if (ps)
700 *ps = *s;
332b242f
FJ
701 kfree(s);
702
703 spin_unlock_irqrestore(&dev->event_lock, flags);
704 return 0;
705}
33dbc27f 706
f589be88
BS
707int
708nouveau_flip_complete(void *data)
709{
710 struct nouveau_channel *chan = data;
77145f1c 711 struct nouveau_drm *drm = chan->drm;
f589be88
BS
712 struct nouveau_page_flip_state state;
713
714 if (!nouveau_finish_page_flip(chan, &state)) {
77145f1c
BS
715 if (nv_device(drm->device)->card_type < NV_50) {
716 nv_set_crtc_base(drm->dev, state.crtc, state.offset +
f589be88
BS
717 state.y * state.pitch +
718 state.x * state.bpp / 8);
719 }
720 }
721
722 return 0;
723}
724
33dbc27f
BS
725int
726nouveau_display_dumb_create(struct drm_file *file_priv, struct drm_device *dev,
727 struct drm_mode_create_dumb *args)
728{
729 struct nouveau_bo *bo;
730 int ret;
731
732 args->pitch = roundup(args->width * (args->bpp / 8), 256);
733 args->size = args->pitch * args->height;
734 args->size = roundup(args->size, PAGE_SIZE);
735
610bd7da 736 ret = nouveau_gem_new(dev, args->size, 0, NOUVEAU_GEM_DOMAIN_VRAM, 0, 0, &bo);
33dbc27f
BS
737 if (ret)
738 return ret;
739
55fb74ad
DH
740 ret = drm_gem_handle_create(file_priv, &bo->gem, &args->handle);
741 drm_gem_object_unreference_unlocked(&bo->gem);
33dbc27f
BS
742 return ret;
743}
744
33dbc27f
BS
745int
746nouveau_display_dumb_map_offset(struct drm_file *file_priv,
747 struct drm_device *dev,
748 uint32_t handle, uint64_t *poffset)
749{
750 struct drm_gem_object *gem;
751
752 gem = drm_gem_object_lookup(dev, file_priv, handle);
753 if (gem) {
55fb74ad 754 struct nouveau_bo *bo = nouveau_gem_object(gem);
72525b3f 755 *poffset = drm_vma_node_offset_addr(&bo->bo.vma_node);
33dbc27f
BS
756 drm_gem_object_unreference_unlocked(gem);
757 return 0;
758 }
759
760 return -ENOENT;
761}