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6ee73861 BS |
1 | /* |
2 | * Copyright (C) 2008 Maarten Maathuis. | |
3 | * All Rights Reserved. | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining | |
6 | * a copy of this software and associated documentation files (the | |
7 | * "Software"), to deal in the Software without restriction, including | |
8 | * without limitation the rights to use, copy, modify, merge, publish, | |
9 | * distribute, sublicense, and/or sell copies of the Software, and to | |
10 | * permit persons to whom the Software is furnished to do so, subject to | |
11 | * the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice (including the | |
14 | * next paragraph) shall be included in all copies or substantial | |
15 | * portions of the Software. | |
16 | * | |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
18 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
19 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. | |
20 | * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE | |
21 | * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION | |
22 | * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION | |
23 | * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. | |
24 | * | |
25 | */ | |
26 | ||
760285e7 DH |
27 | #include <drm/drmP.h> |
28 | #include <drm/drm_crtc_helper.h> | |
77145f1c | 29 | |
6ee73861 | 30 | #include "nouveau_fbcon.h" |
042206c0 | 31 | #include "nouveau_hw.h" |
332b242f FJ |
32 | #include "nouveau_crtc.h" |
33 | #include "nouveau_dma.h" | |
77145f1c | 34 | #include "nouveau_gem.h" |
de691855 | 35 | #include "nouveau_connector.h" |
45c4e0aa | 36 | #include "nv50_display.h" |
6ee73861 | 37 | |
ebb945a9 BS |
38 | #include "nouveau_fence.h" |
39 | ||
e0996aea | 40 | #include <subdev/bios/gpio.h> |
77145f1c BS |
41 | #include <subdev/gpio.h> |
42 | #include <engine/disp.h> | |
e0996aea | 43 | |
6ee73861 BS |
44 | static void |
45 | nouveau_user_framebuffer_destroy(struct drm_framebuffer *drm_fb) | |
46 | { | |
47 | struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb); | |
6ee73861 | 48 | |
bc9025bd LB |
49 | if (fb->nvbo) |
50 | drm_gem_object_unreference_unlocked(fb->nvbo->gem); | |
6ee73861 BS |
51 | |
52 | drm_framebuffer_cleanup(drm_fb); | |
53 | kfree(fb); | |
54 | } | |
55 | ||
56 | static int | |
57 | nouveau_user_framebuffer_create_handle(struct drm_framebuffer *drm_fb, | |
58 | struct drm_file *file_priv, | |
59 | unsigned int *handle) | |
60 | { | |
61 | struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb); | |
62 | ||
63 | return drm_gem_handle_create(file_priv, fb->nvbo->gem, handle); | |
64 | } | |
65 | ||
66 | static const struct drm_framebuffer_funcs nouveau_framebuffer_funcs = { | |
67 | .destroy = nouveau_user_framebuffer_destroy, | |
68 | .create_handle = nouveau_user_framebuffer_create_handle, | |
69 | }; | |
70 | ||
38651674 | 71 | int |
45c4e0aa BS |
72 | nouveau_framebuffer_init(struct drm_device *dev, |
73 | struct nouveau_framebuffer *nv_fb, | |
308e5bcb | 74 | struct drm_mode_fb_cmd2 *mode_cmd, |
45c4e0aa | 75 | struct nouveau_bo *nvbo) |
6ee73861 | 76 | { |
77145f1c | 77 | struct nouveau_drm *drm = nouveau_drm(dev); |
45c4e0aa | 78 | struct drm_framebuffer *fb = &nv_fb->base; |
6ee73861 BS |
79 | int ret; |
80 | ||
45c4e0aa | 81 | ret = drm_framebuffer_init(dev, fb, &nouveau_framebuffer_funcs); |
6ee73861 | 82 | if (ret) { |
38651674 | 83 | return ret; |
6ee73861 BS |
84 | } |
85 | ||
45c4e0aa BS |
86 | drm_helper_mode_fill_fb_struct(fb, mode_cmd); |
87 | nv_fb->nvbo = nvbo; | |
88 | ||
77145f1c | 89 | if (nv_device(drm->device)->card_type >= NV_50) { |
45c4e0aa BS |
90 | u32 tile_flags = nouveau_bo_tile_layout(nvbo); |
91 | if (tile_flags == 0x7a00 || | |
92 | tile_flags == 0xfe00) | |
93 | nv_fb->r_dma = NvEvoFB32; | |
94 | else | |
95 | if (tile_flags == 0x7000) | |
96 | nv_fb->r_dma = NvEvoFB16; | |
97 | else | |
98 | nv_fb->r_dma = NvEvoVRAM_LP; | |
99 | ||
100 | switch (fb->depth) { | |
101 | case 8: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_8; break; | |
102 | case 15: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_15; break; | |
103 | case 16: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_16; break; | |
104 | case 24: | |
105 | case 32: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_24; break; | |
106 | case 30: nv_fb->r_format = NV50_EVO_CRTC_FB_DEPTH_30; break; | |
107 | default: | |
77145f1c | 108 | NV_ERROR(drm, "unknown depth %d\n", fb->depth); |
45c4e0aa BS |
109 | return -EINVAL; |
110 | } | |
111 | ||
77145f1c | 112 | if (nv_device(drm->device)->chipset == 0x50) |
45c4e0aa BS |
113 | nv_fb->r_format |= (tile_flags << 8); |
114 | ||
2fad3d5e | 115 | if (!tile_flags) { |
77145f1c | 116 | if (nv_device(drm->device)->card_type < NV_D0) |
01f2c773 | 117 | nv_fb->r_pitch = 0x00100000 | fb->pitches[0]; |
2fad3d5e | 118 | else |
01f2c773 | 119 | nv_fb->r_pitch = 0x01000000 | fb->pitches[0]; |
2fad3d5e | 120 | } else { |
45c4e0aa | 121 | u32 mode = nvbo->tile_mode; |
77145f1c | 122 | if (nv_device(drm->device)->card_type >= NV_C0) |
45c4e0aa | 123 | mode >>= 4; |
01f2c773 | 124 | nv_fb->r_pitch = ((fb->pitches[0] / 4) << 4) | mode; |
45c4e0aa BS |
125 | } |
126 | } | |
127 | ||
38651674 | 128 | return 0; |
6ee73861 BS |
129 | } |
130 | ||
131 | static struct drm_framebuffer * | |
132 | nouveau_user_framebuffer_create(struct drm_device *dev, | |
133 | struct drm_file *file_priv, | |
308e5bcb | 134 | struct drm_mode_fb_cmd2 *mode_cmd) |
6ee73861 | 135 | { |
38651674 | 136 | struct nouveau_framebuffer *nouveau_fb; |
6ee73861 | 137 | struct drm_gem_object *gem; |
38651674 | 138 | int ret; |
6ee73861 | 139 | |
308e5bcb | 140 | gem = drm_gem_object_lookup(dev, file_priv, mode_cmd->handles[0]); |
6ee73861 | 141 | if (!gem) |
cce13ff7 | 142 | return ERR_PTR(-ENOENT); |
6ee73861 | 143 | |
38651674 DA |
144 | nouveau_fb = kzalloc(sizeof(struct nouveau_framebuffer), GFP_KERNEL); |
145 | if (!nouveau_fb) | |
cce13ff7 | 146 | return ERR_PTR(-ENOMEM); |
38651674 DA |
147 | |
148 | ret = nouveau_framebuffer_init(dev, nouveau_fb, mode_cmd, nouveau_gem_object(gem)); | |
149 | if (ret) { | |
6ee73861 | 150 | drm_gem_object_unreference(gem); |
cce13ff7 | 151 | return ERR_PTR(ret); |
6ee73861 BS |
152 | } |
153 | ||
38651674 | 154 | return &nouveau_fb->base; |
6ee73861 BS |
155 | } |
156 | ||
27d5030a | 157 | static const struct drm_mode_config_funcs nouveau_mode_config_funcs = { |
6ee73861 | 158 | .fb_create = nouveau_user_framebuffer_create, |
eb1f8e4f | 159 | .output_poll_changed = nouveau_fbcon_output_poll_changed, |
6ee73861 BS |
160 | }; |
161 | ||
b29caa58 | 162 | |
4a67d391 | 163 | struct nouveau_drm_prop_enum_list { |
de691855 | 164 | u8 gen_mask; |
b29caa58 BS |
165 | int type; |
166 | char *name; | |
167 | }; | |
168 | ||
4a67d391 | 169 | static struct nouveau_drm_prop_enum_list underscan[] = { |
92854622 BS |
170 | { 6, UNDERSCAN_AUTO, "auto" }, |
171 | { 6, UNDERSCAN_OFF, "off" }, | |
172 | { 6, UNDERSCAN_ON, "on" }, | |
de691855 | 173 | {} |
b29caa58 BS |
174 | }; |
175 | ||
4a67d391 | 176 | static struct nouveau_drm_prop_enum_list dither_mode[] = { |
de691855 BS |
177 | { 7, DITHERING_MODE_AUTO, "auto" }, |
178 | { 7, DITHERING_MODE_OFF, "off" }, | |
179 | { 1, DITHERING_MODE_ON, "on" }, | |
180 | { 6, DITHERING_MODE_STATIC2X2, "static 2x2" }, | |
181 | { 6, DITHERING_MODE_DYNAMIC2X2, "dynamic 2x2" }, | |
182 | { 4, DITHERING_MODE_TEMPORAL, "temporal" }, | |
183 | {} | |
184 | }; | |
185 | ||
4a67d391 | 186 | static struct nouveau_drm_prop_enum_list dither_depth[] = { |
de691855 BS |
187 | { 6, DITHERING_DEPTH_AUTO, "auto" }, |
188 | { 6, DITHERING_DEPTH_6BPC, "6 bpc" }, | |
189 | { 6, DITHERING_DEPTH_8BPC, "8 bpc" }, | |
190 | {} | |
191 | }; | |
192 | ||
193 | #define PROP_ENUM(p,gen,n,list) do { \ | |
4a67d391 | 194 | struct nouveau_drm_prop_enum_list *l = (list); \ |
de691855 BS |
195 | int c = 0; \ |
196 | while (l->gen_mask) { \ | |
197 | if (l->gen_mask & (1 << (gen))) \ | |
198 | c++; \ | |
199 | l++; \ | |
200 | } \ | |
201 | if (c) { \ | |
202 | p = drm_property_create(dev, DRM_MODE_PROP_ENUM, n, c); \ | |
203 | l = (list); \ | |
204 | c = 0; \ | |
205 | while (p && l->gen_mask) { \ | |
206 | if (l->gen_mask & (1 << (gen))) { \ | |
207 | drm_property_add_enum(p, c, l->type, l->name); \ | |
208 | c++; \ | |
209 | } \ | |
210 | l++; \ | |
211 | } \ | |
212 | } \ | |
213 | } while(0) | |
214 | ||
f62b27db BS |
215 | int |
216 | nouveau_display_init(struct drm_device *dev) | |
217 | { | |
77145f1c BS |
218 | struct nouveau_drm *drm = nouveau_drm(dev); |
219 | struct nouveau_display *disp = nouveau_display(dev); | |
220 | struct nouveau_gpio *gpio = nouveau_gpio(drm->device); | |
52c4d767 | 221 | struct drm_connector *connector; |
f62b27db BS |
222 | int ret; |
223 | ||
224 | ret = disp->init(dev); | |
52c4d767 BS |
225 | if (ret) |
226 | return ret; | |
227 | ||
7df898b1 BS |
228 | /* power on internal panel if it's not already. the init tables of |
229 | * some vbios default this to off for some reason, causing the | |
230 | * panel to not work after resume | |
231 | */ | |
77145f1c BS |
232 | if (gpio && gpio->get(gpio, 0, DCB_GPIO_PANEL_POWER, 0xff) == 0) { |
233 | gpio->set(gpio, 0, DCB_GPIO_PANEL_POWER, 0xff, 1); | |
7df898b1 BS |
234 | msleep(300); |
235 | } | |
236 | ||
237 | /* enable polling for external displays */ | |
52c4d767 BS |
238 | drm_kms_helper_poll_enable(dev); |
239 | ||
240 | /* enable hotplug interrupts */ | |
241 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | |
242 | struct nouveau_connector *conn = nouveau_connector(connector); | |
77145f1c BS |
243 | if (gpio) |
244 | gpio->irq(gpio, 0, conn->hpd, 0xff, true); | |
f62b27db BS |
245 | } |
246 | ||
247 | return ret; | |
248 | } | |
249 | ||
250 | void | |
251 | nouveau_display_fini(struct drm_device *dev) | |
252 | { | |
77145f1c BS |
253 | struct nouveau_drm *drm = nouveau_drm(dev); |
254 | struct nouveau_display *disp = nouveau_display(dev); | |
255 | struct nouveau_gpio *gpio = nouveau_gpio(drm->device); | |
52c4d767 BS |
256 | struct drm_connector *connector; |
257 | ||
258 | /* disable hotplug interrupts */ | |
259 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | |
260 | struct nouveau_connector *conn = nouveau_connector(connector); | |
77145f1c BS |
261 | if (gpio) |
262 | gpio->irq(gpio, 0, conn->hpd, 0xff, false); | |
52c4d767 | 263 | } |
f62b27db BS |
264 | |
265 | drm_kms_helper_poll_disable(dev); | |
266 | disp->fini(dev); | |
267 | } | |
268 | ||
ebb945a9 BS |
269 | static void |
270 | nouveau_display_vblank_notify(void *data, int crtc) | |
271 | { | |
272 | drm_handle_vblank(data, crtc); | |
273 | } | |
274 | ||
275 | static void | |
276 | nouveau_display_vblank_get(void *data, int crtc) | |
277 | { | |
278 | drm_vblank_get(data, crtc); | |
279 | } | |
280 | ||
281 | static void | |
282 | nouveau_display_vblank_put(void *data, int crtc) | |
283 | { | |
284 | drm_vblank_put(data, crtc); | |
285 | } | |
286 | ||
27d5030a BS |
287 | int |
288 | nouveau_display_create(struct drm_device *dev) | |
289 | { | |
77145f1c BS |
290 | struct nouveau_drm *drm = nouveau_drm(dev); |
291 | struct nouveau_disp *pdisp = nouveau_disp(drm->device); | |
292 | struct nouveau_display *disp; | |
e412e95a | 293 | u32 pclass = dev->pdev->class >> 8; |
de691855 | 294 | int ret, gen; |
27d5030a | 295 | |
77145f1c BS |
296 | disp = drm->display = kzalloc(sizeof(*disp), GFP_KERNEL); |
297 | if (!disp) | |
298 | return -ENOMEM; | |
299 | ||
300 | pdisp->vblank.data = dev; | |
301 | pdisp->vblank.notify = nouveau_display_vblank_notify; | |
302 | pdisp->vblank.get = nouveau_display_vblank_get; | |
303 | pdisp->vblank.put = nouveau_display_vblank_put; | |
304 | ||
27d5030a BS |
305 | drm_mode_config_init(dev); |
306 | drm_mode_create_scaling_mode_property(dev); | |
4ceca5f8 | 307 | drm_mode_create_dvi_i_properties(dev); |
de691855 | 308 | |
77145f1c | 309 | if (nv_device(drm->device)->card_type < NV_50) |
de691855 BS |
310 | gen = 0; |
311 | else | |
77145f1c | 312 | if (nv_device(drm->device)->card_type < NV_D0) |
de691855 BS |
313 | gen = 1; |
314 | else | |
315 | gen = 2; | |
316 | ||
317 | PROP_ENUM(disp->dithering_mode, gen, "dithering mode", dither_mode); | |
318 | PROP_ENUM(disp->dithering_depth, gen, "dithering depth", dither_depth); | |
319 | PROP_ENUM(disp->underscan_property, gen, "underscan", underscan); | |
b29caa58 BS |
320 | |
321 | disp->underscan_hborder_property = | |
d9bc3c02 | 322 | drm_property_create_range(dev, 0, "underscan hborder", 0, 128); |
b29caa58 BS |
323 | |
324 | disp->underscan_vborder_property = | |
d9bc3c02 | 325 | drm_property_create_range(dev, 0, "underscan vborder", 0, 128); |
b29caa58 | 326 | |
df26bc9c CB |
327 | if (gen == 1) { |
328 | disp->vibrant_hue_property = | |
329 | drm_property_create(dev, DRM_MODE_PROP_RANGE, | |
330 | "vibrant hue", 2); | |
331 | disp->vibrant_hue_property->values[0] = 0; | |
332 | disp->vibrant_hue_property->values[1] = 180; /* -90..+90 */ | |
333 | ||
334 | disp->color_vibrance_property = | |
335 | drm_property_create(dev, DRM_MODE_PROP_RANGE, | |
336 | "color vibrance", 2); | |
337 | disp->color_vibrance_property->values[0] = 0; | |
338 | disp->color_vibrance_property->values[1] = 200; /* -100..+100 */ | |
339 | } | |
340 | ||
e6ecefaa | 341 | dev->mode_config.funcs = &nouveau_mode_config_funcs; |
27d5030a BS |
342 | dev->mode_config.fb_base = pci_resource_start(dev->pdev, 1); |
343 | ||
344 | dev->mode_config.min_width = 0; | |
345 | dev->mode_config.min_height = 0; | |
77145f1c | 346 | if (nv_device(drm->device)->card_type < NV_10) { |
27d5030a BS |
347 | dev->mode_config.max_width = 2048; |
348 | dev->mode_config.max_height = 2048; | |
349 | } else | |
77145f1c | 350 | if (nv_device(drm->device)->card_type < NV_50) { |
27d5030a BS |
351 | dev->mode_config.max_width = 4096; |
352 | dev->mode_config.max_height = 4096; | |
353 | } else { | |
354 | dev->mode_config.max_width = 8192; | |
355 | dev->mode_config.max_height = 8192; | |
356 | } | |
357 | ||
f1377998 DA |
358 | dev->mode_config.preferred_depth = 24; |
359 | dev->mode_config.prefer_shadow = 1; | |
360 | ||
f62b27db BS |
361 | drm_kms_helper_poll_init(dev); |
362 | drm_kms_helper_poll_disable(dev); | |
363 | ||
e412e95a BS |
364 | if (nouveau_modeset == 1 || |
365 | (nouveau_modeset < 0 && pclass == PCI_CLASS_DISPLAY_VGA)) { | |
9430738d BS |
366 | if (nv_device(drm->device)->card_type < NV_50) |
367 | ret = nv04_display_create(dev); | |
368 | else | |
369 | if (nv_device(drm->device)->card_type < NV_D0) | |
370 | ret = nv50_display_create(dev); | |
371 | else | |
372 | ret = nvd0_display_create(dev); | |
f62b27db | 373 | if (ret) |
9430738d BS |
374 | goto disp_create_err; |
375 | ||
376 | if (dev->mode_config.num_crtc) { | |
377 | ret = drm_vblank_init(dev, dev->mode_config.num_crtc); | |
378 | if (ret) | |
379 | goto vblank_err; | |
380 | } | |
381 | ||
382 | nouveau_backlight_init(dev); | |
f62b27db BS |
383 | } |
384 | ||
5ace2c9d MS |
385 | return 0; |
386 | ||
387 | vblank_err: | |
77145f1c | 388 | disp->dtor(dev); |
5ace2c9d MS |
389 | disp_create_err: |
390 | drm_kms_helper_poll_fini(dev); | |
391 | drm_mode_config_cleanup(dev); | |
2a44e499 | 392 | return ret; |
27d5030a BS |
393 | } |
394 | ||
395 | void | |
396 | nouveau_display_destroy(struct drm_device *dev) | |
397 | { | |
77145f1c | 398 | struct nouveau_display *disp = nouveau_display(dev); |
27d5030a | 399 | |
77145f1c | 400 | nouveau_backlight_exit(dev); |
f62b27db BS |
401 | drm_vblank_cleanup(dev); |
402 | ||
d6bf2f37 BS |
403 | drm_kms_helper_poll_fini(dev); |
404 | drm_mode_config_cleanup(dev); | |
405 | ||
9430738d BS |
406 | if (disp->dtor) |
407 | disp->dtor(dev); | |
f62b27db | 408 | |
77145f1c BS |
409 | nouveau_drm(dev)->display = NULL; |
410 | kfree(disp); | |
411 | } | |
412 | ||
413 | int | |
414 | nouveau_display_suspend(struct drm_device *dev) | |
415 | { | |
416 | struct nouveau_drm *drm = nouveau_drm(dev); | |
417 | struct drm_crtc *crtc; | |
418 | ||
419 | nouveau_display_fini(dev); | |
420 | ||
421 | NV_INFO(drm, "unpinning framebuffer(s)...\n"); | |
422 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
423 | struct nouveau_framebuffer *nouveau_fb; | |
424 | ||
425 | nouveau_fb = nouveau_framebuffer(crtc->fb); | |
426 | if (!nouveau_fb || !nouveau_fb->nvbo) | |
427 | continue; | |
428 | ||
429 | nouveau_bo_unpin(nouveau_fb->nvbo); | |
430 | } | |
431 | ||
432 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
433 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | |
434 | ||
435 | nouveau_bo_unmap(nv_crtc->cursor.nvbo); | |
436 | nouveau_bo_unpin(nv_crtc->cursor.nvbo); | |
437 | } | |
438 | ||
439 | return 0; | |
440 | } | |
441 | ||
442 | void | |
443 | nouveau_display_resume(struct drm_device *dev) | |
444 | { | |
445 | struct nouveau_drm *drm = nouveau_drm(dev); | |
446 | struct drm_crtc *crtc; | |
447 | int ret; | |
448 | ||
449 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
450 | struct nouveau_framebuffer *nouveau_fb; | |
451 | ||
452 | nouveau_fb = nouveau_framebuffer(crtc->fb); | |
453 | if (!nouveau_fb || !nouveau_fb->nvbo) | |
454 | continue; | |
455 | ||
456 | nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM); | |
457 | } | |
458 | ||
459 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
460 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | |
461 | ||
462 | ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM); | |
463 | if (!ret) | |
464 | ret = nouveau_bo_map(nv_crtc->cursor.nvbo); | |
465 | if (ret) | |
466 | NV_ERROR(drm, "Could not pin/map cursor.\n"); | |
467 | } | |
468 | ||
469 | nouveau_fbcon_set_suspend(dev, 0); | |
470 | nouveau_fbcon_zfill_all(dev); | |
471 | ||
472 | nouveau_display_init(dev); | |
473 | ||
474 | /* Force CLUT to get re-loaded during modeset */ | |
475 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
476 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | |
477 | ||
478 | nv_crtc->lut.depth = 0; | |
479 | } | |
480 | ||
481 | drm_helper_resume_force_mode(dev); | |
482 | ||
483 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
484 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | |
485 | u32 offset = nv_crtc->cursor.nvbo->bo.offset; | |
486 | ||
487 | nv_crtc->cursor.set_offset(nv_crtc, offset); | |
488 | nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x, | |
489 | nv_crtc->cursor_saved_y); | |
490 | } | |
27d5030a BS |
491 | } |
492 | ||
042206c0 FJ |
493 | int |
494 | nouveau_vblank_enable(struct drm_device *dev, int crtc) | |
495 | { | |
77145f1c | 496 | struct nouveau_device *device = nouveau_dev(dev); |
042206c0 | 497 | |
77145f1c BS |
498 | if (device->card_type >= NV_D0) |
499 | nv_mask(device, 0x6100c0 + (crtc * 0x800), 1, 1); | |
ebb945a9 | 500 | else |
77145f1c BS |
501 | if (device->card_type >= NV_50) |
502 | nv_mask(device, NV50_PDISPLAY_INTR_EN_1, 0, | |
042206c0 FJ |
503 | NV50_PDISPLAY_INTR_EN_1_VBLANK_CRTC_(crtc)); |
504 | else | |
505 | NVWriteCRTC(dev, crtc, NV_PCRTC_INTR_EN_0, | |
506 | NV_PCRTC_INTR_0_VBLANK); | |
507 | ||
508 | return 0; | |
509 | } | |
510 | ||
511 | void | |
512 | nouveau_vblank_disable(struct drm_device *dev, int crtc) | |
513 | { | |
77145f1c | 514 | struct nouveau_device *device = nouveau_dev(dev); |
042206c0 | 515 | |
77145f1c BS |
516 | if (device->card_type >= NV_D0) |
517 | nv_mask(device, 0x6100c0 + (crtc * 0x800), 1, 0); | |
ebb945a9 | 518 | else |
77145f1c BS |
519 | if (device->card_type >= NV_50) |
520 | nv_mask(device, NV50_PDISPLAY_INTR_EN_1, | |
042206c0 FJ |
521 | NV50_PDISPLAY_INTR_EN_1_VBLANK_CRTC_(crtc), 0); |
522 | else | |
523 | NVWriteCRTC(dev, crtc, NV_PCRTC_INTR_EN_0, 0); | |
524 | } | |
332b242f FJ |
525 | |
526 | static int | |
527 | nouveau_page_flip_reserve(struct nouveau_bo *old_bo, | |
528 | struct nouveau_bo *new_bo) | |
529 | { | |
530 | int ret; | |
531 | ||
532 | ret = nouveau_bo_pin(new_bo, TTM_PL_FLAG_VRAM); | |
533 | if (ret) | |
534 | return ret; | |
535 | ||
536 | ret = ttm_bo_reserve(&new_bo->bo, false, false, false, 0); | |
537 | if (ret) | |
538 | goto fail; | |
539 | ||
2c14575f MS |
540 | if (likely(old_bo != new_bo)) { |
541 | ret = ttm_bo_reserve(&old_bo->bo, false, false, false, 0); | |
542 | if (ret) | |
543 | goto fail_unreserve; | |
544 | } | |
332b242f FJ |
545 | |
546 | return 0; | |
547 | ||
548 | fail_unreserve: | |
549 | ttm_bo_unreserve(&new_bo->bo); | |
550 | fail: | |
551 | nouveau_bo_unpin(new_bo); | |
552 | return ret; | |
553 | } | |
554 | ||
555 | static void | |
556 | nouveau_page_flip_unreserve(struct nouveau_bo *old_bo, | |
557 | struct nouveau_bo *new_bo, | |
558 | struct nouveau_fence *fence) | |
559 | { | |
560 | nouveau_bo_fence(new_bo, fence); | |
561 | ttm_bo_unreserve(&new_bo->bo); | |
562 | ||
2c14575f MS |
563 | if (likely(old_bo != new_bo)) { |
564 | nouveau_bo_fence(old_bo, fence); | |
565 | ttm_bo_unreserve(&old_bo->bo); | |
566 | } | |
332b242f FJ |
567 | |
568 | nouveau_bo_unpin(old_bo); | |
569 | } | |
570 | ||
571 | static int | |
572 | nouveau_page_flip_emit(struct nouveau_channel *chan, | |
573 | struct nouveau_bo *old_bo, | |
574 | struct nouveau_bo *new_bo, | |
575 | struct nouveau_page_flip_state *s, | |
576 | struct nouveau_fence **pfence) | |
577 | { | |
f589be88 | 578 | struct nouveau_fence_chan *fctx = chan->fence; |
77145f1c BS |
579 | struct nouveau_drm *drm = chan->drm; |
580 | struct drm_device *dev = drm->dev; | |
332b242f FJ |
581 | unsigned long flags; |
582 | int ret; | |
583 | ||
584 | /* Queue it to the pending list */ | |
585 | spin_lock_irqsave(&dev->event_lock, flags); | |
f589be88 | 586 | list_add_tail(&s->head, &fctx->flip); |
332b242f FJ |
587 | spin_unlock_irqrestore(&dev->event_lock, flags); |
588 | ||
589 | /* Synchronize with the old framebuffer */ | |
590 | ret = nouveau_fence_sync(old_bo->bo.sync_obj, chan); | |
591 | if (ret) | |
592 | goto fail; | |
593 | ||
594 | /* Emit the pageflip */ | |
d5316e25 | 595 | ret = RING_SPACE(chan, 3); |
332b242f FJ |
596 | if (ret) |
597 | goto fail; | |
598 | ||
77145f1c | 599 | if (nv_device(drm->device)->card_type < NV_C0) { |
6d597027 | 600 | BEGIN_NV04(chan, NvSubSw, NV_SW_PAGE_FLIP, 1); |
d5316e25 BS |
601 | OUT_RING (chan, 0x00000000); |
602 | OUT_RING (chan, 0x00000000); | |
603 | } else { | |
6d597027 | 604 | BEGIN_NVC0(chan, 0, NV10_SUBCHAN_REF_CNT, 1); |
5e120f6e | 605 | OUT_RING (chan, 0); |
6d597027 | 606 | BEGIN_IMC0(chan, 0, NVSW_SUBCHAN_PAGE_FLIP, 0x0000); |
d5316e25 | 607 | } |
bd2f2037 | 608 | FIRE_RING (chan); |
332b242f | 609 | |
d375e7d5 | 610 | ret = nouveau_fence_new(chan, pfence); |
332b242f FJ |
611 | if (ret) |
612 | goto fail; | |
613 | ||
614 | return 0; | |
615 | fail: | |
616 | spin_lock_irqsave(&dev->event_lock, flags); | |
617 | list_del(&s->head); | |
618 | spin_unlock_irqrestore(&dev->event_lock, flags); | |
619 | return ret; | |
620 | } | |
621 | ||
622 | int | |
623 | nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb, | |
624 | struct drm_pending_vblank_event *event) | |
625 | { | |
626 | struct drm_device *dev = crtc->dev; | |
77145f1c | 627 | struct nouveau_drm *drm = nouveau_drm(dev); |
332b242f FJ |
628 | struct nouveau_bo *old_bo = nouveau_framebuffer(crtc->fb)->nvbo; |
629 | struct nouveau_bo *new_bo = nouveau_framebuffer(fb)->nvbo; | |
630 | struct nouveau_page_flip_state *s; | |
d375e7d5 | 631 | struct nouveau_channel *chan = NULL; |
332b242f FJ |
632 | struct nouveau_fence *fence; |
633 | int ret; | |
634 | ||
77145f1c | 635 | if (!drm->channel) |
332b242f FJ |
636 | return -ENODEV; |
637 | ||
638 | s = kzalloc(sizeof(*s), GFP_KERNEL); | |
639 | if (!s) | |
640 | return -ENOMEM; | |
641 | ||
642 | /* Don't let the buffers go away while we flip */ | |
643 | ret = nouveau_page_flip_reserve(old_bo, new_bo); | |
644 | if (ret) | |
645 | goto fail_free; | |
646 | ||
647 | /* Initialize a page flip struct */ | |
648 | *s = (struct nouveau_page_flip_state) | |
2503c6fa | 649 | { { }, event, nouveau_crtc(crtc)->index, |
01f2c773 | 650 | fb->bits_per_pixel, fb->pitches[0], crtc->x, crtc->y, |
332b242f FJ |
651 | new_bo->bo.offset }; |
652 | ||
653 | /* Choose the channel the flip will be handled in */ | |
d375e7d5 BS |
654 | fence = new_bo->bo.sync_obj; |
655 | if (fence) | |
ebb945a9 | 656 | chan = fence->channel; |
332b242f | 657 | if (!chan) |
77145f1c BS |
658 | chan = drm->channel; |
659 | mutex_lock(&chan->cli->mutex); | |
332b242f FJ |
660 | |
661 | /* Emit a page flip */ | |
77145f1c BS |
662 | if (nv_device(drm->device)->card_type >= NV_50) { |
663 | if (nv_device(drm->device)->card_type >= NV_D0) | |
3376ee37 BS |
664 | ret = nvd0_display_flip_next(crtc, fb, chan, 0); |
665 | else | |
666 | ret = nv50_display_flip_next(crtc, fb, chan); | |
d7117e0d | 667 | if (ret) { |
77145f1c | 668 | mutex_unlock(&chan->cli->mutex); |
d7117e0d BS |
669 | goto fail_unreserve; |
670 | } | |
671 | } | |
672 | ||
332b242f | 673 | ret = nouveau_page_flip_emit(chan, old_bo, new_bo, s, &fence); |
77145f1c | 674 | mutex_unlock(&chan->cli->mutex); |
332b242f FJ |
675 | if (ret) |
676 | goto fail_unreserve; | |
677 | ||
678 | /* Update the crtc struct and cleanup */ | |
679 | crtc->fb = fb; | |
680 | ||
681 | nouveau_page_flip_unreserve(old_bo, new_bo, fence); | |
682 | nouveau_fence_unref(&fence); | |
683 | return 0; | |
684 | ||
685 | fail_unreserve: | |
686 | nouveau_page_flip_unreserve(old_bo, new_bo, NULL); | |
687 | fail_free: | |
688 | kfree(s); | |
689 | return ret; | |
690 | } | |
691 | ||
692 | int | |
693 | nouveau_finish_page_flip(struct nouveau_channel *chan, | |
694 | struct nouveau_page_flip_state *ps) | |
695 | { | |
f589be88 | 696 | struct nouveau_fence_chan *fctx = chan->fence; |
77145f1c BS |
697 | struct nouveau_drm *drm = chan->drm; |
698 | struct drm_device *dev = drm->dev; | |
332b242f FJ |
699 | struct nouveau_page_flip_state *s; |
700 | unsigned long flags; | |
701 | ||
702 | spin_lock_irqsave(&dev->event_lock, flags); | |
703 | ||
f589be88 | 704 | if (list_empty(&fctx->flip)) { |
77145f1c | 705 | NV_ERROR(drm, "unexpected pageflip\n"); |
332b242f FJ |
706 | spin_unlock_irqrestore(&dev->event_lock, flags); |
707 | return -EINVAL; | |
708 | } | |
709 | ||
f589be88 | 710 | s = list_first_entry(&fctx->flip, struct nouveau_page_flip_state, head); |
332b242f FJ |
711 | if (s->event) { |
712 | struct drm_pending_vblank_event *e = s->event; | |
713 | struct timeval now; | |
714 | ||
715 | do_gettimeofday(&now); | |
716 | e->event.sequence = 0; | |
717 | e->event.tv_sec = now.tv_sec; | |
718 | e->event.tv_usec = now.tv_usec; | |
719 | list_add_tail(&e->base.link, &e->base.file_priv->event_list); | |
720 | wake_up_interruptible(&e->base.file_priv->event_wait); | |
721 | } | |
722 | ||
723 | list_del(&s->head); | |
d7117e0d BS |
724 | if (ps) |
725 | *ps = *s; | |
332b242f FJ |
726 | kfree(s); |
727 | ||
728 | spin_unlock_irqrestore(&dev->event_lock, flags); | |
729 | return 0; | |
730 | } | |
33dbc27f | 731 | |
f589be88 BS |
732 | int |
733 | nouveau_flip_complete(void *data) | |
734 | { | |
735 | struct nouveau_channel *chan = data; | |
77145f1c | 736 | struct nouveau_drm *drm = chan->drm; |
f589be88 BS |
737 | struct nouveau_page_flip_state state; |
738 | ||
739 | if (!nouveau_finish_page_flip(chan, &state)) { | |
77145f1c BS |
740 | if (nv_device(drm->device)->card_type < NV_50) { |
741 | nv_set_crtc_base(drm->dev, state.crtc, state.offset + | |
f589be88 BS |
742 | state.y * state.pitch + |
743 | state.x * state.bpp / 8); | |
744 | } | |
745 | } | |
746 | ||
747 | return 0; | |
748 | } | |
749 | ||
33dbc27f BS |
750 | int |
751 | nouveau_display_dumb_create(struct drm_file *file_priv, struct drm_device *dev, | |
752 | struct drm_mode_create_dumb *args) | |
753 | { | |
754 | struct nouveau_bo *bo; | |
755 | int ret; | |
756 | ||
757 | args->pitch = roundup(args->width * (args->bpp / 8), 256); | |
758 | args->size = args->pitch * args->height; | |
759 | args->size = roundup(args->size, PAGE_SIZE); | |
760 | ||
610bd7da | 761 | ret = nouveau_gem_new(dev, args->size, 0, NOUVEAU_GEM_DOMAIN_VRAM, 0, 0, &bo); |
33dbc27f BS |
762 | if (ret) |
763 | return ret; | |
764 | ||
765 | ret = drm_gem_handle_create(file_priv, bo->gem, &args->handle); | |
766 | drm_gem_object_unreference_unlocked(bo->gem); | |
767 | return ret; | |
768 | } | |
769 | ||
770 | int | |
771 | nouveau_display_dumb_destroy(struct drm_file *file_priv, struct drm_device *dev, | |
772 | uint32_t handle) | |
773 | { | |
774 | return drm_gem_handle_delete(file_priv, handle); | |
775 | } | |
776 | ||
777 | int | |
778 | nouveau_display_dumb_map_offset(struct drm_file *file_priv, | |
779 | struct drm_device *dev, | |
780 | uint32_t handle, uint64_t *poffset) | |
781 | { | |
782 | struct drm_gem_object *gem; | |
783 | ||
784 | gem = drm_gem_object_lookup(dev, file_priv, handle); | |
785 | if (gem) { | |
786 | struct nouveau_bo *bo = gem->driver_private; | |
787 | *poffset = bo->bo.addr_space_offset; | |
788 | drm_gem_object_unreference_unlocked(gem); | |
789 | return 0; | |
790 | } | |
791 | ||
792 | return -ENOENT; | |
793 | } |