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drm/nouveau: kill nouveau_dev() + wrap register macros
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CommitLineData
6ee73861
BS
1/*
2 * Copyright (C) 2008 Maarten Maathuis.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 *
25 */
26
760285e7
DH
27#include <drm/drmP.h>
28#include <drm/drm_crtc_helper.h>
77145f1c 29
6ee73861 30#include "nouveau_fbcon.h"
1a646342 31#include "dispnv04/hw.h"
332b242f
FJ
32#include "nouveau_crtc.h"
33#include "nouveau_dma.h"
77145f1c 34#include "nouveau_gem.h"
de691855 35#include "nouveau_connector.h"
45c4e0aa 36#include "nv50_display.h"
6ee73861 37
ebb945a9
BS
38#include "nouveau_fence.h"
39
77145f1c 40#include <engine/disp.h>
e0996aea 41
1d7c71a3 42#include <core/class.h>
79ca2770 43#include <nvif/event.h>
1d7c71a3 44
51cb4b39 45static int
79ca2770 46nouveau_display_vblank_handler(struct nvkm_notify *notify)
51cb4b39 47{
79ca2770
BS
48 struct nouveau_crtc *nv_crtc =
49 container_of(notify, typeof(*nv_crtc), vblank);
b12f0ae9 50 drm_handle_vblank(nv_crtc->base.dev, nv_crtc->index);
79ca2770 51 return NVKM_NOTIFY_KEEP;
51cb4b39
BS
52}
53
54int
55nouveau_display_vblank_enable(struct drm_device *dev, int head)
56{
b12f0ae9
BS
57 struct drm_crtc *crtc;
58 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
59 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
60 if (nv_crtc->index == head) {
79ca2770 61 nvkm_notify_get(&nv_crtc->vblank);
b12f0ae9
BS
62 return 0;
63 }
51cb4b39 64 }
b12f0ae9 65 return -EINVAL;
51cb4b39
BS
66}
67
68void
69nouveau_display_vblank_disable(struct drm_device *dev, int head)
70{
b12f0ae9
BS
71 struct drm_crtc *crtc;
72 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
73 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
74 if (nv_crtc->index == head) {
79ca2770 75 nvkm_notify_put(&nv_crtc->vblank);
b12f0ae9
BS
76 return;
77 }
78 }
51cb4b39
BS
79}
80
d83ef853
BS
81static inline int
82calc(int blanks, int blanke, int total, int line)
83{
84 if (blanke >= blanks) {
85 if (line >= blanks)
86 line -= total;
87 } else {
88 if (line >= blanks)
89 line -= total;
90 line -= blanke + 1;
91 }
92 return line;
93}
94
95int
96nouveau_display_scanoutpos_head(struct drm_crtc *crtc, int *vpos, int *hpos,
97 ktime_t *stime, ktime_t *etime)
98{
99 const u32 mthd = NV04_DISP_SCANOUTPOS + nouveau_crtc(crtc)->index;
100 struct nouveau_display *disp = nouveau_display(crtc->dev);
101 struct nv04_display_scanoutpos args;
102 int ret, retry = 1;
103
104 do {
105 ret = nv_exec(disp->core, mthd, &args, sizeof(args));
106 if (ret != 0)
107 return 0;
108
109 if (args.vline) {
110 ret |= DRM_SCANOUTPOS_ACCURATE;
111 ret |= DRM_SCANOUTPOS_VALID;
112 break;
113 }
114
115 if (retry) ndelay(crtc->linedur_ns);
116 } while (retry--);
117
6c3252bc 118 *hpos = args.hline;
d83ef853
BS
119 *vpos = calc(args.vblanks, args.vblanke, args.vtotal, args.vline);
120 if (stime) *stime = ns_to_ktime(args.time[0]);
121 if (etime) *etime = ns_to_ktime(args.time[1]);
122
123 if (*vpos < 0)
124 ret |= DRM_SCANOUTPOS_INVBL;
125 return ret;
126}
127
128int
129nouveau_display_scanoutpos(struct drm_device *dev, int head, unsigned int flags,
130 int *vpos, int *hpos, ktime_t *stime, ktime_t *etime)
131{
132 struct drm_crtc *crtc;
133
134 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
135 if (nouveau_crtc(crtc)->index == head) {
136 return nouveau_display_scanoutpos_head(crtc, vpos, hpos,
137 stime, etime);
138 }
139 }
140
141 return 0;
142}
143
144int
145nouveau_display_vblstamp(struct drm_device *dev, int head, int *max_error,
146 struct timeval *time, unsigned flags)
147{
148 struct drm_crtc *crtc;
149
150 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
151 if (nouveau_crtc(crtc)->index == head) {
152 return drm_calc_vbltimestamp_from_scanoutpos(dev,
153 head, max_error, time, flags, crtc,
154 &crtc->hwmode);
155 }
156 }
157
158 return -EINVAL;
159}
160
51cb4b39
BS
161static void
162nouveau_display_vblank_fini(struct drm_device *dev)
163{
b12f0ae9 164 struct drm_crtc *crtc;
51cb4b39 165
1139ffb9
BS
166 drm_vblank_cleanup(dev);
167
b12f0ae9
BS
168 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
169 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
79ca2770 170 nvkm_notify_fini(&nv_crtc->vblank);
51cb4b39 171 }
51cb4b39
BS
172}
173
174static int
175nouveau_display_vblank_init(struct drm_device *dev)
176{
51cb4b39
BS
177 struct nouveau_drm *drm = nouveau_drm(dev);
178 struct nouveau_disp *pdisp = nouveau_disp(drm->device);
b12f0ae9
BS
179 struct drm_crtc *crtc;
180 int ret;
51cb4b39 181
b12f0ae9
BS
182 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
183 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
79ca2770
BS
184 ret = nvkm_notify_init(&pdisp->vblank,
185 nouveau_display_vblank_handler, false,
186 &(struct nvif_notify_head_req_v0) {
187 .head = nv_crtc->index,
188 },
189 sizeof(struct nvif_notify_head_req_v0),
190 sizeof(struct nvif_notify_head_rep_v0),
191 &nv_crtc->vblank);
51cb4b39
BS
192 if (ret) {
193 nouveau_display_vblank_fini(dev);
194 return ret;
195 }
196 }
197
198 ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
199 if (ret) {
200 nouveau_display_vblank_fini(dev);
201 return ret;
202 }
203
204 return 0;
205}
206
6ee73861
BS
207static void
208nouveau_user_framebuffer_destroy(struct drm_framebuffer *drm_fb)
209{
210 struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
ab0af559
BS
211 struct nouveau_display *disp = nouveau_display(drm_fb->dev);
212
213 if (disp->fb_dtor)
214 disp->fb_dtor(drm_fb);
6ee73861 215
bc9025bd 216 if (fb->nvbo)
55fb74ad 217 drm_gem_object_unreference_unlocked(&fb->nvbo->gem);
6ee73861
BS
218
219 drm_framebuffer_cleanup(drm_fb);
220 kfree(fb);
221}
222
223static int
224nouveau_user_framebuffer_create_handle(struct drm_framebuffer *drm_fb,
225 struct drm_file *file_priv,
226 unsigned int *handle)
227{
228 struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
229
55fb74ad 230 return drm_gem_handle_create(file_priv, &fb->nvbo->gem, handle);
6ee73861
BS
231}
232
233static const struct drm_framebuffer_funcs nouveau_framebuffer_funcs = {
234 .destroy = nouveau_user_framebuffer_destroy,
235 .create_handle = nouveau_user_framebuffer_create_handle,
236};
237
38651674 238int
45c4e0aa
BS
239nouveau_framebuffer_init(struct drm_device *dev,
240 struct nouveau_framebuffer *nv_fb,
308e5bcb 241 struct drm_mode_fb_cmd2 *mode_cmd,
45c4e0aa 242 struct nouveau_bo *nvbo)
6ee73861 243{
ab0af559 244 struct nouveau_display *disp = nouveau_display(dev);
45c4e0aa 245 struct drm_framebuffer *fb = &nv_fb->base;
6ee73861
BS
246 int ret;
247
45c4e0aa
BS
248 drm_helper_mode_fill_fb_struct(fb, mode_cmd);
249 nv_fb->nvbo = nvbo;
250
c7d73f6a 251 ret = drm_framebuffer_init(dev, fb, &nouveau_framebuffer_funcs);
ab0af559 252 if (ret)
c7d73f6a 253 return ret;
ab0af559
BS
254
255 if (disp->fb_ctor) {
256 ret = disp->fb_ctor(fb);
257 if (ret)
258 disp->fb_dtor(fb);
c7d73f6a
DV
259 }
260
ab0af559 261 return ret;
6ee73861
BS
262}
263
264static struct drm_framebuffer *
265nouveau_user_framebuffer_create(struct drm_device *dev,
266 struct drm_file *file_priv,
308e5bcb 267 struct drm_mode_fb_cmd2 *mode_cmd)
6ee73861 268{
38651674 269 struct nouveau_framebuffer *nouveau_fb;
6ee73861 270 struct drm_gem_object *gem;
fdfb8332 271 int ret = -ENOMEM;
6ee73861 272
308e5bcb 273 gem = drm_gem_object_lookup(dev, file_priv, mode_cmd->handles[0]);
6ee73861 274 if (!gem)
cce13ff7 275 return ERR_PTR(-ENOENT);
6ee73861 276
38651674
DA
277 nouveau_fb = kzalloc(sizeof(struct nouveau_framebuffer), GFP_KERNEL);
278 if (!nouveau_fb)
fdfb8332 279 goto err_unref;
38651674
DA
280
281 ret = nouveau_framebuffer_init(dev, nouveau_fb, mode_cmd, nouveau_gem_object(gem));
fdfb8332
ML
282 if (ret)
283 goto err;
6ee73861 284
38651674 285 return &nouveau_fb->base;
fdfb8332
ML
286
287err:
288 kfree(nouveau_fb);
289err_unref:
290 drm_gem_object_unreference(gem);
291 return ERR_PTR(ret);
6ee73861
BS
292}
293
27d5030a 294static const struct drm_mode_config_funcs nouveau_mode_config_funcs = {
6ee73861 295 .fb_create = nouveau_user_framebuffer_create,
eb1f8e4f 296 .output_poll_changed = nouveau_fbcon_output_poll_changed,
6ee73861
BS
297};
298
b29caa58 299
4a67d391 300struct nouveau_drm_prop_enum_list {
de691855 301 u8 gen_mask;
b29caa58
BS
302 int type;
303 char *name;
304};
305
4a67d391 306static struct nouveau_drm_prop_enum_list underscan[] = {
92854622
BS
307 { 6, UNDERSCAN_AUTO, "auto" },
308 { 6, UNDERSCAN_OFF, "off" },
309 { 6, UNDERSCAN_ON, "on" },
de691855 310 {}
b29caa58
BS
311};
312
4a67d391 313static struct nouveau_drm_prop_enum_list dither_mode[] = {
de691855
BS
314 { 7, DITHERING_MODE_AUTO, "auto" },
315 { 7, DITHERING_MODE_OFF, "off" },
316 { 1, DITHERING_MODE_ON, "on" },
317 { 6, DITHERING_MODE_STATIC2X2, "static 2x2" },
318 { 6, DITHERING_MODE_DYNAMIC2X2, "dynamic 2x2" },
319 { 4, DITHERING_MODE_TEMPORAL, "temporal" },
320 {}
321};
322
4a67d391 323static struct nouveau_drm_prop_enum_list dither_depth[] = {
de691855
BS
324 { 6, DITHERING_DEPTH_AUTO, "auto" },
325 { 6, DITHERING_DEPTH_6BPC, "6 bpc" },
326 { 6, DITHERING_DEPTH_8BPC, "8 bpc" },
327 {}
328};
329
330#define PROP_ENUM(p,gen,n,list) do { \
4a67d391 331 struct nouveau_drm_prop_enum_list *l = (list); \
de691855
BS
332 int c = 0; \
333 while (l->gen_mask) { \
334 if (l->gen_mask & (1 << (gen))) \
335 c++; \
336 l++; \
337 } \
338 if (c) { \
339 p = drm_property_create(dev, DRM_MODE_PROP_ENUM, n, c); \
340 l = (list); \
341 c = 0; \
342 while (p && l->gen_mask) { \
343 if (l->gen_mask & (1 << (gen))) { \
344 drm_property_add_enum(p, c, l->type, l->name); \
345 c++; \
346 } \
347 l++; \
348 } \
349 } \
350} while(0)
351
f62b27db
BS
352int
353nouveau_display_init(struct drm_device *dev)
354{
77145f1c 355 struct nouveau_display *disp = nouveau_display(dev);
52c4d767 356 struct drm_connector *connector;
f62b27db
BS
357 int ret;
358
359 ret = disp->init(dev);
52c4d767
BS
360 if (ret)
361 return ret;
362
7df898b1 363 /* enable polling for external displays */
52c4d767
BS
364 drm_kms_helper_poll_enable(dev);
365
366 /* enable hotplug interrupts */
367 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
368 struct nouveau_connector *conn = nouveau_connector(connector);
79ca2770 369 nvkm_notify_get(&conn->hpd);
f62b27db
BS
370 }
371
372 return ret;
373}
374
375void
376nouveau_display_fini(struct drm_device *dev)
377{
77145f1c 378 struct nouveau_display *disp = nouveau_display(dev);
52c4d767 379 struct drm_connector *connector;
9cba5efa
MK
380 int head;
381
382 /* Make sure that drm and hw vblank irqs get properly disabled. */
383 for (head = 0; head < dev->mode_config.num_crtc; head++)
384 drm_vblank_off(dev, head);
52c4d767
BS
385
386 /* disable hotplug interrupts */
387 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
388 struct nouveau_connector *conn = nouveau_connector(connector);
79ca2770 389 nvkm_notify_put(&conn->hpd);
52c4d767 390 }
f62b27db
BS
391
392 drm_kms_helper_poll_disable(dev);
393 disp->fini(dev);
394}
395
9c210f37
BS
396static void
397nouveau_display_create_properties(struct drm_device *dev)
27d5030a 398{
9c210f37
BS
399 struct nouveau_display *disp = nouveau_display(dev);
400 int gen;
de691855 401
9c210f37 402 if (nv_mclass(disp->core) < NV50_DISP_CLASS)
de691855
BS
403 gen = 0;
404 else
9c210f37 405 if (nv_mclass(disp->core) < NVD0_DISP_CLASS)
de691855
BS
406 gen = 1;
407 else
408 gen = 2;
409
410 PROP_ENUM(disp->dithering_mode, gen, "dithering mode", dither_mode);
411 PROP_ENUM(disp->dithering_depth, gen, "dithering depth", dither_depth);
412 PROP_ENUM(disp->underscan_property, gen, "underscan", underscan);
b29caa58
BS
413
414 disp->underscan_hborder_property =
d9bc3c02 415 drm_property_create_range(dev, 0, "underscan hborder", 0, 128);
b29caa58
BS
416
417 disp->underscan_vborder_property =
d9bc3c02 418 drm_property_create_range(dev, 0, "underscan vborder", 0, 128);
b29caa58 419
9c210f37
BS
420 if (gen < 1)
421 return;
df26bc9c 422
9c210f37
BS
423 /* -90..+90 */
424 disp->vibrant_hue_property =
425 drm_property_create_range(dev, 0, "vibrant hue", 0, 180);
426
427 /* -100..+100 */
428 disp->color_vibrance_property =
429 drm_property_create_range(dev, 0, "color vibrance", 0, 200);
430}
431
432int
433nouveau_display_create(struct drm_device *dev)
434{
435 struct nouveau_drm *drm = nouveau_drm(dev);
9c210f37
BS
436 struct nouveau_display *disp;
437 int ret;
438
439 disp = drm->display = kzalloc(sizeof(*disp), GFP_KERNEL);
440 if (!disp)
441 return -ENOMEM;
442
443 drm_mode_config_init(dev);
444 drm_mode_create_scaling_mode_property(dev);
445 drm_mode_create_dvi_i_properties(dev);
df26bc9c 446
e6ecefaa 447 dev->mode_config.funcs = &nouveau_mode_config_funcs;
db2bec18 448 dev->mode_config.fb_base = nv_device_resource_start(nv_device(drm->device), 1);
27d5030a
BS
449
450 dev->mode_config.min_width = 0;
451 dev->mode_config.min_height = 0;
77145f1c 452 if (nv_device(drm->device)->card_type < NV_10) {
27d5030a
BS
453 dev->mode_config.max_width = 2048;
454 dev->mode_config.max_height = 2048;
455 } else
77145f1c 456 if (nv_device(drm->device)->card_type < NV_50) {
27d5030a
BS
457 dev->mode_config.max_width = 4096;
458 dev->mode_config.max_height = 4096;
459 } else {
460 dev->mode_config.max_width = 8192;
461 dev->mode_config.max_height = 8192;
462 }
463
f1377998
DA
464 dev->mode_config.preferred_depth = 24;
465 dev->mode_config.prefer_shadow = 1;
466
b9d9dcda
BS
467 if (nv_device(drm->device)->chipset < 0x11)
468 dev->mode_config.async_page_flip = false;
469 else
470 dev->mode_config.async_page_flip = true;
471
f62b27db
BS
472 drm_kms_helper_poll_init(dev);
473 drm_kms_helper_poll_disable(dev);
474
fc162088 475 if (drm->vbios.dcb.entries) {
2332b311 476 static const u16 oclass[] = {
0b681687 477 GM107_DISP_CLASS,
2332b311
BS
478 NVF0_DISP_CLASS,
479 NVE0_DISP_CLASS,
480 NVD0_DISP_CLASS,
481 NVA3_DISP_CLASS,
482 NV94_DISP_CLASS,
483 NVA0_DISP_CLASS,
484 NV84_DISP_CLASS,
485 NV50_DISP_CLASS,
486 NV04_DISP_CLASS,
487 };
488 int i;
489
490 for (i = 0, ret = -ENODEV; ret && i < ARRAY_SIZE(oclass); i++) {
491 ret = nouveau_object_new(nv_object(drm), NVDRM_DEVICE,
492 NVDRM_DISPLAY, oclass[i],
493 NULL, 0, &disp->core);
494 }
495
496 if (ret == 0) {
9c210f37 497 nouveau_display_create_properties(dev);
2332b311
BS
498 if (nv_mclass(disp->core) < NV50_DISP_CLASS)
499 ret = nv04_display_create(dev);
500 else
501 ret = nv50_display_create(dev);
502 }
fc162088
BS
503 } else {
504 ret = 0;
505 }
9430738d 506
fc162088
BS
507 if (ret)
508 goto disp_create_err;
9430738d 509
fc162088 510 if (dev->mode_config.num_crtc) {
51cb4b39 511 ret = nouveau_display_vblank_init(dev);
fc162088
BS
512 if (ret)
513 goto vblank_err;
f62b27db
BS
514 }
515
fc162088 516 nouveau_backlight_init(dev);
5ace2c9d
MS
517 return 0;
518
519vblank_err:
77145f1c 520 disp->dtor(dev);
5ace2c9d
MS
521disp_create_err:
522 drm_kms_helper_poll_fini(dev);
523 drm_mode_config_cleanup(dev);
2a44e499 524 return ret;
27d5030a
BS
525}
526
527void
528nouveau_display_destroy(struct drm_device *dev)
529{
77145f1c 530 struct nouveau_display *disp = nouveau_display(dev);
2332b311 531 struct nouveau_drm *drm = nouveau_drm(dev);
27d5030a 532
77145f1c 533 nouveau_backlight_exit(dev);
51cb4b39 534 nouveau_display_vblank_fini(dev);
f62b27db 535
d6bf2f37
BS
536 drm_kms_helper_poll_fini(dev);
537 drm_mode_config_cleanup(dev);
538
9430738d
BS
539 if (disp->dtor)
540 disp->dtor(dev);
f62b27db 541
2332b311
BS
542 nouveau_object_del(nv_object(drm), NVDRM_DEVICE, NVDRM_DISPLAY);
543
77145f1c
BS
544 nouveau_drm(dev)->display = NULL;
545 kfree(disp);
546}
547
548int
549nouveau_display_suspend(struct drm_device *dev)
550{
551 struct nouveau_drm *drm = nouveau_drm(dev);
552 struct drm_crtc *crtc;
553
554 nouveau_display_fini(dev);
555
c52f4fa6 556 NV_INFO(drm, "unpinning framebuffer(s)...\n");
77145f1c
BS
557 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
558 struct nouveau_framebuffer *nouveau_fb;
559
f4510a27 560 nouveau_fb = nouveau_framebuffer(crtc->primary->fb);
77145f1c
BS
561 if (!nouveau_fb || !nouveau_fb->nvbo)
562 continue;
563
564 nouveau_bo_unpin(nouveau_fb->nvbo);
565 }
566
567 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
568 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
569
570 nouveau_bo_unmap(nv_crtc->cursor.nvbo);
571 nouveau_bo_unpin(nv_crtc->cursor.nvbo);
572 }
573
574 return 0;
575}
576
577void
5addcf0a 578nouveau_display_repin(struct drm_device *dev)
77145f1c
BS
579{
580 struct nouveau_drm *drm = nouveau_drm(dev);
581 struct drm_crtc *crtc;
582 int ret;
583
584 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
585 struct nouveau_framebuffer *nouveau_fb;
586
f4510a27 587 nouveau_fb = nouveau_framebuffer(crtc->primary->fb);
77145f1c
BS
588 if (!nouveau_fb || !nouveau_fb->nvbo)
589 continue;
590
591 nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
592 }
593
594 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
595 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
596
597 ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
598 if (!ret)
599 ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
600 if (ret)
601 NV_ERROR(drm, "Could not pin/map cursor.\n");
602 }
5addcf0a 603}
77145f1c 604
5addcf0a
DA
605void
606nouveau_display_resume(struct drm_device *dev)
607{
608 struct drm_crtc *crtc;
9cba5efa
MK
609 int head;
610
77145f1c
BS
611 nouveau_display_init(dev);
612
613 /* Force CLUT to get re-loaded during modeset */
614 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
615 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
616
617 nv_crtc->lut.depth = 0;
618 }
619
9cba5efa
MK
620 /* Make sure that drm and hw vblank irqs get resumed if needed. */
621 for (head = 0; head < dev->mode_config.num_crtc; head++)
622 drm_vblank_on(dev, head);
623
77145f1c
BS
624 drm_helper_resume_force_mode(dev);
625
626 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
627 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
628 u32 offset = nv_crtc->cursor.nvbo->bo.offset;
629
630 nv_crtc->cursor.set_offset(nv_crtc, offset);
631 nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
632 nv_crtc->cursor_saved_y);
633 }
27d5030a
BS
634}
635
332b242f
FJ
636static int
637nouveau_page_flip_emit(struct nouveau_channel *chan,
638 struct nouveau_bo *old_bo,
639 struct nouveau_bo *new_bo,
640 struct nouveau_page_flip_state *s,
641 struct nouveau_fence **pfence)
642{
f589be88 643 struct nouveau_fence_chan *fctx = chan->fence;
77145f1c
BS
644 struct nouveau_drm *drm = chan->drm;
645 struct drm_device *dev = drm->dev;
332b242f
FJ
646 unsigned long flags;
647 int ret;
648
649 /* Queue it to the pending list */
650 spin_lock_irqsave(&dev->event_lock, flags);
f589be88 651 list_add_tail(&s->head, &fctx->flip);
332b242f
FJ
652 spin_unlock_irqrestore(&dev->event_lock, flags);
653
654 /* Synchronize with the old framebuffer */
655 ret = nouveau_fence_sync(old_bo->bo.sync_obj, chan);
656 if (ret)
657 goto fail;
658
659 /* Emit the pageflip */
1e303c03 660 ret = RING_SPACE(chan, 2);
332b242f
FJ
661 if (ret)
662 goto fail;
663
1e303c03 664 if (nv_device(drm->device)->card_type < NV_C0)
6d597027 665 BEGIN_NV04(chan, NvSubSw, NV_SW_PAGE_FLIP, 1);
1e303c03
BS
666 else
667 BEGIN_NVC0(chan, FermiSw, NV_SW_PAGE_FLIP, 1);
668 OUT_RING (chan, 0x00000000);
bd2f2037 669 FIRE_RING (chan);
332b242f 670
264ce192 671 ret = nouveau_fence_new(chan, false, pfence);
332b242f
FJ
672 if (ret)
673 goto fail;
674
675 return 0;
676fail:
677 spin_lock_irqsave(&dev->event_lock, flags);
678 list_del(&s->head);
679 spin_unlock_irqrestore(&dev->event_lock, flags);
680 return ret;
681}
682
683int
684nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,
b9d9dcda 685 struct drm_pending_vblank_event *event, u32 flags)
332b242f 686{
b9d9dcda 687 const int swap_interval = (flags & DRM_MODE_PAGE_FLIP_ASYNC) ? 0 : 1;
332b242f 688 struct drm_device *dev = crtc->dev;
77145f1c 689 struct nouveau_drm *drm = nouveau_drm(dev);
f4510a27 690 struct nouveau_bo *old_bo = nouveau_framebuffer(crtc->primary->fb)->nvbo;
332b242f
FJ
691 struct nouveau_bo *new_bo = nouveau_framebuffer(fb)->nvbo;
692 struct nouveau_page_flip_state *s;
eae389f9 693 struct nouveau_channel *chan = drm->channel;
332b242f
FJ
694 struct nouveau_fence *fence;
695 int ret;
696
77145f1c 697 if (!drm->channel)
332b242f
FJ
698 return -ENODEV;
699
700 s = kzalloc(sizeof(*s), GFP_KERNEL);
701 if (!s)
702 return -ENOMEM;
703
d5c1e84b
ML
704 if (new_bo != old_bo) {
705 ret = nouveau_bo_pin(new_bo, TTM_PL_FLAG_VRAM);
706 if (ret)
707 goto fail_free;
708 }
709
710 mutex_lock(&chan->cli->mutex);
711
eae389f9
BS
712 /* synchronise rendering channel with the kernel's channel */
713 spin_lock(&new_bo->bo.bdev->fence_lock);
714 fence = nouveau_fence_ref(new_bo->bo.sync_obj);
715 spin_unlock(&new_bo->bo.bdev->fence_lock);
716 ret = nouveau_fence_sync(fence, chan);
2fd04c81 717 nouveau_fence_unref(&fence);
eae389f9 718 if (ret)
09c3de13 719 goto fail_unpin;
b580c9e2 720
07ad6ca0 721 ret = ttm_bo_reserve(&old_bo->bo, true, false, false, NULL);
060810d7
BS
722 if (ret)
723 goto fail_unpin;
b580c9e2
ML
724
725 /* Initialize a page flip struct */
726 *s = (struct nouveau_page_flip_state)
727 { { }, event, nouveau_crtc(crtc)->index,
728 fb->bits_per_pixel, fb->pitches[0], crtc->x, crtc->y,
729 new_bo->bo.offset };
730
ba124a41
MK
731 /* Keep vblanks on during flip, for the target crtc of this flip */
732 drm_vblank_get(dev, nouveau_crtc(crtc)->index);
733
332b242f 734 /* Emit a page flip */
77145f1c 735 if (nv_device(drm->device)->card_type >= NV_50) {
b9d9dcda 736 ret = nv50_display_flip_next(crtc, fb, chan, swap_interval);
060810d7 737 if (ret)
d7117e0d 738 goto fail_unreserve;
78ae0ad4
BS
739 } else {
740 struct nv04_display *dispnv04 = nv04_display(dev);
b9d9dcda
BS
741 int head = nouveau_crtc(crtc)->index;
742
743 if (swap_interval) {
744 ret = RING_SPACE(chan, 8);
745 if (ret)
746 goto fail_unreserve;
747
748 BEGIN_NV04(chan, NvSubImageBlit, 0x012c, 1);
749 OUT_RING (chan, 0);
750 BEGIN_NV04(chan, NvSubImageBlit, 0x0134, 1);
751 OUT_RING (chan, head);
752 BEGIN_NV04(chan, NvSubImageBlit, 0x0100, 1);
753 OUT_RING (chan, 0);
754 BEGIN_NV04(chan, NvSubImageBlit, 0x0130, 1);
755 OUT_RING (chan, 0);
756 }
757
758 nouveau_bo_ref(new_bo, &dispnv04->image[head]);
d7117e0d
BS
759 }
760
332b242f 761 ret = nouveau_page_flip_emit(chan, old_bo, new_bo, s, &fence);
332b242f
FJ
762 if (ret)
763 goto fail_unreserve;
806cbc50 764 mutex_unlock(&chan->cli->mutex);
332b242f
FJ
765
766 /* Update the crtc struct and cleanup */
f4510a27 767 crtc->primary->fb = fb;
332b242f 768
07ad6ca0
BS
769 nouveau_bo_fence(old_bo, fence);
770 ttm_bo_unreserve(&old_bo->bo);
060810d7 771 if (old_bo != new_bo)
b580c9e2 772 nouveau_bo_unpin(old_bo);
332b242f
FJ
773 nouveau_fence_unref(&fence);
774 return 0;
775
776fail_unreserve:
ba124a41 777 drm_vblank_put(dev, nouveau_crtc(crtc)->index);
07ad6ca0 778 ttm_bo_unreserve(&old_bo->bo);
060810d7
BS
779fail_unpin:
780 mutex_unlock(&chan->cli->mutex);
781 if (old_bo != new_bo)
b580c9e2 782 nouveau_bo_unpin(new_bo);
332b242f
FJ
783fail_free:
784 kfree(s);
785 return ret;
786}
787
788int
789nouveau_finish_page_flip(struct nouveau_channel *chan,
790 struct nouveau_page_flip_state *ps)
791{
f589be88 792 struct nouveau_fence_chan *fctx = chan->fence;
77145f1c
BS
793 struct nouveau_drm *drm = chan->drm;
794 struct drm_device *dev = drm->dev;
332b242f
FJ
795 struct nouveau_page_flip_state *s;
796 unsigned long flags;
af4870e4 797 int crtcid = -1;
332b242f
FJ
798
799 spin_lock_irqsave(&dev->event_lock, flags);
800
f589be88 801 if (list_empty(&fctx->flip)) {
77145f1c 802 NV_ERROR(drm, "unexpected pageflip\n");
332b242f
FJ
803 spin_unlock_irqrestore(&dev->event_lock, flags);
804 return -EINVAL;
805 }
806
f589be88 807 s = list_first_entry(&fctx->flip, struct nouveau_page_flip_state, head);
af4870e4
MK
808 if (s->event) {
809 /* Vblank timestamps/counts are only correct on >= NV-50 */
810 if (nv_device(drm->device)->card_type >= NV_50)
811 crtcid = s->crtc;
812
813 drm_send_vblank_event(dev, crtcid, s->event);
814 }
332b242f 815
ba124a41
MK
816 /* Give up ownership of vblank for page-flipped crtc */
817 drm_vblank_put(dev, s->crtc);
818
332b242f 819 list_del(&s->head);
d7117e0d
BS
820 if (ps)
821 *ps = *s;
332b242f
FJ
822 kfree(s);
823
824 spin_unlock_irqrestore(&dev->event_lock, flags);
825 return 0;
826}
33dbc27f 827
f589be88
BS
828int
829nouveau_flip_complete(void *data)
830{
831 struct nouveau_channel *chan = data;
77145f1c 832 struct nouveau_drm *drm = chan->drm;
f589be88
BS
833 struct nouveau_page_flip_state state;
834
835 if (!nouveau_finish_page_flip(chan, &state)) {
77145f1c
BS
836 if (nv_device(drm->device)->card_type < NV_50) {
837 nv_set_crtc_base(drm->dev, state.crtc, state.offset +
f589be88
BS
838 state.y * state.pitch +
839 state.x * state.bpp / 8);
840 }
841 }
842
843 return 0;
844}
845
33dbc27f
BS
846int
847nouveau_display_dumb_create(struct drm_file *file_priv, struct drm_device *dev,
848 struct drm_mode_create_dumb *args)
849{
850 struct nouveau_bo *bo;
851 int ret;
852
853 args->pitch = roundup(args->width * (args->bpp / 8), 256);
854 args->size = args->pitch * args->height;
855 args->size = roundup(args->size, PAGE_SIZE);
856
610bd7da 857 ret = nouveau_gem_new(dev, args->size, 0, NOUVEAU_GEM_DOMAIN_VRAM, 0, 0, &bo);
33dbc27f
BS
858 if (ret)
859 return ret;
860
55fb74ad
DH
861 ret = drm_gem_handle_create(file_priv, &bo->gem, &args->handle);
862 drm_gem_object_unreference_unlocked(&bo->gem);
33dbc27f
BS
863 return ret;
864}
865
33dbc27f
BS
866int
867nouveau_display_dumb_map_offset(struct drm_file *file_priv,
868 struct drm_device *dev,
869 uint32_t handle, uint64_t *poffset)
870{
871 struct drm_gem_object *gem;
872
873 gem = drm_gem_object_lookup(dev, file_priv, handle);
874 if (gem) {
55fb74ad 875 struct nouveau_bo *bo = nouveau_gem_object(gem);
72525b3f 876 *poffset = drm_vma_node_offset_addr(&bo->bo.vma_node);
33dbc27f
BS
877 drm_gem_object_unreference_unlocked(gem);
878 return 0;
879 }
880
881 return -ENOENT;
882}