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94580299 BS |
1 | /* |
2 | * Copyright 2012 Red Hat Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | * Authors: Ben Skeggs | |
23 | */ | |
24 | ||
77145f1c | 25 | #include <linux/console.h> |
94580299 BS |
26 | #include <linux/module.h> |
27 | #include <linux/pci.h> | |
5addcf0a DA |
28 | #include <linux/pm_runtime.h> |
29 | #include <linux/vga_switcheroo.h> | |
30 | #include "drmP.h" | |
31 | #include "drm_crtc_helper.h" | |
94580299 BS |
32 | #include <core/device.h> |
33 | #include <core/client.h> | |
ebb945a9 | 34 | #include <core/gpuobj.h> |
94580299 | 35 | #include <core/class.h> |
c33e05a1 | 36 | #include <core/option.h> |
94580299 | 37 | |
dded35de | 38 | #include <engine/device.h> |
1d7c71a3 | 39 | #include <engine/disp.h> |
9fe72f9e | 40 | #include <engine/fifo.h> |
69a6146d | 41 | #include <engine/software.h> |
1d7c71a3 | 42 | |
dded35de BS |
43 | #include <subdev/vm.h> |
44 | ||
94580299 | 45 | #include "nouveau_drm.h" |
ebb945a9 | 46 | #include "nouveau_dma.h" |
77145f1c BS |
47 | #include "nouveau_ttm.h" |
48 | #include "nouveau_gem.h" | |
cb75d97e | 49 | #include "nouveau_agp.h" |
77145f1c | 50 | #include "nouveau_vga.h" |
26fdd78c | 51 | #include "nouveau_sysfs.h" |
b9ed919f | 52 | #include "nouveau_hwmon.h" |
77145f1c BS |
53 | #include "nouveau_acpi.h" |
54 | #include "nouveau_bios.h" | |
55 | #include "nouveau_ioctl.h" | |
ebb945a9 BS |
56 | #include "nouveau_abi16.h" |
57 | #include "nouveau_fbcon.h" | |
58 | #include "nouveau_fence.h" | |
33b903e8 | 59 | #include "nouveau_debugfs.h" |
ebb945a9 | 60 | |
94580299 BS |
61 | MODULE_PARM_DESC(config, "option string to pass to driver core"); |
62 | static char *nouveau_config; | |
63 | module_param_named(config, nouveau_config, charp, 0400); | |
64 | ||
65 | MODULE_PARM_DESC(debug, "debug string to pass to driver core"); | |
66 | static char *nouveau_debug; | |
67 | module_param_named(debug, nouveau_debug, charp, 0400); | |
68 | ||
ebb945a9 BS |
69 | MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration"); |
70 | static int nouveau_noaccel = 0; | |
71 | module_param_named(noaccel, nouveau_noaccel, int, 0400); | |
72 | ||
9430738d BS |
73 | MODULE_PARM_DESC(modeset, "enable driver (default: auto, " |
74 | "0 = disabled, 1 = enabled, 2 = headless)"); | |
75 | int nouveau_modeset = -1; | |
77145f1c BS |
76 | module_param_named(modeset, nouveau_modeset, int, 0400); |
77 | ||
5addcf0a DA |
78 | MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)"); |
79 | int nouveau_runtime_pm = -1; | |
80 | module_param_named(runpm, nouveau_runtime_pm, int, 0400); | |
81 | ||
77145f1c BS |
82 | static struct drm_driver driver; |
83 | ||
94580299 | 84 | static u64 |
420b9469 | 85 | nouveau_pci_name(struct pci_dev *pdev) |
94580299 BS |
86 | { |
87 | u64 name = (u64)pci_domain_nr(pdev->bus) << 32; | |
88 | name |= pdev->bus->number << 16; | |
89 | name |= PCI_SLOT(pdev->devfn) << 8; | |
90 | return name | PCI_FUNC(pdev->devfn); | |
91 | } | |
92 | ||
420b9469 AC |
93 | static u64 |
94 | nouveau_platform_name(struct platform_device *platformdev) | |
95 | { | |
96 | return platformdev->id; | |
97 | } | |
98 | ||
99 | static u64 | |
100 | nouveau_name(struct drm_device *dev) | |
101 | { | |
102 | if (dev->pdev) | |
103 | return nouveau_pci_name(dev->pdev); | |
104 | else | |
105 | return nouveau_platform_name(dev->platformdev); | |
106 | } | |
107 | ||
94580299 | 108 | static int |
420b9469 | 109 | nouveau_cli_create(u64 name, const char *sname, |
fa6df8c1 | 110 | int size, void **pcli) |
94580299 BS |
111 | { |
112 | struct nouveau_cli *cli; | |
113 | int ret; | |
114 | ||
dd5700ea | 115 | *pcli = NULL; |
420b9469 | 116 | ret = nouveau_client_create_(sname, name, nouveau_config, |
94580299 BS |
117 | nouveau_debug, size, pcli); |
118 | cli = *pcli; | |
dd5700ea MS |
119 | if (ret) { |
120 | if (cli) | |
121 | nouveau_client_destroy(&cli->base); | |
122 | *pcli = NULL; | |
94580299 | 123 | return ret; |
dd5700ea | 124 | } |
94580299 BS |
125 | |
126 | mutex_init(&cli->mutex); | |
127 | return 0; | |
128 | } | |
129 | ||
130 | static void | |
131 | nouveau_cli_destroy(struct nouveau_cli *cli) | |
132 | { | |
133 | struct nouveau_object *client = nv_object(cli); | |
ebb945a9 | 134 | nouveau_vm_ref(NULL, &cli->base.vm, NULL); |
94580299 BS |
135 | nouveau_client_fini(&cli->base, false); |
136 | atomic_set(&client->refcount, 1); | |
137 | nouveau_object_ref(NULL, &client); | |
138 | } | |
139 | ||
ebb945a9 BS |
140 | static void |
141 | nouveau_accel_fini(struct nouveau_drm *drm) | |
142 | { | |
143 | nouveau_gpuobj_ref(NULL, &drm->notify); | |
144 | nouveau_channel_del(&drm->channel); | |
49981046 | 145 | nouveau_channel_del(&drm->cechan); |
ebb945a9 BS |
146 | if (drm->fence) |
147 | nouveau_fence(drm)->dtor(drm); | |
148 | } | |
149 | ||
150 | static void | |
151 | nouveau_accel_init(struct nouveau_drm *drm) | |
152 | { | |
153 | struct nouveau_device *device = nv_device(drm->device); | |
154 | struct nouveau_object *object; | |
49981046 | 155 | u32 arg0, arg1; |
ebb945a9 BS |
156 | int ret; |
157 | ||
9fe72f9e | 158 | if (nouveau_noaccel || !nouveau_fifo(device) /*XXX*/) |
ebb945a9 BS |
159 | return; |
160 | ||
161 | /* initialise synchronisation routines */ | |
162 | if (device->card_type < NV_10) ret = nv04_fence_create(drm); | |
8aa816b0 IM |
163 | else if (device->card_type < NV_11 || |
164 | device->chipset < 0x17) ret = nv10_fence_create(drm); | |
60e5cb79 | 165 | else if (device->card_type < NV_50) ret = nv17_fence_create(drm); |
ace5a9b8 | 166 | else if (device->chipset < 0x84) ret = nv50_fence_create(drm); |
ebb945a9 BS |
167 | else if (device->card_type < NV_C0) ret = nv84_fence_create(drm); |
168 | else ret = nvc0_fence_create(drm); | |
169 | if (ret) { | |
170 | NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret); | |
171 | nouveau_accel_fini(drm); | |
172 | return; | |
173 | } | |
174 | ||
49981046 BS |
175 | if (device->card_type >= NV_E0) { |
176 | ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE, | |
177 | NVDRM_CHAN + 1, | |
178 | NVE0_CHANNEL_IND_ENGINE_CE0 | | |
179 | NVE0_CHANNEL_IND_ENGINE_CE1, 0, | |
180 | &drm->cechan); | |
181 | if (ret) | |
182 | NV_ERROR(drm, "failed to create ce channel, %d\n", ret); | |
183 | ||
184 | arg0 = NVE0_CHANNEL_IND_ENGINE_GR; | |
49469800 | 185 | arg1 = 1; |
00fc6f6f BS |
186 | } else |
187 | if (device->chipset >= 0xa3 && | |
188 | device->chipset != 0xaa && | |
189 | device->chipset != 0xac) { | |
190 | ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE, | |
191 | NVDRM_CHAN + 1, NvDmaFB, NvDmaTT, | |
192 | &drm->cechan); | |
193 | if (ret) | |
194 | NV_ERROR(drm, "failed to create ce channel, %d\n", ret); | |
195 | ||
196 | arg0 = NvDmaFB; | |
197 | arg1 = NvDmaTT; | |
49981046 BS |
198 | } else { |
199 | arg0 = NvDmaFB; | |
200 | arg1 = NvDmaTT; | |
201 | } | |
202 | ||
ebb945a9 | 203 | ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE, NVDRM_CHAN, |
49981046 | 204 | arg0, arg1, &drm->channel); |
ebb945a9 BS |
205 | if (ret) { |
206 | NV_ERROR(drm, "failed to create kernel channel, %d\n", ret); | |
207 | nouveau_accel_fini(drm); | |
208 | return; | |
209 | } | |
210 | ||
69a6146d BS |
211 | ret = nouveau_object_new(nv_object(drm), NVDRM_CHAN, NVDRM_NVSW, |
212 | nouveau_abi16_swclass(drm), NULL, 0, &object); | |
213 | if (ret == 0) { | |
214 | struct nouveau_software_chan *swch = (void *)object->parent; | |
215 | ret = RING_SPACE(drm->channel, 2); | |
216 | if (ret == 0) { | |
217 | if (device->card_type < NV_C0) { | |
218 | BEGIN_NV04(drm->channel, NvSubSw, 0, 1); | |
219 | OUT_RING (drm->channel, NVDRM_NVSW); | |
220 | } else | |
221 | if (device->card_type < NV_E0) { | |
222 | BEGIN_NVC0(drm->channel, FermiSw, 0, 1); | |
223 | OUT_RING (drm->channel, 0x001f0000); | |
224 | } | |
225 | } | |
226 | swch = (void *)object->parent; | |
227 | swch->flip = nouveau_flip_complete; | |
228 | swch->flip_data = drm->channel; | |
229 | } | |
230 | ||
231 | if (ret) { | |
232 | NV_ERROR(drm, "failed to allocate software object, %d\n", ret); | |
233 | nouveau_accel_fini(drm); | |
234 | return; | |
235 | } | |
236 | ||
ebb945a9 BS |
237 | if (device->card_type < NV_C0) { |
238 | ret = nouveau_gpuobj_new(drm->device, NULL, 32, 0, 0, | |
239 | &drm->notify); | |
240 | if (ret) { | |
241 | NV_ERROR(drm, "failed to allocate notifier, %d\n", ret); | |
242 | nouveau_accel_fini(drm); | |
243 | return; | |
244 | } | |
245 | ||
246 | ret = nouveau_object_new(nv_object(drm), | |
247 | drm->channel->handle, NvNotify0, | |
248 | 0x003d, &(struct nv_dma_class) { | |
249 | .flags = NV_DMA_TARGET_VRAM | | |
250 | NV_DMA_ACCESS_RDWR, | |
251 | .start = drm->notify->addr, | |
252 | .limit = drm->notify->addr + 31 | |
253 | }, sizeof(struct nv_dma_class), | |
254 | &object); | |
255 | if (ret) { | |
256 | nouveau_accel_fini(drm); | |
257 | return; | |
258 | } | |
259 | } | |
260 | ||
261 | ||
49981046 | 262 | nouveau_bo_move_init(drm); |
ebb945a9 BS |
263 | } |
264 | ||
56550d94 GKH |
265 | static int nouveau_drm_probe(struct pci_dev *pdev, |
266 | const struct pci_device_id *pent) | |
94580299 BS |
267 | { |
268 | struct nouveau_device *device; | |
ebb945a9 BS |
269 | struct apertures_struct *aper; |
270 | bool boot = false; | |
94580299 BS |
271 | int ret; |
272 | ||
ebb945a9 BS |
273 | /* remove conflicting drivers (vesafb, efifb etc) */ |
274 | aper = alloc_apertures(3); | |
275 | if (!aper) | |
276 | return -ENOMEM; | |
277 | ||
278 | aper->ranges[0].base = pci_resource_start(pdev, 1); | |
279 | aper->ranges[0].size = pci_resource_len(pdev, 1); | |
280 | aper->count = 1; | |
281 | ||
282 | if (pci_resource_len(pdev, 2)) { | |
283 | aper->ranges[aper->count].base = pci_resource_start(pdev, 2); | |
284 | aper->ranges[aper->count].size = pci_resource_len(pdev, 2); | |
285 | aper->count++; | |
286 | } | |
287 | ||
288 | if (pci_resource_len(pdev, 3)) { | |
289 | aper->ranges[aper->count].base = pci_resource_start(pdev, 3); | |
290 | aper->ranges[aper->count].size = pci_resource_len(pdev, 3); | |
291 | aper->count++; | |
292 | } | |
293 | ||
294 | #ifdef CONFIG_X86 | |
295 | boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; | |
296 | #endif | |
297 | remove_conflicting_framebuffers(aper, "nouveaufb", boot); | |
83ef7777 | 298 | kfree(aper); |
ebb945a9 | 299 | |
420b9469 AC |
300 | ret = nouveau_device_create(pdev, NOUVEAU_BUS_PCI, |
301 | nouveau_pci_name(pdev), pci_name(pdev), | |
94580299 BS |
302 | nouveau_config, nouveau_debug, &device); |
303 | if (ret) | |
304 | return ret; | |
305 | ||
306 | pci_set_master(pdev); | |
307 | ||
77145f1c | 308 | ret = drm_get_pci_dev(pdev, pent, &driver); |
94580299 | 309 | if (ret) { |
ebb945a9 | 310 | nouveau_object_ref(NULL, (struct nouveau_object **)&device); |
94580299 BS |
311 | return ret; |
312 | } | |
313 | ||
314 | return 0; | |
315 | } | |
316 | ||
5addcf0a DA |
317 | #define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403 |
318 | ||
319 | static void | |
46941b0f | 320 | nouveau_get_hdmi_dev(struct nouveau_drm *drm) |
5addcf0a | 321 | { |
46941b0f | 322 | struct pci_dev *pdev = drm->dev->pdev; |
5addcf0a | 323 | |
420b9469 | 324 | if (!pdev) { |
40189b0c | 325 | DRM_INFO("not a PCI device; no HDMI\n"); |
420b9469 AC |
326 | drm->hdmi_device = NULL; |
327 | return; | |
328 | } | |
329 | ||
5addcf0a DA |
330 | /* subfunction one is a hdmi audio device? */ |
331 | drm->hdmi_device = pci_get_bus_and_slot((unsigned int)pdev->bus->number, | |
332 | PCI_DEVFN(PCI_SLOT(pdev->devfn), 1)); | |
333 | ||
334 | if (!drm->hdmi_device) { | |
46941b0f | 335 | NV_DEBUG(drm, "hdmi device not found %d %d %d\n", pdev->bus->number, PCI_SLOT(pdev->devfn), 1); |
5addcf0a DA |
336 | return; |
337 | } | |
338 | ||
339 | if ((drm->hdmi_device->class >> 8) != PCI_CLASS_MULTIMEDIA_HD_AUDIO) { | |
46941b0f | 340 | NV_DEBUG(drm, "possible hdmi device not audio %d\n", drm->hdmi_device->class); |
5addcf0a DA |
341 | pci_dev_put(drm->hdmi_device); |
342 | drm->hdmi_device = NULL; | |
343 | return; | |
344 | } | |
345 | } | |
346 | ||
5b8a43ae | 347 | static int |
94580299 BS |
348 | nouveau_drm_load(struct drm_device *dev, unsigned long flags) |
349 | { | |
350 | struct pci_dev *pdev = dev->pdev; | |
ebb945a9 | 351 | struct nouveau_device *device; |
94580299 BS |
352 | struct nouveau_drm *drm; |
353 | int ret; | |
354 | ||
420b9469 AC |
355 | ret = nouveau_cli_create(nouveau_name(dev), "DRM", sizeof(*drm), |
356 | (void **)&drm); | |
94580299 BS |
357 | if (ret) |
358 | return ret; | |
359 | ||
77145f1c BS |
360 | dev->dev_private = drm; |
361 | drm->dev = dev; | |
c33e05a1 | 362 | nouveau_client(drm)->debug = nouveau_dbgopt(nouveau_debug, "DRM"); |
77145f1c | 363 | |
94580299 | 364 | INIT_LIST_HEAD(&drm->clients); |
ebb945a9 | 365 | spin_lock_init(&drm->tile.lock); |
94580299 | 366 | |
46941b0f | 367 | nouveau_get_hdmi_dev(drm); |
5addcf0a | 368 | |
cb75d97e BS |
369 | /* make sure AGP controller is in a consistent state before we |
370 | * (possibly) execute vbios init tables (see nouveau_agp.h) | |
371 | */ | |
420b9469 | 372 | if (pdev && drm_pci_device_is_agp(dev) && dev->agp) { |
cb75d97e BS |
373 | /* dummy device object, doesn't init anything, but allows |
374 | * agp code access to registers | |
375 | */ | |
376 | ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT, | |
377 | NVDRM_DEVICE, 0x0080, | |
378 | &(struct nv_device_class) { | |
379 | .device = ~0, | |
380 | .disable = | |
381 | ~(NV_DEVICE_DISABLE_MMIO | | |
382 | NV_DEVICE_DISABLE_IDENTIFY), | |
383 | .debug0 = ~0, | |
384 | }, sizeof(struct nv_device_class), | |
385 | &drm->device); | |
386 | if (ret) | |
ebb945a9 | 387 | goto fail_device; |
cb75d97e BS |
388 | |
389 | nouveau_agp_reset(drm); | |
390 | nouveau_object_del(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE); | |
391 | } | |
392 | ||
94580299 BS |
393 | ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE, |
394 | 0x0080, &(struct nv_device_class) { | |
395 | .device = ~0, | |
396 | .disable = 0, | |
397 | .debug0 = 0, | |
398 | }, sizeof(struct nv_device_class), | |
399 | &drm->device); | |
400 | if (ret) | |
401 | goto fail_device; | |
402 | ||
7d3428cd IM |
403 | dev->irq_enabled = true; |
404 | ||
77145f1c BS |
405 | /* workaround an odd issue on nvc1 by disabling the device's |
406 | * nosnoop capability. hopefully won't cause issues until a | |
407 | * better fix is found - assuming there is one... | |
408 | */ | |
ebb945a9 | 409 | device = nv_device(drm->device); |
77145f1c BS |
410 | if (nv_device(drm->device)->chipset == 0xc1) |
411 | nv_mask(device, 0x00088080, 0x00000800, 0x00000000); | |
ebb945a9 | 412 | |
77145f1c | 413 | nouveau_vga_init(drm); |
cb75d97e BS |
414 | nouveau_agp_init(drm); |
415 | ||
ebb945a9 BS |
416 | if (device->card_type >= NV_50) { |
417 | ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40), | |
418 | 0x1000, &drm->client.base.vm); | |
419 | if (ret) | |
420 | goto fail_device; | |
421 | } | |
422 | ||
423 | ret = nouveau_ttm_init(drm); | |
94580299 | 424 | if (ret) |
77145f1c BS |
425 | goto fail_ttm; |
426 | ||
427 | ret = nouveau_bios_init(dev); | |
428 | if (ret) | |
429 | goto fail_bios; | |
430 | ||
77145f1c | 431 | ret = nouveau_display_create(dev); |
ebb945a9 | 432 | if (ret) |
77145f1c BS |
433 | goto fail_dispctor; |
434 | ||
435 | if (dev->mode_config.num_crtc) { | |
436 | ret = nouveau_display_init(dev); | |
437 | if (ret) | |
438 | goto fail_dispinit; | |
439 | } | |
440 | ||
26fdd78c | 441 | nouveau_sysfs_init(dev); |
b9ed919f | 442 | nouveau_hwmon_init(dev); |
ebb945a9 BS |
443 | nouveau_accel_init(drm); |
444 | nouveau_fbcon_init(dev); | |
5addcf0a DA |
445 | |
446 | if (nouveau_runtime_pm != 0) { | |
447 | pm_runtime_use_autosuspend(dev->dev); | |
448 | pm_runtime_set_autosuspend_delay(dev->dev, 5000); | |
449 | pm_runtime_set_active(dev->dev); | |
450 | pm_runtime_allow(dev->dev); | |
451 | pm_runtime_mark_last_busy(dev->dev); | |
452 | pm_runtime_put(dev->dev); | |
453 | } | |
94580299 BS |
454 | return 0; |
455 | ||
77145f1c BS |
456 | fail_dispinit: |
457 | nouveau_display_destroy(dev); | |
458 | fail_dispctor: | |
77145f1c BS |
459 | nouveau_bios_takedown(dev); |
460 | fail_bios: | |
ebb945a9 | 461 | nouveau_ttm_fini(drm); |
77145f1c BS |
462 | fail_ttm: |
463 | nouveau_agp_fini(drm); | |
464 | nouveau_vga_fini(drm); | |
94580299 BS |
465 | fail_device: |
466 | nouveau_cli_destroy(&drm->client); | |
467 | return ret; | |
468 | } | |
469 | ||
5b8a43ae | 470 | static int |
94580299 BS |
471 | nouveau_drm_unload(struct drm_device *dev) |
472 | { | |
77145f1c | 473 | struct nouveau_drm *drm = nouveau_drm(dev); |
94580299 | 474 | |
5addcf0a | 475 | pm_runtime_get_sync(dev->dev); |
ebb945a9 BS |
476 | nouveau_fbcon_fini(dev); |
477 | nouveau_accel_fini(drm); | |
b9ed919f | 478 | nouveau_hwmon_fini(dev); |
26fdd78c | 479 | nouveau_sysfs_fini(dev); |
77145f1c | 480 | |
9430738d BS |
481 | if (dev->mode_config.num_crtc) |
482 | nouveau_display_fini(dev); | |
77145f1c BS |
483 | nouveau_display_destroy(dev); |
484 | ||
77145f1c | 485 | nouveau_bios_takedown(dev); |
94580299 | 486 | |
ebb945a9 | 487 | nouveau_ttm_fini(drm); |
cb75d97e | 488 | nouveau_agp_fini(drm); |
77145f1c | 489 | nouveau_vga_fini(drm); |
cb75d97e | 490 | |
5addcf0a DA |
491 | if (drm->hdmi_device) |
492 | pci_dev_put(drm->hdmi_device); | |
94580299 BS |
493 | nouveau_cli_destroy(&drm->client); |
494 | return 0; | |
495 | } | |
496 | ||
497 | static void | |
498 | nouveau_drm_remove(struct pci_dev *pdev) | |
499 | { | |
77145f1c BS |
500 | struct drm_device *dev = pci_get_drvdata(pdev); |
501 | struct nouveau_drm *drm = nouveau_drm(dev); | |
ebb945a9 | 502 | struct nouveau_object *device; |
77145f1c | 503 | |
7d3428cd | 504 | dev->irq_enabled = false; |
77145f1c BS |
505 | device = drm->client.base.device; |
506 | drm_put_dev(dev); | |
507 | ||
ebb945a9 BS |
508 | nouveau_object_ref(NULL, &device); |
509 | nouveau_object_debug(); | |
94580299 BS |
510 | } |
511 | ||
cd897837 | 512 | static int |
05c63c2f | 513 | nouveau_do_suspend(struct drm_device *dev, bool runtime) |
94580299 | 514 | { |
77145f1c | 515 | struct nouveau_drm *drm = nouveau_drm(dev); |
94580299 BS |
516 | struct nouveau_cli *cli; |
517 | int ret; | |
518 | ||
05c63c2f | 519 | if (dev->mode_config.num_crtc && !runtime) { |
c52f4fa6 | 520 | NV_INFO(drm, "suspending display...\n"); |
9430738d BS |
521 | ret = nouveau_display_suspend(dev); |
522 | if (ret) | |
523 | return ret; | |
524 | } | |
94580299 | 525 | |
c52f4fa6 | 526 | NV_INFO(drm, "evicting buffers...\n"); |
ebb945a9 BS |
527 | ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM); |
528 | ||
c52f4fa6 | 529 | NV_INFO(drm, "waiting for kernel channels to go idle...\n"); |
81dff21b BS |
530 | if (drm->cechan) { |
531 | ret = nouveau_channel_idle(drm->cechan); | |
532 | if (ret) | |
f3980dc5 | 533 | goto fail_display; |
81dff21b BS |
534 | } |
535 | ||
536 | if (drm->channel) { | |
537 | ret = nouveau_channel_idle(drm->channel); | |
538 | if (ret) | |
f3980dc5 | 539 | goto fail_display; |
81dff21b BS |
540 | } |
541 | ||
c52f4fa6 | 542 | NV_INFO(drm, "suspending client object trees...\n"); |
ebb945a9 | 543 | if (drm->fence && nouveau_fence(drm)->suspend) { |
f3980dc5 IM |
544 | if (!nouveau_fence(drm)->suspend(drm)) { |
545 | ret = -ENOMEM; | |
546 | goto fail_display; | |
547 | } | |
ebb945a9 BS |
548 | } |
549 | ||
94580299 BS |
550 | list_for_each_entry(cli, &drm->clients, head) { |
551 | ret = nouveau_client_fini(&cli->base, true); | |
552 | if (ret) | |
553 | goto fail_client; | |
554 | } | |
555 | ||
c52f4fa6 | 556 | NV_INFO(drm, "suspending kernel object tree...\n"); |
94580299 BS |
557 | ret = nouveau_client_fini(&drm->client.base, true); |
558 | if (ret) | |
559 | goto fail_client; | |
560 | ||
cb75d97e | 561 | nouveau_agp_fini(drm); |
94580299 BS |
562 | return 0; |
563 | ||
564 | fail_client: | |
565 | list_for_each_entry_continue_reverse(cli, &drm->clients, head) { | |
566 | nouveau_client_init(&cli->base); | |
567 | } | |
568 | ||
f3980dc5 IM |
569 | if (drm->fence && nouveau_fence(drm)->resume) |
570 | nouveau_fence(drm)->resume(drm); | |
571 | ||
572 | fail_display: | |
9430738d | 573 | if (dev->mode_config.num_crtc) { |
c52f4fa6 | 574 | NV_INFO(drm, "resuming display...\n"); |
9430738d BS |
575 | nouveau_display_resume(dev); |
576 | } | |
94580299 BS |
577 | return ret; |
578 | } | |
579 | ||
2d8b9ccb | 580 | int nouveau_pmops_suspend(struct device *dev) |
94580299 | 581 | { |
2d8b9ccb DA |
582 | struct pci_dev *pdev = to_pci_dev(dev); |
583 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
94580299 BS |
584 | int ret; |
585 | ||
5addcf0a DA |
586 | if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || |
587 | drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) | |
94580299 BS |
588 | return 0; |
589 | ||
5addcf0a DA |
590 | if (drm_dev->mode_config.num_crtc) |
591 | nouveau_fbcon_set_suspend(drm_dev, 1); | |
592 | ||
05c63c2f | 593 | ret = nouveau_do_suspend(drm_dev, false); |
94580299 BS |
594 | if (ret) |
595 | return ret; | |
2d8b9ccb DA |
596 | |
597 | pci_save_state(pdev); | |
598 | pci_disable_device(pdev); | |
599 | pci_set_power_state(pdev, PCI_D3hot); | |
2d8b9ccb DA |
600 | return 0; |
601 | } | |
602 | ||
cd897837 | 603 | static int |
2d8b9ccb DA |
604 | nouveau_do_resume(struct drm_device *dev) |
605 | { | |
606 | struct nouveau_drm *drm = nouveau_drm(dev); | |
607 | struct nouveau_cli *cli; | |
608 | ||
c52f4fa6 | 609 | NV_INFO(drm, "re-enabling device...\n"); |
94580299 | 610 | |
cb75d97e BS |
611 | nouveau_agp_reset(drm); |
612 | ||
c52f4fa6 | 613 | NV_INFO(drm, "resuming kernel object tree...\n"); |
94580299 | 614 | nouveau_client_init(&drm->client.base); |
ebb945a9 | 615 | nouveau_agp_init(drm); |
94580299 | 616 | |
c52f4fa6 | 617 | NV_INFO(drm, "resuming client object trees...\n"); |
81dff21b BS |
618 | if (drm->fence && nouveau_fence(drm)->resume) |
619 | nouveau_fence(drm)->resume(drm); | |
620 | ||
94580299 BS |
621 | list_for_each_entry(cli, &drm->clients, head) { |
622 | nouveau_client_init(&cli->base); | |
623 | } | |
cb75d97e | 624 | |
77145f1c | 625 | nouveau_run_vbios_init(dev); |
77145f1c | 626 | |
9430738d | 627 | if (dev->mode_config.num_crtc) { |
c52f4fa6 | 628 | NV_INFO(drm, "resuming display...\n"); |
5addcf0a | 629 | nouveau_display_repin(dev); |
9430738d | 630 | } |
5addcf0a | 631 | |
77145f1c | 632 | return 0; |
94580299 BS |
633 | } |
634 | ||
2d8b9ccb DA |
635 | int nouveau_pmops_resume(struct device *dev) |
636 | { | |
637 | struct pci_dev *pdev = to_pci_dev(dev); | |
638 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
639 | int ret; | |
640 | ||
5addcf0a DA |
641 | if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || |
642 | drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) | |
2d8b9ccb DA |
643 | return 0; |
644 | ||
645 | pci_set_power_state(pdev, PCI_D0); | |
646 | pci_restore_state(pdev); | |
647 | ret = pci_enable_device(pdev); | |
648 | if (ret) | |
649 | return ret; | |
650 | pci_set_master(pdev); | |
651 | ||
5addcf0a | 652 | ret = nouveau_do_resume(drm_dev); |
c52f4fa6 | 653 | if (ret) |
5addcf0a | 654 | return ret; |
5addcf0a | 655 | |
028791bb | 656 | if (drm_dev->mode_config.num_crtc) { |
01172772 | 657 | nouveau_display_resume(drm_dev); |
028791bb BS |
658 | nouveau_fbcon_set_suspend(drm_dev, 0); |
659 | } | |
660 | ||
5addcf0a | 661 | return 0; |
2d8b9ccb DA |
662 | } |
663 | ||
664 | static int nouveau_pmops_freeze(struct device *dev) | |
665 | { | |
666 | struct pci_dev *pdev = to_pci_dev(dev); | |
667 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
5addcf0a DA |
668 | int ret; |
669 | ||
5addcf0a DA |
670 | if (drm_dev->mode_config.num_crtc) |
671 | nouveau_fbcon_set_suspend(drm_dev, 1); | |
2d8b9ccb | 672 | |
05c63c2f | 673 | ret = nouveau_do_suspend(drm_dev, false); |
5addcf0a | 674 | return ret; |
2d8b9ccb DA |
675 | } |
676 | ||
677 | static int nouveau_pmops_thaw(struct device *dev) | |
678 | { | |
679 | struct pci_dev *pdev = to_pci_dev(dev); | |
680 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
5addcf0a | 681 | int ret; |
2d8b9ccb | 682 | |
5addcf0a | 683 | ret = nouveau_do_resume(drm_dev); |
c52f4fa6 | 684 | if (ret) |
5addcf0a | 685 | return ret; |
028791bb BS |
686 | |
687 | if (drm_dev->mode_config.num_crtc) { | |
01172772 | 688 | nouveau_display_resume(drm_dev); |
028791bb BS |
689 | nouveau_fbcon_set_suspend(drm_dev, 0); |
690 | } | |
691 | ||
5addcf0a | 692 | return 0; |
2d8b9ccb DA |
693 | } |
694 | ||
695 | ||
5b8a43ae | 696 | static int |
ebb945a9 BS |
697 | nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv) |
698 | { | |
ebb945a9 BS |
699 | struct nouveau_drm *drm = nouveau_drm(dev); |
700 | struct nouveau_cli *cli; | |
a2896ced | 701 | char name[32], tmpname[TASK_COMM_LEN]; |
ebb945a9 BS |
702 | int ret; |
703 | ||
5addcf0a DA |
704 | /* need to bring up power immediately if opening device */ |
705 | ret = pm_runtime_get_sync(dev->dev); | |
b6c4285a | 706 | if (ret < 0 && ret != -EACCES) |
5addcf0a DA |
707 | return ret; |
708 | ||
a2896ced MS |
709 | get_task_comm(tmpname, current); |
710 | snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid)); | |
fa6df8c1 | 711 | |
420b9469 AC |
712 | ret = nouveau_cli_create(nouveau_name(dev), name, sizeof(*cli), |
713 | (void **)&cli); | |
714 | ||
ebb945a9 | 715 | if (ret) |
5addcf0a | 716 | goto out_suspend; |
ebb945a9 BS |
717 | |
718 | if (nv_device(drm->device)->card_type >= NV_50) { | |
719 | ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40), | |
720 | 0x1000, &cli->base.vm); | |
721 | if (ret) { | |
722 | nouveau_cli_destroy(cli); | |
5addcf0a | 723 | goto out_suspend; |
ebb945a9 BS |
724 | } |
725 | } | |
726 | ||
727 | fpriv->driver_priv = cli; | |
728 | ||
729 | mutex_lock(&drm->client.mutex); | |
730 | list_add(&cli->head, &drm->clients); | |
731 | mutex_unlock(&drm->client.mutex); | |
5addcf0a DA |
732 | |
733 | out_suspend: | |
734 | pm_runtime_mark_last_busy(dev->dev); | |
735 | pm_runtime_put_autosuspend(dev->dev); | |
736 | ||
737 | return ret; | |
ebb945a9 BS |
738 | } |
739 | ||
5b8a43ae | 740 | static void |
ebb945a9 BS |
741 | nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv) |
742 | { | |
743 | struct nouveau_cli *cli = nouveau_cli(fpriv); | |
744 | struct nouveau_drm *drm = nouveau_drm(dev); | |
745 | ||
5addcf0a DA |
746 | pm_runtime_get_sync(dev->dev); |
747 | ||
ebb945a9 BS |
748 | if (cli->abi16) |
749 | nouveau_abi16_fini(cli->abi16); | |
750 | ||
751 | mutex_lock(&drm->client.mutex); | |
752 | list_del(&cli->head); | |
753 | mutex_unlock(&drm->client.mutex); | |
5addcf0a | 754 | |
ebb945a9 BS |
755 | } |
756 | ||
5b8a43ae | 757 | static void |
ebb945a9 BS |
758 | nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv) |
759 | { | |
760 | struct nouveau_cli *cli = nouveau_cli(fpriv); | |
761 | nouveau_cli_destroy(cli); | |
5addcf0a DA |
762 | pm_runtime_mark_last_busy(dev->dev); |
763 | pm_runtime_put_autosuspend(dev->dev); | |
ebb945a9 BS |
764 | } |
765 | ||
baa70943 | 766 | static const struct drm_ioctl_desc |
77145f1c | 767 | nouveau_ioctls[] = { |
7d761258 | 768 | DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), |
77145f1c | 769 | DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
7d761258 MP |
770 | DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), |
771 | DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
772 | DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
773 | DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
774 | DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
775 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
776 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
777 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
778 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
779 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
77145f1c BS |
780 | }; |
781 | ||
5addcf0a DA |
782 | long nouveau_drm_ioctl(struct file *filp, |
783 | unsigned int cmd, unsigned long arg) | |
784 | { | |
785 | struct drm_file *file_priv = filp->private_data; | |
786 | struct drm_device *dev; | |
787 | long ret; | |
788 | dev = file_priv->minor->dev; | |
789 | ||
790 | ret = pm_runtime_get_sync(dev->dev); | |
b6c4285a | 791 | if (ret < 0 && ret != -EACCES) |
5addcf0a DA |
792 | return ret; |
793 | ||
794 | ret = drm_ioctl(filp, cmd, arg); | |
795 | ||
796 | pm_runtime_mark_last_busy(dev->dev); | |
797 | pm_runtime_put_autosuspend(dev->dev); | |
798 | return ret; | |
799 | } | |
77145f1c BS |
800 | static const struct file_operations |
801 | nouveau_driver_fops = { | |
802 | .owner = THIS_MODULE, | |
803 | .open = drm_open, | |
804 | .release = drm_release, | |
5addcf0a | 805 | .unlocked_ioctl = nouveau_drm_ioctl, |
77145f1c BS |
806 | .mmap = nouveau_ttm_mmap, |
807 | .poll = drm_poll, | |
77145f1c BS |
808 | .read = drm_read, |
809 | #if defined(CONFIG_COMPAT) | |
810 | .compat_ioctl = nouveau_compat_ioctl, | |
811 | #endif | |
812 | .llseek = noop_llseek, | |
813 | }; | |
814 | ||
815 | static struct drm_driver | |
816 | driver = { | |
817 | .driver_features = | |
4cb4ea39 | 818 | DRIVER_USE_AGP | |
7d761258 | 819 | DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER, |
77145f1c BS |
820 | |
821 | .load = nouveau_drm_load, | |
822 | .unload = nouveau_drm_unload, | |
823 | .open = nouveau_drm_open, | |
824 | .preclose = nouveau_drm_preclose, | |
825 | .postclose = nouveau_drm_postclose, | |
826 | .lastclose = nouveau_vga_lastclose, | |
827 | ||
33b903e8 MS |
828 | #if defined(CONFIG_DEBUG_FS) |
829 | .debugfs_init = nouveau_debugfs_init, | |
830 | .debugfs_cleanup = nouveau_debugfs_takedown, | |
831 | #endif | |
832 | ||
77145f1c | 833 | .get_vblank_counter = drm_vblank_count, |
51cb4b39 BS |
834 | .enable_vblank = nouveau_display_vblank_enable, |
835 | .disable_vblank = nouveau_display_vblank_disable, | |
d83ef853 BS |
836 | .get_scanout_position = nouveau_display_scanoutpos, |
837 | .get_vblank_timestamp = nouveau_display_vblstamp, | |
77145f1c BS |
838 | |
839 | .ioctls = nouveau_ioctls, | |
baa70943 | 840 | .num_ioctls = ARRAY_SIZE(nouveau_ioctls), |
77145f1c BS |
841 | .fops = &nouveau_driver_fops, |
842 | ||
843 | .prime_handle_to_fd = drm_gem_prime_handle_to_fd, | |
844 | .prime_fd_to_handle = drm_gem_prime_fd_to_handle, | |
ab9ccb96 AP |
845 | .gem_prime_export = drm_gem_prime_export, |
846 | .gem_prime_import = drm_gem_prime_import, | |
847 | .gem_prime_pin = nouveau_gem_prime_pin, | |
1af7c7dd | 848 | .gem_prime_unpin = nouveau_gem_prime_unpin, |
ab9ccb96 AP |
849 | .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table, |
850 | .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table, | |
851 | .gem_prime_vmap = nouveau_gem_prime_vmap, | |
852 | .gem_prime_vunmap = nouveau_gem_prime_vunmap, | |
77145f1c | 853 | |
77145f1c BS |
854 | .gem_free_object = nouveau_gem_object_del, |
855 | .gem_open_object = nouveau_gem_object_open, | |
856 | .gem_close_object = nouveau_gem_object_close, | |
857 | ||
858 | .dumb_create = nouveau_display_dumb_create, | |
859 | .dumb_map_offset = nouveau_display_dumb_map_offset, | |
43387b37 | 860 | .dumb_destroy = drm_gem_dumb_destroy, |
77145f1c BS |
861 | |
862 | .name = DRIVER_NAME, | |
863 | .desc = DRIVER_DESC, | |
864 | #ifdef GIT_REVISION | |
865 | .date = GIT_REVISION, | |
866 | #else | |
867 | .date = DRIVER_DATE, | |
868 | #endif | |
869 | .major = DRIVER_MAJOR, | |
870 | .minor = DRIVER_MINOR, | |
871 | .patchlevel = DRIVER_PATCHLEVEL, | |
872 | }; | |
873 | ||
94580299 BS |
874 | static struct pci_device_id |
875 | nouveau_drm_pci_table[] = { | |
876 | { | |
877 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID), | |
878 | .class = PCI_BASE_CLASS_DISPLAY << 16, | |
879 | .class_mask = 0xff << 16, | |
880 | }, | |
881 | { | |
882 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID), | |
883 | .class = PCI_BASE_CLASS_DISPLAY << 16, | |
884 | .class_mask = 0xff << 16, | |
885 | }, | |
886 | {} | |
887 | }; | |
888 | ||
5addcf0a DA |
889 | static int nouveau_pmops_runtime_suspend(struct device *dev) |
890 | { | |
891 | struct pci_dev *pdev = to_pci_dev(dev); | |
892 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
893 | int ret; | |
894 | ||
adbbdbac DA |
895 | if (nouveau_runtime_pm == 0) { |
896 | pm_runtime_forbid(dev); | |
897 | return -EBUSY; | |
898 | } | |
5addcf0a | 899 | |
b25b4427 IM |
900 | /* are we optimus enabled? */ |
901 | if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) { | |
902 | DRM_DEBUG_DRIVER("failing to power off - not optimus\n"); | |
adbbdbac DA |
903 | pm_runtime_forbid(dev); |
904 | return -EBUSY; | |
b25b4427 IM |
905 | } |
906 | ||
c52f4fa6 | 907 | nv_debug_level(SILENT); |
5addcf0a DA |
908 | drm_kms_helper_poll_disable(drm_dev); |
909 | vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF); | |
910 | nouveau_switcheroo_optimus_dsm(); | |
05c63c2f | 911 | ret = nouveau_do_suspend(drm_dev, true); |
5addcf0a DA |
912 | pci_save_state(pdev); |
913 | pci_disable_device(pdev); | |
914 | pci_set_power_state(pdev, PCI_D3cold); | |
915 | drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF; | |
916 | return ret; | |
917 | } | |
918 | ||
919 | static int nouveau_pmops_runtime_resume(struct device *dev) | |
920 | { | |
921 | struct pci_dev *pdev = to_pci_dev(dev); | |
922 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
923 | struct nouveau_device *device = nouveau_dev(drm_dev); | |
924 | int ret; | |
925 | ||
926 | if (nouveau_runtime_pm == 0) | |
927 | return -EINVAL; | |
928 | ||
929 | pci_set_power_state(pdev, PCI_D0); | |
930 | pci_restore_state(pdev); | |
931 | ret = pci_enable_device(pdev); | |
932 | if (ret) | |
933 | return ret; | |
934 | pci_set_master(pdev); | |
935 | ||
936 | ret = nouveau_do_resume(drm_dev); | |
5addcf0a DA |
937 | drm_kms_helper_poll_enable(drm_dev); |
938 | /* do magic */ | |
939 | nv_mask(device, 0x88488, (1 << 25), (1 << 25)); | |
940 | vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON); | |
941 | drm_dev->switch_power_state = DRM_SWITCH_POWER_ON; | |
c52f4fa6 | 942 | nv_debug_level(NORMAL); |
5addcf0a DA |
943 | return ret; |
944 | } | |
945 | ||
946 | static int nouveau_pmops_runtime_idle(struct device *dev) | |
947 | { | |
948 | struct pci_dev *pdev = to_pci_dev(dev); | |
949 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
950 | struct nouveau_drm *drm = nouveau_drm(drm_dev); | |
951 | struct drm_crtc *crtc; | |
952 | ||
adbbdbac DA |
953 | if (nouveau_runtime_pm == 0) { |
954 | pm_runtime_forbid(dev); | |
5addcf0a | 955 | return -EBUSY; |
adbbdbac | 956 | } |
5addcf0a DA |
957 | |
958 | /* are we optimus enabled? */ | |
959 | if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) { | |
960 | DRM_DEBUG_DRIVER("failing to power off - not optimus\n"); | |
adbbdbac | 961 | pm_runtime_forbid(dev); |
5addcf0a DA |
962 | return -EBUSY; |
963 | } | |
964 | ||
965 | /* if we have a hdmi audio device - make sure it has a driver loaded */ | |
966 | if (drm->hdmi_device) { | |
967 | if (!drm->hdmi_device->driver) { | |
968 | DRM_DEBUG_DRIVER("failing to power off - no HDMI audio driver loaded\n"); | |
969 | pm_runtime_mark_last_busy(dev); | |
970 | return -EBUSY; | |
971 | } | |
972 | } | |
973 | ||
974 | list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) { | |
975 | if (crtc->enabled) { | |
976 | DRM_DEBUG_DRIVER("failing to power off - crtc active\n"); | |
977 | return -EBUSY; | |
978 | } | |
979 | } | |
980 | pm_runtime_mark_last_busy(dev); | |
981 | pm_runtime_autosuspend(dev); | |
982 | /* we don't want the main rpm_idle to call suspend - we want to autosuspend */ | |
983 | return 1; | |
984 | } | |
985 | ||
2d8b9ccb DA |
986 | static const struct dev_pm_ops nouveau_pm_ops = { |
987 | .suspend = nouveau_pmops_suspend, | |
988 | .resume = nouveau_pmops_resume, | |
989 | .freeze = nouveau_pmops_freeze, | |
990 | .thaw = nouveau_pmops_thaw, | |
991 | .poweroff = nouveau_pmops_freeze, | |
992 | .restore = nouveau_pmops_resume, | |
5addcf0a DA |
993 | .runtime_suspend = nouveau_pmops_runtime_suspend, |
994 | .runtime_resume = nouveau_pmops_runtime_resume, | |
995 | .runtime_idle = nouveau_pmops_runtime_idle, | |
2d8b9ccb DA |
996 | }; |
997 | ||
94580299 BS |
998 | static struct pci_driver |
999 | nouveau_drm_pci_driver = { | |
1000 | .name = "nouveau", | |
1001 | .id_table = nouveau_drm_pci_table, | |
1002 | .probe = nouveau_drm_probe, | |
1003 | .remove = nouveau_drm_remove, | |
2d8b9ccb | 1004 | .driver.pm = &nouveau_pm_ops, |
94580299 BS |
1005 | }; |
1006 | ||
420b9469 AC |
1007 | int nouveau_drm_platform_probe(struct platform_device *pdev) |
1008 | { | |
1009 | struct nouveau_device *device; | |
1010 | int ret; | |
1011 | ||
1012 | ret = nouveau_device_create(pdev, NOUVEAU_BUS_PLATFORM, | |
1013 | nouveau_platform_name(pdev), | |
1014 | dev_name(&pdev->dev), nouveau_config, | |
1015 | nouveau_debug, &device); | |
1016 | ||
1017 | ret = drm_platform_init(&driver, pdev); | |
1018 | if (ret) { | |
1019 | nouveau_object_ref(NULL, (struct nouveau_object **)&device); | |
1020 | return ret; | |
1021 | } | |
1022 | ||
1023 | return ret; | |
1024 | } | |
1025 | ||
94580299 BS |
1026 | static int __init |
1027 | nouveau_drm_init(void) | |
1028 | { | |
77145f1c BS |
1029 | if (nouveau_modeset == -1) { |
1030 | #ifdef CONFIG_VGA_CONSOLE | |
1031 | if (vgacon_text_force()) | |
1032 | nouveau_modeset = 0; | |
77145f1c | 1033 | #endif |
77145f1c BS |
1034 | } |
1035 | ||
1036 | if (!nouveau_modeset) | |
1037 | return 0; | |
1038 | ||
1039 | nouveau_register_dsm_handler(); | |
1040 | return drm_pci_init(&driver, &nouveau_drm_pci_driver); | |
94580299 BS |
1041 | } |
1042 | ||
1043 | static void __exit | |
1044 | nouveau_drm_exit(void) | |
1045 | { | |
77145f1c BS |
1046 | if (!nouveau_modeset) |
1047 | return; | |
1048 | ||
1049 | drm_pci_exit(&driver, &nouveau_drm_pci_driver); | |
1050 | nouveau_unregister_dsm_handler(); | |
94580299 BS |
1051 | } |
1052 | ||
1053 | module_init(nouveau_drm_init); | |
1054 | module_exit(nouveau_drm_exit); | |
1055 | ||
1056 | MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table); | |
77145f1c BS |
1057 | MODULE_AUTHOR(DRIVER_AUTHOR); |
1058 | MODULE_DESCRIPTION(DRIVER_DESC); | |
94580299 | 1059 | MODULE_LICENSE("GPL and additional rights"); |