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94580299 BS |
1 | /* |
2 | * Copyright 2012 Red Hat Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | * Authors: Ben Skeggs | |
23 | */ | |
24 | ||
77145f1c | 25 | #include <linux/console.h> |
94580299 BS |
26 | #include <linux/module.h> |
27 | #include <linux/pci.h> | |
5addcf0a DA |
28 | #include <linux/pm_runtime.h> |
29 | #include <linux/vga_switcheroo.h> | |
30 | #include "drmP.h" | |
31 | #include "drm_crtc_helper.h" | |
94580299 BS |
32 | #include <core/device.h> |
33 | #include <core/client.h> | |
ebb945a9 | 34 | #include <core/gpuobj.h> |
94580299 BS |
35 | #include <core/class.h> |
36 | ||
dded35de | 37 | #include <engine/device.h> |
1d7c71a3 | 38 | #include <engine/disp.h> |
9fe72f9e | 39 | #include <engine/fifo.h> |
1d7c71a3 | 40 | |
dded35de BS |
41 | #include <subdev/vm.h> |
42 | ||
94580299 | 43 | #include "nouveau_drm.h" |
ebb945a9 | 44 | #include "nouveau_dma.h" |
77145f1c BS |
45 | #include "nouveau_ttm.h" |
46 | #include "nouveau_gem.h" | |
cb75d97e | 47 | #include "nouveau_agp.h" |
77145f1c BS |
48 | #include "nouveau_vga.h" |
49 | #include "nouveau_pm.h" | |
50 | #include "nouveau_acpi.h" | |
51 | #include "nouveau_bios.h" | |
52 | #include "nouveau_ioctl.h" | |
ebb945a9 BS |
53 | #include "nouveau_abi16.h" |
54 | #include "nouveau_fbcon.h" | |
55 | #include "nouveau_fence.h" | |
33b903e8 | 56 | #include "nouveau_debugfs.h" |
ebb945a9 | 57 | |
94580299 BS |
58 | MODULE_PARM_DESC(config, "option string to pass to driver core"); |
59 | static char *nouveau_config; | |
60 | module_param_named(config, nouveau_config, charp, 0400); | |
61 | ||
62 | MODULE_PARM_DESC(debug, "debug string to pass to driver core"); | |
63 | static char *nouveau_debug; | |
64 | module_param_named(debug, nouveau_debug, charp, 0400); | |
65 | ||
ebb945a9 BS |
66 | MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration"); |
67 | static int nouveau_noaccel = 0; | |
68 | module_param_named(noaccel, nouveau_noaccel, int, 0400); | |
69 | ||
9430738d BS |
70 | MODULE_PARM_DESC(modeset, "enable driver (default: auto, " |
71 | "0 = disabled, 1 = enabled, 2 = headless)"); | |
72 | int nouveau_modeset = -1; | |
77145f1c BS |
73 | module_param_named(modeset, nouveau_modeset, int, 0400); |
74 | ||
5addcf0a DA |
75 | MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)"); |
76 | int nouveau_runtime_pm = -1; | |
77 | module_param_named(runpm, nouveau_runtime_pm, int, 0400); | |
78 | ||
77145f1c BS |
79 | static struct drm_driver driver; |
80 | ||
94580299 BS |
81 | static u64 |
82 | nouveau_name(struct pci_dev *pdev) | |
83 | { | |
84 | u64 name = (u64)pci_domain_nr(pdev->bus) << 32; | |
85 | name |= pdev->bus->number << 16; | |
86 | name |= PCI_SLOT(pdev->devfn) << 8; | |
87 | return name | PCI_FUNC(pdev->devfn); | |
88 | } | |
89 | ||
90 | static int | |
fa6df8c1 BS |
91 | nouveau_cli_create(struct pci_dev *pdev, const char *name, |
92 | int size, void **pcli) | |
94580299 BS |
93 | { |
94 | struct nouveau_cli *cli; | |
95 | int ret; | |
96 | ||
dd5700ea | 97 | *pcli = NULL; |
94580299 BS |
98 | ret = nouveau_client_create_(name, nouveau_name(pdev), nouveau_config, |
99 | nouveau_debug, size, pcli); | |
100 | cli = *pcli; | |
dd5700ea MS |
101 | if (ret) { |
102 | if (cli) | |
103 | nouveau_client_destroy(&cli->base); | |
104 | *pcli = NULL; | |
94580299 | 105 | return ret; |
dd5700ea | 106 | } |
94580299 BS |
107 | |
108 | mutex_init(&cli->mutex); | |
109 | return 0; | |
110 | } | |
111 | ||
112 | static void | |
113 | nouveau_cli_destroy(struct nouveau_cli *cli) | |
114 | { | |
115 | struct nouveau_object *client = nv_object(cli); | |
ebb945a9 | 116 | nouveau_vm_ref(NULL, &cli->base.vm, NULL); |
94580299 BS |
117 | nouveau_client_fini(&cli->base, false); |
118 | atomic_set(&client->refcount, 1); | |
119 | nouveau_object_ref(NULL, &client); | |
120 | } | |
121 | ||
ebb945a9 BS |
122 | static void |
123 | nouveau_accel_fini(struct nouveau_drm *drm) | |
124 | { | |
125 | nouveau_gpuobj_ref(NULL, &drm->notify); | |
126 | nouveau_channel_del(&drm->channel); | |
49981046 | 127 | nouveau_channel_del(&drm->cechan); |
ebb945a9 BS |
128 | if (drm->fence) |
129 | nouveau_fence(drm)->dtor(drm); | |
130 | } | |
131 | ||
132 | static void | |
133 | nouveau_accel_init(struct nouveau_drm *drm) | |
134 | { | |
135 | struct nouveau_device *device = nv_device(drm->device); | |
136 | struct nouveau_object *object; | |
49981046 | 137 | u32 arg0, arg1; |
ebb945a9 BS |
138 | int ret; |
139 | ||
9fe72f9e | 140 | if (nouveau_noaccel || !nouveau_fifo(device) /*XXX*/) |
ebb945a9 BS |
141 | return; |
142 | ||
143 | /* initialise synchronisation routines */ | |
144 | if (device->card_type < NV_10) ret = nv04_fence_create(drm); | |
8aa816b0 IM |
145 | else if (device->card_type < NV_11 || |
146 | device->chipset < 0x17) ret = nv10_fence_create(drm); | |
60e5cb79 | 147 | else if (device->card_type < NV_50) ret = nv17_fence_create(drm); |
ace5a9b8 | 148 | else if (device->chipset < 0x84) ret = nv50_fence_create(drm); |
ebb945a9 BS |
149 | else if (device->card_type < NV_C0) ret = nv84_fence_create(drm); |
150 | else ret = nvc0_fence_create(drm); | |
151 | if (ret) { | |
152 | NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret); | |
153 | nouveau_accel_fini(drm); | |
154 | return; | |
155 | } | |
156 | ||
49981046 BS |
157 | if (device->card_type >= NV_E0) { |
158 | ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE, | |
159 | NVDRM_CHAN + 1, | |
160 | NVE0_CHANNEL_IND_ENGINE_CE0 | | |
161 | NVE0_CHANNEL_IND_ENGINE_CE1, 0, | |
162 | &drm->cechan); | |
163 | if (ret) | |
164 | NV_ERROR(drm, "failed to create ce channel, %d\n", ret); | |
165 | ||
166 | arg0 = NVE0_CHANNEL_IND_ENGINE_GR; | |
49469800 | 167 | arg1 = 1; |
00fc6f6f BS |
168 | } else |
169 | if (device->chipset >= 0xa3 && | |
170 | device->chipset != 0xaa && | |
171 | device->chipset != 0xac) { | |
172 | ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE, | |
173 | NVDRM_CHAN + 1, NvDmaFB, NvDmaTT, | |
174 | &drm->cechan); | |
175 | if (ret) | |
176 | NV_ERROR(drm, "failed to create ce channel, %d\n", ret); | |
177 | ||
178 | arg0 = NvDmaFB; | |
179 | arg1 = NvDmaTT; | |
49981046 BS |
180 | } else { |
181 | arg0 = NvDmaFB; | |
182 | arg1 = NvDmaTT; | |
183 | } | |
184 | ||
ebb945a9 | 185 | ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE, NVDRM_CHAN, |
49981046 | 186 | arg0, arg1, &drm->channel); |
ebb945a9 BS |
187 | if (ret) { |
188 | NV_ERROR(drm, "failed to create kernel channel, %d\n", ret); | |
189 | nouveau_accel_fini(drm); | |
190 | return; | |
191 | } | |
192 | ||
193 | if (device->card_type < NV_C0) { | |
194 | ret = nouveau_gpuobj_new(drm->device, NULL, 32, 0, 0, | |
195 | &drm->notify); | |
196 | if (ret) { | |
197 | NV_ERROR(drm, "failed to allocate notifier, %d\n", ret); | |
198 | nouveau_accel_fini(drm); | |
199 | return; | |
200 | } | |
201 | ||
202 | ret = nouveau_object_new(nv_object(drm), | |
203 | drm->channel->handle, NvNotify0, | |
204 | 0x003d, &(struct nv_dma_class) { | |
205 | .flags = NV_DMA_TARGET_VRAM | | |
206 | NV_DMA_ACCESS_RDWR, | |
207 | .start = drm->notify->addr, | |
208 | .limit = drm->notify->addr + 31 | |
209 | }, sizeof(struct nv_dma_class), | |
210 | &object); | |
211 | if (ret) { | |
212 | nouveau_accel_fini(drm); | |
213 | return; | |
214 | } | |
215 | } | |
216 | ||
217 | ||
49981046 | 218 | nouveau_bo_move_init(drm); |
ebb945a9 BS |
219 | } |
220 | ||
56550d94 GKH |
221 | static int nouveau_drm_probe(struct pci_dev *pdev, |
222 | const struct pci_device_id *pent) | |
94580299 BS |
223 | { |
224 | struct nouveau_device *device; | |
ebb945a9 BS |
225 | struct apertures_struct *aper; |
226 | bool boot = false; | |
94580299 BS |
227 | int ret; |
228 | ||
ebb945a9 BS |
229 | /* remove conflicting drivers (vesafb, efifb etc) */ |
230 | aper = alloc_apertures(3); | |
231 | if (!aper) | |
232 | return -ENOMEM; | |
233 | ||
234 | aper->ranges[0].base = pci_resource_start(pdev, 1); | |
235 | aper->ranges[0].size = pci_resource_len(pdev, 1); | |
236 | aper->count = 1; | |
237 | ||
238 | if (pci_resource_len(pdev, 2)) { | |
239 | aper->ranges[aper->count].base = pci_resource_start(pdev, 2); | |
240 | aper->ranges[aper->count].size = pci_resource_len(pdev, 2); | |
241 | aper->count++; | |
242 | } | |
243 | ||
244 | if (pci_resource_len(pdev, 3)) { | |
245 | aper->ranges[aper->count].base = pci_resource_start(pdev, 3); | |
246 | aper->ranges[aper->count].size = pci_resource_len(pdev, 3); | |
247 | aper->count++; | |
248 | } | |
249 | ||
250 | #ifdef CONFIG_X86 | |
251 | boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; | |
252 | #endif | |
253 | remove_conflicting_framebuffers(aper, "nouveaufb", boot); | |
83ef7777 | 254 | kfree(aper); |
ebb945a9 | 255 | |
94580299 BS |
256 | ret = nouveau_device_create(pdev, nouveau_name(pdev), pci_name(pdev), |
257 | nouveau_config, nouveau_debug, &device); | |
258 | if (ret) | |
259 | return ret; | |
260 | ||
261 | pci_set_master(pdev); | |
262 | ||
77145f1c | 263 | ret = drm_get_pci_dev(pdev, pent, &driver); |
94580299 | 264 | if (ret) { |
ebb945a9 | 265 | nouveau_object_ref(NULL, (struct nouveau_object **)&device); |
94580299 BS |
266 | return ret; |
267 | } | |
268 | ||
269 | return 0; | |
270 | } | |
271 | ||
5addcf0a DA |
272 | #define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403 |
273 | ||
274 | static void | |
275 | nouveau_get_hdmi_dev(struct drm_device *dev) | |
276 | { | |
277 | struct nouveau_drm *drm = dev->dev_private; | |
278 | struct pci_dev *pdev = dev->pdev; | |
279 | ||
280 | /* subfunction one is a hdmi audio device? */ | |
281 | drm->hdmi_device = pci_get_bus_and_slot((unsigned int)pdev->bus->number, | |
282 | PCI_DEVFN(PCI_SLOT(pdev->devfn), 1)); | |
283 | ||
284 | if (!drm->hdmi_device) { | |
285 | DRM_INFO("hdmi device not found %d %d %d\n", pdev->bus->number, PCI_SLOT(pdev->devfn), 1); | |
286 | return; | |
287 | } | |
288 | ||
289 | if ((drm->hdmi_device->class >> 8) != PCI_CLASS_MULTIMEDIA_HD_AUDIO) { | |
290 | DRM_INFO("possible hdmi device not audio %d\n", drm->hdmi_device->class); | |
291 | pci_dev_put(drm->hdmi_device); | |
292 | drm->hdmi_device = NULL; | |
293 | return; | |
294 | } | |
295 | } | |
296 | ||
5b8a43ae | 297 | static int |
94580299 BS |
298 | nouveau_drm_load(struct drm_device *dev, unsigned long flags) |
299 | { | |
300 | struct pci_dev *pdev = dev->pdev; | |
ebb945a9 | 301 | struct nouveau_device *device; |
94580299 BS |
302 | struct nouveau_drm *drm; |
303 | int ret; | |
304 | ||
fa6df8c1 | 305 | ret = nouveau_cli_create(pdev, "DRM", sizeof(*drm), (void**)&drm); |
94580299 BS |
306 | if (ret) |
307 | return ret; | |
308 | ||
77145f1c BS |
309 | dev->dev_private = drm; |
310 | drm->dev = dev; | |
311 | ||
94580299 | 312 | INIT_LIST_HEAD(&drm->clients); |
ebb945a9 | 313 | spin_lock_init(&drm->tile.lock); |
94580299 | 314 | |
5addcf0a DA |
315 | nouveau_get_hdmi_dev(dev); |
316 | ||
cb75d97e BS |
317 | /* make sure AGP controller is in a consistent state before we |
318 | * (possibly) execute vbios init tables (see nouveau_agp.h) | |
319 | */ | |
320 | if (drm_pci_device_is_agp(dev) && dev->agp) { | |
321 | /* dummy device object, doesn't init anything, but allows | |
322 | * agp code access to registers | |
323 | */ | |
324 | ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT, | |
325 | NVDRM_DEVICE, 0x0080, | |
326 | &(struct nv_device_class) { | |
327 | .device = ~0, | |
328 | .disable = | |
329 | ~(NV_DEVICE_DISABLE_MMIO | | |
330 | NV_DEVICE_DISABLE_IDENTIFY), | |
331 | .debug0 = ~0, | |
332 | }, sizeof(struct nv_device_class), | |
333 | &drm->device); | |
334 | if (ret) | |
ebb945a9 | 335 | goto fail_device; |
cb75d97e BS |
336 | |
337 | nouveau_agp_reset(drm); | |
338 | nouveau_object_del(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE); | |
339 | } | |
340 | ||
94580299 BS |
341 | ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE, |
342 | 0x0080, &(struct nv_device_class) { | |
343 | .device = ~0, | |
344 | .disable = 0, | |
345 | .debug0 = 0, | |
346 | }, sizeof(struct nv_device_class), | |
347 | &drm->device); | |
348 | if (ret) | |
349 | goto fail_device; | |
350 | ||
77145f1c BS |
351 | /* workaround an odd issue on nvc1 by disabling the device's |
352 | * nosnoop capability. hopefully won't cause issues until a | |
353 | * better fix is found - assuming there is one... | |
354 | */ | |
ebb945a9 | 355 | device = nv_device(drm->device); |
77145f1c BS |
356 | if (nv_device(drm->device)->chipset == 0xc1) |
357 | nv_mask(device, 0x00088080, 0x00000800, 0x00000000); | |
ebb945a9 | 358 | |
77145f1c | 359 | nouveau_vga_init(drm); |
cb75d97e BS |
360 | nouveau_agp_init(drm); |
361 | ||
ebb945a9 BS |
362 | if (device->card_type >= NV_50) { |
363 | ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40), | |
364 | 0x1000, &drm->client.base.vm); | |
365 | if (ret) | |
366 | goto fail_device; | |
367 | } | |
368 | ||
369 | ret = nouveau_ttm_init(drm); | |
94580299 | 370 | if (ret) |
77145f1c BS |
371 | goto fail_ttm; |
372 | ||
373 | ret = nouveau_bios_init(dev); | |
374 | if (ret) | |
375 | goto fail_bios; | |
376 | ||
77145f1c | 377 | ret = nouveau_display_create(dev); |
ebb945a9 | 378 | if (ret) |
77145f1c BS |
379 | goto fail_dispctor; |
380 | ||
381 | if (dev->mode_config.num_crtc) { | |
382 | ret = nouveau_display_init(dev); | |
383 | if (ret) | |
384 | goto fail_dispinit; | |
385 | } | |
386 | ||
387 | nouveau_pm_init(dev); | |
ebb945a9 BS |
388 | |
389 | nouveau_accel_init(drm); | |
390 | nouveau_fbcon_init(dev); | |
5addcf0a DA |
391 | |
392 | if (nouveau_runtime_pm != 0) { | |
393 | pm_runtime_use_autosuspend(dev->dev); | |
394 | pm_runtime_set_autosuspend_delay(dev->dev, 5000); | |
395 | pm_runtime_set_active(dev->dev); | |
396 | pm_runtime_allow(dev->dev); | |
397 | pm_runtime_mark_last_busy(dev->dev); | |
398 | pm_runtime_put(dev->dev); | |
399 | } | |
94580299 BS |
400 | return 0; |
401 | ||
77145f1c BS |
402 | fail_dispinit: |
403 | nouveau_display_destroy(dev); | |
404 | fail_dispctor: | |
77145f1c BS |
405 | nouveau_bios_takedown(dev); |
406 | fail_bios: | |
ebb945a9 | 407 | nouveau_ttm_fini(drm); |
77145f1c BS |
408 | fail_ttm: |
409 | nouveau_agp_fini(drm); | |
410 | nouveau_vga_fini(drm); | |
94580299 BS |
411 | fail_device: |
412 | nouveau_cli_destroy(&drm->client); | |
413 | return ret; | |
414 | } | |
415 | ||
5b8a43ae | 416 | static int |
94580299 BS |
417 | nouveau_drm_unload(struct drm_device *dev) |
418 | { | |
77145f1c | 419 | struct nouveau_drm *drm = nouveau_drm(dev); |
94580299 | 420 | |
5addcf0a | 421 | pm_runtime_get_sync(dev->dev); |
ebb945a9 BS |
422 | nouveau_fbcon_fini(dev); |
423 | nouveau_accel_fini(drm); | |
424 | ||
77145f1c BS |
425 | nouveau_pm_fini(dev); |
426 | ||
9430738d BS |
427 | if (dev->mode_config.num_crtc) |
428 | nouveau_display_fini(dev); | |
77145f1c BS |
429 | nouveau_display_destroy(dev); |
430 | ||
77145f1c | 431 | nouveau_bios_takedown(dev); |
94580299 | 432 | |
ebb945a9 | 433 | nouveau_ttm_fini(drm); |
cb75d97e | 434 | nouveau_agp_fini(drm); |
77145f1c | 435 | nouveau_vga_fini(drm); |
cb75d97e | 436 | |
5addcf0a DA |
437 | if (drm->hdmi_device) |
438 | pci_dev_put(drm->hdmi_device); | |
94580299 BS |
439 | nouveau_cli_destroy(&drm->client); |
440 | return 0; | |
441 | } | |
442 | ||
443 | static void | |
444 | nouveau_drm_remove(struct pci_dev *pdev) | |
445 | { | |
77145f1c BS |
446 | struct drm_device *dev = pci_get_drvdata(pdev); |
447 | struct nouveau_drm *drm = nouveau_drm(dev); | |
ebb945a9 | 448 | struct nouveau_object *device; |
77145f1c BS |
449 | |
450 | device = drm->client.base.device; | |
451 | drm_put_dev(dev); | |
452 | ||
ebb945a9 BS |
453 | nouveau_object_ref(NULL, &device); |
454 | nouveau_object_debug(); | |
94580299 BS |
455 | } |
456 | ||
cd897837 | 457 | static int |
2d8b9ccb | 458 | nouveau_do_suspend(struct drm_device *dev) |
94580299 | 459 | { |
77145f1c | 460 | struct nouveau_drm *drm = nouveau_drm(dev); |
94580299 BS |
461 | struct nouveau_cli *cli; |
462 | int ret; | |
463 | ||
9430738d | 464 | if (dev->mode_config.num_crtc) { |
5addcf0a | 465 | NV_SUSPEND(drm, "suspending display...\n"); |
9430738d BS |
466 | ret = nouveau_display_suspend(dev); |
467 | if (ret) | |
468 | return ret; | |
469 | } | |
94580299 | 470 | |
5addcf0a | 471 | NV_SUSPEND(drm, "evicting buffers...\n"); |
ebb945a9 BS |
472 | ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM); |
473 | ||
5addcf0a | 474 | NV_SUSPEND(drm, "waiting for kernel channels to go idle...\n"); |
81dff21b BS |
475 | if (drm->cechan) { |
476 | ret = nouveau_channel_idle(drm->cechan); | |
477 | if (ret) | |
478 | return ret; | |
479 | } | |
480 | ||
481 | if (drm->channel) { | |
482 | ret = nouveau_channel_idle(drm->channel); | |
483 | if (ret) | |
484 | return ret; | |
485 | } | |
486 | ||
5addcf0a | 487 | NV_SUSPEND(drm, "suspending client object trees...\n"); |
ebb945a9 BS |
488 | if (drm->fence && nouveau_fence(drm)->suspend) { |
489 | if (!nouveau_fence(drm)->suspend(drm)) | |
490 | return -ENOMEM; | |
491 | } | |
492 | ||
94580299 BS |
493 | list_for_each_entry(cli, &drm->clients, head) { |
494 | ret = nouveau_client_fini(&cli->base, true); | |
495 | if (ret) | |
496 | goto fail_client; | |
497 | } | |
498 | ||
5addcf0a | 499 | NV_SUSPEND(drm, "suspending kernel object tree...\n"); |
94580299 BS |
500 | ret = nouveau_client_fini(&drm->client.base, true); |
501 | if (ret) | |
502 | goto fail_client; | |
503 | ||
cb75d97e | 504 | nouveau_agp_fini(drm); |
94580299 BS |
505 | return 0; |
506 | ||
507 | fail_client: | |
508 | list_for_each_entry_continue_reverse(cli, &drm->clients, head) { | |
509 | nouveau_client_init(&cli->base); | |
510 | } | |
511 | ||
9430738d | 512 | if (dev->mode_config.num_crtc) { |
5addcf0a | 513 | NV_SUSPEND(drm, "resuming display...\n"); |
9430738d BS |
514 | nouveau_display_resume(dev); |
515 | } | |
94580299 BS |
516 | return ret; |
517 | } | |
518 | ||
2d8b9ccb | 519 | int nouveau_pmops_suspend(struct device *dev) |
94580299 | 520 | { |
2d8b9ccb DA |
521 | struct pci_dev *pdev = to_pci_dev(dev); |
522 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
94580299 BS |
523 | int ret; |
524 | ||
5addcf0a DA |
525 | if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || |
526 | drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) | |
94580299 BS |
527 | return 0; |
528 | ||
5addcf0a DA |
529 | if (drm_dev->mode_config.num_crtc) |
530 | nouveau_fbcon_set_suspend(drm_dev, 1); | |
531 | ||
532 | nv_suspend_set_printk_level(NV_DBG_INFO); | |
2d8b9ccb | 533 | ret = nouveau_do_suspend(drm_dev); |
94580299 BS |
534 | if (ret) |
535 | return ret; | |
2d8b9ccb DA |
536 | |
537 | pci_save_state(pdev); | |
538 | pci_disable_device(pdev); | |
539 | pci_set_power_state(pdev, PCI_D3hot); | |
5addcf0a | 540 | nv_suspend_set_printk_level(NV_DBG_DEBUG); |
2d8b9ccb DA |
541 | |
542 | return 0; | |
543 | } | |
544 | ||
cd897837 | 545 | static int |
2d8b9ccb DA |
546 | nouveau_do_resume(struct drm_device *dev) |
547 | { | |
548 | struct nouveau_drm *drm = nouveau_drm(dev); | |
549 | struct nouveau_cli *cli; | |
550 | ||
5addcf0a | 551 | NV_SUSPEND(drm, "re-enabling device...\n"); |
94580299 | 552 | |
cb75d97e BS |
553 | nouveau_agp_reset(drm); |
554 | ||
5addcf0a | 555 | NV_SUSPEND(drm, "resuming kernel object tree...\n"); |
94580299 | 556 | nouveau_client_init(&drm->client.base); |
ebb945a9 | 557 | nouveau_agp_init(drm); |
94580299 | 558 | |
5addcf0a | 559 | NV_SUSPEND(drm, "resuming client object trees...\n"); |
81dff21b BS |
560 | if (drm->fence && nouveau_fence(drm)->resume) |
561 | nouveau_fence(drm)->resume(drm); | |
562 | ||
94580299 BS |
563 | list_for_each_entry(cli, &drm->clients, head) { |
564 | nouveau_client_init(&cli->base); | |
565 | } | |
cb75d97e | 566 | |
77145f1c | 567 | nouveau_run_vbios_init(dev); |
77145f1c BS |
568 | nouveau_pm_resume(dev); |
569 | ||
9430738d | 570 | if (dev->mode_config.num_crtc) { |
5addcf0a DA |
571 | NV_SUSPEND(drm, "resuming display...\n"); |
572 | nouveau_display_repin(dev); | |
9430738d | 573 | } |
5addcf0a | 574 | |
77145f1c | 575 | return 0; |
94580299 BS |
576 | } |
577 | ||
2d8b9ccb DA |
578 | int nouveau_pmops_resume(struct device *dev) |
579 | { | |
580 | struct pci_dev *pdev = to_pci_dev(dev); | |
581 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
582 | int ret; | |
583 | ||
5addcf0a DA |
584 | if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || |
585 | drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) | |
2d8b9ccb DA |
586 | return 0; |
587 | ||
588 | pci_set_power_state(pdev, PCI_D0); | |
589 | pci_restore_state(pdev); | |
590 | ret = pci_enable_device(pdev); | |
591 | if (ret) | |
592 | return ret; | |
593 | pci_set_master(pdev); | |
594 | ||
5addcf0a DA |
595 | nv_suspend_set_printk_level(NV_DBG_INFO); |
596 | ret = nouveau_do_resume(drm_dev); | |
597 | if (ret) { | |
598 | nv_suspend_set_printk_level(NV_DBG_DEBUG); | |
599 | return ret; | |
600 | } | |
601 | if (drm_dev->mode_config.num_crtc) | |
602 | nouveau_fbcon_set_suspend(drm_dev, 0); | |
603 | ||
604 | nouveau_fbcon_zfill_all(drm_dev); | |
01172772 DA |
605 | if (drm_dev->mode_config.num_crtc) |
606 | nouveau_display_resume(drm_dev); | |
5addcf0a DA |
607 | nv_suspend_set_printk_level(NV_DBG_DEBUG); |
608 | return 0; | |
2d8b9ccb DA |
609 | } |
610 | ||
611 | static int nouveau_pmops_freeze(struct device *dev) | |
612 | { | |
613 | struct pci_dev *pdev = to_pci_dev(dev); | |
614 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
5addcf0a DA |
615 | int ret; |
616 | ||
617 | nv_suspend_set_printk_level(NV_DBG_INFO); | |
618 | if (drm_dev->mode_config.num_crtc) | |
619 | nouveau_fbcon_set_suspend(drm_dev, 1); | |
2d8b9ccb | 620 | |
5addcf0a DA |
621 | ret = nouveau_do_suspend(drm_dev); |
622 | nv_suspend_set_printk_level(NV_DBG_DEBUG); | |
623 | return ret; | |
2d8b9ccb DA |
624 | } |
625 | ||
626 | static int nouveau_pmops_thaw(struct device *dev) | |
627 | { | |
628 | struct pci_dev *pdev = to_pci_dev(dev); | |
629 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
5addcf0a | 630 | int ret; |
2d8b9ccb | 631 | |
5addcf0a DA |
632 | nv_suspend_set_printk_level(NV_DBG_INFO); |
633 | ret = nouveau_do_resume(drm_dev); | |
634 | if (ret) { | |
635 | nv_suspend_set_printk_level(NV_DBG_DEBUG); | |
636 | return ret; | |
637 | } | |
638 | if (drm_dev->mode_config.num_crtc) | |
639 | nouveau_fbcon_set_suspend(drm_dev, 0); | |
640 | nouveau_fbcon_zfill_all(drm_dev); | |
01172772 DA |
641 | if (drm_dev->mode_config.num_crtc) |
642 | nouveau_display_resume(drm_dev); | |
5addcf0a DA |
643 | nv_suspend_set_printk_level(NV_DBG_DEBUG); |
644 | return 0; | |
2d8b9ccb DA |
645 | } |
646 | ||
647 | ||
5b8a43ae | 648 | static int |
ebb945a9 BS |
649 | nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv) |
650 | { | |
651 | struct pci_dev *pdev = dev->pdev; | |
652 | struct nouveau_drm *drm = nouveau_drm(dev); | |
653 | struct nouveau_cli *cli; | |
a2896ced | 654 | char name[32], tmpname[TASK_COMM_LEN]; |
ebb945a9 BS |
655 | int ret; |
656 | ||
5addcf0a DA |
657 | /* need to bring up power immediately if opening device */ |
658 | ret = pm_runtime_get_sync(dev->dev); | |
659 | if (ret < 0) | |
660 | return ret; | |
661 | ||
a2896ced MS |
662 | get_task_comm(tmpname, current); |
663 | snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid)); | |
fa6df8c1 BS |
664 | |
665 | ret = nouveau_cli_create(pdev, name, sizeof(*cli), (void **)&cli); | |
ebb945a9 | 666 | if (ret) |
5addcf0a | 667 | goto out_suspend; |
ebb945a9 BS |
668 | |
669 | if (nv_device(drm->device)->card_type >= NV_50) { | |
670 | ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40), | |
671 | 0x1000, &cli->base.vm); | |
672 | if (ret) { | |
673 | nouveau_cli_destroy(cli); | |
5addcf0a | 674 | goto out_suspend; |
ebb945a9 BS |
675 | } |
676 | } | |
677 | ||
678 | fpriv->driver_priv = cli; | |
679 | ||
680 | mutex_lock(&drm->client.mutex); | |
681 | list_add(&cli->head, &drm->clients); | |
682 | mutex_unlock(&drm->client.mutex); | |
5addcf0a DA |
683 | |
684 | out_suspend: | |
685 | pm_runtime_mark_last_busy(dev->dev); | |
686 | pm_runtime_put_autosuspend(dev->dev); | |
687 | ||
688 | return ret; | |
ebb945a9 BS |
689 | } |
690 | ||
5b8a43ae | 691 | static void |
ebb945a9 BS |
692 | nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv) |
693 | { | |
694 | struct nouveau_cli *cli = nouveau_cli(fpriv); | |
695 | struct nouveau_drm *drm = nouveau_drm(dev); | |
696 | ||
5addcf0a DA |
697 | pm_runtime_get_sync(dev->dev); |
698 | ||
ebb945a9 BS |
699 | if (cli->abi16) |
700 | nouveau_abi16_fini(cli->abi16); | |
701 | ||
702 | mutex_lock(&drm->client.mutex); | |
703 | list_del(&cli->head); | |
704 | mutex_unlock(&drm->client.mutex); | |
5addcf0a | 705 | |
ebb945a9 BS |
706 | } |
707 | ||
5b8a43ae | 708 | static void |
ebb945a9 BS |
709 | nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv) |
710 | { | |
711 | struct nouveau_cli *cli = nouveau_cli(fpriv); | |
712 | nouveau_cli_destroy(cli); | |
5addcf0a DA |
713 | pm_runtime_mark_last_busy(dev->dev); |
714 | pm_runtime_put_autosuspend(dev->dev); | |
ebb945a9 BS |
715 | } |
716 | ||
baa70943 | 717 | static const struct drm_ioctl_desc |
77145f1c | 718 | nouveau_ioctls[] = { |
7d761258 | 719 | DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), |
77145f1c | 720 | DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
7d761258 MP |
721 | DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), |
722 | DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
723 | DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
724 | DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
725 | DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
726 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
727 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
728 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
729 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
730 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
77145f1c BS |
731 | }; |
732 | ||
5addcf0a DA |
733 | long nouveau_drm_ioctl(struct file *filp, |
734 | unsigned int cmd, unsigned long arg) | |
735 | { | |
736 | struct drm_file *file_priv = filp->private_data; | |
737 | struct drm_device *dev; | |
738 | long ret; | |
739 | dev = file_priv->minor->dev; | |
740 | ||
741 | ret = pm_runtime_get_sync(dev->dev); | |
742 | if (ret < 0) | |
743 | return ret; | |
744 | ||
745 | ret = drm_ioctl(filp, cmd, arg); | |
746 | ||
747 | pm_runtime_mark_last_busy(dev->dev); | |
748 | pm_runtime_put_autosuspend(dev->dev); | |
749 | return ret; | |
750 | } | |
77145f1c BS |
751 | static const struct file_operations |
752 | nouveau_driver_fops = { | |
753 | .owner = THIS_MODULE, | |
754 | .open = drm_open, | |
755 | .release = drm_release, | |
5addcf0a | 756 | .unlocked_ioctl = nouveau_drm_ioctl, |
77145f1c BS |
757 | .mmap = nouveau_ttm_mmap, |
758 | .poll = drm_poll, | |
77145f1c BS |
759 | .read = drm_read, |
760 | #if defined(CONFIG_COMPAT) | |
761 | .compat_ioctl = nouveau_compat_ioctl, | |
762 | #endif | |
763 | .llseek = noop_llseek, | |
764 | }; | |
765 | ||
766 | static struct drm_driver | |
767 | driver = { | |
768 | .driver_features = | |
4cb4ea39 | 769 | DRIVER_USE_AGP | |
7d761258 | 770 | DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER, |
77145f1c BS |
771 | |
772 | .load = nouveau_drm_load, | |
773 | .unload = nouveau_drm_unload, | |
774 | .open = nouveau_drm_open, | |
775 | .preclose = nouveau_drm_preclose, | |
776 | .postclose = nouveau_drm_postclose, | |
777 | .lastclose = nouveau_vga_lastclose, | |
778 | ||
33b903e8 MS |
779 | #if defined(CONFIG_DEBUG_FS) |
780 | .debugfs_init = nouveau_debugfs_init, | |
781 | .debugfs_cleanup = nouveau_debugfs_takedown, | |
782 | #endif | |
783 | ||
77145f1c | 784 | .get_vblank_counter = drm_vblank_count, |
51cb4b39 BS |
785 | .enable_vblank = nouveau_display_vblank_enable, |
786 | .disable_vblank = nouveau_display_vblank_disable, | |
77145f1c BS |
787 | |
788 | .ioctls = nouveau_ioctls, | |
baa70943 | 789 | .num_ioctls = ARRAY_SIZE(nouveau_ioctls), |
77145f1c BS |
790 | .fops = &nouveau_driver_fops, |
791 | ||
792 | .prime_handle_to_fd = drm_gem_prime_handle_to_fd, | |
793 | .prime_fd_to_handle = drm_gem_prime_fd_to_handle, | |
ab9ccb96 AP |
794 | .gem_prime_export = drm_gem_prime_export, |
795 | .gem_prime_import = drm_gem_prime_import, | |
796 | .gem_prime_pin = nouveau_gem_prime_pin, | |
1af7c7dd | 797 | .gem_prime_unpin = nouveau_gem_prime_unpin, |
ab9ccb96 AP |
798 | .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table, |
799 | .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table, | |
800 | .gem_prime_vmap = nouveau_gem_prime_vmap, | |
801 | .gem_prime_vunmap = nouveau_gem_prime_vunmap, | |
77145f1c | 802 | |
77145f1c BS |
803 | .gem_free_object = nouveau_gem_object_del, |
804 | .gem_open_object = nouveau_gem_object_open, | |
805 | .gem_close_object = nouveau_gem_object_close, | |
806 | ||
807 | .dumb_create = nouveau_display_dumb_create, | |
808 | .dumb_map_offset = nouveau_display_dumb_map_offset, | |
43387b37 | 809 | .dumb_destroy = drm_gem_dumb_destroy, |
77145f1c BS |
810 | |
811 | .name = DRIVER_NAME, | |
812 | .desc = DRIVER_DESC, | |
813 | #ifdef GIT_REVISION | |
814 | .date = GIT_REVISION, | |
815 | #else | |
816 | .date = DRIVER_DATE, | |
817 | #endif | |
818 | .major = DRIVER_MAJOR, | |
819 | .minor = DRIVER_MINOR, | |
820 | .patchlevel = DRIVER_PATCHLEVEL, | |
821 | }; | |
822 | ||
94580299 BS |
823 | static struct pci_device_id |
824 | nouveau_drm_pci_table[] = { | |
825 | { | |
826 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID), | |
827 | .class = PCI_BASE_CLASS_DISPLAY << 16, | |
828 | .class_mask = 0xff << 16, | |
829 | }, | |
830 | { | |
831 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID), | |
832 | .class = PCI_BASE_CLASS_DISPLAY << 16, | |
833 | .class_mask = 0xff << 16, | |
834 | }, | |
835 | {} | |
836 | }; | |
837 | ||
5addcf0a DA |
838 | static int nouveau_pmops_runtime_suspend(struct device *dev) |
839 | { | |
840 | struct pci_dev *pdev = to_pci_dev(dev); | |
841 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
842 | int ret; | |
843 | ||
844 | if (nouveau_runtime_pm == 0) | |
845 | return -EINVAL; | |
846 | ||
847 | drm_kms_helper_poll_disable(drm_dev); | |
848 | vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF); | |
849 | nouveau_switcheroo_optimus_dsm(); | |
850 | ret = nouveau_do_suspend(drm_dev); | |
851 | pci_save_state(pdev); | |
852 | pci_disable_device(pdev); | |
853 | pci_set_power_state(pdev, PCI_D3cold); | |
854 | drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF; | |
855 | return ret; | |
856 | } | |
857 | ||
858 | static int nouveau_pmops_runtime_resume(struct device *dev) | |
859 | { | |
860 | struct pci_dev *pdev = to_pci_dev(dev); | |
861 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
862 | struct nouveau_device *device = nouveau_dev(drm_dev); | |
863 | int ret; | |
864 | ||
865 | if (nouveau_runtime_pm == 0) | |
866 | return -EINVAL; | |
867 | ||
868 | pci_set_power_state(pdev, PCI_D0); | |
869 | pci_restore_state(pdev); | |
870 | ret = pci_enable_device(pdev); | |
871 | if (ret) | |
872 | return ret; | |
873 | pci_set_master(pdev); | |
874 | ||
875 | ret = nouveau_do_resume(drm_dev); | |
01172772 DA |
876 | if (drm_dev->mode_config.num_crtc) |
877 | nouveau_display_resume(drm_dev); | |
5addcf0a DA |
878 | drm_kms_helper_poll_enable(drm_dev); |
879 | /* do magic */ | |
880 | nv_mask(device, 0x88488, (1 << 25), (1 << 25)); | |
881 | vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON); | |
882 | drm_dev->switch_power_state = DRM_SWITCH_POWER_ON; | |
883 | return ret; | |
884 | } | |
885 | ||
886 | static int nouveau_pmops_runtime_idle(struct device *dev) | |
887 | { | |
888 | struct pci_dev *pdev = to_pci_dev(dev); | |
889 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
890 | struct nouveau_drm *drm = nouveau_drm(drm_dev); | |
891 | struct drm_crtc *crtc; | |
892 | ||
893 | if (nouveau_runtime_pm == 0) | |
894 | return -EBUSY; | |
895 | ||
896 | /* are we optimus enabled? */ | |
897 | if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) { | |
898 | DRM_DEBUG_DRIVER("failing to power off - not optimus\n"); | |
899 | return -EBUSY; | |
900 | } | |
901 | ||
902 | /* if we have a hdmi audio device - make sure it has a driver loaded */ | |
903 | if (drm->hdmi_device) { | |
904 | if (!drm->hdmi_device->driver) { | |
905 | DRM_DEBUG_DRIVER("failing to power off - no HDMI audio driver loaded\n"); | |
906 | pm_runtime_mark_last_busy(dev); | |
907 | return -EBUSY; | |
908 | } | |
909 | } | |
910 | ||
911 | list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) { | |
912 | if (crtc->enabled) { | |
913 | DRM_DEBUG_DRIVER("failing to power off - crtc active\n"); | |
914 | return -EBUSY; | |
915 | } | |
916 | } | |
917 | pm_runtime_mark_last_busy(dev); | |
918 | pm_runtime_autosuspend(dev); | |
919 | /* we don't want the main rpm_idle to call suspend - we want to autosuspend */ | |
920 | return 1; | |
921 | } | |
922 | ||
2d8b9ccb DA |
923 | static const struct dev_pm_ops nouveau_pm_ops = { |
924 | .suspend = nouveau_pmops_suspend, | |
925 | .resume = nouveau_pmops_resume, | |
926 | .freeze = nouveau_pmops_freeze, | |
927 | .thaw = nouveau_pmops_thaw, | |
928 | .poweroff = nouveau_pmops_freeze, | |
929 | .restore = nouveau_pmops_resume, | |
5addcf0a DA |
930 | .runtime_suspend = nouveau_pmops_runtime_suspend, |
931 | .runtime_resume = nouveau_pmops_runtime_resume, | |
932 | .runtime_idle = nouveau_pmops_runtime_idle, | |
2d8b9ccb DA |
933 | }; |
934 | ||
94580299 BS |
935 | static struct pci_driver |
936 | nouveau_drm_pci_driver = { | |
937 | .name = "nouveau", | |
938 | .id_table = nouveau_drm_pci_table, | |
939 | .probe = nouveau_drm_probe, | |
940 | .remove = nouveau_drm_remove, | |
2d8b9ccb | 941 | .driver.pm = &nouveau_pm_ops, |
94580299 BS |
942 | }; |
943 | ||
944 | static int __init | |
945 | nouveau_drm_init(void) | |
946 | { | |
77145f1c BS |
947 | if (nouveau_modeset == -1) { |
948 | #ifdef CONFIG_VGA_CONSOLE | |
949 | if (vgacon_text_force()) | |
950 | nouveau_modeset = 0; | |
77145f1c | 951 | #endif |
77145f1c BS |
952 | } |
953 | ||
954 | if (!nouveau_modeset) | |
955 | return 0; | |
956 | ||
957 | nouveau_register_dsm_handler(); | |
958 | return drm_pci_init(&driver, &nouveau_drm_pci_driver); | |
94580299 BS |
959 | } |
960 | ||
961 | static void __exit | |
962 | nouveau_drm_exit(void) | |
963 | { | |
77145f1c BS |
964 | if (!nouveau_modeset) |
965 | return; | |
966 | ||
967 | drm_pci_exit(&driver, &nouveau_drm_pci_driver); | |
968 | nouveau_unregister_dsm_handler(); | |
94580299 BS |
969 | } |
970 | ||
971 | module_init(nouveau_drm_init); | |
972 | module_exit(nouveau_drm_exit); | |
973 | ||
974 | MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table); | |
77145f1c BS |
975 | MODULE_AUTHOR(DRIVER_AUTHOR); |
976 | MODULE_DESCRIPTION(DRIVER_DESC); | |
94580299 | 977 | MODULE_LICENSE("GPL and additional rights"); |