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Commit | Line | Data |
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94580299 BS |
1 | /* |
2 | * Copyright 2012 Red Hat Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | * Authors: Ben Skeggs | |
23 | */ | |
24 | ||
77145f1c | 25 | #include <linux/console.h> |
c5fd936e | 26 | #include <linux/delay.h> |
94580299 BS |
27 | #include <linux/module.h> |
28 | #include <linux/pci.h> | |
5addcf0a DA |
29 | #include <linux/pm_runtime.h> |
30 | #include <linux/vga_switcheroo.h> | |
fdb751ef | 31 | |
5addcf0a DA |
32 | #include "drmP.h" |
33 | #include "drm_crtc_helper.h" | |
fdb751ef | 34 | |
ebb945a9 | 35 | #include <core/gpuobj.h> |
c33e05a1 | 36 | #include <core/option.h> |
7974dd1b BS |
37 | #include <core/pci.h> |
38 | #include <core/tegra.h> | |
94580299 | 39 | |
923bc416 | 40 | #include <nvif/class.h> |
845f2725 | 41 | #include <nvif/cl0002.h> |
8ed1730c | 42 | #include <nvif/cla06f.h> |
538b269b BS |
43 | #include <nvif/if0004.h> |
44 | ||
94580299 | 45 | #include "nouveau_drm.h" |
ebb945a9 | 46 | #include "nouveau_dma.h" |
77145f1c BS |
47 | #include "nouveau_ttm.h" |
48 | #include "nouveau_gem.h" | |
77145f1c | 49 | #include "nouveau_vga.h" |
26fdd78c | 50 | #include "nouveau_sysfs.h" |
b9ed919f | 51 | #include "nouveau_hwmon.h" |
77145f1c BS |
52 | #include "nouveau_acpi.h" |
53 | #include "nouveau_bios.h" | |
54 | #include "nouveau_ioctl.h" | |
ebb945a9 BS |
55 | #include "nouveau_abi16.h" |
56 | #include "nouveau_fbcon.h" | |
57 | #include "nouveau_fence.h" | |
33b903e8 | 58 | #include "nouveau_debugfs.h" |
27111a23 | 59 | #include "nouveau_usif.h" |
703fa264 | 60 | #include "nouveau_connector.h" |
055a65d5 | 61 | #include "nouveau_platform.h" |
ebb945a9 | 62 | |
94580299 BS |
63 | MODULE_PARM_DESC(config, "option string to pass to driver core"); |
64 | static char *nouveau_config; | |
65 | module_param_named(config, nouveau_config, charp, 0400); | |
66 | ||
67 | MODULE_PARM_DESC(debug, "debug string to pass to driver core"); | |
68 | static char *nouveau_debug; | |
69 | module_param_named(debug, nouveau_debug, charp, 0400); | |
70 | ||
ebb945a9 BS |
71 | MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration"); |
72 | static int nouveau_noaccel = 0; | |
73 | module_param_named(noaccel, nouveau_noaccel, int, 0400); | |
74 | ||
9430738d BS |
75 | MODULE_PARM_DESC(modeset, "enable driver (default: auto, " |
76 | "0 = disabled, 1 = enabled, 2 = headless)"); | |
77 | int nouveau_modeset = -1; | |
77145f1c BS |
78 | module_param_named(modeset, nouveau_modeset, int, 0400); |
79 | ||
5addcf0a DA |
80 | MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)"); |
81 | int nouveau_runtime_pm = -1; | |
82 | module_param_named(runpm, nouveau_runtime_pm, int, 0400); | |
83 | ||
915b4d11 DH |
84 | static struct drm_driver driver_stub; |
85 | static struct drm_driver driver_pci; | |
86 | static struct drm_driver driver_platform; | |
77145f1c | 87 | |
94580299 | 88 | static u64 |
420b9469 | 89 | nouveau_pci_name(struct pci_dev *pdev) |
94580299 BS |
90 | { |
91 | u64 name = (u64)pci_domain_nr(pdev->bus) << 32; | |
92 | name |= pdev->bus->number << 16; | |
93 | name |= PCI_SLOT(pdev->devfn) << 8; | |
94 | return name | PCI_FUNC(pdev->devfn); | |
95 | } | |
96 | ||
420b9469 AC |
97 | static u64 |
98 | nouveau_platform_name(struct platform_device *platformdev) | |
99 | { | |
100 | return platformdev->id; | |
101 | } | |
102 | ||
103 | static u64 | |
104 | nouveau_name(struct drm_device *dev) | |
105 | { | |
106 | if (dev->pdev) | |
107 | return nouveau_pci_name(dev->pdev); | |
108 | else | |
109 | return nouveau_platform_name(dev->platformdev); | |
110 | } | |
111 | ||
94580299 | 112 | static int |
9ad97ede | 113 | nouveau_cli_create(struct drm_device *dev, const char *sname, |
fa6df8c1 | 114 | int size, void **pcli) |
94580299 | 115 | { |
0ad72863 | 116 | struct nouveau_cli *cli = *pcli = kzalloc(size, GFP_KERNEL); |
9ad97ede | 117 | int ret; |
0ad72863 | 118 | if (cli) { |
9ad97ede BS |
119 | snprintf(cli->name, sizeof(cli->name), "%s", sname); |
120 | cli->dev = dev; | |
121 | ||
a01ca78c | 122 | ret = nvif_client_init(NULL, cli->name, nouveau_name(dev), |
9ad97ede BS |
123 | nouveau_config, nouveau_debug, |
124 | &cli->base); | |
27111a23 | 125 | if (ret == 0) { |
0ad72863 | 126 | mutex_init(&cli->mutex); |
27111a23 BS |
127 | usif_client_init(cli); |
128 | } | |
94580299 | 129 | return ret; |
dd5700ea | 130 | } |
0ad72863 | 131 | return -ENOMEM; |
94580299 BS |
132 | } |
133 | ||
134 | static void | |
135 | nouveau_cli_destroy(struct nouveau_cli *cli) | |
136 | { | |
be83cd4e | 137 | nvkm_vm_ref(NULL, &nvxx_client(&cli->base)->vm, NULL); |
0ad72863 | 138 | nvif_client_fini(&cli->base); |
27111a23 | 139 | usif_client_fini(cli); |
f5654d95 | 140 | kfree(cli); |
94580299 BS |
141 | } |
142 | ||
ebb945a9 BS |
143 | static void |
144 | nouveau_accel_fini(struct nouveau_drm *drm) | |
145 | { | |
fbd58ebd | 146 | nouveau_channel_idle(drm->channel); |
0ad72863 | 147 | nvif_object_fini(&drm->ntfy); |
f027f491 | 148 | nvkm_gpuobj_del(&drm->notify); |
fbd58ebd | 149 | nvif_notify_fini(&drm->flip); |
0ad72863 | 150 | nvif_object_fini(&drm->nvsw); |
fbd58ebd BS |
151 | nouveau_channel_del(&drm->channel); |
152 | ||
153 | nouveau_channel_idle(drm->cechan); | |
0ad72863 | 154 | nvif_object_fini(&drm->ttm.copy); |
fbd58ebd BS |
155 | nouveau_channel_del(&drm->cechan); |
156 | ||
ebb945a9 BS |
157 | if (drm->fence) |
158 | nouveau_fence(drm)->dtor(drm); | |
159 | } | |
160 | ||
161 | static void | |
162 | nouveau_accel_init(struct nouveau_drm *drm) | |
163 | { | |
967e7bde | 164 | struct nvif_device *device = &drm->device; |
41a63406 | 165 | struct nvif_sclass *sclass; |
49981046 | 166 | u32 arg0, arg1; |
41a63406 | 167 | int ret, i, n; |
ebb945a9 | 168 | |
967e7bde | 169 | if (nouveau_noaccel) |
ebb945a9 BS |
170 | return; |
171 | ||
172 | /* initialise synchronisation routines */ | |
967e7bde BS |
173 | /*XXX: this is crap, but the fence/channel stuff is a little |
174 | * backwards in some places. this will be fixed. | |
175 | */ | |
41a63406 | 176 | ret = n = nvif_object_sclass_get(&device->object, &sclass); |
967e7bde BS |
177 | if (ret < 0) |
178 | return; | |
179 | ||
41a63406 BS |
180 | for (ret = -ENOSYS, i = 0; i < n; i++) { |
181 | switch (sclass[i].oclass) { | |
bbf8906b | 182 | case NV03_CHANNEL_DMA: |
967e7bde BS |
183 | ret = nv04_fence_create(drm); |
184 | break; | |
bbf8906b | 185 | case NV10_CHANNEL_DMA: |
967e7bde BS |
186 | ret = nv10_fence_create(drm); |
187 | break; | |
bbf8906b BS |
188 | case NV17_CHANNEL_DMA: |
189 | case NV40_CHANNEL_DMA: | |
967e7bde BS |
190 | ret = nv17_fence_create(drm); |
191 | break; | |
bbf8906b | 192 | case NV50_CHANNEL_GPFIFO: |
967e7bde BS |
193 | ret = nv50_fence_create(drm); |
194 | break; | |
bbf8906b | 195 | case G82_CHANNEL_GPFIFO: |
967e7bde BS |
196 | ret = nv84_fence_create(drm); |
197 | break; | |
bbf8906b BS |
198 | case FERMI_CHANNEL_GPFIFO: |
199 | case KEPLER_CHANNEL_GPFIFO_A: | |
a1020afe | 200 | case MAXWELL_CHANNEL_GPFIFO_A: |
967e7bde BS |
201 | ret = nvc0_fence_create(drm); |
202 | break; | |
203 | default: | |
204 | break; | |
205 | } | |
206 | } | |
207 | ||
41a63406 | 208 | nvif_object_sclass_put(&sclass); |
ebb945a9 BS |
209 | if (ret) { |
210 | NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret); | |
211 | nouveau_accel_fini(drm); | |
212 | return; | |
213 | } | |
214 | ||
967e7bde | 215 | if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) { |
fcf3f91c | 216 | ret = nouveau_channel_new(drm, &drm->device, |
bbf8906b BS |
217 | KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_CE0| |
218 | KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_CE1, | |
219 | 0, &drm->cechan); | |
49981046 BS |
220 | if (ret) |
221 | NV_ERROR(drm, "failed to create ce channel, %d\n", ret); | |
222 | ||
bbf8906b | 223 | arg0 = KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_GR; |
49469800 | 224 | arg1 = 1; |
00fc6f6f | 225 | } else |
967e7bde BS |
226 | if (device->info.chipset >= 0xa3 && |
227 | device->info.chipset != 0xaa && | |
228 | device->info.chipset != 0xac) { | |
fcf3f91c | 229 | ret = nouveau_channel_new(drm, &drm->device, |
0ad72863 | 230 | NvDmaFB, NvDmaTT, &drm->cechan); |
00fc6f6f BS |
231 | if (ret) |
232 | NV_ERROR(drm, "failed to create ce channel, %d\n", ret); | |
233 | ||
234 | arg0 = NvDmaFB; | |
235 | arg1 = NvDmaTT; | |
49981046 BS |
236 | } else { |
237 | arg0 = NvDmaFB; | |
238 | arg1 = NvDmaTT; | |
239 | } | |
240 | ||
fcf3f91c | 241 | ret = nouveau_channel_new(drm, &drm->device, arg0, arg1, &drm->channel); |
ebb945a9 BS |
242 | if (ret) { |
243 | NV_ERROR(drm, "failed to create kernel channel, %d\n", ret); | |
244 | nouveau_accel_fini(drm); | |
245 | return; | |
246 | } | |
247 | ||
a01ca78c | 248 | ret = nvif_object_init(&drm->channel->user, NVDRM_NVSW, |
0ad72863 | 249 | nouveau_abi16_swclass(drm), NULL, 0, &drm->nvsw); |
69a6146d | 250 | if (ret == 0) { |
69a6146d BS |
251 | ret = RING_SPACE(drm->channel, 2); |
252 | if (ret == 0) { | |
967e7bde | 253 | if (device->info.family < NV_DEVICE_INFO_V0_FERMI) { |
69a6146d BS |
254 | BEGIN_NV04(drm->channel, NvSubSw, 0, 1); |
255 | OUT_RING (drm->channel, NVDRM_NVSW); | |
256 | } else | |
967e7bde | 257 | if (device->info.family < NV_DEVICE_INFO_V0_KEPLER) { |
69a6146d BS |
258 | BEGIN_NVC0(drm->channel, FermiSw, 0, 1); |
259 | OUT_RING (drm->channel, 0x001f0000); | |
260 | } | |
261 | } | |
898a2b32 BS |
262 | |
263 | ret = nvif_notify_init(&drm->nvsw, nouveau_flip_complete, | |
538b269b BS |
264 | false, NV04_NVSW_NTFY_UEVENT, |
265 | NULL, 0, 0, &drm->flip); | |
898a2b32 BS |
266 | if (ret == 0) |
267 | ret = nvif_notify_get(&drm->flip); | |
268 | if (ret) { | |
269 | nouveau_accel_fini(drm); | |
270 | return; | |
271 | } | |
69a6146d BS |
272 | } |
273 | ||
274 | if (ret) { | |
275 | NV_ERROR(drm, "failed to allocate software object, %d\n", ret); | |
276 | nouveau_accel_fini(drm); | |
277 | return; | |
278 | } | |
279 | ||
967e7bde | 280 | if (device->info.family < NV_DEVICE_INFO_V0_FERMI) { |
f027f491 BS |
281 | ret = nvkm_gpuobj_new(nvxx_device(&drm->device), 32, 0, false, |
282 | NULL, &drm->notify); | |
ebb945a9 BS |
283 | if (ret) { |
284 | NV_ERROR(drm, "failed to allocate notifier, %d\n", ret); | |
285 | nouveau_accel_fini(drm); | |
286 | return; | |
287 | } | |
288 | ||
a01ca78c | 289 | ret = nvif_object_init(&drm->channel->user, NvNotify0, |
4acfd707 BS |
290 | NV_DMA_IN_MEMORY, |
291 | &(struct nv_dma_v0) { | |
292 | .target = NV_DMA_V0_TARGET_VRAM, | |
293 | .access = NV_DMA_V0_ACCESS_RDWR, | |
ebb945a9 BS |
294 | .start = drm->notify->addr, |
295 | .limit = drm->notify->addr + 31 | |
4acfd707 | 296 | }, sizeof(struct nv_dma_v0), |
0ad72863 | 297 | &drm->ntfy); |
ebb945a9 BS |
298 | if (ret) { |
299 | nouveau_accel_fini(drm); | |
300 | return; | |
301 | } | |
302 | } | |
303 | ||
304 | ||
49981046 | 305 | nouveau_bo_move_init(drm); |
ebb945a9 BS |
306 | } |
307 | ||
56550d94 GKH |
308 | static int nouveau_drm_probe(struct pci_dev *pdev, |
309 | const struct pci_device_id *pent) | |
94580299 | 310 | { |
be83cd4e | 311 | struct nvkm_device *device; |
ebb945a9 BS |
312 | struct apertures_struct *aper; |
313 | bool boot = false; | |
94580299 BS |
314 | int ret; |
315 | ||
ebb945a9 BS |
316 | /* remove conflicting drivers (vesafb, efifb etc) */ |
317 | aper = alloc_apertures(3); | |
318 | if (!aper) | |
319 | return -ENOMEM; | |
320 | ||
321 | aper->ranges[0].base = pci_resource_start(pdev, 1); | |
322 | aper->ranges[0].size = pci_resource_len(pdev, 1); | |
323 | aper->count = 1; | |
324 | ||
325 | if (pci_resource_len(pdev, 2)) { | |
326 | aper->ranges[aper->count].base = pci_resource_start(pdev, 2); | |
327 | aper->ranges[aper->count].size = pci_resource_len(pdev, 2); | |
328 | aper->count++; | |
329 | } | |
330 | ||
331 | if (pci_resource_len(pdev, 3)) { | |
332 | aper->ranges[aper->count].base = pci_resource_start(pdev, 3); | |
333 | aper->ranges[aper->count].size = pci_resource_len(pdev, 3); | |
334 | aper->count++; | |
335 | } | |
336 | ||
337 | #ifdef CONFIG_X86 | |
338 | boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; | |
339 | #endif | |
771fa0e4 BS |
340 | if (nouveau_modeset != 2) |
341 | remove_conflicting_framebuffers(aper, "nouveaufb", boot); | |
83ef7777 | 342 | kfree(aper); |
ebb945a9 | 343 | |
7974dd1b BS |
344 | ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug, |
345 | true, true, ~0ULL, &device); | |
94580299 BS |
346 | if (ret) |
347 | return ret; | |
348 | ||
349 | pci_set_master(pdev); | |
350 | ||
915b4d11 | 351 | ret = drm_get_pci_dev(pdev, pent, &driver_pci); |
94580299 | 352 | if (ret) { |
e781dc8f | 353 | nvkm_device_del(&device); |
94580299 BS |
354 | return ret; |
355 | } | |
356 | ||
357 | return 0; | |
358 | } | |
359 | ||
5addcf0a DA |
360 | #define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403 |
361 | ||
362 | static void | |
46941b0f | 363 | nouveau_get_hdmi_dev(struct nouveau_drm *drm) |
5addcf0a | 364 | { |
46941b0f | 365 | struct pci_dev *pdev = drm->dev->pdev; |
5addcf0a | 366 | |
420b9469 | 367 | if (!pdev) { |
40189b0c | 368 | DRM_INFO("not a PCI device; no HDMI\n"); |
420b9469 AC |
369 | drm->hdmi_device = NULL; |
370 | return; | |
371 | } | |
372 | ||
5addcf0a DA |
373 | /* subfunction one is a hdmi audio device? */ |
374 | drm->hdmi_device = pci_get_bus_and_slot((unsigned int)pdev->bus->number, | |
375 | PCI_DEVFN(PCI_SLOT(pdev->devfn), 1)); | |
376 | ||
377 | if (!drm->hdmi_device) { | |
46941b0f | 378 | NV_DEBUG(drm, "hdmi device not found %d %d %d\n", pdev->bus->number, PCI_SLOT(pdev->devfn), 1); |
5addcf0a DA |
379 | return; |
380 | } | |
381 | ||
382 | if ((drm->hdmi_device->class >> 8) != PCI_CLASS_MULTIMEDIA_HD_AUDIO) { | |
46941b0f | 383 | NV_DEBUG(drm, "possible hdmi device not audio %d\n", drm->hdmi_device->class); |
5addcf0a DA |
384 | pci_dev_put(drm->hdmi_device); |
385 | drm->hdmi_device = NULL; | |
386 | return; | |
387 | } | |
388 | } | |
389 | ||
5b8a43ae | 390 | static int |
94580299 BS |
391 | nouveau_drm_load(struct drm_device *dev, unsigned long flags) |
392 | { | |
94580299 BS |
393 | struct nouveau_drm *drm; |
394 | int ret; | |
395 | ||
9ad97ede | 396 | ret = nouveau_cli_create(dev, "DRM", sizeof(*drm), (void **)&drm); |
94580299 BS |
397 | if (ret) |
398 | return ret; | |
399 | ||
77145f1c BS |
400 | dev->dev_private = drm; |
401 | drm->dev = dev; | |
989aa5b7 | 402 | nvxx_client(&drm->client.base)->debug = |
be83cd4e | 403 | nvkm_dbgopt(nouveau_debug, "DRM"); |
77145f1c | 404 | |
94580299 | 405 | INIT_LIST_HEAD(&drm->clients); |
ebb945a9 | 406 | spin_lock_init(&drm->tile.lock); |
94580299 | 407 | |
46941b0f | 408 | nouveau_get_hdmi_dev(drm); |
5addcf0a | 409 | |
fcf3f91c | 410 | ret = nvif_device_init(&drm->client.base.object, 0, NV_DEVICE, |
586491e6 | 411 | &(struct nv_device_v0) { |
94580299 | 412 | .device = ~0, |
586491e6 | 413 | }, sizeof(struct nv_device_v0), |
0ad72863 | 414 | &drm->device); |
94580299 BS |
415 | if (ret) |
416 | goto fail_device; | |
417 | ||
7d3428cd IM |
418 | dev->irq_enabled = true; |
419 | ||
77145f1c BS |
420 | /* workaround an odd issue on nvc1 by disabling the device's |
421 | * nosnoop capability. hopefully won't cause issues until a | |
422 | * better fix is found - assuming there is one... | |
423 | */ | |
967e7bde | 424 | if (drm->device.info.chipset == 0xc1) |
a01ca78c | 425 | nvif_mask(&drm->device.object, 0x00088080, 0x00000800, 0x00000000); |
ebb945a9 | 426 | |
77145f1c | 427 | nouveau_vga_init(drm); |
cb75d97e | 428 | |
967e7bde | 429 | if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) { |
be83cd4e | 430 | ret = nvkm_vm_new(nvxx_device(&drm->device), 0, (1ULL << 40), |
1de68568 | 431 | 0x1000, NULL, &drm->client.vm); |
ebb945a9 BS |
432 | if (ret) |
433 | goto fail_device; | |
3ee6f5b5 | 434 | |
989aa5b7 | 435 | nvxx_client(&drm->client.base)->vm = drm->client.vm; |
ebb945a9 BS |
436 | } |
437 | ||
438 | ret = nouveau_ttm_init(drm); | |
94580299 | 439 | if (ret) |
77145f1c BS |
440 | goto fail_ttm; |
441 | ||
442 | ret = nouveau_bios_init(dev); | |
443 | if (ret) | |
444 | goto fail_bios; | |
445 | ||
77145f1c | 446 | ret = nouveau_display_create(dev); |
ebb945a9 | 447 | if (ret) |
77145f1c BS |
448 | goto fail_dispctor; |
449 | ||
450 | if (dev->mode_config.num_crtc) { | |
451 | ret = nouveau_display_init(dev); | |
452 | if (ret) | |
453 | goto fail_dispinit; | |
454 | } | |
455 | ||
26fdd78c | 456 | nouveau_sysfs_init(dev); |
b9ed919f | 457 | nouveau_hwmon_init(dev); |
ebb945a9 BS |
458 | nouveau_accel_init(drm); |
459 | nouveau_fbcon_init(dev); | |
5addcf0a DA |
460 | |
461 | if (nouveau_runtime_pm != 0) { | |
462 | pm_runtime_use_autosuspend(dev->dev); | |
463 | pm_runtime_set_autosuspend_delay(dev->dev, 5000); | |
464 | pm_runtime_set_active(dev->dev); | |
465 | pm_runtime_allow(dev->dev); | |
466 | pm_runtime_mark_last_busy(dev->dev); | |
467 | pm_runtime_put(dev->dev); | |
468 | } | |
94580299 BS |
469 | return 0; |
470 | ||
77145f1c BS |
471 | fail_dispinit: |
472 | nouveau_display_destroy(dev); | |
473 | fail_dispctor: | |
77145f1c BS |
474 | nouveau_bios_takedown(dev); |
475 | fail_bios: | |
ebb945a9 | 476 | nouveau_ttm_fini(drm); |
77145f1c | 477 | fail_ttm: |
77145f1c | 478 | nouveau_vga_fini(drm); |
94580299 | 479 | fail_device: |
0ad72863 | 480 | nvif_device_fini(&drm->device); |
94580299 BS |
481 | nouveau_cli_destroy(&drm->client); |
482 | return ret; | |
483 | } | |
484 | ||
5b8a43ae | 485 | static int |
94580299 BS |
486 | nouveau_drm_unload(struct drm_device *dev) |
487 | { | |
77145f1c | 488 | struct nouveau_drm *drm = nouveau_drm(dev); |
94580299 | 489 | |
5addcf0a | 490 | pm_runtime_get_sync(dev->dev); |
ebb945a9 BS |
491 | nouveau_fbcon_fini(dev); |
492 | nouveau_accel_fini(drm); | |
b9ed919f | 493 | nouveau_hwmon_fini(dev); |
26fdd78c | 494 | nouveau_sysfs_fini(dev); |
77145f1c | 495 | |
9430738d BS |
496 | if (dev->mode_config.num_crtc) |
497 | nouveau_display_fini(dev); | |
77145f1c BS |
498 | nouveau_display_destroy(dev); |
499 | ||
77145f1c | 500 | nouveau_bios_takedown(dev); |
94580299 | 501 | |
ebb945a9 | 502 | nouveau_ttm_fini(drm); |
77145f1c | 503 | nouveau_vga_fini(drm); |
cb75d97e | 504 | |
0ad72863 | 505 | nvif_device_fini(&drm->device); |
5addcf0a DA |
506 | if (drm->hdmi_device) |
507 | pci_dev_put(drm->hdmi_device); | |
94580299 BS |
508 | nouveau_cli_destroy(&drm->client); |
509 | return 0; | |
510 | } | |
511 | ||
8ba9ff11 AC |
512 | void |
513 | nouveau_drm_device_remove(struct drm_device *dev) | |
94580299 | 514 | { |
77145f1c | 515 | struct nouveau_drm *drm = nouveau_drm(dev); |
be83cd4e | 516 | struct nvkm_client *client; |
76ecea5b | 517 | struct nvkm_device *device; |
77145f1c | 518 | |
7d3428cd | 519 | dev->irq_enabled = false; |
989aa5b7 | 520 | client = nvxx_client(&drm->client.base); |
4e7e62d6 | 521 | device = nvkm_device_find(client->device); |
77145f1c BS |
522 | drm_put_dev(dev); |
523 | ||
e781dc8f | 524 | nvkm_device_del(&device); |
94580299 | 525 | } |
8ba9ff11 AC |
526 | |
527 | static void | |
528 | nouveau_drm_remove(struct pci_dev *pdev) | |
529 | { | |
530 | struct drm_device *dev = pci_get_drvdata(pdev); | |
531 | ||
532 | nouveau_drm_device_remove(dev); | |
533 | } | |
94580299 | 534 | |
cd897837 | 535 | static int |
05c63c2f | 536 | nouveau_do_suspend(struct drm_device *dev, bool runtime) |
94580299 | 537 | { |
77145f1c | 538 | struct nouveau_drm *drm = nouveau_drm(dev); |
94580299 BS |
539 | struct nouveau_cli *cli; |
540 | int ret; | |
541 | ||
6fbb702e BS |
542 | if (dev->mode_config.num_crtc) { |
543 | NV_INFO(drm, "suspending console...\n"); | |
544 | nouveau_fbcon_set_suspend(dev, 1); | |
c52f4fa6 | 545 | NV_INFO(drm, "suspending display...\n"); |
6fbb702e | 546 | ret = nouveau_display_suspend(dev, runtime); |
9430738d BS |
547 | if (ret) |
548 | return ret; | |
549 | } | |
94580299 | 550 | |
c52f4fa6 | 551 | NV_INFO(drm, "evicting buffers...\n"); |
ebb945a9 BS |
552 | ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM); |
553 | ||
c52f4fa6 | 554 | NV_INFO(drm, "waiting for kernel channels to go idle...\n"); |
81dff21b BS |
555 | if (drm->cechan) { |
556 | ret = nouveau_channel_idle(drm->cechan); | |
557 | if (ret) | |
f3980dc5 | 558 | goto fail_display; |
81dff21b BS |
559 | } |
560 | ||
561 | if (drm->channel) { | |
562 | ret = nouveau_channel_idle(drm->channel); | |
563 | if (ret) | |
f3980dc5 | 564 | goto fail_display; |
81dff21b BS |
565 | } |
566 | ||
c52f4fa6 | 567 | NV_INFO(drm, "suspending client object trees...\n"); |
ebb945a9 | 568 | if (drm->fence && nouveau_fence(drm)->suspend) { |
f3980dc5 IM |
569 | if (!nouveau_fence(drm)->suspend(drm)) { |
570 | ret = -ENOMEM; | |
571 | goto fail_display; | |
572 | } | |
ebb945a9 BS |
573 | } |
574 | ||
94580299 | 575 | list_for_each_entry(cli, &drm->clients, head) { |
0ad72863 | 576 | ret = nvif_client_suspend(&cli->base); |
94580299 BS |
577 | if (ret) |
578 | goto fail_client; | |
579 | } | |
580 | ||
c52f4fa6 | 581 | NV_INFO(drm, "suspending kernel object tree...\n"); |
0ad72863 | 582 | ret = nvif_client_suspend(&drm->client.base); |
94580299 BS |
583 | if (ret) |
584 | goto fail_client; | |
585 | ||
94580299 BS |
586 | return 0; |
587 | ||
588 | fail_client: | |
589 | list_for_each_entry_continue_reverse(cli, &drm->clients, head) { | |
0ad72863 | 590 | nvif_client_resume(&cli->base); |
94580299 BS |
591 | } |
592 | ||
f3980dc5 IM |
593 | if (drm->fence && nouveau_fence(drm)->resume) |
594 | nouveau_fence(drm)->resume(drm); | |
595 | ||
596 | fail_display: | |
9430738d | 597 | if (dev->mode_config.num_crtc) { |
c52f4fa6 | 598 | NV_INFO(drm, "resuming display...\n"); |
6fbb702e | 599 | nouveau_display_resume(dev, runtime); |
9430738d | 600 | } |
94580299 BS |
601 | return ret; |
602 | } | |
603 | ||
cd897837 | 604 | static int |
6fbb702e | 605 | nouveau_do_resume(struct drm_device *dev, bool runtime) |
2d8b9ccb DA |
606 | { |
607 | struct nouveau_drm *drm = nouveau_drm(dev); | |
608 | struct nouveau_cli *cli; | |
609 | ||
c52f4fa6 | 610 | NV_INFO(drm, "resuming kernel object tree...\n"); |
0ad72863 | 611 | nvif_client_resume(&drm->client.base); |
94580299 | 612 | |
c52f4fa6 | 613 | NV_INFO(drm, "resuming client object trees...\n"); |
81dff21b BS |
614 | if (drm->fence && nouveau_fence(drm)->resume) |
615 | nouveau_fence(drm)->resume(drm); | |
616 | ||
94580299 | 617 | list_for_each_entry(cli, &drm->clients, head) { |
0ad72863 | 618 | nvif_client_resume(&cli->base); |
94580299 | 619 | } |
cb75d97e | 620 | |
77145f1c | 621 | nouveau_run_vbios_init(dev); |
77145f1c | 622 | |
9430738d | 623 | if (dev->mode_config.num_crtc) { |
c52f4fa6 | 624 | NV_INFO(drm, "resuming display...\n"); |
6fbb702e BS |
625 | nouveau_display_resume(dev, runtime); |
626 | NV_INFO(drm, "resuming console...\n"); | |
627 | nouveau_fbcon_set_suspend(dev, 0); | |
9430738d | 628 | } |
5addcf0a | 629 | |
77145f1c | 630 | return 0; |
94580299 BS |
631 | } |
632 | ||
7bb6d442 BS |
633 | int |
634 | nouveau_pmops_suspend(struct device *dev) | |
635 | { | |
636 | struct pci_dev *pdev = to_pci_dev(dev); | |
637 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
638 | int ret; | |
639 | ||
640 | if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || | |
641 | drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) | |
642 | return 0; | |
643 | ||
644 | ret = nouveau_do_suspend(drm_dev, false); | |
645 | if (ret) | |
646 | return ret; | |
647 | ||
648 | pci_save_state(pdev); | |
649 | pci_disable_device(pdev); | |
7bb6d442 | 650 | pci_set_power_state(pdev, PCI_D3hot); |
c5fd936e | 651 | udelay(200); |
7bb6d442 BS |
652 | return 0; |
653 | } | |
654 | ||
655 | int | |
656 | nouveau_pmops_resume(struct device *dev) | |
2d8b9ccb DA |
657 | { |
658 | struct pci_dev *pdev = to_pci_dev(dev); | |
659 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
660 | int ret; | |
661 | ||
5addcf0a DA |
662 | if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || |
663 | drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) | |
2d8b9ccb DA |
664 | return 0; |
665 | ||
666 | pci_set_power_state(pdev, PCI_D0); | |
667 | pci_restore_state(pdev); | |
668 | ret = pci_enable_device(pdev); | |
669 | if (ret) | |
670 | return ret; | |
671 | pci_set_master(pdev); | |
672 | ||
6fbb702e | 673 | return nouveau_do_resume(drm_dev, false); |
2d8b9ccb DA |
674 | } |
675 | ||
7bb6d442 BS |
676 | static int |
677 | nouveau_pmops_freeze(struct device *dev) | |
2d8b9ccb DA |
678 | { |
679 | struct pci_dev *pdev = to_pci_dev(dev); | |
680 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
6fbb702e | 681 | return nouveau_do_suspend(drm_dev, false); |
2d8b9ccb DA |
682 | } |
683 | ||
7bb6d442 BS |
684 | static int |
685 | nouveau_pmops_thaw(struct device *dev) | |
2d8b9ccb DA |
686 | { |
687 | struct pci_dev *pdev = to_pci_dev(dev); | |
688 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
6fbb702e | 689 | return nouveau_do_resume(drm_dev, false); |
2d8b9ccb DA |
690 | } |
691 | ||
7bb6d442 BS |
692 | static int |
693 | nouveau_pmops_runtime_suspend(struct device *dev) | |
694 | { | |
695 | struct pci_dev *pdev = to_pci_dev(dev); | |
696 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
697 | int ret; | |
698 | ||
699 | if (nouveau_runtime_pm == 0) { | |
700 | pm_runtime_forbid(dev); | |
701 | return -EBUSY; | |
702 | } | |
703 | ||
704 | /* are we optimus enabled? */ | |
705 | if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) { | |
706 | DRM_DEBUG_DRIVER("failing to power off - not optimus\n"); | |
707 | pm_runtime_forbid(dev); | |
708 | return -EBUSY; | |
709 | } | |
710 | ||
7bb6d442 BS |
711 | drm_kms_helper_poll_disable(drm_dev); |
712 | vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF); | |
713 | nouveau_switcheroo_optimus_dsm(); | |
714 | ret = nouveau_do_suspend(drm_dev, true); | |
715 | pci_save_state(pdev); | |
716 | pci_disable_device(pdev); | |
8c863944 | 717 | pci_ignore_hotplug(pdev); |
7bb6d442 BS |
718 | pci_set_power_state(pdev, PCI_D3cold); |
719 | drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF; | |
720 | return ret; | |
721 | } | |
722 | ||
723 | static int | |
724 | nouveau_pmops_runtime_resume(struct device *dev) | |
725 | { | |
726 | struct pci_dev *pdev = to_pci_dev(dev); | |
727 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
728 | struct nvif_device *device = &nouveau_drm(drm_dev)->device; | |
729 | int ret; | |
730 | ||
731 | if (nouveau_runtime_pm == 0) | |
732 | return -EINVAL; | |
733 | ||
734 | pci_set_power_state(pdev, PCI_D0); | |
735 | pci_restore_state(pdev); | |
736 | ret = pci_enable_device(pdev); | |
737 | if (ret) | |
738 | return ret; | |
739 | pci_set_master(pdev); | |
740 | ||
741 | ret = nouveau_do_resume(drm_dev, true); | |
742 | drm_kms_helper_poll_enable(drm_dev); | |
743 | /* do magic */ | |
a01ca78c | 744 | nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25)); |
7bb6d442 BS |
745 | vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON); |
746 | drm_dev->switch_power_state = DRM_SWITCH_POWER_ON; | |
7bb6d442 BS |
747 | return ret; |
748 | } | |
749 | ||
750 | static int | |
751 | nouveau_pmops_runtime_idle(struct device *dev) | |
752 | { | |
753 | struct pci_dev *pdev = to_pci_dev(dev); | |
754 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
755 | struct nouveau_drm *drm = nouveau_drm(drm_dev); | |
756 | struct drm_crtc *crtc; | |
757 | ||
758 | if (nouveau_runtime_pm == 0) { | |
759 | pm_runtime_forbid(dev); | |
760 | return -EBUSY; | |
761 | } | |
762 | ||
763 | /* are we optimus enabled? */ | |
764 | if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) { | |
765 | DRM_DEBUG_DRIVER("failing to power off - not optimus\n"); | |
766 | pm_runtime_forbid(dev); | |
767 | return -EBUSY; | |
768 | } | |
769 | ||
770 | /* if we have a hdmi audio device - make sure it has a driver loaded */ | |
771 | if (drm->hdmi_device) { | |
772 | if (!drm->hdmi_device->driver) { | |
773 | DRM_DEBUG_DRIVER("failing to power off - no HDMI audio driver loaded\n"); | |
774 | pm_runtime_mark_last_busy(dev); | |
775 | return -EBUSY; | |
776 | } | |
777 | } | |
778 | ||
779 | list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) { | |
780 | if (crtc->enabled) { | |
781 | DRM_DEBUG_DRIVER("failing to power off - crtc active\n"); | |
782 | return -EBUSY; | |
783 | } | |
784 | } | |
785 | pm_runtime_mark_last_busy(dev); | |
786 | pm_runtime_autosuspend(dev); | |
787 | /* we don't want the main rpm_idle to call suspend - we want to autosuspend */ | |
788 | return 1; | |
789 | } | |
2d8b9ccb | 790 | |
5b8a43ae | 791 | static int |
ebb945a9 BS |
792 | nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv) |
793 | { | |
ebb945a9 BS |
794 | struct nouveau_drm *drm = nouveau_drm(dev); |
795 | struct nouveau_cli *cli; | |
a2896ced | 796 | char name[32], tmpname[TASK_COMM_LEN]; |
ebb945a9 BS |
797 | int ret; |
798 | ||
5addcf0a DA |
799 | /* need to bring up power immediately if opening device */ |
800 | ret = pm_runtime_get_sync(dev->dev); | |
b6c4285a | 801 | if (ret < 0 && ret != -EACCES) |
5addcf0a DA |
802 | return ret; |
803 | ||
a2896ced MS |
804 | get_task_comm(tmpname, current); |
805 | snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid)); | |
fa6df8c1 | 806 | |
9ad97ede | 807 | ret = nouveau_cli_create(dev, name, sizeof(*cli), (void **)&cli); |
420b9469 | 808 | |
ebb945a9 | 809 | if (ret) |
5addcf0a | 810 | goto out_suspend; |
ebb945a9 | 811 | |
0ad72863 BS |
812 | cli->base.super = false; |
813 | ||
967e7bde | 814 | if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) { |
be83cd4e | 815 | ret = nvkm_vm_new(nvxx_device(&drm->device), 0, (1ULL << 40), |
1de68568 | 816 | 0x1000, NULL, &cli->vm); |
ebb945a9 BS |
817 | if (ret) { |
818 | nouveau_cli_destroy(cli); | |
5addcf0a | 819 | goto out_suspend; |
ebb945a9 | 820 | } |
3ee6f5b5 | 821 | |
989aa5b7 | 822 | nvxx_client(&cli->base)->vm = cli->vm; |
ebb945a9 BS |
823 | } |
824 | ||
825 | fpriv->driver_priv = cli; | |
826 | ||
827 | mutex_lock(&drm->client.mutex); | |
828 | list_add(&cli->head, &drm->clients); | |
829 | mutex_unlock(&drm->client.mutex); | |
5addcf0a DA |
830 | |
831 | out_suspend: | |
832 | pm_runtime_mark_last_busy(dev->dev); | |
833 | pm_runtime_put_autosuspend(dev->dev); | |
834 | ||
835 | return ret; | |
ebb945a9 BS |
836 | } |
837 | ||
5b8a43ae | 838 | static void |
ebb945a9 BS |
839 | nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv) |
840 | { | |
841 | struct nouveau_cli *cli = nouveau_cli(fpriv); | |
842 | struct nouveau_drm *drm = nouveau_drm(dev); | |
843 | ||
5addcf0a DA |
844 | pm_runtime_get_sync(dev->dev); |
845 | ||
ac8c7930 | 846 | mutex_lock(&cli->mutex); |
ebb945a9 BS |
847 | if (cli->abi16) |
848 | nouveau_abi16_fini(cli->abi16); | |
ac8c7930 | 849 | mutex_unlock(&cli->mutex); |
ebb945a9 BS |
850 | |
851 | mutex_lock(&drm->client.mutex); | |
852 | list_del(&cli->head); | |
853 | mutex_unlock(&drm->client.mutex); | |
5addcf0a | 854 | |
ebb945a9 BS |
855 | } |
856 | ||
5b8a43ae | 857 | static void |
ebb945a9 BS |
858 | nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv) |
859 | { | |
860 | struct nouveau_cli *cli = nouveau_cli(fpriv); | |
861 | nouveau_cli_destroy(cli); | |
5addcf0a DA |
862 | pm_runtime_mark_last_busy(dev->dev); |
863 | pm_runtime_put_autosuspend(dev->dev); | |
ebb945a9 BS |
864 | } |
865 | ||
baa70943 | 866 | static const struct drm_ioctl_desc |
77145f1c | 867 | nouveau_ioctls[] = { |
f8c47144 DV |
868 | DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_AUTH|DRM_RENDER_ALLOW), |
869 | DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), | |
870 | DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_AUTH|DRM_RENDER_ALLOW), | |
871 | DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_AUTH|DRM_RENDER_ALLOW), | |
872 | DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW), | |
873 | DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW), | |
874 | DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_AUTH|DRM_RENDER_ALLOW), | |
875 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_AUTH|DRM_RENDER_ALLOW), | |
876 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_AUTH|DRM_RENDER_ALLOW), | |
877 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW), | |
878 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW), | |
879 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_AUTH|DRM_RENDER_ALLOW), | |
77145f1c BS |
880 | }; |
881 | ||
27111a23 BS |
882 | long |
883 | nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | |
5addcf0a | 884 | { |
27111a23 BS |
885 | struct drm_file *filp = file->private_data; |
886 | struct drm_device *dev = filp->minor->dev; | |
5addcf0a | 887 | long ret; |
5addcf0a DA |
888 | |
889 | ret = pm_runtime_get_sync(dev->dev); | |
b6c4285a | 890 | if (ret < 0 && ret != -EACCES) |
5addcf0a DA |
891 | return ret; |
892 | ||
27111a23 BS |
893 | switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) { |
894 | case DRM_NOUVEAU_NVIF: | |
895 | ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd)); | |
896 | break; | |
897 | default: | |
898 | ret = drm_ioctl(file, cmd, arg); | |
899 | break; | |
900 | } | |
5addcf0a DA |
901 | |
902 | pm_runtime_mark_last_busy(dev->dev); | |
903 | pm_runtime_put_autosuspend(dev->dev); | |
904 | return ret; | |
905 | } | |
27111a23 | 906 | |
77145f1c BS |
907 | static const struct file_operations |
908 | nouveau_driver_fops = { | |
909 | .owner = THIS_MODULE, | |
910 | .open = drm_open, | |
911 | .release = drm_release, | |
5addcf0a | 912 | .unlocked_ioctl = nouveau_drm_ioctl, |
77145f1c BS |
913 | .mmap = nouveau_ttm_mmap, |
914 | .poll = drm_poll, | |
77145f1c BS |
915 | .read = drm_read, |
916 | #if defined(CONFIG_COMPAT) | |
917 | .compat_ioctl = nouveau_compat_ioctl, | |
918 | #endif | |
919 | .llseek = noop_llseek, | |
920 | }; | |
921 | ||
922 | static struct drm_driver | |
915b4d11 | 923 | driver_stub = { |
77145f1c | 924 | .driver_features = |
0e975980 PA |
925 | DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER | |
926 | DRIVER_KMS_LEGACY_CONTEXT, | |
77145f1c BS |
927 | |
928 | .load = nouveau_drm_load, | |
929 | .unload = nouveau_drm_unload, | |
930 | .open = nouveau_drm_open, | |
931 | .preclose = nouveau_drm_preclose, | |
932 | .postclose = nouveau_drm_postclose, | |
933 | .lastclose = nouveau_vga_lastclose, | |
934 | ||
33b903e8 | 935 | #if defined(CONFIG_DEBUG_FS) |
56c101af KH |
936 | .debugfs_init = nouveau_drm_debugfs_init, |
937 | .debugfs_cleanup = nouveau_drm_debugfs_cleanup, | |
33b903e8 MS |
938 | #endif |
939 | ||
b44f8408 | 940 | .get_vblank_counter = drm_vblank_no_hw_counter, |
51cb4b39 BS |
941 | .enable_vblank = nouveau_display_vblank_enable, |
942 | .disable_vblank = nouveau_display_vblank_disable, | |
d83ef853 BS |
943 | .get_scanout_position = nouveau_display_scanoutpos, |
944 | .get_vblank_timestamp = nouveau_display_vblstamp, | |
77145f1c BS |
945 | |
946 | .ioctls = nouveau_ioctls, | |
baa70943 | 947 | .num_ioctls = ARRAY_SIZE(nouveau_ioctls), |
77145f1c BS |
948 | .fops = &nouveau_driver_fops, |
949 | ||
950 | .prime_handle_to_fd = drm_gem_prime_handle_to_fd, | |
951 | .prime_fd_to_handle = drm_gem_prime_fd_to_handle, | |
ab9ccb96 AP |
952 | .gem_prime_export = drm_gem_prime_export, |
953 | .gem_prime_import = drm_gem_prime_import, | |
954 | .gem_prime_pin = nouveau_gem_prime_pin, | |
3aac4502 | 955 | .gem_prime_res_obj = nouveau_gem_prime_res_obj, |
1af7c7dd | 956 | .gem_prime_unpin = nouveau_gem_prime_unpin, |
ab9ccb96 AP |
957 | .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table, |
958 | .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table, | |
959 | .gem_prime_vmap = nouveau_gem_prime_vmap, | |
960 | .gem_prime_vunmap = nouveau_gem_prime_vunmap, | |
77145f1c | 961 | |
77145f1c BS |
962 | .gem_free_object = nouveau_gem_object_del, |
963 | .gem_open_object = nouveau_gem_object_open, | |
964 | .gem_close_object = nouveau_gem_object_close, | |
965 | ||
966 | .dumb_create = nouveau_display_dumb_create, | |
967 | .dumb_map_offset = nouveau_display_dumb_map_offset, | |
43387b37 | 968 | .dumb_destroy = drm_gem_dumb_destroy, |
77145f1c BS |
969 | |
970 | .name = DRIVER_NAME, | |
971 | .desc = DRIVER_DESC, | |
972 | #ifdef GIT_REVISION | |
973 | .date = GIT_REVISION, | |
974 | #else | |
975 | .date = DRIVER_DATE, | |
976 | #endif | |
977 | .major = DRIVER_MAJOR, | |
978 | .minor = DRIVER_MINOR, | |
979 | .patchlevel = DRIVER_PATCHLEVEL, | |
980 | }; | |
981 | ||
94580299 BS |
982 | static struct pci_device_id |
983 | nouveau_drm_pci_table[] = { | |
984 | { | |
985 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID), | |
986 | .class = PCI_BASE_CLASS_DISPLAY << 16, | |
987 | .class_mask = 0xff << 16, | |
988 | }, | |
989 | { | |
990 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID), | |
991 | .class = PCI_BASE_CLASS_DISPLAY << 16, | |
992 | .class_mask = 0xff << 16, | |
993 | }, | |
994 | {} | |
995 | }; | |
996 | ||
703fa264 PM |
997 | static void nouveau_display_options(void) |
998 | { | |
999 | DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n"); | |
1000 | ||
1001 | DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable); | |
1002 | DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid); | |
1003 | DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink); | |
1004 | DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel); | |
1005 | DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config); | |
1006 | DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug); | |
1007 | DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel); | |
1008 | DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset); | |
1009 | DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm); | |
1010 | DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf); | |
1011 | DRM_DEBUG_DRIVER("... pstate : %d\n", nouveau_pstate); | |
1012 | } | |
1013 | ||
2d8b9ccb DA |
1014 | static const struct dev_pm_ops nouveau_pm_ops = { |
1015 | .suspend = nouveau_pmops_suspend, | |
1016 | .resume = nouveau_pmops_resume, | |
1017 | .freeze = nouveau_pmops_freeze, | |
1018 | .thaw = nouveau_pmops_thaw, | |
1019 | .poweroff = nouveau_pmops_freeze, | |
1020 | .restore = nouveau_pmops_resume, | |
5addcf0a DA |
1021 | .runtime_suspend = nouveau_pmops_runtime_suspend, |
1022 | .runtime_resume = nouveau_pmops_runtime_resume, | |
1023 | .runtime_idle = nouveau_pmops_runtime_idle, | |
2d8b9ccb DA |
1024 | }; |
1025 | ||
94580299 BS |
1026 | static struct pci_driver |
1027 | nouveau_drm_pci_driver = { | |
1028 | .name = "nouveau", | |
1029 | .id_table = nouveau_drm_pci_table, | |
1030 | .probe = nouveau_drm_probe, | |
1031 | .remove = nouveau_drm_remove, | |
2d8b9ccb | 1032 | .driver.pm = &nouveau_pm_ops, |
94580299 BS |
1033 | }; |
1034 | ||
8ba9ff11 | 1035 | struct drm_device * |
e396ecd1 AC |
1036 | nouveau_platform_device_create(const struct nvkm_device_tegra_func *func, |
1037 | struct platform_device *pdev, | |
47b2505e | 1038 | struct nvkm_device **pdevice) |
420b9469 | 1039 | { |
8ba9ff11 AC |
1040 | struct drm_device *drm; |
1041 | int err; | |
420b9469 | 1042 | |
e396ecd1 | 1043 | err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug, |
7974dd1b | 1044 | true, true, ~0ULL, pdevice); |
8ba9ff11 | 1045 | if (err) |
e781dc8f | 1046 | goto err_free; |
8ba9ff11 | 1047 | |
915b4d11 | 1048 | drm = drm_dev_alloc(&driver_platform, &pdev->dev); |
8ba9ff11 AC |
1049 | if (!drm) { |
1050 | err = -ENOMEM; | |
1051 | goto err_free; | |
420b9469 AC |
1052 | } |
1053 | ||
8ba9ff11 AC |
1054 | drm->platformdev = pdev; |
1055 | platform_set_drvdata(pdev, drm); | |
1056 | ||
1057 | return drm; | |
1058 | ||
1059 | err_free: | |
e781dc8f | 1060 | nvkm_device_del(pdevice); |
8ba9ff11 AC |
1061 | |
1062 | return ERR_PTR(err); | |
420b9469 AC |
1063 | } |
1064 | ||
94580299 BS |
1065 | static int __init |
1066 | nouveau_drm_init(void) | |
1067 | { | |
915b4d11 DH |
1068 | driver_pci = driver_stub; |
1069 | driver_pci.set_busid = drm_pci_set_busid; | |
1070 | driver_platform = driver_stub; | |
1071 | driver_platform.set_busid = drm_platform_set_busid; | |
1072 | ||
703fa264 PM |
1073 | nouveau_display_options(); |
1074 | ||
77145f1c BS |
1075 | if (nouveau_modeset == -1) { |
1076 | #ifdef CONFIG_VGA_CONSOLE | |
1077 | if (vgacon_text_force()) | |
1078 | nouveau_modeset = 0; | |
77145f1c | 1079 | #endif |
77145f1c BS |
1080 | } |
1081 | ||
1082 | if (!nouveau_modeset) | |
1083 | return 0; | |
1084 | ||
055a65d5 AC |
1085 | #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER |
1086 | platform_driver_register(&nouveau_platform_driver); | |
1087 | #endif | |
1088 | ||
77145f1c | 1089 | nouveau_register_dsm_handler(); |
915b4d11 | 1090 | return drm_pci_init(&driver_pci, &nouveau_drm_pci_driver); |
94580299 BS |
1091 | } |
1092 | ||
1093 | static void __exit | |
1094 | nouveau_drm_exit(void) | |
1095 | { | |
77145f1c BS |
1096 | if (!nouveau_modeset) |
1097 | return; | |
1098 | ||
915b4d11 | 1099 | drm_pci_exit(&driver_pci, &nouveau_drm_pci_driver); |
77145f1c | 1100 | nouveau_unregister_dsm_handler(); |
055a65d5 AC |
1101 | |
1102 | #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER | |
1103 | platform_driver_unregister(&nouveau_platform_driver); | |
1104 | #endif | |
94580299 BS |
1105 | } |
1106 | ||
1107 | module_init(nouveau_drm_init); | |
1108 | module_exit(nouveau_drm_exit); | |
1109 | ||
1110 | MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table); | |
77145f1c BS |
1111 | MODULE_AUTHOR(DRIVER_AUTHOR); |
1112 | MODULE_DESCRIPTION(DRIVER_DESC); | |
94580299 | 1113 | MODULE_LICENSE("GPL and additional rights"); |