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drm/nouveau: separate buffer object backing memory from nvkm structures
[mirror_ubuntu-bionic-kernel.git] / drivers / gpu / drm / nouveau / nouveau_drm.c
CommitLineData
94580299
BS
1/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
77145f1c 25#include <linux/console.h>
c5fd936e 26#include <linux/delay.h>
94580299
BS
27#include <linux/module.h>
28#include <linux/pci.h>
5addcf0a
DA
29#include <linux/pm_runtime.h>
30#include <linux/vga_switcheroo.h>
fdb751ef 31
ae95621b
MY
32#include <drm/drmP.h>
33#include <drm/drm_crtc_helper.h>
fdb751ef 34
ebb945a9 35#include <core/gpuobj.h>
c33e05a1 36#include <core/option.h>
7974dd1b
BS
37#include <core/pci.h>
38#include <core/tegra.h>
94580299 39
04b88677
BS
40#include <nvif/driver.h>
41
923bc416 42#include <nvif/class.h>
845f2725 43#include <nvif/cl0002.h>
8ed1730c 44#include <nvif/cla06f.h>
538b269b
BS
45#include <nvif/if0004.h>
46
4dc28134 47#include "nouveau_drv.h"
ebb945a9 48#include "nouveau_dma.h"
77145f1c
BS
49#include "nouveau_ttm.h"
50#include "nouveau_gem.h"
77145f1c 51#include "nouveau_vga.h"
8d021d71 52#include "nouveau_led.h"
b9ed919f 53#include "nouveau_hwmon.h"
77145f1c
BS
54#include "nouveau_acpi.h"
55#include "nouveau_bios.h"
56#include "nouveau_ioctl.h"
ebb945a9
BS
57#include "nouveau_abi16.h"
58#include "nouveau_fbcon.h"
59#include "nouveau_fence.h"
33b903e8 60#include "nouveau_debugfs.h"
27111a23 61#include "nouveau_usif.h"
703fa264 62#include "nouveau_connector.h"
055a65d5 63#include "nouveau_platform.h"
ebb945a9 64
94580299
BS
65MODULE_PARM_DESC(config, "option string to pass to driver core");
66static char *nouveau_config;
67module_param_named(config, nouveau_config, charp, 0400);
68
69MODULE_PARM_DESC(debug, "debug string to pass to driver core");
70static char *nouveau_debug;
71module_param_named(debug, nouveau_debug, charp, 0400);
72
ebb945a9
BS
73MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
74static int nouveau_noaccel = 0;
75module_param_named(noaccel, nouveau_noaccel, int, 0400);
76
9430738d
BS
77MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
78 "0 = disabled, 1 = enabled, 2 = headless)");
79int nouveau_modeset = -1;
77145f1c
BS
80module_param_named(modeset, nouveau_modeset, int, 0400);
81
5addcf0a 82MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
321f5c5f 83static int nouveau_runtime_pm = -1;
5addcf0a
DA
84module_param_named(runpm, nouveau_runtime_pm, int, 0400);
85
915b4d11
DH
86static struct drm_driver driver_stub;
87static struct drm_driver driver_pci;
88static struct drm_driver driver_platform;
77145f1c 89
94580299 90static u64
420b9469 91nouveau_pci_name(struct pci_dev *pdev)
94580299
BS
92{
93 u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
94 name |= pdev->bus->number << 16;
95 name |= PCI_SLOT(pdev->devfn) << 8;
96 return name | PCI_FUNC(pdev->devfn);
97}
98
420b9469
AC
99static u64
100nouveau_platform_name(struct platform_device *platformdev)
101{
102 return platformdev->id;
103}
104
105static u64
106nouveau_name(struct drm_device *dev)
107{
108 if (dev->pdev)
109 return nouveau_pci_name(dev->pdev);
110 else
76adb460 111 return nouveau_platform_name(to_platform_device(dev->dev));
420b9469
AC
112}
113
20d8a88e
BS
114static void
115nouveau_cli_fini(struct nouveau_cli *cli)
116{
117 nvkm_vm_ref(NULL, &nvxx_client(&cli->base)->vm, NULL);
118 usif_client_fini(cli);
1167c6bc 119 nvif_device_fini(&cli->device);
cb7e88e7 120 mutex_lock(&cli->drm->master.lock);
20d8a88e 121 nvif_client_fini(&cli->base);
cb7e88e7 122 mutex_unlock(&cli->drm->master.lock);
20d8a88e
BS
123}
124
94580299 125static int
20d8a88e
BS
126nouveau_cli_init(struct nouveau_drm *drm, const char *sname,
127 struct nouveau_cli *cli)
94580299 128{
20d8a88e 129 u64 device = nouveau_name(drm->dev);
9ad97ede 130 int ret;
9ad97ede 131
20d8a88e 132 snprintf(cli->name, sizeof(cli->name), "%s", sname);
e75c091b 133 cli->drm = drm;
20d8a88e
BS
134 mutex_init(&cli->mutex);
135 usif_client_init(cli);
136
cb7e88e7
BS
137 mutex_init(&cli->lock);
138
139 if (cli == &drm->master) {
80e60973
BS
140 ret = nvif_driver_init(NULL, nouveau_config, nouveau_debug,
141 cli->name, device, &cli->base);
142 } else {
cb7e88e7
BS
143 mutex_lock(&drm->master.lock);
144 ret = nvif_client_init(&drm->master.base, cli->name, device,
9ad97ede 145 &cli->base);
cb7e88e7 146 mutex_unlock(&drm->master.lock);
dd5700ea 147 }
20d8a88e
BS
148 if (ret) {
149 NV_ERROR(drm, "Client allocation failed: %d\n", ret);
150 goto done;
dd5700ea 151 }
94580299 152
1167c6bc
BS
153 ret = nvif_device_init(&cli->base.object, 0, NV_DEVICE,
154 &(struct nv_device_v0) {
155 .device = ~0,
156 }, sizeof(struct nv_device_v0),
157 &cli->device);
158 if (ret) {
159 NV_ERROR(drm, "Device allocation failed: %d\n", ret);
160 goto done;
161 }
162
20d8a88e
BS
163done:
164 if (ret)
165 nouveau_cli_fini(cli);
166 return ret;
94580299
BS
167}
168
ebb945a9
BS
169static void
170nouveau_accel_fini(struct nouveau_drm *drm)
171{
fbd58ebd 172 nouveau_channel_idle(drm->channel);
0ad72863 173 nvif_object_fini(&drm->ntfy);
f027f491 174 nvkm_gpuobj_del(&drm->notify);
fbd58ebd 175 nvif_notify_fini(&drm->flip);
0ad72863 176 nvif_object_fini(&drm->nvsw);
fbd58ebd
BS
177 nouveau_channel_del(&drm->channel);
178
179 nouveau_channel_idle(drm->cechan);
0ad72863 180 nvif_object_fini(&drm->ttm.copy);
fbd58ebd
BS
181 nouveau_channel_del(&drm->cechan);
182
ebb945a9
BS
183 if (drm->fence)
184 nouveau_fence(drm)->dtor(drm);
185}
186
187static void
188nouveau_accel_init(struct nouveau_drm *drm)
189{
1167c6bc 190 struct nvif_device *device = &drm->client.device;
41a63406 191 struct nvif_sclass *sclass;
49981046 192 u32 arg0, arg1;
41a63406 193 int ret, i, n;
ebb945a9 194
967e7bde 195 if (nouveau_noaccel)
ebb945a9
BS
196 return;
197
198 /* initialise synchronisation routines */
967e7bde
BS
199 /*XXX: this is crap, but the fence/channel stuff is a little
200 * backwards in some places. this will be fixed.
201 */
41a63406 202 ret = n = nvif_object_sclass_get(&device->object, &sclass);
967e7bde
BS
203 if (ret < 0)
204 return;
205
41a63406
BS
206 for (ret = -ENOSYS, i = 0; i < n; i++) {
207 switch (sclass[i].oclass) {
bbf8906b 208 case NV03_CHANNEL_DMA:
967e7bde
BS
209 ret = nv04_fence_create(drm);
210 break;
bbf8906b 211 case NV10_CHANNEL_DMA:
967e7bde
BS
212 ret = nv10_fence_create(drm);
213 break;
bbf8906b
BS
214 case NV17_CHANNEL_DMA:
215 case NV40_CHANNEL_DMA:
967e7bde
BS
216 ret = nv17_fence_create(drm);
217 break;
bbf8906b 218 case NV50_CHANNEL_GPFIFO:
967e7bde
BS
219 ret = nv50_fence_create(drm);
220 break;
bbf8906b 221 case G82_CHANNEL_GPFIFO:
967e7bde
BS
222 ret = nv84_fence_create(drm);
223 break;
bbf8906b
BS
224 case FERMI_CHANNEL_GPFIFO:
225 case KEPLER_CHANNEL_GPFIFO_A:
63f8c9b7 226 case KEPLER_CHANNEL_GPFIFO_B:
a1020afe 227 case MAXWELL_CHANNEL_GPFIFO_A:
e8ff9794 228 case PASCAL_CHANNEL_GPFIFO_A:
967e7bde
BS
229 ret = nvc0_fence_create(drm);
230 break;
231 default:
232 break;
233 }
234 }
235
41a63406 236 nvif_object_sclass_put(&sclass);
ebb945a9
BS
237 if (ret) {
238 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
239 nouveau_accel_fini(drm);
240 return;
241 }
242
967e7bde 243 if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
1167c6bc 244 ret = nouveau_channel_new(drm, &drm->client.device,
1f5ff7f5
BS
245 NVA06F_V0_ENGINE_CE0 |
246 NVA06F_V0_ENGINE_CE1,
bbf8906b 247 0, &drm->cechan);
49981046
BS
248 if (ret)
249 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
250
1f5ff7f5 251 arg0 = NVA06F_V0_ENGINE_GR;
49469800 252 arg1 = 1;
00fc6f6f 253 } else
967e7bde
BS
254 if (device->info.chipset >= 0xa3 &&
255 device->info.chipset != 0xaa &&
256 device->info.chipset != 0xac) {
1167c6bc 257 ret = nouveau_channel_new(drm, &drm->client.device,
0ad72863 258 NvDmaFB, NvDmaTT, &drm->cechan);
00fc6f6f
BS
259 if (ret)
260 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
261
262 arg0 = NvDmaFB;
263 arg1 = NvDmaTT;
49981046
BS
264 } else {
265 arg0 = NvDmaFB;
266 arg1 = NvDmaTT;
267 }
268
1167c6bc
BS
269 ret = nouveau_channel_new(drm, &drm->client.device,
270 arg0, arg1, &drm->channel);
ebb945a9
BS
271 if (ret) {
272 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
273 nouveau_accel_fini(drm);
274 return;
275 }
276
a01ca78c 277 ret = nvif_object_init(&drm->channel->user, NVDRM_NVSW,
0ad72863 278 nouveau_abi16_swclass(drm), NULL, 0, &drm->nvsw);
69a6146d 279 if (ret == 0) {
69a6146d
BS
280 ret = RING_SPACE(drm->channel, 2);
281 if (ret == 0) {
967e7bde 282 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
69a6146d
BS
283 BEGIN_NV04(drm->channel, NvSubSw, 0, 1);
284 OUT_RING (drm->channel, NVDRM_NVSW);
285 } else
967e7bde 286 if (device->info.family < NV_DEVICE_INFO_V0_KEPLER) {
69a6146d
BS
287 BEGIN_NVC0(drm->channel, FermiSw, 0, 1);
288 OUT_RING (drm->channel, 0x001f0000);
289 }
290 }
898a2b32
BS
291
292 ret = nvif_notify_init(&drm->nvsw, nouveau_flip_complete,
538b269b
BS
293 false, NV04_NVSW_NTFY_UEVENT,
294 NULL, 0, 0, &drm->flip);
898a2b32
BS
295 if (ret == 0)
296 ret = nvif_notify_get(&drm->flip);
297 if (ret) {
298 nouveau_accel_fini(drm);
299 return;
300 }
69a6146d
BS
301 }
302
303 if (ret) {
304 NV_ERROR(drm, "failed to allocate software object, %d\n", ret);
305 nouveau_accel_fini(drm);
306 return;
307 }
308
967e7bde 309 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
1167c6bc
BS
310 ret = nvkm_gpuobj_new(nvxx_device(&drm->client.device), 32, 0,
311 false, NULL, &drm->notify);
ebb945a9
BS
312 if (ret) {
313 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
314 nouveau_accel_fini(drm);
315 return;
316 }
317
a01ca78c 318 ret = nvif_object_init(&drm->channel->user, NvNotify0,
4acfd707
BS
319 NV_DMA_IN_MEMORY,
320 &(struct nv_dma_v0) {
321 .target = NV_DMA_V0_TARGET_VRAM,
322 .access = NV_DMA_V0_ACCESS_RDWR,
ebb945a9
BS
323 .start = drm->notify->addr,
324 .limit = drm->notify->addr + 31
4acfd707 325 }, sizeof(struct nv_dma_v0),
0ad72863 326 &drm->ntfy);
ebb945a9
BS
327 if (ret) {
328 nouveau_accel_fini(drm);
329 return;
330 }
331 }
332
333
49981046 334 nouveau_bo_move_init(drm);
ebb945a9
BS
335}
336
56550d94
GKH
337static int nouveau_drm_probe(struct pci_dev *pdev,
338 const struct pci_device_id *pent)
94580299 339{
be83cd4e 340 struct nvkm_device *device;
ebb945a9
BS
341 struct apertures_struct *aper;
342 bool boot = false;
94580299
BS
343 int ret;
344
b00e5334 345 if (vga_switcheroo_client_probe_defer(pdev))
98b3a340
LW
346 return -EPROBE_DEFER;
347
0e67bed2
BS
348 /* We need to check that the chipset is supported before booting
349 * fbdev off the hardware, as there's no way to put it back.
350 */
351 ret = nvkm_device_pci_new(pdev, NULL, "error", true, false, 0, &device);
352 if (ret)
353 return ret;
354
355 nvkm_device_del(&device);
356
357 /* Remove conflicting drivers (vesafb, efifb etc). */
ebb945a9
BS
358 aper = alloc_apertures(3);
359 if (!aper)
360 return -ENOMEM;
361
362 aper->ranges[0].base = pci_resource_start(pdev, 1);
363 aper->ranges[0].size = pci_resource_len(pdev, 1);
364 aper->count = 1;
365
366 if (pci_resource_len(pdev, 2)) {
367 aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
368 aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
369 aper->count++;
370 }
371
372 if (pci_resource_len(pdev, 3)) {
373 aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
374 aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
375 aper->count++;
376 }
377
378#ifdef CONFIG_X86
379 boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
380#endif
771fa0e4 381 if (nouveau_modeset != 2)
44adece5 382 drm_fb_helper_remove_conflicting_framebuffers(aper, "nouveaufb", boot);
83ef7777 383 kfree(aper);
ebb945a9 384
7974dd1b
BS
385 ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug,
386 true, true, ~0ULL, &device);
94580299
BS
387 if (ret)
388 return ret;
389
390 pci_set_master(pdev);
391
915b4d11 392 ret = drm_get_pci_dev(pdev, pent, &driver_pci);
94580299 393 if (ret) {
e781dc8f 394 nvkm_device_del(&device);
94580299
BS
395 return ret;
396 }
397
398 return 0;
399}
400
5addcf0a
DA
401#define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403
402
403static void
46941b0f 404nouveau_get_hdmi_dev(struct nouveau_drm *drm)
5addcf0a 405{
46941b0f 406 struct pci_dev *pdev = drm->dev->pdev;
5addcf0a 407
420b9469 408 if (!pdev) {
f2a0adad 409 NV_DEBUG(drm, "not a PCI device; no HDMI\n");
420b9469
AC
410 drm->hdmi_device = NULL;
411 return;
412 }
413
5addcf0a
DA
414 /* subfunction one is a hdmi audio device? */
415 drm->hdmi_device = pci_get_bus_and_slot((unsigned int)pdev->bus->number,
416 PCI_DEVFN(PCI_SLOT(pdev->devfn), 1));
417
418 if (!drm->hdmi_device) {
46941b0f 419 NV_DEBUG(drm, "hdmi device not found %d %d %d\n", pdev->bus->number, PCI_SLOT(pdev->devfn), 1);
5addcf0a
DA
420 return;
421 }
422
423 if ((drm->hdmi_device->class >> 8) != PCI_CLASS_MULTIMEDIA_HD_AUDIO) {
46941b0f 424 NV_DEBUG(drm, "possible hdmi device not audio %d\n", drm->hdmi_device->class);
5addcf0a
DA
425 pci_dev_put(drm->hdmi_device);
426 drm->hdmi_device = NULL;
427 return;
428 }
429}
430
5b8a43ae 431static int
94580299
BS
432nouveau_drm_load(struct drm_device *dev, unsigned long flags)
433{
94580299
BS
434 struct nouveau_drm *drm;
435 int ret;
436
20d8a88e
BS
437 if (!(drm = kzalloc(sizeof(*drm), GFP_KERNEL)))
438 return -ENOMEM;
439 dev->dev_private = drm;
440 drm->dev = dev;
441
cb7e88e7
BS
442 ret = nouveau_cli_init(drm, "DRM-master", &drm->master);
443 if (ret)
444 return ret;
445
20d8a88e 446 ret = nouveau_cli_init(drm, "DRM", &drm->client);
94580299
BS
447 if (ret)
448 return ret;
449
1167c6bc
BS
450 dev->irq_enabled = true;
451
989aa5b7 452 nvxx_client(&drm->client.base)->debug =
be83cd4e 453 nvkm_dbgopt(nouveau_debug, "DRM");
77145f1c 454
94580299 455 INIT_LIST_HEAD(&drm->clients);
ebb945a9 456 spin_lock_init(&drm->tile.lock);
94580299 457
46941b0f 458 nouveau_get_hdmi_dev(drm);
5addcf0a 459
77145f1c
BS
460 /* workaround an odd issue on nvc1 by disabling the device's
461 * nosnoop capability. hopefully won't cause issues until a
462 * better fix is found - assuming there is one...
463 */
1167c6bc
BS
464 if (drm->client.device.info.chipset == 0xc1)
465 nvif_mask(&drm->client.device.object, 0x00088080, 0x00000800, 0x00000000);
ebb945a9 466
77145f1c 467 nouveau_vga_init(drm);
cb75d97e 468
1167c6bc
BS
469 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
470 if (!nvxx_device(&drm->client.device)->mmu) {
2100292c
BS
471 ret = -ENOSYS;
472 goto fail_device;
473 }
474
1167c6bc
BS
475 ret = nvkm_vm_new(nvxx_device(&drm->client.device),
476 0, (1ULL << 40), 0x1000, NULL,
477 &drm->client.vm);
ebb945a9
BS
478 if (ret)
479 goto fail_device;
3ee6f5b5 480
989aa5b7 481 nvxx_client(&drm->client.base)->vm = drm->client.vm;
ebb945a9
BS
482 }
483
484 ret = nouveau_ttm_init(drm);
94580299 485 if (ret)
77145f1c
BS
486 goto fail_ttm;
487
488 ret = nouveau_bios_init(dev);
489 if (ret)
490 goto fail_bios;
491
77145f1c 492 ret = nouveau_display_create(dev);
ebb945a9 493 if (ret)
77145f1c
BS
494 goto fail_dispctor;
495
496 if (dev->mode_config.num_crtc) {
497 ret = nouveau_display_init(dev);
498 if (ret)
499 goto fail_dispinit;
500 }
501
b126a200 502 nouveau_debugfs_init(drm);
b9ed919f 503 nouveau_hwmon_init(dev);
ebb945a9
BS
504 nouveau_accel_init(drm);
505 nouveau_fbcon_init(dev);
8d021d71 506 nouveau_led_init(dev);
5addcf0a 507
8fa4338a 508 if (nouveau_pmops_runtime()) {
5addcf0a
DA
509 pm_runtime_use_autosuspend(dev->dev);
510 pm_runtime_set_autosuspend_delay(dev->dev, 5000);
511 pm_runtime_set_active(dev->dev);
512 pm_runtime_allow(dev->dev);
513 pm_runtime_mark_last_busy(dev->dev);
514 pm_runtime_put(dev->dev);
9a2eba33
PU
515 } else {
516 /* enable polling for external displays */
517 drm_kms_helper_poll_enable(dev);
5addcf0a 518 }
94580299
BS
519 return 0;
520
77145f1c
BS
521fail_dispinit:
522 nouveau_display_destroy(dev);
523fail_dispctor:
77145f1c
BS
524 nouveau_bios_takedown(dev);
525fail_bios:
ebb945a9 526 nouveau_ttm_fini(drm);
77145f1c 527fail_ttm:
77145f1c 528 nouveau_vga_fini(drm);
94580299 529fail_device:
20d8a88e 530 nouveau_cli_fini(&drm->client);
cb7e88e7 531 nouveau_cli_fini(&drm->master);
20d8a88e 532 kfree(drm);
94580299
BS
533 return ret;
534}
535
11b3c20b 536static void
94580299
BS
537nouveau_drm_unload(struct drm_device *dev)
538{
77145f1c 539 struct nouveau_drm *drm = nouveau_drm(dev);
94580299 540
8fa4338a 541 if (nouveau_pmops_runtime()) {
c1b16b45 542 pm_runtime_get_sync(dev->dev);
55c868a3 543 pm_runtime_forbid(dev->dev);
c1b16b45
LW
544 }
545
8d021d71 546 nouveau_led_fini(dev);
ebb945a9
BS
547 nouveau_fbcon_fini(dev);
548 nouveau_accel_fini(drm);
b9ed919f 549 nouveau_hwmon_fini(dev);
b126a200 550 nouveau_debugfs_fini(drm);
77145f1c 551
9430738d 552 if (dev->mode_config.num_crtc)
3b4c0abb 553 nouveau_display_fini(dev, false);
77145f1c
BS
554 nouveau_display_destroy(dev);
555
77145f1c 556 nouveau_bios_takedown(dev);
94580299 557
ebb945a9 558 nouveau_ttm_fini(drm);
77145f1c 559 nouveau_vga_fini(drm);
cb75d97e 560
5addcf0a
DA
561 if (drm->hdmi_device)
562 pci_dev_put(drm->hdmi_device);
20d8a88e 563 nouveau_cli_fini(&drm->client);
cb7e88e7 564 nouveau_cli_fini(&drm->master);
20d8a88e 565 kfree(drm);
94580299
BS
566}
567
8ba9ff11
AC
568void
569nouveau_drm_device_remove(struct drm_device *dev)
94580299 570{
77145f1c 571 struct nouveau_drm *drm = nouveau_drm(dev);
be83cd4e 572 struct nvkm_client *client;
76ecea5b 573 struct nvkm_device *device;
77145f1c 574
7d3428cd 575 dev->irq_enabled = false;
989aa5b7 576 client = nvxx_client(&drm->client.base);
4e7e62d6 577 device = nvkm_device_find(client->device);
77145f1c
BS
578 drm_put_dev(dev);
579
e781dc8f 580 nvkm_device_del(&device);
94580299 581}
8ba9ff11
AC
582
583static void
584nouveau_drm_remove(struct pci_dev *pdev)
585{
586 struct drm_device *dev = pci_get_drvdata(pdev);
587
588 nouveau_drm_device_remove(dev);
589}
94580299 590
cd897837 591static int
05c63c2f 592nouveau_do_suspend(struct drm_device *dev, bool runtime)
94580299 593{
77145f1c 594 struct nouveau_drm *drm = nouveau_drm(dev);
94580299
BS
595 int ret;
596
8d021d71
MP
597 nouveau_led_suspend(dev);
598
6fbb702e 599 if (dev->mode_config.num_crtc) {
2d38a535 600 NV_DEBUG(drm, "suspending console...\n");
6fbb702e 601 nouveau_fbcon_set_suspend(dev, 1);
2d38a535 602 NV_DEBUG(drm, "suspending display...\n");
6fbb702e 603 ret = nouveau_display_suspend(dev, runtime);
9430738d
BS
604 if (ret)
605 return ret;
606 }
94580299 607
2d38a535 608 NV_DEBUG(drm, "evicting buffers...\n");
ebb945a9
BS
609 ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
610
2d38a535 611 NV_DEBUG(drm, "waiting for kernel channels to go idle...\n");
81dff21b
BS
612 if (drm->cechan) {
613 ret = nouveau_channel_idle(drm->cechan);
614 if (ret)
f3980dc5 615 goto fail_display;
81dff21b
BS
616 }
617
618 if (drm->channel) {
619 ret = nouveau_channel_idle(drm->channel);
620 if (ret)
f3980dc5 621 goto fail_display;
81dff21b
BS
622 }
623
2d38a535 624 NV_DEBUG(drm, "suspending fence...\n");
ebb945a9 625 if (drm->fence && nouveau_fence(drm)->suspend) {
f3980dc5
IM
626 if (!nouveau_fence(drm)->suspend(drm)) {
627 ret = -ENOMEM;
628 goto fail_display;
629 }
ebb945a9
BS
630 }
631
2d38a535 632 NV_DEBUG(drm, "suspending object tree...\n");
cb7e88e7 633 ret = nvif_client_suspend(&drm->master.base);
94580299
BS
634 if (ret)
635 goto fail_client;
636
94580299
BS
637 return 0;
638
639fail_client:
f3980dc5
IM
640 if (drm->fence && nouveau_fence(drm)->resume)
641 nouveau_fence(drm)->resume(drm);
642
643fail_display:
9430738d 644 if (dev->mode_config.num_crtc) {
2d38a535 645 NV_DEBUG(drm, "resuming display...\n");
6fbb702e 646 nouveau_display_resume(dev, runtime);
9430738d 647 }
94580299
BS
648 return ret;
649}
650
cd897837 651static int
6fbb702e 652nouveau_do_resume(struct drm_device *dev, bool runtime)
2d8b9ccb
DA
653{
654 struct nouveau_drm *drm = nouveau_drm(dev);
2d8b9ccb 655
2d38a535 656 NV_DEBUG(drm, "resuming object tree...\n");
cb7e88e7 657 nvif_client_resume(&drm->master.base);
94580299 658
2d38a535 659 NV_DEBUG(drm, "resuming fence...\n");
81dff21b
BS
660 if (drm->fence && nouveau_fence(drm)->resume)
661 nouveau_fence(drm)->resume(drm);
662
77145f1c 663 nouveau_run_vbios_init(dev);
77145f1c 664
9430738d 665 if (dev->mode_config.num_crtc) {
2d38a535 666 NV_DEBUG(drm, "resuming display...\n");
6fbb702e 667 nouveau_display_resume(dev, runtime);
2d38a535 668 NV_DEBUG(drm, "resuming console...\n");
6fbb702e 669 nouveau_fbcon_set_suspend(dev, 0);
9430738d 670 }
5addcf0a 671
8d021d71
MP
672 nouveau_led_resume(dev);
673
77145f1c 674 return 0;
94580299
BS
675}
676
7bb6d442
BS
677int
678nouveau_pmops_suspend(struct device *dev)
679{
680 struct pci_dev *pdev = to_pci_dev(dev);
681 struct drm_device *drm_dev = pci_get_drvdata(pdev);
682 int ret;
683
684 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
685 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
686 return 0;
687
688 ret = nouveau_do_suspend(drm_dev, false);
689 if (ret)
690 return ret;
691
692 pci_save_state(pdev);
693 pci_disable_device(pdev);
7bb6d442 694 pci_set_power_state(pdev, PCI_D3hot);
c5fd936e 695 udelay(200);
7bb6d442
BS
696 return 0;
697}
698
699int
700nouveau_pmops_resume(struct device *dev)
2d8b9ccb
DA
701{
702 struct pci_dev *pdev = to_pci_dev(dev);
703 struct drm_device *drm_dev = pci_get_drvdata(pdev);
704 int ret;
705
5addcf0a
DA
706 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
707 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
2d8b9ccb
DA
708 return 0;
709
710 pci_set_power_state(pdev, PCI_D0);
711 pci_restore_state(pdev);
712 ret = pci_enable_device(pdev);
713 if (ret)
714 return ret;
715 pci_set_master(pdev);
716
0b2fe659
HG
717 ret = nouveau_do_resume(drm_dev, false);
718
719 /* Monitors may have been connected / disconnected during suspend */
720 schedule_work(&nouveau_drm(drm_dev)->hpd_work);
721
722 return ret;
2d8b9ccb
DA
723}
724
7bb6d442
BS
725static int
726nouveau_pmops_freeze(struct device *dev)
2d8b9ccb
DA
727{
728 struct pci_dev *pdev = to_pci_dev(dev);
729 struct drm_device *drm_dev = pci_get_drvdata(pdev);
6fbb702e 730 return nouveau_do_suspend(drm_dev, false);
2d8b9ccb
DA
731}
732
7bb6d442
BS
733static int
734nouveau_pmops_thaw(struct device *dev)
2d8b9ccb
DA
735{
736 struct pci_dev *pdev = to_pci_dev(dev);
737 struct drm_device *drm_dev = pci_get_drvdata(pdev);
6fbb702e 738 return nouveau_do_resume(drm_dev, false);
2d8b9ccb
DA
739}
740
321f5c5f 741bool
5499473c 742nouveau_pmops_runtime(void)
321f5c5f
BS
743{
744 if (nouveau_runtime_pm == -1)
745 return nouveau_is_optimus() || nouveau_is_v1_dsm();
746 return nouveau_runtime_pm == 1;
747}
748
7bb6d442
BS
749static int
750nouveau_pmops_runtime_suspend(struct device *dev)
751{
752 struct pci_dev *pdev = to_pci_dev(dev);
753 struct drm_device *drm_dev = pci_get_drvdata(pdev);
754 int ret;
755
321f5c5f 756 if (!nouveau_pmops_runtime()) {
7bb6d442
BS
757 pm_runtime_forbid(dev);
758 return -EBUSY;
759 }
760
7bb6d442
BS
761 drm_kms_helper_poll_disable(drm_dev);
762 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
763 nouveau_switcheroo_optimus_dsm();
764 ret = nouveau_do_suspend(drm_dev, true);
765 pci_save_state(pdev);
766 pci_disable_device(pdev);
8c863944 767 pci_ignore_hotplug(pdev);
7bb6d442
BS
768 pci_set_power_state(pdev, PCI_D3cold);
769 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
770 return ret;
771}
772
773static int
774nouveau_pmops_runtime_resume(struct device *dev)
775{
776 struct pci_dev *pdev = to_pci_dev(dev);
777 struct drm_device *drm_dev = pci_get_drvdata(pdev);
1167c6bc 778 struct nvif_device *device = &nouveau_drm(drm_dev)->client.device;
7bb6d442
BS
779 int ret;
780
321f5c5f
BS
781 if (!nouveau_pmops_runtime()) {
782 pm_runtime_forbid(dev);
783 return -EBUSY;
784 }
7bb6d442
BS
785
786 pci_set_power_state(pdev, PCI_D0);
787 pci_restore_state(pdev);
788 ret = pci_enable_device(pdev);
789 if (ret)
790 return ret;
791 pci_set_master(pdev);
792
793 ret = nouveau_do_resume(drm_dev, true);
cae9ff03 794
7bb6d442 795 /* do magic */
a01ca78c 796 nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25));
7bb6d442
BS
797 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
798 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
0b2fe659
HG
799
800 /* Monitors may have been connected / disconnected during suspend */
801 schedule_work(&nouveau_drm(drm_dev)->hpd_work);
802
7bb6d442
BS
803 return ret;
804}
805
806static int
807nouveau_pmops_runtime_idle(struct device *dev)
808{
809 struct pci_dev *pdev = to_pci_dev(dev);
810 struct drm_device *drm_dev = pci_get_drvdata(pdev);
811 struct nouveau_drm *drm = nouveau_drm(drm_dev);
812 struct drm_crtc *crtc;
813
321f5c5f 814 if (!nouveau_pmops_runtime()) {
7bb6d442
BS
815 pm_runtime_forbid(dev);
816 return -EBUSY;
817 }
818
819 /* if we have a hdmi audio device - make sure it has a driver loaded */
820 if (drm->hdmi_device) {
821 if (!drm->hdmi_device->driver) {
822 DRM_DEBUG_DRIVER("failing to power off - no HDMI audio driver loaded\n");
823 pm_runtime_mark_last_busy(dev);
824 return -EBUSY;
825 }
826 }
827
828 list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) {
829 if (crtc->enabled) {
830 DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
831 return -EBUSY;
832 }
833 }
834 pm_runtime_mark_last_busy(dev);
835 pm_runtime_autosuspend(dev);
836 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
837 return 1;
838}
2d8b9ccb 839
5b8a43ae 840static int
ebb945a9
BS
841nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
842{
ebb945a9
BS
843 struct nouveau_drm *drm = nouveau_drm(dev);
844 struct nouveau_cli *cli;
a2896ced 845 char name[32], tmpname[TASK_COMM_LEN];
ebb945a9
BS
846 int ret;
847
5addcf0a
DA
848 /* need to bring up power immediately if opening device */
849 ret = pm_runtime_get_sync(dev->dev);
b6c4285a 850 if (ret < 0 && ret != -EACCES)
5addcf0a
DA
851 return ret;
852
a2896ced
MS
853 get_task_comm(tmpname, current);
854 snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
fa6df8c1 855
20d8a88e
BS
856 if (!(cli = kzalloc(sizeof(*cli), GFP_KERNEL)))
857 return ret;
420b9469 858
20d8a88e 859 ret = nouveau_cli_init(drm, name, cli);
ebb945a9 860 if (ret)
20d8a88e 861 goto done;
ebb945a9 862
0ad72863
BS
863 cli->base.super = false;
864
1167c6bc
BS
865 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
866 ret = nvkm_vm_new(nvxx_device(&drm->client.device), 0,
867 (1ULL << 40), 0x1000, NULL, &cli->vm);
20d8a88e
BS
868 if (ret)
869 goto done;
3ee6f5b5 870
989aa5b7 871 nvxx_client(&cli->base)->vm = cli->vm;
ebb945a9
BS
872 }
873
874 fpriv->driver_priv = cli;
875
876 mutex_lock(&drm->client.mutex);
877 list_add(&cli->head, &drm->clients);
878 mutex_unlock(&drm->client.mutex);
5addcf0a 879
20d8a88e
BS
880done:
881 if (ret && cli) {
882 nouveau_cli_fini(cli);
883 kfree(cli);
884 }
885
5addcf0a
DA
886 pm_runtime_mark_last_busy(dev->dev);
887 pm_runtime_put_autosuspend(dev->dev);
5addcf0a 888 return ret;
ebb945a9
BS
889}
890
5b8a43ae 891static void
f0e73ff3 892nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
ebb945a9
BS
893{
894 struct nouveau_cli *cli = nouveau_cli(fpriv);
895 struct nouveau_drm *drm = nouveau_drm(dev);
896
5addcf0a
DA
897 pm_runtime_get_sync(dev->dev);
898
ac8c7930 899 mutex_lock(&cli->mutex);
ebb945a9
BS
900 if (cli->abi16)
901 nouveau_abi16_fini(cli->abi16);
ac8c7930 902 mutex_unlock(&cli->mutex);
ebb945a9
BS
903
904 mutex_lock(&drm->client.mutex);
905 list_del(&cli->head);
906 mutex_unlock(&drm->client.mutex);
5addcf0a 907
20d8a88e
BS
908 nouveau_cli_fini(cli);
909 kfree(cli);
5addcf0a
DA
910 pm_runtime_mark_last_busy(dev->dev);
911 pm_runtime_put_autosuspend(dev->dev);
ebb945a9
BS
912}
913
baa70943 914static const struct drm_ioctl_desc
77145f1c 915nouveau_ioctls[] = {
f8c47144
DV
916 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_AUTH|DRM_RENDER_ALLOW),
917 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
918 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
919 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_AUTH|DRM_RENDER_ALLOW),
920 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
921 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
922 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_AUTH|DRM_RENDER_ALLOW),
923 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_AUTH|DRM_RENDER_ALLOW),
924 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_AUTH|DRM_RENDER_ALLOW),
925 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW),
926 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW),
927 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_AUTH|DRM_RENDER_ALLOW),
77145f1c
BS
928};
929
27111a23
BS
930long
931nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
5addcf0a 932{
27111a23
BS
933 struct drm_file *filp = file->private_data;
934 struct drm_device *dev = filp->minor->dev;
5addcf0a 935 long ret;
5addcf0a
DA
936
937 ret = pm_runtime_get_sync(dev->dev);
b6c4285a 938 if (ret < 0 && ret != -EACCES)
5addcf0a
DA
939 return ret;
940
27111a23
BS
941 switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) {
942 case DRM_NOUVEAU_NVIF:
943 ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd));
944 break;
945 default:
946 ret = drm_ioctl(file, cmd, arg);
947 break;
948 }
5addcf0a
DA
949
950 pm_runtime_mark_last_busy(dev->dev);
951 pm_runtime_put_autosuspend(dev->dev);
952 return ret;
953}
27111a23 954
77145f1c
BS
955static const struct file_operations
956nouveau_driver_fops = {
957 .owner = THIS_MODULE,
958 .open = drm_open,
959 .release = drm_release,
5addcf0a 960 .unlocked_ioctl = nouveau_drm_ioctl,
77145f1c
BS
961 .mmap = nouveau_ttm_mmap,
962 .poll = drm_poll,
77145f1c
BS
963 .read = drm_read,
964#if defined(CONFIG_COMPAT)
965 .compat_ioctl = nouveau_compat_ioctl,
966#endif
967 .llseek = noop_llseek,
968};
969
970static struct drm_driver
915b4d11 971driver_stub = {
77145f1c 972 .driver_features =
0e975980
PA
973 DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER |
974 DRIVER_KMS_LEGACY_CONTEXT,
77145f1c
BS
975
976 .load = nouveau_drm_load,
977 .unload = nouveau_drm_unload,
978 .open = nouveau_drm_open,
77145f1c
BS
979 .postclose = nouveau_drm_postclose,
980 .lastclose = nouveau_vga_lastclose,
981
33b903e8 982#if defined(CONFIG_DEBUG_FS)
56c101af 983 .debugfs_init = nouveau_drm_debugfs_init,
33b903e8
MS
984#endif
985
51cb4b39
BS
986 .enable_vblank = nouveau_display_vblank_enable,
987 .disable_vblank = nouveau_display_vblank_disable,
d83ef853 988 .get_scanout_position = nouveau_display_scanoutpos,
1bf6ad62 989 .get_vblank_timestamp = drm_calc_vbltimestamp_from_scanoutpos,
77145f1c
BS
990
991 .ioctls = nouveau_ioctls,
baa70943 992 .num_ioctls = ARRAY_SIZE(nouveau_ioctls),
77145f1c
BS
993 .fops = &nouveau_driver_fops,
994
995 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
996 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
ab9ccb96
AP
997 .gem_prime_export = drm_gem_prime_export,
998 .gem_prime_import = drm_gem_prime_import,
999 .gem_prime_pin = nouveau_gem_prime_pin,
3aac4502 1000 .gem_prime_res_obj = nouveau_gem_prime_res_obj,
1af7c7dd 1001 .gem_prime_unpin = nouveau_gem_prime_unpin,
ab9ccb96
AP
1002 .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
1003 .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
1004 .gem_prime_vmap = nouveau_gem_prime_vmap,
1005 .gem_prime_vunmap = nouveau_gem_prime_vunmap,
77145f1c 1006
a51e6ac4 1007 .gem_free_object_unlocked = nouveau_gem_object_del,
77145f1c
BS
1008 .gem_open_object = nouveau_gem_object_open,
1009 .gem_close_object = nouveau_gem_object_close,
1010
1011 .dumb_create = nouveau_display_dumb_create,
1012 .dumb_map_offset = nouveau_display_dumb_map_offset,
77145f1c
BS
1013
1014 .name = DRIVER_NAME,
1015 .desc = DRIVER_DESC,
1016#ifdef GIT_REVISION
1017 .date = GIT_REVISION,
1018#else
1019 .date = DRIVER_DATE,
1020#endif
1021 .major = DRIVER_MAJOR,
1022 .minor = DRIVER_MINOR,
1023 .patchlevel = DRIVER_PATCHLEVEL,
1024};
1025
94580299
BS
1026static struct pci_device_id
1027nouveau_drm_pci_table[] = {
1028 {
1029 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
1030 .class = PCI_BASE_CLASS_DISPLAY << 16,
1031 .class_mask = 0xff << 16,
1032 },
1033 {
1034 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
1035 .class = PCI_BASE_CLASS_DISPLAY << 16,
1036 .class_mask = 0xff << 16,
1037 },
1038 {}
1039};
1040
703fa264
PM
1041static void nouveau_display_options(void)
1042{
1043 DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n");
1044
1045 DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable);
1046 DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid);
1047 DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink);
1048 DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel);
1049 DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config);
1050 DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug);
1051 DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel);
1052 DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset);
1053 DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm);
1054 DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf);
f3a8b664 1055 DRM_DEBUG_DRIVER("... hdmimhz : %d\n", nouveau_hdmimhz);
703fa264
PM
1056}
1057
2d8b9ccb
DA
1058static const struct dev_pm_ops nouveau_pm_ops = {
1059 .suspend = nouveau_pmops_suspend,
1060 .resume = nouveau_pmops_resume,
1061 .freeze = nouveau_pmops_freeze,
1062 .thaw = nouveau_pmops_thaw,
1063 .poweroff = nouveau_pmops_freeze,
1064 .restore = nouveau_pmops_resume,
5addcf0a
DA
1065 .runtime_suspend = nouveau_pmops_runtime_suspend,
1066 .runtime_resume = nouveau_pmops_runtime_resume,
1067 .runtime_idle = nouveau_pmops_runtime_idle,
2d8b9ccb
DA
1068};
1069
94580299
BS
1070static struct pci_driver
1071nouveau_drm_pci_driver = {
1072 .name = "nouveau",
1073 .id_table = nouveau_drm_pci_table,
1074 .probe = nouveau_drm_probe,
1075 .remove = nouveau_drm_remove,
2d8b9ccb 1076 .driver.pm = &nouveau_pm_ops,
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1077};
1078
8ba9ff11 1079struct drm_device *
e396ecd1
AC
1080nouveau_platform_device_create(const struct nvkm_device_tegra_func *func,
1081 struct platform_device *pdev,
47b2505e 1082 struct nvkm_device **pdevice)
420b9469 1083{
8ba9ff11
AC
1084 struct drm_device *drm;
1085 int err;
420b9469 1086
e396ecd1 1087 err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug,
7974dd1b 1088 true, true, ~0ULL, pdevice);
8ba9ff11 1089 if (err)
e781dc8f 1090 goto err_free;
8ba9ff11 1091
915b4d11 1092 drm = drm_dev_alloc(&driver_platform, &pdev->dev);
0f288605
TG
1093 if (IS_ERR(drm)) {
1094 err = PTR_ERR(drm);
8ba9ff11 1095 goto err_free;
420b9469
AC
1096 }
1097
8ba9ff11
AC
1098 platform_set_drvdata(pdev, drm);
1099
1100 return drm;
1101
1102err_free:
e781dc8f 1103 nvkm_device_del(pdevice);
8ba9ff11
AC
1104
1105 return ERR_PTR(err);
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AC
1106}
1107
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1108static int __init
1109nouveau_drm_init(void)
1110{
915b4d11 1111 driver_pci = driver_stub;
915b4d11 1112 driver_platform = driver_stub;
915b4d11 1113
703fa264
PM
1114 nouveau_display_options();
1115
77145f1c 1116 if (nouveau_modeset == -1) {
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BS
1117 if (vgacon_text_force())
1118 nouveau_modeset = 0;
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BS
1119 }
1120
1121 if (!nouveau_modeset)
1122 return 0;
1123
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AC
1124#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1125 platform_driver_register(&nouveau_platform_driver);
1126#endif
1127
77145f1c 1128 nouveau_register_dsm_handler();
db1a0ae2 1129 nouveau_backlight_ctor();
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1130
1131#ifdef CONFIG_PCI
1132 return pci_register_driver(&nouveau_drm_pci_driver);
1133#else
1134 return 0;
1135#endif
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1136}
1137
1138static void __exit
1139nouveau_drm_exit(void)
1140{
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BS
1141 if (!nouveau_modeset)
1142 return;
1143
10631d72
DV
1144#ifdef CONFIG_PCI
1145 pci_unregister_driver(&nouveau_drm_pci_driver);
1146#endif
db1a0ae2 1147 nouveau_backlight_dtor();
77145f1c 1148 nouveau_unregister_dsm_handler();
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AC
1149
1150#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1151 platform_driver_unregister(&nouveau_platform_driver);
1152#endif
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1153}
1154
1155module_init(nouveau_drm_init);
1156module_exit(nouveau_drm_exit);
1157
1158MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
77145f1c
BS
1159MODULE_AUTHOR(DRIVER_AUTHOR);
1160MODULE_DESCRIPTION(DRIVER_DESC);
94580299 1161MODULE_LICENSE("GPL and additional rights");