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drm/nouveau: kill nouveau_dev() + wrap register macros
[mirror_ubuntu-bionic-kernel.git] / drivers / gpu / drm / nouveau / nouveau_drm.c
CommitLineData
94580299
BS
1/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
77145f1c 25#include <linux/console.h>
94580299
BS
26#include <linux/module.h>
27#include <linux/pci.h>
5addcf0a
DA
28#include <linux/pm_runtime.h>
29#include <linux/vga_switcheroo.h>
30#include "drmP.h"
31#include "drm_crtc_helper.h"
94580299
BS
32#include <core/device.h>
33#include <core/client.h>
ebb945a9 34#include <core/gpuobj.h>
94580299 35#include <core/class.h>
c33e05a1 36#include <core/option.h>
94580299 37
dded35de 38#include <engine/device.h>
1d7c71a3 39#include <engine/disp.h>
9fe72f9e 40#include <engine/fifo.h>
69a6146d 41#include <engine/software.h>
1d7c71a3 42
dded35de
BS
43#include <subdev/vm.h>
44
94580299 45#include "nouveau_drm.h"
ebb945a9 46#include "nouveau_dma.h"
77145f1c
BS
47#include "nouveau_ttm.h"
48#include "nouveau_gem.h"
cb75d97e 49#include "nouveau_agp.h"
77145f1c 50#include "nouveau_vga.h"
26fdd78c 51#include "nouveau_sysfs.h"
b9ed919f 52#include "nouveau_hwmon.h"
77145f1c
BS
53#include "nouveau_acpi.h"
54#include "nouveau_bios.h"
55#include "nouveau_ioctl.h"
ebb945a9
BS
56#include "nouveau_abi16.h"
57#include "nouveau_fbcon.h"
58#include "nouveau_fence.h"
33b903e8 59#include "nouveau_debugfs.h"
ebb945a9 60
94580299
BS
61MODULE_PARM_DESC(config, "option string to pass to driver core");
62static char *nouveau_config;
63module_param_named(config, nouveau_config, charp, 0400);
64
65MODULE_PARM_DESC(debug, "debug string to pass to driver core");
66static char *nouveau_debug;
67module_param_named(debug, nouveau_debug, charp, 0400);
68
ebb945a9
BS
69MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
70static int nouveau_noaccel = 0;
71module_param_named(noaccel, nouveau_noaccel, int, 0400);
72
9430738d
BS
73MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
74 "0 = disabled, 1 = enabled, 2 = headless)");
75int nouveau_modeset = -1;
77145f1c
BS
76module_param_named(modeset, nouveau_modeset, int, 0400);
77
5addcf0a
DA
78MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
79int nouveau_runtime_pm = -1;
80module_param_named(runpm, nouveau_runtime_pm, int, 0400);
81
77145f1c
BS
82static struct drm_driver driver;
83
94580299 84static u64
420b9469 85nouveau_pci_name(struct pci_dev *pdev)
94580299
BS
86{
87 u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
88 name |= pdev->bus->number << 16;
89 name |= PCI_SLOT(pdev->devfn) << 8;
90 return name | PCI_FUNC(pdev->devfn);
91}
92
420b9469
AC
93static u64
94nouveau_platform_name(struct platform_device *platformdev)
95{
96 return platformdev->id;
97}
98
99static u64
100nouveau_name(struct drm_device *dev)
101{
102 if (dev->pdev)
103 return nouveau_pci_name(dev->pdev);
104 else
105 return nouveau_platform_name(dev->platformdev);
106}
107
94580299 108static int
420b9469 109nouveau_cli_create(u64 name, const char *sname,
fa6df8c1 110 int size, void **pcli)
94580299
BS
111{
112 struct nouveau_cli *cli;
113 int ret;
114
dd5700ea 115 *pcli = NULL;
420b9469 116 ret = nouveau_client_create_(sname, name, nouveau_config,
94580299
BS
117 nouveau_debug, size, pcli);
118 cli = *pcli;
dd5700ea
MS
119 if (ret) {
120 if (cli)
121 nouveau_client_destroy(&cli->base);
122 *pcli = NULL;
94580299 123 return ret;
dd5700ea 124 }
94580299
BS
125
126 mutex_init(&cli->mutex);
127 return 0;
128}
129
130static void
131nouveau_cli_destroy(struct nouveau_cli *cli)
132{
133 struct nouveau_object *client = nv_object(cli);
ebb945a9 134 nouveau_vm_ref(NULL, &cli->base.vm, NULL);
94580299
BS
135 nouveau_client_fini(&cli->base, false);
136 atomic_set(&client->refcount, 1);
137 nouveau_object_ref(NULL, &client);
138}
139
ebb945a9
BS
140static void
141nouveau_accel_fini(struct nouveau_drm *drm)
142{
143 nouveau_gpuobj_ref(NULL, &drm->notify);
144 nouveau_channel_del(&drm->channel);
49981046 145 nouveau_channel_del(&drm->cechan);
ebb945a9
BS
146 if (drm->fence)
147 nouveau_fence(drm)->dtor(drm);
148}
149
150static void
151nouveau_accel_init(struct nouveau_drm *drm)
152{
153 struct nouveau_device *device = nv_device(drm->device);
154 struct nouveau_object *object;
49981046 155 u32 arg0, arg1;
ebb945a9
BS
156 int ret;
157
9fe72f9e 158 if (nouveau_noaccel || !nouveau_fifo(device) /*XXX*/)
ebb945a9
BS
159 return;
160
161 /* initialise synchronisation routines */
162 if (device->card_type < NV_10) ret = nv04_fence_create(drm);
8aa816b0
IM
163 else if (device->card_type < NV_11 ||
164 device->chipset < 0x17) ret = nv10_fence_create(drm);
60e5cb79 165 else if (device->card_type < NV_50) ret = nv17_fence_create(drm);
ace5a9b8 166 else if (device->chipset < 0x84) ret = nv50_fence_create(drm);
ebb945a9
BS
167 else if (device->card_type < NV_C0) ret = nv84_fence_create(drm);
168 else ret = nvc0_fence_create(drm);
169 if (ret) {
170 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
171 nouveau_accel_fini(drm);
172 return;
173 }
174
49981046
BS
175 if (device->card_type >= NV_E0) {
176 ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE,
177 NVDRM_CHAN + 1,
178 NVE0_CHANNEL_IND_ENGINE_CE0 |
179 NVE0_CHANNEL_IND_ENGINE_CE1, 0,
180 &drm->cechan);
181 if (ret)
182 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
183
184 arg0 = NVE0_CHANNEL_IND_ENGINE_GR;
49469800 185 arg1 = 1;
00fc6f6f
BS
186 } else
187 if (device->chipset >= 0xa3 &&
188 device->chipset != 0xaa &&
189 device->chipset != 0xac) {
190 ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE,
191 NVDRM_CHAN + 1, NvDmaFB, NvDmaTT,
192 &drm->cechan);
193 if (ret)
194 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
195
196 arg0 = NvDmaFB;
197 arg1 = NvDmaTT;
49981046
BS
198 } else {
199 arg0 = NvDmaFB;
200 arg1 = NvDmaTT;
201 }
202
ebb945a9 203 ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE, NVDRM_CHAN,
49981046 204 arg0, arg1, &drm->channel);
ebb945a9
BS
205 if (ret) {
206 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
207 nouveau_accel_fini(drm);
208 return;
209 }
210
69a6146d
BS
211 ret = nouveau_object_new(nv_object(drm), NVDRM_CHAN, NVDRM_NVSW,
212 nouveau_abi16_swclass(drm), NULL, 0, &object);
213 if (ret == 0) {
214 struct nouveau_software_chan *swch = (void *)object->parent;
215 ret = RING_SPACE(drm->channel, 2);
216 if (ret == 0) {
217 if (device->card_type < NV_C0) {
218 BEGIN_NV04(drm->channel, NvSubSw, 0, 1);
219 OUT_RING (drm->channel, NVDRM_NVSW);
220 } else
221 if (device->card_type < NV_E0) {
222 BEGIN_NVC0(drm->channel, FermiSw, 0, 1);
223 OUT_RING (drm->channel, 0x001f0000);
224 }
225 }
226 swch = (void *)object->parent;
227 swch->flip = nouveau_flip_complete;
228 swch->flip_data = drm->channel;
229 }
230
231 if (ret) {
232 NV_ERROR(drm, "failed to allocate software object, %d\n", ret);
233 nouveau_accel_fini(drm);
234 return;
235 }
236
ebb945a9
BS
237 if (device->card_type < NV_C0) {
238 ret = nouveau_gpuobj_new(drm->device, NULL, 32, 0, 0,
239 &drm->notify);
240 if (ret) {
241 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
242 nouveau_accel_fini(drm);
243 return;
244 }
245
246 ret = nouveau_object_new(nv_object(drm),
247 drm->channel->handle, NvNotify0,
248 0x003d, &(struct nv_dma_class) {
249 .flags = NV_DMA_TARGET_VRAM |
250 NV_DMA_ACCESS_RDWR,
251 .start = drm->notify->addr,
252 .limit = drm->notify->addr + 31
253 }, sizeof(struct nv_dma_class),
254 &object);
255 if (ret) {
256 nouveau_accel_fini(drm);
257 return;
258 }
259 }
260
261
49981046 262 nouveau_bo_move_init(drm);
ebb945a9
BS
263}
264
56550d94
GKH
265static int nouveau_drm_probe(struct pci_dev *pdev,
266 const struct pci_device_id *pent)
94580299
BS
267{
268 struct nouveau_device *device;
ebb945a9
BS
269 struct apertures_struct *aper;
270 bool boot = false;
94580299
BS
271 int ret;
272
ebb945a9
BS
273 /* remove conflicting drivers (vesafb, efifb etc) */
274 aper = alloc_apertures(3);
275 if (!aper)
276 return -ENOMEM;
277
278 aper->ranges[0].base = pci_resource_start(pdev, 1);
279 aper->ranges[0].size = pci_resource_len(pdev, 1);
280 aper->count = 1;
281
282 if (pci_resource_len(pdev, 2)) {
283 aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
284 aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
285 aper->count++;
286 }
287
288 if (pci_resource_len(pdev, 3)) {
289 aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
290 aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
291 aper->count++;
292 }
293
294#ifdef CONFIG_X86
295 boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
296#endif
297 remove_conflicting_framebuffers(aper, "nouveaufb", boot);
83ef7777 298 kfree(aper);
ebb945a9 299
420b9469
AC
300 ret = nouveau_device_create(pdev, NOUVEAU_BUS_PCI,
301 nouveau_pci_name(pdev), pci_name(pdev),
94580299
BS
302 nouveau_config, nouveau_debug, &device);
303 if (ret)
304 return ret;
305
306 pci_set_master(pdev);
307
77145f1c 308 ret = drm_get_pci_dev(pdev, pent, &driver);
94580299 309 if (ret) {
ebb945a9 310 nouveau_object_ref(NULL, (struct nouveau_object **)&device);
94580299
BS
311 return ret;
312 }
313
314 return 0;
315}
316
5addcf0a
DA
317#define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403
318
319static void
46941b0f 320nouveau_get_hdmi_dev(struct nouveau_drm *drm)
5addcf0a 321{
46941b0f 322 struct pci_dev *pdev = drm->dev->pdev;
5addcf0a 323
420b9469 324 if (!pdev) {
40189b0c 325 DRM_INFO("not a PCI device; no HDMI\n");
420b9469
AC
326 drm->hdmi_device = NULL;
327 return;
328 }
329
5addcf0a
DA
330 /* subfunction one is a hdmi audio device? */
331 drm->hdmi_device = pci_get_bus_and_slot((unsigned int)pdev->bus->number,
332 PCI_DEVFN(PCI_SLOT(pdev->devfn), 1));
333
334 if (!drm->hdmi_device) {
46941b0f 335 NV_DEBUG(drm, "hdmi device not found %d %d %d\n", pdev->bus->number, PCI_SLOT(pdev->devfn), 1);
5addcf0a
DA
336 return;
337 }
338
339 if ((drm->hdmi_device->class >> 8) != PCI_CLASS_MULTIMEDIA_HD_AUDIO) {
46941b0f 340 NV_DEBUG(drm, "possible hdmi device not audio %d\n", drm->hdmi_device->class);
5addcf0a
DA
341 pci_dev_put(drm->hdmi_device);
342 drm->hdmi_device = NULL;
343 return;
344 }
345}
346
5b8a43ae 347static int
94580299
BS
348nouveau_drm_load(struct drm_device *dev, unsigned long flags)
349{
350 struct pci_dev *pdev = dev->pdev;
351 struct nouveau_drm *drm;
352 int ret;
353
420b9469
AC
354 ret = nouveau_cli_create(nouveau_name(dev), "DRM", sizeof(*drm),
355 (void **)&drm);
94580299
BS
356 if (ret)
357 return ret;
358
77145f1c
BS
359 dev->dev_private = drm;
360 drm->dev = dev;
c33e05a1 361 nouveau_client(drm)->debug = nouveau_dbgopt(nouveau_debug, "DRM");
77145f1c 362
94580299 363 INIT_LIST_HEAD(&drm->clients);
ebb945a9 364 spin_lock_init(&drm->tile.lock);
94580299 365
46941b0f 366 nouveau_get_hdmi_dev(drm);
5addcf0a 367
cb75d97e
BS
368 /* make sure AGP controller is in a consistent state before we
369 * (possibly) execute vbios init tables (see nouveau_agp.h)
370 */
420b9469 371 if (pdev && drm_pci_device_is_agp(dev) && dev->agp) {
cb75d97e
BS
372 /* dummy device object, doesn't init anything, but allows
373 * agp code access to registers
374 */
375 ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT,
376 NVDRM_DEVICE, 0x0080,
377 &(struct nv_device_class) {
378 .device = ~0,
379 .disable =
380 ~(NV_DEVICE_DISABLE_MMIO |
381 NV_DEVICE_DISABLE_IDENTIFY),
382 .debug0 = ~0,
383 }, sizeof(struct nv_device_class),
384 &drm->device);
385 if (ret)
ebb945a9 386 goto fail_device;
cb75d97e
BS
387
388 nouveau_agp_reset(drm);
389 nouveau_object_del(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE);
390 }
391
94580299
BS
392 ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE,
393 0x0080, &(struct nv_device_class) {
394 .device = ~0,
395 .disable = 0,
396 .debug0 = 0,
397 }, sizeof(struct nv_device_class),
398 &drm->device);
399 if (ret)
400 goto fail_device;
401
7d3428cd
IM
402 dev->irq_enabled = true;
403
77145f1c
BS
404 /* workaround an odd issue on nvc1 by disabling the device's
405 * nosnoop capability. hopefully won't cause issues until a
406 * better fix is found - assuming there is one...
407 */
77145f1c 408 if (nv_device(drm->device)->chipset == 0xc1)
db2bec18 409 nvif_mask(drm->device, 0x00088080, 0x00000800, 0x00000000);
ebb945a9 410
77145f1c 411 nouveau_vga_init(drm);
cb75d97e
BS
412 nouveau_agp_init(drm);
413
db2bec18 414 if (nv_device(drm->device)->card_type >= NV_50) {
ebb945a9 415 ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
3ee6f5b5 416 0x1000, &drm->client.vm);
ebb945a9
BS
417 if (ret)
418 goto fail_device;
3ee6f5b5
BS
419
420 drm->client.base.vm = drm->client.vm;
ebb945a9
BS
421 }
422
423 ret = nouveau_ttm_init(drm);
94580299 424 if (ret)
77145f1c
BS
425 goto fail_ttm;
426
427 ret = nouveau_bios_init(dev);
428 if (ret)
429 goto fail_bios;
430
77145f1c 431 ret = nouveau_display_create(dev);
ebb945a9 432 if (ret)
77145f1c
BS
433 goto fail_dispctor;
434
435 if (dev->mode_config.num_crtc) {
436 ret = nouveau_display_init(dev);
437 if (ret)
438 goto fail_dispinit;
439 }
440
26fdd78c 441 nouveau_sysfs_init(dev);
b9ed919f 442 nouveau_hwmon_init(dev);
ebb945a9
BS
443 nouveau_accel_init(drm);
444 nouveau_fbcon_init(dev);
5addcf0a
DA
445
446 if (nouveau_runtime_pm != 0) {
447 pm_runtime_use_autosuspend(dev->dev);
448 pm_runtime_set_autosuspend_delay(dev->dev, 5000);
449 pm_runtime_set_active(dev->dev);
450 pm_runtime_allow(dev->dev);
451 pm_runtime_mark_last_busy(dev->dev);
452 pm_runtime_put(dev->dev);
453 }
94580299
BS
454 return 0;
455
77145f1c
BS
456fail_dispinit:
457 nouveau_display_destroy(dev);
458fail_dispctor:
77145f1c
BS
459 nouveau_bios_takedown(dev);
460fail_bios:
ebb945a9 461 nouveau_ttm_fini(drm);
77145f1c
BS
462fail_ttm:
463 nouveau_agp_fini(drm);
464 nouveau_vga_fini(drm);
94580299
BS
465fail_device:
466 nouveau_cli_destroy(&drm->client);
467 return ret;
468}
469
5b8a43ae 470static int
94580299
BS
471nouveau_drm_unload(struct drm_device *dev)
472{
77145f1c 473 struct nouveau_drm *drm = nouveau_drm(dev);
94580299 474
5addcf0a 475 pm_runtime_get_sync(dev->dev);
ebb945a9
BS
476 nouveau_fbcon_fini(dev);
477 nouveau_accel_fini(drm);
b9ed919f 478 nouveau_hwmon_fini(dev);
26fdd78c 479 nouveau_sysfs_fini(dev);
77145f1c 480
9430738d
BS
481 if (dev->mode_config.num_crtc)
482 nouveau_display_fini(dev);
77145f1c
BS
483 nouveau_display_destroy(dev);
484
77145f1c 485 nouveau_bios_takedown(dev);
94580299 486
ebb945a9 487 nouveau_ttm_fini(drm);
cb75d97e 488 nouveau_agp_fini(drm);
77145f1c 489 nouveau_vga_fini(drm);
cb75d97e 490
5addcf0a
DA
491 if (drm->hdmi_device)
492 pci_dev_put(drm->hdmi_device);
94580299
BS
493 nouveau_cli_destroy(&drm->client);
494 return 0;
495}
496
8ba9ff11
AC
497void
498nouveau_drm_device_remove(struct drm_device *dev)
94580299 499{
77145f1c 500 struct nouveau_drm *drm = nouveau_drm(dev);
ebb945a9 501 struct nouveau_object *device;
77145f1c 502
7d3428cd 503 dev->irq_enabled = false;
77145f1c
BS
504 device = drm->client.base.device;
505 drm_put_dev(dev);
506
ebb945a9
BS
507 nouveau_object_ref(NULL, &device);
508 nouveau_object_debug();
94580299 509}
8ba9ff11
AC
510EXPORT_SYMBOL(nouveau_drm_device_remove);
511
512static void
513nouveau_drm_remove(struct pci_dev *pdev)
514{
515 struct drm_device *dev = pci_get_drvdata(pdev);
516
517 nouveau_drm_device_remove(dev);
518}
94580299 519
cd897837 520static int
05c63c2f 521nouveau_do_suspend(struct drm_device *dev, bool runtime)
94580299 522{
77145f1c 523 struct nouveau_drm *drm = nouveau_drm(dev);
94580299
BS
524 struct nouveau_cli *cli;
525 int ret;
526
05c63c2f 527 if (dev->mode_config.num_crtc && !runtime) {
c52f4fa6 528 NV_INFO(drm, "suspending display...\n");
9430738d
BS
529 ret = nouveau_display_suspend(dev);
530 if (ret)
531 return ret;
532 }
94580299 533
c52f4fa6 534 NV_INFO(drm, "evicting buffers...\n");
ebb945a9
BS
535 ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
536
c52f4fa6 537 NV_INFO(drm, "waiting for kernel channels to go idle...\n");
81dff21b
BS
538 if (drm->cechan) {
539 ret = nouveau_channel_idle(drm->cechan);
540 if (ret)
f3980dc5 541 goto fail_display;
81dff21b
BS
542 }
543
544 if (drm->channel) {
545 ret = nouveau_channel_idle(drm->channel);
546 if (ret)
f3980dc5 547 goto fail_display;
81dff21b
BS
548 }
549
c52f4fa6 550 NV_INFO(drm, "suspending client object trees...\n");
ebb945a9 551 if (drm->fence && nouveau_fence(drm)->suspend) {
f3980dc5
IM
552 if (!nouveau_fence(drm)->suspend(drm)) {
553 ret = -ENOMEM;
554 goto fail_display;
555 }
ebb945a9
BS
556 }
557
94580299
BS
558 list_for_each_entry(cli, &drm->clients, head) {
559 ret = nouveau_client_fini(&cli->base, true);
560 if (ret)
561 goto fail_client;
562 }
563
c52f4fa6 564 NV_INFO(drm, "suspending kernel object tree...\n");
94580299
BS
565 ret = nouveau_client_fini(&drm->client.base, true);
566 if (ret)
567 goto fail_client;
568
cb75d97e 569 nouveau_agp_fini(drm);
94580299
BS
570 return 0;
571
572fail_client:
573 list_for_each_entry_continue_reverse(cli, &drm->clients, head) {
574 nouveau_client_init(&cli->base);
575 }
576
f3980dc5
IM
577 if (drm->fence && nouveau_fence(drm)->resume)
578 nouveau_fence(drm)->resume(drm);
579
580fail_display:
9430738d 581 if (dev->mode_config.num_crtc) {
c52f4fa6 582 NV_INFO(drm, "resuming display...\n");
9430738d
BS
583 nouveau_display_resume(dev);
584 }
94580299
BS
585 return ret;
586}
587
2d8b9ccb 588int nouveau_pmops_suspend(struct device *dev)
94580299 589{
2d8b9ccb
DA
590 struct pci_dev *pdev = to_pci_dev(dev);
591 struct drm_device *drm_dev = pci_get_drvdata(pdev);
94580299
BS
592 int ret;
593
5addcf0a
DA
594 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
595 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
94580299
BS
596 return 0;
597
5addcf0a
DA
598 if (drm_dev->mode_config.num_crtc)
599 nouveau_fbcon_set_suspend(drm_dev, 1);
600
05c63c2f 601 ret = nouveau_do_suspend(drm_dev, false);
94580299
BS
602 if (ret)
603 return ret;
2d8b9ccb
DA
604
605 pci_save_state(pdev);
606 pci_disable_device(pdev);
607 pci_set_power_state(pdev, PCI_D3hot);
2d8b9ccb
DA
608 return 0;
609}
610
cd897837 611static int
2d8b9ccb
DA
612nouveau_do_resume(struct drm_device *dev)
613{
614 struct nouveau_drm *drm = nouveau_drm(dev);
615 struct nouveau_cli *cli;
616
c52f4fa6 617 NV_INFO(drm, "re-enabling device...\n");
94580299 618
cb75d97e
BS
619 nouveau_agp_reset(drm);
620
c52f4fa6 621 NV_INFO(drm, "resuming kernel object tree...\n");
94580299 622 nouveau_client_init(&drm->client.base);
ebb945a9 623 nouveau_agp_init(drm);
94580299 624
c52f4fa6 625 NV_INFO(drm, "resuming client object trees...\n");
81dff21b
BS
626 if (drm->fence && nouveau_fence(drm)->resume)
627 nouveau_fence(drm)->resume(drm);
628
94580299
BS
629 list_for_each_entry(cli, &drm->clients, head) {
630 nouveau_client_init(&cli->base);
631 }
cb75d97e 632
77145f1c 633 nouveau_run_vbios_init(dev);
77145f1c 634
9430738d 635 if (dev->mode_config.num_crtc) {
c52f4fa6 636 NV_INFO(drm, "resuming display...\n");
5addcf0a 637 nouveau_display_repin(dev);
9430738d 638 }
5addcf0a 639
77145f1c 640 return 0;
94580299
BS
641}
642
2d8b9ccb
DA
643int nouveau_pmops_resume(struct device *dev)
644{
645 struct pci_dev *pdev = to_pci_dev(dev);
646 struct drm_device *drm_dev = pci_get_drvdata(pdev);
647 int ret;
648
5addcf0a
DA
649 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
650 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
2d8b9ccb
DA
651 return 0;
652
653 pci_set_power_state(pdev, PCI_D0);
654 pci_restore_state(pdev);
655 ret = pci_enable_device(pdev);
656 if (ret)
657 return ret;
658 pci_set_master(pdev);
659
5addcf0a 660 ret = nouveau_do_resume(drm_dev);
c52f4fa6 661 if (ret)
5addcf0a 662 return ret;
5addcf0a 663
028791bb 664 if (drm_dev->mode_config.num_crtc) {
01172772 665 nouveau_display_resume(drm_dev);
028791bb
BS
666 nouveau_fbcon_set_suspend(drm_dev, 0);
667 }
668
5addcf0a 669 return 0;
2d8b9ccb
DA
670}
671
672static int nouveau_pmops_freeze(struct device *dev)
673{
674 struct pci_dev *pdev = to_pci_dev(dev);
675 struct drm_device *drm_dev = pci_get_drvdata(pdev);
5addcf0a
DA
676 int ret;
677
5addcf0a
DA
678 if (drm_dev->mode_config.num_crtc)
679 nouveau_fbcon_set_suspend(drm_dev, 1);
2d8b9ccb 680
05c63c2f 681 ret = nouveau_do_suspend(drm_dev, false);
5addcf0a 682 return ret;
2d8b9ccb
DA
683}
684
685static int nouveau_pmops_thaw(struct device *dev)
686{
687 struct pci_dev *pdev = to_pci_dev(dev);
688 struct drm_device *drm_dev = pci_get_drvdata(pdev);
5addcf0a 689 int ret;
2d8b9ccb 690
5addcf0a 691 ret = nouveau_do_resume(drm_dev);
c52f4fa6 692 if (ret)
5addcf0a 693 return ret;
028791bb
BS
694
695 if (drm_dev->mode_config.num_crtc) {
01172772 696 nouveau_display_resume(drm_dev);
028791bb
BS
697 nouveau_fbcon_set_suspend(drm_dev, 0);
698 }
699
5addcf0a 700 return 0;
2d8b9ccb
DA
701}
702
703
5b8a43ae 704static int
ebb945a9
BS
705nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
706{
ebb945a9
BS
707 struct nouveau_drm *drm = nouveau_drm(dev);
708 struct nouveau_cli *cli;
a2896ced 709 char name[32], tmpname[TASK_COMM_LEN];
ebb945a9
BS
710 int ret;
711
5addcf0a
DA
712 /* need to bring up power immediately if opening device */
713 ret = pm_runtime_get_sync(dev->dev);
b6c4285a 714 if (ret < 0 && ret != -EACCES)
5addcf0a
DA
715 return ret;
716
a2896ced
MS
717 get_task_comm(tmpname, current);
718 snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
fa6df8c1 719
420b9469
AC
720 ret = nouveau_cli_create(nouveau_name(dev), name, sizeof(*cli),
721 (void **)&cli);
722
ebb945a9 723 if (ret)
5addcf0a 724 goto out_suspend;
ebb945a9
BS
725
726 if (nv_device(drm->device)->card_type >= NV_50) {
727 ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
3ee6f5b5 728 0x1000, &cli->vm);
ebb945a9
BS
729 if (ret) {
730 nouveau_cli_destroy(cli);
5addcf0a 731 goto out_suspend;
ebb945a9 732 }
3ee6f5b5
BS
733
734 cli->base.vm = cli->vm;
ebb945a9
BS
735 }
736
737 fpriv->driver_priv = cli;
738
739 mutex_lock(&drm->client.mutex);
740 list_add(&cli->head, &drm->clients);
741 mutex_unlock(&drm->client.mutex);
5addcf0a
DA
742
743out_suspend:
744 pm_runtime_mark_last_busy(dev->dev);
745 pm_runtime_put_autosuspend(dev->dev);
746
747 return ret;
ebb945a9
BS
748}
749
5b8a43ae 750static void
ebb945a9
BS
751nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv)
752{
753 struct nouveau_cli *cli = nouveau_cli(fpriv);
754 struct nouveau_drm *drm = nouveau_drm(dev);
755
5addcf0a
DA
756 pm_runtime_get_sync(dev->dev);
757
ebb945a9
BS
758 if (cli->abi16)
759 nouveau_abi16_fini(cli->abi16);
760
761 mutex_lock(&drm->client.mutex);
762 list_del(&cli->head);
763 mutex_unlock(&drm->client.mutex);
5addcf0a 764
ebb945a9
BS
765}
766
5b8a43ae 767static void
ebb945a9
BS
768nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
769{
770 struct nouveau_cli *cli = nouveau_cli(fpriv);
771 nouveau_cli_destroy(cli);
5addcf0a
DA
772 pm_runtime_mark_last_busy(dev->dev);
773 pm_runtime_put_autosuspend(dev->dev);
ebb945a9
BS
774}
775
baa70943 776static const struct drm_ioctl_desc
77145f1c 777nouveau_ioctls[] = {
7d761258 778 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
77145f1c 779 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
7d761258
MP
780 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
781 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
782 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
783 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
784 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
785 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
786 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
787 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
788 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
789 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
77145f1c
BS
790};
791
5addcf0a
DA
792long nouveau_drm_ioctl(struct file *filp,
793 unsigned int cmd, unsigned long arg)
794{
795 struct drm_file *file_priv = filp->private_data;
796 struct drm_device *dev;
797 long ret;
798 dev = file_priv->minor->dev;
799
800 ret = pm_runtime_get_sync(dev->dev);
b6c4285a 801 if (ret < 0 && ret != -EACCES)
5addcf0a
DA
802 return ret;
803
804 ret = drm_ioctl(filp, cmd, arg);
805
806 pm_runtime_mark_last_busy(dev->dev);
807 pm_runtime_put_autosuspend(dev->dev);
808 return ret;
809}
77145f1c
BS
810static const struct file_operations
811nouveau_driver_fops = {
812 .owner = THIS_MODULE,
813 .open = drm_open,
814 .release = drm_release,
5addcf0a 815 .unlocked_ioctl = nouveau_drm_ioctl,
77145f1c
BS
816 .mmap = nouveau_ttm_mmap,
817 .poll = drm_poll,
77145f1c
BS
818 .read = drm_read,
819#if defined(CONFIG_COMPAT)
820 .compat_ioctl = nouveau_compat_ioctl,
821#endif
822 .llseek = noop_llseek,
823};
824
825static struct drm_driver
826driver = {
827 .driver_features =
4cb4ea39 828 DRIVER_USE_AGP |
7d761258 829 DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER,
77145f1c
BS
830
831 .load = nouveau_drm_load,
832 .unload = nouveau_drm_unload,
833 .open = nouveau_drm_open,
834 .preclose = nouveau_drm_preclose,
835 .postclose = nouveau_drm_postclose,
836 .lastclose = nouveau_vga_lastclose,
837
33b903e8
MS
838#if defined(CONFIG_DEBUG_FS)
839 .debugfs_init = nouveau_debugfs_init,
840 .debugfs_cleanup = nouveau_debugfs_takedown,
841#endif
842
77145f1c 843 .get_vblank_counter = drm_vblank_count,
51cb4b39
BS
844 .enable_vblank = nouveau_display_vblank_enable,
845 .disable_vblank = nouveau_display_vblank_disable,
d83ef853
BS
846 .get_scanout_position = nouveau_display_scanoutpos,
847 .get_vblank_timestamp = nouveau_display_vblstamp,
77145f1c
BS
848
849 .ioctls = nouveau_ioctls,
baa70943 850 .num_ioctls = ARRAY_SIZE(nouveau_ioctls),
77145f1c
BS
851 .fops = &nouveau_driver_fops,
852
853 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
854 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
ab9ccb96
AP
855 .gem_prime_export = drm_gem_prime_export,
856 .gem_prime_import = drm_gem_prime_import,
857 .gem_prime_pin = nouveau_gem_prime_pin,
1af7c7dd 858 .gem_prime_unpin = nouveau_gem_prime_unpin,
ab9ccb96
AP
859 .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
860 .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
861 .gem_prime_vmap = nouveau_gem_prime_vmap,
862 .gem_prime_vunmap = nouveau_gem_prime_vunmap,
77145f1c 863
77145f1c
BS
864 .gem_free_object = nouveau_gem_object_del,
865 .gem_open_object = nouveau_gem_object_open,
866 .gem_close_object = nouveau_gem_object_close,
867
868 .dumb_create = nouveau_display_dumb_create,
869 .dumb_map_offset = nouveau_display_dumb_map_offset,
43387b37 870 .dumb_destroy = drm_gem_dumb_destroy,
77145f1c
BS
871
872 .name = DRIVER_NAME,
873 .desc = DRIVER_DESC,
874#ifdef GIT_REVISION
875 .date = GIT_REVISION,
876#else
877 .date = DRIVER_DATE,
878#endif
879 .major = DRIVER_MAJOR,
880 .minor = DRIVER_MINOR,
881 .patchlevel = DRIVER_PATCHLEVEL,
882};
883
94580299
BS
884static struct pci_device_id
885nouveau_drm_pci_table[] = {
886 {
887 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
888 .class = PCI_BASE_CLASS_DISPLAY << 16,
889 .class_mask = 0xff << 16,
890 },
891 {
892 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
893 .class = PCI_BASE_CLASS_DISPLAY << 16,
894 .class_mask = 0xff << 16,
895 },
896 {}
897};
898
5addcf0a
DA
899static int nouveau_pmops_runtime_suspend(struct device *dev)
900{
901 struct pci_dev *pdev = to_pci_dev(dev);
902 struct drm_device *drm_dev = pci_get_drvdata(pdev);
903 int ret;
904
adbbdbac
DA
905 if (nouveau_runtime_pm == 0) {
906 pm_runtime_forbid(dev);
907 return -EBUSY;
908 }
5addcf0a 909
b25b4427
IM
910 /* are we optimus enabled? */
911 if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) {
912 DRM_DEBUG_DRIVER("failing to power off - not optimus\n");
adbbdbac
DA
913 pm_runtime_forbid(dev);
914 return -EBUSY;
b25b4427
IM
915 }
916
c52f4fa6 917 nv_debug_level(SILENT);
5addcf0a
DA
918 drm_kms_helper_poll_disable(drm_dev);
919 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
920 nouveau_switcheroo_optimus_dsm();
05c63c2f 921 ret = nouveau_do_suspend(drm_dev, true);
5addcf0a
DA
922 pci_save_state(pdev);
923 pci_disable_device(pdev);
924 pci_set_power_state(pdev, PCI_D3cold);
925 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
926 return ret;
927}
928
929static int nouveau_pmops_runtime_resume(struct device *dev)
930{
931 struct pci_dev *pdev = to_pci_dev(dev);
932 struct drm_device *drm_dev = pci_get_drvdata(pdev);
db2bec18 933 struct nouveau_object *device = nouveau_drm(drm_dev)->device;
5addcf0a
DA
934 int ret;
935
936 if (nouveau_runtime_pm == 0)
937 return -EINVAL;
938
939 pci_set_power_state(pdev, PCI_D0);
940 pci_restore_state(pdev);
941 ret = pci_enable_device(pdev);
942 if (ret)
943 return ret;
944 pci_set_master(pdev);
945
946 ret = nouveau_do_resume(drm_dev);
5addcf0a
DA
947 drm_kms_helper_poll_enable(drm_dev);
948 /* do magic */
db2bec18 949 nvif_mask(device, 0x88488, (1 << 25), (1 << 25));
5addcf0a
DA
950 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
951 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
c52f4fa6 952 nv_debug_level(NORMAL);
5addcf0a
DA
953 return ret;
954}
955
956static int nouveau_pmops_runtime_idle(struct device *dev)
957{
958 struct pci_dev *pdev = to_pci_dev(dev);
959 struct drm_device *drm_dev = pci_get_drvdata(pdev);
960 struct nouveau_drm *drm = nouveau_drm(drm_dev);
961 struct drm_crtc *crtc;
962
adbbdbac
DA
963 if (nouveau_runtime_pm == 0) {
964 pm_runtime_forbid(dev);
5addcf0a 965 return -EBUSY;
adbbdbac 966 }
5addcf0a
DA
967
968 /* are we optimus enabled? */
969 if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) {
970 DRM_DEBUG_DRIVER("failing to power off - not optimus\n");
adbbdbac 971 pm_runtime_forbid(dev);
5addcf0a
DA
972 return -EBUSY;
973 }
974
975 /* if we have a hdmi audio device - make sure it has a driver loaded */
976 if (drm->hdmi_device) {
977 if (!drm->hdmi_device->driver) {
978 DRM_DEBUG_DRIVER("failing to power off - no HDMI audio driver loaded\n");
979 pm_runtime_mark_last_busy(dev);
980 return -EBUSY;
981 }
982 }
983
984 list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) {
985 if (crtc->enabled) {
986 DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
987 return -EBUSY;
988 }
989 }
990 pm_runtime_mark_last_busy(dev);
991 pm_runtime_autosuspend(dev);
992 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
993 return 1;
994}
995
2d8b9ccb
DA
996static const struct dev_pm_ops nouveau_pm_ops = {
997 .suspend = nouveau_pmops_suspend,
998 .resume = nouveau_pmops_resume,
999 .freeze = nouveau_pmops_freeze,
1000 .thaw = nouveau_pmops_thaw,
1001 .poweroff = nouveau_pmops_freeze,
1002 .restore = nouveau_pmops_resume,
5addcf0a
DA
1003 .runtime_suspend = nouveau_pmops_runtime_suspend,
1004 .runtime_resume = nouveau_pmops_runtime_resume,
1005 .runtime_idle = nouveau_pmops_runtime_idle,
2d8b9ccb
DA
1006};
1007
94580299
BS
1008static struct pci_driver
1009nouveau_drm_pci_driver = {
1010 .name = "nouveau",
1011 .id_table = nouveau_drm_pci_table,
1012 .probe = nouveau_drm_probe,
1013 .remove = nouveau_drm_remove,
2d8b9ccb 1014 .driver.pm = &nouveau_pm_ops,
94580299
BS
1015};
1016
8ba9ff11
AC
1017struct drm_device *
1018nouveau_platform_device_create_(struct platform_device *pdev, int size,
1019 void **pobject)
420b9469 1020{
8ba9ff11
AC
1021 struct drm_device *drm;
1022 int err;
420b9469 1023
8ba9ff11 1024 err = nouveau_device_create_(pdev, NOUVEAU_BUS_PLATFORM,
420b9469
AC
1025 nouveau_platform_name(pdev),
1026 dev_name(&pdev->dev), nouveau_config,
8ba9ff11
AC
1027 nouveau_debug, size, pobject);
1028 if (err)
1029 return ERR_PTR(err);
1030
1031 drm = drm_dev_alloc(&driver, &pdev->dev);
1032 if (!drm) {
1033 err = -ENOMEM;
1034 goto err_free;
420b9469
AC
1035 }
1036
8ba9ff11
AC
1037 err = drm_dev_set_unique(drm, "%s", dev_name(&pdev->dev));
1038 if (err < 0)
1039 goto err_free;
1040
1041 drm->platformdev = pdev;
1042 platform_set_drvdata(pdev, drm);
1043
1044 return drm;
1045
1046err_free:
1047 nouveau_object_ref(NULL, (struct nouveau_object **)pobject);
1048
1049 return ERR_PTR(err);
420b9469 1050}
8ba9ff11 1051EXPORT_SYMBOL(nouveau_platform_device_create_);
420b9469 1052
94580299
BS
1053static int __init
1054nouveau_drm_init(void)
1055{
77145f1c
BS
1056 if (nouveau_modeset == -1) {
1057#ifdef CONFIG_VGA_CONSOLE
1058 if (vgacon_text_force())
1059 nouveau_modeset = 0;
77145f1c 1060#endif
77145f1c
BS
1061 }
1062
1063 if (!nouveau_modeset)
1064 return 0;
1065
1066 nouveau_register_dsm_handler();
1067 return drm_pci_init(&driver, &nouveau_drm_pci_driver);
94580299
BS
1068}
1069
1070static void __exit
1071nouveau_drm_exit(void)
1072{
77145f1c
BS
1073 if (!nouveau_modeset)
1074 return;
1075
1076 drm_pci_exit(&driver, &nouveau_drm_pci_driver);
1077 nouveau_unregister_dsm_handler();
94580299
BS
1078}
1079
1080module_init(nouveau_drm_init);
1081module_exit(nouveau_drm_exit);
1082
1083MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
77145f1c
BS
1084MODULE_AUTHOR(DRIVER_AUTHOR);
1085MODULE_DESCRIPTION(DRIVER_DESC);
94580299 1086MODULE_LICENSE("GPL and additional rights");