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94580299 BS |
1 | /* |
2 | * Copyright 2012 Red Hat Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | * Authors: Ben Skeggs | |
23 | */ | |
24 | ||
77145f1c | 25 | #include <linux/console.h> |
94580299 BS |
26 | #include <linux/module.h> |
27 | #include <linux/pci.h> | |
5addcf0a DA |
28 | #include <linux/pm_runtime.h> |
29 | #include <linux/vga_switcheroo.h> | |
30 | #include "drmP.h" | |
31 | #include "drm_crtc_helper.h" | |
94580299 BS |
32 | #include <core/device.h> |
33 | #include <core/client.h> | |
ebb945a9 | 34 | #include <core/gpuobj.h> |
94580299 BS |
35 | #include <core/class.h> |
36 | ||
dded35de | 37 | #include <engine/device.h> |
1d7c71a3 | 38 | #include <engine/disp.h> |
9fe72f9e | 39 | #include <engine/fifo.h> |
1d7c71a3 | 40 | |
dded35de BS |
41 | #include <subdev/vm.h> |
42 | ||
94580299 | 43 | #include "nouveau_drm.h" |
ebb945a9 | 44 | #include "nouveau_dma.h" |
77145f1c BS |
45 | #include "nouveau_ttm.h" |
46 | #include "nouveau_gem.h" | |
cb75d97e | 47 | #include "nouveau_agp.h" |
77145f1c | 48 | #include "nouveau_vga.h" |
26fdd78c | 49 | #include "nouveau_sysfs.h" |
b9ed919f | 50 | #include "nouveau_hwmon.h" |
77145f1c BS |
51 | #include "nouveau_acpi.h" |
52 | #include "nouveau_bios.h" | |
53 | #include "nouveau_ioctl.h" | |
ebb945a9 BS |
54 | #include "nouveau_abi16.h" |
55 | #include "nouveau_fbcon.h" | |
56 | #include "nouveau_fence.h" | |
33b903e8 | 57 | #include "nouveau_debugfs.h" |
ebb945a9 | 58 | |
94580299 BS |
59 | MODULE_PARM_DESC(config, "option string to pass to driver core"); |
60 | static char *nouveau_config; | |
61 | module_param_named(config, nouveau_config, charp, 0400); | |
62 | ||
63 | MODULE_PARM_DESC(debug, "debug string to pass to driver core"); | |
64 | static char *nouveau_debug; | |
65 | module_param_named(debug, nouveau_debug, charp, 0400); | |
66 | ||
ebb945a9 BS |
67 | MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration"); |
68 | static int nouveau_noaccel = 0; | |
69 | module_param_named(noaccel, nouveau_noaccel, int, 0400); | |
70 | ||
9430738d BS |
71 | MODULE_PARM_DESC(modeset, "enable driver (default: auto, " |
72 | "0 = disabled, 1 = enabled, 2 = headless)"); | |
73 | int nouveau_modeset = -1; | |
77145f1c BS |
74 | module_param_named(modeset, nouveau_modeset, int, 0400); |
75 | ||
5addcf0a DA |
76 | MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)"); |
77 | int nouveau_runtime_pm = -1; | |
78 | module_param_named(runpm, nouveau_runtime_pm, int, 0400); | |
79 | ||
77145f1c BS |
80 | static struct drm_driver driver; |
81 | ||
94580299 BS |
82 | static u64 |
83 | nouveau_name(struct pci_dev *pdev) | |
84 | { | |
85 | u64 name = (u64)pci_domain_nr(pdev->bus) << 32; | |
86 | name |= pdev->bus->number << 16; | |
87 | name |= PCI_SLOT(pdev->devfn) << 8; | |
88 | return name | PCI_FUNC(pdev->devfn); | |
89 | } | |
90 | ||
91 | static int | |
fa6df8c1 BS |
92 | nouveau_cli_create(struct pci_dev *pdev, const char *name, |
93 | int size, void **pcli) | |
94580299 BS |
94 | { |
95 | struct nouveau_cli *cli; | |
96 | int ret; | |
97 | ||
dd5700ea | 98 | *pcli = NULL; |
94580299 BS |
99 | ret = nouveau_client_create_(name, nouveau_name(pdev), nouveau_config, |
100 | nouveau_debug, size, pcli); | |
101 | cli = *pcli; | |
dd5700ea MS |
102 | if (ret) { |
103 | if (cli) | |
104 | nouveau_client_destroy(&cli->base); | |
105 | *pcli = NULL; | |
94580299 | 106 | return ret; |
dd5700ea | 107 | } |
94580299 BS |
108 | |
109 | mutex_init(&cli->mutex); | |
110 | return 0; | |
111 | } | |
112 | ||
113 | static void | |
114 | nouveau_cli_destroy(struct nouveau_cli *cli) | |
115 | { | |
116 | struct nouveau_object *client = nv_object(cli); | |
ebb945a9 | 117 | nouveau_vm_ref(NULL, &cli->base.vm, NULL); |
94580299 BS |
118 | nouveau_client_fini(&cli->base, false); |
119 | atomic_set(&client->refcount, 1); | |
120 | nouveau_object_ref(NULL, &client); | |
121 | } | |
122 | ||
ebb945a9 BS |
123 | static void |
124 | nouveau_accel_fini(struct nouveau_drm *drm) | |
125 | { | |
126 | nouveau_gpuobj_ref(NULL, &drm->notify); | |
127 | nouveau_channel_del(&drm->channel); | |
49981046 | 128 | nouveau_channel_del(&drm->cechan); |
ebb945a9 BS |
129 | if (drm->fence) |
130 | nouveau_fence(drm)->dtor(drm); | |
131 | } | |
132 | ||
133 | static void | |
134 | nouveau_accel_init(struct nouveau_drm *drm) | |
135 | { | |
136 | struct nouveau_device *device = nv_device(drm->device); | |
137 | struct nouveau_object *object; | |
49981046 | 138 | u32 arg0, arg1; |
ebb945a9 BS |
139 | int ret; |
140 | ||
9fe72f9e | 141 | if (nouveau_noaccel || !nouveau_fifo(device) /*XXX*/) |
ebb945a9 BS |
142 | return; |
143 | ||
144 | /* initialise synchronisation routines */ | |
145 | if (device->card_type < NV_10) ret = nv04_fence_create(drm); | |
8aa816b0 IM |
146 | else if (device->card_type < NV_11 || |
147 | device->chipset < 0x17) ret = nv10_fence_create(drm); | |
60e5cb79 | 148 | else if (device->card_type < NV_50) ret = nv17_fence_create(drm); |
ace5a9b8 | 149 | else if (device->chipset < 0x84) ret = nv50_fence_create(drm); |
ebb945a9 BS |
150 | else if (device->card_type < NV_C0) ret = nv84_fence_create(drm); |
151 | else ret = nvc0_fence_create(drm); | |
152 | if (ret) { | |
153 | NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret); | |
154 | nouveau_accel_fini(drm); | |
155 | return; | |
156 | } | |
157 | ||
49981046 BS |
158 | if (device->card_type >= NV_E0) { |
159 | ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE, | |
160 | NVDRM_CHAN + 1, | |
161 | NVE0_CHANNEL_IND_ENGINE_CE0 | | |
162 | NVE0_CHANNEL_IND_ENGINE_CE1, 0, | |
163 | &drm->cechan); | |
164 | if (ret) | |
165 | NV_ERROR(drm, "failed to create ce channel, %d\n", ret); | |
166 | ||
167 | arg0 = NVE0_CHANNEL_IND_ENGINE_GR; | |
49469800 | 168 | arg1 = 1; |
00fc6f6f BS |
169 | } else |
170 | if (device->chipset >= 0xa3 && | |
171 | device->chipset != 0xaa && | |
172 | device->chipset != 0xac) { | |
173 | ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE, | |
174 | NVDRM_CHAN + 1, NvDmaFB, NvDmaTT, | |
175 | &drm->cechan); | |
176 | if (ret) | |
177 | NV_ERROR(drm, "failed to create ce channel, %d\n", ret); | |
178 | ||
179 | arg0 = NvDmaFB; | |
180 | arg1 = NvDmaTT; | |
49981046 BS |
181 | } else { |
182 | arg0 = NvDmaFB; | |
183 | arg1 = NvDmaTT; | |
184 | } | |
185 | ||
ebb945a9 | 186 | ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE, NVDRM_CHAN, |
49981046 | 187 | arg0, arg1, &drm->channel); |
ebb945a9 BS |
188 | if (ret) { |
189 | NV_ERROR(drm, "failed to create kernel channel, %d\n", ret); | |
190 | nouveau_accel_fini(drm); | |
191 | return; | |
192 | } | |
193 | ||
194 | if (device->card_type < NV_C0) { | |
195 | ret = nouveau_gpuobj_new(drm->device, NULL, 32, 0, 0, | |
196 | &drm->notify); | |
197 | if (ret) { | |
198 | NV_ERROR(drm, "failed to allocate notifier, %d\n", ret); | |
199 | nouveau_accel_fini(drm); | |
200 | return; | |
201 | } | |
202 | ||
203 | ret = nouveau_object_new(nv_object(drm), | |
204 | drm->channel->handle, NvNotify0, | |
205 | 0x003d, &(struct nv_dma_class) { | |
206 | .flags = NV_DMA_TARGET_VRAM | | |
207 | NV_DMA_ACCESS_RDWR, | |
208 | .start = drm->notify->addr, | |
209 | .limit = drm->notify->addr + 31 | |
210 | }, sizeof(struct nv_dma_class), | |
211 | &object); | |
212 | if (ret) { | |
213 | nouveau_accel_fini(drm); | |
214 | return; | |
215 | } | |
216 | } | |
217 | ||
218 | ||
49981046 | 219 | nouveau_bo_move_init(drm); |
ebb945a9 BS |
220 | } |
221 | ||
56550d94 GKH |
222 | static int nouveau_drm_probe(struct pci_dev *pdev, |
223 | const struct pci_device_id *pent) | |
94580299 BS |
224 | { |
225 | struct nouveau_device *device; | |
ebb945a9 BS |
226 | struct apertures_struct *aper; |
227 | bool boot = false; | |
94580299 BS |
228 | int ret; |
229 | ||
ebb945a9 BS |
230 | /* remove conflicting drivers (vesafb, efifb etc) */ |
231 | aper = alloc_apertures(3); | |
232 | if (!aper) | |
233 | return -ENOMEM; | |
234 | ||
235 | aper->ranges[0].base = pci_resource_start(pdev, 1); | |
236 | aper->ranges[0].size = pci_resource_len(pdev, 1); | |
237 | aper->count = 1; | |
238 | ||
239 | if (pci_resource_len(pdev, 2)) { | |
240 | aper->ranges[aper->count].base = pci_resource_start(pdev, 2); | |
241 | aper->ranges[aper->count].size = pci_resource_len(pdev, 2); | |
242 | aper->count++; | |
243 | } | |
244 | ||
245 | if (pci_resource_len(pdev, 3)) { | |
246 | aper->ranges[aper->count].base = pci_resource_start(pdev, 3); | |
247 | aper->ranges[aper->count].size = pci_resource_len(pdev, 3); | |
248 | aper->count++; | |
249 | } | |
250 | ||
251 | #ifdef CONFIG_X86 | |
252 | boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; | |
253 | #endif | |
254 | remove_conflicting_framebuffers(aper, "nouveaufb", boot); | |
83ef7777 | 255 | kfree(aper); |
ebb945a9 | 256 | |
94580299 BS |
257 | ret = nouveau_device_create(pdev, nouveau_name(pdev), pci_name(pdev), |
258 | nouveau_config, nouveau_debug, &device); | |
259 | if (ret) | |
260 | return ret; | |
261 | ||
262 | pci_set_master(pdev); | |
263 | ||
77145f1c | 264 | ret = drm_get_pci_dev(pdev, pent, &driver); |
94580299 | 265 | if (ret) { |
ebb945a9 | 266 | nouveau_object_ref(NULL, (struct nouveau_object **)&device); |
94580299 BS |
267 | return ret; |
268 | } | |
269 | ||
270 | return 0; | |
271 | } | |
272 | ||
5addcf0a DA |
273 | #define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403 |
274 | ||
275 | static void | |
276 | nouveau_get_hdmi_dev(struct drm_device *dev) | |
277 | { | |
278 | struct nouveau_drm *drm = dev->dev_private; | |
279 | struct pci_dev *pdev = dev->pdev; | |
280 | ||
281 | /* subfunction one is a hdmi audio device? */ | |
282 | drm->hdmi_device = pci_get_bus_and_slot((unsigned int)pdev->bus->number, | |
283 | PCI_DEVFN(PCI_SLOT(pdev->devfn), 1)); | |
284 | ||
285 | if (!drm->hdmi_device) { | |
286 | DRM_INFO("hdmi device not found %d %d %d\n", pdev->bus->number, PCI_SLOT(pdev->devfn), 1); | |
287 | return; | |
288 | } | |
289 | ||
290 | if ((drm->hdmi_device->class >> 8) != PCI_CLASS_MULTIMEDIA_HD_AUDIO) { | |
291 | DRM_INFO("possible hdmi device not audio %d\n", drm->hdmi_device->class); | |
292 | pci_dev_put(drm->hdmi_device); | |
293 | drm->hdmi_device = NULL; | |
294 | return; | |
295 | } | |
296 | } | |
297 | ||
5b8a43ae | 298 | static int |
94580299 BS |
299 | nouveau_drm_load(struct drm_device *dev, unsigned long flags) |
300 | { | |
301 | struct pci_dev *pdev = dev->pdev; | |
ebb945a9 | 302 | struct nouveau_device *device; |
94580299 BS |
303 | struct nouveau_drm *drm; |
304 | int ret; | |
305 | ||
fa6df8c1 | 306 | ret = nouveau_cli_create(pdev, "DRM", sizeof(*drm), (void**)&drm); |
94580299 BS |
307 | if (ret) |
308 | return ret; | |
309 | ||
77145f1c BS |
310 | dev->dev_private = drm; |
311 | drm->dev = dev; | |
312 | ||
94580299 | 313 | INIT_LIST_HEAD(&drm->clients); |
ebb945a9 | 314 | spin_lock_init(&drm->tile.lock); |
94580299 | 315 | |
5addcf0a DA |
316 | nouveau_get_hdmi_dev(dev); |
317 | ||
cb75d97e BS |
318 | /* make sure AGP controller is in a consistent state before we |
319 | * (possibly) execute vbios init tables (see nouveau_agp.h) | |
320 | */ | |
321 | if (drm_pci_device_is_agp(dev) && dev->agp) { | |
322 | /* dummy device object, doesn't init anything, but allows | |
323 | * agp code access to registers | |
324 | */ | |
325 | ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT, | |
326 | NVDRM_DEVICE, 0x0080, | |
327 | &(struct nv_device_class) { | |
328 | .device = ~0, | |
329 | .disable = | |
330 | ~(NV_DEVICE_DISABLE_MMIO | | |
331 | NV_DEVICE_DISABLE_IDENTIFY), | |
332 | .debug0 = ~0, | |
333 | }, sizeof(struct nv_device_class), | |
334 | &drm->device); | |
335 | if (ret) | |
ebb945a9 | 336 | goto fail_device; |
cb75d97e BS |
337 | |
338 | nouveau_agp_reset(drm); | |
339 | nouveau_object_del(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE); | |
340 | } | |
341 | ||
94580299 BS |
342 | ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE, |
343 | 0x0080, &(struct nv_device_class) { | |
344 | .device = ~0, | |
345 | .disable = 0, | |
346 | .debug0 = 0, | |
347 | }, sizeof(struct nv_device_class), | |
348 | &drm->device); | |
349 | if (ret) | |
350 | goto fail_device; | |
351 | ||
77145f1c BS |
352 | /* workaround an odd issue on nvc1 by disabling the device's |
353 | * nosnoop capability. hopefully won't cause issues until a | |
354 | * better fix is found - assuming there is one... | |
355 | */ | |
ebb945a9 | 356 | device = nv_device(drm->device); |
77145f1c BS |
357 | if (nv_device(drm->device)->chipset == 0xc1) |
358 | nv_mask(device, 0x00088080, 0x00000800, 0x00000000); | |
ebb945a9 | 359 | |
77145f1c | 360 | nouveau_vga_init(drm); |
cb75d97e BS |
361 | nouveau_agp_init(drm); |
362 | ||
ebb945a9 BS |
363 | if (device->card_type >= NV_50) { |
364 | ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40), | |
365 | 0x1000, &drm->client.base.vm); | |
366 | if (ret) | |
367 | goto fail_device; | |
368 | } | |
369 | ||
370 | ret = nouveau_ttm_init(drm); | |
94580299 | 371 | if (ret) |
77145f1c BS |
372 | goto fail_ttm; |
373 | ||
374 | ret = nouveau_bios_init(dev); | |
375 | if (ret) | |
376 | goto fail_bios; | |
377 | ||
77145f1c | 378 | ret = nouveau_display_create(dev); |
ebb945a9 | 379 | if (ret) |
77145f1c BS |
380 | goto fail_dispctor; |
381 | ||
382 | if (dev->mode_config.num_crtc) { | |
383 | ret = nouveau_display_init(dev); | |
384 | if (ret) | |
385 | goto fail_dispinit; | |
386 | } | |
387 | ||
26fdd78c | 388 | nouveau_sysfs_init(dev); |
b9ed919f | 389 | nouveau_hwmon_init(dev); |
ebb945a9 BS |
390 | nouveau_accel_init(drm); |
391 | nouveau_fbcon_init(dev); | |
5addcf0a DA |
392 | |
393 | if (nouveau_runtime_pm != 0) { | |
394 | pm_runtime_use_autosuspend(dev->dev); | |
395 | pm_runtime_set_autosuspend_delay(dev->dev, 5000); | |
396 | pm_runtime_set_active(dev->dev); | |
397 | pm_runtime_allow(dev->dev); | |
398 | pm_runtime_mark_last_busy(dev->dev); | |
399 | pm_runtime_put(dev->dev); | |
400 | } | |
94580299 BS |
401 | return 0; |
402 | ||
77145f1c BS |
403 | fail_dispinit: |
404 | nouveau_display_destroy(dev); | |
405 | fail_dispctor: | |
77145f1c BS |
406 | nouveau_bios_takedown(dev); |
407 | fail_bios: | |
ebb945a9 | 408 | nouveau_ttm_fini(drm); |
77145f1c BS |
409 | fail_ttm: |
410 | nouveau_agp_fini(drm); | |
411 | nouveau_vga_fini(drm); | |
94580299 BS |
412 | fail_device: |
413 | nouveau_cli_destroy(&drm->client); | |
414 | return ret; | |
415 | } | |
416 | ||
5b8a43ae | 417 | static int |
94580299 BS |
418 | nouveau_drm_unload(struct drm_device *dev) |
419 | { | |
77145f1c | 420 | struct nouveau_drm *drm = nouveau_drm(dev); |
94580299 | 421 | |
5addcf0a | 422 | pm_runtime_get_sync(dev->dev); |
ebb945a9 BS |
423 | nouveau_fbcon_fini(dev); |
424 | nouveau_accel_fini(drm); | |
b9ed919f | 425 | nouveau_hwmon_fini(dev); |
26fdd78c | 426 | nouveau_sysfs_fini(dev); |
77145f1c | 427 | |
9430738d BS |
428 | if (dev->mode_config.num_crtc) |
429 | nouveau_display_fini(dev); | |
77145f1c BS |
430 | nouveau_display_destroy(dev); |
431 | ||
77145f1c | 432 | nouveau_bios_takedown(dev); |
94580299 | 433 | |
ebb945a9 | 434 | nouveau_ttm_fini(drm); |
cb75d97e | 435 | nouveau_agp_fini(drm); |
77145f1c | 436 | nouveau_vga_fini(drm); |
cb75d97e | 437 | |
5addcf0a DA |
438 | if (drm->hdmi_device) |
439 | pci_dev_put(drm->hdmi_device); | |
94580299 BS |
440 | nouveau_cli_destroy(&drm->client); |
441 | return 0; | |
442 | } | |
443 | ||
444 | static void | |
445 | nouveau_drm_remove(struct pci_dev *pdev) | |
446 | { | |
77145f1c BS |
447 | struct drm_device *dev = pci_get_drvdata(pdev); |
448 | struct nouveau_drm *drm = nouveau_drm(dev); | |
ebb945a9 | 449 | struct nouveau_object *device; |
77145f1c BS |
450 | |
451 | device = drm->client.base.device; | |
452 | drm_put_dev(dev); | |
453 | ||
ebb945a9 BS |
454 | nouveau_object_ref(NULL, &device); |
455 | nouveau_object_debug(); | |
94580299 BS |
456 | } |
457 | ||
cd897837 | 458 | static int |
2d8b9ccb | 459 | nouveau_do_suspend(struct drm_device *dev) |
94580299 | 460 | { |
77145f1c | 461 | struct nouveau_drm *drm = nouveau_drm(dev); |
94580299 BS |
462 | struct nouveau_cli *cli; |
463 | int ret; | |
464 | ||
9430738d | 465 | if (dev->mode_config.num_crtc) { |
c52f4fa6 | 466 | NV_INFO(drm, "suspending display...\n"); |
9430738d BS |
467 | ret = nouveau_display_suspend(dev); |
468 | if (ret) | |
469 | return ret; | |
470 | } | |
94580299 | 471 | |
c52f4fa6 | 472 | NV_INFO(drm, "evicting buffers...\n"); |
ebb945a9 BS |
473 | ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM); |
474 | ||
c52f4fa6 | 475 | NV_INFO(drm, "waiting for kernel channels to go idle...\n"); |
81dff21b BS |
476 | if (drm->cechan) { |
477 | ret = nouveau_channel_idle(drm->cechan); | |
478 | if (ret) | |
479 | return ret; | |
480 | } | |
481 | ||
482 | if (drm->channel) { | |
483 | ret = nouveau_channel_idle(drm->channel); | |
484 | if (ret) | |
485 | return ret; | |
486 | } | |
487 | ||
c52f4fa6 | 488 | NV_INFO(drm, "suspending client object trees...\n"); |
ebb945a9 BS |
489 | if (drm->fence && nouveau_fence(drm)->suspend) { |
490 | if (!nouveau_fence(drm)->suspend(drm)) | |
491 | return -ENOMEM; | |
492 | } | |
493 | ||
94580299 BS |
494 | list_for_each_entry(cli, &drm->clients, head) { |
495 | ret = nouveau_client_fini(&cli->base, true); | |
496 | if (ret) | |
497 | goto fail_client; | |
498 | } | |
499 | ||
c52f4fa6 | 500 | NV_INFO(drm, "suspending kernel object tree...\n"); |
94580299 BS |
501 | ret = nouveau_client_fini(&drm->client.base, true); |
502 | if (ret) | |
503 | goto fail_client; | |
504 | ||
cb75d97e | 505 | nouveau_agp_fini(drm); |
94580299 BS |
506 | return 0; |
507 | ||
508 | fail_client: | |
509 | list_for_each_entry_continue_reverse(cli, &drm->clients, head) { | |
510 | nouveau_client_init(&cli->base); | |
511 | } | |
512 | ||
9430738d | 513 | if (dev->mode_config.num_crtc) { |
c52f4fa6 | 514 | NV_INFO(drm, "resuming display...\n"); |
9430738d BS |
515 | nouveau_display_resume(dev); |
516 | } | |
94580299 BS |
517 | return ret; |
518 | } | |
519 | ||
2d8b9ccb | 520 | int nouveau_pmops_suspend(struct device *dev) |
94580299 | 521 | { |
2d8b9ccb DA |
522 | struct pci_dev *pdev = to_pci_dev(dev); |
523 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
94580299 BS |
524 | int ret; |
525 | ||
5addcf0a DA |
526 | if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || |
527 | drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) | |
94580299 BS |
528 | return 0; |
529 | ||
5addcf0a DA |
530 | if (drm_dev->mode_config.num_crtc) |
531 | nouveau_fbcon_set_suspend(drm_dev, 1); | |
532 | ||
2d8b9ccb | 533 | ret = nouveau_do_suspend(drm_dev); |
94580299 BS |
534 | if (ret) |
535 | return ret; | |
2d8b9ccb DA |
536 | |
537 | pci_save_state(pdev); | |
538 | pci_disable_device(pdev); | |
539 | pci_set_power_state(pdev, PCI_D3hot); | |
2d8b9ccb DA |
540 | return 0; |
541 | } | |
542 | ||
cd897837 | 543 | static int |
2d8b9ccb DA |
544 | nouveau_do_resume(struct drm_device *dev) |
545 | { | |
546 | struct nouveau_drm *drm = nouveau_drm(dev); | |
547 | struct nouveau_cli *cli; | |
548 | ||
c52f4fa6 | 549 | NV_INFO(drm, "re-enabling device...\n"); |
94580299 | 550 | |
cb75d97e BS |
551 | nouveau_agp_reset(drm); |
552 | ||
c52f4fa6 | 553 | NV_INFO(drm, "resuming kernel object tree...\n"); |
94580299 | 554 | nouveau_client_init(&drm->client.base); |
ebb945a9 | 555 | nouveau_agp_init(drm); |
94580299 | 556 | |
c52f4fa6 | 557 | NV_INFO(drm, "resuming client object trees...\n"); |
81dff21b BS |
558 | if (drm->fence && nouveau_fence(drm)->resume) |
559 | nouveau_fence(drm)->resume(drm); | |
560 | ||
94580299 BS |
561 | list_for_each_entry(cli, &drm->clients, head) { |
562 | nouveau_client_init(&cli->base); | |
563 | } | |
cb75d97e | 564 | |
77145f1c | 565 | nouveau_run_vbios_init(dev); |
77145f1c | 566 | |
9430738d | 567 | if (dev->mode_config.num_crtc) { |
c52f4fa6 | 568 | NV_INFO(drm, "resuming display...\n"); |
5addcf0a | 569 | nouveau_display_repin(dev); |
9430738d | 570 | } |
5addcf0a | 571 | |
77145f1c | 572 | return 0; |
94580299 BS |
573 | } |
574 | ||
2d8b9ccb DA |
575 | int nouveau_pmops_resume(struct device *dev) |
576 | { | |
577 | struct pci_dev *pdev = to_pci_dev(dev); | |
578 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
579 | int ret; | |
580 | ||
5addcf0a DA |
581 | if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || |
582 | drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) | |
2d8b9ccb DA |
583 | return 0; |
584 | ||
585 | pci_set_power_state(pdev, PCI_D0); | |
586 | pci_restore_state(pdev); | |
587 | ret = pci_enable_device(pdev); | |
588 | if (ret) | |
589 | return ret; | |
590 | pci_set_master(pdev); | |
591 | ||
5addcf0a | 592 | ret = nouveau_do_resume(drm_dev); |
c52f4fa6 | 593 | if (ret) |
5addcf0a | 594 | return ret; |
5addcf0a DA |
595 | if (drm_dev->mode_config.num_crtc) |
596 | nouveau_fbcon_set_suspend(drm_dev, 0); | |
597 | ||
598 | nouveau_fbcon_zfill_all(drm_dev); | |
01172772 DA |
599 | if (drm_dev->mode_config.num_crtc) |
600 | nouveau_display_resume(drm_dev); | |
5addcf0a | 601 | return 0; |
2d8b9ccb DA |
602 | } |
603 | ||
604 | static int nouveau_pmops_freeze(struct device *dev) | |
605 | { | |
606 | struct pci_dev *pdev = to_pci_dev(dev); | |
607 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
5addcf0a DA |
608 | int ret; |
609 | ||
5addcf0a DA |
610 | if (drm_dev->mode_config.num_crtc) |
611 | nouveau_fbcon_set_suspend(drm_dev, 1); | |
2d8b9ccb | 612 | |
5addcf0a | 613 | ret = nouveau_do_suspend(drm_dev); |
5addcf0a | 614 | return ret; |
2d8b9ccb DA |
615 | } |
616 | ||
617 | static int nouveau_pmops_thaw(struct device *dev) | |
618 | { | |
619 | struct pci_dev *pdev = to_pci_dev(dev); | |
620 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
5addcf0a | 621 | int ret; |
2d8b9ccb | 622 | |
5addcf0a | 623 | ret = nouveau_do_resume(drm_dev); |
c52f4fa6 | 624 | if (ret) |
5addcf0a | 625 | return ret; |
5addcf0a DA |
626 | if (drm_dev->mode_config.num_crtc) |
627 | nouveau_fbcon_set_suspend(drm_dev, 0); | |
628 | nouveau_fbcon_zfill_all(drm_dev); | |
01172772 DA |
629 | if (drm_dev->mode_config.num_crtc) |
630 | nouveau_display_resume(drm_dev); | |
5addcf0a | 631 | return 0; |
2d8b9ccb DA |
632 | } |
633 | ||
634 | ||
5b8a43ae | 635 | static int |
ebb945a9 BS |
636 | nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv) |
637 | { | |
638 | struct pci_dev *pdev = dev->pdev; | |
639 | struct nouveau_drm *drm = nouveau_drm(dev); | |
640 | struct nouveau_cli *cli; | |
a2896ced | 641 | char name[32], tmpname[TASK_COMM_LEN]; |
ebb945a9 BS |
642 | int ret; |
643 | ||
5addcf0a DA |
644 | /* need to bring up power immediately if opening device */ |
645 | ret = pm_runtime_get_sync(dev->dev); | |
646 | if (ret < 0) | |
647 | return ret; | |
648 | ||
a2896ced MS |
649 | get_task_comm(tmpname, current); |
650 | snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid)); | |
fa6df8c1 BS |
651 | |
652 | ret = nouveau_cli_create(pdev, name, sizeof(*cli), (void **)&cli); | |
ebb945a9 | 653 | if (ret) |
5addcf0a | 654 | goto out_suspend; |
ebb945a9 BS |
655 | |
656 | if (nv_device(drm->device)->card_type >= NV_50) { | |
657 | ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40), | |
658 | 0x1000, &cli->base.vm); | |
659 | if (ret) { | |
660 | nouveau_cli_destroy(cli); | |
5addcf0a | 661 | goto out_suspend; |
ebb945a9 BS |
662 | } |
663 | } | |
664 | ||
665 | fpriv->driver_priv = cli; | |
666 | ||
667 | mutex_lock(&drm->client.mutex); | |
668 | list_add(&cli->head, &drm->clients); | |
669 | mutex_unlock(&drm->client.mutex); | |
5addcf0a DA |
670 | |
671 | out_suspend: | |
672 | pm_runtime_mark_last_busy(dev->dev); | |
673 | pm_runtime_put_autosuspend(dev->dev); | |
674 | ||
675 | return ret; | |
ebb945a9 BS |
676 | } |
677 | ||
5b8a43ae | 678 | static void |
ebb945a9 BS |
679 | nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv) |
680 | { | |
681 | struct nouveau_cli *cli = nouveau_cli(fpriv); | |
682 | struct nouveau_drm *drm = nouveau_drm(dev); | |
683 | ||
5addcf0a DA |
684 | pm_runtime_get_sync(dev->dev); |
685 | ||
ebb945a9 BS |
686 | if (cli->abi16) |
687 | nouveau_abi16_fini(cli->abi16); | |
688 | ||
689 | mutex_lock(&drm->client.mutex); | |
690 | list_del(&cli->head); | |
691 | mutex_unlock(&drm->client.mutex); | |
5addcf0a | 692 | |
ebb945a9 BS |
693 | } |
694 | ||
5b8a43ae | 695 | static void |
ebb945a9 BS |
696 | nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv) |
697 | { | |
698 | struct nouveau_cli *cli = nouveau_cli(fpriv); | |
699 | nouveau_cli_destroy(cli); | |
5addcf0a DA |
700 | pm_runtime_mark_last_busy(dev->dev); |
701 | pm_runtime_put_autosuspend(dev->dev); | |
ebb945a9 BS |
702 | } |
703 | ||
baa70943 | 704 | static const struct drm_ioctl_desc |
77145f1c | 705 | nouveau_ioctls[] = { |
7d761258 | 706 | DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), |
77145f1c | 707 | DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
7d761258 MP |
708 | DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), |
709 | DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
710 | DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
711 | DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
712 | DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
713 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
714 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
715 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
716 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
717 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
77145f1c BS |
718 | }; |
719 | ||
5addcf0a DA |
720 | long nouveau_drm_ioctl(struct file *filp, |
721 | unsigned int cmd, unsigned long arg) | |
722 | { | |
723 | struct drm_file *file_priv = filp->private_data; | |
724 | struct drm_device *dev; | |
725 | long ret; | |
726 | dev = file_priv->minor->dev; | |
727 | ||
728 | ret = pm_runtime_get_sync(dev->dev); | |
729 | if (ret < 0) | |
730 | return ret; | |
731 | ||
732 | ret = drm_ioctl(filp, cmd, arg); | |
733 | ||
734 | pm_runtime_mark_last_busy(dev->dev); | |
735 | pm_runtime_put_autosuspend(dev->dev); | |
736 | return ret; | |
737 | } | |
77145f1c BS |
738 | static const struct file_operations |
739 | nouveau_driver_fops = { | |
740 | .owner = THIS_MODULE, | |
741 | .open = drm_open, | |
742 | .release = drm_release, | |
5addcf0a | 743 | .unlocked_ioctl = nouveau_drm_ioctl, |
77145f1c BS |
744 | .mmap = nouveau_ttm_mmap, |
745 | .poll = drm_poll, | |
77145f1c BS |
746 | .read = drm_read, |
747 | #if defined(CONFIG_COMPAT) | |
748 | .compat_ioctl = nouveau_compat_ioctl, | |
749 | #endif | |
750 | .llseek = noop_llseek, | |
751 | }; | |
752 | ||
753 | static struct drm_driver | |
754 | driver = { | |
755 | .driver_features = | |
4cb4ea39 | 756 | DRIVER_USE_AGP | |
7d761258 | 757 | DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER, |
77145f1c BS |
758 | |
759 | .load = nouveau_drm_load, | |
760 | .unload = nouveau_drm_unload, | |
761 | .open = nouveau_drm_open, | |
762 | .preclose = nouveau_drm_preclose, | |
763 | .postclose = nouveau_drm_postclose, | |
764 | .lastclose = nouveau_vga_lastclose, | |
765 | ||
33b903e8 MS |
766 | #if defined(CONFIG_DEBUG_FS) |
767 | .debugfs_init = nouveau_debugfs_init, | |
768 | .debugfs_cleanup = nouveau_debugfs_takedown, | |
769 | #endif | |
770 | ||
77145f1c | 771 | .get_vblank_counter = drm_vblank_count, |
51cb4b39 BS |
772 | .enable_vblank = nouveau_display_vblank_enable, |
773 | .disable_vblank = nouveau_display_vblank_disable, | |
77145f1c BS |
774 | |
775 | .ioctls = nouveau_ioctls, | |
baa70943 | 776 | .num_ioctls = ARRAY_SIZE(nouveau_ioctls), |
77145f1c BS |
777 | .fops = &nouveau_driver_fops, |
778 | ||
779 | .prime_handle_to_fd = drm_gem_prime_handle_to_fd, | |
780 | .prime_fd_to_handle = drm_gem_prime_fd_to_handle, | |
ab9ccb96 AP |
781 | .gem_prime_export = drm_gem_prime_export, |
782 | .gem_prime_import = drm_gem_prime_import, | |
783 | .gem_prime_pin = nouveau_gem_prime_pin, | |
1af7c7dd | 784 | .gem_prime_unpin = nouveau_gem_prime_unpin, |
ab9ccb96 AP |
785 | .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table, |
786 | .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table, | |
787 | .gem_prime_vmap = nouveau_gem_prime_vmap, | |
788 | .gem_prime_vunmap = nouveau_gem_prime_vunmap, | |
77145f1c | 789 | |
77145f1c BS |
790 | .gem_free_object = nouveau_gem_object_del, |
791 | .gem_open_object = nouveau_gem_object_open, | |
792 | .gem_close_object = nouveau_gem_object_close, | |
793 | ||
794 | .dumb_create = nouveau_display_dumb_create, | |
795 | .dumb_map_offset = nouveau_display_dumb_map_offset, | |
43387b37 | 796 | .dumb_destroy = drm_gem_dumb_destroy, |
77145f1c BS |
797 | |
798 | .name = DRIVER_NAME, | |
799 | .desc = DRIVER_DESC, | |
800 | #ifdef GIT_REVISION | |
801 | .date = GIT_REVISION, | |
802 | #else | |
803 | .date = DRIVER_DATE, | |
804 | #endif | |
805 | .major = DRIVER_MAJOR, | |
806 | .minor = DRIVER_MINOR, | |
807 | .patchlevel = DRIVER_PATCHLEVEL, | |
808 | }; | |
809 | ||
94580299 BS |
810 | static struct pci_device_id |
811 | nouveau_drm_pci_table[] = { | |
812 | { | |
813 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID), | |
814 | .class = PCI_BASE_CLASS_DISPLAY << 16, | |
815 | .class_mask = 0xff << 16, | |
816 | }, | |
817 | { | |
818 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID), | |
819 | .class = PCI_BASE_CLASS_DISPLAY << 16, | |
820 | .class_mask = 0xff << 16, | |
821 | }, | |
822 | {} | |
823 | }; | |
824 | ||
5addcf0a DA |
825 | static int nouveau_pmops_runtime_suspend(struct device *dev) |
826 | { | |
827 | struct pci_dev *pdev = to_pci_dev(dev); | |
828 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
829 | int ret; | |
830 | ||
831 | if (nouveau_runtime_pm == 0) | |
832 | return -EINVAL; | |
833 | ||
c52f4fa6 | 834 | nv_debug_level(SILENT); |
5addcf0a DA |
835 | drm_kms_helper_poll_disable(drm_dev); |
836 | vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF); | |
837 | nouveau_switcheroo_optimus_dsm(); | |
838 | ret = nouveau_do_suspend(drm_dev); | |
839 | pci_save_state(pdev); | |
840 | pci_disable_device(pdev); | |
841 | pci_set_power_state(pdev, PCI_D3cold); | |
842 | drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF; | |
843 | return ret; | |
844 | } | |
845 | ||
846 | static int nouveau_pmops_runtime_resume(struct device *dev) | |
847 | { | |
848 | struct pci_dev *pdev = to_pci_dev(dev); | |
849 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
850 | struct nouveau_device *device = nouveau_dev(drm_dev); | |
851 | int ret; | |
852 | ||
853 | if (nouveau_runtime_pm == 0) | |
854 | return -EINVAL; | |
855 | ||
856 | pci_set_power_state(pdev, PCI_D0); | |
857 | pci_restore_state(pdev); | |
858 | ret = pci_enable_device(pdev); | |
859 | if (ret) | |
860 | return ret; | |
861 | pci_set_master(pdev); | |
862 | ||
863 | ret = nouveau_do_resume(drm_dev); | |
01172772 DA |
864 | if (drm_dev->mode_config.num_crtc) |
865 | nouveau_display_resume(drm_dev); | |
5addcf0a DA |
866 | drm_kms_helper_poll_enable(drm_dev); |
867 | /* do magic */ | |
868 | nv_mask(device, 0x88488, (1 << 25), (1 << 25)); | |
869 | vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON); | |
870 | drm_dev->switch_power_state = DRM_SWITCH_POWER_ON; | |
c52f4fa6 | 871 | nv_debug_level(NORMAL); |
5addcf0a DA |
872 | return ret; |
873 | } | |
874 | ||
875 | static int nouveau_pmops_runtime_idle(struct device *dev) | |
876 | { | |
877 | struct pci_dev *pdev = to_pci_dev(dev); | |
878 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
879 | struct nouveau_drm *drm = nouveau_drm(drm_dev); | |
880 | struct drm_crtc *crtc; | |
881 | ||
882 | if (nouveau_runtime_pm == 0) | |
883 | return -EBUSY; | |
884 | ||
885 | /* are we optimus enabled? */ | |
886 | if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) { | |
887 | DRM_DEBUG_DRIVER("failing to power off - not optimus\n"); | |
888 | return -EBUSY; | |
889 | } | |
890 | ||
891 | /* if we have a hdmi audio device - make sure it has a driver loaded */ | |
892 | if (drm->hdmi_device) { | |
893 | if (!drm->hdmi_device->driver) { | |
894 | DRM_DEBUG_DRIVER("failing to power off - no HDMI audio driver loaded\n"); | |
895 | pm_runtime_mark_last_busy(dev); | |
896 | return -EBUSY; | |
897 | } | |
898 | } | |
899 | ||
900 | list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) { | |
901 | if (crtc->enabled) { | |
902 | DRM_DEBUG_DRIVER("failing to power off - crtc active\n"); | |
903 | return -EBUSY; | |
904 | } | |
905 | } | |
906 | pm_runtime_mark_last_busy(dev); | |
907 | pm_runtime_autosuspend(dev); | |
908 | /* we don't want the main rpm_idle to call suspend - we want to autosuspend */ | |
909 | return 1; | |
910 | } | |
911 | ||
2d8b9ccb DA |
912 | static const struct dev_pm_ops nouveau_pm_ops = { |
913 | .suspend = nouveau_pmops_suspend, | |
914 | .resume = nouveau_pmops_resume, | |
915 | .freeze = nouveau_pmops_freeze, | |
916 | .thaw = nouveau_pmops_thaw, | |
917 | .poweroff = nouveau_pmops_freeze, | |
918 | .restore = nouveau_pmops_resume, | |
5addcf0a DA |
919 | .runtime_suspend = nouveau_pmops_runtime_suspend, |
920 | .runtime_resume = nouveau_pmops_runtime_resume, | |
921 | .runtime_idle = nouveau_pmops_runtime_idle, | |
2d8b9ccb DA |
922 | }; |
923 | ||
94580299 BS |
924 | static struct pci_driver |
925 | nouveau_drm_pci_driver = { | |
926 | .name = "nouveau", | |
927 | .id_table = nouveau_drm_pci_table, | |
928 | .probe = nouveau_drm_probe, | |
929 | .remove = nouveau_drm_remove, | |
2d8b9ccb | 930 | .driver.pm = &nouveau_pm_ops, |
94580299 BS |
931 | }; |
932 | ||
933 | static int __init | |
934 | nouveau_drm_init(void) | |
935 | { | |
77145f1c BS |
936 | if (nouveau_modeset == -1) { |
937 | #ifdef CONFIG_VGA_CONSOLE | |
938 | if (vgacon_text_force()) | |
939 | nouveau_modeset = 0; | |
77145f1c | 940 | #endif |
77145f1c BS |
941 | } |
942 | ||
943 | if (!nouveau_modeset) | |
944 | return 0; | |
945 | ||
946 | nouveau_register_dsm_handler(); | |
947 | return drm_pci_init(&driver, &nouveau_drm_pci_driver); | |
94580299 BS |
948 | } |
949 | ||
950 | static void __exit | |
951 | nouveau_drm_exit(void) | |
952 | { | |
77145f1c BS |
953 | if (!nouveau_modeset) |
954 | return; | |
955 | ||
956 | drm_pci_exit(&driver, &nouveau_drm_pci_driver); | |
957 | nouveau_unregister_dsm_handler(); | |
94580299 BS |
958 | } |
959 | ||
960 | module_init(nouveau_drm_init); | |
961 | module_exit(nouveau_drm_exit); | |
962 | ||
963 | MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table); | |
77145f1c BS |
964 | MODULE_AUTHOR(DRIVER_AUTHOR); |
965 | MODULE_DESCRIPTION(DRIVER_DESC); | |
94580299 | 966 | MODULE_LICENSE("GPL and additional rights"); |