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[mirror_ubuntu-artful-kernel.git] / drivers / gpu / drm / radeon / radeon_irq_kms.c
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771fe6b9
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1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Dave Airlie
25 * Alex Deucher
26 * Jerome Glisse
27 */
760285e7
DH
28#include <drm/drmP.h>
29#include <drm/drm_crtc_helper.h>
30#include <drm/radeon_drm.h>
771fe6b9 31#include "radeon_reg.h"
771fe6b9
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32#include "radeon.h"
33#include "atom.h"
34
10ebc0bc
DA
35#include <linux/pm_runtime.h>
36
fb98257a
CK
37#define RADEON_WAIT_IDLE_TIMEOUT 200
38
b73ba98d
AD
39/**
40 * radeon_driver_irq_handler_kms - irq handler for KMS
41 *
e9f0d76f 42 * @int irq, void *arg: args
b73ba98d
AD
43 *
44 * This is the irq handler for the radeon KMS driver (all asics).
45 * radeon_irq_process is a macro that points to the per-asic
46 * irq handler callback.
47 */
e9f0d76f 48irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg)
771fe6b9
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49{
50 struct drm_device *dev = (struct drm_device *) arg;
51 struct radeon_device *rdev = dev->dev_private;
10ebc0bc 52 irqreturn_t ret;
771fe6b9 53
10ebc0bc
DA
54 ret = radeon_irq_process(rdev);
55 if (ret == IRQ_HANDLED)
56 pm_runtime_mark_last_busy(dev->dev);
57 return ret;
771fe6b9
JG
58}
59
d4877cf2
AD
60/*
61 * Handle hotplug events outside the interrupt handler proper.
62 */
b73ba98d
AD
63/**
64 * radeon_hotplug_work_func - display hotplug work handler
65 *
66 * @work: work struct
67 *
68 * This is the hot plug event work handler (all asics).
69 * The work gets scheduled from the irq handler if there
70 * was a hot plug interrupt. It walks the connector table
71 * and calls the hotplug handler for each one, then sends
72 * a drm hotplug event to alert userspace.
73 */
d4877cf2
AD
74static void radeon_hotplug_work_func(struct work_struct *work)
75{
76 struct radeon_device *rdev = container_of(work, struct radeon_device,
cb5d4166 77 hotplug_work.work);
d4877cf2
AD
78 struct drm_device *dev = rdev->ddev;
79 struct drm_mode_config *mode_config = &dev->mode_config;
80 struct drm_connector *connector;
81
7f98ca45
DA
82 /* we can race here at startup, some boards seem to trigger
83 * hotplug irqs when they shouldn't. */
84 if (!rdev->mode_info.mode_config_initialized)
85 return;
86
39fa10f7 87 mutex_lock(&mode_config->mutex);
2babdc85
DV
88 list_for_each_entry(connector, &mode_config->connector_list, head)
89 radeon_connector_hotplug(connector);
39fa10f7 90 mutex_unlock(&mode_config->mutex);
d4877cf2 91 /* Just fire off a uevent and let userspace tell us what to do */
eb1f8e4f 92 drm_helper_hpd_irq_event(dev);
d4877cf2
AD
93}
94
de6284aa
DA
95static void radeon_dp_work_func(struct work_struct *work)
96{
9843ead0
DA
97 struct radeon_device *rdev = container_of(work, struct radeon_device,
98 dp_work);
99 struct drm_device *dev = rdev->ddev;
100 struct drm_mode_config *mode_config = &dev->mode_config;
101 struct drm_connector *connector;
102
103 /* this should take a mutex */
2babdc85
DV
104 list_for_each_entry(connector, &mode_config->connector_list, head)
105 radeon_connector_hotplug(connector);
de6284aa 106}
b73ba98d
AD
107/**
108 * radeon_driver_irq_preinstall_kms - drm irq preinstall callback
109 *
110 * @dev: drm dev pointer
111 *
112 * Gets the hw ready to enable irqs (all asics).
113 * This function disables all interrupt sources on the GPU.
114 */
771fe6b9
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115void radeon_driver_irq_preinstall_kms(struct drm_device *dev)
116{
117 struct radeon_device *rdev = dev->dev_private;
fb98257a 118 unsigned long irqflags;
771fe6b9
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119 unsigned i;
120
fb98257a 121 spin_lock_irqsave(&rdev->irq.lock, irqflags);
771fe6b9 122 /* Disable *all* interrupts */
1b37078b 123 for (i = 0; i < RADEON_NUM_RINGS; i++)
736fc37f 124 atomic_set(&rdev->irq.ring_int[i], 0);
4a6369e9 125 rdev->irq.dpm_thermal = false;
54bd5206 126 for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
9e7b414e 127 rdev->irq.hpd[i] = false;
54bd5206
IH
128 for (i = 0; i < RADEON_MAX_CRTCS; i++) {
129 rdev->irq.crtc_vblank_int[i] = false;
736fc37f 130 atomic_set(&rdev->irq.pflip[i], 0);
f122c610 131 rdev->irq.afmt[i] = false;
6f34be50 132 }
771fe6b9 133 radeon_irq_set(rdev);
fb98257a 134 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
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135 /* Clear bits */
136 radeon_irq_process(rdev);
137}
138
b73ba98d
AD
139/**
140 * radeon_driver_irq_postinstall_kms - drm irq preinstall callback
141 *
142 * @dev: drm dev pointer
143 *
144 * Handles stuff to be done after enabling irqs (all asics).
145 * Returns 0 on success.
146 */
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147int radeon_driver_irq_postinstall_kms(struct drm_device *dev)
148{
b0b9bb4d
MD
149 struct radeon_device *rdev = dev->dev_private;
150
151 if (ASIC_IS_AVIVO(rdev))
152 dev->max_vblank_count = 0x00ffffff;
153 else
154 dev->max_vblank_count = 0x001fffff;
155
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156 return 0;
157}
158
b73ba98d
AD
159/**
160 * radeon_driver_irq_uninstall_kms - drm irq uninstall callback
161 *
162 * @dev: drm dev pointer
163 *
164 * This function disables all interrupt sources on the GPU (all asics).
165 */
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166void radeon_driver_irq_uninstall_kms(struct drm_device *dev)
167{
168 struct radeon_device *rdev = dev->dev_private;
fb98257a 169 unsigned long irqflags;
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170 unsigned i;
171
172 if (rdev == NULL) {
173 return;
174 }
fb98257a 175 spin_lock_irqsave(&rdev->irq.lock, irqflags);
771fe6b9 176 /* Disable *all* interrupts */
1b37078b 177 for (i = 0; i < RADEON_NUM_RINGS; i++)
736fc37f 178 atomic_set(&rdev->irq.ring_int[i], 0);
4a6369e9 179 rdev->irq.dpm_thermal = false;
54bd5206 180 for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
003e69f9 181 rdev->irq.hpd[i] = false;
54bd5206
IH
182 for (i = 0; i < RADEON_MAX_CRTCS; i++) {
183 rdev->irq.crtc_vblank_int[i] = false;
736fc37f 184 atomic_set(&rdev->irq.pflip[i], 0);
f122c610 185 rdev->irq.afmt[i] = false;
6f34be50 186 }
771fe6b9 187 radeon_irq_set(rdev);
fb98257a 188 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
771fe6b9
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189}
190
b73ba98d
AD
191/**
192 * radeon_msi_ok - asic specific msi checks
193 *
194 * @rdev: radeon device pointer
195 *
196 * Handles asic specific MSI checks to determine if
197 * MSIs should be enabled on a particular chip (all asics).
198 * Returns true if MSIs should be enabled, false if MSIs
199 * should not be enabled.
200 */
8f6c25c5
AD
201static bool radeon_msi_ok(struct radeon_device *rdev)
202{
203 /* RV370/RV380 was first asic with MSI support */
204 if (rdev->family < CHIP_RV380)
205 return false;
206
207 /* MSIs don't work on AGP */
208 if (rdev->flags & RADEON_IS_AGP)
209 return false;
210
91ed6fd2
BH
211 /*
212 * Older chips have a HW limitation, they can only generate 40 bits
213 * of address for "64-bit" MSIs which breaks on some platforms, notably
214 * IBM POWER servers, so we limit them
215 */
216 if (rdev->family < CHIP_BONAIRE) {
217 dev_info(rdev->dev, "radeon: MSI limited to 32-bit\n");
218 rdev->pdev->no_64bit_msi = 1;
219 }
220
a18cee15
AD
221 /* force MSI on */
222 if (radeon_msi == 1)
223 return true;
224 else if (radeon_msi == 0)
225 return false;
226
b362105f
AD
227 /* Quirks */
228 /* HP RS690 only seems to work with MSIs. */
229 if ((rdev->pdev->device == 0x791f) &&
230 (rdev->pdev->subsystem_vendor == 0x103c) &&
231 (rdev->pdev->subsystem_device == 0x30c2))
232 return true;
233
44517c44
AD
234 /* Dell RS690 only seems to work with MSIs. */
235 if ((rdev->pdev->device == 0x791f) &&
236 (rdev->pdev->subsystem_vendor == 0x1028) &&
237 (rdev->pdev->subsystem_device == 0x01fc))
238 return true;
239
01e718ec
AD
240 /* Dell RS690 only seems to work with MSIs. */
241 if ((rdev->pdev->device == 0x791f) &&
242 (rdev->pdev->subsystem_vendor == 0x1028) &&
243 (rdev->pdev->subsystem_device == 0x01fd))
244 return true;
245
3a6d59df
AD
246 /* Gateway RS690 only seems to work with MSIs. */
247 if ((rdev->pdev->device == 0x791f) &&
248 (rdev->pdev->subsystem_vendor == 0x107b) &&
249 (rdev->pdev->subsystem_device == 0x0185))
250 return true;
251
fb6ca6d1
AD
252 /* try and enable MSIs by default on all RS690s */
253 if (rdev->family == CHIP_RS690)
254 return true;
255
16a5e32b
DA
256 /* RV515 seems to have MSI issues where it loses
257 * MSI rearms occasionally. This leads to lockups and freezes.
258 * disable it by default.
259 */
260 if (rdev->family == CHIP_RV515)
261 return false;
8f6c25c5
AD
262 if (rdev->flags & RADEON_IS_IGP) {
263 /* APUs work fine with MSIs */
264 if (rdev->family >= CHIP_PALM)
265 return true;
266 /* lots of IGPs have problems with MSIs */
267 return false;
268 }
269
270 return true;
271}
272
b73ba98d
AD
273/**
274 * radeon_irq_kms_init - init driver interrupt info
275 *
276 * @rdev: radeon device pointer
277 *
278 * Sets up the work irq handlers, vblank init, MSIs, etc. (all asics).
279 * Returns 0 for success, error for failure.
280 */
771fe6b9
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281int radeon_irq_kms_init(struct radeon_device *rdev)
282{
283 int r = 0;
284
fb98257a 285 spin_lock_init(&rdev->irq.lock);
9e7b414e 286 r = drm_vblank_init(rdev->ddev, rdev->num_crtc);
771fe6b9
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287 if (r) {
288 return r;
289 }
978ccad6 290
3e5cb98d
AD
291 /* enable msi */
292 rdev->msi_enabled = 0;
8f6c25c5
AD
293
294 if (radeon_msi_ok(rdev)) {
3e5cb98d 295 int ret = pci_enable_msi(rdev->pdev);
d8f60cfc 296 if (!ret) {
3e5cb98d 297 rdev->msi_enabled = 1;
da7be684 298 dev_info(rdev->dev, "radeon: using MSI.\n");
d8f60cfc 299 }
3e5cb98d 300 }
27c505ca 301
cb5d4166 302 INIT_DELAYED_WORK(&rdev->hotplug_work, radeon_hotplug_work_func);
de6284aa 303 INIT_WORK(&rdev->dp_work, radeon_dp_work_func);
27c505ca 304 INIT_WORK(&rdev->audio_work, r600_audio_update_hdmi);
27c505ca 305
771fe6b9 306 rdev->irq.installed = true;
bb0f1b5c 307 r = drm_irq_install(rdev->ddev, rdev->ddev->pdev->irq);
003e69f9
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308 if (r) {
309 rdev->irq.installed = false;
cb5d4166 310 flush_delayed_work(&rdev->hotplug_work);
003e69f9
JG
311 return r;
312 }
a01c34f7 313
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314 DRM_INFO("radeon: irq initialized.\n");
315 return 0;
316}
317
b73ba98d 318/**
cf2fbdd2 319 * radeon_irq_kms_fini - tear down driver interrupt info
b73ba98d
AD
320 *
321 * @rdev: radeon device pointer
322 *
323 * Tears down the work irq handlers, vblank handlers, MSIs, etc. (all asics).
324 */
771fe6b9
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325void radeon_irq_kms_fini(struct radeon_device *rdev)
326{
003e69f9 327 drm_vblank_cleanup(rdev->ddev);
771fe6b9 328 if (rdev->irq.installed) {
771fe6b9 329 drm_irq_uninstall(rdev->ddev);
003e69f9 330 rdev->irq.installed = false;
3e5cb98d
AD
331 if (rdev->msi_enabled)
332 pci_disable_msi(rdev->pdev);
cb5d4166 333 flush_delayed_work(&rdev->hotplug_work);
771fe6b9
JG
334 }
335}
1614f8b1 336
b73ba98d
AD
337/**
338 * radeon_irq_kms_sw_irq_get - enable software interrupt
339 *
340 * @rdev: radeon device pointer
341 * @ring: ring whose interrupt you want to enable
342 *
343 * Enables the software interrupt for a specific ring (all asics).
344 * The software interrupt is generally used to signal a fence on
345 * a particular ring.
346 */
1b37078b 347void radeon_irq_kms_sw_irq_get(struct radeon_device *rdev, int ring)
1614f8b1
DA
348{
349 unsigned long irqflags;
350
736fc37f
CK
351 if (!rdev->ddev->irq_enabled)
352 return;
353
354 if (atomic_inc_return(&rdev->irq.ring_int[ring]) == 1) {
355 spin_lock_irqsave(&rdev->irq.lock, irqflags);
1614f8b1 356 radeon_irq_set(rdev);
736fc37f 357 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
1614f8b1 358 }
1614f8b1
DA
359}
360
954605ca
ML
361/**
362 * radeon_irq_kms_sw_irq_get_delayed - enable software interrupt
363 *
364 * @rdev: radeon device pointer
365 * @ring: ring whose interrupt you want to enable
366 *
367 * Enables the software interrupt for a specific ring (all asics).
368 * The software interrupt is generally used to signal a fence on
369 * a particular ring.
370 */
371bool radeon_irq_kms_sw_irq_get_delayed(struct radeon_device *rdev, int ring)
372{
373 return atomic_inc_return(&rdev->irq.ring_int[ring]) == 1;
374}
375
b73ba98d
AD
376/**
377 * radeon_irq_kms_sw_irq_put - disable software interrupt
378 *
379 * @rdev: radeon device pointer
380 * @ring: ring whose interrupt you want to disable
381 *
382 * Disables the software interrupt for a specific ring (all asics).
383 * The software interrupt is generally used to signal a fence on
384 * a particular ring.
385 */
1b37078b 386void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev, int ring)
1614f8b1
DA
387{
388 unsigned long irqflags;
389
736fc37f
CK
390 if (!rdev->ddev->irq_enabled)
391 return;
392
393 if (atomic_dec_and_test(&rdev->irq.ring_int[ring])) {
394 spin_lock_irqsave(&rdev->irq.lock, irqflags);
1614f8b1 395 radeon_irq_set(rdev);
736fc37f 396 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
1614f8b1 397 }
1614f8b1
DA
398}
399
b73ba98d
AD
400/**
401 * radeon_irq_kms_pflip_irq_get - enable pageflip interrupt
402 *
403 * @rdev: radeon device pointer
404 * @crtc: crtc whose interrupt you want to enable
405 *
406 * Enables the pageflip interrupt for a specific crtc (all asics).
407 * For pageflips we use the vblank interrupt source.
408 */
6f34be50
AD
409void radeon_irq_kms_pflip_irq_get(struct radeon_device *rdev, int crtc)
410{
411 unsigned long irqflags;
412
413 if (crtc < 0 || crtc >= rdev->num_crtc)
414 return;
415
736fc37f
CK
416 if (!rdev->ddev->irq_enabled)
417 return;
418
419 if (atomic_inc_return(&rdev->irq.pflip[crtc]) == 1) {
420 spin_lock_irqsave(&rdev->irq.lock, irqflags);
6f34be50 421 radeon_irq_set(rdev);
736fc37f 422 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
6f34be50 423 }
6f34be50
AD
424}
425
b73ba98d
AD
426/**
427 * radeon_irq_kms_pflip_irq_put - disable pageflip interrupt
428 *
429 * @rdev: radeon device pointer
430 * @crtc: crtc whose interrupt you want to disable
431 *
432 * Disables the pageflip interrupt for a specific crtc (all asics).
433 * For pageflips we use the vblank interrupt source.
434 */
6f34be50
AD
435void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc)
436{
437 unsigned long irqflags;
438
439 if (crtc < 0 || crtc >= rdev->num_crtc)
440 return;
441
736fc37f
CK
442 if (!rdev->ddev->irq_enabled)
443 return;
444
445 if (atomic_dec_and_test(&rdev->irq.pflip[crtc])) {
446 spin_lock_irqsave(&rdev->irq.lock, irqflags);
6f34be50 447 radeon_irq_set(rdev);
736fc37f 448 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
6f34be50 449 }
6f34be50
AD
450}
451
b73ba98d
AD
452/**
453 * radeon_irq_kms_enable_afmt - enable audio format change interrupt
454 *
455 * @rdev: radeon device pointer
456 * @block: afmt block whose interrupt you want to enable
457 *
458 * Enables the afmt change interrupt for a specific afmt block (all asics).
459 */
fb98257a
CK
460void radeon_irq_kms_enable_afmt(struct radeon_device *rdev, int block)
461{
462 unsigned long irqflags;
463
cc9945bf
AD
464 if (!rdev->ddev->irq_enabled)
465 return;
466
fb98257a
CK
467 spin_lock_irqsave(&rdev->irq.lock, irqflags);
468 rdev->irq.afmt[block] = true;
469 radeon_irq_set(rdev);
470 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
471
472}
473
b73ba98d
AD
474/**
475 * radeon_irq_kms_disable_afmt - disable audio format change interrupt
476 *
477 * @rdev: radeon device pointer
478 * @block: afmt block whose interrupt you want to disable
479 *
480 * Disables the afmt change interrupt for a specific afmt block (all asics).
481 */
fb98257a
CK
482void radeon_irq_kms_disable_afmt(struct radeon_device *rdev, int block)
483{
484 unsigned long irqflags;
485
cc9945bf
AD
486 if (!rdev->ddev->irq_enabled)
487 return;
488
fb98257a
CK
489 spin_lock_irqsave(&rdev->irq.lock, irqflags);
490 rdev->irq.afmt[block] = false;
491 radeon_irq_set(rdev);
492 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
493}
494
b73ba98d
AD
495/**
496 * radeon_irq_kms_enable_hpd - enable hotplug detect interrupt
497 *
498 * @rdev: radeon device pointer
499 * @hpd_mask: mask of hpd pins you want to enable.
500 *
501 * Enables the hotplug detect interrupt for a specific hpd pin (all asics).
502 */
fb98257a
CK
503void radeon_irq_kms_enable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
504{
505 unsigned long irqflags;
506 int i;
507
cc9945bf
AD
508 if (!rdev->ddev->irq_enabled)
509 return;
510
fb98257a
CK
511 spin_lock_irqsave(&rdev->irq.lock, irqflags);
512 for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
513 rdev->irq.hpd[i] |= !!(hpd_mask & (1 << i));
514 radeon_irq_set(rdev);
515 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
516}
517
b73ba98d
AD
518/**
519 * radeon_irq_kms_disable_hpd - disable hotplug detect interrupt
520 *
521 * @rdev: radeon device pointer
522 * @hpd_mask: mask of hpd pins you want to disable.
523 *
524 * Disables the hotplug detect interrupt for a specific hpd pin (all asics).
525 */
fb98257a
CK
526void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
527{
528 unsigned long irqflags;
529 int i;
530
cc9945bf
AD
531 if (!rdev->ddev->irq_enabled)
532 return;
533
fb98257a
CK
534 spin_lock_irqsave(&rdev->irq.lock, irqflags);
535 for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
536 rdev->irq.hpd[i] &= !(hpd_mask & (1 << i));
537 radeon_irq_set(rdev);
538 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
539}
540
4cd096dd
L
541/**
542 * radeon_irq_kms_update_int_n - helper for updating interrupt enable registers
543 *
544 * @rdev: radeon device pointer
545 * @reg: the register to write to enable/disable interrupts
546 * @mask: the mask that enables the interrupts
547 * @enable: whether to enable or disable the interrupt register
548 * @name: the name of the interrupt register to print to the kernel log
549 * @num: the number of the interrupt register to print to the kernel log
550 *
551 * Helper for updating the enable state of interrupt registers. Checks whether
552 * or not the interrupt matches the enable state we want. If it doesn't, then
553 * we update it and print a debugging message to the kernel log indicating the
554 * new state of the interrupt register.
555 *
556 * Used for updating sequences of interrupts registers like HPD1, HPD2, etc.
557 */
558void radeon_irq_kms_set_irq_n_enabled(struct radeon_device *rdev,
559 u32 reg, u32 mask,
560 bool enable, const char *name, unsigned n)
561{
562 u32 tmp = RREG32(reg);
563
564 /* Interrupt state didn't change */
565 if (!!(tmp & mask) == enable)
566 return;
567
568 if (enable) {
569 DRM_DEBUG("%s%d interrupts enabled\n", name, n);
570 WREG32(reg, tmp |= mask);
571 } else {
572 DRM_DEBUG("%s%d interrupts disabled\n", name, n);
573 WREG32(reg, tmp & ~mask);
574 }
575}